2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
64 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
65 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
66 static void ata_set_mode(struct ata_port *ap);
67 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
68 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
69 static int fgb(u32 bitmap);
70 static int ata_choose_xfer_mode(const struct ata_port *ap,
72 unsigned int *xfer_shift_out);
74 static unsigned int ata_unique_id = 1;
75 static struct workqueue_struct *ata_wq;
77 int atapi_enabled = 0;
78 module_param(atapi_enabled, int, 0444);
79 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
81 MODULE_AUTHOR("Jeff Garzik");
82 MODULE_DESCRIPTION("Library module for ATA devices");
83 MODULE_LICENSE("GPL");
84 MODULE_VERSION(DRV_VERSION);
87 * ata_tf_load_pio - send taskfile registers to host controller
88 * @ap: Port to which output is sent
89 * @tf: ATA taskfile register set
91 * Outputs ATA taskfile to standard ATA host controller.
94 * Inherited from caller.
97 static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf)
99 struct ata_ioports *ioaddr = &ap->ioaddr;
100 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
102 if (tf->ctl != ap->last_ctl) {
103 outb(tf->ctl, ioaddr->ctl_addr);
104 ap->last_ctl = tf->ctl;
108 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
109 outb(tf->hob_feature, ioaddr->feature_addr);
110 outb(tf->hob_nsect, ioaddr->nsect_addr);
111 outb(tf->hob_lbal, ioaddr->lbal_addr);
112 outb(tf->hob_lbam, ioaddr->lbam_addr);
113 outb(tf->hob_lbah, ioaddr->lbah_addr);
114 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
123 outb(tf->feature, ioaddr->feature_addr);
124 outb(tf->nsect, ioaddr->nsect_addr);
125 outb(tf->lbal, ioaddr->lbal_addr);
126 outb(tf->lbam, ioaddr->lbam_addr);
127 outb(tf->lbah, ioaddr->lbah_addr);
128 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
136 if (tf->flags & ATA_TFLAG_DEVICE) {
137 outb(tf->device, ioaddr->device_addr);
138 VPRINTK("device 0x%X\n", tf->device);
145 * ata_tf_load_mmio - send taskfile registers to host controller
146 * @ap: Port to which output is sent
147 * @tf: ATA taskfile register set
149 * Outputs ATA taskfile to standard ATA host controller using MMIO.
152 * Inherited from caller.
155 static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
157 struct ata_ioports *ioaddr = &ap->ioaddr;
158 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
160 if (tf->ctl != ap->last_ctl) {
161 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
162 ap->last_ctl = tf->ctl;
166 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
167 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
168 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
169 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
170 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
171 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
172 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
181 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
182 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
183 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
184 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
185 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
186 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
194 if (tf->flags & ATA_TFLAG_DEVICE) {
195 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
196 VPRINTK("device 0x%X\n", tf->device);
204 * ata_tf_load - send taskfile registers to host controller
205 * @ap: Port to which output is sent
206 * @tf: ATA taskfile register set
208 * Outputs ATA taskfile to standard ATA host controller using MMIO
209 * or PIO as indicated by the ATA_FLAG_MMIO flag.
210 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
211 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
212 * hob_lbal, hob_lbam, and hob_lbah.
214 * This function waits for idle (!BUSY and !DRQ) after writing
215 * registers. If the control register has a new value, this
216 * function also waits for idle after writing control and before
217 * writing the remaining registers.
219 * May be used as the tf_load() entry in ata_port_operations.
222 * Inherited from caller.
224 void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
226 if (ap->flags & ATA_FLAG_MMIO)
227 ata_tf_load_mmio(ap, tf);
229 ata_tf_load_pio(ap, tf);
233 * ata_exec_command_pio - issue ATA command to host controller
234 * @ap: port to which command is being issued
235 * @tf: ATA taskfile register set
237 * Issues PIO write to ATA command register, with proper
238 * synchronization with interrupt handler / other threads.
241 * spin_lock_irqsave(host_set lock)
244 static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf)
246 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
248 outb(tf->command, ap->ioaddr.command_addr);
254 * ata_exec_command_mmio - issue ATA command to host controller
255 * @ap: port to which command is being issued
256 * @tf: ATA taskfile register set
258 * Issues MMIO write to ATA command register, with proper
259 * synchronization with interrupt handler / other threads.
262 * spin_lock_irqsave(host_set lock)
265 static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
267 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
269 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
275 * ata_exec_command - issue ATA command to host controller
276 * @ap: port to which command is being issued
277 * @tf: ATA taskfile register set
279 * Issues PIO/MMIO write to ATA command register, with proper
280 * synchronization with interrupt handler / other threads.
283 * spin_lock_irqsave(host_set lock)
285 void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
287 if (ap->flags & ATA_FLAG_MMIO)
288 ata_exec_command_mmio(ap, tf);
290 ata_exec_command_pio(ap, tf);
294 * ata_tf_to_host - issue ATA taskfile to host controller
295 * @ap: port to which command is being issued
296 * @tf: ATA taskfile register set
298 * Issues ATA taskfile register set to ATA host controller,
299 * with proper synchronization with interrupt handler and
303 * spin_lock_irqsave(host_set lock)
306 static inline void ata_tf_to_host(struct ata_port *ap,
307 const struct ata_taskfile *tf)
309 ap->ops->tf_load(ap, tf);
310 ap->ops->exec_command(ap, tf);
314 * ata_tf_read_pio - input device's ATA taskfile shadow registers
315 * @ap: Port from which input is read
316 * @tf: ATA taskfile register set for storing input
318 * Reads ATA taskfile registers for currently-selected device
322 * Inherited from caller.
325 static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
327 struct ata_ioports *ioaddr = &ap->ioaddr;
329 tf->command = ata_check_status(ap);
330 tf->feature = inb(ioaddr->error_addr);
331 tf->nsect = inb(ioaddr->nsect_addr);
332 tf->lbal = inb(ioaddr->lbal_addr);
333 tf->lbam = inb(ioaddr->lbam_addr);
334 tf->lbah = inb(ioaddr->lbah_addr);
335 tf->device = inb(ioaddr->device_addr);
337 if (tf->flags & ATA_TFLAG_LBA48) {
338 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
339 tf->hob_feature = inb(ioaddr->error_addr);
340 tf->hob_nsect = inb(ioaddr->nsect_addr);
341 tf->hob_lbal = inb(ioaddr->lbal_addr);
342 tf->hob_lbam = inb(ioaddr->lbam_addr);
343 tf->hob_lbah = inb(ioaddr->lbah_addr);
348 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
349 * @ap: Port from which input is read
350 * @tf: ATA taskfile register set for storing input
352 * Reads ATA taskfile registers for currently-selected device
356 * Inherited from caller.
359 static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
361 struct ata_ioports *ioaddr = &ap->ioaddr;
363 tf->command = ata_check_status(ap);
364 tf->feature = readb((void __iomem *)ioaddr->error_addr);
365 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
366 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
367 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
368 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
369 tf->device = readb((void __iomem *)ioaddr->device_addr);
371 if (tf->flags & ATA_TFLAG_LBA48) {
372 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
373 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
374 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
375 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
376 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
377 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
383 * ata_tf_read - input device's ATA taskfile shadow registers
384 * @ap: Port from which input is read
385 * @tf: ATA taskfile register set for storing input
387 * Reads ATA taskfile registers for currently-selected device
390 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
391 * is set, also reads the hob registers.
393 * May be used as the tf_read() entry in ata_port_operations.
396 * Inherited from caller.
398 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
400 if (ap->flags & ATA_FLAG_MMIO)
401 ata_tf_read_mmio(ap, tf);
403 ata_tf_read_pio(ap, tf);
407 * ata_check_status_pio - Read device status reg & clear interrupt
408 * @ap: port where the device is
410 * Reads ATA taskfile status register for currently-selected device
411 * and return its value. This also clears pending interrupts
415 * Inherited from caller.
417 static u8 ata_check_status_pio(struct ata_port *ap)
419 return inb(ap->ioaddr.status_addr);
423 * ata_check_status_mmio - Read device status reg & clear interrupt
424 * @ap: port where the device is
426 * Reads ATA taskfile status register for currently-selected device
427 * via MMIO and return its value. This also clears pending interrupts
431 * Inherited from caller.
433 static u8 ata_check_status_mmio(struct ata_port *ap)
435 return readb((void __iomem *) ap->ioaddr.status_addr);
440 * ata_check_status - Read device status reg & clear interrupt
441 * @ap: port where the device is
443 * Reads ATA taskfile status register for currently-selected device
444 * and return its value. This also clears pending interrupts
447 * May be used as the check_status() entry in ata_port_operations.
450 * Inherited from caller.
452 u8 ata_check_status(struct ata_port *ap)
454 if (ap->flags & ATA_FLAG_MMIO)
455 return ata_check_status_mmio(ap);
456 return ata_check_status_pio(ap);
461 * ata_altstatus - Read device alternate status reg
462 * @ap: port where the device is
464 * Reads ATA taskfile alternate status register for
465 * currently-selected device and return its value.
467 * Note: may NOT be used as the check_altstatus() entry in
468 * ata_port_operations.
471 * Inherited from caller.
473 u8 ata_altstatus(struct ata_port *ap)
475 if (ap->ops->check_altstatus)
476 return ap->ops->check_altstatus(ap);
478 if (ap->flags & ATA_FLAG_MMIO)
479 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
480 return inb(ap->ioaddr.altstatus_addr);
485 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
486 * @tf: Taskfile to convert
487 * @fis: Buffer into which data will output
488 * @pmp: Port multiplier port
490 * Converts a standard ATA taskfile to a Serial ATA
491 * FIS structure (Register - Host to Device).
494 * Inherited from caller.
497 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
499 fis[0] = 0x27; /* Register - Host to Device FIS */
500 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
501 bit 7 indicates Command FIS */
502 fis[2] = tf->command;
503 fis[3] = tf->feature;
510 fis[8] = tf->hob_lbal;
511 fis[9] = tf->hob_lbam;
512 fis[10] = tf->hob_lbah;
513 fis[11] = tf->hob_feature;
516 fis[13] = tf->hob_nsect;
527 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
528 * @fis: Buffer from which data will be input
529 * @tf: Taskfile to output
531 * Converts a serial ATA FIS structure to a standard ATA taskfile.
534 * Inherited from caller.
537 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
539 tf->command = fis[2]; /* status */
540 tf->feature = fis[3]; /* error */
547 tf->hob_lbal = fis[8];
548 tf->hob_lbam = fis[9];
549 tf->hob_lbah = fis[10];
552 tf->hob_nsect = fis[13];
555 static const u8 ata_rw_cmds[] = {
559 ATA_CMD_READ_MULTI_EXT,
560 ATA_CMD_WRITE_MULTI_EXT,
564 ATA_CMD_WRITE_MULTI_FUA_EXT,
568 ATA_CMD_PIO_READ_EXT,
569 ATA_CMD_PIO_WRITE_EXT,
582 ATA_CMD_WRITE_FUA_EXT
586 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
587 * @qc: command to examine and configure
589 * Examine the device configuration and tf->flags to calculate
590 * the proper read/write commands and protocol to use.
595 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
597 struct ata_taskfile *tf = &qc->tf;
598 struct ata_device *dev = qc->dev;
601 int index, fua, lba48, write;
603 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
604 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
605 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
607 if (dev->flags & ATA_DFLAG_PIO) {
608 tf->protocol = ATA_PROT_PIO;
609 index = dev->multi_count ? 0 : 8;
610 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
611 /* Unable to use DMA due to host limitation */
612 tf->protocol = ATA_PROT_PIO;
613 index = dev->multi_count ? 0 : 4;
615 tf->protocol = ATA_PROT_DMA;
619 cmd = ata_rw_cmds[index + fua + lba48 + write];
627 static const char * const xfer_mode_str[] = {
647 * ata_udma_string - convert UDMA bit offset to string
648 * @mask: mask of bits supported; only highest bit counts.
650 * Determine string which represents the highest speed
651 * (highest bit in @udma_mask).
657 * Constant C string representing highest speed listed in
658 * @udma_mask, or the constant C string "<n/a>".
661 static const char *ata_mode_string(unsigned int mask)
665 for (i = 7; i >= 0; i--)
668 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
671 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
678 return xfer_mode_str[i];
682 * ata_pio_devchk - PATA device presence detection
683 * @ap: ATA channel to examine
684 * @device: Device to examine (starting at zero)
686 * This technique was originally described in
687 * Hale Landis's ATADRVR (www.ata-atapi.com), and
688 * later found its way into the ATA/ATAPI spec.
690 * Write a pattern to the ATA shadow registers,
691 * and if a device is present, it will respond by
692 * correctly storing and echoing back the
693 * ATA shadow register contents.
699 static unsigned int ata_pio_devchk(struct ata_port *ap,
702 struct ata_ioports *ioaddr = &ap->ioaddr;
705 ap->ops->dev_select(ap, device);
707 outb(0x55, ioaddr->nsect_addr);
708 outb(0xaa, ioaddr->lbal_addr);
710 outb(0xaa, ioaddr->nsect_addr);
711 outb(0x55, ioaddr->lbal_addr);
713 outb(0x55, ioaddr->nsect_addr);
714 outb(0xaa, ioaddr->lbal_addr);
716 nsect = inb(ioaddr->nsect_addr);
717 lbal = inb(ioaddr->lbal_addr);
719 if ((nsect == 0x55) && (lbal == 0xaa))
720 return 1; /* we found a device */
722 return 0; /* nothing found */
726 * ata_mmio_devchk - PATA device presence detection
727 * @ap: ATA channel to examine
728 * @device: Device to examine (starting at zero)
730 * This technique was originally described in
731 * Hale Landis's ATADRVR (www.ata-atapi.com), and
732 * later found its way into the ATA/ATAPI spec.
734 * Write a pattern to the ATA shadow registers,
735 * and if a device is present, it will respond by
736 * correctly storing and echoing back the
737 * ATA shadow register contents.
743 static unsigned int ata_mmio_devchk(struct ata_port *ap,
746 struct ata_ioports *ioaddr = &ap->ioaddr;
749 ap->ops->dev_select(ap, device);
751 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
752 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
754 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
755 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
757 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
758 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
760 nsect = readb((void __iomem *) ioaddr->nsect_addr);
761 lbal = readb((void __iomem *) ioaddr->lbal_addr);
763 if ((nsect == 0x55) && (lbal == 0xaa))
764 return 1; /* we found a device */
766 return 0; /* nothing found */
770 * ata_devchk - PATA device presence detection
771 * @ap: ATA channel to examine
772 * @device: Device to examine (starting at zero)
774 * Dispatch ATA device presence detection, depending
775 * on whether we are using PIO or MMIO to talk to the
776 * ATA shadow registers.
782 static unsigned int ata_devchk(struct ata_port *ap,
785 if (ap->flags & ATA_FLAG_MMIO)
786 return ata_mmio_devchk(ap, device);
787 return ata_pio_devchk(ap, device);
791 * ata_dev_classify - determine device type based on ATA-spec signature
792 * @tf: ATA taskfile register set for device to be identified
794 * Determine from taskfile register contents whether a device is
795 * ATA or ATAPI, as per "Signature and persistence" section
796 * of ATA/PI spec (volume 1, sect 5.14).
802 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
803 * the event of failure.
806 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
808 /* Apple's open source Darwin code hints that some devices only
809 * put a proper signature into the LBA mid/high registers,
810 * So, we only check those. It's sufficient for uniqueness.
813 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
814 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
815 DPRINTK("found ATA device by sig\n");
819 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
820 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
821 DPRINTK("found ATAPI device by sig\n");
822 return ATA_DEV_ATAPI;
825 DPRINTK("unknown device\n");
826 return ATA_DEV_UNKNOWN;
830 * ata_dev_try_classify - Parse returned ATA device signature
831 * @ap: ATA channel to examine
832 * @device: Device to examine (starting at zero)
833 * @r_err: Value of error register on completion
835 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
836 * an ATA/ATAPI-defined set of values is placed in the ATA
837 * shadow registers, indicating the results of device detection
840 * Select the ATA device, and read the values from the ATA shadow
841 * registers. Then parse according to the Error register value,
842 * and the spec-defined values examined by ata_dev_classify().
848 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
852 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
854 struct ata_taskfile tf;
858 ap->ops->dev_select(ap, device);
860 memset(&tf, 0, sizeof(tf));
862 ap->ops->tf_read(ap, &tf);
867 /* see if device passed diags */
870 else if ((device == 0) && (err == 0x81))
875 /* determine if device is ATA or ATAPI */
876 class = ata_dev_classify(&tf);
878 if (class == ATA_DEV_UNKNOWN)
880 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
886 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
887 * @id: IDENTIFY DEVICE results we will examine
888 * @s: string into which data is output
889 * @ofs: offset into identify device page
890 * @len: length of string to return. must be an even number.
892 * The strings in the IDENTIFY DEVICE page are broken up into
893 * 16-bit chunks. Run through the string, and output each
894 * 8-bit chunk linearly, regardless of platform.
900 void ata_dev_id_string(const u16 *id, unsigned char *s,
901 unsigned int ofs, unsigned int len)
921 * ata_noop_dev_select - Select device 0/1 on ATA bus
922 * @ap: ATA channel to manipulate
923 * @device: ATA device (numbered from zero) to select
925 * This function performs no actual function.
927 * May be used as the dev_select() entry in ata_port_operations.
932 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
938 * ata_std_dev_select - Select device 0/1 on ATA bus
939 * @ap: ATA channel to manipulate
940 * @device: ATA device (numbered from zero) to select
942 * Use the method defined in the ATA specification to
943 * make either device 0, or device 1, active on the
944 * ATA channel. Works with both PIO and MMIO.
946 * May be used as the dev_select() entry in ata_port_operations.
952 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
957 tmp = ATA_DEVICE_OBS;
959 tmp = ATA_DEVICE_OBS | ATA_DEV1;
961 if (ap->flags & ATA_FLAG_MMIO) {
962 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
964 outb(tmp, ap->ioaddr.device_addr);
966 ata_pause(ap); /* needed; also flushes, for mmio */
970 * ata_dev_select - Select device 0/1 on ATA bus
971 * @ap: ATA channel to manipulate
972 * @device: ATA device (numbered from zero) to select
973 * @wait: non-zero to wait for Status register BSY bit to clear
974 * @can_sleep: non-zero if context allows sleeping
976 * Use the method defined in the ATA specification to
977 * make either device 0, or device 1, active on the
980 * This is a high-level version of ata_std_dev_select(),
981 * which additionally provides the services of inserting
982 * the proper pauses and status polling, where needed.
988 void ata_dev_select(struct ata_port *ap, unsigned int device,
989 unsigned int wait, unsigned int can_sleep)
991 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
992 ap->id, device, wait);
997 ap->ops->dev_select(ap, device);
1000 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
1007 * ata_dump_id - IDENTIFY DEVICE info debugging output
1008 * @dev: Device whose IDENTIFY DEVICE page we will dump
1010 * Dump selected 16-bit words from a detected device's
1011 * IDENTIFY PAGE page.
1017 static inline void ata_dump_id(const struct ata_device *dev)
1019 DPRINTK("49==0x%04x "
1029 DPRINTK("80==0x%04x "
1039 DPRINTK("88==0x%04x "
1046 * Compute the PIO modes available for this device. This is not as
1047 * trivial as it seems if we must consider early devices correctly.
1049 * FIXME: pre IDE drive timing (do we care ?).
1052 static unsigned int ata_pio_modes(const struct ata_device *adev)
1056 /* Usual case. Word 53 indicates word 64 is valid */
1057 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1058 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
1064 /* If word 64 isn't valid then Word 51 high byte holds the PIO timing
1065 number for the maximum. Turn it into a mask and return it */
1066 modes = (2 << ((adev->id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF)) - 1 ;
1068 /* But wait.. there's more. Design your standards by committee and
1069 you too can get a free iordy field to process. However its the
1070 speeds not the modes that are supported... Note drivers using the
1071 timing API will get this right anyway */
1075 ata_queue_packet_task(struct ata_port *ap)
1077 queue_work(ata_wq, &ap->packet_task);
1081 ata_queue_pio_task(struct ata_port *ap)
1083 queue_work(ata_wq, &ap->pio_task);
1087 ata_queue_delayed_pio_task(struct ata_port *ap, unsigned long delay)
1089 queue_delayed_work(ata_wq, &ap->pio_task, delay);
1092 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1094 struct completion *waiting = qc->private_data;
1096 qc->ap->ops->tf_read(qc->ap, &qc->tf);
1101 * ata_exec_internal - execute libata internal command
1102 * @ap: Port to which the command is sent
1103 * @dev: Device to which the command is sent
1104 * @tf: Taskfile registers for the command and the result
1105 * @dma_dir: Data tranfer direction of the command
1106 * @buf: Data buffer of the command
1107 * @buflen: Length of data buffer
1109 * Executes libata internal command with timeout. @tf contains
1110 * command on entry and result on return. Timeout and error
1111 * conditions are reported via return value. No recovery action
1112 * is taken after a command times out. It's caller's duty to
1113 * clean up after timeout.
1116 * None. Should be called with kernel context, might sleep.
1120 ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
1121 struct ata_taskfile *tf,
1122 int dma_dir, void *buf, unsigned int buflen)
1124 u8 command = tf->command;
1125 struct ata_queued_cmd *qc;
1126 DECLARE_COMPLETION(wait);
1127 unsigned long flags;
1128 unsigned int err_mask;
1130 spin_lock_irqsave(&ap->host_set->lock, flags);
1132 qc = ata_qc_new_init(ap, dev);
1136 qc->dma_dir = dma_dir;
1137 if (dma_dir != DMA_NONE) {
1138 ata_sg_init_one(qc, buf, buflen);
1139 qc->nsect = buflen / ATA_SECT_SIZE;
1142 qc->private_data = &wait;
1143 qc->complete_fn = ata_qc_complete_internal;
1145 qc->err_mask = ata_qc_issue(qc);
1147 ata_qc_complete(qc);
1149 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1151 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
1152 spin_lock_irqsave(&ap->host_set->lock, flags);
1154 /* We're racing with irq here. If we lose, the
1155 * following test prevents us from completing the qc
1156 * again. If completion irq occurs after here but
1157 * before the caller cleans up, it will result in a
1158 * spurious interrupt. We can live with that.
1160 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1161 qc->err_mask = AC_ERR_TIMEOUT;
1162 ata_qc_complete(qc);
1163 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1167 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1171 err_mask = qc->err_mask;
1179 * ata_pio_need_iordy - check if iordy needed
1182 * Check if the current speed of the device requires IORDY. Used
1183 * by various controllers for chip configuration.
1186 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1189 int speed = adev->pio_mode - XFER_PIO_0;
1196 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1198 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1199 pio = adev->id[ATA_ID_EIDE_PIO];
1200 /* Is the speed faster than the drive allows non IORDY ? */
1202 /* This is cycle times not frequency - watch the logic! */
1203 if (pio > 240) /* PIO2 is 240nS per cycle */
1212 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1213 * @ap: port on which device we wish to probe resides
1214 * @device: device bus address, starting at zero
1216 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1217 * command, and read back the 512-byte device information page.
1218 * The device information page is fed to us via the standard
1219 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1220 * using standard PIO-IN paths)
1222 * After reading the device information page, we use several
1223 * bits of information from it to initialize data structures
1224 * that will be used during the lifetime of the ata_device.
1225 * Other data from the info page is used to disqualify certain
1226 * older ATA devices we do not wish to support.
1229 * Inherited from caller. Some functions called by this function
1230 * obtain the host_set lock.
1233 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1235 struct ata_device *dev = &ap->device[device];
1236 unsigned int major_version;
1238 unsigned long xfer_modes;
1239 unsigned int using_edd;
1240 struct ata_taskfile tf;
1241 unsigned int err_mask;
1244 if (!ata_dev_present(dev)) {
1245 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1250 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1255 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1257 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1258 dev->class == ATA_DEV_NONE);
1260 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1263 ata_tf_init(ap, &tf, device);
1265 if (dev->class == ATA_DEV_ATA) {
1266 tf.command = ATA_CMD_ID_ATA;
1267 DPRINTK("do ATA identify\n");
1269 tf.command = ATA_CMD_ID_ATAPI;
1270 DPRINTK("do ATAPI identify\n");
1273 tf.protocol = ATA_PROT_PIO;
1275 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
1276 dev->id, sizeof(dev->id));
1279 if (err_mask & ~AC_ERR_DEV)
1283 * arg! EDD works for all test cases, but seems to return
1284 * the ATA signature for some ATAPI devices. Until the
1285 * reason for this is found and fixed, we fix up the mess
1286 * here. If IDENTIFY DEVICE returns command aborted
1287 * (as ATAPI devices do), then we issue an
1288 * IDENTIFY PACKET DEVICE.
1290 * ATA software reset (SRST, the default) does not appear
1291 * to have this problem.
1293 if ((using_edd) && (dev->class == ATA_DEV_ATA)) {
1294 u8 err = tf.feature;
1295 if (err & ATA_ABORTED) {
1296 dev->class = ATA_DEV_ATAPI;
1303 swap_buf_le16(dev->id, ATA_ID_WORDS);
1305 /* print device capabilities */
1306 printk(KERN_DEBUG "ata%u: dev %u cfg "
1307 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1308 ap->id, device, dev->id[49],
1309 dev->id[82], dev->id[83], dev->id[84],
1310 dev->id[85], dev->id[86], dev->id[87],
1314 * common ATA, ATAPI feature tests
1317 /* we require DMA support (bits 8 of word 49) */
1318 if (!ata_id_has_dma(dev->id)) {
1319 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1323 /* quick-n-dirty find max transfer mode; for printk only */
1324 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1326 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1328 xfer_modes = ata_pio_modes(dev);
1332 /* ATA-specific feature tests */
1333 if (dev->class == ATA_DEV_ATA) {
1334 if (!ata_id_is_ata(dev->id)) /* sanity check */
1337 /* get major version */
1338 tmp = dev->id[ATA_ID_MAJOR_VER];
1339 for (major_version = 14; major_version >= 1; major_version--)
1340 if (tmp & (1 << major_version))
1344 * The exact sequence expected by certain pre-ATA4 drives is:
1347 * INITIALIZE DEVICE PARAMETERS
1349 * Some drives were very specific about that exact sequence.
1351 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
1352 ata_dev_init_params(ap, dev);
1354 /* current CHS translation info (id[53-58]) might be
1355 * changed. reread the identify device info.
1357 ata_dev_reread_id(ap, dev);
1360 if (ata_id_has_lba(dev->id)) {
1361 dev->flags |= ATA_DFLAG_LBA;
1363 if (ata_id_has_lba48(dev->id)) {
1364 dev->flags |= ATA_DFLAG_LBA48;
1365 dev->n_sectors = ata_id_u64(dev->id, 100);
1367 dev->n_sectors = ata_id_u32(dev->id, 60);
1370 /* print device info to dmesg */
1371 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1374 ata_mode_string(xfer_modes),
1375 (unsigned long long)dev->n_sectors,
1376 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1380 /* Default translation */
1381 dev->cylinders = dev->id[1];
1382 dev->heads = dev->id[3];
1383 dev->sectors = dev->id[6];
1384 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1386 if (ata_id_current_chs_valid(dev->id)) {
1387 /* Current CHS translation is valid. */
1388 dev->cylinders = dev->id[54];
1389 dev->heads = dev->id[55];
1390 dev->sectors = dev->id[56];
1392 dev->n_sectors = ata_id_u32(dev->id, 57);
1395 /* print device info to dmesg */
1396 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1399 ata_mode_string(xfer_modes),
1400 (unsigned long long)dev->n_sectors,
1401 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1405 ap->host->max_cmd_len = 16;
1408 /* ATAPI-specific feature tests */
1409 else if (dev->class == ATA_DEV_ATAPI) {
1410 if (ata_id_is_ata(dev->id)) /* sanity check */
1413 rc = atapi_cdb_len(dev->id);
1414 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1415 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1418 ap->cdb_len = (unsigned int) rc;
1419 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1421 /* print device info to dmesg */
1422 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1424 ata_mode_string(xfer_modes));
1427 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1431 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1434 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1435 DPRINTK("EXIT, err\n");
1439 static inline u8 ata_dev_knobble(const struct ata_port *ap)
1441 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1445 * ata_dev_config - Run device specific handlers & check for SATA->PATA bridges
1452 void ata_dev_config(struct ata_port *ap, unsigned int i)
1454 /* limit bridge transfers to udma5, 200 sectors */
1455 if (ata_dev_knobble(ap)) {
1456 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1457 ap->id, ap->device->devno);
1458 ap->udma_mask &= ATA_UDMA5;
1459 ap->host->max_sectors = ATA_MAX_SECTORS;
1460 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1461 ap->device[i].flags |= ATA_DFLAG_LOCK_SECTORS;
1464 if (ap->ops->dev_config)
1465 ap->ops->dev_config(ap, &ap->device[i]);
1469 * ata_bus_probe - Reset and probe ATA bus
1472 * Master ATA bus probing function. Initiates a hardware-dependent
1473 * bus reset, then attempts to identify any devices found on
1477 * PCI/etc. bus probe sem.
1480 * Zero on success, non-zero on error.
1483 static int ata_bus_probe(struct ata_port *ap)
1485 unsigned int i, found = 0;
1487 if (ap->ops->probe_reset) {
1488 unsigned int classes[ATA_MAX_DEVICES];
1493 rc = ap->ops->probe_reset(ap, classes);
1495 for (i = 0; i < ATA_MAX_DEVICES; i++)
1496 ap->device[i].class = classes[i];
1498 printk(KERN_ERR "ata%u: probe reset failed, "
1499 "disabling port\n", ap->id);
1500 ata_port_disable(ap);
1503 ap->ops->phy_reset(ap);
1505 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1508 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1509 ata_dev_identify(ap, i);
1510 if (ata_dev_present(&ap->device[i])) {
1512 ata_dev_config(ap,i);
1516 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1517 goto err_out_disable;
1520 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1521 goto err_out_disable;
1526 ap->ops->port_disable(ap);
1532 * ata_port_probe - Mark port as enabled
1533 * @ap: Port for which we indicate enablement
1535 * Modify @ap data structure such that the system
1536 * thinks that the entire port is enabled.
1538 * LOCKING: host_set lock, or some other form of
1542 void ata_port_probe(struct ata_port *ap)
1544 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1548 * sata_print_link_status - Print SATA link status
1549 * @ap: SATA port to printk link status about
1551 * This function prints link speed and status of a SATA link.
1556 static void sata_print_link_status(struct ata_port *ap)
1561 if (!ap->ops->scr_read)
1564 sstatus = scr_read(ap, SCR_STATUS);
1566 if (sata_dev_present(ap)) {
1567 tmp = (sstatus >> 4) & 0xf;
1570 else if (tmp & (1 << 1))
1573 speed = "<unknown>";
1574 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1575 ap->id, speed, sstatus);
1577 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1583 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1584 * @ap: SATA port associated with target SATA PHY.
1586 * This function issues commands to standard SATA Sxxx
1587 * PHY registers, to wake up the phy (and device), and
1588 * clear any reset condition.
1591 * PCI/etc. bus probe sem.
1594 void __sata_phy_reset(struct ata_port *ap)
1597 unsigned long timeout = jiffies + (HZ * 5);
1599 if (ap->flags & ATA_FLAG_SATA_RESET) {
1600 /* issue phy wake/reset */
1601 scr_write_flush(ap, SCR_CONTROL, 0x301);
1602 /* Couldn't find anything in SATA I/II specs, but
1603 * AHCI-1.1 10.4.2 says at least 1 ms. */
1606 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1608 /* wait for phy to become ready, if necessary */
1611 sstatus = scr_read(ap, SCR_STATUS);
1612 if ((sstatus & 0xf) != 1)
1614 } while (time_before(jiffies, timeout));
1616 /* print link status */
1617 sata_print_link_status(ap);
1619 /* TODO: phy layer with polling, timeouts, etc. */
1620 if (sata_dev_present(ap))
1623 ata_port_disable(ap);
1625 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1628 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1629 ata_port_disable(ap);
1633 ap->cbl = ATA_CBL_SATA;
1637 * sata_phy_reset - Reset SATA bus.
1638 * @ap: SATA port associated with target SATA PHY.
1640 * This function resets the SATA bus, and then probes
1641 * the bus for devices.
1644 * PCI/etc. bus probe sem.
1647 void sata_phy_reset(struct ata_port *ap)
1649 __sata_phy_reset(ap);
1650 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1656 * ata_port_disable - Disable port.
1657 * @ap: Port to be disabled.
1659 * Modify @ap data structure such that the system
1660 * thinks that the entire port is disabled, and should
1661 * never attempt to probe or communicate with devices
1664 * LOCKING: host_set lock, or some other form of
1668 void ata_port_disable(struct ata_port *ap)
1670 ap->device[0].class = ATA_DEV_NONE;
1671 ap->device[1].class = ATA_DEV_NONE;
1672 ap->flags |= ATA_FLAG_PORT_DISABLED;
1676 * This mode timing computation functionality is ported over from
1677 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1680 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1681 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1682 * for PIO 5, which is a nonstandard extension and UDMA6, which
1683 * is currently supported only by Maxtor drives.
1686 static const struct ata_timing ata_timing[] = {
1688 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1689 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1690 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1691 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1693 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1694 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1695 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1697 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1699 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1700 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1701 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1703 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1704 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1705 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1707 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1708 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1709 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1711 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1712 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1713 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1715 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1720 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1721 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1723 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1725 q->setup = EZ(t->setup * 1000, T);
1726 q->act8b = EZ(t->act8b * 1000, T);
1727 q->rec8b = EZ(t->rec8b * 1000, T);
1728 q->cyc8b = EZ(t->cyc8b * 1000, T);
1729 q->active = EZ(t->active * 1000, T);
1730 q->recover = EZ(t->recover * 1000, T);
1731 q->cycle = EZ(t->cycle * 1000, T);
1732 q->udma = EZ(t->udma * 1000, UT);
1735 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1736 struct ata_timing *m, unsigned int what)
1738 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1739 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1740 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1741 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1742 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1743 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1744 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1745 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1748 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1750 const struct ata_timing *t;
1752 for (t = ata_timing; t->mode != speed; t++)
1753 if (t->mode == 0xFF)
1758 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1759 struct ata_timing *t, int T, int UT)
1761 const struct ata_timing *s;
1762 struct ata_timing p;
1768 if (!(s = ata_timing_find_mode(speed)))
1771 memcpy(t, s, sizeof(*s));
1774 * If the drive is an EIDE drive, it can tell us it needs extended
1775 * PIO/MW_DMA cycle timing.
1778 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1779 memset(&p, 0, sizeof(p));
1780 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1781 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1782 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1783 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1784 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1786 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1790 * Convert the timing to bus clock counts.
1793 ata_timing_quantize(t, t, T, UT);
1796 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1797 * S.M.A.R.T * and some other commands. We have to ensure that the
1798 * DMA cycle timing is slower/equal than the fastest PIO timing.
1801 if (speed > XFER_PIO_4) {
1802 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1803 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1807 * Lengthen active & recovery time so that cycle time is correct.
1810 if (t->act8b + t->rec8b < t->cyc8b) {
1811 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1812 t->rec8b = t->cyc8b - t->act8b;
1815 if (t->active + t->recover < t->cycle) {
1816 t->active += (t->cycle - (t->active + t->recover)) / 2;
1817 t->recover = t->cycle - t->active;
1823 static const struct {
1826 } xfer_mode_classes[] = {
1827 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1828 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1829 { ATA_SHIFT_PIO, XFER_PIO_0 },
1832 static u8 base_from_shift(unsigned int shift)
1836 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1837 if (xfer_mode_classes[i].shift == shift)
1838 return xfer_mode_classes[i].base;
1843 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1848 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1851 if (dev->xfer_shift == ATA_SHIFT_PIO)
1852 dev->flags |= ATA_DFLAG_PIO;
1854 ata_dev_set_xfermode(ap, dev);
1856 base = base_from_shift(dev->xfer_shift);
1857 ofs = dev->xfer_mode - base;
1858 idx = ofs + dev->xfer_shift;
1859 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1861 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1862 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1864 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1865 ap->id, dev->devno, xfer_mode_str[idx]);
1868 static int ata_host_set_pio(struct ata_port *ap)
1874 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1877 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1881 base = base_from_shift(ATA_SHIFT_PIO);
1882 xfer_mode = base + x;
1884 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1885 (int)base, (int)xfer_mode, mask, x);
1887 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1888 struct ata_device *dev = &ap->device[i];
1889 if (ata_dev_present(dev)) {
1890 dev->pio_mode = xfer_mode;
1891 dev->xfer_mode = xfer_mode;
1892 dev->xfer_shift = ATA_SHIFT_PIO;
1893 if (ap->ops->set_piomode)
1894 ap->ops->set_piomode(ap, dev);
1901 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1902 unsigned int xfer_shift)
1906 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1907 struct ata_device *dev = &ap->device[i];
1908 if (ata_dev_present(dev)) {
1909 dev->dma_mode = xfer_mode;
1910 dev->xfer_mode = xfer_mode;
1911 dev->xfer_shift = xfer_shift;
1912 if (ap->ops->set_dmamode)
1913 ap->ops->set_dmamode(ap, dev);
1919 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1920 * @ap: port on which timings will be programmed
1922 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1925 * PCI/etc. bus probe sem.
1927 static void ata_set_mode(struct ata_port *ap)
1929 unsigned int xfer_shift;
1933 /* step 1: always set host PIO timings */
1934 rc = ata_host_set_pio(ap);
1938 /* step 2: choose the best data xfer mode */
1939 xfer_mode = xfer_shift = 0;
1940 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1944 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1945 if (xfer_shift != ATA_SHIFT_PIO)
1946 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1948 /* step 4: update devices' xfer mode */
1949 ata_dev_set_mode(ap, &ap->device[0]);
1950 ata_dev_set_mode(ap, &ap->device[1]);
1952 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1955 if (ap->ops->post_set_mode)
1956 ap->ops->post_set_mode(ap);
1961 ata_port_disable(ap);
1965 * ata_busy_sleep - sleep until BSY clears, or timeout
1966 * @ap: port containing status register to be polled
1967 * @tmout_pat: impatience timeout
1968 * @tmout: overall timeout
1970 * Sleep until ATA Status register bit BSY clears,
1971 * or a timeout occurs.
1976 unsigned int ata_busy_sleep (struct ata_port *ap,
1977 unsigned long tmout_pat, unsigned long tmout)
1979 unsigned long timer_start, timeout;
1982 status = ata_busy_wait(ap, ATA_BUSY, 300);
1983 timer_start = jiffies;
1984 timeout = timer_start + tmout_pat;
1985 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1987 status = ata_busy_wait(ap, ATA_BUSY, 3);
1990 if (status & ATA_BUSY)
1991 printk(KERN_WARNING "ata%u is slow to respond, "
1992 "please be patient\n", ap->id);
1994 timeout = timer_start + tmout;
1995 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1997 status = ata_chk_status(ap);
2000 if (status & ATA_BUSY) {
2001 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
2002 ap->id, tmout / HZ);
2009 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2011 struct ata_ioports *ioaddr = &ap->ioaddr;
2012 unsigned int dev0 = devmask & (1 << 0);
2013 unsigned int dev1 = devmask & (1 << 1);
2014 unsigned long timeout;
2016 /* if device 0 was found in ata_devchk, wait for its
2020 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2022 /* if device 1 was found in ata_devchk, wait for
2023 * register access, then wait for BSY to clear
2025 timeout = jiffies + ATA_TMOUT_BOOT;
2029 ap->ops->dev_select(ap, 1);
2030 if (ap->flags & ATA_FLAG_MMIO) {
2031 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2032 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2034 nsect = inb(ioaddr->nsect_addr);
2035 lbal = inb(ioaddr->lbal_addr);
2037 if ((nsect == 1) && (lbal == 1))
2039 if (time_after(jiffies, timeout)) {
2043 msleep(50); /* give drive a breather */
2046 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2048 /* is all this really necessary? */
2049 ap->ops->dev_select(ap, 0);
2051 ap->ops->dev_select(ap, 1);
2053 ap->ops->dev_select(ap, 0);
2057 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
2058 * @ap: Port to reset and probe
2060 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
2061 * probe the bus. Not often used these days.
2064 * PCI/etc. bus probe sem.
2065 * Obtains host_set lock.
2069 static unsigned int ata_bus_edd(struct ata_port *ap)
2071 struct ata_taskfile tf;
2072 unsigned long flags;
2074 /* set up execute-device-diag (bus reset) taskfile */
2075 /* also, take interrupts to a known state (disabled) */
2076 DPRINTK("execute-device-diag\n");
2077 ata_tf_init(ap, &tf, 0);
2079 tf.command = ATA_CMD_EDD;
2080 tf.protocol = ATA_PROT_NODATA;
2083 spin_lock_irqsave(&ap->host_set->lock, flags);
2084 ata_tf_to_host(ap, &tf);
2085 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2087 /* spec says at least 2ms. but who knows with those
2088 * crazy ATAPI devices...
2092 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2095 static unsigned int ata_bus_softreset(struct ata_port *ap,
2096 unsigned int devmask)
2098 struct ata_ioports *ioaddr = &ap->ioaddr;
2100 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2102 /* software reset. causes dev0 to be selected */
2103 if (ap->flags & ATA_FLAG_MMIO) {
2104 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2105 udelay(20); /* FIXME: flush */
2106 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2107 udelay(20); /* FIXME: flush */
2108 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2110 outb(ap->ctl, ioaddr->ctl_addr);
2112 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2114 outb(ap->ctl, ioaddr->ctl_addr);
2117 /* spec mandates ">= 2ms" before checking status.
2118 * We wait 150ms, because that was the magic delay used for
2119 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2120 * between when the ATA command register is written, and then
2121 * status is checked. Because waiting for "a while" before
2122 * checking status is fine, post SRST, we perform this magic
2123 * delay here as well.
2127 ata_bus_post_reset(ap, devmask);
2133 * ata_bus_reset - reset host port and associated ATA channel
2134 * @ap: port to reset
2136 * This is typically the first time we actually start issuing
2137 * commands to the ATA channel. We wait for BSY to clear, then
2138 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2139 * result. Determine what devices, if any, are on the channel
2140 * by looking at the device 0/1 error register. Look at the signature
2141 * stored in each device's taskfile registers, to determine if
2142 * the device is ATA or ATAPI.
2145 * PCI/etc. bus probe sem.
2146 * Obtains host_set lock.
2149 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2152 void ata_bus_reset(struct ata_port *ap)
2154 struct ata_ioports *ioaddr = &ap->ioaddr;
2155 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2157 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
2159 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2161 /* determine if device 0/1 are present */
2162 if (ap->flags & ATA_FLAG_SATA_RESET)
2165 dev0 = ata_devchk(ap, 0);
2167 dev1 = ata_devchk(ap, 1);
2171 devmask |= (1 << 0);
2173 devmask |= (1 << 1);
2175 /* select device 0 again */
2176 ap->ops->dev_select(ap, 0);
2178 /* issue bus reset */
2179 if (ap->flags & ATA_FLAG_SRST)
2180 rc = ata_bus_softreset(ap, devmask);
2181 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
2182 /* set up device control */
2183 if (ap->flags & ATA_FLAG_MMIO)
2184 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2186 outb(ap->ctl, ioaddr->ctl_addr);
2187 rc = ata_bus_edd(ap);
2194 * determine by signature whether we have ATA or ATAPI devices
2196 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2197 if ((slave_possible) && (err != 0x81))
2198 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2200 /* re-enable interrupts */
2201 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2204 /* is double-select really necessary? */
2205 if (ap->device[1].class != ATA_DEV_NONE)
2206 ap->ops->dev_select(ap, 1);
2207 if (ap->device[0].class != ATA_DEV_NONE)
2208 ap->ops->dev_select(ap, 0);
2210 /* if no devices were detected, disable this port */
2211 if ((ap->device[0].class == ATA_DEV_NONE) &&
2212 (ap->device[1].class == ATA_DEV_NONE))
2215 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2216 /* set up device control for ATA_FLAG_SATA_RESET */
2217 if (ap->flags & ATA_FLAG_MMIO)
2218 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2220 outb(ap->ctl, ioaddr->ctl_addr);
2227 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2228 ap->ops->port_disable(ap);
2234 * ata_std_softreset - reset host port via ATA SRST
2235 * @ap: port to reset
2236 * @verbose: fail verbosely
2237 * @classes: resulting classes of attached devices
2239 * Reset host port using ATA SRST. This function is to be used
2240 * as standard callback for ata_drive_*_reset() functions.
2243 * Kernel thread context (may sleep)
2246 * 0 on success, -errno otherwise.
2248 int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2250 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2251 unsigned int devmask = 0, err_mask;
2256 /* determine if device 0/1 are present */
2257 if (ata_devchk(ap, 0))
2258 devmask |= (1 << 0);
2259 if (slave_possible && ata_devchk(ap, 1))
2260 devmask |= (1 << 1);
2262 /* devchk reports device presence without actual device on
2263 * most SATA controllers. Check SStatus and turn devmask off
2264 * if link is offline. Note that we should continue resetting
2265 * even when it seems like there's no device.
2267 if (ap->ops->scr_read && !sata_dev_present(ap))
2270 /* select device 0 again */
2271 ap->ops->dev_select(ap, 0);
2273 /* issue bus reset */
2274 DPRINTK("about to softreset, devmask=%x\n", devmask);
2275 err_mask = ata_bus_softreset(ap, devmask);
2278 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2281 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2286 /* determine by signature whether we have ATA or ATAPI devices */
2287 classes[0] = ata_dev_try_classify(ap, 0, &err);
2288 if (slave_possible && err != 0x81)
2289 classes[1] = ata_dev_try_classify(ap, 1, &err);
2291 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2296 * sata_std_hardreset - reset host port via SATA phy reset
2297 * @ap: port to reset
2298 * @verbose: fail verbosely
2299 * @class: resulting class of attached device
2301 * SATA phy-reset host port using DET bits of SControl register.
2302 * This function is to be used as standard callback for
2303 * ata_drive_*_reset().
2306 * Kernel thread context (may sleep)
2309 * 0 on success, -errno otherwise.
2311 int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2313 u32 sstatus, serror;
2314 unsigned long timeout = jiffies + (HZ * 5);
2318 /* Issue phy wake/reset */
2319 scr_write_flush(ap, SCR_CONTROL, 0x301);
2322 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2323 * 10.4.2 says at least 1 ms.
2327 scr_write_flush(ap, SCR_CONTROL, 0x300);
2329 /* Wait for phy to become ready, if necessary. */
2332 sstatus = scr_read(ap, SCR_STATUS);
2333 if ((sstatus & 0xf) != 1)
2335 } while (time_before(jiffies, timeout));
2338 serror = scr_read(ap, SCR_ERROR);
2339 scr_write(ap, SCR_ERROR, serror);
2341 /* TODO: phy layer with polling, timeouts, etc. */
2342 if (!sata_dev_present(ap)) {
2343 *class = ATA_DEV_NONE;
2344 DPRINTK("EXIT, link offline\n");
2348 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2350 printk(KERN_ERR "ata%u: COMRESET failed "
2351 "(device not ready)\n", ap->id);
2353 DPRINTK("EXIT, device not ready\n");
2357 *class = ata_dev_try_classify(ap, 0, NULL);
2359 DPRINTK("EXIT, class=%u\n", *class);
2364 * ata_std_postreset - standard postreset callback
2365 * @ap: the target ata_port
2366 * @classes: classes of attached devices
2368 * This function is invoked after a successful reset. Note that
2369 * the device might have been reset more than once using
2370 * different reset methods before postreset is invoked.
2371 * postreset is also reponsible for setting cable type.
2373 * This function is to be used as standard callback for
2374 * ata_drive_*_reset().
2377 * Kernel thread context (may sleep)
2379 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2383 /* set cable type */
2384 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2385 ap->cbl = ATA_CBL_SATA;
2387 /* print link status */
2388 if (ap->cbl == ATA_CBL_SATA)
2389 sata_print_link_status(ap);
2391 /* bail out if no device is present */
2392 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2393 DPRINTK("EXIT, no device\n");
2397 /* is double-select really necessary? */
2398 if (classes[0] != ATA_DEV_NONE)
2399 ap->ops->dev_select(ap, 1);
2400 if (classes[1] != ATA_DEV_NONE)
2401 ap->ops->dev_select(ap, 0);
2403 /* re-enable interrupts & set up device control */
2404 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2411 * ata_std_probe_reset - standard probe reset method
2412 * @ap: prot to perform probe-reset
2413 * @classes: resulting classes of attached devices
2415 * The stock off-the-shelf ->probe_reset method.
2418 * Kernel thread context (may sleep)
2421 * 0 on success, -errno otherwise.
2423 int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2425 ata_reset_fn_t hardreset;
2428 if (ap->cbl == ATA_CBL_SATA && ap->ops->scr_read)
2429 hardreset = sata_std_hardreset;
2431 return ata_drive_probe_reset(ap, ata_std_softreset, hardreset,
2432 ata_std_postreset, classes);
2435 static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2436 ata_postreset_fn_t postreset,
2437 unsigned int *classes)
2441 for (i = 0; i < ATA_MAX_DEVICES; i++)
2442 classes[i] = ATA_DEV_UNKNOWN;
2444 rc = reset(ap, 0, classes);
2448 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2449 * is complete and convert all ATA_DEV_UNKNOWN to
2452 for (i = 0; i < ATA_MAX_DEVICES; i++)
2453 if (classes[i] != ATA_DEV_UNKNOWN)
2456 if (i < ATA_MAX_DEVICES)
2457 for (i = 0; i < ATA_MAX_DEVICES; i++)
2458 if (classes[i] == ATA_DEV_UNKNOWN)
2459 classes[i] = ATA_DEV_NONE;
2462 postreset(ap, classes);
2464 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2468 * ata_drive_probe_reset - Perform probe reset with given methods
2469 * @ap: port to reset
2470 * @softreset: softreset method (can be NULL)
2471 * @hardreset: hardreset method (can be NULL)
2472 * @postreset: postreset method (can be NULL)
2473 * @classes: resulting classes of attached devices
2475 * Reset the specified port and classify attached devices using
2476 * given methods. This function prefers softreset but tries all
2477 * possible reset sequences to reset and classify devices. This
2478 * function is intended to be used for constructing ->probe_reset
2479 * callback by low level drivers.
2481 * Reset methods should follow the following rules.
2483 * - Return 0 on sucess, -errno on failure.
2484 * - If classification is supported, fill classes[] with
2485 * recognized class codes.
2486 * - If classification is not supported, leave classes[] alone.
2487 * - If verbose is non-zero, print error message on failure;
2488 * otherwise, shut up.
2491 * Kernel thread context (may sleep)
2494 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2495 * if classification fails, and any error code from reset
2498 int ata_drive_probe_reset(struct ata_port *ap,
2499 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2500 ata_postreset_fn_t postreset, unsigned int *classes)
2505 rc = do_probe_reset(ap, softreset, postreset, classes);
2513 rc = do_probe_reset(ap, hardreset, postreset, classes);
2514 if (rc == 0 || rc != -ENODEV)
2518 rc = do_probe_reset(ap, softreset, postreset, classes);
2523 static void ata_pr_blacklisted(const struct ata_port *ap,
2524 const struct ata_device *dev)
2526 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2527 ap->id, dev->devno);
2530 static const char * const ata_dma_blacklist [] = {
2549 "Toshiba CD-ROM XM-6202B",
2550 "TOSHIBA CD-ROM XM-1702BC",
2552 "E-IDE CD-ROM CR-840",
2555 "SAMSUNG CD-ROM SC-148C",
2556 "SAMSUNG CD-ROM SC",
2558 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2562 static int ata_dma_blacklisted(const struct ata_device *dev)
2564 unsigned char model_num[40];
2569 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2572 len = strnlen(s, sizeof(model_num));
2574 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2575 while ((len > 0) && (s[len - 1] == ' ')) {
2580 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2581 if (!strncmp(ata_dma_blacklist[i], s, len))
2587 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
2589 const struct ata_device *master, *slave;
2592 master = &ap->device[0];
2593 slave = &ap->device[1];
2595 assert (ata_dev_present(master) || ata_dev_present(slave));
2597 if (shift == ATA_SHIFT_UDMA) {
2598 mask = ap->udma_mask;
2599 if (ata_dev_present(master)) {
2600 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2601 if (ata_dma_blacklisted(master)) {
2603 ata_pr_blacklisted(ap, master);
2606 if (ata_dev_present(slave)) {
2607 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2608 if (ata_dma_blacklisted(slave)) {
2610 ata_pr_blacklisted(ap, slave);
2614 else if (shift == ATA_SHIFT_MWDMA) {
2615 mask = ap->mwdma_mask;
2616 if (ata_dev_present(master)) {
2617 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2618 if (ata_dma_blacklisted(master)) {
2620 ata_pr_blacklisted(ap, master);
2623 if (ata_dev_present(slave)) {
2624 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2625 if (ata_dma_blacklisted(slave)) {
2627 ata_pr_blacklisted(ap, slave);
2631 else if (shift == ATA_SHIFT_PIO) {
2632 mask = ap->pio_mask;
2633 if (ata_dev_present(master)) {
2634 /* spec doesn't return explicit support for
2635 * PIO0-2, so we fake it
2637 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2642 if (ata_dev_present(slave)) {
2643 /* spec doesn't return explicit support for
2644 * PIO0-2, so we fake it
2646 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2653 mask = 0xffffffff; /* shut up compiler warning */
2660 /* find greatest bit */
2661 static int fgb(u32 bitmap)
2666 for (i = 0; i < 32; i++)
2667 if (bitmap & (1 << i))
2674 * ata_choose_xfer_mode - attempt to find best transfer mode
2675 * @ap: Port for which an xfer mode will be selected
2676 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2677 * @xfer_shift_out: (output) bit shift that selects this mode
2679 * Based on host and device capabilities, determine the
2680 * maximum transfer mode that is amenable to all.
2683 * PCI/etc. bus probe sem.
2686 * Zero on success, negative on error.
2689 static int ata_choose_xfer_mode(const struct ata_port *ap,
2691 unsigned int *xfer_shift_out)
2693 unsigned int mask, shift;
2696 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2697 shift = xfer_mode_classes[i].shift;
2698 mask = ata_get_mode_mask(ap, shift);
2702 *xfer_mode_out = xfer_mode_classes[i].base + x;
2703 *xfer_shift_out = shift;
2712 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2713 * @ap: Port associated with device @dev
2714 * @dev: Device to which command will be sent
2716 * Issue SET FEATURES - XFER MODE command to device @dev
2720 * PCI/etc. bus probe sem.
2723 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2725 struct ata_taskfile tf;
2727 /* set up set-features taskfile */
2728 DPRINTK("set features - xfer mode\n");
2730 ata_tf_init(ap, &tf, dev->devno);
2731 tf.command = ATA_CMD_SET_FEATURES;
2732 tf.feature = SETFEATURES_XFER;
2733 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2734 tf.protocol = ATA_PROT_NODATA;
2735 tf.nsect = dev->xfer_mode;
2737 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2738 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2740 ata_port_disable(ap);
2747 * ata_dev_reread_id - Reread the device identify device info
2748 * @ap: port where the device is
2749 * @dev: device to reread the identify device info
2754 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2756 struct ata_taskfile tf;
2758 ata_tf_init(ap, &tf, dev->devno);
2760 if (dev->class == ATA_DEV_ATA) {
2761 tf.command = ATA_CMD_ID_ATA;
2762 DPRINTK("do ATA identify\n");
2764 tf.command = ATA_CMD_ID_ATAPI;
2765 DPRINTK("do ATAPI identify\n");
2768 tf.flags |= ATA_TFLAG_DEVICE;
2769 tf.protocol = ATA_PROT_PIO;
2771 if (ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
2772 dev->id, sizeof(dev->id)))
2775 swap_buf_le16(dev->id, ATA_ID_WORDS);
2783 printk(KERN_ERR "ata%u: failed to reread ID, disabled\n", ap->id);
2784 ata_port_disable(ap);
2788 * ata_dev_init_params - Issue INIT DEV PARAMS command
2789 * @ap: Port associated with device @dev
2790 * @dev: Device to which command will be sent
2795 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2797 struct ata_taskfile tf;
2798 u16 sectors = dev->id[6];
2799 u16 heads = dev->id[3];
2801 /* Number of sectors per track 1-255. Number of heads 1-16 */
2802 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2805 /* set up init dev params taskfile */
2806 DPRINTK("init dev params \n");
2808 ata_tf_init(ap, &tf, dev->devno);
2809 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2810 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2811 tf.protocol = ATA_PROT_NODATA;
2813 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2815 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2816 printk(KERN_ERR "ata%u: failed to init parameters, disabled\n",
2818 ata_port_disable(ap);
2825 * ata_sg_clean - Unmap DMA memory associated with command
2826 * @qc: Command containing DMA memory to be released
2828 * Unmap all mapped DMA memory associated with this command.
2831 * spin_lock_irqsave(host_set lock)
2834 static void ata_sg_clean(struct ata_queued_cmd *qc)
2836 struct ata_port *ap = qc->ap;
2837 struct scatterlist *sg = qc->__sg;
2838 int dir = qc->dma_dir;
2839 void *pad_buf = NULL;
2841 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2844 if (qc->flags & ATA_QCFLAG_SINGLE)
2845 assert(qc->n_elem == 1);
2847 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
2849 /* if we padded the buffer out to 32-bit bound, and data
2850 * xfer direction is from-device, we must copy from the
2851 * pad buffer back into the supplied buffer
2853 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2854 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2856 if (qc->flags & ATA_QCFLAG_SG) {
2858 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2859 /* restore last sg */
2860 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2862 struct scatterlist *psg = &qc->pad_sgent;
2863 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2864 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2865 kunmap_atomic(addr, KM_IRQ0);
2868 if (sg_dma_len(&sg[0]) > 0)
2869 dma_unmap_single(ap->host_set->dev,
2870 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2873 sg->length += qc->pad_len;
2875 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2876 pad_buf, qc->pad_len);
2879 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2884 * ata_fill_sg - Fill PCI IDE PRD table
2885 * @qc: Metadata associated with taskfile to be transferred
2887 * Fill PCI IDE PRD (scatter-gather) table with segments
2888 * associated with the current disk command.
2891 * spin_lock_irqsave(host_set lock)
2894 static void ata_fill_sg(struct ata_queued_cmd *qc)
2896 struct ata_port *ap = qc->ap;
2897 struct scatterlist *sg;
2900 assert(qc->__sg != NULL);
2901 assert(qc->n_elem > 0);
2904 ata_for_each_sg(sg, qc) {
2908 /* determine if physical DMA addr spans 64K boundary.
2909 * Note h/w doesn't support 64-bit, so we unconditionally
2910 * truncate dma_addr_t to u32.
2912 addr = (u32) sg_dma_address(sg);
2913 sg_len = sg_dma_len(sg);
2916 offset = addr & 0xffff;
2918 if ((offset + sg_len) > 0x10000)
2919 len = 0x10000 - offset;
2921 ap->prd[idx].addr = cpu_to_le32(addr);
2922 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2923 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2932 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2935 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2936 * @qc: Metadata associated with taskfile to check
2938 * Allow low-level driver to filter ATA PACKET commands, returning
2939 * a status indicating whether or not it is OK to use DMA for the
2940 * supplied PACKET command.
2943 * spin_lock_irqsave(host_set lock)
2945 * RETURNS: 0 when ATAPI DMA can be used
2948 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2950 struct ata_port *ap = qc->ap;
2951 int rc = 0; /* Assume ATAPI DMA is OK by default */
2953 if (ap->ops->check_atapi_dma)
2954 rc = ap->ops->check_atapi_dma(qc);
2959 * ata_qc_prep - Prepare taskfile for submission
2960 * @qc: Metadata associated with taskfile to be prepared
2962 * Prepare ATA taskfile for submission.
2965 * spin_lock_irqsave(host_set lock)
2967 void ata_qc_prep(struct ata_queued_cmd *qc)
2969 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2976 * ata_sg_init_one - Associate command with memory buffer
2977 * @qc: Command to be associated
2978 * @buf: Memory buffer
2979 * @buflen: Length of memory buffer, in bytes.
2981 * Initialize the data-related elements of queued_cmd @qc
2982 * to point to a single memory buffer, @buf of byte length @buflen.
2985 * spin_lock_irqsave(host_set lock)
2988 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2990 struct scatterlist *sg;
2992 qc->flags |= ATA_QCFLAG_SINGLE;
2994 memset(&qc->sgent, 0, sizeof(qc->sgent));
2995 qc->__sg = &qc->sgent;
2997 qc->orig_n_elem = 1;
3001 sg_init_one(sg, buf, buflen);
3005 * ata_sg_init - Associate command with scatter-gather table.
3006 * @qc: Command to be associated
3007 * @sg: Scatter-gather table.
3008 * @n_elem: Number of elements in s/g table.
3010 * Initialize the data-related elements of queued_cmd @qc
3011 * to point to a scatter-gather table @sg, containing @n_elem
3015 * spin_lock_irqsave(host_set lock)
3018 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3019 unsigned int n_elem)
3021 qc->flags |= ATA_QCFLAG_SG;
3023 qc->n_elem = n_elem;
3024 qc->orig_n_elem = n_elem;
3028 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3029 * @qc: Command with memory buffer to be mapped.
3031 * DMA-map the memory buffer associated with queued_cmd @qc.
3034 * spin_lock_irqsave(host_set lock)
3037 * Zero on success, negative on error.
3040 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3042 struct ata_port *ap = qc->ap;
3043 int dir = qc->dma_dir;
3044 struct scatterlist *sg = qc->__sg;
3045 dma_addr_t dma_address;
3047 /* we must lengthen transfers to end on a 32-bit boundary */
3048 qc->pad_len = sg->length & 3;
3050 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3051 struct scatterlist *psg = &qc->pad_sgent;
3053 assert(qc->dev->class == ATA_DEV_ATAPI);
3055 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3057 if (qc->tf.flags & ATA_TFLAG_WRITE)
3058 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3061 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3062 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3064 sg->length -= qc->pad_len;
3066 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3067 sg->length, qc->pad_len);
3071 sg_dma_address(sg) = 0;
3075 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
3077 if (dma_mapping_error(dma_address)) {
3079 sg->length += qc->pad_len;
3083 sg_dma_address(sg) = dma_address;
3085 sg_dma_len(sg) = sg->length;
3087 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3088 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3094 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3095 * @qc: Command with scatter-gather table to be mapped.
3097 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3100 * spin_lock_irqsave(host_set lock)
3103 * Zero on success, negative on error.
3107 static int ata_sg_setup(struct ata_queued_cmd *qc)
3109 struct ata_port *ap = qc->ap;
3110 struct scatterlist *sg = qc->__sg;
3111 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3112 int n_elem, pre_n_elem, dir, trim_sg = 0;
3114 VPRINTK("ENTER, ata%u\n", ap->id);
3115 assert(qc->flags & ATA_QCFLAG_SG);
3117 /* we must lengthen transfers to end on a 32-bit boundary */
3118 qc->pad_len = lsg->length & 3;
3120 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3121 struct scatterlist *psg = &qc->pad_sgent;
3122 unsigned int offset;
3124 assert(qc->dev->class == ATA_DEV_ATAPI);
3126 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3129 * psg->page/offset are used to copy to-be-written
3130 * data in this function or read data in ata_sg_clean.
3132 offset = lsg->offset + lsg->length - qc->pad_len;
3133 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3134 psg->offset = offset_in_page(offset);
3136 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3137 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3138 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3139 kunmap_atomic(addr, KM_IRQ0);
3142 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3143 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3145 lsg->length -= qc->pad_len;
3146 if (lsg->length == 0)
3149 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3150 qc->n_elem - 1, lsg->length, qc->pad_len);
3153 pre_n_elem = qc->n_elem;
3154 if (trim_sg && pre_n_elem)
3163 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
3165 /* restore last sg */
3166 lsg->length += qc->pad_len;
3170 DPRINTK("%d sg elements mapped\n", n_elem);
3173 qc->n_elem = n_elem;
3179 * ata_poll_qc_complete - turn irq back on and finish qc
3180 * @qc: Command to complete
3181 * @err_mask: ATA status register content
3184 * None. (grabs host lock)
3187 void ata_poll_qc_complete(struct ata_queued_cmd *qc)
3189 struct ata_port *ap = qc->ap;
3190 unsigned long flags;
3192 spin_lock_irqsave(&ap->host_set->lock, flags);
3193 ap->flags &= ~ATA_FLAG_NOINTR;
3195 ata_qc_complete(qc);
3196 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3200 * ata_pio_poll - poll using PIO, depending on current state
3201 * @ap: the target ata_port
3204 * None. (executing in kernel thread context)
3207 * timeout value to use
3210 static unsigned long ata_pio_poll(struct ata_port *ap)
3212 struct ata_queued_cmd *qc;
3214 unsigned int poll_state = HSM_ST_UNKNOWN;
3215 unsigned int reg_state = HSM_ST_UNKNOWN;
3217 qc = ata_qc_from_tag(ap, ap->active_tag);
3220 switch (ap->hsm_task_state) {
3223 poll_state = HSM_ST_POLL;
3227 case HSM_ST_LAST_POLL:
3228 poll_state = HSM_ST_LAST_POLL;
3229 reg_state = HSM_ST_LAST;
3236 status = ata_chk_status(ap);
3237 if (status & ATA_BUSY) {
3238 if (time_after(jiffies, ap->pio_task_timeout)) {
3239 qc->err_mask |= AC_ERR_TIMEOUT;
3240 ap->hsm_task_state = HSM_ST_TMOUT;
3243 ap->hsm_task_state = poll_state;
3244 return ATA_SHORT_PAUSE;
3247 ap->hsm_task_state = reg_state;
3252 * ata_pio_complete - check if drive is busy or idle
3253 * @ap: the target ata_port
3256 * None. (executing in kernel thread context)
3259 * Non-zero if qc completed, zero otherwise.
3262 static int ata_pio_complete (struct ata_port *ap)
3264 struct ata_queued_cmd *qc;
3268 * This is purely heuristic. This is a fast path. Sometimes when
3269 * we enter, BSY will be cleared in a chk-status or two. If not,
3270 * the drive is probably seeking or something. Snooze for a couple
3271 * msecs, then chk-status again. If still busy, fall back to
3272 * HSM_ST_POLL state.
3274 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3275 if (drv_stat & ATA_BUSY) {
3277 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3278 if (drv_stat & ATA_BUSY) {
3279 ap->hsm_task_state = HSM_ST_LAST_POLL;
3280 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3285 qc = ata_qc_from_tag(ap, ap->active_tag);
3288 drv_stat = ata_wait_idle(ap);
3289 if (!ata_ok(drv_stat)) {
3290 qc->err_mask |= __ac_err_mask(drv_stat);
3291 ap->hsm_task_state = HSM_ST_ERR;
3295 ap->hsm_task_state = HSM_ST_IDLE;
3297 assert(qc->err_mask == 0);
3298 ata_poll_qc_complete(qc);
3300 /* another command may start at this point */
3307 * swap_buf_le16 - swap halves of 16-bit words in place
3308 * @buf: Buffer to swap
3309 * @buf_words: Number of 16-bit words in buffer.
3311 * Swap halves of 16-bit words if needed to convert from
3312 * little-endian byte order to native cpu byte order, or
3316 * Inherited from caller.
3318 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3323 for (i = 0; i < buf_words; i++)
3324 buf[i] = le16_to_cpu(buf[i]);
3325 #endif /* __BIG_ENDIAN */
3329 * ata_mmio_data_xfer - Transfer data by MMIO
3330 * @ap: port to read/write
3332 * @buflen: buffer length
3333 * @write_data: read/write
3335 * Transfer data from/to the device data register by MMIO.
3338 * Inherited from caller.
3341 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3342 unsigned int buflen, int write_data)
3345 unsigned int words = buflen >> 1;
3346 u16 *buf16 = (u16 *) buf;
3347 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3349 /* Transfer multiple of 2 bytes */
3351 for (i = 0; i < words; i++)
3352 writew(le16_to_cpu(buf16[i]), mmio);
3354 for (i = 0; i < words; i++)
3355 buf16[i] = cpu_to_le16(readw(mmio));
3358 /* Transfer trailing 1 byte, if any. */
3359 if (unlikely(buflen & 0x01)) {
3360 u16 align_buf[1] = { 0 };
3361 unsigned char *trailing_buf = buf + buflen - 1;
3364 memcpy(align_buf, trailing_buf, 1);
3365 writew(le16_to_cpu(align_buf[0]), mmio);
3367 align_buf[0] = cpu_to_le16(readw(mmio));
3368 memcpy(trailing_buf, align_buf, 1);
3374 * ata_pio_data_xfer - Transfer data by PIO
3375 * @ap: port to read/write
3377 * @buflen: buffer length
3378 * @write_data: read/write
3380 * Transfer data from/to the device data register by PIO.
3383 * Inherited from caller.
3386 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3387 unsigned int buflen, int write_data)
3389 unsigned int words = buflen >> 1;
3391 /* Transfer multiple of 2 bytes */
3393 outsw(ap->ioaddr.data_addr, buf, words);
3395 insw(ap->ioaddr.data_addr, buf, words);
3397 /* Transfer trailing 1 byte, if any. */
3398 if (unlikely(buflen & 0x01)) {
3399 u16 align_buf[1] = { 0 };
3400 unsigned char *trailing_buf = buf + buflen - 1;
3403 memcpy(align_buf, trailing_buf, 1);
3404 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3406 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3407 memcpy(trailing_buf, align_buf, 1);
3413 * ata_data_xfer - Transfer data from/to the data register.
3414 * @ap: port to read/write
3416 * @buflen: buffer length
3417 * @do_write: read/write
3419 * Transfer data from/to the device data register.
3422 * Inherited from caller.
3425 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3426 unsigned int buflen, int do_write)
3428 /* Make the crap hardware pay the costs not the good stuff */
3429 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3430 unsigned long flags;
3431 local_irq_save(flags);
3432 if (ap->flags & ATA_FLAG_MMIO)
3433 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3435 ata_pio_data_xfer(ap, buf, buflen, do_write);
3436 local_irq_restore(flags);
3438 if (ap->flags & ATA_FLAG_MMIO)
3439 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3441 ata_pio_data_xfer(ap, buf, buflen, do_write);
3446 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3447 * @qc: Command on going
3449 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3452 * Inherited from caller.
3455 static void ata_pio_sector(struct ata_queued_cmd *qc)
3457 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3458 struct scatterlist *sg = qc->__sg;
3459 struct ata_port *ap = qc->ap;
3461 unsigned int offset;
3464 if (qc->cursect == (qc->nsect - 1))
3465 ap->hsm_task_state = HSM_ST_LAST;
3467 page = sg[qc->cursg].page;
3468 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3470 /* get the current page and offset */
3471 page = nth_page(page, (offset >> PAGE_SHIFT));
3472 offset %= PAGE_SIZE;
3474 buf = kmap(page) + offset;
3479 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3484 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3486 /* do the actual data transfer */
3487 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3488 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3494 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3495 * @qc: Command on going
3496 * @bytes: number of bytes
3498 * Transfer Transfer data from/to the ATAPI device.
3501 * Inherited from caller.
3505 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3507 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3508 struct scatterlist *sg = qc->__sg;
3509 struct ata_port *ap = qc->ap;
3512 unsigned int offset, count;
3514 if (qc->curbytes + bytes >= qc->nbytes)
3515 ap->hsm_task_state = HSM_ST_LAST;
3518 if (unlikely(qc->cursg >= qc->n_elem)) {
3520 * The end of qc->sg is reached and the device expects
3521 * more data to transfer. In order not to overrun qc->sg
3522 * and fulfill length specified in the byte count register,
3523 * - for read case, discard trailing data from the device
3524 * - for write case, padding zero data to the device
3526 u16 pad_buf[1] = { 0 };
3527 unsigned int words = bytes >> 1;
3530 if (words) /* warning if bytes > 1 */
3531 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3534 for (i = 0; i < words; i++)
3535 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3537 ap->hsm_task_state = HSM_ST_LAST;
3541 sg = &qc->__sg[qc->cursg];
3544 offset = sg->offset + qc->cursg_ofs;
3546 /* get the current page and offset */
3547 page = nth_page(page, (offset >> PAGE_SHIFT));
3548 offset %= PAGE_SIZE;
3550 /* don't overrun current sg */
3551 count = min(sg->length - qc->cursg_ofs, bytes);
3553 /* don't cross page boundaries */
3554 count = min(count, (unsigned int)PAGE_SIZE - offset);
3556 buf = kmap(page) + offset;
3559 qc->curbytes += count;
3560 qc->cursg_ofs += count;
3562 if (qc->cursg_ofs == sg->length) {
3567 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3569 /* do the actual data transfer */
3570 ata_data_xfer(ap, buf, count, do_write);
3579 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3580 * @qc: Command on going
3582 * Transfer Transfer data from/to the ATAPI device.
3585 * Inherited from caller.
3588 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3590 struct ata_port *ap = qc->ap;
3591 struct ata_device *dev = qc->dev;
3592 unsigned int ireason, bc_lo, bc_hi, bytes;
3593 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3595 ap->ops->tf_read(ap, &qc->tf);
3596 ireason = qc->tf.nsect;
3597 bc_lo = qc->tf.lbam;
3598 bc_hi = qc->tf.lbah;
3599 bytes = (bc_hi << 8) | bc_lo;
3601 /* shall be cleared to zero, indicating xfer of data */
3602 if (ireason & (1 << 0))
3605 /* make sure transfer direction matches expected */
3606 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3607 if (do_write != i_write)
3610 __atapi_pio_bytes(qc, bytes);
3615 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3616 ap->id, dev->devno);
3617 qc->err_mask |= AC_ERR_HSM;
3618 ap->hsm_task_state = HSM_ST_ERR;
3622 * ata_pio_block - start PIO on a block
3623 * @ap: the target ata_port
3626 * None. (executing in kernel thread context)
3629 static void ata_pio_block(struct ata_port *ap)
3631 struct ata_queued_cmd *qc;
3635 * This is purely heuristic. This is a fast path.
3636 * Sometimes when we enter, BSY will be cleared in
3637 * a chk-status or two. If not, the drive is probably seeking
3638 * or something. Snooze for a couple msecs, then
3639 * chk-status again. If still busy, fall back to
3640 * HSM_ST_POLL state.
3642 status = ata_busy_wait(ap, ATA_BUSY, 5);
3643 if (status & ATA_BUSY) {
3645 status = ata_busy_wait(ap, ATA_BUSY, 10);
3646 if (status & ATA_BUSY) {
3647 ap->hsm_task_state = HSM_ST_POLL;
3648 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3653 qc = ata_qc_from_tag(ap, ap->active_tag);
3657 if (status & (ATA_ERR | ATA_DF)) {
3658 qc->err_mask |= AC_ERR_DEV;
3659 ap->hsm_task_state = HSM_ST_ERR;
3663 /* transfer data if any */
3664 if (is_atapi_taskfile(&qc->tf)) {
3665 /* DRQ=0 means no more data to transfer */
3666 if ((status & ATA_DRQ) == 0) {
3667 ap->hsm_task_state = HSM_ST_LAST;
3671 atapi_pio_bytes(qc);
3673 /* handle BSY=0, DRQ=0 as error */
3674 if ((status & ATA_DRQ) == 0) {
3675 qc->err_mask |= AC_ERR_HSM;
3676 ap->hsm_task_state = HSM_ST_ERR;
3684 static void ata_pio_error(struct ata_port *ap)
3686 struct ata_queued_cmd *qc;
3688 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3690 qc = ata_qc_from_tag(ap, ap->active_tag);
3693 /* make sure qc->err_mask is available to
3694 * know what's wrong and recover
3696 assert(qc->err_mask);
3698 ap->hsm_task_state = HSM_ST_IDLE;
3700 ata_poll_qc_complete(qc);
3703 static void ata_pio_task(void *_data)
3705 struct ata_port *ap = _data;
3706 unsigned long timeout;
3713 switch (ap->hsm_task_state) {
3722 qc_completed = ata_pio_complete(ap);
3726 case HSM_ST_LAST_POLL:
3727 timeout = ata_pio_poll(ap);
3737 ata_queue_delayed_pio_task(ap, timeout);
3738 else if (!qc_completed)
3743 * ata_qc_timeout - Handle timeout of queued command
3744 * @qc: Command that timed out
3746 * Some part of the kernel (currently, only the SCSI layer)
3747 * has noticed that the active command on port @ap has not
3748 * completed after a specified length of time. Handle this
3749 * condition by disabling DMA (if necessary) and completing
3750 * transactions, with error if necessary.
3752 * This also handles the case of the "lost interrupt", where
3753 * for some reason (possibly hardware bug, possibly driver bug)
3754 * an interrupt was not delivered to the driver, even though the
3755 * transaction completed successfully.
3758 * Inherited from SCSI layer (none, can sleep)
3761 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3763 struct ata_port *ap = qc->ap;
3764 struct ata_host_set *host_set = ap->host_set;
3765 u8 host_stat = 0, drv_stat;
3766 unsigned long flags;
3770 spin_lock_irqsave(&host_set->lock, flags);
3772 switch (qc->tf.protocol) {
3775 case ATA_PROT_ATAPI_DMA:
3776 host_stat = ap->ops->bmdma_status(ap);
3778 /* before we do anything else, clear DMA-Start bit */
3779 ap->ops->bmdma_stop(qc);
3785 drv_stat = ata_chk_status(ap);
3787 /* ack bmdma irq events */
3788 ap->ops->irq_clear(ap);
3790 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3791 ap->id, qc->tf.command, drv_stat, host_stat);
3793 /* complete taskfile transaction */
3794 qc->err_mask |= ac_err_mask(drv_stat);
3798 spin_unlock_irqrestore(&host_set->lock, flags);
3800 ata_eh_qc_complete(qc);
3806 * ata_eng_timeout - Handle timeout of queued command
3807 * @ap: Port on which timed-out command is active
3809 * Some part of the kernel (currently, only the SCSI layer)
3810 * has noticed that the active command on port @ap has not
3811 * completed after a specified length of time. Handle this
3812 * condition by disabling DMA (if necessary) and completing
3813 * transactions, with error if necessary.
3815 * This also handles the case of the "lost interrupt", where
3816 * for some reason (possibly hardware bug, possibly driver bug)
3817 * an interrupt was not delivered to the driver, even though the
3818 * transaction completed successfully.
3821 * Inherited from SCSI layer (none, can sleep)
3824 void ata_eng_timeout(struct ata_port *ap)
3826 struct ata_queued_cmd *qc;
3830 qc = ata_qc_from_tag(ap, ap->active_tag);
3834 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3844 * ata_qc_new - Request an available ATA command, for queueing
3845 * @ap: Port associated with device @dev
3846 * @dev: Device from whom we request an available command structure
3852 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3854 struct ata_queued_cmd *qc = NULL;
3857 for (i = 0; i < ATA_MAX_QUEUE; i++)
3858 if (!test_and_set_bit(i, &ap->qactive)) {
3859 qc = ata_qc_from_tag(ap, i);
3870 * ata_qc_new_init - Request an available ATA command, and initialize it
3871 * @ap: Port associated with device @dev
3872 * @dev: Device from whom we request an available command structure
3878 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3879 struct ata_device *dev)
3881 struct ata_queued_cmd *qc;
3883 qc = ata_qc_new(ap);
3896 * ata_qc_free - free unused ata_queued_cmd
3897 * @qc: Command to complete
3899 * Designed to free unused ata_queued_cmd object
3900 * in case something prevents using it.
3903 * spin_lock_irqsave(host_set lock)
3905 void ata_qc_free(struct ata_queued_cmd *qc)
3907 struct ata_port *ap = qc->ap;
3910 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3914 if (likely(ata_tag_valid(tag))) {
3915 if (tag == ap->active_tag)
3916 ap->active_tag = ATA_TAG_POISON;
3917 qc->tag = ATA_TAG_POISON;
3918 clear_bit(tag, &ap->qactive);
3923 * ata_qc_complete - Complete an active ATA command
3924 * @qc: Command to complete
3925 * @err_mask: ATA Status register contents
3927 * Indicate to the mid and upper layers that an ATA
3928 * command has completed, with either an ok or not-ok status.
3931 * spin_lock_irqsave(host_set lock)
3934 void ata_qc_complete(struct ata_queued_cmd *qc)
3936 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3937 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3939 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3942 /* atapi: mark qc as inactive to prevent the interrupt handler
3943 * from completing the command twice later, before the error handler
3944 * is called. (when rc != 0 and atapi request sense is needed)
3946 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3948 /* call completion callback */
3949 qc->complete_fn(qc);
3952 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3954 struct ata_port *ap = qc->ap;
3956 switch (qc->tf.protocol) {
3958 case ATA_PROT_ATAPI_DMA:
3961 case ATA_PROT_ATAPI:
3963 case ATA_PROT_PIO_MULT:
3964 if (ap->flags & ATA_FLAG_PIO_DMA)
3977 * ata_qc_issue - issue taskfile to device
3978 * @qc: command to issue to device
3980 * Prepare an ATA command to submission to device.
3981 * This includes mapping the data into a DMA-able
3982 * area, filling in the S/G table, and finally
3983 * writing the taskfile to hardware, starting the command.
3986 * spin_lock_irqsave(host_set lock)
3989 * Zero on success, AC_ERR_* mask on failure
3992 unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
3994 struct ata_port *ap = qc->ap;
3996 if (ata_should_dma_map(qc)) {
3997 if (qc->flags & ATA_QCFLAG_SG) {
3998 if (ata_sg_setup(qc))
4000 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4001 if (ata_sg_setup_one(qc))
4005 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4008 ap->ops->qc_prep(qc);
4010 qc->ap->active_tag = qc->tag;
4011 qc->flags |= ATA_QCFLAG_ACTIVE;
4013 return ap->ops->qc_issue(qc);
4016 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4017 return AC_ERR_SYSTEM;
4022 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4023 * @qc: command to issue to device
4025 * Using various libata functions and hooks, this function
4026 * starts an ATA command. ATA commands are grouped into
4027 * classes called "protocols", and issuing each type of protocol
4028 * is slightly different.
4030 * May be used as the qc_issue() entry in ata_port_operations.
4033 * spin_lock_irqsave(host_set lock)
4036 * Zero on success, AC_ERR_* mask on failure
4039 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4041 struct ata_port *ap = qc->ap;
4043 ata_dev_select(ap, qc->dev->devno, 1, 0);
4045 switch (qc->tf.protocol) {
4046 case ATA_PROT_NODATA:
4047 ata_tf_to_host(ap, &qc->tf);
4051 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4052 ap->ops->bmdma_setup(qc); /* set up bmdma */
4053 ap->ops->bmdma_start(qc); /* initiate bmdma */
4056 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4057 ata_qc_set_polling(qc);
4058 ata_tf_to_host(ap, &qc->tf);
4059 ap->hsm_task_state = HSM_ST;
4060 ata_queue_pio_task(ap);
4063 case ATA_PROT_ATAPI:
4064 ata_qc_set_polling(qc);
4065 ata_tf_to_host(ap, &qc->tf);
4066 ata_queue_packet_task(ap);
4069 case ATA_PROT_ATAPI_NODATA:
4070 ap->flags |= ATA_FLAG_NOINTR;
4071 ata_tf_to_host(ap, &qc->tf);
4072 ata_queue_packet_task(ap);
4075 case ATA_PROT_ATAPI_DMA:
4076 ap->flags |= ATA_FLAG_NOINTR;
4077 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4078 ap->ops->bmdma_setup(qc); /* set up bmdma */
4079 ata_queue_packet_task(ap);
4084 return AC_ERR_SYSTEM;
4091 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
4092 * @qc: Info associated with this ATA transaction.
4095 * spin_lock_irqsave(host_set lock)
4098 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
4100 struct ata_port *ap = qc->ap;
4101 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4103 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4105 /* load PRD table addr. */
4106 mb(); /* make sure PRD table writes are visible to controller */
4107 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
4109 /* specify data direction, triple-check start bit is clear */
4110 dmactl = readb(mmio + ATA_DMA_CMD);
4111 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4113 dmactl |= ATA_DMA_WR;
4114 writeb(dmactl, mmio + ATA_DMA_CMD);
4116 /* issue r/w command */
4117 ap->ops->exec_command(ap, &qc->tf);
4121 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
4122 * @qc: Info associated with this ATA transaction.
4125 * spin_lock_irqsave(host_set lock)
4128 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
4130 struct ata_port *ap = qc->ap;
4131 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4134 /* start host DMA transaction */
4135 dmactl = readb(mmio + ATA_DMA_CMD);
4136 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
4138 /* Strictly, one may wish to issue a readb() here, to
4139 * flush the mmio write. However, control also passes
4140 * to the hardware at this point, and it will interrupt
4141 * us when we are to resume control. So, in effect,
4142 * we don't care when the mmio write flushes.
4143 * Further, a read of the DMA status register _immediately_
4144 * following the write may not be what certain flaky hardware
4145 * is expected, so I think it is best to not add a readb()
4146 * without first all the MMIO ATA cards/mobos.
4147 * Or maybe I'm just being paranoid.
4152 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
4153 * @qc: Info associated with this ATA transaction.
4156 * spin_lock_irqsave(host_set lock)
4159 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
4161 struct ata_port *ap = qc->ap;
4162 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4165 /* load PRD table addr. */
4166 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
4168 /* specify data direction, triple-check start bit is clear */
4169 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4170 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4172 dmactl |= ATA_DMA_WR;
4173 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4175 /* issue r/w command */
4176 ap->ops->exec_command(ap, &qc->tf);
4180 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
4181 * @qc: Info associated with this ATA transaction.
4184 * spin_lock_irqsave(host_set lock)
4187 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
4189 struct ata_port *ap = qc->ap;
4192 /* start host DMA transaction */
4193 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4194 outb(dmactl | ATA_DMA_START,
4195 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4200 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
4201 * @qc: Info associated with this ATA transaction.
4203 * Writes the ATA_DMA_START flag to the DMA command register.
4205 * May be used as the bmdma_start() entry in ata_port_operations.
4208 * spin_lock_irqsave(host_set lock)
4210 void ata_bmdma_start(struct ata_queued_cmd *qc)
4212 if (qc->ap->flags & ATA_FLAG_MMIO)
4213 ata_bmdma_start_mmio(qc);
4215 ata_bmdma_start_pio(qc);
4220 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
4221 * @qc: Info associated with this ATA transaction.
4223 * Writes address of PRD table to device's PRD Table Address
4224 * register, sets the DMA control register, and calls
4225 * ops->exec_command() to start the transfer.
4227 * May be used as the bmdma_setup() entry in ata_port_operations.
4230 * spin_lock_irqsave(host_set lock)
4232 void ata_bmdma_setup(struct ata_queued_cmd *qc)
4234 if (qc->ap->flags & ATA_FLAG_MMIO)
4235 ata_bmdma_setup_mmio(qc);
4237 ata_bmdma_setup_pio(qc);
4242 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
4243 * @ap: Port associated with this ATA transaction.
4245 * Clear interrupt and error flags in DMA status register.
4247 * May be used as the irq_clear() entry in ata_port_operations.
4250 * spin_lock_irqsave(host_set lock)
4253 void ata_bmdma_irq_clear(struct ata_port *ap)
4255 if (ap->flags & ATA_FLAG_MMIO) {
4256 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
4257 writeb(readb(mmio), mmio);
4259 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
4260 outb(inb(addr), addr);
4267 * ata_bmdma_status - Read PCI IDE BMDMA status
4268 * @ap: Port associated with this ATA transaction.
4270 * Read and return BMDMA status register.
4272 * May be used as the bmdma_status() entry in ata_port_operations.
4275 * spin_lock_irqsave(host_set lock)
4278 u8 ata_bmdma_status(struct ata_port *ap)
4281 if (ap->flags & ATA_FLAG_MMIO) {
4282 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4283 host_stat = readb(mmio + ATA_DMA_STATUS);
4285 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
4291 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
4292 * @qc: Command we are ending DMA for
4294 * Clears the ATA_DMA_START flag in the dma control register
4296 * May be used as the bmdma_stop() entry in ata_port_operations.
4299 * spin_lock_irqsave(host_set lock)
4302 void ata_bmdma_stop(struct ata_queued_cmd *qc)
4304 struct ata_port *ap = qc->ap;
4305 if (ap->flags & ATA_FLAG_MMIO) {
4306 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4308 /* clear start/stop bit */
4309 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
4310 mmio + ATA_DMA_CMD);
4312 /* clear start/stop bit */
4313 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4314 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4317 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4318 ata_altstatus(ap); /* dummy read */
4322 * ata_host_intr - Handle host interrupt for given (port, task)
4323 * @ap: Port on which interrupt arrived (possibly...)
4324 * @qc: Taskfile currently active in engine
4326 * Handle host interrupt for given queued command. Currently,
4327 * only DMA interrupts are handled. All other commands are
4328 * handled via polling with interrupts disabled (nIEN bit).
4331 * spin_lock_irqsave(host_set lock)
4334 * One if interrupt was handled, zero if not (shared irq).
4337 inline unsigned int ata_host_intr (struct ata_port *ap,
4338 struct ata_queued_cmd *qc)
4340 u8 status, host_stat;
4342 switch (qc->tf.protocol) {
4345 case ATA_PROT_ATAPI_DMA:
4346 case ATA_PROT_ATAPI:
4347 /* check status of DMA engine */
4348 host_stat = ap->ops->bmdma_status(ap);
4349 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4351 /* if it's not our irq... */
4352 if (!(host_stat & ATA_DMA_INTR))
4355 /* before we do anything else, clear DMA-Start bit */
4356 ap->ops->bmdma_stop(qc);
4360 case ATA_PROT_ATAPI_NODATA:
4361 case ATA_PROT_NODATA:
4362 /* check altstatus */
4363 status = ata_altstatus(ap);
4364 if (status & ATA_BUSY)
4367 /* check main status, clearing INTRQ */
4368 status = ata_chk_status(ap);
4369 if (unlikely(status & ATA_BUSY))
4371 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4372 ap->id, qc->tf.protocol, status);
4374 /* ack bmdma irq events */
4375 ap->ops->irq_clear(ap);
4377 /* complete taskfile transaction */
4378 qc->err_mask |= ac_err_mask(status);
4379 ata_qc_complete(qc);
4386 return 1; /* irq handled */
4389 ap->stats.idle_irq++;
4392 if ((ap->stats.idle_irq % 1000) == 0) {
4394 ata_irq_ack(ap, 0); /* debug trap */
4395 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4398 return 0; /* irq not handled */
4402 * ata_interrupt - Default ATA host interrupt handler
4403 * @irq: irq line (unused)
4404 * @dev_instance: pointer to our ata_host_set information structure
4407 * Default interrupt handler for PCI IDE devices. Calls
4408 * ata_host_intr() for each port that is not disabled.
4411 * Obtains host_set lock during operation.
4414 * IRQ_NONE or IRQ_HANDLED.
4417 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4419 struct ata_host_set *host_set = dev_instance;
4421 unsigned int handled = 0;
4422 unsigned long flags;
4424 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4425 spin_lock_irqsave(&host_set->lock, flags);
4427 for (i = 0; i < host_set->n_ports; i++) {
4428 struct ata_port *ap;
4430 ap = host_set->ports[i];
4432 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
4433 struct ata_queued_cmd *qc;
4435 qc = ata_qc_from_tag(ap, ap->active_tag);
4436 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4437 (qc->flags & ATA_QCFLAG_ACTIVE))
4438 handled |= ata_host_intr(ap, qc);
4442 spin_unlock_irqrestore(&host_set->lock, flags);
4444 return IRQ_RETVAL(handled);
4448 * atapi_packet_task - Write CDB bytes to hardware
4449 * @_data: Port to which ATAPI device is attached.
4451 * When device has indicated its readiness to accept
4452 * a CDB, this function is called. Send the CDB.
4453 * If DMA is to be performed, exit immediately.
4454 * Otherwise, we are in polling mode, so poll
4455 * status under operation succeeds or fails.
4458 * Kernel thread context (may sleep)
4461 static void atapi_packet_task(void *_data)
4463 struct ata_port *ap = _data;
4464 struct ata_queued_cmd *qc;
4467 qc = ata_qc_from_tag(ap, ap->active_tag);
4469 assert(qc->flags & ATA_QCFLAG_ACTIVE);
4471 /* sleep-wait for BSY to clear */
4472 DPRINTK("busy wait\n");
4473 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
4474 qc->err_mask |= AC_ERR_TIMEOUT;
4478 /* make sure DRQ is set */
4479 status = ata_chk_status(ap);
4480 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
4481 qc->err_mask |= AC_ERR_HSM;
4486 DPRINTK("send cdb\n");
4487 assert(ap->cdb_len >= 12);
4489 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4490 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4491 unsigned long flags;
4493 /* Once we're done issuing command and kicking bmdma,
4494 * irq handler takes over. To not lose irq, we need
4495 * to clear NOINTR flag before sending cdb, but
4496 * interrupt handler shouldn't be invoked before we're
4497 * finished. Hence, the following locking.
4499 spin_lock_irqsave(&ap->host_set->lock, flags);
4500 ap->flags &= ~ATA_FLAG_NOINTR;
4501 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4502 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4503 ap->ops->bmdma_start(qc); /* initiate bmdma */
4504 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4506 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4508 /* PIO commands are handled by polling */
4509 ap->hsm_task_state = HSM_ST;
4510 ata_queue_pio_task(ap);
4516 ata_poll_qc_complete(qc);
4521 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4522 * without filling any other registers
4524 static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4527 struct ata_taskfile tf;
4530 ata_tf_init(ap, &tf, dev->devno);
4533 tf.flags |= ATA_TFLAG_DEVICE;
4534 tf.protocol = ATA_PROT_NODATA;
4536 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4538 printk(KERN_ERR "%s: ata command failed: %d\n",
4544 static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4548 if (!ata_try_flush_cache(dev))
4551 if (ata_id_has_flush_ext(dev->id))
4552 cmd = ATA_CMD_FLUSH_EXT;
4554 cmd = ATA_CMD_FLUSH;
4556 return ata_do_simple_cmd(ap, dev, cmd);
4559 static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4561 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4564 static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4566 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4570 * ata_device_resume - wakeup a previously suspended devices
4571 * @ap: port the device is connected to
4572 * @dev: the device to resume
4574 * Kick the drive back into action, by sending it an idle immediate
4575 * command and making sure its transfer mode matches between drive
4579 int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4581 if (ap->flags & ATA_FLAG_SUSPENDED) {
4582 ap->flags &= ~ATA_FLAG_SUSPENDED;
4585 if (!ata_dev_present(dev))
4587 if (dev->class == ATA_DEV_ATA)
4588 ata_start_drive(ap, dev);
4594 * ata_device_suspend - prepare a device for suspend
4595 * @ap: port the device is connected to
4596 * @dev: the device to suspend
4598 * Flush the cache on the drive, if appropriate, then issue a
4599 * standbynow command.
4601 int ata_device_suspend(struct ata_port *ap, struct ata_device *dev)
4603 if (!ata_dev_present(dev))
4605 if (dev->class == ATA_DEV_ATA)
4606 ata_flush_cache(ap, dev);
4608 ata_standby_drive(ap, dev);
4609 ap->flags |= ATA_FLAG_SUSPENDED;
4614 * ata_port_start - Set port up for dma.
4615 * @ap: Port to initialize
4617 * Called just after data structures for each port are
4618 * initialized. Allocates space for PRD table.
4620 * May be used as the port_start() entry in ata_port_operations.
4623 * Inherited from caller.
4626 int ata_port_start (struct ata_port *ap)
4628 struct device *dev = ap->host_set->dev;
4631 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4635 rc = ata_pad_alloc(ap, dev);
4637 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4641 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4648 * ata_port_stop - Undo ata_port_start()
4649 * @ap: Port to shut down
4651 * Frees the PRD table.
4653 * May be used as the port_stop() entry in ata_port_operations.
4656 * Inherited from caller.
4659 void ata_port_stop (struct ata_port *ap)
4661 struct device *dev = ap->host_set->dev;
4663 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4664 ata_pad_free(ap, dev);
4667 void ata_host_stop (struct ata_host_set *host_set)
4669 if (host_set->mmio_base)
4670 iounmap(host_set->mmio_base);
4675 * ata_host_remove - Unregister SCSI host structure with upper layers
4676 * @ap: Port to unregister
4677 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4680 * Inherited from caller.
4683 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4685 struct Scsi_Host *sh = ap->host;
4690 scsi_remove_host(sh);
4692 ap->ops->port_stop(ap);
4696 * ata_host_init - Initialize an ata_port structure
4697 * @ap: Structure to initialize
4698 * @host: associated SCSI mid-layer structure
4699 * @host_set: Collection of hosts to which @ap belongs
4700 * @ent: Probe information provided by low-level driver
4701 * @port_no: Port number associated with this ata_port
4703 * Initialize a new ata_port structure, and its associated
4707 * Inherited from caller.
4710 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4711 struct ata_host_set *host_set,
4712 const struct ata_probe_ent *ent, unsigned int port_no)
4718 host->max_channel = 1;
4719 host->unique_id = ata_unique_id++;
4720 host->max_cmd_len = 12;
4722 ap->flags = ATA_FLAG_PORT_DISABLED;
4723 ap->id = host->unique_id;
4725 ap->ctl = ATA_DEVCTL_OBS;
4726 ap->host_set = host_set;
4727 ap->port_no = port_no;
4729 ent->legacy_mode ? ent->hard_port_no : port_no;
4730 ap->pio_mask = ent->pio_mask;
4731 ap->mwdma_mask = ent->mwdma_mask;
4732 ap->udma_mask = ent->udma_mask;
4733 ap->flags |= ent->host_flags;
4734 ap->ops = ent->port_ops;
4735 ap->cbl = ATA_CBL_NONE;
4736 ap->active_tag = ATA_TAG_POISON;
4737 ap->last_ctl = 0xFF;
4739 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4740 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4741 INIT_LIST_HEAD(&ap->eh_done_q);
4743 for (i = 0; i < ATA_MAX_DEVICES; i++)
4744 ap->device[i].devno = i;
4747 ap->stats.unhandled_irq = 1;
4748 ap->stats.idle_irq = 1;
4751 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4755 * ata_host_add - Attach low-level ATA driver to system
4756 * @ent: Information provided by low-level driver
4757 * @host_set: Collections of ports to which we add
4758 * @port_no: Port number associated with this host
4760 * Attach low-level ATA driver to system.
4763 * PCI/etc. bus probe sem.
4766 * New ata_port on success, for NULL on error.
4769 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4770 struct ata_host_set *host_set,
4771 unsigned int port_no)
4773 struct Scsi_Host *host;
4774 struct ata_port *ap;
4778 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4782 ap = (struct ata_port *) &host->hostdata[0];
4784 ata_host_init(ap, host, host_set, ent, port_no);
4786 rc = ap->ops->port_start(ap);
4793 scsi_host_put(host);
4798 * ata_device_add - Register hardware device with ATA and SCSI layers
4799 * @ent: Probe information describing hardware device to be registered
4801 * This function processes the information provided in the probe
4802 * information struct @ent, allocates the necessary ATA and SCSI
4803 * host information structures, initializes them, and registers
4804 * everything with requisite kernel subsystems.
4806 * This function requests irqs, probes the ATA bus, and probes
4810 * PCI/etc. bus probe sem.
4813 * Number of ports registered. Zero on error (no ports registered).
4816 int ata_device_add(const struct ata_probe_ent *ent)
4818 unsigned int count = 0, i;
4819 struct device *dev = ent->dev;
4820 struct ata_host_set *host_set;
4823 /* alloc a container for our list of ATA ports (buses) */
4824 host_set = kzalloc(sizeof(struct ata_host_set) +
4825 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4828 spin_lock_init(&host_set->lock);
4830 host_set->dev = dev;
4831 host_set->n_ports = ent->n_ports;
4832 host_set->irq = ent->irq;
4833 host_set->mmio_base = ent->mmio_base;
4834 host_set->private_data = ent->private_data;
4835 host_set->ops = ent->port_ops;
4837 /* register each port bound to this device */
4838 for (i = 0; i < ent->n_ports; i++) {
4839 struct ata_port *ap;
4840 unsigned long xfer_mode_mask;
4842 ap = ata_host_add(ent, host_set, i);
4846 host_set->ports[i] = ap;
4847 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4848 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4849 (ap->pio_mask << ATA_SHIFT_PIO);
4851 /* print per-port info to dmesg */
4852 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4853 "bmdma 0x%lX irq %lu\n",
4855 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4856 ata_mode_string(xfer_mode_mask),
4857 ap->ioaddr.cmd_addr,
4858 ap->ioaddr.ctl_addr,
4859 ap->ioaddr.bmdma_addr,
4863 host_set->ops->irq_clear(ap);
4870 /* obtain irq, that is shared between channels */
4871 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4872 DRV_NAME, host_set))
4875 /* perform each probe synchronously */
4876 DPRINTK("probe begin\n");
4877 for (i = 0; i < count; i++) {
4878 struct ata_port *ap;
4881 ap = host_set->ports[i];
4883 DPRINTK("ata%u: bus probe begin\n", ap->id);
4884 rc = ata_bus_probe(ap);
4885 DPRINTK("ata%u: bus probe end\n", ap->id);
4888 /* FIXME: do something useful here?
4889 * Current libata behavior will
4890 * tear down everything when
4891 * the module is removed
4892 * or the h/w is unplugged.
4896 rc = scsi_add_host(ap->host, dev);
4898 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4900 /* FIXME: do something useful here */
4901 /* FIXME: handle unconditional calls to
4902 * scsi_scan_host and ata_host_remove, below,
4908 /* probes are done, now scan each port's disk(s) */
4909 DPRINTK("host probe begin\n");
4910 for (i = 0; i < count; i++) {
4911 struct ata_port *ap = host_set->ports[i];
4913 ata_scsi_scan_host(ap);
4916 dev_set_drvdata(dev, host_set);
4918 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4919 return ent->n_ports; /* success */
4922 for (i = 0; i < count; i++) {
4923 ata_host_remove(host_set->ports[i], 1);
4924 scsi_host_put(host_set->ports[i]->host);
4928 VPRINTK("EXIT, returning 0\n");
4933 * ata_host_set_remove - PCI layer callback for device removal
4934 * @host_set: ATA host set that was removed
4936 * Unregister all objects associated with this host set. Free those
4940 * Inherited from calling layer (may sleep).
4943 void ata_host_set_remove(struct ata_host_set *host_set)
4945 struct ata_port *ap;
4948 for (i = 0; i < host_set->n_ports; i++) {
4949 ap = host_set->ports[i];
4950 scsi_remove_host(ap->host);
4953 free_irq(host_set->irq, host_set);
4955 for (i = 0; i < host_set->n_ports; i++) {
4956 ap = host_set->ports[i];
4958 ata_scsi_release(ap->host);
4960 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4961 struct ata_ioports *ioaddr = &ap->ioaddr;
4963 if (ioaddr->cmd_addr == 0x1f0)
4964 release_region(0x1f0, 8);
4965 else if (ioaddr->cmd_addr == 0x170)
4966 release_region(0x170, 8);
4969 scsi_host_put(ap->host);
4972 if (host_set->ops->host_stop)
4973 host_set->ops->host_stop(host_set);
4979 * ata_scsi_release - SCSI layer callback hook for host unload
4980 * @host: libata host to be unloaded
4982 * Performs all duties necessary to shut down a libata port...
4983 * Kill port kthread, disable port, and release resources.
4986 * Inherited from SCSI layer.
4992 int ata_scsi_release(struct Scsi_Host *host)
4994 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4998 ap->ops->port_disable(ap);
4999 ata_host_remove(ap, 0);
5006 * ata_std_ports - initialize ioaddr with standard port offsets.
5007 * @ioaddr: IO address structure to be initialized
5009 * Utility function which initializes data_addr, error_addr,
5010 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5011 * device_addr, status_addr, and command_addr to standard offsets
5012 * relative to cmd_addr.
5014 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5017 void ata_std_ports(struct ata_ioports *ioaddr)
5019 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5020 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5021 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5022 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5023 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5024 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5025 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5026 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5027 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5028 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5031 static struct ata_probe_ent *
5032 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5034 struct ata_probe_ent *probe_ent;
5036 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
5038 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5039 kobject_name(&(dev->kobj)));
5043 INIT_LIST_HEAD(&probe_ent->node);
5044 probe_ent->dev = dev;
5046 probe_ent->sht = port->sht;
5047 probe_ent->host_flags = port->host_flags;
5048 probe_ent->pio_mask = port->pio_mask;
5049 probe_ent->mwdma_mask = port->mwdma_mask;
5050 probe_ent->udma_mask = port->udma_mask;
5051 probe_ent->port_ops = port->port_ops;
5060 void ata_pci_host_stop (struct ata_host_set *host_set)
5062 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5064 pci_iounmap(pdev, host_set->mmio_base);
5068 * ata_pci_init_native_mode - Initialize native-mode driver
5069 * @pdev: pci device to be initialized
5070 * @port: array[2] of pointers to port info structures.
5071 * @ports: bitmap of ports present
5073 * Utility function which allocates and initializes an
5074 * ata_probe_ent structure for a standard dual-port
5075 * PIO-based IDE controller. The returned ata_probe_ent
5076 * structure can be passed to ata_device_add(). The returned
5077 * ata_probe_ent structure should then be freed with kfree().
5079 * The caller need only pass the address of the primary port, the
5080 * secondary will be deduced automatically. If the device has non
5081 * standard secondary port mappings this function can be called twice,
5082 * once for each interface.
5085 struct ata_probe_ent *
5086 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports)
5088 struct ata_probe_ent *probe_ent =
5089 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
5095 probe_ent->irq = pdev->irq;
5096 probe_ent->irq_flags = SA_SHIRQ;
5097 probe_ent->private_data = port[0]->private_data;
5099 if (ports & ATA_PORT_PRIMARY) {
5100 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0);
5101 probe_ent->port[p].altstatus_addr =
5102 probe_ent->port[p].ctl_addr =
5103 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
5104 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4);
5105 ata_std_ports(&probe_ent->port[p]);
5109 if (ports & ATA_PORT_SECONDARY) {
5110 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2);
5111 probe_ent->port[p].altstatus_addr =
5112 probe_ent->port[p].ctl_addr =
5113 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
5114 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8;
5115 ata_std_ports(&probe_ent->port[p]);
5119 probe_ent->n_ports = p;
5123 static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info *port, int port_num)
5125 struct ata_probe_ent *probe_ent;
5127 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port);
5131 probe_ent->legacy_mode = 1;
5132 probe_ent->n_ports = 1;
5133 probe_ent->hard_port_no = port_num;
5134 probe_ent->private_data = port->private_data;
5139 probe_ent->irq = 14;
5140 probe_ent->port[0].cmd_addr = 0x1f0;
5141 probe_ent->port[0].altstatus_addr =
5142 probe_ent->port[0].ctl_addr = 0x3f6;
5145 probe_ent->irq = 15;
5146 probe_ent->port[0].cmd_addr = 0x170;
5147 probe_ent->port[0].altstatus_addr =
5148 probe_ent->port[0].ctl_addr = 0x376;
5151 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num;
5152 ata_std_ports(&probe_ent->port[0]);
5157 * ata_pci_init_one - Initialize/register PCI IDE host controller
5158 * @pdev: Controller to be initialized
5159 * @port_info: Information from low-level host driver
5160 * @n_ports: Number of ports attached to host controller
5162 * This is a helper function which can be called from a driver's
5163 * xxx_init_one() probe function if the hardware uses traditional
5164 * IDE taskfile registers.
5166 * This function calls pci_enable_device(), reserves its register
5167 * regions, sets the dma mask, enables bus master mode, and calls
5171 * Inherited from PCI layer (may sleep).
5174 * Zero on success, negative on errno-based value on error.
5177 int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
5178 unsigned int n_ports)
5180 struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL;
5181 struct ata_port_info *port[2];
5183 unsigned int legacy_mode = 0;
5184 int disable_dev_on_err = 1;
5189 port[0] = port_info[0];
5191 port[1] = port_info[1];
5195 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
5196 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
5197 /* TODO: What if one channel is in native mode ... */
5198 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
5199 mask = (1 << 2) | (1 << 0);
5200 if ((tmp8 & mask) != mask)
5201 legacy_mode = (1 << 3);
5205 if ((!legacy_mode) && (n_ports > 2)) {
5206 printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n");
5211 /* FIXME: Really for ATA it isn't safe because the device may be
5212 multi-purpose and we want to leave it alone if it was already
5213 enabled. Secondly for shared use as Arjan says we want refcounting
5215 Checking dev->is_enabled is insufficient as this is not set at
5216 boot for the primary video which is BIOS enabled
5219 rc = pci_enable_device(pdev);
5223 rc = pci_request_regions(pdev, DRV_NAME);
5225 disable_dev_on_err = 0;
5229 /* FIXME: Should use platform specific mappers for legacy port ranges */
5231 if (!request_region(0x1f0, 8, "libata")) {
5232 struct resource *conflict, res;
5234 res.end = 0x1f0 + 8 - 1;
5235 conflict = ____request_resource(&ioport_resource, &res);
5236 if (!strcmp(conflict->name, "libata"))
5237 legacy_mode |= (1 << 0);
5239 disable_dev_on_err = 0;
5240 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
5243 legacy_mode |= (1 << 0);
5245 if (!request_region(0x170, 8, "libata")) {
5246 struct resource *conflict, res;
5248 res.end = 0x170 + 8 - 1;
5249 conflict = ____request_resource(&ioport_resource, &res);
5250 if (!strcmp(conflict->name, "libata"))
5251 legacy_mode |= (1 << 1);
5253 disable_dev_on_err = 0;
5254 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
5257 legacy_mode |= (1 << 1);
5260 /* we have legacy mode, but all ports are unavailable */
5261 if (legacy_mode == (1 << 3)) {
5263 goto err_out_regions;
5266 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
5268 goto err_out_regions;
5269 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
5271 goto err_out_regions;
5274 if (legacy_mode & (1 << 0))
5275 probe_ent = ata_pci_init_legacy_port(pdev, port[0], 0);
5276 if (legacy_mode & (1 << 1))
5277 probe_ent2 = ata_pci_init_legacy_port(pdev, port[1], 1);
5280 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
5282 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY);
5284 if (!probe_ent && !probe_ent2) {
5286 goto err_out_regions;
5289 pci_set_master(pdev);
5291 /* FIXME: check ata_device_add return */
5293 if (legacy_mode & (1 << 0))
5294 ata_device_add(probe_ent);
5295 if (legacy_mode & (1 << 1))
5296 ata_device_add(probe_ent2);
5298 ata_device_add(probe_ent);
5306 if (legacy_mode & (1 << 0))
5307 release_region(0x1f0, 8);
5308 if (legacy_mode & (1 << 1))
5309 release_region(0x170, 8);
5310 pci_release_regions(pdev);
5312 if (disable_dev_on_err)
5313 pci_disable_device(pdev);
5318 * ata_pci_remove_one - PCI layer callback for device removal
5319 * @pdev: PCI device that was removed
5321 * PCI layer indicates to libata via this hook that
5322 * hot-unplug or module unload event has occurred.
5323 * Handle this by unregistering all objects associated
5324 * with this PCI device. Free those objects. Then finally
5325 * release PCI resources and disable device.
5328 * Inherited from PCI layer (may sleep).
5331 void ata_pci_remove_one (struct pci_dev *pdev)
5333 struct device *dev = pci_dev_to_dev(pdev);
5334 struct ata_host_set *host_set = dev_get_drvdata(dev);
5336 ata_host_set_remove(host_set);
5337 pci_release_regions(pdev);
5338 pci_disable_device(pdev);
5339 dev_set_drvdata(dev, NULL);
5342 /* move to PCI subsystem */
5343 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5345 unsigned long tmp = 0;
5347 switch (bits->width) {
5350 pci_read_config_byte(pdev, bits->reg, &tmp8);
5356 pci_read_config_word(pdev, bits->reg, &tmp16);
5362 pci_read_config_dword(pdev, bits->reg, &tmp32);
5373 return (tmp == bits->val) ? 1 : 0;
5376 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5378 pci_save_state(pdev);
5379 pci_disable_device(pdev);
5380 pci_set_power_state(pdev, PCI_D3hot);
5384 int ata_pci_device_resume(struct pci_dev *pdev)
5386 pci_set_power_state(pdev, PCI_D0);
5387 pci_restore_state(pdev);
5388 pci_enable_device(pdev);
5389 pci_set_master(pdev);
5392 #endif /* CONFIG_PCI */
5395 static int __init ata_init(void)
5397 ata_wq = create_workqueue("ata");
5401 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5405 static void __exit ata_exit(void)
5407 destroy_workqueue(ata_wq);
5410 module_init(ata_init);
5411 module_exit(ata_exit);
5413 static unsigned long ratelimit_time;
5414 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5416 int ata_ratelimit(void)
5419 unsigned long flags;
5421 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5423 if (time_after(jiffies, ratelimit_time)) {
5425 ratelimit_time = jiffies + (HZ/5);
5429 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5435 * libata is essentially a library of internal helper functions for
5436 * low-level ATA host controller drivers. As such, the API/ABI is
5437 * likely to change as new drivers are added and updated.
5438 * Do not depend on ABI/API stability.
5441 EXPORT_SYMBOL_GPL(ata_std_bios_param);
5442 EXPORT_SYMBOL_GPL(ata_std_ports);
5443 EXPORT_SYMBOL_GPL(ata_device_add);
5444 EXPORT_SYMBOL_GPL(ata_host_set_remove);
5445 EXPORT_SYMBOL_GPL(ata_sg_init);
5446 EXPORT_SYMBOL_GPL(ata_sg_init_one);
5447 EXPORT_SYMBOL_GPL(ata_qc_complete);
5448 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5449 EXPORT_SYMBOL_GPL(ata_eng_timeout);
5450 EXPORT_SYMBOL_GPL(ata_tf_load);
5451 EXPORT_SYMBOL_GPL(ata_tf_read);
5452 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5453 EXPORT_SYMBOL_GPL(ata_std_dev_select);
5454 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5455 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5456 EXPORT_SYMBOL_GPL(ata_check_status);
5457 EXPORT_SYMBOL_GPL(ata_altstatus);
5458 EXPORT_SYMBOL_GPL(ata_exec_command);
5459 EXPORT_SYMBOL_GPL(ata_port_start);
5460 EXPORT_SYMBOL_GPL(ata_port_stop);
5461 EXPORT_SYMBOL_GPL(ata_host_stop);
5462 EXPORT_SYMBOL_GPL(ata_interrupt);
5463 EXPORT_SYMBOL_GPL(ata_qc_prep);
5464 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5465 EXPORT_SYMBOL_GPL(ata_bmdma_start);
5466 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5467 EXPORT_SYMBOL_GPL(ata_bmdma_status);
5468 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5469 EXPORT_SYMBOL_GPL(ata_port_probe);
5470 EXPORT_SYMBOL_GPL(sata_phy_reset);
5471 EXPORT_SYMBOL_GPL(__sata_phy_reset);
5472 EXPORT_SYMBOL_GPL(ata_bus_reset);
5473 EXPORT_SYMBOL_GPL(ata_std_softreset);
5474 EXPORT_SYMBOL_GPL(sata_std_hardreset);
5475 EXPORT_SYMBOL_GPL(ata_std_postreset);
5476 EXPORT_SYMBOL_GPL(ata_std_probe_reset);
5477 EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
5478 EXPORT_SYMBOL_GPL(ata_port_disable);
5479 EXPORT_SYMBOL_GPL(ata_ratelimit);
5480 EXPORT_SYMBOL_GPL(ata_busy_sleep);
5481 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5482 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5483 EXPORT_SYMBOL_GPL(ata_scsi_error);
5484 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5485 EXPORT_SYMBOL_GPL(ata_scsi_release);
5486 EXPORT_SYMBOL_GPL(ata_host_intr);
5487 EXPORT_SYMBOL_GPL(ata_dev_classify);
5488 EXPORT_SYMBOL_GPL(ata_dev_id_string);
5489 EXPORT_SYMBOL_GPL(ata_dev_config);
5490 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5491 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5492 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
5494 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
5495 EXPORT_SYMBOL_GPL(ata_timing_compute);
5496 EXPORT_SYMBOL_GPL(ata_timing_merge);
5499 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5500 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5501 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5502 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5503 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5504 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5505 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
5506 #endif /* CONFIG_PCI */
5508 EXPORT_SYMBOL_GPL(ata_device_suspend);
5509 EXPORT_SYMBOL_GPL(ata_device_resume);
5510 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5511 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);