2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
64 /* debounce timing parameters in msecs { interval, duration, timeout } */
65 const unsigned long sata_deb_timing_boot[] = { 5, 100, 2000 };
66 const unsigned long sata_deb_timing_eh[] = { 25, 500, 2000 };
67 const unsigned long sata_deb_timing_before_fsrst[] = { 100, 2000, 5000 };
69 static unsigned int ata_dev_init_params(struct ata_device *dev,
70 u16 heads, u16 sectors);
71 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
72 static void ata_dev_xfermask(struct ata_device *dev);
74 static unsigned int ata_unique_id = 1;
75 static struct workqueue_struct *ata_wq;
77 struct workqueue_struct *ata_aux_wq;
79 int atapi_enabled = 1;
80 module_param(atapi_enabled, int, 0444);
81 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
84 module_param(atapi_dmadir, int, 0444);
85 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
88 module_param_named(fua, libata_fua, int, 0444);
89 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
91 MODULE_AUTHOR("Jeff Garzik");
92 MODULE_DESCRIPTION("Library module for ATA devices");
93 MODULE_LICENSE("GPL");
94 MODULE_VERSION(DRV_VERSION);
98 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
99 * @tf: Taskfile to convert
100 * @fis: Buffer into which data will output
101 * @pmp: Port multiplier port
103 * Converts a standard ATA taskfile to a Serial ATA
104 * FIS structure (Register - Host to Device).
107 * Inherited from caller.
110 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
112 fis[0] = 0x27; /* Register - Host to Device FIS */
113 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
114 bit 7 indicates Command FIS */
115 fis[2] = tf->command;
116 fis[3] = tf->feature;
123 fis[8] = tf->hob_lbal;
124 fis[9] = tf->hob_lbam;
125 fis[10] = tf->hob_lbah;
126 fis[11] = tf->hob_feature;
129 fis[13] = tf->hob_nsect;
140 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
141 * @fis: Buffer from which data will be input
142 * @tf: Taskfile to output
144 * Converts a serial ATA FIS structure to a standard ATA taskfile.
147 * Inherited from caller.
150 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
152 tf->command = fis[2]; /* status */
153 tf->feature = fis[3]; /* error */
160 tf->hob_lbal = fis[8];
161 tf->hob_lbam = fis[9];
162 tf->hob_lbah = fis[10];
165 tf->hob_nsect = fis[13];
168 static const u8 ata_rw_cmds[] = {
172 ATA_CMD_READ_MULTI_EXT,
173 ATA_CMD_WRITE_MULTI_EXT,
177 ATA_CMD_WRITE_MULTI_FUA_EXT,
181 ATA_CMD_PIO_READ_EXT,
182 ATA_CMD_PIO_WRITE_EXT,
195 ATA_CMD_WRITE_FUA_EXT
199 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
200 * @qc: command to examine and configure
202 * Examine the device configuration and tf->flags to calculate
203 * the proper read/write commands and protocol to use.
208 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
210 struct ata_taskfile *tf = &qc->tf;
211 struct ata_device *dev = qc->dev;
214 int index, fua, lba48, write;
216 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
217 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
218 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
220 if (dev->flags & ATA_DFLAG_PIO) {
221 tf->protocol = ATA_PROT_PIO;
222 index = dev->multi_count ? 0 : 8;
223 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
224 /* Unable to use DMA due to host limitation */
225 tf->protocol = ATA_PROT_PIO;
226 index = dev->multi_count ? 0 : 8;
228 tf->protocol = ATA_PROT_DMA;
232 cmd = ata_rw_cmds[index + fua + lba48 + write];
241 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
242 * @pio_mask: pio_mask
243 * @mwdma_mask: mwdma_mask
244 * @udma_mask: udma_mask
246 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
247 * unsigned int xfer_mask.
255 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
256 unsigned int mwdma_mask,
257 unsigned int udma_mask)
259 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
260 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
261 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
265 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
266 * @xfer_mask: xfer_mask to unpack
267 * @pio_mask: resulting pio_mask
268 * @mwdma_mask: resulting mwdma_mask
269 * @udma_mask: resulting udma_mask
271 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
272 * Any NULL distination masks will be ignored.
274 static void ata_unpack_xfermask(unsigned int xfer_mask,
275 unsigned int *pio_mask,
276 unsigned int *mwdma_mask,
277 unsigned int *udma_mask)
280 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
282 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
284 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
287 static const struct ata_xfer_ent {
291 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
292 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
293 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
298 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
299 * @xfer_mask: xfer_mask of interest
301 * Return matching XFER_* value for @xfer_mask. Only the highest
302 * bit of @xfer_mask is considered.
308 * Matching XFER_* value, 0 if no match found.
310 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
312 int highbit = fls(xfer_mask) - 1;
313 const struct ata_xfer_ent *ent;
315 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
316 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
317 return ent->base + highbit - ent->shift;
322 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
323 * @xfer_mode: XFER_* of interest
325 * Return matching xfer_mask for @xfer_mode.
331 * Matching xfer_mask, 0 if no match found.
333 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
335 const struct ata_xfer_ent *ent;
337 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
338 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
339 return 1 << (ent->shift + xfer_mode - ent->base);
344 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
345 * @xfer_mode: XFER_* of interest
347 * Return matching xfer_shift for @xfer_mode.
353 * Matching xfer_shift, -1 if no match found.
355 static int ata_xfer_mode2shift(unsigned int xfer_mode)
357 const struct ata_xfer_ent *ent;
359 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
360 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
366 * ata_mode_string - convert xfer_mask to string
367 * @xfer_mask: mask of bits supported; only highest bit counts.
369 * Determine string which represents the highest speed
370 * (highest bit in @modemask).
376 * Constant C string representing highest speed listed in
377 * @mode_mask, or the constant C string "<n/a>".
379 static const char *ata_mode_string(unsigned int xfer_mask)
381 static const char * const xfer_mode_str[] = {
401 highbit = fls(xfer_mask) - 1;
402 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
403 return xfer_mode_str[highbit];
407 static const char *sata_spd_string(unsigned int spd)
409 static const char * const spd_str[] = {
414 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
416 return spd_str[spd - 1];
419 void ata_dev_disable(struct ata_device *dev)
421 if (ata_dev_enabled(dev)) {
422 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
428 * ata_pio_devchk - PATA device presence detection
429 * @ap: ATA channel to examine
430 * @device: Device to examine (starting at zero)
432 * This technique was originally described in
433 * Hale Landis's ATADRVR (www.ata-atapi.com), and
434 * later found its way into the ATA/ATAPI spec.
436 * Write a pattern to the ATA shadow registers,
437 * and if a device is present, it will respond by
438 * correctly storing and echoing back the
439 * ATA shadow register contents.
445 static unsigned int ata_pio_devchk(struct ata_port *ap,
448 struct ata_ioports *ioaddr = &ap->ioaddr;
451 ap->ops->dev_select(ap, device);
453 outb(0x55, ioaddr->nsect_addr);
454 outb(0xaa, ioaddr->lbal_addr);
456 outb(0xaa, ioaddr->nsect_addr);
457 outb(0x55, ioaddr->lbal_addr);
459 outb(0x55, ioaddr->nsect_addr);
460 outb(0xaa, ioaddr->lbal_addr);
462 nsect = inb(ioaddr->nsect_addr);
463 lbal = inb(ioaddr->lbal_addr);
465 if ((nsect == 0x55) && (lbal == 0xaa))
466 return 1; /* we found a device */
468 return 0; /* nothing found */
472 * ata_mmio_devchk - PATA device presence detection
473 * @ap: ATA channel to examine
474 * @device: Device to examine (starting at zero)
476 * This technique was originally described in
477 * Hale Landis's ATADRVR (www.ata-atapi.com), and
478 * later found its way into the ATA/ATAPI spec.
480 * Write a pattern to the ATA shadow registers,
481 * and if a device is present, it will respond by
482 * correctly storing and echoing back the
483 * ATA shadow register contents.
489 static unsigned int ata_mmio_devchk(struct ata_port *ap,
492 struct ata_ioports *ioaddr = &ap->ioaddr;
495 ap->ops->dev_select(ap, device);
497 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
498 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
500 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
501 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
503 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
504 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
506 nsect = readb((void __iomem *) ioaddr->nsect_addr);
507 lbal = readb((void __iomem *) ioaddr->lbal_addr);
509 if ((nsect == 0x55) && (lbal == 0xaa))
510 return 1; /* we found a device */
512 return 0; /* nothing found */
516 * ata_devchk - PATA device presence detection
517 * @ap: ATA channel to examine
518 * @device: Device to examine (starting at zero)
520 * Dispatch ATA device presence detection, depending
521 * on whether we are using PIO or MMIO to talk to the
522 * ATA shadow registers.
528 static unsigned int ata_devchk(struct ata_port *ap,
531 if (ap->flags & ATA_FLAG_MMIO)
532 return ata_mmio_devchk(ap, device);
533 return ata_pio_devchk(ap, device);
537 * ata_dev_classify - determine device type based on ATA-spec signature
538 * @tf: ATA taskfile register set for device to be identified
540 * Determine from taskfile register contents whether a device is
541 * ATA or ATAPI, as per "Signature and persistence" section
542 * of ATA/PI spec (volume 1, sect 5.14).
548 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
549 * the event of failure.
552 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
554 /* Apple's open source Darwin code hints that some devices only
555 * put a proper signature into the LBA mid/high registers,
556 * So, we only check those. It's sufficient for uniqueness.
559 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
560 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
561 DPRINTK("found ATA device by sig\n");
565 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
566 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
567 DPRINTK("found ATAPI device by sig\n");
568 return ATA_DEV_ATAPI;
571 DPRINTK("unknown device\n");
572 return ATA_DEV_UNKNOWN;
576 * ata_dev_try_classify - Parse returned ATA device signature
577 * @ap: ATA channel to examine
578 * @device: Device to examine (starting at zero)
579 * @r_err: Value of error register on completion
581 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
582 * an ATA/ATAPI-defined set of values is placed in the ATA
583 * shadow registers, indicating the results of device detection
586 * Select the ATA device, and read the values from the ATA shadow
587 * registers. Then parse according to the Error register value,
588 * and the spec-defined values examined by ata_dev_classify().
594 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
598 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
600 struct ata_taskfile tf;
604 ap->ops->dev_select(ap, device);
606 memset(&tf, 0, sizeof(tf));
608 ap->ops->tf_read(ap, &tf);
613 /* see if device passed diags */
616 else if ((device == 0) && (err == 0x81))
621 /* determine if device is ATA or ATAPI */
622 class = ata_dev_classify(&tf);
624 if (class == ATA_DEV_UNKNOWN)
626 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
632 * ata_id_string - Convert IDENTIFY DEVICE page into string
633 * @id: IDENTIFY DEVICE results we will examine
634 * @s: string into which data is output
635 * @ofs: offset into identify device page
636 * @len: length of string to return. must be an even number.
638 * The strings in the IDENTIFY DEVICE page are broken up into
639 * 16-bit chunks. Run through the string, and output each
640 * 8-bit chunk linearly, regardless of platform.
646 void ata_id_string(const u16 *id, unsigned char *s,
647 unsigned int ofs, unsigned int len)
666 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
667 * @id: IDENTIFY DEVICE results we will examine
668 * @s: string into which data is output
669 * @ofs: offset into identify device page
670 * @len: length of string to return. must be an odd number.
672 * This function is identical to ata_id_string except that it
673 * trims trailing spaces and terminates the resulting string with
674 * null. @len must be actual maximum length (even number) + 1.
679 void ata_id_c_string(const u16 *id, unsigned char *s,
680 unsigned int ofs, unsigned int len)
686 ata_id_string(id, s, ofs, len - 1);
688 p = s + strnlen(s, len - 1);
689 while (p > s && p[-1] == ' ')
694 static u64 ata_id_n_sectors(const u16 *id)
696 if (ata_id_has_lba(id)) {
697 if (ata_id_has_lba48(id))
698 return ata_id_u64(id, 100);
700 return ata_id_u32(id, 60);
702 if (ata_id_current_chs_valid(id))
703 return ata_id_u32(id, 57);
705 return id[1] * id[3] * id[6];
710 * ata_noop_dev_select - Select device 0/1 on ATA bus
711 * @ap: ATA channel to manipulate
712 * @device: ATA device (numbered from zero) to select
714 * This function performs no actual function.
716 * May be used as the dev_select() entry in ata_port_operations.
721 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
727 * ata_std_dev_select - Select device 0/1 on ATA bus
728 * @ap: ATA channel to manipulate
729 * @device: ATA device (numbered from zero) to select
731 * Use the method defined in the ATA specification to
732 * make either device 0, or device 1, active on the
733 * ATA channel. Works with both PIO and MMIO.
735 * May be used as the dev_select() entry in ata_port_operations.
741 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
746 tmp = ATA_DEVICE_OBS;
748 tmp = ATA_DEVICE_OBS | ATA_DEV1;
750 if (ap->flags & ATA_FLAG_MMIO) {
751 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
753 outb(tmp, ap->ioaddr.device_addr);
755 ata_pause(ap); /* needed; also flushes, for mmio */
759 * ata_dev_select - Select device 0/1 on ATA bus
760 * @ap: ATA channel to manipulate
761 * @device: ATA device (numbered from zero) to select
762 * @wait: non-zero to wait for Status register BSY bit to clear
763 * @can_sleep: non-zero if context allows sleeping
765 * Use the method defined in the ATA specification to
766 * make either device 0, or device 1, active on the
769 * This is a high-level version of ata_std_dev_select(),
770 * which additionally provides the services of inserting
771 * the proper pauses and status polling, where needed.
777 void ata_dev_select(struct ata_port *ap, unsigned int device,
778 unsigned int wait, unsigned int can_sleep)
780 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
781 ap->id, device, wait);
786 ap->ops->dev_select(ap, device);
789 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
796 * ata_dump_id - IDENTIFY DEVICE info debugging output
797 * @id: IDENTIFY DEVICE page to dump
799 * Dump selected 16-bit words from the given IDENTIFY DEVICE
806 static inline void ata_dump_id(const u16 *id)
808 DPRINTK("49==0x%04x "
818 DPRINTK("80==0x%04x "
828 DPRINTK("88==0x%04x "
835 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
836 * @id: IDENTIFY data to compute xfer mask from
838 * Compute the xfermask for this device. This is not as trivial
839 * as it seems if we must consider early devices correctly.
841 * FIXME: pre IDE drive timing (do we care ?).
849 static unsigned int ata_id_xfermask(const u16 *id)
851 unsigned int pio_mask, mwdma_mask, udma_mask;
853 /* Usual case. Word 53 indicates word 64 is valid */
854 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
855 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
859 /* If word 64 isn't valid then Word 51 high byte holds
860 * the PIO timing number for the maximum. Turn it into
863 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
865 /* But wait.. there's more. Design your standards by
866 * committee and you too can get a free iordy field to
867 * process. However its the speeds not the modes that
868 * are supported... Note drivers using the timing API
869 * will get this right anyway
873 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
876 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
877 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
879 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
883 * ata_port_queue_task - Queue port_task
884 * @ap: The ata_port to queue port_task for
885 * @fn: workqueue function to be scheduled
886 * @data: data value to pass to workqueue function
887 * @delay: delay time for workqueue function
889 * Schedule @fn(@data) for execution after @delay jiffies using
890 * port_task. There is one port_task per port and it's the
891 * user(low level driver)'s responsibility to make sure that only
892 * one task is active at any given time.
894 * libata core layer takes care of synchronization between
895 * port_task and EH. ata_port_queue_task() may be ignored for EH
899 * Inherited from caller.
901 void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
906 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
909 PREPARE_WORK(&ap->port_task, fn, data);
912 rc = queue_work(ata_wq, &ap->port_task);
914 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
916 /* rc == 0 means that another user is using port task */
921 * ata_port_flush_task - Flush port_task
922 * @ap: The ata_port to flush port_task for
924 * After this function completes, port_task is guranteed not to
925 * be running or scheduled.
928 * Kernel thread context (may sleep)
930 void ata_port_flush_task(struct ata_port *ap)
936 spin_lock_irqsave(&ap->host_set->lock, flags);
937 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
938 spin_unlock_irqrestore(&ap->host_set->lock, flags);
940 DPRINTK("flush #1\n");
941 flush_workqueue(ata_wq);
944 * At this point, if a task is running, it's guaranteed to see
945 * the FLUSH flag; thus, it will never queue pio tasks again.
948 if (!cancel_delayed_work(&ap->port_task)) {
949 DPRINTK("flush #2\n");
950 flush_workqueue(ata_wq);
953 spin_lock_irqsave(&ap->host_set->lock, flags);
954 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
955 spin_unlock_irqrestore(&ap->host_set->lock, flags);
960 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
962 struct completion *waiting = qc->private_data;
968 * ata_exec_internal - execute libata internal command
969 * @dev: Device to which the command is sent
970 * @tf: Taskfile registers for the command and the result
971 * @cdb: CDB for packet command
972 * @dma_dir: Data tranfer direction of the command
973 * @buf: Data buffer of the command
974 * @buflen: Length of data buffer
976 * Executes libata internal command with timeout. @tf contains
977 * command on entry and result on return. Timeout and error
978 * conditions are reported via return value. No recovery action
979 * is taken after a command times out. It's caller's duty to
980 * clean up after timeout.
983 * None. Should be called with kernel context, might sleep.
986 * Zero on success, AC_ERR_* mask on failure
988 unsigned ata_exec_internal(struct ata_device *dev,
989 struct ata_taskfile *tf, const u8 *cdb,
990 int dma_dir, void *buf, unsigned int buflen)
992 struct ata_port *ap = dev->ap;
993 u8 command = tf->command;
994 struct ata_queued_cmd *qc;
995 unsigned int tag, preempted_tag;
996 u32 preempted_sactive, preempted_qc_active;
997 DECLARE_COMPLETION(wait);
999 unsigned int err_mask;
1002 spin_lock_irqsave(&ap->host_set->lock, flags);
1004 /* no internal command while frozen */
1005 if (ap->flags & ATA_FLAG_FROZEN) {
1006 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1007 return AC_ERR_SYSTEM;
1010 /* initialize internal qc */
1012 /* XXX: Tag 0 is used for drivers with legacy EH as some
1013 * drivers choke if any other tag is given. This breaks
1014 * ata_tag_internal() test for those drivers. Don't use new
1015 * EH stuff without converting to it.
1017 if (ap->ops->error_handler)
1018 tag = ATA_TAG_INTERNAL;
1022 if (test_and_set_bit(tag, &ap->qc_allocated))
1024 qc = __ata_qc_from_tag(ap, tag);
1032 preempted_tag = ap->active_tag;
1033 preempted_sactive = ap->sactive;
1034 preempted_qc_active = ap->qc_active;
1035 ap->active_tag = ATA_TAG_POISON;
1039 /* prepare & issue qc */
1042 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1043 qc->flags |= ATA_QCFLAG_RESULT_TF;
1044 qc->dma_dir = dma_dir;
1045 if (dma_dir != DMA_NONE) {
1046 ata_sg_init_one(qc, buf, buflen);
1047 qc->nsect = buflen / ATA_SECT_SIZE;
1050 qc->private_data = &wait;
1051 qc->complete_fn = ata_qc_complete_internal;
1055 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1057 rc = wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL);
1059 ata_port_flush_task(ap);
1062 spin_lock_irqsave(&ap->host_set->lock, flags);
1064 /* We're racing with irq here. If we lose, the
1065 * following test prevents us from completing the qc
1066 * twice. If we win, the port is frozen and will be
1067 * cleaned up by ->post_internal_cmd().
1069 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1070 qc->err_mask |= AC_ERR_TIMEOUT;
1072 if (ap->ops->error_handler)
1073 ata_port_freeze(ap);
1075 ata_qc_complete(qc);
1077 ata_dev_printk(dev, KERN_WARNING,
1078 "qc timeout (cmd 0x%x)\n", command);
1081 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1084 /* do post_internal_cmd */
1085 if (ap->ops->post_internal_cmd)
1086 ap->ops->post_internal_cmd(qc);
1088 if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) {
1089 ata_dev_printk(dev, KERN_WARNING, "zero err_mask for failed "
1090 "internal command, assuming AC_ERR_OTHER\n");
1091 qc->err_mask |= AC_ERR_OTHER;
1095 spin_lock_irqsave(&ap->host_set->lock, flags);
1097 *tf = qc->result_tf;
1098 err_mask = qc->err_mask;
1101 ap->active_tag = preempted_tag;
1102 ap->sactive = preempted_sactive;
1103 ap->qc_active = preempted_qc_active;
1105 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1106 * Until those drivers are fixed, we detect the condition
1107 * here, fail the command with AC_ERR_SYSTEM and reenable the
1110 * Note that this doesn't change any behavior as internal
1111 * command failure results in disabling the device in the
1112 * higher layer for LLDDs without new reset/EH callbacks.
1114 * Kill the following code as soon as those drivers are fixed.
1116 if (ap->flags & ATA_FLAG_DISABLED) {
1117 err_mask |= AC_ERR_SYSTEM;
1121 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1127 * ata_pio_need_iordy - check if iordy needed
1130 * Check if the current speed of the device requires IORDY. Used
1131 * by various controllers for chip configuration.
1134 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1137 int speed = adev->pio_mode - XFER_PIO_0;
1144 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1146 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1147 pio = adev->id[ATA_ID_EIDE_PIO];
1148 /* Is the speed faster than the drive allows non IORDY ? */
1150 /* This is cycle times not frequency - watch the logic! */
1151 if (pio > 240) /* PIO2 is 240nS per cycle */
1160 * ata_dev_read_id - Read ID data from the specified device
1161 * @dev: target device
1162 * @p_class: pointer to class of the target device (may be changed)
1163 * @post_reset: is this read ID post-reset?
1164 * @id: buffer to read IDENTIFY data into
1166 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1167 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1168 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1169 * for pre-ATA4 drives.
1172 * Kernel thread context (may sleep)
1175 * 0 on success, -errno otherwise.
1177 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1178 int post_reset, u16 *id)
1180 struct ata_port *ap = dev->ap;
1181 unsigned int class = *p_class;
1182 struct ata_taskfile tf;
1183 unsigned int err_mask = 0;
1187 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1189 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1192 ata_tf_init(dev, &tf);
1196 tf.command = ATA_CMD_ID_ATA;
1199 tf.command = ATA_CMD_ID_ATAPI;
1203 reason = "unsupported class";
1207 tf.protocol = ATA_PROT_PIO;
1209 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1210 id, sizeof(id[0]) * ATA_ID_WORDS);
1213 reason = "I/O error";
1217 swap_buf_le16(id, ATA_ID_WORDS);
1220 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
1222 reason = "device reports illegal type";
1226 if (post_reset && class == ATA_DEV_ATA) {
1228 * The exact sequence expected by certain pre-ATA4 drives is:
1231 * INITIALIZE DEVICE PARAMETERS
1233 * Some drives were very specific about that exact sequence.
1235 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1236 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1239 reason = "INIT_DEV_PARAMS failed";
1243 /* current CHS translation info (id[53-58]) might be
1244 * changed. reread the identify device info.
1256 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1257 "(%s, err_mask=0x%x)\n", reason, err_mask);
1261 static inline u8 ata_dev_knobble(struct ata_device *dev)
1263 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1266 static void ata_dev_config_ncq(struct ata_device *dev,
1267 char *desc, size_t desc_sz)
1269 struct ata_port *ap = dev->ap;
1270 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1272 if (!ata_id_has_ncq(dev->id)) {
1277 if (ap->flags & ATA_FLAG_NCQ) {
1278 hdepth = min(ap->host->can_queue, ATA_MAX_QUEUE - 1);
1279 dev->flags |= ATA_DFLAG_NCQ;
1282 if (hdepth >= ddepth)
1283 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1285 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1289 * ata_dev_configure - Configure the specified ATA/ATAPI device
1290 * @dev: Target device to configure
1291 * @print_info: Enable device info printout
1293 * Configure @dev according to @dev->id. Generic and low-level
1294 * driver specific fixups are also applied.
1297 * Kernel thread context (may sleep)
1300 * 0 on success, -errno otherwise
1302 int ata_dev_configure(struct ata_device *dev, int print_info)
1304 struct ata_port *ap = dev->ap;
1305 const u16 *id = dev->id;
1306 unsigned int xfer_mask;
1309 if (!ata_dev_enabled(dev)) {
1310 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1311 ap->id, dev->devno);
1315 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1317 /* print device capabilities */
1319 ata_dev_printk(dev, KERN_DEBUG, "cfg 49:%04x 82:%04x 83:%04x "
1320 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1321 id[49], id[82], id[83], id[84],
1322 id[85], id[86], id[87], id[88]);
1324 /* initialize to-be-configured parameters */
1325 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1326 dev->max_sectors = 0;
1334 * common ATA, ATAPI feature tests
1337 /* find max transfer mode; for printk only */
1338 xfer_mask = ata_id_xfermask(id);
1342 /* ATA-specific feature tests */
1343 if (dev->class == ATA_DEV_ATA) {
1344 dev->n_sectors = ata_id_n_sectors(id);
1346 if (ata_id_has_lba(id)) {
1347 const char *lba_desc;
1351 dev->flags |= ATA_DFLAG_LBA;
1352 if (ata_id_has_lba48(id)) {
1353 dev->flags |= ATA_DFLAG_LBA48;
1358 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1360 /* print device info to dmesg */
1362 ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
1363 "max %s, %Lu sectors: %s %s\n",
1364 ata_id_major_version(id),
1365 ata_mode_string(xfer_mask),
1366 (unsigned long long)dev->n_sectors,
1367 lba_desc, ncq_desc);
1371 /* Default translation */
1372 dev->cylinders = id[1];
1374 dev->sectors = id[6];
1376 if (ata_id_current_chs_valid(id)) {
1377 /* Current CHS translation is valid. */
1378 dev->cylinders = id[54];
1379 dev->heads = id[55];
1380 dev->sectors = id[56];
1383 /* print device info to dmesg */
1385 ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
1386 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1387 ata_id_major_version(id),
1388 ata_mode_string(xfer_mask),
1389 (unsigned long long)dev->n_sectors,
1390 dev->cylinders, dev->heads, dev->sectors);
1393 if (dev->id[59] & 0x100) {
1394 dev->multi_count = dev->id[59] & 0xff;
1395 DPRINTK("ata%u: dev %u multi count %u\n",
1396 ap->id, dev->devno, dev->multi_count);
1402 /* ATAPI-specific feature tests */
1403 else if (dev->class == ATA_DEV_ATAPI) {
1404 char *cdb_intr_string = "";
1406 rc = atapi_cdb_len(id);
1407 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1408 ata_dev_printk(dev, KERN_WARNING,
1409 "unsupported CDB len\n");
1413 dev->cdb_len = (unsigned int) rc;
1415 if (ata_id_cdb_intr(dev->id)) {
1416 dev->flags |= ATA_DFLAG_CDB_INTR;
1417 cdb_intr_string = ", CDB intr";
1420 /* print device info to dmesg */
1422 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1423 ata_mode_string(xfer_mask),
1427 ap->host->max_cmd_len = 0;
1428 for (i = 0; i < ATA_MAX_DEVICES; i++)
1429 ap->host->max_cmd_len = max_t(unsigned int,
1430 ap->host->max_cmd_len,
1431 ap->device[i].cdb_len);
1433 /* limit bridge transfers to udma5, 200 sectors */
1434 if (ata_dev_knobble(dev)) {
1436 ata_dev_printk(dev, KERN_INFO,
1437 "applying bridge limits\n");
1438 dev->udma_mask &= ATA_UDMA5;
1439 dev->max_sectors = ATA_MAX_SECTORS;
1442 if (ap->ops->dev_config)
1443 ap->ops->dev_config(ap, dev);
1445 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1449 DPRINTK("EXIT, err\n");
1454 * ata_bus_probe - Reset and probe ATA bus
1457 * Master ATA bus probing function. Initiates a hardware-dependent
1458 * bus reset, then attempts to identify any devices found on
1462 * PCI/etc. bus probe sem.
1465 * Zero on success, negative errno otherwise.
1468 static int ata_bus_probe(struct ata_port *ap)
1470 unsigned int classes[ATA_MAX_DEVICES];
1471 int tries[ATA_MAX_DEVICES];
1472 int i, rc, down_xfermask;
1473 struct ata_device *dev;
1477 for (i = 0; i < ATA_MAX_DEVICES; i++)
1478 tries[i] = ATA_PROBE_MAX_TRIES;
1483 /* reset and determine device classes */
1484 ap->ops->phy_reset(ap);
1486 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1487 dev = &ap->device[i];
1489 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1490 dev->class != ATA_DEV_UNKNOWN)
1491 classes[dev->devno] = dev->class;
1493 classes[dev->devno] = ATA_DEV_NONE;
1495 dev->class = ATA_DEV_UNKNOWN;
1500 /* after the reset the device state is PIO 0 and the controller
1501 state is undefined. Record the mode */
1503 for (i = 0; i < ATA_MAX_DEVICES; i++)
1504 ap->device[i].pio_mode = XFER_PIO_0;
1506 /* read IDENTIFY page and configure devices */
1507 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1508 dev = &ap->device[i];
1511 dev->class = classes[i];
1513 if (!ata_dev_enabled(dev))
1516 rc = ata_dev_read_id(dev, &dev->class, 1, dev->id);
1520 rc = ata_dev_configure(dev, 1);
1525 /* configure transfer mode */
1526 rc = ata_set_mode(ap, &dev);
1532 for (i = 0; i < ATA_MAX_DEVICES; i++)
1533 if (ata_dev_enabled(&ap->device[i]))
1536 /* no device present, disable port */
1537 ata_port_disable(ap);
1538 ap->ops->port_disable(ap);
1545 tries[dev->devno] = 0;
1548 sata_down_spd_limit(ap);
1551 tries[dev->devno]--;
1552 if (down_xfermask &&
1553 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1554 tries[dev->devno] = 0;
1557 if (!tries[dev->devno]) {
1558 ata_down_xfermask_limit(dev, 1);
1559 ata_dev_disable(dev);
1566 * ata_port_probe - Mark port as enabled
1567 * @ap: Port for which we indicate enablement
1569 * Modify @ap data structure such that the system
1570 * thinks that the entire port is enabled.
1572 * LOCKING: host_set lock, or some other form of
1576 void ata_port_probe(struct ata_port *ap)
1578 ap->flags &= ~ATA_FLAG_DISABLED;
1582 * sata_print_link_status - Print SATA link status
1583 * @ap: SATA port to printk link status about
1585 * This function prints link speed and status of a SATA link.
1590 static void sata_print_link_status(struct ata_port *ap)
1592 u32 sstatus, scontrol, tmp;
1594 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1596 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1598 if (ata_port_online(ap)) {
1599 tmp = (sstatus >> 4) & 0xf;
1600 ata_port_printk(ap, KERN_INFO,
1601 "SATA link up %s (SStatus %X SControl %X)\n",
1602 sata_spd_string(tmp), sstatus, scontrol);
1604 ata_port_printk(ap, KERN_INFO,
1605 "SATA link down (SStatus %X SControl %X)\n",
1611 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1612 * @ap: SATA port associated with target SATA PHY.
1614 * This function issues commands to standard SATA Sxxx
1615 * PHY registers, to wake up the phy (and device), and
1616 * clear any reset condition.
1619 * PCI/etc. bus probe sem.
1622 void __sata_phy_reset(struct ata_port *ap)
1625 unsigned long timeout = jiffies + (HZ * 5);
1627 if (ap->flags & ATA_FLAG_SATA_RESET) {
1628 /* issue phy wake/reset */
1629 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1630 /* Couldn't find anything in SATA I/II specs, but
1631 * AHCI-1.1 10.4.2 says at least 1 ms. */
1634 /* phy wake/clear reset */
1635 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1637 /* wait for phy to become ready, if necessary */
1640 sata_scr_read(ap, SCR_STATUS, &sstatus);
1641 if ((sstatus & 0xf) != 1)
1643 } while (time_before(jiffies, timeout));
1645 /* print link status */
1646 sata_print_link_status(ap);
1648 /* TODO: phy layer with polling, timeouts, etc. */
1649 if (!ata_port_offline(ap))
1652 ata_port_disable(ap);
1654 if (ap->flags & ATA_FLAG_DISABLED)
1657 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1658 ata_port_disable(ap);
1662 ap->cbl = ATA_CBL_SATA;
1666 * sata_phy_reset - Reset SATA bus.
1667 * @ap: SATA port associated with target SATA PHY.
1669 * This function resets the SATA bus, and then probes
1670 * the bus for devices.
1673 * PCI/etc. bus probe sem.
1676 void sata_phy_reset(struct ata_port *ap)
1678 __sata_phy_reset(ap);
1679 if (ap->flags & ATA_FLAG_DISABLED)
1685 * ata_dev_pair - return other device on cable
1688 * Obtain the other device on the same cable, or if none is
1689 * present NULL is returned
1692 struct ata_device *ata_dev_pair(struct ata_device *adev)
1694 struct ata_port *ap = adev->ap;
1695 struct ata_device *pair = &ap->device[1 - adev->devno];
1696 if (!ata_dev_enabled(pair))
1702 * ata_port_disable - Disable port.
1703 * @ap: Port to be disabled.
1705 * Modify @ap data structure such that the system
1706 * thinks that the entire port is disabled, and should
1707 * never attempt to probe or communicate with devices
1710 * LOCKING: host_set lock, or some other form of
1714 void ata_port_disable(struct ata_port *ap)
1716 ap->device[0].class = ATA_DEV_NONE;
1717 ap->device[1].class = ATA_DEV_NONE;
1718 ap->flags |= ATA_FLAG_DISABLED;
1722 * sata_down_spd_limit - adjust SATA spd limit downward
1723 * @ap: Port to adjust SATA spd limit for
1725 * Adjust SATA spd limit of @ap downward. Note that this
1726 * function only adjusts the limit. The change must be applied
1727 * using sata_set_spd().
1730 * Inherited from caller.
1733 * 0 on success, negative errno on failure
1735 int sata_down_spd_limit(struct ata_port *ap)
1737 u32 sstatus, spd, mask;
1740 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
1744 mask = ap->sata_spd_limit;
1747 highbit = fls(mask) - 1;
1748 mask &= ~(1 << highbit);
1750 spd = (sstatus >> 4) & 0xf;
1754 mask &= (1 << spd) - 1;
1758 ap->sata_spd_limit = mask;
1760 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
1761 sata_spd_string(fls(mask)));
1766 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1770 if (ap->sata_spd_limit == UINT_MAX)
1773 limit = fls(ap->sata_spd_limit);
1775 spd = (*scontrol >> 4) & 0xf;
1776 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1778 return spd != limit;
1782 * sata_set_spd_needed - is SATA spd configuration needed
1783 * @ap: Port in question
1785 * Test whether the spd limit in SControl matches
1786 * @ap->sata_spd_limit. This function is used to determine
1787 * whether hardreset is necessary to apply SATA spd
1791 * Inherited from caller.
1794 * 1 if SATA spd configuration is needed, 0 otherwise.
1796 int sata_set_spd_needed(struct ata_port *ap)
1800 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
1803 return __sata_set_spd_needed(ap, &scontrol);
1807 * sata_set_spd - set SATA spd according to spd limit
1808 * @ap: Port to set SATA spd for
1810 * Set SATA spd of @ap according to sata_spd_limit.
1813 * Inherited from caller.
1816 * 0 if spd doesn't need to be changed, 1 if spd has been
1817 * changed. Negative errno if SCR registers are inaccessible.
1819 int sata_set_spd(struct ata_port *ap)
1824 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
1827 if (!__sata_set_spd_needed(ap, &scontrol))
1830 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
1837 * This mode timing computation functionality is ported over from
1838 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1841 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1842 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1843 * for PIO 5, which is a nonstandard extension and UDMA6, which
1844 * is currently supported only by Maxtor drives.
1847 static const struct ata_timing ata_timing[] = {
1849 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1850 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1851 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1852 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1854 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1855 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1856 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1858 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1860 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1861 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1862 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1864 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1865 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1866 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1868 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1869 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1870 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1872 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1873 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1874 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1876 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1881 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1882 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1884 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1886 q->setup = EZ(t->setup * 1000, T);
1887 q->act8b = EZ(t->act8b * 1000, T);
1888 q->rec8b = EZ(t->rec8b * 1000, T);
1889 q->cyc8b = EZ(t->cyc8b * 1000, T);
1890 q->active = EZ(t->active * 1000, T);
1891 q->recover = EZ(t->recover * 1000, T);
1892 q->cycle = EZ(t->cycle * 1000, T);
1893 q->udma = EZ(t->udma * 1000, UT);
1896 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1897 struct ata_timing *m, unsigned int what)
1899 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1900 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1901 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1902 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1903 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1904 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1905 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1906 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1909 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1911 const struct ata_timing *t;
1913 for (t = ata_timing; t->mode != speed; t++)
1914 if (t->mode == 0xFF)
1919 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1920 struct ata_timing *t, int T, int UT)
1922 const struct ata_timing *s;
1923 struct ata_timing p;
1929 if (!(s = ata_timing_find_mode(speed)))
1932 memcpy(t, s, sizeof(*s));
1935 * If the drive is an EIDE drive, it can tell us it needs extended
1936 * PIO/MW_DMA cycle timing.
1939 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1940 memset(&p, 0, sizeof(p));
1941 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1942 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1943 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1944 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1945 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1947 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1951 * Convert the timing to bus clock counts.
1954 ata_timing_quantize(t, t, T, UT);
1957 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1958 * S.M.A.R.T * and some other commands. We have to ensure that the
1959 * DMA cycle timing is slower/equal than the fastest PIO timing.
1962 if (speed > XFER_PIO_4) {
1963 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1964 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1968 * Lengthen active & recovery time so that cycle time is correct.
1971 if (t->act8b + t->rec8b < t->cyc8b) {
1972 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1973 t->rec8b = t->cyc8b - t->act8b;
1976 if (t->active + t->recover < t->cycle) {
1977 t->active += (t->cycle - (t->active + t->recover)) / 2;
1978 t->recover = t->cycle - t->active;
1985 * ata_down_xfermask_limit - adjust dev xfer masks downward
1986 * @dev: Device to adjust xfer masks
1987 * @force_pio0: Force PIO0
1989 * Adjust xfer masks of @dev downward. Note that this function
1990 * does not apply the change. Invoking ata_set_mode() afterwards
1991 * will apply the limit.
1994 * Inherited from caller.
1997 * 0 on success, negative errno on failure
1999 int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
2001 unsigned long xfer_mask;
2004 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2009 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2010 if (xfer_mask & ATA_MASK_UDMA)
2011 xfer_mask &= ~ATA_MASK_MWDMA;
2013 highbit = fls(xfer_mask) - 1;
2014 xfer_mask &= ~(1 << highbit);
2016 xfer_mask &= 1 << ATA_SHIFT_PIO;
2020 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2023 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2024 ata_mode_string(xfer_mask));
2032 static int ata_dev_set_mode(struct ata_device *dev)
2034 unsigned int err_mask;
2037 dev->flags &= ~ATA_DFLAG_PIO;
2038 if (dev->xfer_shift == ATA_SHIFT_PIO)
2039 dev->flags |= ATA_DFLAG_PIO;
2041 err_mask = ata_dev_set_xfermode(dev);
2043 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2044 "(err_mask=0x%x)\n", err_mask);
2048 rc = ata_dev_revalidate(dev, 0);
2052 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2053 dev->xfer_shift, (int)dev->xfer_mode);
2055 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2056 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2061 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2062 * @ap: port on which timings will be programmed
2063 * @r_failed_dev: out paramter for failed device
2065 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2066 * ata_set_mode() fails, pointer to the failing device is
2067 * returned in @r_failed_dev.
2070 * PCI/etc. bus probe sem.
2073 * 0 on success, negative errno otherwise
2075 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2077 struct ata_device *dev;
2078 int i, rc = 0, used_dma = 0, found = 0;
2080 /* has private set_mode? */
2081 if (ap->ops->set_mode) {
2082 /* FIXME: make ->set_mode handle no device case and
2083 * return error code and failing device on failure.
2085 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2086 if (ata_dev_enabled(&ap->device[i])) {
2087 ap->ops->set_mode(ap);
2094 /* step 1: calculate xfer_mask */
2095 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2096 unsigned int pio_mask, dma_mask;
2098 dev = &ap->device[i];
2100 if (!ata_dev_enabled(dev))
2103 ata_dev_xfermask(dev);
2105 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2106 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2107 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2108 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2117 /* step 2: always set host PIO timings */
2118 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2119 dev = &ap->device[i];
2120 if (!ata_dev_enabled(dev))
2123 if (!dev->pio_mode) {
2124 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2129 dev->xfer_mode = dev->pio_mode;
2130 dev->xfer_shift = ATA_SHIFT_PIO;
2131 if (ap->ops->set_piomode)
2132 ap->ops->set_piomode(ap, dev);
2135 /* step 3: set host DMA timings */
2136 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2137 dev = &ap->device[i];
2139 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2142 dev->xfer_mode = dev->dma_mode;
2143 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2144 if (ap->ops->set_dmamode)
2145 ap->ops->set_dmamode(ap, dev);
2148 /* step 4: update devices' xfer mode */
2149 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2150 dev = &ap->device[i];
2152 if (!ata_dev_enabled(dev))
2155 rc = ata_dev_set_mode(dev);
2160 /* Record simplex status. If we selected DMA then the other
2161 * host channels are not permitted to do so.
2163 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2164 ap->host_set->simplex_claimed = 1;
2166 /* step5: chip specific finalisation */
2167 if (ap->ops->post_set_mode)
2168 ap->ops->post_set_mode(ap);
2172 *r_failed_dev = dev;
2177 * ata_tf_to_host - issue ATA taskfile to host controller
2178 * @ap: port to which command is being issued
2179 * @tf: ATA taskfile register set
2181 * Issues ATA taskfile register set to ATA host controller,
2182 * with proper synchronization with interrupt handler and
2186 * spin_lock_irqsave(host_set lock)
2189 static inline void ata_tf_to_host(struct ata_port *ap,
2190 const struct ata_taskfile *tf)
2192 ap->ops->tf_load(ap, tf);
2193 ap->ops->exec_command(ap, tf);
2197 * ata_busy_sleep - sleep until BSY clears, or timeout
2198 * @ap: port containing status register to be polled
2199 * @tmout_pat: impatience timeout
2200 * @tmout: overall timeout
2202 * Sleep until ATA Status register bit BSY clears,
2203 * or a timeout occurs.
2208 unsigned int ata_busy_sleep (struct ata_port *ap,
2209 unsigned long tmout_pat, unsigned long tmout)
2211 unsigned long timer_start, timeout;
2214 status = ata_busy_wait(ap, ATA_BUSY, 300);
2215 timer_start = jiffies;
2216 timeout = timer_start + tmout_pat;
2217 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2219 status = ata_busy_wait(ap, ATA_BUSY, 3);
2222 if (status & ATA_BUSY)
2223 ata_port_printk(ap, KERN_WARNING,
2224 "port is slow to respond, please be patient\n");
2226 timeout = timer_start + tmout;
2227 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2229 status = ata_chk_status(ap);
2232 if (status & ATA_BUSY) {
2233 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2234 "(%lu secs)\n", tmout / HZ);
2241 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2243 struct ata_ioports *ioaddr = &ap->ioaddr;
2244 unsigned int dev0 = devmask & (1 << 0);
2245 unsigned int dev1 = devmask & (1 << 1);
2246 unsigned long timeout;
2248 /* if device 0 was found in ata_devchk, wait for its
2252 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2254 /* if device 1 was found in ata_devchk, wait for
2255 * register access, then wait for BSY to clear
2257 timeout = jiffies + ATA_TMOUT_BOOT;
2261 ap->ops->dev_select(ap, 1);
2262 if (ap->flags & ATA_FLAG_MMIO) {
2263 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2264 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2266 nsect = inb(ioaddr->nsect_addr);
2267 lbal = inb(ioaddr->lbal_addr);
2269 if ((nsect == 1) && (lbal == 1))
2271 if (time_after(jiffies, timeout)) {
2275 msleep(50); /* give drive a breather */
2278 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2280 /* is all this really necessary? */
2281 ap->ops->dev_select(ap, 0);
2283 ap->ops->dev_select(ap, 1);
2285 ap->ops->dev_select(ap, 0);
2288 static unsigned int ata_bus_softreset(struct ata_port *ap,
2289 unsigned int devmask)
2291 struct ata_ioports *ioaddr = &ap->ioaddr;
2293 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2295 /* software reset. causes dev0 to be selected */
2296 if (ap->flags & ATA_FLAG_MMIO) {
2297 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2298 udelay(20); /* FIXME: flush */
2299 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2300 udelay(20); /* FIXME: flush */
2301 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2303 outb(ap->ctl, ioaddr->ctl_addr);
2305 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2307 outb(ap->ctl, ioaddr->ctl_addr);
2310 /* spec mandates ">= 2ms" before checking status.
2311 * We wait 150ms, because that was the magic delay used for
2312 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2313 * between when the ATA command register is written, and then
2314 * status is checked. Because waiting for "a while" before
2315 * checking status is fine, post SRST, we perform this magic
2316 * delay here as well.
2318 * Old drivers/ide uses the 2mS rule and then waits for ready
2322 /* Before we perform post reset processing we want to see if
2323 * the bus shows 0xFF because the odd clown forgets the D7
2324 * pulldown resistor.
2326 if (ata_check_status(ap) == 0xFF) {
2327 ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n");
2328 return AC_ERR_OTHER;
2331 ata_bus_post_reset(ap, devmask);
2337 * ata_bus_reset - reset host port and associated ATA channel
2338 * @ap: port to reset
2340 * This is typically the first time we actually start issuing
2341 * commands to the ATA channel. We wait for BSY to clear, then
2342 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2343 * result. Determine what devices, if any, are on the channel
2344 * by looking at the device 0/1 error register. Look at the signature
2345 * stored in each device's taskfile registers, to determine if
2346 * the device is ATA or ATAPI.
2349 * PCI/etc. bus probe sem.
2350 * Obtains host_set lock.
2353 * Sets ATA_FLAG_DISABLED if bus reset fails.
2356 void ata_bus_reset(struct ata_port *ap)
2358 struct ata_ioports *ioaddr = &ap->ioaddr;
2359 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2361 unsigned int dev0, dev1 = 0, devmask = 0;
2363 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2365 /* determine if device 0/1 are present */
2366 if (ap->flags & ATA_FLAG_SATA_RESET)
2369 dev0 = ata_devchk(ap, 0);
2371 dev1 = ata_devchk(ap, 1);
2375 devmask |= (1 << 0);
2377 devmask |= (1 << 1);
2379 /* select device 0 again */
2380 ap->ops->dev_select(ap, 0);
2382 /* issue bus reset */
2383 if (ap->flags & ATA_FLAG_SRST)
2384 if (ata_bus_softreset(ap, devmask))
2388 * determine by signature whether we have ATA or ATAPI devices
2390 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2391 if ((slave_possible) && (err != 0x81))
2392 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2394 /* re-enable interrupts */
2395 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2398 /* is double-select really necessary? */
2399 if (ap->device[1].class != ATA_DEV_NONE)
2400 ap->ops->dev_select(ap, 1);
2401 if (ap->device[0].class != ATA_DEV_NONE)
2402 ap->ops->dev_select(ap, 0);
2404 /* if no devices were detected, disable this port */
2405 if ((ap->device[0].class == ATA_DEV_NONE) &&
2406 (ap->device[1].class == ATA_DEV_NONE))
2409 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2410 /* set up device control for ATA_FLAG_SATA_RESET */
2411 if (ap->flags & ATA_FLAG_MMIO)
2412 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2414 outb(ap->ctl, ioaddr->ctl_addr);
2421 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2422 ap->ops->port_disable(ap);
2428 * sata_phy_debounce - debounce SATA phy status
2429 * @ap: ATA port to debounce SATA phy status for
2430 * @params: timing parameters { interval, duratinon, timeout } in msec
2432 * Make sure SStatus of @ap reaches stable state, determined by
2433 * holding the same value where DET is not 1 for @duration polled
2434 * every @interval, before @timeout. Timeout constraints the
2435 * beginning of the stable state. Because, after hot unplugging,
2436 * DET gets stuck at 1 on some controllers, this functions waits
2437 * until timeout then returns 0 if DET is stable at 1.
2440 * Kernel thread context (may sleep)
2443 * 0 on success, -errno on failure.
2445 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2447 unsigned long interval_msec = params[0];
2448 unsigned long duration = params[1] * HZ / 1000;
2449 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2450 unsigned long last_jiffies;
2454 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2459 last_jiffies = jiffies;
2462 msleep(interval_msec);
2463 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2469 if (cur == 1 && time_before(jiffies, timeout))
2471 if (time_after(jiffies, last_jiffies + duration))
2476 /* unstable, start over */
2478 last_jiffies = jiffies;
2481 if (time_after(jiffies, timeout))
2487 * sata_phy_resume - resume SATA phy
2488 * @ap: ATA port to resume SATA phy for
2489 * @params: timing parameters { interval, duratinon, timeout } in msec
2491 * Resume SATA phy of @ap and debounce it.
2494 * Kernel thread context (may sleep)
2497 * 0 on success, -errno on failure.
2499 int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2504 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2507 scontrol = (scontrol & 0x0f0) | 0x300;
2509 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2512 /* Some PHYs react badly if SStatus is pounded immediately
2513 * after resuming. Delay 200ms before debouncing.
2517 return sata_phy_debounce(ap, params);
2520 static void ata_wait_spinup(struct ata_port *ap)
2522 struct ata_eh_context *ehc = &ap->eh_context;
2523 unsigned long end, secs;
2526 /* first, debounce phy if SATA */
2527 if (ap->cbl == ATA_CBL_SATA) {
2528 rc = sata_phy_debounce(ap, sata_deb_timing_eh);
2530 /* if debounced successfully and offline, no need to wait */
2531 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2535 /* okay, let's give the drive time to spin up */
2536 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2537 secs = ((end - jiffies) + HZ - 1) / HZ;
2539 if (time_after(jiffies, end))
2543 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2544 "(%lu secs)\n", secs);
2546 schedule_timeout_uninterruptible(end - jiffies);
2550 * ata_std_prereset - prepare for reset
2551 * @ap: ATA port to be reset
2553 * @ap is about to be reset. Initialize it.
2556 * Kernel thread context (may sleep)
2559 * 0 on success, -errno otherwise.
2561 int ata_std_prereset(struct ata_port *ap)
2563 struct ata_eh_context *ehc = &ap->eh_context;
2564 const unsigned long *timing;
2568 if (ehc->i.flags & ATA_EHI_HOTPLUGGED) {
2569 if (ap->flags & ATA_FLAG_HRST_TO_RESUME)
2570 ehc->i.action |= ATA_EH_HARDRESET;
2571 if (ap->flags & ATA_FLAG_SKIP_D2H_BSY)
2572 ata_wait_spinup(ap);
2575 /* if we're about to do hardreset, nothing more to do */
2576 if (ehc->i.action & ATA_EH_HARDRESET)
2579 /* if SATA, resume phy */
2580 if (ap->cbl == ATA_CBL_SATA) {
2581 if (ap->flags & ATA_FLAG_LOADING)
2582 timing = sata_deb_timing_boot;
2584 timing = sata_deb_timing_eh;
2586 rc = sata_phy_resume(ap, timing);
2587 if (rc && rc != -EOPNOTSUPP) {
2588 /* phy resume failed */
2589 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2590 "link for reset (errno=%d)\n", rc);
2595 /* Wait for !BSY if the controller can wait for the first D2H
2596 * Reg FIS and we don't know that no device is attached.
2598 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2599 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2605 * ata_std_softreset - reset host port via ATA SRST
2606 * @ap: port to reset
2607 * @classes: resulting classes of attached devices
2609 * Reset host port using ATA SRST.
2612 * Kernel thread context (may sleep)
2615 * 0 on success, -errno otherwise.
2617 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2619 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2620 unsigned int devmask = 0, err_mask;
2625 if (ata_port_offline(ap)) {
2626 classes[0] = ATA_DEV_NONE;
2630 /* determine if device 0/1 are present */
2631 if (ata_devchk(ap, 0))
2632 devmask |= (1 << 0);
2633 if (slave_possible && ata_devchk(ap, 1))
2634 devmask |= (1 << 1);
2636 /* select device 0 again */
2637 ap->ops->dev_select(ap, 0);
2639 /* issue bus reset */
2640 DPRINTK("about to softreset, devmask=%x\n", devmask);
2641 err_mask = ata_bus_softreset(ap, devmask);
2643 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2648 /* determine by signature whether we have ATA or ATAPI devices */
2649 classes[0] = ata_dev_try_classify(ap, 0, &err);
2650 if (slave_possible && err != 0x81)
2651 classes[1] = ata_dev_try_classify(ap, 1, &err);
2654 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2659 * sata_std_hardreset - reset host port via SATA phy reset
2660 * @ap: port to reset
2661 * @class: resulting class of attached device
2663 * SATA phy-reset host port using DET bits of SControl register.
2666 * Kernel thread context (may sleep)
2669 * 0 on success, -errno otherwise.
2671 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
2678 if (sata_set_spd_needed(ap)) {
2679 /* SATA spec says nothing about how to reconfigure
2680 * spd. To be on the safe side, turn off phy during
2681 * reconfiguration. This works for at least ICH7 AHCI
2684 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2687 scontrol = (scontrol & 0x0f0) | 0x302;
2689 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2695 /* issue phy wake/reset */
2696 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2699 scontrol = (scontrol & 0x0f0) | 0x301;
2701 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2704 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2705 * 10.4.2 says at least 1 ms.
2709 /* bring phy back */
2710 sata_phy_resume(ap, sata_deb_timing_eh);
2712 /* TODO: phy layer with polling, timeouts, etc. */
2713 if (ata_port_offline(ap)) {
2714 *class = ATA_DEV_NONE;
2715 DPRINTK("EXIT, link offline\n");
2719 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2720 ata_port_printk(ap, KERN_ERR,
2721 "COMRESET failed (device not ready)\n");
2725 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2727 *class = ata_dev_try_classify(ap, 0, NULL);
2729 DPRINTK("EXIT, class=%u\n", *class);
2734 * ata_std_postreset - standard postreset callback
2735 * @ap: the target ata_port
2736 * @classes: classes of attached devices
2738 * This function is invoked after a successful reset. Note that
2739 * the device might have been reset more than once using
2740 * different reset methods before postreset is invoked.
2743 * Kernel thread context (may sleep)
2745 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2751 /* print link status */
2752 sata_print_link_status(ap);
2755 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
2756 sata_scr_write(ap, SCR_ERROR, serror);
2758 /* re-enable interrupts */
2759 if (!ap->ops->error_handler) {
2760 /* FIXME: hack. create a hook instead */
2761 if (ap->ioaddr.ctl_addr)
2765 /* is double-select really necessary? */
2766 if (classes[0] != ATA_DEV_NONE)
2767 ap->ops->dev_select(ap, 1);
2768 if (classes[1] != ATA_DEV_NONE)
2769 ap->ops->dev_select(ap, 0);
2771 /* bail out if no device is present */
2772 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2773 DPRINTK("EXIT, no device\n");
2777 /* set up device control */
2778 if (ap->ioaddr.ctl_addr) {
2779 if (ap->flags & ATA_FLAG_MMIO)
2780 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2782 outb(ap->ctl, ap->ioaddr.ctl_addr);
2789 * ata_dev_same_device - Determine whether new ID matches configured device
2790 * @dev: device to compare against
2791 * @new_class: class of the new device
2792 * @new_id: IDENTIFY page of the new device
2794 * Compare @new_class and @new_id against @dev and determine
2795 * whether @dev is the device indicated by @new_class and
2802 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2804 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
2807 const u16 *old_id = dev->id;
2808 unsigned char model[2][41], serial[2][21];
2811 if (dev->class != new_class) {
2812 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
2813 dev->class, new_class);
2817 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2818 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2819 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2820 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2821 new_n_sectors = ata_id_n_sectors(new_id);
2823 if (strcmp(model[0], model[1])) {
2824 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
2825 "'%s' != '%s'\n", model[0], model[1]);
2829 if (strcmp(serial[0], serial[1])) {
2830 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
2831 "'%s' != '%s'\n", serial[0], serial[1]);
2835 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2836 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
2838 (unsigned long long)dev->n_sectors,
2839 (unsigned long long)new_n_sectors);
2847 * ata_dev_revalidate - Revalidate ATA device
2848 * @dev: device to revalidate
2849 * @post_reset: is this revalidation after reset?
2851 * Re-read IDENTIFY page and make sure @dev is still attached to
2855 * Kernel thread context (may sleep)
2858 * 0 on success, negative errno otherwise
2860 int ata_dev_revalidate(struct ata_device *dev, int post_reset)
2862 unsigned int class = dev->class;
2863 u16 *id = (void *)dev->ap->sector_buf;
2866 if (!ata_dev_enabled(dev)) {
2872 rc = ata_dev_read_id(dev, &class, post_reset, id);
2876 /* is the device still there? */
2877 if (!ata_dev_same_device(dev, class, id)) {
2882 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
2884 /* configure device according to the new ID */
2885 rc = ata_dev_configure(dev, 0);
2890 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
2894 static const char * const ata_dma_blacklist [] = {
2895 "WDC AC11000H", NULL,
2896 "WDC AC22100H", NULL,
2897 "WDC AC32500H", NULL,
2898 "WDC AC33100H", NULL,
2899 "WDC AC31600H", NULL,
2900 "WDC AC32100H", "24.09P07",
2901 "WDC AC23200L", "21.10N21",
2902 "Compaq CRD-8241B", NULL,
2907 "SanDisk SDP3B", NULL,
2908 "SanDisk SDP3B-64", NULL,
2909 "SANYO CD-ROM CRD", NULL,
2910 "HITACHI CDR-8", NULL,
2911 "HITACHI CDR-8335", NULL,
2912 "HITACHI CDR-8435", NULL,
2913 "Toshiba CD-ROM XM-6202B", NULL,
2914 "TOSHIBA CD-ROM XM-1702BC", NULL,
2916 "E-IDE CD-ROM CR-840", NULL,
2917 "CD-ROM Drive/F5A", NULL,
2918 "WPI CDD-820", NULL,
2919 "SAMSUNG CD-ROM SC-148C", NULL,
2920 "SAMSUNG CD-ROM SC", NULL,
2921 "SanDisk SDP3B-64", NULL,
2922 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2923 "_NEC DV5800A", NULL,
2924 "SAMSUNG CD-ROM SN-124", "N001"
2927 static int ata_strim(char *s, size_t len)
2929 len = strnlen(s, len);
2931 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2932 while ((len > 0) && (s[len - 1] == ' ')) {
2939 static int ata_dma_blacklisted(const struct ata_device *dev)
2941 unsigned char model_num[40];
2942 unsigned char model_rev[16];
2943 unsigned int nlen, rlen;
2946 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2948 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2950 nlen = ata_strim(model_num, sizeof(model_num));
2951 rlen = ata_strim(model_rev, sizeof(model_rev));
2953 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2954 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2955 if (ata_dma_blacklist[i+1] == NULL)
2957 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2965 * ata_dev_xfermask - Compute supported xfermask of the given device
2966 * @dev: Device to compute xfermask for
2968 * Compute supported xfermask of @dev and store it in
2969 * dev->*_mask. This function is responsible for applying all
2970 * known limits including host controller limits, device
2973 * FIXME: The current implementation limits all transfer modes to
2974 * the fastest of the lowested device on the port. This is not
2975 * required on most controllers.
2980 static void ata_dev_xfermask(struct ata_device *dev)
2982 struct ata_port *ap = dev->ap;
2983 struct ata_host_set *hs = ap->host_set;
2984 unsigned long xfer_mask;
2987 xfer_mask = ata_pack_xfermask(ap->pio_mask,
2988 ap->mwdma_mask, ap->udma_mask);
2990 /* Apply cable rule here. Don't apply it early because when
2991 * we handle hot plug the cable type can itself change.
2993 if (ap->cbl == ATA_CBL_PATA40)
2994 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
2996 /* FIXME: Use port-wide xfermask for now */
2997 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2998 struct ata_device *d = &ap->device[i];
3000 if (ata_dev_absent(d))
3003 if (ata_dev_disabled(d)) {
3004 /* to avoid violating device selection timing */
3005 xfer_mask &= ata_pack_xfermask(d->pio_mask,
3006 UINT_MAX, UINT_MAX);
3010 xfer_mask &= ata_pack_xfermask(d->pio_mask,
3011 d->mwdma_mask, d->udma_mask);
3012 xfer_mask &= ata_id_xfermask(d->id);
3013 if (ata_dma_blacklisted(d))
3014 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3017 if (ata_dma_blacklisted(dev))
3018 ata_dev_printk(dev, KERN_WARNING,
3019 "device is on DMA blacklist, disabling DMA\n");
3021 if (hs->flags & ATA_HOST_SIMPLEX) {
3022 if (hs->simplex_claimed)
3023 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3026 if (ap->ops->mode_filter)
3027 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3029 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3030 &dev->mwdma_mask, &dev->udma_mask);
3034 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3035 * @dev: Device to which command will be sent
3037 * Issue SET FEATURES - XFER MODE command to device @dev
3041 * PCI/etc. bus probe sem.
3044 * 0 on success, AC_ERR_* mask otherwise.
3047 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3049 struct ata_taskfile tf;
3050 unsigned int err_mask;
3052 /* set up set-features taskfile */
3053 DPRINTK("set features - xfer mode\n");
3055 ata_tf_init(dev, &tf);
3056 tf.command = ATA_CMD_SET_FEATURES;
3057 tf.feature = SETFEATURES_XFER;
3058 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3059 tf.protocol = ATA_PROT_NODATA;
3060 tf.nsect = dev->xfer_mode;
3062 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3064 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3069 * ata_dev_init_params - Issue INIT DEV PARAMS command
3070 * @dev: Device to which command will be sent
3071 * @heads: Number of heads (taskfile parameter)
3072 * @sectors: Number of sectors (taskfile parameter)
3075 * Kernel thread context (may sleep)
3078 * 0 on success, AC_ERR_* mask otherwise.
3080 static unsigned int ata_dev_init_params(struct ata_device *dev,
3081 u16 heads, u16 sectors)
3083 struct ata_taskfile tf;
3084 unsigned int err_mask;
3086 /* Number of sectors per track 1-255. Number of heads 1-16 */
3087 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3088 return AC_ERR_INVALID;
3090 /* set up init dev params taskfile */
3091 DPRINTK("init dev params \n");
3093 ata_tf_init(dev, &tf);
3094 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3095 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3096 tf.protocol = ATA_PROT_NODATA;
3098 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3100 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3102 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3107 * ata_sg_clean - Unmap DMA memory associated with command
3108 * @qc: Command containing DMA memory to be released
3110 * Unmap all mapped DMA memory associated with this command.
3113 * spin_lock_irqsave(host_set lock)
3116 static void ata_sg_clean(struct ata_queued_cmd *qc)
3118 struct ata_port *ap = qc->ap;
3119 struct scatterlist *sg = qc->__sg;
3120 int dir = qc->dma_dir;
3121 void *pad_buf = NULL;
3123 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3124 WARN_ON(sg == NULL);
3126 if (qc->flags & ATA_QCFLAG_SINGLE)
3127 WARN_ON(qc->n_elem > 1);
3129 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3131 /* if we padded the buffer out to 32-bit bound, and data
3132 * xfer direction is from-device, we must copy from the
3133 * pad buffer back into the supplied buffer
3135 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3136 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3138 if (qc->flags & ATA_QCFLAG_SG) {
3140 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3141 /* restore last sg */
3142 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3144 struct scatterlist *psg = &qc->pad_sgent;
3145 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3146 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3147 kunmap_atomic(addr, KM_IRQ0);
3151 dma_unmap_single(ap->dev,
3152 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3155 sg->length += qc->pad_len;
3157 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3158 pad_buf, qc->pad_len);
3161 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3166 * ata_fill_sg - Fill PCI IDE PRD table
3167 * @qc: Metadata associated with taskfile to be transferred
3169 * Fill PCI IDE PRD (scatter-gather) table with segments
3170 * associated with the current disk command.
3173 * spin_lock_irqsave(host_set lock)
3176 static void ata_fill_sg(struct ata_queued_cmd *qc)
3178 struct ata_port *ap = qc->ap;
3179 struct scatterlist *sg;
3182 WARN_ON(qc->__sg == NULL);
3183 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3186 ata_for_each_sg(sg, qc) {
3190 /* determine if physical DMA addr spans 64K boundary.
3191 * Note h/w doesn't support 64-bit, so we unconditionally
3192 * truncate dma_addr_t to u32.
3194 addr = (u32) sg_dma_address(sg);
3195 sg_len = sg_dma_len(sg);
3198 offset = addr & 0xffff;
3200 if ((offset + sg_len) > 0x10000)
3201 len = 0x10000 - offset;
3203 ap->prd[idx].addr = cpu_to_le32(addr);
3204 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3205 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3214 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3217 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3218 * @qc: Metadata associated with taskfile to check
3220 * Allow low-level driver to filter ATA PACKET commands, returning
3221 * a status indicating whether or not it is OK to use DMA for the
3222 * supplied PACKET command.
3225 * spin_lock_irqsave(host_set lock)
3227 * RETURNS: 0 when ATAPI DMA can be used
3230 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3232 struct ata_port *ap = qc->ap;
3233 int rc = 0; /* Assume ATAPI DMA is OK by default */
3235 if (ap->ops->check_atapi_dma)
3236 rc = ap->ops->check_atapi_dma(qc);
3238 /* We don't support polling DMA.
3239 * Use PIO if the LLDD handles only interrupts in
3240 * the HSM_ST_LAST state and the ATAPI device
3241 * generates CDB interrupts.
3243 if ((ap->flags & ATA_FLAG_PIO_POLLING) &&
3244 (qc->dev->flags & ATA_DFLAG_CDB_INTR))
3250 * ata_qc_prep - Prepare taskfile for submission
3251 * @qc: Metadata associated with taskfile to be prepared
3253 * Prepare ATA taskfile for submission.
3256 * spin_lock_irqsave(host_set lock)
3258 void ata_qc_prep(struct ata_queued_cmd *qc)
3260 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3266 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3269 * ata_sg_init_one - Associate command with memory buffer
3270 * @qc: Command to be associated
3271 * @buf: Memory buffer
3272 * @buflen: Length of memory buffer, in bytes.
3274 * Initialize the data-related elements of queued_cmd @qc
3275 * to point to a single memory buffer, @buf of byte length @buflen.
3278 * spin_lock_irqsave(host_set lock)
3281 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3283 struct scatterlist *sg;
3285 qc->flags |= ATA_QCFLAG_SINGLE;
3287 memset(&qc->sgent, 0, sizeof(qc->sgent));
3288 qc->__sg = &qc->sgent;
3290 qc->orig_n_elem = 1;
3292 qc->nbytes = buflen;
3295 sg_init_one(sg, buf, buflen);
3299 * ata_sg_init - Associate command with scatter-gather table.
3300 * @qc: Command to be associated
3301 * @sg: Scatter-gather table.
3302 * @n_elem: Number of elements in s/g table.
3304 * Initialize the data-related elements of queued_cmd @qc
3305 * to point to a scatter-gather table @sg, containing @n_elem
3309 * spin_lock_irqsave(host_set lock)
3312 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3313 unsigned int n_elem)
3315 qc->flags |= ATA_QCFLAG_SG;
3317 qc->n_elem = n_elem;
3318 qc->orig_n_elem = n_elem;
3322 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3323 * @qc: Command with memory buffer to be mapped.
3325 * DMA-map the memory buffer associated with queued_cmd @qc.
3328 * spin_lock_irqsave(host_set lock)
3331 * Zero on success, negative on error.
3334 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3336 struct ata_port *ap = qc->ap;
3337 int dir = qc->dma_dir;
3338 struct scatterlist *sg = qc->__sg;
3339 dma_addr_t dma_address;
3342 /* we must lengthen transfers to end on a 32-bit boundary */
3343 qc->pad_len = sg->length & 3;
3345 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3346 struct scatterlist *psg = &qc->pad_sgent;
3348 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3350 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3352 if (qc->tf.flags & ATA_TFLAG_WRITE)
3353 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3356 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3357 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3359 sg->length -= qc->pad_len;
3360 if (sg->length == 0)
3363 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3364 sg->length, qc->pad_len);
3372 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3374 if (dma_mapping_error(dma_address)) {
3376 sg->length += qc->pad_len;
3380 sg_dma_address(sg) = dma_address;
3381 sg_dma_len(sg) = sg->length;
3384 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3385 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3391 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3392 * @qc: Command with scatter-gather table to be mapped.
3394 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3397 * spin_lock_irqsave(host_set lock)
3400 * Zero on success, negative on error.
3404 static int ata_sg_setup(struct ata_queued_cmd *qc)
3406 struct ata_port *ap = qc->ap;
3407 struct scatterlist *sg = qc->__sg;
3408 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3409 int n_elem, pre_n_elem, dir, trim_sg = 0;
3411 VPRINTK("ENTER, ata%u\n", ap->id);
3412 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3414 /* we must lengthen transfers to end on a 32-bit boundary */
3415 qc->pad_len = lsg->length & 3;
3417 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3418 struct scatterlist *psg = &qc->pad_sgent;
3419 unsigned int offset;
3421 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3423 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3426 * psg->page/offset are used to copy to-be-written
3427 * data in this function or read data in ata_sg_clean.
3429 offset = lsg->offset + lsg->length - qc->pad_len;
3430 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3431 psg->offset = offset_in_page(offset);
3433 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3434 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3435 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3436 kunmap_atomic(addr, KM_IRQ0);
3439 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3440 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3442 lsg->length -= qc->pad_len;
3443 if (lsg->length == 0)
3446 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3447 qc->n_elem - 1, lsg->length, qc->pad_len);
3450 pre_n_elem = qc->n_elem;
3451 if (trim_sg && pre_n_elem)
3460 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3462 /* restore last sg */
3463 lsg->length += qc->pad_len;
3467 DPRINTK("%d sg elements mapped\n", n_elem);
3470 qc->n_elem = n_elem;
3476 * swap_buf_le16 - swap halves of 16-bit words in place
3477 * @buf: Buffer to swap
3478 * @buf_words: Number of 16-bit words in buffer.
3480 * Swap halves of 16-bit words if needed to convert from
3481 * little-endian byte order to native cpu byte order, or
3485 * Inherited from caller.
3487 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3492 for (i = 0; i < buf_words; i++)
3493 buf[i] = le16_to_cpu(buf[i]);
3494 #endif /* __BIG_ENDIAN */
3498 * ata_mmio_data_xfer - Transfer data by MMIO
3499 * @adev: device for this I/O
3501 * @buflen: buffer length
3502 * @write_data: read/write
3504 * Transfer data from/to the device data register by MMIO.
3507 * Inherited from caller.
3510 void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
3511 unsigned int buflen, int write_data)
3513 struct ata_port *ap = adev->ap;
3515 unsigned int words = buflen >> 1;
3516 u16 *buf16 = (u16 *) buf;
3517 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3519 /* Transfer multiple of 2 bytes */
3521 for (i = 0; i < words; i++)
3522 writew(le16_to_cpu(buf16[i]), mmio);
3524 for (i = 0; i < words; i++)
3525 buf16[i] = cpu_to_le16(readw(mmio));
3528 /* Transfer trailing 1 byte, if any. */
3529 if (unlikely(buflen & 0x01)) {
3530 u16 align_buf[1] = { 0 };
3531 unsigned char *trailing_buf = buf + buflen - 1;
3534 memcpy(align_buf, trailing_buf, 1);
3535 writew(le16_to_cpu(align_buf[0]), mmio);
3537 align_buf[0] = cpu_to_le16(readw(mmio));
3538 memcpy(trailing_buf, align_buf, 1);
3544 * ata_pio_data_xfer - Transfer data by PIO
3545 * @adev: device to target
3547 * @buflen: buffer length
3548 * @write_data: read/write
3550 * Transfer data from/to the device data register by PIO.
3553 * Inherited from caller.
3556 void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
3557 unsigned int buflen, int write_data)
3559 struct ata_port *ap = adev->ap;
3560 unsigned int words = buflen >> 1;
3562 /* Transfer multiple of 2 bytes */
3564 outsw(ap->ioaddr.data_addr, buf, words);
3566 insw(ap->ioaddr.data_addr, buf, words);
3568 /* Transfer trailing 1 byte, if any. */
3569 if (unlikely(buflen & 0x01)) {
3570 u16 align_buf[1] = { 0 };
3571 unsigned char *trailing_buf = buf + buflen - 1;
3574 memcpy(align_buf, trailing_buf, 1);
3575 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3577 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3578 memcpy(trailing_buf, align_buf, 1);
3584 * ata_pio_data_xfer_noirq - Transfer data by PIO
3585 * @adev: device to target
3587 * @buflen: buffer length
3588 * @write_data: read/write
3590 * Transfer data from/to the device data register by PIO. Do the
3591 * transfer with interrupts disabled.
3594 * Inherited from caller.
3597 void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3598 unsigned int buflen, int write_data)
3600 unsigned long flags;
3601 local_irq_save(flags);
3602 ata_pio_data_xfer(adev, buf, buflen, write_data);
3603 local_irq_restore(flags);
3608 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3609 * @qc: Command on going
3611 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3614 * Inherited from caller.
3617 static void ata_pio_sector(struct ata_queued_cmd *qc)
3619 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3620 struct scatterlist *sg = qc->__sg;
3621 struct ata_port *ap = qc->ap;
3623 unsigned int offset;
3626 if (qc->cursect == (qc->nsect - 1))
3627 ap->hsm_task_state = HSM_ST_LAST;
3629 page = sg[qc->cursg].page;
3630 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3632 /* get the current page and offset */
3633 page = nth_page(page, (offset >> PAGE_SHIFT));
3634 offset %= PAGE_SIZE;
3636 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3638 if (PageHighMem(page)) {
3639 unsigned long flags;
3641 /* FIXME: use a bounce buffer */
3642 local_irq_save(flags);
3643 buf = kmap_atomic(page, KM_IRQ0);
3645 /* do the actual data transfer */
3646 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3648 kunmap_atomic(buf, KM_IRQ0);
3649 local_irq_restore(flags);
3651 buf = page_address(page);
3652 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3658 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3665 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3666 * @qc: Command on going
3668 * Transfer one or many ATA_SECT_SIZE of data from/to the
3669 * ATA device for the DRQ request.
3672 * Inherited from caller.
3675 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3677 if (is_multi_taskfile(&qc->tf)) {
3678 /* READ/WRITE MULTIPLE */
3681 WARN_ON(qc->dev->multi_count == 0);
3683 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3691 * atapi_send_cdb - Write CDB bytes to hardware
3692 * @ap: Port to which ATAPI device is attached.
3693 * @qc: Taskfile currently active
3695 * When device has indicated its readiness to accept
3696 * a CDB, this function is called. Send the CDB.
3702 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3705 DPRINTK("send cdb\n");
3706 WARN_ON(qc->dev->cdb_len < 12);
3708 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
3709 ata_altstatus(ap); /* flush */
3711 switch (qc->tf.protocol) {
3712 case ATA_PROT_ATAPI:
3713 ap->hsm_task_state = HSM_ST;
3715 case ATA_PROT_ATAPI_NODATA:
3716 ap->hsm_task_state = HSM_ST_LAST;
3718 case ATA_PROT_ATAPI_DMA:
3719 ap->hsm_task_state = HSM_ST_LAST;
3720 /* initiate bmdma */
3721 ap->ops->bmdma_start(qc);
3727 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3728 * @qc: Command on going
3729 * @bytes: number of bytes
3731 * Transfer Transfer data from/to the ATAPI device.
3734 * Inherited from caller.
3738 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3740 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3741 struct scatterlist *sg = qc->__sg;
3742 struct ata_port *ap = qc->ap;
3745 unsigned int offset, count;
3747 if (qc->curbytes + bytes >= qc->nbytes)
3748 ap->hsm_task_state = HSM_ST_LAST;
3751 if (unlikely(qc->cursg >= qc->n_elem)) {
3753 * The end of qc->sg is reached and the device expects
3754 * more data to transfer. In order not to overrun qc->sg
3755 * and fulfill length specified in the byte count register,
3756 * - for read case, discard trailing data from the device
3757 * - for write case, padding zero data to the device
3759 u16 pad_buf[1] = { 0 };
3760 unsigned int words = bytes >> 1;
3763 if (words) /* warning if bytes > 1 */
3764 ata_dev_printk(qc->dev, KERN_WARNING,
3765 "%u bytes trailing data\n", bytes);
3767 for (i = 0; i < words; i++)
3768 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
3770 ap->hsm_task_state = HSM_ST_LAST;
3774 sg = &qc->__sg[qc->cursg];
3777 offset = sg->offset + qc->cursg_ofs;
3779 /* get the current page and offset */
3780 page = nth_page(page, (offset >> PAGE_SHIFT));
3781 offset %= PAGE_SIZE;
3783 /* don't overrun current sg */
3784 count = min(sg->length - qc->cursg_ofs, bytes);
3786 /* don't cross page boundaries */
3787 count = min(count, (unsigned int)PAGE_SIZE - offset);
3789 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3791 if (PageHighMem(page)) {
3792 unsigned long flags;
3794 /* FIXME: use bounce buffer */
3795 local_irq_save(flags);
3796 buf = kmap_atomic(page, KM_IRQ0);
3798 /* do the actual data transfer */
3799 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
3801 kunmap_atomic(buf, KM_IRQ0);
3802 local_irq_restore(flags);
3804 buf = page_address(page);
3805 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
3809 qc->curbytes += count;
3810 qc->cursg_ofs += count;
3812 if (qc->cursg_ofs == sg->length) {
3822 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3823 * @qc: Command on going
3825 * Transfer Transfer data from/to the ATAPI device.
3828 * Inherited from caller.
3831 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3833 struct ata_port *ap = qc->ap;
3834 struct ata_device *dev = qc->dev;
3835 unsigned int ireason, bc_lo, bc_hi, bytes;
3836 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3838 /* Abuse qc->result_tf for temp storage of intermediate TF
3839 * here to save some kernel stack usage.
3840 * For normal completion, qc->result_tf is not relevant. For
3841 * error, qc->result_tf is later overwritten by ata_qc_complete().
3842 * So, the correctness of qc->result_tf is not affected.
3844 ap->ops->tf_read(ap, &qc->result_tf);
3845 ireason = qc->result_tf.nsect;
3846 bc_lo = qc->result_tf.lbam;
3847 bc_hi = qc->result_tf.lbah;
3848 bytes = (bc_hi << 8) | bc_lo;
3850 /* shall be cleared to zero, indicating xfer of data */
3851 if (ireason & (1 << 0))
3854 /* make sure transfer direction matches expected */
3855 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3856 if (do_write != i_write)
3859 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3861 __atapi_pio_bytes(qc, bytes);
3866 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
3867 qc->err_mask |= AC_ERR_HSM;
3868 ap->hsm_task_state = HSM_ST_ERR;
3872 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
3873 * @ap: the target ata_port
3877 * 1 if ok in workqueue, 0 otherwise.
3880 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
3882 if (qc->tf.flags & ATA_TFLAG_POLLING)
3885 if (ap->hsm_task_state == HSM_ST_FIRST) {
3886 if (qc->tf.protocol == ATA_PROT_PIO &&
3887 (qc->tf.flags & ATA_TFLAG_WRITE))
3890 if (is_atapi_taskfile(&qc->tf) &&
3891 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
3899 * ata_hsm_qc_complete - finish a qc running on standard HSM
3900 * @qc: Command to complete
3901 * @in_wq: 1 if called from workqueue, 0 otherwise
3903 * Finish @qc which is running on standard HSM.
3906 * If @in_wq is zero, spin_lock_irqsave(host_set lock).
3907 * Otherwise, none on entry and grabs host lock.
3909 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
3911 struct ata_port *ap = qc->ap;
3912 unsigned long flags;
3914 if (ap->ops->error_handler) {
3916 spin_lock_irqsave(&ap->host_set->lock, flags);
3918 /* EH might have kicked in while host_set lock
3921 qc = ata_qc_from_tag(ap, qc->tag);
3923 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
3925 ata_qc_complete(qc);
3927 ata_port_freeze(ap);
3930 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3932 if (likely(!(qc->err_mask & AC_ERR_HSM)))
3933 ata_qc_complete(qc);
3935 ata_port_freeze(ap);
3939 spin_lock_irqsave(&ap->host_set->lock, flags);
3941 ata_qc_complete(qc);
3942 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3944 ata_qc_complete(qc);
3947 ata_altstatus(ap); /* flush */
3951 * ata_hsm_move - move the HSM to the next state.
3952 * @ap: the target ata_port
3954 * @status: current device status
3955 * @in_wq: 1 if called from workqueue, 0 otherwise
3958 * 1 when poll next status needed, 0 otherwise.
3960 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
3961 u8 status, int in_wq)
3963 unsigned long flags = 0;
3966 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
3968 /* Make sure ata_qc_issue_prot() does not throw things
3969 * like DMA polling into the workqueue. Notice that
3970 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
3972 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
3975 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
3976 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
3978 switch (ap->hsm_task_state) {
3980 /* Send first data block or PACKET CDB */
3982 /* If polling, we will stay in the work queue after
3983 * sending the data. Otherwise, interrupt handler
3984 * takes over after sending the data.
3986 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
3988 /* check device status */
3989 if (unlikely((status & ATA_DRQ) == 0)) {
3990 /* handle BSY=0, DRQ=0 as error */
3991 if (likely(status & (ATA_ERR | ATA_DF)))
3992 /* device stops HSM for abort/error */
3993 qc->err_mask |= AC_ERR_DEV;
3995 /* HSM violation. Let EH handle this */
3996 qc->err_mask |= AC_ERR_HSM;
3998 ap->hsm_task_state = HSM_ST_ERR;
4002 /* Device should not ask for data transfer (DRQ=1)
4003 * when it finds something wrong.
4004 * We ignore DRQ here and stop the HSM by
4005 * changing hsm_task_state to HSM_ST_ERR and
4006 * let the EH abort the command or reset the device.
4008 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4009 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4011 qc->err_mask |= AC_ERR_HSM;
4012 ap->hsm_task_state = HSM_ST_ERR;
4016 /* Send the CDB (atapi) or the first data block (ata pio out).
4017 * During the state transition, interrupt handler shouldn't
4018 * be invoked before the data transfer is complete and
4019 * hsm_task_state is changed. Hence, the following locking.
4022 spin_lock_irqsave(&ap->host_set->lock, flags);
4024 if (qc->tf.protocol == ATA_PROT_PIO) {
4025 /* PIO data out protocol.
4026 * send first data block.
4029 /* ata_pio_sectors() might change the state
4030 * to HSM_ST_LAST. so, the state is changed here
4031 * before ata_pio_sectors().
4033 ap->hsm_task_state = HSM_ST;
4034 ata_pio_sectors(qc);
4035 ata_altstatus(ap); /* flush */
4038 atapi_send_cdb(ap, qc);
4041 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4043 /* if polling, ata_pio_task() handles the rest.
4044 * otherwise, interrupt handler takes over from here.
4049 /* complete command or read/write the data register */
4050 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4051 /* ATAPI PIO protocol */
4052 if ((status & ATA_DRQ) == 0) {
4053 /* No more data to transfer or device error.
4054 * Device error will be tagged in HSM_ST_LAST.
4056 ap->hsm_task_state = HSM_ST_LAST;
4060 /* Device should not ask for data transfer (DRQ=1)
4061 * when it finds something wrong.
4062 * We ignore DRQ here and stop the HSM by
4063 * changing hsm_task_state to HSM_ST_ERR and
4064 * let the EH abort the command or reset the device.
4066 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4067 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4069 qc->err_mask |= AC_ERR_HSM;
4070 ap->hsm_task_state = HSM_ST_ERR;
4074 atapi_pio_bytes(qc);
4076 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4077 /* bad ireason reported by device */
4081 /* ATA PIO protocol */
4082 if (unlikely((status & ATA_DRQ) == 0)) {
4083 /* handle BSY=0, DRQ=0 as error */
4084 if (likely(status & (ATA_ERR | ATA_DF)))
4085 /* device stops HSM for abort/error */
4086 qc->err_mask |= AC_ERR_DEV;
4088 /* HSM violation. Let EH handle this */
4089 qc->err_mask |= AC_ERR_HSM;
4091 ap->hsm_task_state = HSM_ST_ERR;
4095 /* For PIO reads, some devices may ask for
4096 * data transfer (DRQ=1) alone with ERR=1.
4097 * We respect DRQ here and transfer one
4098 * block of junk data before changing the
4099 * hsm_task_state to HSM_ST_ERR.
4101 * For PIO writes, ERR=1 DRQ=1 doesn't make
4102 * sense since the data block has been
4103 * transferred to the device.
4105 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4106 /* data might be corrputed */
4107 qc->err_mask |= AC_ERR_DEV;
4109 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4110 ata_pio_sectors(qc);
4112 status = ata_wait_idle(ap);
4115 if (status & (ATA_BUSY | ATA_DRQ))
4116 qc->err_mask |= AC_ERR_HSM;
4118 /* ata_pio_sectors() might change the
4119 * state to HSM_ST_LAST. so, the state
4120 * is changed after ata_pio_sectors().
4122 ap->hsm_task_state = HSM_ST_ERR;
4126 ata_pio_sectors(qc);
4128 if (ap->hsm_task_state == HSM_ST_LAST &&
4129 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4132 status = ata_wait_idle(ap);
4137 ata_altstatus(ap); /* flush */
4142 if (unlikely(!ata_ok(status))) {
4143 qc->err_mask |= __ac_err_mask(status);
4144 ap->hsm_task_state = HSM_ST_ERR;
4148 /* no more data to transfer */
4149 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4150 ap->id, qc->dev->devno, status);
4152 WARN_ON(qc->err_mask);
4154 ap->hsm_task_state = HSM_ST_IDLE;
4156 /* complete taskfile transaction */
4157 ata_hsm_qc_complete(qc, in_wq);
4163 /* make sure qc->err_mask is available to
4164 * know what's wrong and recover
4166 WARN_ON(qc->err_mask == 0);
4168 ap->hsm_task_state = HSM_ST_IDLE;
4170 /* complete taskfile transaction */
4171 ata_hsm_qc_complete(qc, in_wq);
4183 static void ata_pio_task(void *_data)
4185 struct ata_queued_cmd *qc = _data;
4186 struct ata_port *ap = qc->ap;
4191 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4194 * This is purely heuristic. This is a fast path.
4195 * Sometimes when we enter, BSY will be cleared in
4196 * a chk-status or two. If not, the drive is probably seeking
4197 * or something. Snooze for a couple msecs, then
4198 * chk-status again. If still busy, queue delayed work.
4200 status = ata_busy_wait(ap, ATA_BUSY, 5);
4201 if (status & ATA_BUSY) {
4203 status = ata_busy_wait(ap, ATA_BUSY, 10);
4204 if (status & ATA_BUSY) {
4205 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4211 poll_next = ata_hsm_move(ap, qc, status, 1);
4213 /* another command or interrupt handler
4214 * may be running at this point.
4221 * ata_qc_new - Request an available ATA command, for queueing
4222 * @ap: Port associated with device @dev
4223 * @dev: Device from whom we request an available command structure
4229 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4231 struct ata_queued_cmd *qc = NULL;
4234 /* no command while frozen */
4235 if (unlikely(ap->flags & ATA_FLAG_FROZEN))
4238 /* the last tag is reserved for internal command. */
4239 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4240 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4241 qc = __ata_qc_from_tag(ap, i);
4252 * ata_qc_new_init - Request an available ATA command, and initialize it
4253 * @dev: Device from whom we request an available command structure
4259 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4261 struct ata_port *ap = dev->ap;
4262 struct ata_queued_cmd *qc;
4264 qc = ata_qc_new(ap);
4277 * ata_qc_free - free unused ata_queued_cmd
4278 * @qc: Command to complete
4280 * Designed to free unused ata_queued_cmd object
4281 * in case something prevents using it.
4284 * spin_lock_irqsave(host_set lock)
4286 void ata_qc_free(struct ata_queued_cmd *qc)
4288 struct ata_port *ap = qc->ap;
4291 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4295 if (likely(ata_tag_valid(tag))) {
4296 qc->tag = ATA_TAG_POISON;
4297 clear_bit(tag, &ap->qc_allocated);
4301 void __ata_qc_complete(struct ata_queued_cmd *qc)
4303 struct ata_port *ap = qc->ap;
4305 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4306 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4308 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4311 /* command should be marked inactive atomically with qc completion */
4312 if (qc->tf.protocol == ATA_PROT_NCQ)
4313 ap->sactive &= ~(1 << qc->tag);
4315 ap->active_tag = ATA_TAG_POISON;
4317 /* atapi: mark qc as inactive to prevent the interrupt handler
4318 * from completing the command twice later, before the error handler
4319 * is called. (when rc != 0 and atapi request sense is needed)
4321 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4322 ap->qc_active &= ~(1 << qc->tag);
4324 /* call completion callback */
4325 qc->complete_fn(qc);
4329 * ata_qc_complete - Complete an active ATA command
4330 * @qc: Command to complete
4331 * @err_mask: ATA Status register contents
4333 * Indicate to the mid and upper layers that an ATA
4334 * command has completed, with either an ok or not-ok status.
4337 * spin_lock_irqsave(host_set lock)
4339 void ata_qc_complete(struct ata_queued_cmd *qc)
4341 struct ata_port *ap = qc->ap;
4343 /* XXX: New EH and old EH use different mechanisms to
4344 * synchronize EH with regular execution path.
4346 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4347 * Normal execution path is responsible for not accessing a
4348 * failed qc. libata core enforces the rule by returning NULL
4349 * from ata_qc_from_tag() for failed qcs.
4351 * Old EH depends on ata_qc_complete() nullifying completion
4352 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4353 * not synchronize with interrupt handler. Only PIO task is
4356 if (ap->ops->error_handler) {
4357 WARN_ON(ap->flags & ATA_FLAG_FROZEN);
4359 if (unlikely(qc->err_mask))
4360 qc->flags |= ATA_QCFLAG_FAILED;
4362 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4363 if (!ata_tag_internal(qc->tag)) {
4364 /* always fill result TF for failed qc */
4365 ap->ops->tf_read(ap, &qc->result_tf);
4366 ata_qc_schedule_eh(qc);
4371 /* read result TF if requested */
4372 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4373 ap->ops->tf_read(ap, &qc->result_tf);
4375 __ata_qc_complete(qc);
4377 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4380 /* read result TF if failed or requested */
4381 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4382 ap->ops->tf_read(ap, &qc->result_tf);
4384 __ata_qc_complete(qc);
4389 * ata_qc_complete_multiple - Complete multiple qcs successfully
4390 * @ap: port in question
4391 * @qc_active: new qc_active mask
4392 * @finish_qc: LLDD callback invoked before completing a qc
4394 * Complete in-flight commands. This functions is meant to be
4395 * called from low-level driver's interrupt routine to complete
4396 * requests normally. ap->qc_active and @qc_active is compared
4397 * and commands are completed accordingly.
4400 * spin_lock_irqsave(host_set lock)
4403 * Number of completed commands on success, -errno otherwise.
4405 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4406 void (*finish_qc)(struct ata_queued_cmd *))
4412 done_mask = ap->qc_active ^ qc_active;
4414 if (unlikely(done_mask & qc_active)) {
4415 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4416 "(%08x->%08x)\n", ap->qc_active, qc_active);
4420 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4421 struct ata_queued_cmd *qc;
4423 if (!(done_mask & (1 << i)))
4426 if ((qc = ata_qc_from_tag(ap, i))) {
4429 ata_qc_complete(qc);
4437 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4439 struct ata_port *ap = qc->ap;
4441 switch (qc->tf.protocol) {
4444 case ATA_PROT_ATAPI_DMA:
4447 case ATA_PROT_ATAPI:
4449 if (ap->flags & ATA_FLAG_PIO_DMA)
4462 * ata_qc_issue - issue taskfile to device
4463 * @qc: command to issue to device
4465 * Prepare an ATA command to submission to device.
4466 * This includes mapping the data into a DMA-able
4467 * area, filling in the S/G table, and finally
4468 * writing the taskfile to hardware, starting the command.
4471 * spin_lock_irqsave(host_set lock)
4473 void ata_qc_issue(struct ata_queued_cmd *qc)
4475 struct ata_port *ap = qc->ap;
4477 /* Make sure only one non-NCQ command is outstanding. The
4478 * check is skipped for old EH because it reuses active qc to
4479 * request ATAPI sense.
4481 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4483 if (qc->tf.protocol == ATA_PROT_NCQ) {
4484 WARN_ON(ap->sactive & (1 << qc->tag));
4485 ap->sactive |= 1 << qc->tag;
4487 WARN_ON(ap->sactive);
4488 ap->active_tag = qc->tag;
4491 qc->flags |= ATA_QCFLAG_ACTIVE;
4492 ap->qc_active |= 1 << qc->tag;
4494 if (ata_should_dma_map(qc)) {
4495 if (qc->flags & ATA_QCFLAG_SG) {
4496 if (ata_sg_setup(qc))
4498 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4499 if (ata_sg_setup_one(qc))
4503 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4506 ap->ops->qc_prep(qc);
4508 qc->err_mask |= ap->ops->qc_issue(qc);
4509 if (unlikely(qc->err_mask))
4514 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4515 qc->err_mask |= AC_ERR_SYSTEM;
4517 ata_qc_complete(qc);
4521 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4522 * @qc: command to issue to device
4524 * Using various libata functions and hooks, this function
4525 * starts an ATA command. ATA commands are grouped into
4526 * classes called "protocols", and issuing each type of protocol
4527 * is slightly different.
4529 * May be used as the qc_issue() entry in ata_port_operations.
4532 * spin_lock_irqsave(host_set lock)
4535 * Zero on success, AC_ERR_* mask on failure
4538 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4540 struct ata_port *ap = qc->ap;
4542 /* Use polling pio if the LLD doesn't handle
4543 * interrupt driven pio and atapi CDB interrupt.
4545 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4546 switch (qc->tf.protocol) {
4548 case ATA_PROT_ATAPI:
4549 case ATA_PROT_ATAPI_NODATA:
4550 qc->tf.flags |= ATA_TFLAG_POLLING;
4552 case ATA_PROT_ATAPI_DMA:
4553 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4554 /* see ata_check_atapi_dma() */
4562 /* select the device */
4563 ata_dev_select(ap, qc->dev->devno, 1, 0);
4565 /* start the command */
4566 switch (qc->tf.protocol) {
4567 case ATA_PROT_NODATA:
4568 if (qc->tf.flags & ATA_TFLAG_POLLING)
4569 ata_qc_set_polling(qc);
4571 ata_tf_to_host(ap, &qc->tf);
4572 ap->hsm_task_state = HSM_ST_LAST;
4574 if (qc->tf.flags & ATA_TFLAG_POLLING)
4575 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4580 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4582 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4583 ap->ops->bmdma_setup(qc); /* set up bmdma */
4584 ap->ops->bmdma_start(qc); /* initiate bmdma */
4585 ap->hsm_task_state = HSM_ST_LAST;
4589 if (qc->tf.flags & ATA_TFLAG_POLLING)
4590 ata_qc_set_polling(qc);
4592 ata_tf_to_host(ap, &qc->tf);
4594 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4595 /* PIO data out protocol */
4596 ap->hsm_task_state = HSM_ST_FIRST;
4597 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4599 /* always send first data block using
4600 * the ata_pio_task() codepath.
4603 /* PIO data in protocol */
4604 ap->hsm_task_state = HSM_ST;
4606 if (qc->tf.flags & ATA_TFLAG_POLLING)
4607 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4609 /* if polling, ata_pio_task() handles the rest.
4610 * otherwise, interrupt handler takes over from here.
4616 case ATA_PROT_ATAPI:
4617 case ATA_PROT_ATAPI_NODATA:
4618 if (qc->tf.flags & ATA_TFLAG_POLLING)
4619 ata_qc_set_polling(qc);
4621 ata_tf_to_host(ap, &qc->tf);
4623 ap->hsm_task_state = HSM_ST_FIRST;
4625 /* send cdb by polling if no cdb interrupt */
4626 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4627 (qc->tf.flags & ATA_TFLAG_POLLING))
4628 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4631 case ATA_PROT_ATAPI_DMA:
4632 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4634 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4635 ap->ops->bmdma_setup(qc); /* set up bmdma */
4636 ap->hsm_task_state = HSM_ST_FIRST;
4638 /* send cdb by polling if no cdb interrupt */
4639 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4640 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4645 return AC_ERR_SYSTEM;
4652 * ata_host_intr - Handle host interrupt for given (port, task)
4653 * @ap: Port on which interrupt arrived (possibly...)
4654 * @qc: Taskfile currently active in engine
4656 * Handle host interrupt for given queued command. Currently,
4657 * only DMA interrupts are handled. All other commands are
4658 * handled via polling with interrupts disabled (nIEN bit).
4661 * spin_lock_irqsave(host_set lock)
4664 * One if interrupt was handled, zero if not (shared irq).
4667 inline unsigned int ata_host_intr (struct ata_port *ap,
4668 struct ata_queued_cmd *qc)
4670 u8 status, host_stat = 0;
4672 VPRINTK("ata%u: protocol %d task_state %d\n",
4673 ap->id, qc->tf.protocol, ap->hsm_task_state);
4675 /* Check whether we are expecting interrupt in this state */
4676 switch (ap->hsm_task_state) {
4678 /* Some pre-ATAPI-4 devices assert INTRQ
4679 * at this state when ready to receive CDB.
4682 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4683 * The flag was turned on only for atapi devices.
4684 * No need to check is_atapi_taskfile(&qc->tf) again.
4686 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4690 if (qc->tf.protocol == ATA_PROT_DMA ||
4691 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4692 /* check status of DMA engine */
4693 host_stat = ap->ops->bmdma_status(ap);
4694 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4696 /* if it's not our irq... */
4697 if (!(host_stat & ATA_DMA_INTR))
4700 /* before we do anything else, clear DMA-Start bit */
4701 ap->ops->bmdma_stop(qc);
4703 if (unlikely(host_stat & ATA_DMA_ERR)) {
4704 /* error when transfering data to/from memory */
4705 qc->err_mask |= AC_ERR_HOST_BUS;
4706 ap->hsm_task_state = HSM_ST_ERR;
4716 /* check altstatus */
4717 status = ata_altstatus(ap);
4718 if (status & ATA_BUSY)
4721 /* check main status, clearing INTRQ */
4722 status = ata_chk_status(ap);
4723 if (unlikely(status & ATA_BUSY))
4726 /* ack bmdma irq events */
4727 ap->ops->irq_clear(ap);
4729 ata_hsm_move(ap, qc, status, 0);
4730 return 1; /* irq handled */
4733 ap->stats.idle_irq++;
4736 if ((ap->stats.idle_irq % 1000) == 0) {
4737 ata_irq_ack(ap, 0); /* debug trap */
4738 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
4742 return 0; /* irq not handled */
4746 * ata_interrupt - Default ATA host interrupt handler
4747 * @irq: irq line (unused)
4748 * @dev_instance: pointer to our ata_host_set information structure
4751 * Default interrupt handler for PCI IDE devices. Calls
4752 * ata_host_intr() for each port that is not disabled.
4755 * Obtains host_set lock during operation.
4758 * IRQ_NONE or IRQ_HANDLED.
4761 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4763 struct ata_host_set *host_set = dev_instance;
4765 unsigned int handled = 0;
4766 unsigned long flags;
4768 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4769 spin_lock_irqsave(&host_set->lock, flags);
4771 for (i = 0; i < host_set->n_ports; i++) {
4772 struct ata_port *ap;
4774 ap = host_set->ports[i];
4776 !(ap->flags & ATA_FLAG_DISABLED)) {
4777 struct ata_queued_cmd *qc;
4779 qc = ata_qc_from_tag(ap, ap->active_tag);
4780 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
4781 (qc->flags & ATA_QCFLAG_ACTIVE))
4782 handled |= ata_host_intr(ap, qc);
4786 spin_unlock_irqrestore(&host_set->lock, flags);
4788 return IRQ_RETVAL(handled);
4792 * sata_scr_valid - test whether SCRs are accessible
4793 * @ap: ATA port to test SCR accessibility for
4795 * Test whether SCRs are accessible for @ap.
4801 * 1 if SCRs are accessible, 0 otherwise.
4803 int sata_scr_valid(struct ata_port *ap)
4805 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
4809 * sata_scr_read - read SCR register of the specified port
4810 * @ap: ATA port to read SCR for
4812 * @val: Place to store read value
4814 * Read SCR register @reg of @ap into *@val. This function is
4815 * guaranteed to succeed if the cable type of the port is SATA
4816 * and the port implements ->scr_read.
4822 * 0 on success, negative errno on failure.
4824 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
4826 if (sata_scr_valid(ap)) {
4827 *val = ap->ops->scr_read(ap, reg);
4834 * sata_scr_write - write SCR register of the specified port
4835 * @ap: ATA port to write SCR for
4836 * @reg: SCR to write
4837 * @val: value to write
4839 * Write @val to SCR register @reg of @ap. This function is
4840 * guaranteed to succeed if the cable type of the port is SATA
4841 * and the port implements ->scr_read.
4847 * 0 on success, negative errno on failure.
4849 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
4851 if (sata_scr_valid(ap)) {
4852 ap->ops->scr_write(ap, reg, val);
4859 * sata_scr_write_flush - write SCR register of the specified port and flush
4860 * @ap: ATA port to write SCR for
4861 * @reg: SCR to write
4862 * @val: value to write
4864 * This function is identical to sata_scr_write() except that this
4865 * function performs flush after writing to the register.
4871 * 0 on success, negative errno on failure.
4873 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
4875 if (sata_scr_valid(ap)) {
4876 ap->ops->scr_write(ap, reg, val);
4877 ap->ops->scr_read(ap, reg);
4884 * ata_port_online - test whether the given port is online
4885 * @ap: ATA port to test
4887 * Test whether @ap is online. Note that this function returns 0
4888 * if online status of @ap cannot be obtained, so
4889 * ata_port_online(ap) != !ata_port_offline(ap).
4895 * 1 if the port online status is available and online.
4897 int ata_port_online(struct ata_port *ap)
4901 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
4907 * ata_port_offline - test whether the given port is offline
4908 * @ap: ATA port to test
4910 * Test whether @ap is offline. Note that this function returns
4911 * 0 if offline status of @ap cannot be obtained, so
4912 * ata_port_online(ap) != !ata_port_offline(ap).
4918 * 1 if the port offline status is available and offline.
4920 int ata_port_offline(struct ata_port *ap)
4924 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
4930 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4931 * without filling any other registers
4933 static int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
4935 struct ata_taskfile tf;
4938 ata_tf_init(dev, &tf);
4941 tf.flags |= ATA_TFLAG_DEVICE;
4942 tf.protocol = ATA_PROT_NODATA;
4944 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
4946 ata_dev_printk(dev, KERN_ERR, "%s: ata command failed: %d\n",
4952 static int ata_flush_cache(struct ata_device *dev)
4956 if (!ata_try_flush_cache(dev))
4959 if (ata_id_has_flush_ext(dev->id))
4960 cmd = ATA_CMD_FLUSH_EXT;
4962 cmd = ATA_CMD_FLUSH;
4964 return ata_do_simple_cmd(dev, cmd);
4967 static int ata_standby_drive(struct ata_device *dev)
4969 return ata_do_simple_cmd(dev, ATA_CMD_STANDBYNOW1);
4972 static int ata_start_drive(struct ata_device *dev)
4974 return ata_do_simple_cmd(dev, ATA_CMD_IDLEIMMEDIATE);
4978 * ata_device_resume - wakeup a previously suspended devices
4979 * @dev: the device to resume
4981 * Kick the drive back into action, by sending it an idle immediate
4982 * command and making sure its transfer mode matches between drive
4986 int ata_device_resume(struct ata_device *dev)
4988 struct ata_port *ap = dev->ap;
4990 if (ap->flags & ATA_FLAG_SUSPENDED) {
4991 struct ata_device *failed_dev;
4993 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
4994 ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 200000);
4996 ap->flags &= ~ATA_FLAG_SUSPENDED;
4997 while (ata_set_mode(ap, &failed_dev))
4998 ata_dev_disable(failed_dev);
5000 if (!ata_dev_enabled(dev))
5002 if (dev->class == ATA_DEV_ATA)
5003 ata_start_drive(dev);
5009 * ata_device_suspend - prepare a device for suspend
5010 * @dev: the device to suspend
5011 * @state: target power management state
5013 * Flush the cache on the drive, if appropriate, then issue a
5014 * standbynow command.
5016 int ata_device_suspend(struct ata_device *dev, pm_message_t state)
5018 struct ata_port *ap = dev->ap;
5020 if (!ata_dev_enabled(dev))
5022 if (dev->class == ATA_DEV_ATA)
5023 ata_flush_cache(dev);
5025 if (state.event != PM_EVENT_FREEZE)
5026 ata_standby_drive(dev);
5027 ap->flags |= ATA_FLAG_SUSPENDED;
5032 * ata_port_start - Set port up for dma.
5033 * @ap: Port to initialize
5035 * Called just after data structures for each port are
5036 * initialized. Allocates space for PRD table.
5038 * May be used as the port_start() entry in ata_port_operations.
5041 * Inherited from caller.
5044 int ata_port_start (struct ata_port *ap)
5046 struct device *dev = ap->dev;
5049 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
5053 rc = ata_pad_alloc(ap, dev);
5055 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5059 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
5066 * ata_port_stop - Undo ata_port_start()
5067 * @ap: Port to shut down
5069 * Frees the PRD table.
5071 * May be used as the port_stop() entry in ata_port_operations.
5074 * Inherited from caller.
5077 void ata_port_stop (struct ata_port *ap)
5079 struct device *dev = ap->dev;
5081 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5082 ata_pad_free(ap, dev);
5085 void ata_host_stop (struct ata_host_set *host_set)
5087 if (host_set->mmio_base)
5088 iounmap(host_set->mmio_base);
5093 * ata_host_remove - Unregister SCSI host structure with upper layers
5094 * @ap: Port to unregister
5095 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
5098 * Inherited from caller.
5101 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
5103 struct Scsi_Host *sh = ap->host;
5108 scsi_remove_host(sh);
5110 ap->ops->port_stop(ap);
5114 * ata_dev_init - Initialize an ata_device structure
5115 * @dev: Device structure to initialize
5117 * Initialize @dev in preparation for probing.
5120 * Inherited from caller.
5122 void ata_dev_init(struct ata_device *dev)
5124 struct ata_port *ap = dev->ap;
5125 unsigned long flags;
5127 /* SATA spd limit is bound to the first device */
5128 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5130 /* High bits of dev->flags are used to record warm plug
5131 * requests which occur asynchronously. Synchronize using
5134 spin_lock_irqsave(&ap->host_set->lock, flags);
5135 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5136 spin_unlock_irqrestore(&ap->host_set->lock, flags);
5138 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5139 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5140 dev->pio_mask = UINT_MAX;
5141 dev->mwdma_mask = UINT_MAX;
5142 dev->udma_mask = UINT_MAX;
5146 * ata_host_init - Initialize an ata_port structure
5147 * @ap: Structure to initialize
5148 * @host: associated SCSI mid-layer structure
5149 * @host_set: Collection of hosts to which @ap belongs
5150 * @ent: Probe information provided by low-level driver
5151 * @port_no: Port number associated with this ata_port
5153 * Initialize a new ata_port structure, and its associated
5157 * Inherited from caller.
5159 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
5160 struct ata_host_set *host_set,
5161 const struct ata_probe_ent *ent, unsigned int port_no)
5167 host->max_channel = 1;
5168 host->unique_id = ata_unique_id++;
5169 host->max_cmd_len = 12;
5171 ap->flags = ATA_FLAG_DISABLED;
5172 ap->id = host->unique_id;
5174 ap->ctl = ATA_DEVCTL_OBS;
5175 ap->host_set = host_set;
5177 ap->port_no = port_no;
5179 ent->legacy_mode ? ent->hard_port_no : port_no;
5180 ap->pio_mask = ent->pio_mask;
5181 ap->mwdma_mask = ent->mwdma_mask;
5182 ap->udma_mask = ent->udma_mask;
5183 ap->flags |= ent->host_flags;
5184 ap->ops = ent->port_ops;
5185 ap->hw_sata_spd_limit = UINT_MAX;
5186 ap->active_tag = ATA_TAG_POISON;
5187 ap->last_ctl = 0xFF;
5189 #if defined(ATA_VERBOSE_DEBUG)
5190 /* turn on all debugging levels */
5191 ap->msg_enable = 0x00FF;
5192 #elif defined(ATA_DEBUG)
5193 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5195 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR;
5198 INIT_WORK(&ap->port_task, NULL, NULL);
5199 INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap);
5200 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan, ap);
5201 INIT_LIST_HEAD(&ap->eh_done_q);
5202 init_waitqueue_head(&ap->eh_wait_q);
5204 /* set cable type */
5205 ap->cbl = ATA_CBL_NONE;
5206 if (ap->flags & ATA_FLAG_SATA)
5207 ap->cbl = ATA_CBL_SATA;
5209 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5210 struct ata_device *dev = &ap->device[i];
5217 ap->stats.unhandled_irq = 1;
5218 ap->stats.idle_irq = 1;
5221 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5225 * ata_host_add - Attach low-level ATA driver to system
5226 * @ent: Information provided by low-level driver
5227 * @host_set: Collections of ports to which we add
5228 * @port_no: Port number associated with this host
5230 * Attach low-level ATA driver to system.
5233 * PCI/etc. bus probe sem.
5236 * New ata_port on success, for NULL on error.
5239 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
5240 struct ata_host_set *host_set,
5241 unsigned int port_no)
5243 struct Scsi_Host *host;
5244 struct ata_port *ap;
5249 if (!ent->port_ops->error_handler &&
5250 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5251 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5256 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5260 host->transportt = &ata_scsi_transport_template;
5262 ap = ata_shost_to_port(host);
5264 ata_host_init(ap, host, host_set, ent, port_no);
5266 rc = ap->ops->port_start(ap);
5273 scsi_host_put(host);
5278 * ata_device_add - Register hardware device with ATA and SCSI layers
5279 * @ent: Probe information describing hardware device to be registered
5281 * This function processes the information provided in the probe
5282 * information struct @ent, allocates the necessary ATA and SCSI
5283 * host information structures, initializes them, and registers
5284 * everything with requisite kernel subsystems.
5286 * This function requests irqs, probes the ATA bus, and probes
5290 * PCI/etc. bus probe sem.
5293 * Number of ports registered. Zero on error (no ports registered).
5295 int ata_device_add(const struct ata_probe_ent *ent)
5297 unsigned int count = 0, i;
5298 struct device *dev = ent->dev;
5299 struct ata_host_set *host_set;
5303 /* alloc a container for our list of ATA ports (buses) */
5304 host_set = kzalloc(sizeof(struct ata_host_set) +
5305 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5308 spin_lock_init(&host_set->lock);
5310 host_set->dev = dev;
5311 host_set->n_ports = ent->n_ports;
5312 host_set->irq = ent->irq;
5313 host_set->mmio_base = ent->mmio_base;
5314 host_set->private_data = ent->private_data;
5315 host_set->ops = ent->port_ops;
5316 host_set->flags = ent->host_set_flags;
5318 /* register each port bound to this device */
5319 for (i = 0; i < ent->n_ports; i++) {
5320 struct ata_port *ap;
5321 unsigned long xfer_mode_mask;
5323 ap = ata_host_add(ent, host_set, i);
5327 host_set->ports[i] = ap;
5328 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5329 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5330 (ap->pio_mask << ATA_SHIFT_PIO);
5332 /* print per-port info to dmesg */
5333 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
5334 "ctl 0x%lX bmdma 0x%lX irq %lu\n",
5335 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5336 ata_mode_string(xfer_mode_mask),
5337 ap->ioaddr.cmd_addr,
5338 ap->ioaddr.ctl_addr,
5339 ap->ioaddr.bmdma_addr,
5343 host_set->ops->irq_clear(ap);
5344 ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
5351 /* obtain irq, that is shared between channels */
5352 rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
5353 DRV_NAME, host_set);
5355 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5360 /* perform each probe synchronously */
5361 DPRINTK("probe begin\n");
5362 for (i = 0; i < count; i++) {
5363 struct ata_port *ap;
5367 ap = host_set->ports[i];
5369 /* init sata_spd_limit to the current value */
5370 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5371 int spd = (scontrol >> 4) & 0xf;
5372 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5374 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5376 rc = scsi_add_host(ap->host, dev);
5378 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5379 /* FIXME: do something useful here */
5380 /* FIXME: handle unconditional calls to
5381 * scsi_scan_host and ata_host_remove, below,
5386 if (ap->ops->error_handler) {
5387 unsigned long flags;
5391 /* kick EH for boot probing */
5392 spin_lock_irqsave(&ap->host_set->lock, flags);
5394 ap->eh_info.probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5395 ap->eh_info.action |= ATA_EH_SOFTRESET;
5397 ap->flags |= ATA_FLAG_LOADING;
5398 ata_port_schedule_eh(ap);
5400 spin_unlock_irqrestore(&ap->host_set->lock, flags);
5402 /* wait for EH to finish */
5403 ata_port_wait_eh(ap);
5405 DPRINTK("ata%u: bus probe begin\n", ap->id);
5406 rc = ata_bus_probe(ap);
5407 DPRINTK("ata%u: bus probe end\n", ap->id);
5410 /* FIXME: do something useful here?
5411 * Current libata behavior will
5412 * tear down everything when
5413 * the module is removed
5414 * or the h/w is unplugged.
5420 /* probes are done, now scan each port's disk(s) */
5421 DPRINTK("host probe begin\n");
5422 for (i = 0; i < count; i++) {
5423 struct ata_port *ap = host_set->ports[i];
5425 ata_scsi_scan_host(ap);
5428 dev_set_drvdata(dev, host_set);
5430 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5431 return ent->n_ports; /* success */
5434 for (i = 0; i < count; i++) {
5435 ata_host_remove(host_set->ports[i], 1);
5436 scsi_host_put(host_set->ports[i]->host);
5440 VPRINTK("EXIT, returning 0\n");
5445 * ata_port_detach - Detach ATA port in prepration of device removal
5446 * @ap: ATA port to be detached
5448 * Detach all ATA devices and the associated SCSI devices of @ap;
5449 * then, remove the associated SCSI host. @ap is guaranteed to
5450 * be quiescent on return from this function.
5453 * Kernel thread context (may sleep).
5455 void ata_port_detach(struct ata_port *ap)
5457 unsigned long flags;
5460 if (!ap->ops->error_handler)
5463 /* tell EH we're leaving & flush EH */
5464 spin_lock_irqsave(&ap->host_set->lock, flags);
5465 ap->flags |= ATA_FLAG_UNLOADING;
5466 spin_unlock_irqrestore(&ap->host_set->lock, flags);
5468 ata_port_wait_eh(ap);
5470 /* EH is now guaranteed to see UNLOADING, so no new device
5471 * will be attached. Disable all existing devices.
5473 spin_lock_irqsave(&ap->host_set->lock, flags);
5475 for (i = 0; i < ATA_MAX_DEVICES; i++)
5476 ata_dev_disable(&ap->device[i]);
5478 spin_unlock_irqrestore(&ap->host_set->lock, flags);
5480 /* Final freeze & EH. All in-flight commands are aborted. EH
5481 * will be skipped and retrials will be terminated with bad
5484 spin_lock_irqsave(&ap->host_set->lock, flags);
5485 ata_port_freeze(ap); /* won't be thawed */
5486 spin_unlock_irqrestore(&ap->host_set->lock, flags);
5488 ata_port_wait_eh(ap);
5490 /* Flush hotplug task. The sequence is similar to
5491 * ata_port_flush_task().
5493 flush_workqueue(ata_aux_wq);
5494 cancel_delayed_work(&ap->hotplug_task);
5495 flush_workqueue(ata_aux_wq);
5497 /* remove the associated SCSI host */
5498 scsi_remove_host(ap->host);
5502 * ata_host_set_remove - PCI layer callback for device removal
5503 * @host_set: ATA host set that was removed
5505 * Unregister all objects associated with this host set. Free those
5509 * Inherited from calling layer (may sleep).
5512 void ata_host_set_remove(struct ata_host_set *host_set)
5516 for (i = 0; i < host_set->n_ports; i++)
5517 ata_port_detach(host_set->ports[i]);
5519 free_irq(host_set->irq, host_set);
5521 for (i = 0; i < host_set->n_ports; i++) {
5522 struct ata_port *ap = host_set->ports[i];
5524 ata_scsi_release(ap->host);
5526 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
5527 struct ata_ioports *ioaddr = &ap->ioaddr;
5529 if (ioaddr->cmd_addr == 0x1f0)
5530 release_region(0x1f0, 8);
5531 else if (ioaddr->cmd_addr == 0x170)
5532 release_region(0x170, 8);
5535 scsi_host_put(ap->host);
5538 if (host_set->ops->host_stop)
5539 host_set->ops->host_stop(host_set);
5545 * ata_scsi_release - SCSI layer callback hook for host unload
5546 * @host: libata host to be unloaded
5548 * Performs all duties necessary to shut down a libata port...
5549 * Kill port kthread, disable port, and release resources.
5552 * Inherited from SCSI layer.
5558 int ata_scsi_release(struct Scsi_Host *host)
5560 struct ata_port *ap = ata_shost_to_port(host);
5564 ap->ops->port_disable(ap);
5565 ata_host_remove(ap, 0);
5572 * ata_std_ports - initialize ioaddr with standard port offsets.
5573 * @ioaddr: IO address structure to be initialized
5575 * Utility function which initializes data_addr, error_addr,
5576 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5577 * device_addr, status_addr, and command_addr to standard offsets
5578 * relative to cmd_addr.
5580 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5583 void ata_std_ports(struct ata_ioports *ioaddr)
5585 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5586 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5587 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5588 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5589 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5590 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5591 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5592 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5593 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5594 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5600 void ata_pci_host_stop (struct ata_host_set *host_set)
5602 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5604 pci_iounmap(pdev, host_set->mmio_base);
5608 * ata_pci_remove_one - PCI layer callback for device removal
5609 * @pdev: PCI device that was removed
5611 * PCI layer indicates to libata via this hook that
5612 * hot-unplug or module unload event has occurred.
5613 * Handle this by unregistering all objects associated
5614 * with this PCI device. Free those objects. Then finally
5615 * release PCI resources and disable device.
5618 * Inherited from PCI layer (may sleep).
5621 void ata_pci_remove_one (struct pci_dev *pdev)
5623 struct device *dev = pci_dev_to_dev(pdev);
5624 struct ata_host_set *host_set = dev_get_drvdata(dev);
5625 struct ata_host_set *host_set2 = host_set->next;
5627 ata_host_set_remove(host_set);
5629 ata_host_set_remove(host_set2);
5631 pci_release_regions(pdev);
5632 pci_disable_device(pdev);
5633 dev_set_drvdata(dev, NULL);
5636 /* move to PCI subsystem */
5637 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5639 unsigned long tmp = 0;
5641 switch (bits->width) {
5644 pci_read_config_byte(pdev, bits->reg, &tmp8);
5650 pci_read_config_word(pdev, bits->reg, &tmp16);
5656 pci_read_config_dword(pdev, bits->reg, &tmp32);
5667 return (tmp == bits->val) ? 1 : 0;
5670 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5672 pci_save_state(pdev);
5673 pci_disable_device(pdev);
5674 pci_set_power_state(pdev, PCI_D3hot);
5678 int ata_pci_device_resume(struct pci_dev *pdev)
5680 pci_set_power_state(pdev, PCI_D0);
5681 pci_restore_state(pdev);
5682 pci_enable_device(pdev);
5683 pci_set_master(pdev);
5686 #endif /* CONFIG_PCI */
5689 static int __init ata_init(void)
5691 ata_wq = create_workqueue("ata");
5695 ata_aux_wq = create_singlethread_workqueue("ata_aux");
5697 destroy_workqueue(ata_wq);
5701 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5705 static void __exit ata_exit(void)
5707 destroy_workqueue(ata_wq);
5708 destroy_workqueue(ata_aux_wq);
5711 module_init(ata_init);
5712 module_exit(ata_exit);
5714 static unsigned long ratelimit_time;
5715 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5717 int ata_ratelimit(void)
5720 unsigned long flags;
5722 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5724 if (time_after(jiffies, ratelimit_time)) {
5726 ratelimit_time = jiffies + (HZ/5);
5730 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5736 * ata_wait_register - wait until register value changes
5737 * @reg: IO-mapped register
5738 * @mask: Mask to apply to read register value
5739 * @val: Wait condition
5740 * @interval_msec: polling interval in milliseconds
5741 * @timeout_msec: timeout in milliseconds
5743 * Waiting for some bits of register to change is a common
5744 * operation for ATA controllers. This function reads 32bit LE
5745 * IO-mapped register @reg and tests for the following condition.
5747 * (*@reg & mask) != val
5749 * If the condition is met, it returns; otherwise, the process is
5750 * repeated after @interval_msec until timeout.
5753 * Kernel thread context (may sleep)
5756 * The final register value.
5758 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
5759 unsigned long interval_msec,
5760 unsigned long timeout_msec)
5762 unsigned long timeout;
5765 tmp = ioread32(reg);
5767 /* Calculate timeout _after_ the first read to make sure
5768 * preceding writes reach the controller before starting to
5769 * eat away the timeout.
5771 timeout = jiffies + (timeout_msec * HZ) / 1000;
5773 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
5774 msleep(interval_msec);
5775 tmp = ioread32(reg);
5782 * libata is essentially a library of internal helper functions for
5783 * low-level ATA host controller drivers. As such, the API/ABI is
5784 * likely to change as new drivers are added and updated.
5785 * Do not depend on ABI/API stability.
5788 EXPORT_SYMBOL_GPL(sata_deb_timing_boot);
5789 EXPORT_SYMBOL_GPL(sata_deb_timing_eh);
5790 EXPORT_SYMBOL_GPL(sata_deb_timing_before_fsrst);
5791 EXPORT_SYMBOL_GPL(ata_std_bios_param);
5792 EXPORT_SYMBOL_GPL(ata_std_ports);
5793 EXPORT_SYMBOL_GPL(ata_device_add);
5794 EXPORT_SYMBOL_GPL(ata_port_detach);
5795 EXPORT_SYMBOL_GPL(ata_host_set_remove);
5796 EXPORT_SYMBOL_GPL(ata_sg_init);
5797 EXPORT_SYMBOL_GPL(ata_sg_init_one);
5798 EXPORT_SYMBOL_GPL(ata_hsm_move);
5799 EXPORT_SYMBOL_GPL(ata_qc_complete);
5800 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
5801 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5802 EXPORT_SYMBOL_GPL(ata_tf_load);
5803 EXPORT_SYMBOL_GPL(ata_tf_read);
5804 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5805 EXPORT_SYMBOL_GPL(ata_std_dev_select);
5806 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5807 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5808 EXPORT_SYMBOL_GPL(ata_check_status);
5809 EXPORT_SYMBOL_GPL(ata_altstatus);
5810 EXPORT_SYMBOL_GPL(ata_exec_command);
5811 EXPORT_SYMBOL_GPL(ata_port_start);
5812 EXPORT_SYMBOL_GPL(ata_port_stop);
5813 EXPORT_SYMBOL_GPL(ata_host_stop);
5814 EXPORT_SYMBOL_GPL(ata_interrupt);
5815 EXPORT_SYMBOL_GPL(ata_mmio_data_xfer);
5816 EXPORT_SYMBOL_GPL(ata_pio_data_xfer);
5817 EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq);
5818 EXPORT_SYMBOL_GPL(ata_qc_prep);
5819 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
5820 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5821 EXPORT_SYMBOL_GPL(ata_bmdma_start);
5822 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5823 EXPORT_SYMBOL_GPL(ata_bmdma_status);
5824 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5825 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
5826 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
5827 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
5828 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
5829 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
5830 EXPORT_SYMBOL_GPL(ata_port_probe);
5831 EXPORT_SYMBOL_GPL(sata_set_spd);
5832 EXPORT_SYMBOL_GPL(sata_phy_debounce);
5833 EXPORT_SYMBOL_GPL(sata_phy_resume);
5834 EXPORT_SYMBOL_GPL(sata_phy_reset);
5835 EXPORT_SYMBOL_GPL(__sata_phy_reset);
5836 EXPORT_SYMBOL_GPL(ata_bus_reset);
5837 EXPORT_SYMBOL_GPL(ata_std_prereset);
5838 EXPORT_SYMBOL_GPL(ata_std_softreset);
5839 EXPORT_SYMBOL_GPL(sata_std_hardreset);
5840 EXPORT_SYMBOL_GPL(ata_std_postreset);
5841 EXPORT_SYMBOL_GPL(ata_dev_revalidate);
5842 EXPORT_SYMBOL_GPL(ata_dev_classify);
5843 EXPORT_SYMBOL_GPL(ata_dev_pair);
5844 EXPORT_SYMBOL_GPL(ata_port_disable);
5845 EXPORT_SYMBOL_GPL(ata_ratelimit);
5846 EXPORT_SYMBOL_GPL(ata_wait_register);
5847 EXPORT_SYMBOL_GPL(ata_busy_sleep);
5848 EXPORT_SYMBOL_GPL(ata_port_queue_task);
5849 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5850 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5851 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5852 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
5853 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
5854 EXPORT_SYMBOL_GPL(ata_scsi_release);
5855 EXPORT_SYMBOL_GPL(ata_host_intr);
5856 EXPORT_SYMBOL_GPL(sata_scr_valid);
5857 EXPORT_SYMBOL_GPL(sata_scr_read);
5858 EXPORT_SYMBOL_GPL(sata_scr_write);
5859 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
5860 EXPORT_SYMBOL_GPL(ata_port_online);
5861 EXPORT_SYMBOL_GPL(ata_port_offline);
5862 EXPORT_SYMBOL_GPL(ata_id_string);
5863 EXPORT_SYMBOL_GPL(ata_id_c_string);
5864 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5866 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
5867 EXPORT_SYMBOL_GPL(ata_timing_compute);
5868 EXPORT_SYMBOL_GPL(ata_timing_merge);
5871 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5872 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5873 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5874 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5875 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5876 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5877 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
5878 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5879 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
5880 #endif /* CONFIG_PCI */
5882 EXPORT_SYMBOL_GPL(ata_device_suspend);
5883 EXPORT_SYMBOL_GPL(ata_device_resume);
5884 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5885 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
5887 EXPORT_SYMBOL_GPL(ata_eng_timeout);
5888 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
5889 EXPORT_SYMBOL_GPL(ata_port_abort);
5890 EXPORT_SYMBOL_GPL(ata_port_freeze);
5891 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
5892 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
5893 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5894 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
5895 EXPORT_SYMBOL_GPL(ata_do_eh);