2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
64 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
65 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
66 static void ata_set_mode(struct ata_port *ap);
67 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
68 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
69 static int fgb(u32 bitmap);
70 static int ata_choose_xfer_mode(const struct ata_port *ap,
72 unsigned int *xfer_shift_out);
73 static void ata_pio_error(struct ata_port *ap);
75 static unsigned int ata_unique_id = 1;
76 static struct workqueue_struct *ata_wq;
78 int atapi_enabled = 0;
79 module_param(atapi_enabled, int, 0444);
80 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
82 MODULE_AUTHOR("Jeff Garzik");
83 MODULE_DESCRIPTION("Library module for ATA devices");
84 MODULE_LICENSE("GPL");
85 MODULE_VERSION(DRV_VERSION);
88 * ata_tf_load_pio - send taskfile registers to host controller
89 * @ap: Port to which output is sent
90 * @tf: ATA taskfile register set
92 * Outputs ATA taskfile to standard ATA host controller.
95 * Inherited from caller.
98 static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf)
100 struct ata_ioports *ioaddr = &ap->ioaddr;
101 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
103 if (tf->ctl != ap->last_ctl) {
104 outb(tf->ctl, ioaddr->ctl_addr);
105 ap->last_ctl = tf->ctl;
109 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
110 outb(tf->hob_feature, ioaddr->feature_addr);
111 outb(tf->hob_nsect, ioaddr->nsect_addr);
112 outb(tf->hob_lbal, ioaddr->lbal_addr);
113 outb(tf->hob_lbam, ioaddr->lbam_addr);
114 outb(tf->hob_lbah, ioaddr->lbah_addr);
115 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
124 outb(tf->feature, ioaddr->feature_addr);
125 outb(tf->nsect, ioaddr->nsect_addr);
126 outb(tf->lbal, ioaddr->lbal_addr);
127 outb(tf->lbam, ioaddr->lbam_addr);
128 outb(tf->lbah, ioaddr->lbah_addr);
129 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
137 if (tf->flags & ATA_TFLAG_DEVICE) {
138 outb(tf->device, ioaddr->device_addr);
139 VPRINTK("device 0x%X\n", tf->device);
146 * ata_tf_load_mmio - send taskfile registers to host controller
147 * @ap: Port to which output is sent
148 * @tf: ATA taskfile register set
150 * Outputs ATA taskfile to standard ATA host controller using MMIO.
153 * Inherited from caller.
156 static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
158 struct ata_ioports *ioaddr = &ap->ioaddr;
159 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
161 if (tf->ctl != ap->last_ctl) {
162 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
163 ap->last_ctl = tf->ctl;
167 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
168 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
169 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
170 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
171 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
172 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
173 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
182 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
183 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
184 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
185 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
186 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
187 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
195 if (tf->flags & ATA_TFLAG_DEVICE) {
196 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
197 VPRINTK("device 0x%X\n", tf->device);
205 * ata_tf_load - send taskfile registers to host controller
206 * @ap: Port to which output is sent
207 * @tf: ATA taskfile register set
209 * Outputs ATA taskfile to standard ATA host controller using MMIO
210 * or PIO as indicated by the ATA_FLAG_MMIO flag.
211 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
212 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
213 * hob_lbal, hob_lbam, and hob_lbah.
215 * This function waits for idle (!BUSY and !DRQ) after writing
216 * registers. If the control register has a new value, this
217 * function also waits for idle after writing control and before
218 * writing the remaining registers.
220 * May be used as the tf_load() entry in ata_port_operations.
223 * Inherited from caller.
225 void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
227 if (ap->flags & ATA_FLAG_MMIO)
228 ata_tf_load_mmio(ap, tf);
230 ata_tf_load_pio(ap, tf);
234 * ata_exec_command_pio - issue ATA command to host controller
235 * @ap: port to which command is being issued
236 * @tf: ATA taskfile register set
238 * Issues PIO write to ATA command register, with proper
239 * synchronization with interrupt handler / other threads.
242 * spin_lock_irqsave(host_set lock)
245 static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf)
247 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
249 outb(tf->command, ap->ioaddr.command_addr);
255 * ata_exec_command_mmio - issue ATA command to host controller
256 * @ap: port to which command is being issued
257 * @tf: ATA taskfile register set
259 * Issues MMIO write to ATA command register, with proper
260 * synchronization with interrupt handler / other threads.
263 * spin_lock_irqsave(host_set lock)
266 static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
268 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
270 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
276 * ata_exec_command - issue ATA command to host controller
277 * @ap: port to which command is being issued
278 * @tf: ATA taskfile register set
280 * Issues PIO/MMIO write to ATA command register, with proper
281 * synchronization with interrupt handler / other threads.
284 * spin_lock_irqsave(host_set lock)
286 void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
288 if (ap->flags & ATA_FLAG_MMIO)
289 ata_exec_command_mmio(ap, tf);
291 ata_exec_command_pio(ap, tf);
295 * ata_tf_to_host - issue ATA taskfile to host controller
296 * @ap: port to which command is being issued
297 * @tf: ATA taskfile register set
299 * Issues ATA taskfile register set to ATA host controller,
300 * with proper synchronization with interrupt handler and
304 * spin_lock_irqsave(host_set lock)
307 static inline void ata_tf_to_host(struct ata_port *ap,
308 const struct ata_taskfile *tf)
310 ap->ops->tf_load(ap, tf);
311 ap->ops->exec_command(ap, tf);
315 * ata_tf_read_pio - input device's ATA taskfile shadow registers
316 * @ap: Port from which input is read
317 * @tf: ATA taskfile register set for storing input
319 * Reads ATA taskfile registers for currently-selected device
323 * Inherited from caller.
326 static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
328 struct ata_ioports *ioaddr = &ap->ioaddr;
330 tf->command = ata_check_status(ap);
331 tf->feature = inb(ioaddr->error_addr);
332 tf->nsect = inb(ioaddr->nsect_addr);
333 tf->lbal = inb(ioaddr->lbal_addr);
334 tf->lbam = inb(ioaddr->lbam_addr);
335 tf->lbah = inb(ioaddr->lbah_addr);
336 tf->device = inb(ioaddr->device_addr);
338 if (tf->flags & ATA_TFLAG_LBA48) {
339 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
340 tf->hob_feature = inb(ioaddr->error_addr);
341 tf->hob_nsect = inb(ioaddr->nsect_addr);
342 tf->hob_lbal = inb(ioaddr->lbal_addr);
343 tf->hob_lbam = inb(ioaddr->lbam_addr);
344 tf->hob_lbah = inb(ioaddr->lbah_addr);
349 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
350 * @ap: Port from which input is read
351 * @tf: ATA taskfile register set for storing input
353 * Reads ATA taskfile registers for currently-selected device
357 * Inherited from caller.
360 static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
362 struct ata_ioports *ioaddr = &ap->ioaddr;
364 tf->command = ata_check_status(ap);
365 tf->feature = readb((void __iomem *)ioaddr->error_addr);
366 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
367 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
368 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
369 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
370 tf->device = readb((void __iomem *)ioaddr->device_addr);
372 if (tf->flags & ATA_TFLAG_LBA48) {
373 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
374 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
375 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
376 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
377 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
378 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
384 * ata_tf_read - input device's ATA taskfile shadow registers
385 * @ap: Port from which input is read
386 * @tf: ATA taskfile register set for storing input
388 * Reads ATA taskfile registers for currently-selected device
391 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
392 * is set, also reads the hob registers.
394 * May be used as the tf_read() entry in ata_port_operations.
397 * Inherited from caller.
399 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
401 if (ap->flags & ATA_FLAG_MMIO)
402 ata_tf_read_mmio(ap, tf);
404 ata_tf_read_pio(ap, tf);
408 * ata_check_status_pio - Read device status reg & clear interrupt
409 * @ap: port where the device is
411 * Reads ATA taskfile status register for currently-selected device
412 * and return its value. This also clears pending interrupts
416 * Inherited from caller.
418 static u8 ata_check_status_pio(struct ata_port *ap)
420 return inb(ap->ioaddr.status_addr);
424 * ata_check_status_mmio - Read device status reg & clear interrupt
425 * @ap: port where the device is
427 * Reads ATA taskfile status register for currently-selected device
428 * via MMIO and return its value. This also clears pending interrupts
432 * Inherited from caller.
434 static u8 ata_check_status_mmio(struct ata_port *ap)
436 return readb((void __iomem *) ap->ioaddr.status_addr);
441 * ata_check_status - Read device status reg & clear interrupt
442 * @ap: port where the device is
444 * Reads ATA taskfile status register for currently-selected device
445 * and return its value. This also clears pending interrupts
448 * May be used as the check_status() entry in ata_port_operations.
451 * Inherited from caller.
453 u8 ata_check_status(struct ata_port *ap)
455 if (ap->flags & ATA_FLAG_MMIO)
456 return ata_check_status_mmio(ap);
457 return ata_check_status_pio(ap);
462 * ata_altstatus - Read device alternate status reg
463 * @ap: port where the device is
465 * Reads ATA taskfile alternate status register for
466 * currently-selected device and return its value.
468 * Note: may NOT be used as the check_altstatus() entry in
469 * ata_port_operations.
472 * Inherited from caller.
474 u8 ata_altstatus(struct ata_port *ap)
476 if (ap->ops->check_altstatus)
477 return ap->ops->check_altstatus(ap);
479 if (ap->flags & ATA_FLAG_MMIO)
480 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
481 return inb(ap->ioaddr.altstatus_addr);
486 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
487 * @tf: Taskfile to convert
488 * @fis: Buffer into which data will output
489 * @pmp: Port multiplier port
491 * Converts a standard ATA taskfile to a Serial ATA
492 * FIS structure (Register - Host to Device).
495 * Inherited from caller.
498 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
500 fis[0] = 0x27; /* Register - Host to Device FIS */
501 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
502 bit 7 indicates Command FIS */
503 fis[2] = tf->command;
504 fis[3] = tf->feature;
511 fis[8] = tf->hob_lbal;
512 fis[9] = tf->hob_lbam;
513 fis[10] = tf->hob_lbah;
514 fis[11] = tf->hob_feature;
517 fis[13] = tf->hob_nsect;
528 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
529 * @fis: Buffer from which data will be input
530 * @tf: Taskfile to output
532 * Converts a serial ATA FIS structure to a standard ATA taskfile.
535 * Inherited from caller.
538 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
540 tf->command = fis[2]; /* status */
541 tf->feature = fis[3]; /* error */
548 tf->hob_lbal = fis[8];
549 tf->hob_lbam = fis[9];
550 tf->hob_lbah = fis[10];
553 tf->hob_nsect = fis[13];
556 static const u8 ata_rw_cmds[] = {
560 ATA_CMD_READ_MULTI_EXT,
561 ATA_CMD_WRITE_MULTI_EXT,
565 ATA_CMD_WRITE_MULTI_FUA_EXT,
569 ATA_CMD_PIO_READ_EXT,
570 ATA_CMD_PIO_WRITE_EXT,
583 ATA_CMD_WRITE_FUA_EXT
587 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
588 * @qc: command to examine and configure
590 * Examine the device configuration and tf->flags to calculate
591 * the proper read/write commands and protocol to use.
596 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
598 struct ata_taskfile *tf = &qc->tf;
599 struct ata_device *dev = qc->dev;
602 int index, fua, lba48, write;
604 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
605 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
606 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
608 if (dev->flags & ATA_DFLAG_PIO) {
609 tf->protocol = ATA_PROT_PIO;
610 index = dev->multi_count ? 0 : 8;
611 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
612 /* Unable to use DMA due to host limitation */
613 tf->protocol = ATA_PROT_PIO;
614 index = dev->multi_count ? 0 : 8;
616 tf->protocol = ATA_PROT_DMA;
620 cmd = ata_rw_cmds[index + fua + lba48 + write];
628 static const char * const xfer_mode_str[] = {
648 * ata_udma_string - convert UDMA bit offset to string
649 * @mask: mask of bits supported; only highest bit counts.
651 * Determine string which represents the highest speed
652 * (highest bit in @udma_mask).
658 * Constant C string representing highest speed listed in
659 * @udma_mask, or the constant C string "<n/a>".
662 static const char *ata_mode_string(unsigned int mask)
666 for (i = 7; i >= 0; i--)
669 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
672 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
679 return xfer_mode_str[i];
683 * ata_pio_devchk - PATA device presence detection
684 * @ap: ATA channel to examine
685 * @device: Device to examine (starting at zero)
687 * This technique was originally described in
688 * Hale Landis's ATADRVR (www.ata-atapi.com), and
689 * later found its way into the ATA/ATAPI spec.
691 * Write a pattern to the ATA shadow registers,
692 * and if a device is present, it will respond by
693 * correctly storing and echoing back the
694 * ATA shadow register contents.
700 static unsigned int ata_pio_devchk(struct ata_port *ap,
703 struct ata_ioports *ioaddr = &ap->ioaddr;
706 ap->ops->dev_select(ap, device);
708 outb(0x55, ioaddr->nsect_addr);
709 outb(0xaa, ioaddr->lbal_addr);
711 outb(0xaa, ioaddr->nsect_addr);
712 outb(0x55, ioaddr->lbal_addr);
714 outb(0x55, ioaddr->nsect_addr);
715 outb(0xaa, ioaddr->lbal_addr);
717 nsect = inb(ioaddr->nsect_addr);
718 lbal = inb(ioaddr->lbal_addr);
720 if ((nsect == 0x55) && (lbal == 0xaa))
721 return 1; /* we found a device */
723 return 0; /* nothing found */
727 * ata_mmio_devchk - PATA device presence detection
728 * @ap: ATA channel to examine
729 * @device: Device to examine (starting at zero)
731 * This technique was originally described in
732 * Hale Landis's ATADRVR (www.ata-atapi.com), and
733 * later found its way into the ATA/ATAPI spec.
735 * Write a pattern to the ATA shadow registers,
736 * and if a device is present, it will respond by
737 * correctly storing and echoing back the
738 * ATA shadow register contents.
744 static unsigned int ata_mmio_devchk(struct ata_port *ap,
747 struct ata_ioports *ioaddr = &ap->ioaddr;
750 ap->ops->dev_select(ap, device);
752 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
753 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
755 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
756 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
758 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
759 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
761 nsect = readb((void __iomem *) ioaddr->nsect_addr);
762 lbal = readb((void __iomem *) ioaddr->lbal_addr);
764 if ((nsect == 0x55) && (lbal == 0xaa))
765 return 1; /* we found a device */
767 return 0; /* nothing found */
771 * ata_devchk - PATA device presence detection
772 * @ap: ATA channel to examine
773 * @device: Device to examine (starting at zero)
775 * Dispatch ATA device presence detection, depending
776 * on whether we are using PIO or MMIO to talk to the
777 * ATA shadow registers.
783 static unsigned int ata_devchk(struct ata_port *ap,
786 if (ap->flags & ATA_FLAG_MMIO)
787 return ata_mmio_devchk(ap, device);
788 return ata_pio_devchk(ap, device);
792 * ata_dev_classify - determine device type based on ATA-spec signature
793 * @tf: ATA taskfile register set for device to be identified
795 * Determine from taskfile register contents whether a device is
796 * ATA or ATAPI, as per "Signature and persistence" section
797 * of ATA/PI spec (volume 1, sect 5.14).
803 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
804 * the event of failure.
807 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
809 /* Apple's open source Darwin code hints that some devices only
810 * put a proper signature into the LBA mid/high registers,
811 * So, we only check those. It's sufficient for uniqueness.
814 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
815 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
816 DPRINTK("found ATA device by sig\n");
820 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
821 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
822 DPRINTK("found ATAPI device by sig\n");
823 return ATA_DEV_ATAPI;
826 DPRINTK("unknown device\n");
827 return ATA_DEV_UNKNOWN;
831 * ata_dev_try_classify - Parse returned ATA device signature
832 * @ap: ATA channel to examine
833 * @device: Device to examine (starting at zero)
834 * @r_err: Value of error register on completion
836 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
837 * an ATA/ATAPI-defined set of values is placed in the ATA
838 * shadow registers, indicating the results of device detection
841 * Select the ATA device, and read the values from the ATA shadow
842 * registers. Then parse according to the Error register value,
843 * and the spec-defined values examined by ata_dev_classify().
849 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
853 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
855 struct ata_taskfile tf;
859 ap->ops->dev_select(ap, device);
861 memset(&tf, 0, sizeof(tf));
863 ap->ops->tf_read(ap, &tf);
868 /* see if device passed diags */
871 else if ((device == 0) && (err == 0x81))
876 /* determine if device is ATA or ATAPI */
877 class = ata_dev_classify(&tf);
879 if (class == ATA_DEV_UNKNOWN)
881 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
887 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
888 * @id: IDENTIFY DEVICE results we will examine
889 * @s: string into which data is output
890 * @ofs: offset into identify device page
891 * @len: length of string to return. must be an even number.
893 * The strings in the IDENTIFY DEVICE page are broken up into
894 * 16-bit chunks. Run through the string, and output each
895 * 8-bit chunk linearly, regardless of platform.
901 void ata_dev_id_string(const u16 *id, unsigned char *s,
902 unsigned int ofs, unsigned int len)
922 * ata_noop_dev_select - Select device 0/1 on ATA bus
923 * @ap: ATA channel to manipulate
924 * @device: ATA device (numbered from zero) to select
926 * This function performs no actual function.
928 * May be used as the dev_select() entry in ata_port_operations.
933 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
939 * ata_std_dev_select - Select device 0/1 on ATA bus
940 * @ap: ATA channel to manipulate
941 * @device: ATA device (numbered from zero) to select
943 * Use the method defined in the ATA specification to
944 * make either device 0, or device 1, active on the
945 * ATA channel. Works with both PIO and MMIO.
947 * May be used as the dev_select() entry in ata_port_operations.
953 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
958 tmp = ATA_DEVICE_OBS;
960 tmp = ATA_DEVICE_OBS | ATA_DEV1;
962 if (ap->flags & ATA_FLAG_MMIO) {
963 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
965 outb(tmp, ap->ioaddr.device_addr);
967 ata_pause(ap); /* needed; also flushes, for mmio */
971 * ata_dev_select - Select device 0/1 on ATA bus
972 * @ap: ATA channel to manipulate
973 * @device: ATA device (numbered from zero) to select
974 * @wait: non-zero to wait for Status register BSY bit to clear
975 * @can_sleep: non-zero if context allows sleeping
977 * Use the method defined in the ATA specification to
978 * make either device 0, or device 1, active on the
981 * This is a high-level version of ata_std_dev_select(),
982 * which additionally provides the services of inserting
983 * the proper pauses and status polling, where needed.
989 void ata_dev_select(struct ata_port *ap, unsigned int device,
990 unsigned int wait, unsigned int can_sleep)
992 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
993 ap->id, device, wait);
998 ap->ops->dev_select(ap, device);
1001 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
1008 * ata_dump_id - IDENTIFY DEVICE info debugging output
1009 * @dev: Device whose IDENTIFY DEVICE page we will dump
1011 * Dump selected 16-bit words from a detected device's
1012 * IDENTIFY PAGE page.
1018 static inline void ata_dump_id(const struct ata_device *dev)
1020 DPRINTK("49==0x%04x "
1030 DPRINTK("80==0x%04x "
1040 DPRINTK("88==0x%04x "
1047 * Compute the PIO modes available for this device. This is not as
1048 * trivial as it seems if we must consider early devices correctly.
1050 * FIXME: pre IDE drive timing (do we care ?).
1053 static unsigned int ata_pio_modes(const struct ata_device *adev)
1057 /* Usual case. Word 53 indicates word 64 is valid */
1058 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1059 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
1065 /* If word 64 isn't valid then Word 51 high byte holds the PIO timing
1066 number for the maximum. Turn it into a mask and return it */
1067 modes = (2 << ((adev->id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF)) - 1 ;
1069 /* But wait.. there's more. Design your standards by committee and
1070 you too can get a free iordy field to process. However its the
1071 speeds not the modes that are supported... Note drivers using the
1072 timing API will get this right anyway */
1076 ata_queue_pio_task(struct ata_port *ap)
1078 queue_work(ata_wq, &ap->pio_task);
1082 ata_queue_delayed_pio_task(struct ata_port *ap, unsigned long delay)
1084 queue_delayed_work(ata_wq, &ap->pio_task, delay);
1087 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1089 struct completion *waiting = qc->private_data;
1091 qc->ap->ops->tf_read(qc->ap, &qc->tf);
1096 * ata_exec_internal - execute libata internal command
1097 * @ap: Port to which the command is sent
1098 * @dev: Device to which the command is sent
1099 * @tf: Taskfile registers for the command and the result
1100 * @dma_dir: Data tranfer direction of the command
1101 * @buf: Data buffer of the command
1102 * @buflen: Length of data buffer
1104 * Executes libata internal command with timeout. @tf contains
1105 * command on entry and result on return. Timeout and error
1106 * conditions are reported via return value. No recovery action
1107 * is taken after a command times out. It's caller's duty to
1108 * clean up after timeout.
1111 * None. Should be called with kernel context, might sleep.
1115 ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
1116 struct ata_taskfile *tf,
1117 int dma_dir, void *buf, unsigned int buflen)
1119 u8 command = tf->command;
1120 struct ata_queued_cmd *qc;
1121 DECLARE_COMPLETION(wait);
1122 unsigned long flags;
1123 unsigned int err_mask;
1125 spin_lock_irqsave(&ap->host_set->lock, flags);
1127 qc = ata_qc_new_init(ap, dev);
1131 qc->dma_dir = dma_dir;
1132 if (dma_dir != DMA_NONE) {
1133 ata_sg_init_one(qc, buf, buflen);
1134 qc->nsect = buflen / ATA_SECT_SIZE;
1137 qc->private_data = &wait;
1138 qc->complete_fn = ata_qc_complete_internal;
1140 qc->err_mask = ata_qc_issue(qc);
1142 ata_qc_complete(qc);
1144 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1146 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
1147 spin_lock_irqsave(&ap->host_set->lock, flags);
1149 /* We're racing with irq here. If we lose, the
1150 * following test prevents us from completing the qc
1151 * again. If completion irq occurs after here but
1152 * before the caller cleans up, it will result in a
1153 * spurious interrupt. We can live with that.
1155 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1156 qc->err_mask = AC_ERR_TIMEOUT;
1157 ata_qc_complete(qc);
1158 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1162 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1166 err_mask = qc->err_mask;
1174 * ata_pio_need_iordy - check if iordy needed
1177 * Check if the current speed of the device requires IORDY. Used
1178 * by various controllers for chip configuration.
1181 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1184 int speed = adev->pio_mode - XFER_PIO_0;
1191 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1193 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1194 pio = adev->id[ATA_ID_EIDE_PIO];
1195 /* Is the speed faster than the drive allows non IORDY ? */
1197 /* This is cycle times not frequency - watch the logic! */
1198 if (pio > 240) /* PIO2 is 240nS per cycle */
1207 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1208 * @ap: port on which device we wish to probe resides
1209 * @device: device bus address, starting at zero
1211 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1212 * command, and read back the 512-byte device information page.
1213 * The device information page is fed to us via the standard
1214 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1215 * using standard PIO-IN paths)
1217 * After reading the device information page, we use several
1218 * bits of information from it to initialize data structures
1219 * that will be used during the lifetime of the ata_device.
1220 * Other data from the info page is used to disqualify certain
1221 * older ATA devices we do not wish to support.
1224 * Inherited from caller. Some functions called by this function
1225 * obtain the host_set lock.
1228 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1230 struct ata_device *dev = &ap->device[device];
1231 unsigned int major_version;
1233 unsigned long xfer_modes;
1234 unsigned int using_edd;
1235 struct ata_taskfile tf;
1236 unsigned int err_mask;
1239 if (!ata_dev_present(dev)) {
1240 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1245 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1250 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1252 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1253 dev->class == ATA_DEV_NONE);
1255 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1258 ata_tf_init(ap, &tf, device);
1260 if (dev->class == ATA_DEV_ATA) {
1261 tf.command = ATA_CMD_ID_ATA;
1262 DPRINTK("do ATA identify\n");
1264 tf.command = ATA_CMD_ID_ATAPI;
1265 DPRINTK("do ATAPI identify\n");
1268 tf.protocol = ATA_PROT_PIO;
1270 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
1271 dev->id, sizeof(dev->id));
1274 if (err_mask & ~AC_ERR_DEV)
1278 * arg! EDD works for all test cases, but seems to return
1279 * the ATA signature for some ATAPI devices. Until the
1280 * reason for this is found and fixed, we fix up the mess
1281 * here. If IDENTIFY DEVICE returns command aborted
1282 * (as ATAPI devices do), then we issue an
1283 * IDENTIFY PACKET DEVICE.
1285 * ATA software reset (SRST, the default) does not appear
1286 * to have this problem.
1288 if ((using_edd) && (dev->class == ATA_DEV_ATA)) {
1289 u8 err = tf.feature;
1290 if (err & ATA_ABORTED) {
1291 dev->class = ATA_DEV_ATAPI;
1298 swap_buf_le16(dev->id, ATA_ID_WORDS);
1300 /* print device capabilities */
1301 printk(KERN_DEBUG "ata%u: dev %u cfg "
1302 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1303 ap->id, device, dev->id[49],
1304 dev->id[82], dev->id[83], dev->id[84],
1305 dev->id[85], dev->id[86], dev->id[87],
1309 * common ATA, ATAPI feature tests
1312 /* we require DMA support (bits 8 of word 49) */
1313 if (!ata_id_has_dma(dev->id)) {
1314 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1318 /* quick-n-dirty find max transfer mode; for printk only */
1319 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1321 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1323 xfer_modes = ata_pio_modes(dev);
1327 /* ATA-specific feature tests */
1328 if (dev->class == ATA_DEV_ATA) {
1329 if (!ata_id_is_ata(dev->id)) /* sanity check */
1332 /* get major version */
1333 tmp = dev->id[ATA_ID_MAJOR_VER];
1334 for (major_version = 14; major_version >= 1; major_version--)
1335 if (tmp & (1 << major_version))
1339 * The exact sequence expected by certain pre-ATA4 drives is:
1342 * INITIALIZE DEVICE PARAMETERS
1344 * Some drives were very specific about that exact sequence.
1346 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
1347 ata_dev_init_params(ap, dev);
1349 /* current CHS translation info (id[53-58]) might be
1350 * changed. reread the identify device info.
1352 ata_dev_reread_id(ap, dev);
1355 if (ata_id_has_lba(dev->id)) {
1356 dev->flags |= ATA_DFLAG_LBA;
1358 if (ata_id_has_lba48(dev->id)) {
1359 dev->flags |= ATA_DFLAG_LBA48;
1360 dev->n_sectors = ata_id_u64(dev->id, 100);
1362 dev->n_sectors = ata_id_u32(dev->id, 60);
1365 /* print device info to dmesg */
1366 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1369 ata_mode_string(xfer_modes),
1370 (unsigned long long)dev->n_sectors,
1371 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1375 /* Default translation */
1376 dev->cylinders = dev->id[1];
1377 dev->heads = dev->id[3];
1378 dev->sectors = dev->id[6];
1379 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1381 if (ata_id_current_chs_valid(dev->id)) {
1382 /* Current CHS translation is valid. */
1383 dev->cylinders = dev->id[54];
1384 dev->heads = dev->id[55];
1385 dev->sectors = dev->id[56];
1387 dev->n_sectors = ata_id_u32(dev->id, 57);
1390 /* print device info to dmesg */
1391 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1394 ata_mode_string(xfer_modes),
1395 (unsigned long long)dev->n_sectors,
1396 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1400 if (dev->id[59] & 0x100) {
1401 dev->multi_count = dev->id[59] & 0xff;
1402 DPRINTK("ata%u: dev %u multi count %u\n",
1403 ap->id, device, dev->multi_count);
1406 ap->host->max_cmd_len = 16;
1409 /* ATAPI-specific feature tests */
1410 else if (dev->class == ATA_DEV_ATAPI) {
1411 if (ata_id_is_ata(dev->id)) /* sanity check */
1414 rc = atapi_cdb_len(dev->id);
1415 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1416 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1419 ap->cdb_len = (unsigned int) rc;
1420 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1422 if (ata_id_cdb_intr(dev->id))
1423 dev->flags |= ATA_DFLAG_CDB_INTR;
1425 /* print device info to dmesg */
1426 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1428 ata_mode_string(xfer_modes));
1431 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1435 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1438 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1439 DPRINTK("EXIT, err\n");
1443 static inline u8 ata_dev_knobble(const struct ata_port *ap)
1445 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1449 * ata_dev_config - Run device specific handlers and check for
1450 * SATA->PATA bridges
1457 void ata_dev_config(struct ata_port *ap, unsigned int i)
1459 /* limit bridge transfers to udma5, 200 sectors */
1460 if (ata_dev_knobble(ap)) {
1461 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1462 ap->id, ap->device->devno);
1463 ap->udma_mask &= ATA_UDMA5;
1464 ap->host->max_sectors = ATA_MAX_SECTORS;
1465 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1466 ap->device[i].flags |= ATA_DFLAG_LOCK_SECTORS;
1469 if (ap->ops->dev_config)
1470 ap->ops->dev_config(ap, &ap->device[i]);
1474 * ata_bus_probe - Reset and probe ATA bus
1477 * Master ATA bus probing function. Initiates a hardware-dependent
1478 * bus reset, then attempts to identify any devices found on
1482 * PCI/etc. bus probe sem.
1485 * Zero on success, non-zero on error.
1488 static int ata_bus_probe(struct ata_port *ap)
1490 unsigned int i, found = 0;
1492 if (ap->ops->probe_reset) {
1493 unsigned int classes[ATA_MAX_DEVICES];
1498 rc = ap->ops->probe_reset(ap, classes);
1500 for (i = 0; i < ATA_MAX_DEVICES; i++)
1501 ap->device[i].class = classes[i];
1503 printk(KERN_ERR "ata%u: probe reset failed, "
1504 "disabling port\n", ap->id);
1505 ata_port_disable(ap);
1508 ap->ops->phy_reset(ap);
1510 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1513 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1514 ata_dev_identify(ap, i);
1515 if (ata_dev_present(&ap->device[i])) {
1517 ata_dev_config(ap,i);
1521 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1522 goto err_out_disable;
1525 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1526 goto err_out_disable;
1531 ap->ops->port_disable(ap);
1537 * ata_port_probe - Mark port as enabled
1538 * @ap: Port for which we indicate enablement
1540 * Modify @ap data structure such that the system
1541 * thinks that the entire port is enabled.
1543 * LOCKING: host_set lock, or some other form of
1547 void ata_port_probe(struct ata_port *ap)
1549 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1553 * sata_print_link_status - Print SATA link status
1554 * @ap: SATA port to printk link status about
1556 * This function prints link speed and status of a SATA link.
1561 static void sata_print_link_status(struct ata_port *ap)
1566 if (!ap->ops->scr_read)
1569 sstatus = scr_read(ap, SCR_STATUS);
1571 if (sata_dev_present(ap)) {
1572 tmp = (sstatus >> 4) & 0xf;
1575 else if (tmp & (1 << 1))
1578 speed = "<unknown>";
1579 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1580 ap->id, speed, sstatus);
1582 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1588 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1589 * @ap: SATA port associated with target SATA PHY.
1591 * This function issues commands to standard SATA Sxxx
1592 * PHY registers, to wake up the phy (and device), and
1593 * clear any reset condition.
1596 * PCI/etc. bus probe sem.
1599 void __sata_phy_reset(struct ata_port *ap)
1602 unsigned long timeout = jiffies + (HZ * 5);
1604 if (ap->flags & ATA_FLAG_SATA_RESET) {
1605 /* issue phy wake/reset */
1606 scr_write_flush(ap, SCR_CONTROL, 0x301);
1607 /* Couldn't find anything in SATA I/II specs, but
1608 * AHCI-1.1 10.4.2 says at least 1 ms. */
1611 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1613 /* wait for phy to become ready, if necessary */
1616 sstatus = scr_read(ap, SCR_STATUS);
1617 if ((sstatus & 0xf) != 1)
1619 } while (time_before(jiffies, timeout));
1621 /* print link status */
1622 sata_print_link_status(ap);
1624 /* TODO: phy layer with polling, timeouts, etc. */
1625 if (sata_dev_present(ap))
1628 ata_port_disable(ap);
1630 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1633 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1634 ata_port_disable(ap);
1638 ap->cbl = ATA_CBL_SATA;
1642 * sata_phy_reset - Reset SATA bus.
1643 * @ap: SATA port associated with target SATA PHY.
1645 * This function resets the SATA bus, and then probes
1646 * the bus for devices.
1649 * PCI/etc. bus probe sem.
1652 void sata_phy_reset(struct ata_port *ap)
1654 __sata_phy_reset(ap);
1655 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1661 * ata_port_disable - Disable port.
1662 * @ap: Port to be disabled.
1664 * Modify @ap data structure such that the system
1665 * thinks that the entire port is disabled, and should
1666 * never attempt to probe or communicate with devices
1669 * LOCKING: host_set lock, or some other form of
1673 void ata_port_disable(struct ata_port *ap)
1675 ap->device[0].class = ATA_DEV_NONE;
1676 ap->device[1].class = ATA_DEV_NONE;
1677 ap->flags |= ATA_FLAG_PORT_DISABLED;
1681 * This mode timing computation functionality is ported over from
1682 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1685 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1686 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1687 * for PIO 5, which is a nonstandard extension and UDMA6, which
1688 * is currently supported only by Maxtor drives.
1691 static const struct ata_timing ata_timing[] = {
1693 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1694 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1695 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1696 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1698 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1699 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1700 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1702 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1704 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1705 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1706 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1708 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1709 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1710 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1712 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1713 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1714 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1716 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1717 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1718 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1720 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1725 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1726 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1728 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1730 q->setup = EZ(t->setup * 1000, T);
1731 q->act8b = EZ(t->act8b * 1000, T);
1732 q->rec8b = EZ(t->rec8b * 1000, T);
1733 q->cyc8b = EZ(t->cyc8b * 1000, T);
1734 q->active = EZ(t->active * 1000, T);
1735 q->recover = EZ(t->recover * 1000, T);
1736 q->cycle = EZ(t->cycle * 1000, T);
1737 q->udma = EZ(t->udma * 1000, UT);
1740 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1741 struct ata_timing *m, unsigned int what)
1743 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1744 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1745 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1746 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1747 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1748 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1749 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1750 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1753 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1755 const struct ata_timing *t;
1757 for (t = ata_timing; t->mode != speed; t++)
1758 if (t->mode == 0xFF)
1763 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1764 struct ata_timing *t, int T, int UT)
1766 const struct ata_timing *s;
1767 struct ata_timing p;
1773 if (!(s = ata_timing_find_mode(speed)))
1776 memcpy(t, s, sizeof(*s));
1779 * If the drive is an EIDE drive, it can tell us it needs extended
1780 * PIO/MW_DMA cycle timing.
1783 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1784 memset(&p, 0, sizeof(p));
1785 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1786 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1787 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1788 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1789 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1791 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1795 * Convert the timing to bus clock counts.
1798 ata_timing_quantize(t, t, T, UT);
1801 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T
1802 * and some other commands. We have to ensure that the DMA cycle timing is
1803 * slower/equal than the fastest PIO timing.
1806 if (speed > XFER_PIO_4) {
1807 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1808 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1812 * Lenghten active & recovery time so that cycle time is correct.
1815 if (t->act8b + t->rec8b < t->cyc8b) {
1816 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1817 t->rec8b = t->cyc8b - t->act8b;
1820 if (t->active + t->recover < t->cycle) {
1821 t->active += (t->cycle - (t->active + t->recover)) / 2;
1822 t->recover = t->cycle - t->active;
1828 static const struct {
1831 } xfer_mode_classes[] = {
1832 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1833 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1834 { ATA_SHIFT_PIO, XFER_PIO_0 },
1837 static u8 base_from_shift(unsigned int shift)
1841 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1842 if (xfer_mode_classes[i].shift == shift)
1843 return xfer_mode_classes[i].base;
1848 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1853 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1856 if (dev->xfer_shift == ATA_SHIFT_PIO)
1857 dev->flags |= ATA_DFLAG_PIO;
1859 ata_dev_set_xfermode(ap, dev);
1861 base = base_from_shift(dev->xfer_shift);
1862 ofs = dev->xfer_mode - base;
1863 idx = ofs + dev->xfer_shift;
1864 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1866 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1867 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1869 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1870 ap->id, dev->devno, xfer_mode_str[idx]);
1873 static int ata_host_set_pio(struct ata_port *ap)
1879 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1882 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1886 base = base_from_shift(ATA_SHIFT_PIO);
1887 xfer_mode = base + x;
1889 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1890 (int)base, (int)xfer_mode, mask, x);
1892 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1893 struct ata_device *dev = &ap->device[i];
1894 if (ata_dev_present(dev)) {
1895 dev->pio_mode = xfer_mode;
1896 dev->xfer_mode = xfer_mode;
1897 dev->xfer_shift = ATA_SHIFT_PIO;
1898 if (ap->ops->set_piomode)
1899 ap->ops->set_piomode(ap, dev);
1906 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1907 unsigned int xfer_shift)
1911 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1912 struct ata_device *dev = &ap->device[i];
1913 if (ata_dev_present(dev)) {
1914 dev->dma_mode = xfer_mode;
1915 dev->xfer_mode = xfer_mode;
1916 dev->xfer_shift = xfer_shift;
1917 if (ap->ops->set_dmamode)
1918 ap->ops->set_dmamode(ap, dev);
1924 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1925 * @ap: port on which timings will be programmed
1927 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1930 * PCI/etc. bus probe sem.
1933 static void ata_set_mode(struct ata_port *ap)
1935 unsigned int xfer_shift;
1939 /* step 1: always set host PIO timings */
1940 rc = ata_host_set_pio(ap);
1944 /* step 2: choose the best data xfer mode */
1945 xfer_mode = xfer_shift = 0;
1946 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1950 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1951 if (xfer_shift != ATA_SHIFT_PIO)
1952 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1954 /* step 4: update devices' xfer mode */
1955 ata_dev_set_mode(ap, &ap->device[0]);
1956 ata_dev_set_mode(ap, &ap->device[1]);
1958 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1961 if (ap->ops->post_set_mode)
1962 ap->ops->post_set_mode(ap);
1967 ata_port_disable(ap);
1971 * ata_busy_sleep - sleep until BSY clears, or timeout
1972 * @ap: port containing status register to be polled
1973 * @tmout_pat: impatience timeout
1974 * @tmout: overall timeout
1976 * Sleep until ATA Status register bit BSY clears,
1977 * or a timeout occurs.
1983 unsigned int ata_busy_sleep (struct ata_port *ap,
1984 unsigned long tmout_pat, unsigned long tmout)
1986 unsigned long timer_start, timeout;
1989 status = ata_busy_wait(ap, ATA_BUSY, 300);
1990 timer_start = jiffies;
1991 timeout = timer_start + tmout_pat;
1992 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1994 status = ata_busy_wait(ap, ATA_BUSY, 3);
1997 if (status & ATA_BUSY)
1998 printk(KERN_WARNING "ata%u is slow to respond, "
1999 "please be patient\n", ap->id);
2001 timeout = timer_start + tmout;
2002 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2004 status = ata_chk_status(ap);
2007 if (status & ATA_BUSY) {
2008 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
2009 ap->id, tmout / HZ);
2016 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2018 struct ata_ioports *ioaddr = &ap->ioaddr;
2019 unsigned int dev0 = devmask & (1 << 0);
2020 unsigned int dev1 = devmask & (1 << 1);
2021 unsigned long timeout;
2023 /* if device 0 was found in ata_devchk, wait for its
2027 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2029 /* if device 1 was found in ata_devchk, wait for
2030 * register access, then wait for BSY to clear
2032 timeout = jiffies + ATA_TMOUT_BOOT;
2036 ap->ops->dev_select(ap, 1);
2037 if (ap->flags & ATA_FLAG_MMIO) {
2038 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2039 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2041 nsect = inb(ioaddr->nsect_addr);
2042 lbal = inb(ioaddr->lbal_addr);
2044 if ((nsect == 1) && (lbal == 1))
2046 if (time_after(jiffies, timeout)) {
2050 msleep(50); /* give drive a breather */
2053 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2055 /* is all this really necessary? */
2056 ap->ops->dev_select(ap, 0);
2058 ap->ops->dev_select(ap, 1);
2060 ap->ops->dev_select(ap, 0);
2064 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
2065 * @ap: Port to reset and probe
2067 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
2068 * probe the bus. Not often used these days.
2071 * PCI/etc. bus probe sem.
2072 * Obtains host_set lock.
2076 static unsigned int ata_bus_edd(struct ata_port *ap)
2078 struct ata_taskfile tf;
2079 unsigned long flags;
2081 /* set up execute-device-diag (bus reset) taskfile */
2082 /* also, take interrupts to a known state (disabled) */
2083 DPRINTK("execute-device-diag\n");
2084 ata_tf_init(ap, &tf, 0);
2086 tf.command = ATA_CMD_EDD;
2087 tf.protocol = ATA_PROT_NODATA;
2090 spin_lock_irqsave(&ap->host_set->lock, flags);
2091 ata_tf_to_host(ap, &tf);
2092 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2094 /* spec says at least 2ms. but who knows with those
2095 * crazy ATAPI devices...
2099 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2102 static unsigned int ata_bus_softreset(struct ata_port *ap,
2103 unsigned int devmask)
2105 struct ata_ioports *ioaddr = &ap->ioaddr;
2107 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2109 /* software reset. causes dev0 to be selected */
2110 if (ap->flags & ATA_FLAG_MMIO) {
2111 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2112 udelay(20); /* FIXME: flush */
2113 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2114 udelay(20); /* FIXME: flush */
2115 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2117 outb(ap->ctl, ioaddr->ctl_addr);
2119 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2121 outb(ap->ctl, ioaddr->ctl_addr);
2124 /* spec mandates ">= 2ms" before checking status.
2125 * We wait 150ms, because that was the magic delay used for
2126 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2127 * between when the ATA command register is written, and then
2128 * status is checked. Because waiting for "a while" before
2129 * checking status is fine, post SRST, we perform this magic
2130 * delay here as well.
2134 ata_bus_post_reset(ap, devmask);
2140 * ata_bus_reset - reset host port and associated ATA channel
2141 * @ap: port to reset
2143 * This is typically the first time we actually start issuing
2144 * commands to the ATA channel. We wait for BSY to clear, then
2145 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2146 * result. Determine what devices, if any, are on the channel
2147 * by looking at the device 0/1 error register. Look at the signature
2148 * stored in each device's taskfile registers, to determine if
2149 * the device is ATA or ATAPI.
2152 * PCI/etc. bus probe sem.
2153 * Obtains host_set lock.
2156 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2159 void ata_bus_reset(struct ata_port *ap)
2161 struct ata_ioports *ioaddr = &ap->ioaddr;
2162 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2164 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
2166 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2168 /* determine if device 0/1 are present */
2169 if (ap->flags & ATA_FLAG_SATA_RESET)
2172 dev0 = ata_devchk(ap, 0);
2174 dev1 = ata_devchk(ap, 1);
2178 devmask |= (1 << 0);
2180 devmask |= (1 << 1);
2182 /* select device 0 again */
2183 ap->ops->dev_select(ap, 0);
2185 /* issue bus reset */
2186 if (ap->flags & ATA_FLAG_SRST)
2187 rc = ata_bus_softreset(ap, devmask);
2188 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
2189 /* set up device control */
2190 if (ap->flags & ATA_FLAG_MMIO)
2191 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2193 outb(ap->ctl, ioaddr->ctl_addr);
2194 rc = ata_bus_edd(ap);
2201 * determine by signature whether we have ATA or ATAPI devices
2203 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2204 if ((slave_possible) && (err != 0x81))
2205 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2207 /* re-enable interrupts */
2208 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2211 /* is double-select really necessary? */
2212 if (ap->device[1].class != ATA_DEV_NONE)
2213 ap->ops->dev_select(ap, 1);
2214 if (ap->device[0].class != ATA_DEV_NONE)
2215 ap->ops->dev_select(ap, 0);
2217 /* if no devices were detected, disable this port */
2218 if ((ap->device[0].class == ATA_DEV_NONE) &&
2219 (ap->device[1].class == ATA_DEV_NONE))
2222 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2223 /* set up device control for ATA_FLAG_SATA_RESET */
2224 if (ap->flags & ATA_FLAG_MMIO)
2225 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2227 outb(ap->ctl, ioaddr->ctl_addr);
2234 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2235 ap->ops->port_disable(ap);
2240 static void ata_pr_blacklisted(const struct ata_port *ap,
2241 const struct ata_device *dev)
2243 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2244 ap->id, dev->devno);
2247 static const char * const ata_dma_blacklist [] = {
2266 "Toshiba CD-ROM XM-6202B",
2267 "TOSHIBA CD-ROM XM-1702BC",
2269 "E-IDE CD-ROM CR-840",
2272 "SAMSUNG CD-ROM SC-148C",
2273 "SAMSUNG CD-ROM SC",
2275 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2279 static int ata_dma_blacklisted(const struct ata_device *dev)
2281 unsigned char model_num[40];
2286 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2289 len = strnlen(s, sizeof(model_num));
2291 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2292 while ((len > 0) && (s[len - 1] == ' ')) {
2297 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2298 if (!strncmp(ata_dma_blacklist[i], s, len))
2304 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
2306 const struct ata_device *master, *slave;
2309 master = &ap->device[0];
2310 slave = &ap->device[1];
2312 assert (ata_dev_present(master) || ata_dev_present(slave));
2314 if (shift == ATA_SHIFT_UDMA) {
2315 mask = ap->udma_mask;
2316 if (ata_dev_present(master)) {
2317 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2318 if (ata_dma_blacklisted(master)) {
2320 ata_pr_blacklisted(ap, master);
2323 if (ata_dev_present(slave)) {
2324 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2325 if (ata_dma_blacklisted(slave)) {
2327 ata_pr_blacklisted(ap, slave);
2331 else if (shift == ATA_SHIFT_MWDMA) {
2332 mask = ap->mwdma_mask;
2333 if (ata_dev_present(master)) {
2334 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2335 if (ata_dma_blacklisted(master)) {
2337 ata_pr_blacklisted(ap, master);
2340 if (ata_dev_present(slave)) {
2341 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2342 if (ata_dma_blacklisted(slave)) {
2344 ata_pr_blacklisted(ap, slave);
2348 else if (shift == ATA_SHIFT_PIO) {
2349 mask = ap->pio_mask;
2350 if (ata_dev_present(master)) {
2351 /* spec doesn't return explicit support for
2352 * PIO0-2, so we fake it
2354 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2359 if (ata_dev_present(slave)) {
2360 /* spec doesn't return explicit support for
2361 * PIO0-2, so we fake it
2363 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2370 mask = 0xffffffff; /* shut up compiler warning */
2377 /* find greatest bit */
2378 static int fgb(u32 bitmap)
2383 for (i = 0; i < 32; i++)
2384 if (bitmap & (1 << i))
2391 * ata_choose_xfer_mode - attempt to find best transfer mode
2392 * @ap: Port for which an xfer mode will be selected
2393 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2394 * @xfer_shift_out: (output) bit shift that selects this mode
2396 * Based on host and device capabilities, determine the
2397 * maximum transfer mode that is amenable to all.
2400 * PCI/etc. bus probe sem.
2403 * Zero on success, negative on error.
2406 static int ata_choose_xfer_mode(const struct ata_port *ap,
2408 unsigned int *xfer_shift_out)
2410 unsigned int mask, shift;
2413 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2414 shift = xfer_mode_classes[i].shift;
2415 mask = ata_get_mode_mask(ap, shift);
2419 *xfer_mode_out = xfer_mode_classes[i].base + x;
2420 *xfer_shift_out = shift;
2429 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2430 * @ap: Port associated with device @dev
2431 * @dev: Device to which command will be sent
2433 * Issue SET FEATURES - XFER MODE command to device @dev
2437 * PCI/etc. bus probe sem.
2440 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2442 struct ata_taskfile tf;
2444 /* set up set-features taskfile */
2445 DPRINTK("set features - xfer mode\n");
2447 ata_tf_init(ap, &tf, dev->devno);
2448 tf.command = ATA_CMD_SET_FEATURES;
2449 tf.feature = SETFEATURES_XFER;
2450 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2451 tf.protocol = ATA_PROT_NODATA;
2452 tf.nsect = dev->xfer_mode;
2454 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2455 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2457 ata_port_disable(ap);
2464 * ata_dev_reread_id - Reread the device identify device info
2465 * @ap: port where the device is
2466 * @dev: device to reread the identify device info
2471 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2473 struct ata_taskfile tf;
2475 ata_tf_init(ap, &tf, dev->devno);
2477 if (dev->class == ATA_DEV_ATA) {
2478 tf.command = ATA_CMD_ID_ATA;
2479 DPRINTK("do ATA identify\n");
2481 tf.command = ATA_CMD_ID_ATAPI;
2482 DPRINTK("do ATAPI identify\n");
2485 tf.flags |= ATA_TFLAG_DEVICE;
2486 tf.protocol = ATA_PROT_PIO;
2488 if (ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
2489 dev->id, sizeof(dev->id)))
2492 swap_buf_le16(dev->id, ATA_ID_WORDS);
2500 printk(KERN_ERR "ata%u: failed to reread ID, disabled\n", ap->id);
2501 ata_port_disable(ap);
2505 * ata_dev_init_params - Issue INIT DEV PARAMS command
2506 * @ap: Port associated with device @dev
2507 * @dev: Device to which command will be sent
2512 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2514 struct ata_taskfile tf;
2515 u16 sectors = dev->id[6];
2516 u16 heads = dev->id[3];
2518 /* Number of sectors per track 1-255. Number of heads 1-16 */
2519 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2522 /* set up init dev params taskfile */
2523 DPRINTK("init dev params \n");
2525 ata_tf_init(ap, &tf, dev->devno);
2526 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2527 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2528 tf.protocol = ATA_PROT_NODATA;
2530 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2532 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2533 printk(KERN_ERR "ata%u: failed to init parameters, disabled\n",
2535 ata_port_disable(ap);
2542 * ata_sg_clean - Unmap DMA memory associated with command
2543 * @qc: Command containing DMA memory to be released
2545 * Unmap all mapped DMA memory associated with this command.
2548 * spin_lock_irqsave(host_set lock)
2551 static void ata_sg_clean(struct ata_queued_cmd *qc)
2553 struct ata_port *ap = qc->ap;
2554 struct scatterlist *sg = qc->__sg;
2555 int dir = qc->dma_dir;
2556 void *pad_buf = NULL;
2558 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2561 if (qc->flags & ATA_QCFLAG_SINGLE)
2562 assert(qc->n_elem == 1);
2564 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
2566 /* if we padded the buffer out to 32-bit bound, and data
2567 * xfer direction is from-device, we must copy from the
2568 * pad buffer back into the supplied buffer
2570 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2571 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2573 if (qc->flags & ATA_QCFLAG_SG) {
2575 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2576 /* restore last sg */
2577 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2579 struct scatterlist *psg = &qc->pad_sgent;
2580 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2581 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2582 kunmap_atomic(addr, KM_IRQ0);
2585 if (sg_dma_len(&sg[0]) > 0)
2586 dma_unmap_single(ap->host_set->dev,
2587 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2590 sg->length += qc->pad_len;
2592 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2593 pad_buf, qc->pad_len);
2596 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2601 * ata_fill_sg - Fill PCI IDE PRD table
2602 * @qc: Metadata associated with taskfile to be transferred
2604 * Fill PCI IDE PRD (scatter-gather) table with segments
2605 * associated with the current disk command.
2608 * spin_lock_irqsave(host_set lock)
2611 static void ata_fill_sg(struct ata_queued_cmd *qc)
2613 struct ata_port *ap = qc->ap;
2614 struct scatterlist *sg;
2617 assert(qc->__sg != NULL);
2618 assert(qc->n_elem > 0);
2621 ata_for_each_sg(sg, qc) {
2625 /* determine if physical DMA addr spans 64K boundary.
2626 * Note h/w doesn't support 64-bit, so we unconditionally
2627 * truncate dma_addr_t to u32.
2629 addr = (u32) sg_dma_address(sg);
2630 sg_len = sg_dma_len(sg);
2633 offset = addr & 0xffff;
2635 if ((offset + sg_len) > 0x10000)
2636 len = 0x10000 - offset;
2638 ap->prd[idx].addr = cpu_to_le32(addr);
2639 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2640 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2649 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2652 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2653 * @qc: Metadata associated with taskfile to check
2655 * Allow low-level driver to filter ATA PACKET commands, returning
2656 * a status indicating whether or not it is OK to use DMA for the
2657 * supplied PACKET command.
2660 * spin_lock_irqsave(host_set lock)
2662 * RETURNS: 0 when ATAPI DMA can be used
2665 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2667 struct ata_port *ap = qc->ap;
2668 int rc = 0; /* Assume ATAPI DMA is OK by default */
2670 if (ap->ops->check_atapi_dma)
2671 rc = ap->ops->check_atapi_dma(qc);
2676 * ata_qc_prep - Prepare taskfile for submission
2677 * @qc: Metadata associated with taskfile to be prepared
2679 * Prepare ATA taskfile for submission.
2682 * spin_lock_irqsave(host_set lock)
2684 void ata_qc_prep(struct ata_queued_cmd *qc)
2686 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2693 * ata_sg_init_one - Associate command with memory buffer
2694 * @qc: Command to be associated
2695 * @buf: Memory buffer
2696 * @buflen: Length of memory buffer, in bytes.
2698 * Initialize the data-related elements of queued_cmd @qc
2699 * to point to a single memory buffer, @buf of byte length @buflen.
2702 * spin_lock_irqsave(host_set lock)
2705 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2707 struct scatterlist *sg;
2709 qc->flags |= ATA_QCFLAG_SINGLE;
2711 memset(&qc->sgent, 0, sizeof(qc->sgent));
2712 qc->__sg = &qc->sgent;
2714 qc->orig_n_elem = 1;
2718 sg_init_one(sg, buf, buflen);
2722 * ata_sg_init - Associate command with scatter-gather table.
2723 * @qc: Command to be associated
2724 * @sg: Scatter-gather table.
2725 * @n_elem: Number of elements in s/g table.
2727 * Initialize the data-related elements of queued_cmd @qc
2728 * to point to a scatter-gather table @sg, containing @n_elem
2732 * spin_lock_irqsave(host_set lock)
2735 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2736 unsigned int n_elem)
2738 qc->flags |= ATA_QCFLAG_SG;
2740 qc->n_elem = n_elem;
2741 qc->orig_n_elem = n_elem;
2745 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2746 * @qc: Command with memory buffer to be mapped.
2748 * DMA-map the memory buffer associated with queued_cmd @qc.
2751 * spin_lock_irqsave(host_set lock)
2754 * Zero on success, negative on error.
2757 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2759 struct ata_port *ap = qc->ap;
2760 int dir = qc->dma_dir;
2761 struct scatterlist *sg = qc->__sg;
2762 dma_addr_t dma_address;
2764 /* we must lengthen transfers to end on a 32-bit boundary */
2765 qc->pad_len = sg->length & 3;
2767 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2768 struct scatterlist *psg = &qc->pad_sgent;
2770 assert(qc->dev->class == ATA_DEV_ATAPI);
2772 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2774 if (qc->tf.flags & ATA_TFLAG_WRITE)
2775 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2778 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2779 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2781 sg->length -= qc->pad_len;
2783 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2784 sg->length, qc->pad_len);
2788 sg_dma_address(sg) = 0;
2792 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2794 if (dma_mapping_error(dma_address)) {
2796 sg->length += qc->pad_len;
2800 sg_dma_address(sg) = dma_address;
2802 sg_dma_len(sg) = sg->length;
2804 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2805 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2811 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2812 * @qc: Command with scatter-gather table to be mapped.
2814 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2817 * spin_lock_irqsave(host_set lock)
2820 * Zero on success, negative on error.
2824 static int ata_sg_setup(struct ata_queued_cmd *qc)
2826 struct ata_port *ap = qc->ap;
2827 struct scatterlist *sg = qc->__sg;
2828 struct scatterlist *lsg = &sg[qc->n_elem - 1];
2829 int n_elem, pre_n_elem, dir, trim_sg = 0;
2831 VPRINTK("ENTER, ata%u\n", ap->id);
2832 assert(qc->flags & ATA_QCFLAG_SG);
2834 /* we must lengthen transfers to end on a 32-bit boundary */
2835 qc->pad_len = lsg->length & 3;
2837 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2838 struct scatterlist *psg = &qc->pad_sgent;
2839 unsigned int offset;
2841 assert(qc->dev->class == ATA_DEV_ATAPI);
2843 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2846 * psg->page/offset are used to copy to-be-written
2847 * data in this function or read data in ata_sg_clean.
2849 offset = lsg->offset + lsg->length - qc->pad_len;
2850 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2851 psg->offset = offset_in_page(offset);
2853 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2854 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2855 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
2856 kunmap_atomic(addr, KM_IRQ0);
2859 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2860 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2862 lsg->length -= qc->pad_len;
2863 if (lsg->length == 0)
2866 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2867 qc->n_elem - 1, lsg->length, qc->pad_len);
2870 pre_n_elem = qc->n_elem;
2871 if (trim_sg && pre_n_elem)
2880 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
2882 /* restore last sg */
2883 lsg->length += qc->pad_len;
2887 DPRINTK("%d sg elements mapped\n", n_elem);
2890 qc->n_elem = n_elem;
2896 * ata_poll_qc_complete - turn irq back on and finish qc
2897 * @qc: Command to complete
2898 * @err_mask: ATA status register content
2901 * None. (grabs host lock)
2904 void ata_poll_qc_complete(struct ata_queued_cmd *qc)
2906 struct ata_port *ap = qc->ap;
2907 unsigned long flags;
2909 spin_lock_irqsave(&ap->host_set->lock, flags);
2911 ata_qc_complete(qc);
2912 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2917 * @ap: the target ata_port
2920 * None. (executing in kernel thread context)
2923 * timeout value to use
2926 static unsigned long ata_pio_poll(struct ata_port *ap)
2928 struct ata_queued_cmd *qc;
2930 unsigned int poll_state = HSM_ST_UNKNOWN;
2931 unsigned int reg_state = HSM_ST_UNKNOWN;
2933 qc = ata_qc_from_tag(ap, ap->active_tag);
2936 switch (ap->hsm_task_state) {
2939 poll_state = HSM_ST_POLL;
2943 case HSM_ST_LAST_POLL:
2944 poll_state = HSM_ST_LAST_POLL;
2945 reg_state = HSM_ST_LAST;
2952 status = ata_chk_status(ap);
2953 if (status & ATA_BUSY) {
2954 if (time_after(jiffies, ap->pio_task_timeout)) {
2955 qc->err_mask |= AC_ERR_TIMEOUT;
2956 ap->hsm_task_state = HSM_ST_TMOUT;
2959 ap->hsm_task_state = poll_state;
2960 return ATA_SHORT_PAUSE;
2963 ap->hsm_task_state = reg_state;
2968 * ata_pio_complete - check if drive is busy or idle
2969 * @ap: the target ata_port
2972 * None. (executing in kernel thread context)
2975 * Zero if qc completed.
2976 * Non-zero if has next.
2979 static int ata_pio_complete (struct ata_port *ap)
2981 struct ata_queued_cmd *qc;
2985 * This is purely heuristic. This is a fast path. Sometimes when
2986 * we enter, BSY will be cleared in a chk-status or two. If not,
2987 * the drive is probably seeking or something. Snooze for a couple
2988 * msecs, then chk-status again. If still busy, fall back to
2989 * HSM_ST_LAST_POLL state.
2991 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
2992 if (drv_stat & ATA_BUSY) {
2994 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
2995 if (drv_stat & ATA_BUSY) {
2996 ap->hsm_task_state = HSM_ST_LAST_POLL;
2997 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3002 qc = ata_qc_from_tag(ap, ap->active_tag);
3005 drv_stat = ata_wait_idle(ap);
3006 if (!ata_ok(drv_stat)) {
3007 qc->err_mask |= __ac_err_mask(drv_stat);
3008 ap->hsm_task_state = HSM_ST_ERR;
3012 ap->hsm_task_state = HSM_ST_IDLE;
3014 assert(qc->err_mask == 0);
3015 ata_poll_qc_complete(qc);
3017 /* another command may start at this point */
3024 * swap_buf_le16 - swap halves of 16-words in place
3025 * @buf: Buffer to swap
3026 * @buf_words: Number of 16-bit words in buffer.
3028 * Swap halves of 16-bit words if needed to convert from
3029 * little-endian byte order to native cpu byte order, or
3033 * Inherited from caller.
3035 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3040 for (i = 0; i < buf_words; i++)
3041 buf[i] = le16_to_cpu(buf[i]);
3042 #endif /* __BIG_ENDIAN */
3046 * ata_mmio_data_xfer - Transfer data by MMIO
3047 * @ap: port to read/write
3049 * @buflen: buffer length
3050 * @write_data: read/write
3052 * Transfer data from/to the device data register by MMIO.
3055 * Inherited from caller.
3058 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3059 unsigned int buflen, int write_data)
3062 unsigned int words = buflen >> 1;
3063 u16 *buf16 = (u16 *) buf;
3064 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3066 /* Transfer multiple of 2 bytes */
3068 for (i = 0; i < words; i++)
3069 writew(le16_to_cpu(buf16[i]), mmio);
3071 for (i = 0; i < words; i++)
3072 buf16[i] = cpu_to_le16(readw(mmio));
3075 /* Transfer trailing 1 byte, if any. */
3076 if (unlikely(buflen & 0x01)) {
3077 u16 align_buf[1] = { 0 };
3078 unsigned char *trailing_buf = buf + buflen - 1;
3081 memcpy(align_buf, trailing_buf, 1);
3082 writew(le16_to_cpu(align_buf[0]), mmio);
3084 align_buf[0] = cpu_to_le16(readw(mmio));
3085 memcpy(trailing_buf, align_buf, 1);
3091 * ata_pio_data_xfer - Transfer data by PIO
3092 * @ap: port to read/write
3094 * @buflen: buffer length
3095 * @write_data: read/write
3097 * Transfer data from/to the device data register by PIO.
3100 * Inherited from caller.
3103 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3104 unsigned int buflen, int write_data)
3106 unsigned int words = buflen >> 1;
3108 /* Transfer multiple of 2 bytes */
3110 outsw(ap->ioaddr.data_addr, buf, words);
3112 insw(ap->ioaddr.data_addr, buf, words);
3114 /* Transfer trailing 1 byte, if any. */
3115 if (unlikely(buflen & 0x01)) {
3116 u16 align_buf[1] = { 0 };
3117 unsigned char *trailing_buf = buf + buflen - 1;
3120 memcpy(align_buf, trailing_buf, 1);
3121 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3123 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3124 memcpy(trailing_buf, align_buf, 1);
3130 * ata_data_xfer - Transfer data from/to the data register.
3131 * @ap: port to read/write
3133 * @buflen: buffer length
3134 * @do_write: read/write
3136 * Transfer data from/to the device data register.
3139 * Inherited from caller.
3142 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3143 unsigned int buflen, int do_write)
3145 /* Make the crap hardware pay the costs not the good stuff */
3146 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3147 unsigned long flags;
3148 local_irq_save(flags);
3149 if (ap->flags & ATA_FLAG_MMIO)
3150 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3152 ata_pio_data_xfer(ap, buf, buflen, do_write);
3153 local_irq_restore(flags);
3155 if (ap->flags & ATA_FLAG_MMIO)
3156 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3158 ata_pio_data_xfer(ap, buf, buflen, do_write);
3163 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3164 * @qc: Command on going
3166 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3169 * Inherited from caller.
3172 static void ata_pio_sector(struct ata_queued_cmd *qc)
3174 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3175 struct scatterlist *sg = qc->__sg;
3176 struct ata_port *ap = qc->ap;
3178 unsigned int offset;
3181 if (qc->cursect == (qc->nsect - 1))
3182 ap->hsm_task_state = HSM_ST_LAST;
3184 page = sg[qc->cursg].page;
3185 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3187 /* get the current page and offset */
3188 page = nth_page(page, (offset >> PAGE_SHIFT));
3189 offset %= PAGE_SIZE;
3191 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3193 if (PageHighMem(page)) {
3194 unsigned long flags;
3196 local_irq_save(flags);
3197 buf = kmap_atomic(page, KM_IRQ0);
3199 /* do the actual data transfer */
3200 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
3202 kunmap_atomic(buf, KM_IRQ0);
3203 local_irq_restore(flags);
3205 buf = page_address(page);
3206 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
3212 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3219 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3220 * @qc: Command on going
3222 * Transfer one or many ATA_SECT_SIZE of data from/to the
3223 * ATA device for the DRQ request.
3226 * Inherited from caller.
3229 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3231 if (is_multi_taskfile(&qc->tf)) {
3232 /* READ/WRITE MULTIPLE */
3235 assert(qc->dev->multi_count);
3237 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3245 * atapi_send_cdb - Write CDB bytes to hardware
3246 * @ap: Port to which ATAPI device is attached.
3247 * @qc: Taskfile currently active
3249 * When device has indicated its readiness to accept
3250 * a CDB, this function is called. Send the CDB.
3256 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3259 DPRINTK("send cdb\n");
3260 assert(ap->cdb_len >= 12);
3262 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3263 ata_altstatus(ap); /* flush */
3265 switch (qc->tf.protocol) {
3266 case ATA_PROT_ATAPI:
3267 ap->hsm_task_state = HSM_ST;
3269 case ATA_PROT_ATAPI_NODATA:
3270 ap->hsm_task_state = HSM_ST_LAST;
3272 case ATA_PROT_ATAPI_DMA:
3273 ap->hsm_task_state = HSM_ST_LAST;
3274 /* initiate bmdma */
3275 ap->ops->bmdma_start(qc);
3281 * ata_pio_first_block - Write first data block to hardware
3282 * @ap: Port to which ATA/ATAPI device is attached.
3284 * When device has indicated its readiness to accept
3285 * the data, this function sends out the CDB or
3286 * the first data block by PIO.
3288 * - If polling, ata_pio_task() handles the rest.
3289 * - Otherwise, interrupt handler takes over.
3292 * Kernel thread context (may sleep)
3295 * Zero if irq handler takes over
3296 * Non-zero if has next (polling).
3299 static int ata_pio_first_block(struct ata_port *ap)
3301 struct ata_queued_cmd *qc;
3303 unsigned long flags;
3306 qc = ata_qc_from_tag(ap, ap->active_tag);
3308 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3310 /* if polling, we will stay in the work queue after sending the data.
3311 * otherwise, interrupt handler takes over after sending the data.
3313 has_next = (qc->tf.flags & ATA_TFLAG_POLLING);
3315 /* sleep-wait for BSY to clear */
3316 DPRINTK("busy wait\n");
3317 if (ata_busy_sleep(ap, ATA_TMOUT_DATAOUT_QUICK, ATA_TMOUT_DATAOUT)) {
3318 qc->err_mask |= AC_ERR_TIMEOUT;
3319 ap->hsm_task_state = HSM_ST_TMOUT;
3323 /* make sure DRQ is set */
3324 status = ata_chk_status(ap);
3325 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3326 /* device status error */
3327 qc->err_mask |= AC_ERR_HSM;
3328 ap->hsm_task_state = HSM_ST_ERR;
3332 /* Send the CDB (atapi) or the first data block (ata pio out).
3333 * During the state transition, interrupt handler shouldn't
3334 * be invoked before the data transfer is complete and
3335 * hsm_task_state is changed. Hence, the following locking.
3337 spin_lock_irqsave(&ap->host_set->lock, flags);
3339 if (qc->tf.protocol == ATA_PROT_PIO) {
3340 /* PIO data out protocol.
3341 * send first data block.
3344 /* ata_pio_sectors() might change the state to HSM_ST_LAST.
3345 * so, the state is changed here before ata_pio_sectors().
3347 ap->hsm_task_state = HSM_ST;
3348 ata_pio_sectors(qc);
3349 ata_altstatus(ap); /* flush */
3352 atapi_send_cdb(ap, qc);
3354 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3356 /* if polling, ata_pio_task() handles the rest.
3357 * otherwise, interrupt handler takes over from here.
3362 return 1; /* has next */
3366 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3367 * @qc: Command on going
3368 * @bytes: number of bytes
3370 * Transfer Transfer data from/to the ATAPI device.
3373 * Inherited from caller.
3377 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3379 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3380 struct scatterlist *sg = qc->__sg;
3381 struct ata_port *ap = qc->ap;
3384 unsigned int offset, count;
3386 if (qc->curbytes + bytes >= qc->nbytes)
3387 ap->hsm_task_state = HSM_ST_LAST;
3390 if (unlikely(qc->cursg >= qc->n_elem)) {
3392 * The end of qc->sg is reached and the device expects
3393 * more data to transfer. In order not to overrun qc->sg
3394 * and fulfill length specified in the byte count register,
3395 * - for read case, discard trailing data from the device
3396 * - for write case, padding zero data to the device
3398 u16 pad_buf[1] = { 0 };
3399 unsigned int words = bytes >> 1;
3402 if (words) /* warning if bytes > 1 */
3403 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3406 for (i = 0; i < words; i++)
3407 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3409 ap->hsm_task_state = HSM_ST_LAST;
3413 sg = &qc->__sg[qc->cursg];
3416 offset = sg->offset + qc->cursg_ofs;
3418 /* get the current page and offset */
3419 page = nth_page(page, (offset >> PAGE_SHIFT));
3420 offset %= PAGE_SIZE;
3422 /* don't overrun current sg */
3423 count = min(sg->length - qc->cursg_ofs, bytes);
3425 /* don't cross page boundaries */
3426 count = min(count, (unsigned int)PAGE_SIZE - offset);
3428 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3430 if (PageHighMem(page)) {
3431 unsigned long flags;
3433 local_irq_save(flags);
3434 buf = kmap_atomic(page, KM_IRQ0);
3436 /* do the actual data transfer */
3437 ata_data_xfer(ap, buf + offset, count, do_write);
3439 kunmap_atomic(buf, KM_IRQ0);
3440 local_irq_restore(flags);
3442 buf = page_address(page);
3443 ata_data_xfer(ap, buf + offset, count, do_write);
3447 qc->curbytes += count;
3448 qc->cursg_ofs += count;
3450 if (qc->cursg_ofs == sg->length) {
3460 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3461 * @qc: Command on going
3463 * Transfer Transfer data from/to the ATAPI device.
3466 * Inherited from caller.
3469 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3471 struct ata_port *ap = qc->ap;
3472 struct ata_device *dev = qc->dev;
3473 unsigned int ireason, bc_lo, bc_hi, bytes;
3474 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3476 ap->ops->tf_read(ap, &qc->tf);
3477 ireason = qc->tf.nsect;
3478 bc_lo = qc->tf.lbam;
3479 bc_hi = qc->tf.lbah;
3480 bytes = (bc_hi << 8) | bc_lo;
3482 /* shall be cleared to zero, indicating xfer of data */
3483 if (ireason & (1 << 0))
3486 /* make sure transfer direction matches expected */
3487 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3488 if (do_write != i_write)
3491 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3493 __atapi_pio_bytes(qc, bytes);
3498 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3499 ap->id, dev->devno);
3500 qc->err_mask |= AC_ERR_HSM;
3501 ap->hsm_task_state = HSM_ST_ERR;
3505 * ata_pio_block - start PIO on a block
3506 * @ap: the target ata_port
3509 * None. (executing in kernel thread context)
3512 static void ata_pio_block(struct ata_port *ap)
3514 struct ata_queued_cmd *qc;
3518 * This is purely heuristic. This is a fast path.
3519 * Sometimes when we enter, BSY will be cleared in
3520 * a chk-status or two. If not, the drive is probably seeking
3521 * or something. Snooze for a couple msecs, then
3522 * chk-status again. If still busy, fall back to
3523 * HSM_ST_POLL state.
3525 status = ata_busy_wait(ap, ATA_BUSY, 5);
3526 if (status & ATA_BUSY) {
3528 status = ata_busy_wait(ap, ATA_BUSY, 10);
3529 if (status & ATA_BUSY) {
3530 ap->hsm_task_state = HSM_ST_POLL;
3531 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3536 qc = ata_qc_from_tag(ap, ap->active_tag);
3540 if (status & (ATA_ERR | ATA_DF)) {
3541 qc->err_mask |= AC_ERR_DEV;
3542 ap->hsm_task_state = HSM_ST_ERR;
3546 /* transfer data if any */
3547 if (is_atapi_taskfile(&qc->tf)) {
3548 /* DRQ=0 means no more data to transfer */
3549 if ((status & ATA_DRQ) == 0) {
3550 ap->hsm_task_state = HSM_ST_LAST;
3554 atapi_pio_bytes(qc);
3556 /* handle BSY=0, DRQ=0 as error */
3557 if ((status & ATA_DRQ) == 0) {
3558 qc->err_mask |= AC_ERR_HSM;
3559 ap->hsm_task_state = HSM_ST_ERR;
3563 ata_pio_sectors(qc);
3566 ata_altstatus(ap); /* flush */
3569 static void ata_pio_error(struct ata_port *ap)
3571 struct ata_queued_cmd *qc;
3573 qc = ata_qc_from_tag(ap, ap->active_tag);
3576 if (qc->tf.command != ATA_CMD_PACKET)
3577 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3579 /* make sure qc->err_mask is available to
3580 * know what's wrong and recover
3582 assert(qc->err_mask);
3584 ap->hsm_task_state = HSM_ST_IDLE;
3586 ata_poll_qc_complete(qc);
3589 static void ata_pio_task(void *_data)
3591 struct ata_port *ap = _data;
3592 unsigned long timeout;
3599 switch (ap->hsm_task_state) {
3601 has_next = ata_pio_first_block(ap);
3609 has_next = ata_pio_complete(ap);
3613 case HSM_ST_LAST_POLL:
3614 timeout = ata_pio_poll(ap);
3628 ata_queue_delayed_pio_task(ap, timeout);
3634 * ata_qc_timeout - Handle timeout of queued command
3635 * @qc: Command that timed out
3637 * Some part of the kernel (currently, only the SCSI layer)
3638 * has noticed that the active command on port @ap has not
3639 * completed after a specified length of time. Handle this
3640 * condition by disabling DMA (if necessary) and completing
3641 * transactions, with error if necessary.
3643 * This also handles the case of the "lost interrupt", where
3644 * for some reason (possibly hardware bug, possibly driver bug)
3645 * an interrupt was not delivered to the driver, even though the
3646 * transaction completed successfully.
3649 * Inherited from SCSI layer (none, can sleep)
3652 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3654 struct ata_port *ap = qc->ap;
3655 struct ata_host_set *host_set = ap->host_set;
3656 u8 host_stat = 0, drv_stat;
3657 unsigned long flags;
3661 spin_lock_irqsave(&host_set->lock, flags);
3663 switch (qc->tf.protocol) {
3666 case ATA_PROT_ATAPI_DMA:
3667 host_stat = ap->ops->bmdma_status(ap);
3669 /* before we do anything else, clear DMA-Start bit */
3670 ap->ops->bmdma_stop(qc);
3676 drv_stat = ata_chk_status(ap);
3678 /* ack bmdma irq events */
3679 ap->ops->irq_clear(ap);
3681 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3682 ap->id, qc->tf.command, drv_stat, host_stat);
3684 ap->hsm_task_state = HSM_ST_IDLE;
3686 /* complete taskfile transaction */
3687 qc->err_mask |= AC_ERR_TIMEOUT;
3691 spin_unlock_irqrestore(&host_set->lock, flags);
3693 ata_eh_qc_complete(qc);
3699 * ata_eng_timeout - Handle timeout of queued command
3700 * @ap: Port on which timed-out command is active
3702 * Some part of the kernel (currently, only the SCSI layer)
3703 * has noticed that the active command on port @ap has not
3704 * completed after a specified length of time. Handle this
3705 * condition by disabling DMA (if necessary) and completing
3706 * transactions, with error if necessary.
3708 * This also handles the case of the "lost interrupt", where
3709 * for some reason (possibly hardware bug, possibly driver bug)
3710 * an interrupt was not delivered to the driver, even though the
3711 * transaction completed successfully.
3714 * Inherited from SCSI layer (none, can sleep)
3717 void ata_eng_timeout(struct ata_port *ap)
3719 struct ata_queued_cmd *qc;
3723 qc = ata_qc_from_tag(ap, ap->active_tag);
3727 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3737 * ata_qc_new - Request an available ATA command, for queueing
3738 * @ap: Port associated with device @dev
3739 * @dev: Device from whom we request an available command structure
3745 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3747 struct ata_queued_cmd *qc = NULL;
3750 for (i = 0; i < ATA_MAX_QUEUE; i++)
3751 if (!test_and_set_bit(i, &ap->qactive)) {
3752 qc = ata_qc_from_tag(ap, i);
3763 * ata_qc_new_init - Request an available ATA command, and initialize it
3764 * @ap: Port associated with device @dev
3765 * @dev: Device from whom we request an available command structure
3771 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3772 struct ata_device *dev)
3774 struct ata_queued_cmd *qc;
3776 qc = ata_qc_new(ap);
3789 * ata_qc_free - free unused ata_queued_cmd
3790 * @qc: Command to complete
3792 * Designed to free unused ata_queued_cmd object
3793 * in case something prevents using it.
3796 * spin_lock_irqsave(host_set lock)
3798 void ata_qc_free(struct ata_queued_cmd *qc)
3800 struct ata_port *ap = qc->ap;
3803 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3807 if (likely(ata_tag_valid(tag))) {
3808 if (tag == ap->active_tag)
3809 ap->active_tag = ATA_TAG_POISON;
3810 qc->tag = ATA_TAG_POISON;
3811 clear_bit(tag, &ap->qactive);
3816 * ata_qc_complete - Complete an active ATA command
3817 * @qc: Command to complete
3818 * @err_mask: ATA Status register contents
3820 * Indicate to the mid and upper layers that an ATA
3821 * command has completed, with either an ok or not-ok status.
3824 * spin_lock_irqsave(host_set lock)
3827 void ata_qc_complete(struct ata_queued_cmd *qc)
3829 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3830 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3832 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3835 /* atapi: mark qc as inactive to prevent the interrupt handler
3836 * from completing the command twice later, before the error handler
3837 * is called. (when rc != 0 and atapi request sense is needed)
3839 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3841 /* call completion callback */
3842 qc->complete_fn(qc);
3845 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3847 struct ata_port *ap = qc->ap;
3849 switch (qc->tf.protocol) {
3851 case ATA_PROT_ATAPI_DMA:
3854 case ATA_PROT_ATAPI:
3856 case ATA_PROT_PIO_MULT:
3857 if (ap->flags & ATA_FLAG_PIO_DMA)
3870 * ata_qc_issue - issue taskfile to device
3871 * @qc: command to issue to device
3873 * Prepare an ATA command to submission to device.
3874 * This includes mapping the data into a DMA-able
3875 * area, filling in the S/G table, and finally
3876 * writing the taskfile to hardware, starting the command.
3879 * spin_lock_irqsave(host_set lock)
3882 * Zero on success, AC_ERR_* mask on failure
3885 unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
3887 struct ata_port *ap = qc->ap;
3889 if (ata_should_dma_map(qc)) {
3890 if (qc->flags & ATA_QCFLAG_SG) {
3891 if (ata_sg_setup(qc))
3893 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3894 if (ata_sg_setup_one(qc))
3898 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3901 ap->ops->qc_prep(qc);
3903 qc->ap->active_tag = qc->tag;
3904 qc->flags |= ATA_QCFLAG_ACTIVE;
3906 return ap->ops->qc_issue(qc);
3909 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3910 return AC_ERR_SYSTEM;
3915 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3916 * @qc: command to issue to device
3918 * Using various libata functions and hooks, this function
3919 * starts an ATA command. ATA commands are grouped into
3920 * classes called "protocols", and issuing each type of protocol
3921 * is slightly different.
3923 * May be used as the qc_issue() entry in ata_port_operations.
3926 * spin_lock_irqsave(host_set lock)
3929 * Zero on success, AC_ERR_* mask on failure
3932 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3934 struct ata_port *ap = qc->ap;
3936 /* Use polling pio if the LLD doesn't handle
3937 * interrupt driven pio and atapi CDB interrupt.
3939 if (ap->flags & ATA_FLAG_PIO_POLLING) {
3940 switch (qc->tf.protocol) {
3942 case ATA_PROT_ATAPI:
3943 case ATA_PROT_ATAPI_NODATA:
3944 qc->tf.flags |= ATA_TFLAG_POLLING;
3946 case ATA_PROT_ATAPI_DMA:
3947 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
3955 /* select the device */
3956 ata_dev_select(ap, qc->dev->devno, 1, 0);
3958 /* start the command */
3959 switch (qc->tf.protocol) {
3960 case ATA_PROT_NODATA:
3961 if (qc->tf.flags & ATA_TFLAG_POLLING)
3962 ata_qc_set_polling(qc);
3964 ata_tf_to_host(ap, &qc->tf);
3965 ap->hsm_task_state = HSM_ST_LAST;
3967 if (qc->tf.flags & ATA_TFLAG_POLLING)
3968 ata_queue_pio_task(ap);
3973 assert(!(qc->tf.flags & ATA_TFLAG_POLLING));
3975 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3976 ap->ops->bmdma_setup(qc); /* set up bmdma */
3977 ap->ops->bmdma_start(qc); /* initiate bmdma */
3978 ap->hsm_task_state = HSM_ST_LAST;
3982 if (qc->tf.flags & ATA_TFLAG_POLLING)
3983 ata_qc_set_polling(qc);
3985 ata_tf_to_host(ap, &qc->tf);
3987 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3988 /* PIO data out protocol */
3989 ap->hsm_task_state = HSM_ST_FIRST;
3990 ata_queue_pio_task(ap);
3992 /* always send first data block using
3993 * the ata_pio_task() codepath.
3996 /* PIO data in protocol */
3997 ap->hsm_task_state = HSM_ST;
3999 if (qc->tf.flags & ATA_TFLAG_POLLING)
4000 ata_queue_pio_task(ap);
4002 /* if polling, ata_pio_task() handles the rest.
4003 * otherwise, interrupt handler takes over from here.
4009 case ATA_PROT_ATAPI:
4010 case ATA_PROT_ATAPI_NODATA:
4011 if (qc->tf.flags & ATA_TFLAG_POLLING)
4012 ata_qc_set_polling(qc);
4014 ata_tf_to_host(ap, &qc->tf);
4016 ap->hsm_task_state = HSM_ST_FIRST;
4018 /* send cdb by polling if no cdb interrupt */
4019 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4020 (qc->tf.flags & ATA_TFLAG_POLLING))
4021 ata_queue_pio_task(ap);
4024 case ATA_PROT_ATAPI_DMA:
4025 assert(!(qc->tf.flags & ATA_TFLAG_POLLING));
4027 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4028 ap->ops->bmdma_setup(qc); /* set up bmdma */
4029 ap->hsm_task_state = HSM_ST_FIRST;
4031 /* send cdb by polling if no cdb interrupt */
4032 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4033 ata_queue_pio_task(ap);
4038 return AC_ERR_SYSTEM;
4045 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
4046 * @qc: Info associated with this ATA transaction.
4049 * spin_lock_irqsave(host_set lock)
4052 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
4054 struct ata_port *ap = qc->ap;
4055 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4057 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4059 /* load PRD table addr. */
4060 mb(); /* make sure PRD table writes are visible to controller */
4061 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
4063 /* specify data direction, triple-check start bit is clear */
4064 dmactl = readb(mmio + ATA_DMA_CMD);
4065 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4067 dmactl |= ATA_DMA_WR;
4068 writeb(dmactl, mmio + ATA_DMA_CMD);
4070 /* issue r/w command */
4071 ap->ops->exec_command(ap, &qc->tf);
4075 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
4076 * @qc: Info associated with this ATA transaction.
4079 * spin_lock_irqsave(host_set lock)
4082 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
4084 struct ata_port *ap = qc->ap;
4085 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4088 /* start host DMA transaction */
4089 dmactl = readb(mmio + ATA_DMA_CMD);
4090 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
4092 /* Strictly, one may wish to issue a readb() here, to
4093 * flush the mmio write. However, control also passes
4094 * to the hardware at this point, and it will interrupt
4095 * us when we are to resume control. So, in effect,
4096 * we don't care when the mmio write flushes.
4097 * Further, a read of the DMA status register _immediately_
4098 * following the write may not be what certain flaky hardware
4099 * is expected, so I think it is best to not add a readb()
4100 * without first all the MMIO ATA cards/mobos.
4101 * Or maybe I'm just being paranoid.
4106 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
4107 * @qc: Info associated with this ATA transaction.
4110 * spin_lock_irqsave(host_set lock)
4113 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
4115 struct ata_port *ap = qc->ap;
4116 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4119 /* load PRD table addr. */
4120 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
4122 /* specify data direction, triple-check start bit is clear */
4123 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4124 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4126 dmactl |= ATA_DMA_WR;
4127 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4129 /* issue r/w command */
4130 ap->ops->exec_command(ap, &qc->tf);
4134 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
4135 * @qc: Info associated with this ATA transaction.
4138 * spin_lock_irqsave(host_set lock)
4141 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
4143 struct ata_port *ap = qc->ap;
4146 /* start host DMA transaction */
4147 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4148 outb(dmactl | ATA_DMA_START,
4149 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4154 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
4155 * @qc: Info associated with this ATA transaction.
4157 * Writes the ATA_DMA_START flag to the DMA command register.
4159 * May be used as the bmdma_start() entry in ata_port_operations.
4162 * spin_lock_irqsave(host_set lock)
4164 void ata_bmdma_start(struct ata_queued_cmd *qc)
4166 if (qc->ap->flags & ATA_FLAG_MMIO)
4167 ata_bmdma_start_mmio(qc);
4169 ata_bmdma_start_pio(qc);
4174 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
4175 * @qc: Info associated with this ATA transaction.
4177 * Writes address of PRD table to device's PRD Table Address
4178 * register, sets the DMA control register, and calls
4179 * ops->exec_command() to start the transfer.
4181 * May be used as the bmdma_setup() entry in ata_port_operations.
4184 * spin_lock_irqsave(host_set lock)
4186 void ata_bmdma_setup(struct ata_queued_cmd *qc)
4188 if (qc->ap->flags & ATA_FLAG_MMIO)
4189 ata_bmdma_setup_mmio(qc);
4191 ata_bmdma_setup_pio(qc);
4196 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
4197 * @ap: Port associated with this ATA transaction.
4199 * Clear interrupt and error flags in DMA status register.
4201 * May be used as the irq_clear() entry in ata_port_operations.
4204 * spin_lock_irqsave(host_set lock)
4207 void ata_bmdma_irq_clear(struct ata_port *ap)
4209 if (ap->flags & ATA_FLAG_MMIO) {
4210 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
4211 writeb(readb(mmio), mmio);
4213 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
4214 outb(inb(addr), addr);
4221 * ata_bmdma_status - Read PCI IDE BMDMA status
4222 * @ap: Port associated with this ATA transaction.
4224 * Read and return BMDMA status register.
4226 * May be used as the bmdma_status() entry in ata_port_operations.
4229 * spin_lock_irqsave(host_set lock)
4232 u8 ata_bmdma_status(struct ata_port *ap)
4235 if (ap->flags & ATA_FLAG_MMIO) {
4236 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4237 host_stat = readb(mmio + ATA_DMA_STATUS);
4239 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
4245 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
4246 * @qc: Command we are ending DMA for
4248 * Clears the ATA_DMA_START flag in the dma control register
4250 * May be used as the bmdma_stop() entry in ata_port_operations.
4253 * spin_lock_irqsave(host_set lock)
4256 void ata_bmdma_stop(struct ata_queued_cmd *qc)
4258 struct ata_port *ap = qc->ap;
4259 if (ap->flags & ATA_FLAG_MMIO) {
4260 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4262 /* clear start/stop bit */
4263 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
4264 mmio + ATA_DMA_CMD);
4266 /* clear start/stop bit */
4267 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4268 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4271 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4272 ata_altstatus(ap); /* dummy read */
4276 * ata_host_intr - Handle host interrupt for given (port, task)
4277 * @ap: Port on which interrupt arrived (possibly...)
4278 * @qc: Taskfile currently active in engine
4280 * Handle host interrupt for given queued command. Currently,
4281 * only DMA interrupts are handled. All other commands are
4282 * handled via polling with interrupts disabled (nIEN bit).
4285 * spin_lock_irqsave(host_set lock)
4288 * One if interrupt was handled, zero if not (shared irq).
4291 inline unsigned int ata_host_intr (struct ata_port *ap,
4292 struct ata_queued_cmd *qc)
4294 u8 status, host_stat = 0;
4296 VPRINTK("ata%u: protocol %d task_state %d\n",
4297 ap->id, qc->tf.protocol, ap->hsm_task_state);
4299 /* Check whether we are expecting interrupt in this state */
4300 switch (ap->hsm_task_state) {
4302 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4303 * The flag was turned on only for atapi devices.
4304 * No need to check is_atapi_taskfile(&qc->tf) again.
4306 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4310 if (qc->tf.protocol == ATA_PROT_DMA ||
4311 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4312 /* check status of DMA engine */
4313 host_stat = ap->ops->bmdma_status(ap);
4314 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4316 /* if it's not our irq... */
4317 if (!(host_stat & ATA_DMA_INTR))
4320 /* before we do anything else, clear DMA-Start bit */
4321 ap->ops->bmdma_stop(qc);
4323 if (unlikely(host_stat & ATA_DMA_ERR)) {
4324 /* error when transfering data to/from memory */
4325 qc->err_mask |= AC_ERR_HOST_BUS;
4326 ap->hsm_task_state = HSM_ST_ERR;
4336 /* check altstatus */
4337 status = ata_altstatus(ap);
4338 if (status & ATA_BUSY)
4341 /* check main status, clearing INTRQ */
4342 status = ata_chk_status(ap);
4343 if (unlikely(status & ATA_BUSY))
4346 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4347 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4349 /* ack bmdma irq events */
4350 ap->ops->irq_clear(ap);
4353 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4354 qc->err_mask |= AC_ERR_DEV;
4355 ap->hsm_task_state = HSM_ST_ERR;
4359 switch (ap->hsm_task_state) {
4361 /* Some pre-ATAPI-4 devices assert INTRQ
4362 * at this state when ready to receive CDB.
4365 /* check device status */
4366 if (unlikely((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)) {
4367 /* Wrong status. Let EH handle this */
4368 qc->err_mask |= AC_ERR_HSM;
4369 ap->hsm_task_state = HSM_ST_ERR;
4373 atapi_send_cdb(ap, qc);
4378 /* complete command or read/write the data register */
4379 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4380 /* ATAPI PIO protocol */
4381 if ((status & ATA_DRQ) == 0) {
4382 /* no more data to transfer */
4383 ap->hsm_task_state = HSM_ST_LAST;
4387 atapi_pio_bytes(qc);
4389 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4390 /* bad ireason reported by device */
4394 /* ATA PIO protocol */
4395 if (unlikely((status & ATA_DRQ) == 0)) {
4396 /* handle BSY=0, DRQ=0 as error */
4397 qc->err_mask |= AC_ERR_HSM;
4398 ap->hsm_task_state = HSM_ST_ERR;
4402 ata_pio_sectors(qc);
4404 if (ap->hsm_task_state == HSM_ST_LAST &&
4405 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4408 status = ata_chk_status(ap);
4413 ata_altstatus(ap); /* flush */
4417 if (unlikely(status & ATA_DRQ)) {
4418 /* handle DRQ=1 as error */
4419 qc->err_mask |= AC_ERR_HSM;
4420 ap->hsm_task_state = HSM_ST_ERR;
4424 /* no more data to transfer */
4425 DPRINTK("ata%u: command complete, drv_stat 0x%x\n",
4428 ap->hsm_task_state = HSM_ST_IDLE;
4430 /* complete taskfile transaction */
4431 qc->err_mask |= ac_err_mask(status);
4432 ata_qc_complete(qc);
4436 if (qc->tf.command != ATA_CMD_PACKET)
4437 printk(KERN_ERR "ata%u: command error, drv_stat 0x%x host_stat 0x%x\n",
4438 ap->id, status, host_stat);
4440 /* make sure qc->err_mask is available to
4441 * know what's wrong and recover
4443 assert(qc->err_mask);
4445 ap->hsm_task_state = HSM_ST_IDLE;
4446 ata_qc_complete(qc);
4452 return 1; /* irq handled */
4455 ap->stats.idle_irq++;
4458 if ((ap->stats.idle_irq % 1000) == 0) {
4460 ata_irq_ack(ap, 0); /* debug trap */
4461 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4464 return 0; /* irq not handled */
4468 * ata_interrupt - Default ATA host interrupt handler
4469 * @irq: irq line (unused)
4470 * @dev_instance: pointer to our ata_host_set information structure
4473 * Default interrupt handler for PCI IDE devices. Calls
4474 * ata_host_intr() for each port that is not disabled.
4477 * Obtains host_set lock during operation.
4480 * IRQ_NONE or IRQ_HANDLED.
4483 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4485 struct ata_host_set *host_set = dev_instance;
4487 unsigned int handled = 0;
4488 unsigned long flags;
4490 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4491 spin_lock_irqsave(&host_set->lock, flags);
4493 for (i = 0; i < host_set->n_ports; i++) {
4494 struct ata_port *ap;
4496 ap = host_set->ports[i];
4498 !(ap->flags & ATA_FLAG_PORT_DISABLED)) {
4499 struct ata_queued_cmd *qc;
4501 qc = ata_qc_from_tag(ap, ap->active_tag);
4502 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
4503 (qc->flags & ATA_QCFLAG_ACTIVE))
4504 handled |= ata_host_intr(ap, qc);
4508 spin_unlock_irqrestore(&host_set->lock, flags);
4510 return IRQ_RETVAL(handled);
4514 * ata_port_start - Set port up for dma.
4515 * @ap: Port to initialize
4517 * Called just after data structures for each port are
4518 * initialized. Allocates space for PRD table.
4520 * May be used as the port_start() entry in ata_port_operations.
4523 * Inherited from caller.
4527 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4528 * without filling any other registers
4530 static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4533 struct ata_taskfile tf;
4536 ata_tf_init(ap, &tf, dev->devno);
4539 tf.flags |= ATA_TFLAG_DEVICE;
4540 tf.protocol = ATA_PROT_NODATA;
4542 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4544 printk(KERN_ERR "%s: ata command failed: %d\n",
4550 static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4554 if (!ata_try_flush_cache(dev))
4557 if (ata_id_has_flush_ext(dev->id))
4558 cmd = ATA_CMD_FLUSH_EXT;
4560 cmd = ATA_CMD_FLUSH;
4562 return ata_do_simple_cmd(ap, dev, cmd);
4565 static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4567 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4570 static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4572 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4576 * ata_device_resume - wakeup a previously suspended devices
4578 * Kick the drive back into action, by sending it an idle immediate
4579 * command and making sure its transfer mode matches between drive
4583 int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4585 if (ap->flags & ATA_FLAG_SUSPENDED) {
4586 ap->flags &= ~ATA_FLAG_SUSPENDED;
4589 if (!ata_dev_present(dev))
4591 if (dev->class == ATA_DEV_ATA)
4592 ata_start_drive(ap, dev);
4598 * ata_device_suspend - prepare a device for suspend
4600 * Flush the cache on the drive, if appropriate, then issue a
4601 * standbynow command.
4604 int ata_device_suspend(struct ata_port *ap, struct ata_device *dev)
4606 if (!ata_dev_present(dev))
4608 if (dev->class == ATA_DEV_ATA)
4609 ata_flush_cache(ap, dev);
4611 ata_standby_drive(ap, dev);
4612 ap->flags |= ATA_FLAG_SUSPENDED;
4616 int ata_port_start (struct ata_port *ap)
4618 struct device *dev = ap->host_set->dev;
4621 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4625 rc = ata_pad_alloc(ap, dev);
4627 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4631 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4638 * ata_port_stop - Undo ata_port_start()
4639 * @ap: Port to shut down
4641 * Frees the PRD table.
4643 * May be used as the port_stop() entry in ata_port_operations.
4646 * Inherited from caller.
4649 void ata_port_stop (struct ata_port *ap)
4651 struct device *dev = ap->host_set->dev;
4653 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4654 ata_pad_free(ap, dev);
4657 void ata_host_stop (struct ata_host_set *host_set)
4659 if (host_set->mmio_base)
4660 iounmap(host_set->mmio_base);
4665 * ata_host_remove - Unregister SCSI host structure with upper layers
4666 * @ap: Port to unregister
4667 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4670 * Inherited from caller.
4673 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4675 struct Scsi_Host *sh = ap->host;
4680 scsi_remove_host(sh);
4682 ap->ops->port_stop(ap);
4686 * ata_host_init - Initialize an ata_port structure
4687 * @ap: Structure to initialize
4688 * @host: associated SCSI mid-layer structure
4689 * @host_set: Collection of hosts to which @ap belongs
4690 * @ent: Probe information provided by low-level driver
4691 * @port_no: Port number associated with this ata_port
4693 * Initialize a new ata_port structure, and its associated
4697 * Inherited from caller.
4700 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4701 struct ata_host_set *host_set,
4702 const struct ata_probe_ent *ent, unsigned int port_no)
4708 host->max_channel = 1;
4709 host->unique_id = ata_unique_id++;
4710 host->max_cmd_len = 12;
4712 ap->flags = ATA_FLAG_PORT_DISABLED;
4713 ap->id = host->unique_id;
4715 ap->ctl = ATA_DEVCTL_OBS;
4716 ap->host_set = host_set;
4717 ap->port_no = port_no;
4719 ent->legacy_mode ? ent->hard_port_no : port_no;
4720 ap->pio_mask = ent->pio_mask;
4721 ap->mwdma_mask = ent->mwdma_mask;
4722 ap->udma_mask = ent->udma_mask;
4723 ap->flags |= ent->host_flags;
4724 ap->ops = ent->port_ops;
4725 ap->cbl = ATA_CBL_NONE;
4726 ap->active_tag = ATA_TAG_POISON;
4727 ap->last_ctl = 0xFF;
4729 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4730 INIT_LIST_HEAD(&ap->eh_done_q);
4732 for (i = 0; i < ATA_MAX_DEVICES; i++)
4733 ap->device[i].devno = i;
4736 ap->stats.unhandled_irq = 1;
4737 ap->stats.idle_irq = 1;
4740 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4744 * ata_host_add - Attach low-level ATA driver to system
4745 * @ent: Information provided by low-level driver
4746 * @host_set: Collections of ports to which we add
4747 * @port_no: Port number associated with this host
4749 * Attach low-level ATA driver to system.
4752 * PCI/etc. bus probe sem.
4755 * New ata_port on success, for NULL on error.
4758 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4759 struct ata_host_set *host_set,
4760 unsigned int port_no)
4762 struct Scsi_Host *host;
4763 struct ata_port *ap;
4767 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4771 ap = (struct ata_port *) &host->hostdata[0];
4773 ata_host_init(ap, host, host_set, ent, port_no);
4775 rc = ap->ops->port_start(ap);
4782 scsi_host_put(host);
4787 * ata_device_add - Register hardware device with ATA and SCSI layers
4788 * @ent: Probe information describing hardware device to be registered
4790 * This function processes the information provided in the probe
4791 * information struct @ent, allocates the necessary ATA and SCSI
4792 * host information structures, initializes them, and registers
4793 * everything with requisite kernel subsystems.
4795 * This function requests irqs, probes the ATA bus, and probes
4799 * PCI/etc. bus probe sem.
4802 * Number of ports registered. Zero on error (no ports registered).
4805 int ata_device_add(const struct ata_probe_ent *ent)
4807 unsigned int count = 0, i;
4808 struct device *dev = ent->dev;
4809 struct ata_host_set *host_set;
4812 /* alloc a container for our list of ATA ports (buses) */
4813 host_set = kzalloc(sizeof(struct ata_host_set) +
4814 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4817 spin_lock_init(&host_set->lock);
4819 host_set->dev = dev;
4820 host_set->n_ports = ent->n_ports;
4821 host_set->irq = ent->irq;
4822 host_set->mmio_base = ent->mmio_base;
4823 host_set->private_data = ent->private_data;
4824 host_set->ops = ent->port_ops;
4826 /* register each port bound to this device */
4827 for (i = 0; i < ent->n_ports; i++) {
4828 struct ata_port *ap;
4829 unsigned long xfer_mode_mask;
4831 ap = ata_host_add(ent, host_set, i);
4835 host_set->ports[i] = ap;
4836 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4837 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4838 (ap->pio_mask << ATA_SHIFT_PIO);
4840 /* print per-port info to dmesg */
4841 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4842 "bmdma 0x%lX irq %lu\n",
4844 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4845 ata_mode_string(xfer_mode_mask),
4846 ap->ioaddr.cmd_addr,
4847 ap->ioaddr.ctl_addr,
4848 ap->ioaddr.bmdma_addr,
4852 host_set->ops->irq_clear(ap);
4859 /* obtain irq, that is shared between channels */
4860 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4861 DRV_NAME, host_set))
4864 /* perform each probe synchronously */
4865 DPRINTK("probe begin\n");
4866 for (i = 0; i < count; i++) {
4867 struct ata_port *ap;
4870 ap = host_set->ports[i];
4872 DPRINTK("ata%u: probe begin\n", ap->id);
4873 rc = ata_bus_probe(ap);
4874 DPRINTK("ata%u: probe end\n", ap->id);
4877 /* FIXME: do something useful here?
4878 * Current libata behavior will
4879 * tear down everything when
4880 * the module is removed
4881 * or the h/w is unplugged.
4885 rc = scsi_add_host(ap->host, dev);
4887 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4889 /* FIXME: do something useful here */
4890 /* FIXME: handle unconditional calls to
4891 * scsi_scan_host and ata_host_remove, below,
4897 /* probes are done, now scan each port's disk(s) */
4898 DPRINTK("probe begin\n");
4899 for (i = 0; i < count; i++) {
4900 struct ata_port *ap = host_set->ports[i];
4902 ata_scsi_scan_host(ap);
4905 dev_set_drvdata(dev, host_set);
4907 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4908 return ent->n_ports; /* success */
4911 for (i = 0; i < count; i++) {
4912 ata_host_remove(host_set->ports[i], 1);
4913 scsi_host_put(host_set->ports[i]->host);
4917 VPRINTK("EXIT, returning 0\n");
4922 * ata_host_set_remove - PCI layer callback for device removal
4923 * @host_set: ATA host set that was removed
4925 * Unregister all objects associated with this host set. Free those
4929 * Inherited from calling layer (may sleep).
4932 void ata_host_set_remove(struct ata_host_set *host_set)
4934 struct ata_port *ap;
4937 for (i = 0; i < host_set->n_ports; i++) {
4938 ap = host_set->ports[i];
4939 scsi_remove_host(ap->host);
4942 free_irq(host_set->irq, host_set);
4944 for (i = 0; i < host_set->n_ports; i++) {
4945 ap = host_set->ports[i];
4947 ata_scsi_release(ap->host);
4949 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4950 struct ata_ioports *ioaddr = &ap->ioaddr;
4952 if (ioaddr->cmd_addr == 0x1f0)
4953 release_region(0x1f0, 8);
4954 else if (ioaddr->cmd_addr == 0x170)
4955 release_region(0x170, 8);
4958 scsi_host_put(ap->host);
4961 if (host_set->ops->host_stop)
4962 host_set->ops->host_stop(host_set);
4968 * ata_scsi_release - SCSI layer callback hook for host unload
4969 * @host: libata host to be unloaded
4971 * Performs all duties necessary to shut down a libata port...
4972 * Kill port kthread, disable port, and release resources.
4975 * Inherited from SCSI layer.
4981 int ata_scsi_release(struct Scsi_Host *host)
4983 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4987 ap->ops->port_disable(ap);
4988 ata_host_remove(ap, 0);
4995 * ata_std_ports - initialize ioaddr with standard port offsets.
4996 * @ioaddr: IO address structure to be initialized
4998 * Utility function which initializes data_addr, error_addr,
4999 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5000 * device_addr, status_addr, and command_addr to standard offsets
5001 * relative to cmd_addr.
5003 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5006 void ata_std_ports(struct ata_ioports *ioaddr)
5008 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5009 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5010 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5011 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5012 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5013 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5014 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5015 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5016 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5017 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5020 static struct ata_probe_ent *
5021 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5023 struct ata_probe_ent *probe_ent;
5025 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
5027 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5028 kobject_name(&(dev->kobj)));
5032 INIT_LIST_HEAD(&probe_ent->node);
5033 probe_ent->dev = dev;
5035 probe_ent->sht = port->sht;
5036 probe_ent->host_flags = port->host_flags;
5037 probe_ent->pio_mask = port->pio_mask;
5038 probe_ent->mwdma_mask = port->mwdma_mask;
5039 probe_ent->udma_mask = port->udma_mask;
5040 probe_ent->port_ops = port->port_ops;
5049 void ata_pci_host_stop (struct ata_host_set *host_set)
5051 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5053 pci_iounmap(pdev, host_set->mmio_base);
5057 * ata_pci_init_native_mode - Initialize native-mode driver
5058 * @pdev: pci device to be initialized
5059 * @port: array[2] of pointers to port info structures.
5060 * @ports: bitmap of ports present
5062 * Utility function which allocates and initializes an
5063 * ata_probe_ent structure for a standard dual-port
5064 * PIO-based IDE controller. The returned ata_probe_ent
5065 * structure can be passed to ata_device_add(). The returned
5066 * ata_probe_ent structure should then be freed with kfree().
5068 * The caller need only pass the address of the primary port, the
5069 * secondary will be deduced automatically. If the device has non
5070 * standard secondary port mappings this function can be called twice,
5071 * once for each interface.
5074 struct ata_probe_ent *
5075 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports)
5077 struct ata_probe_ent *probe_ent =
5078 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
5084 probe_ent->irq = pdev->irq;
5085 probe_ent->irq_flags = SA_SHIRQ;
5086 probe_ent->private_data = port[0]->private_data;
5088 if (ports & ATA_PORT_PRIMARY) {
5089 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0);
5090 probe_ent->port[p].altstatus_addr =
5091 probe_ent->port[p].ctl_addr =
5092 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
5093 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4);
5094 ata_std_ports(&probe_ent->port[p]);
5098 if (ports & ATA_PORT_SECONDARY) {
5099 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2);
5100 probe_ent->port[p].altstatus_addr =
5101 probe_ent->port[p].ctl_addr =
5102 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
5103 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8;
5104 ata_std_ports(&probe_ent->port[p]);
5108 probe_ent->n_ports = p;
5112 static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info *port, int port_num)
5114 struct ata_probe_ent *probe_ent;
5116 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port);
5120 probe_ent->legacy_mode = 1;
5121 probe_ent->n_ports = 1;
5122 probe_ent->hard_port_no = port_num;
5123 probe_ent->private_data = port->private_data;
5128 probe_ent->irq = 14;
5129 probe_ent->port[0].cmd_addr = 0x1f0;
5130 probe_ent->port[0].altstatus_addr =
5131 probe_ent->port[0].ctl_addr = 0x3f6;
5134 probe_ent->irq = 15;
5135 probe_ent->port[0].cmd_addr = 0x170;
5136 probe_ent->port[0].altstatus_addr =
5137 probe_ent->port[0].ctl_addr = 0x376;
5140 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num;
5141 ata_std_ports(&probe_ent->port[0]);
5146 * ata_pci_init_one - Initialize/register PCI IDE host controller
5147 * @pdev: Controller to be initialized
5148 * @port_info: Information from low-level host driver
5149 * @n_ports: Number of ports attached to host controller
5151 * This is a helper function which can be called from a driver's
5152 * xxx_init_one() probe function if the hardware uses traditional
5153 * IDE taskfile registers.
5155 * This function calls pci_enable_device(), reserves its register
5156 * regions, sets the dma mask, enables bus master mode, and calls
5160 * Inherited from PCI layer (may sleep).
5163 * Zero on success, negative on errno-based value on error.
5166 int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
5167 unsigned int n_ports)
5169 struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL;
5170 struct ata_port_info *port[2];
5172 unsigned int legacy_mode = 0;
5173 int disable_dev_on_err = 1;
5178 port[0] = port_info[0];
5180 port[1] = port_info[1];
5184 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
5185 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
5186 /* TODO: What if one channel is in native mode ... */
5187 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
5188 mask = (1 << 2) | (1 << 0);
5189 if ((tmp8 & mask) != mask)
5190 legacy_mode = (1 << 3);
5194 if ((!legacy_mode) && (n_ports > 2)) {
5195 printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n");
5200 /* FIXME: Really for ATA it isn't safe because the device may be
5201 multi-purpose and we want to leave it alone if it was already
5202 enabled. Secondly for shared use as Arjan says we want refcounting
5204 Checking dev->is_enabled is insufficient as this is not set at
5205 boot for the primary video which is BIOS enabled
5208 rc = pci_enable_device(pdev);
5212 rc = pci_request_regions(pdev, DRV_NAME);
5214 disable_dev_on_err = 0;
5218 /* FIXME: Should use platform specific mappers for legacy port ranges */
5220 if (!request_region(0x1f0, 8, "libata")) {
5221 struct resource *conflict, res;
5223 res.end = 0x1f0 + 8 - 1;
5224 conflict = ____request_resource(&ioport_resource, &res);
5225 if (!strcmp(conflict->name, "libata"))
5226 legacy_mode |= (1 << 0);
5228 disable_dev_on_err = 0;
5229 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
5232 legacy_mode |= (1 << 0);
5234 if (!request_region(0x170, 8, "libata")) {
5235 struct resource *conflict, res;
5237 res.end = 0x170 + 8 - 1;
5238 conflict = ____request_resource(&ioport_resource, &res);
5239 if (!strcmp(conflict->name, "libata"))
5240 legacy_mode |= (1 << 1);
5242 disable_dev_on_err = 0;
5243 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
5246 legacy_mode |= (1 << 1);
5249 /* we have legacy mode, but all ports are unavailable */
5250 if (legacy_mode == (1 << 3)) {
5252 goto err_out_regions;
5255 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
5257 goto err_out_regions;
5258 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
5260 goto err_out_regions;
5263 if (legacy_mode & (1 << 0))
5264 probe_ent = ata_pci_init_legacy_port(pdev, port[0], 0);
5265 if (legacy_mode & (1 << 1))
5266 probe_ent2 = ata_pci_init_legacy_port(pdev, port[1], 1);
5269 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
5271 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY);
5273 if (!probe_ent && !probe_ent2) {
5275 goto err_out_regions;
5278 pci_set_master(pdev);
5280 /* FIXME: check ata_device_add return */
5282 if (legacy_mode & (1 << 0))
5283 ata_device_add(probe_ent);
5284 if (legacy_mode & (1 << 1))
5285 ata_device_add(probe_ent2);
5287 ata_device_add(probe_ent);
5295 if (legacy_mode & (1 << 0))
5296 release_region(0x1f0, 8);
5297 if (legacy_mode & (1 << 1))
5298 release_region(0x170, 8);
5299 pci_release_regions(pdev);
5301 if (disable_dev_on_err)
5302 pci_disable_device(pdev);
5307 * ata_pci_remove_one - PCI layer callback for device removal
5308 * @pdev: PCI device that was removed
5310 * PCI layer indicates to libata via this hook that
5311 * hot-unplug or module unload event has occurred.
5312 * Handle this by unregistering all objects associated
5313 * with this PCI device. Free those objects. Then finally
5314 * release PCI resources and disable device.
5317 * Inherited from PCI layer (may sleep).
5320 void ata_pci_remove_one (struct pci_dev *pdev)
5322 struct device *dev = pci_dev_to_dev(pdev);
5323 struct ata_host_set *host_set = dev_get_drvdata(dev);
5325 ata_host_set_remove(host_set);
5326 pci_release_regions(pdev);
5327 pci_disable_device(pdev);
5328 dev_set_drvdata(dev, NULL);
5331 /* move to PCI subsystem */
5332 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5334 unsigned long tmp = 0;
5336 switch (bits->width) {
5339 pci_read_config_byte(pdev, bits->reg, &tmp8);
5345 pci_read_config_word(pdev, bits->reg, &tmp16);
5351 pci_read_config_dword(pdev, bits->reg, &tmp32);
5362 return (tmp == bits->val) ? 1 : 0;
5365 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5367 pci_save_state(pdev);
5368 pci_disable_device(pdev);
5369 pci_set_power_state(pdev, PCI_D3hot);
5373 int ata_pci_device_resume(struct pci_dev *pdev)
5375 pci_set_power_state(pdev, PCI_D0);
5376 pci_restore_state(pdev);
5377 pci_enable_device(pdev);
5378 pci_set_master(pdev);
5381 #endif /* CONFIG_PCI */
5384 static int __init ata_init(void)
5386 ata_wq = create_workqueue("ata");
5390 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5394 static void __exit ata_exit(void)
5396 destroy_workqueue(ata_wq);
5399 module_init(ata_init);
5400 module_exit(ata_exit);
5402 static unsigned long ratelimit_time;
5403 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5405 int ata_ratelimit(void)
5408 unsigned long flags;
5410 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5412 if (time_after(jiffies, ratelimit_time)) {
5414 ratelimit_time = jiffies + (HZ/5);
5418 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5424 * libata is essentially a library of internal helper functions for
5425 * low-level ATA host controller drivers. As such, the API/ABI is
5426 * likely to change as new drivers are added and updated.
5427 * Do not depend on ABI/API stability.
5430 EXPORT_SYMBOL_GPL(ata_std_bios_param);
5431 EXPORT_SYMBOL_GPL(ata_std_ports);
5432 EXPORT_SYMBOL_GPL(ata_device_add);
5433 EXPORT_SYMBOL_GPL(ata_host_set_remove);
5434 EXPORT_SYMBOL_GPL(ata_sg_init);
5435 EXPORT_SYMBOL_GPL(ata_sg_init_one);
5436 EXPORT_SYMBOL_GPL(ata_qc_complete);
5437 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5438 EXPORT_SYMBOL_GPL(ata_eng_timeout);
5439 EXPORT_SYMBOL_GPL(ata_tf_load);
5440 EXPORT_SYMBOL_GPL(ata_tf_read);
5441 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5442 EXPORT_SYMBOL_GPL(ata_std_dev_select);
5443 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5444 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5445 EXPORT_SYMBOL_GPL(ata_check_status);
5446 EXPORT_SYMBOL_GPL(ata_altstatus);
5447 EXPORT_SYMBOL_GPL(ata_exec_command);
5448 EXPORT_SYMBOL_GPL(ata_port_start);
5449 EXPORT_SYMBOL_GPL(ata_port_stop);
5450 EXPORT_SYMBOL_GPL(ata_host_stop);
5451 EXPORT_SYMBOL_GPL(ata_interrupt);
5452 EXPORT_SYMBOL_GPL(ata_qc_prep);
5453 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5454 EXPORT_SYMBOL_GPL(ata_bmdma_start);
5455 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5456 EXPORT_SYMBOL_GPL(ata_bmdma_status);
5457 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5458 EXPORT_SYMBOL_GPL(ata_port_probe);
5459 EXPORT_SYMBOL_GPL(sata_phy_reset);
5460 EXPORT_SYMBOL_GPL(__sata_phy_reset);
5461 EXPORT_SYMBOL_GPL(ata_bus_reset);
5462 EXPORT_SYMBOL_GPL(ata_port_disable);
5463 EXPORT_SYMBOL_GPL(ata_ratelimit);
5464 EXPORT_SYMBOL_GPL(ata_busy_sleep);
5465 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5466 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5467 EXPORT_SYMBOL_GPL(ata_scsi_error);
5468 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5469 EXPORT_SYMBOL_GPL(ata_scsi_release);
5470 EXPORT_SYMBOL_GPL(ata_host_intr);
5471 EXPORT_SYMBOL_GPL(ata_dev_classify);
5472 EXPORT_SYMBOL_GPL(ata_dev_id_string);
5473 EXPORT_SYMBOL_GPL(ata_dev_config);
5474 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5475 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5476 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
5478 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
5479 EXPORT_SYMBOL_GPL(ata_timing_compute);
5480 EXPORT_SYMBOL_GPL(ata_timing_merge);
5483 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5484 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5485 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5486 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5487 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5488 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5489 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
5490 #endif /* CONFIG_PCI */
5492 EXPORT_SYMBOL_GPL(ata_device_suspend);
5493 EXPORT_SYMBOL_GPL(ata_device_resume);
5494 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5495 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);