2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
64 static unsigned int ata_busy_sleep (struct ata_port *ap,
65 unsigned long tmout_pat,
67 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
68 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
69 static void ata_set_mode(struct ata_port *ap);
70 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
71 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
72 static int fgb(u32 bitmap);
73 static int ata_choose_xfer_mode(const struct ata_port *ap,
75 unsigned int *xfer_shift_out);
76 static void __ata_qc_complete(struct ata_queued_cmd *qc);
78 static unsigned int ata_unique_id = 1;
79 static struct workqueue_struct *ata_wq;
81 int atapi_enabled = 0;
82 module_param(atapi_enabled, int, 0444);
83 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 MODULE_AUTHOR("Jeff Garzik");
86 MODULE_DESCRIPTION("Library module for ATA devices");
87 MODULE_LICENSE("GPL");
88 MODULE_VERSION(DRV_VERSION);
91 * ata_tf_load_pio - send taskfile registers to host controller
92 * @ap: Port to which output is sent
93 * @tf: ATA taskfile register set
95 * Outputs ATA taskfile to standard ATA host controller.
98 * Inherited from caller.
101 static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf)
103 struct ata_ioports *ioaddr = &ap->ioaddr;
104 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
106 if (tf->ctl != ap->last_ctl) {
107 outb(tf->ctl, ioaddr->ctl_addr);
108 ap->last_ctl = tf->ctl;
112 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
113 outb(tf->hob_feature, ioaddr->feature_addr);
114 outb(tf->hob_nsect, ioaddr->nsect_addr);
115 outb(tf->hob_lbal, ioaddr->lbal_addr);
116 outb(tf->hob_lbam, ioaddr->lbam_addr);
117 outb(tf->hob_lbah, ioaddr->lbah_addr);
118 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
127 outb(tf->feature, ioaddr->feature_addr);
128 outb(tf->nsect, ioaddr->nsect_addr);
129 outb(tf->lbal, ioaddr->lbal_addr);
130 outb(tf->lbam, ioaddr->lbam_addr);
131 outb(tf->lbah, ioaddr->lbah_addr);
132 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
140 if (tf->flags & ATA_TFLAG_DEVICE) {
141 outb(tf->device, ioaddr->device_addr);
142 VPRINTK("device 0x%X\n", tf->device);
149 * ata_tf_load_mmio - send taskfile registers to host controller
150 * @ap: Port to which output is sent
151 * @tf: ATA taskfile register set
153 * Outputs ATA taskfile to standard ATA host controller using MMIO.
156 * Inherited from caller.
159 static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
161 struct ata_ioports *ioaddr = &ap->ioaddr;
162 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
164 if (tf->ctl != ap->last_ctl) {
165 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
166 ap->last_ctl = tf->ctl;
170 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
171 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
172 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
173 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
174 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
175 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
176 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
185 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
186 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
187 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
188 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
189 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
190 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
198 if (tf->flags & ATA_TFLAG_DEVICE) {
199 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
200 VPRINTK("device 0x%X\n", tf->device);
208 * ata_tf_load - send taskfile registers to host controller
209 * @ap: Port to which output is sent
210 * @tf: ATA taskfile register set
212 * Outputs ATA taskfile to standard ATA host controller using MMIO
213 * or PIO as indicated by the ATA_FLAG_MMIO flag.
214 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
215 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
216 * hob_lbal, hob_lbam, and hob_lbah.
218 * This function waits for idle (!BUSY and !DRQ) after writing
219 * registers. If the control register has a new value, this
220 * function also waits for idle after writing control and before
221 * writing the remaining registers.
223 * May be used as the tf_load() entry in ata_port_operations.
226 * Inherited from caller.
228 void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
230 if (ap->flags & ATA_FLAG_MMIO)
231 ata_tf_load_mmio(ap, tf);
233 ata_tf_load_pio(ap, tf);
237 * ata_exec_command_pio - issue ATA command to host controller
238 * @ap: port to which command is being issued
239 * @tf: ATA taskfile register set
241 * Issues PIO write to ATA command register, with proper
242 * synchronization with interrupt handler / other threads.
245 * spin_lock_irqsave(host_set lock)
248 static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf)
250 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
252 outb(tf->command, ap->ioaddr.command_addr);
258 * ata_exec_command_mmio - issue ATA command to host controller
259 * @ap: port to which command is being issued
260 * @tf: ATA taskfile register set
262 * Issues MMIO write to ATA command register, with proper
263 * synchronization with interrupt handler / other threads.
266 * spin_lock_irqsave(host_set lock)
269 static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
271 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
273 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
279 * ata_exec_command - issue ATA command to host controller
280 * @ap: port to which command is being issued
281 * @tf: ATA taskfile register set
283 * Issues PIO/MMIO write to ATA command register, with proper
284 * synchronization with interrupt handler / other threads.
287 * spin_lock_irqsave(host_set lock)
289 void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
291 if (ap->flags & ATA_FLAG_MMIO)
292 ata_exec_command_mmio(ap, tf);
294 ata_exec_command_pio(ap, tf);
298 * ata_tf_to_host - issue ATA taskfile to host controller
299 * @ap: port to which command is being issued
300 * @tf: ATA taskfile register set
302 * Issues ATA taskfile register set to ATA host controller,
303 * with proper synchronization with interrupt handler and
307 * spin_lock_irqsave(host_set lock)
310 static inline void ata_tf_to_host(struct ata_port *ap,
311 const struct ata_taskfile *tf)
313 ap->ops->tf_load(ap, tf);
314 ap->ops->exec_command(ap, tf);
318 * ata_tf_read_pio - input device's ATA taskfile shadow registers
319 * @ap: Port from which input is read
320 * @tf: ATA taskfile register set for storing input
322 * Reads ATA taskfile registers for currently-selected device
326 * Inherited from caller.
329 static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
331 struct ata_ioports *ioaddr = &ap->ioaddr;
333 tf->command = ata_check_status(ap);
334 tf->feature = inb(ioaddr->error_addr);
335 tf->nsect = inb(ioaddr->nsect_addr);
336 tf->lbal = inb(ioaddr->lbal_addr);
337 tf->lbam = inb(ioaddr->lbam_addr);
338 tf->lbah = inb(ioaddr->lbah_addr);
339 tf->device = inb(ioaddr->device_addr);
341 if (tf->flags & ATA_TFLAG_LBA48) {
342 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
343 tf->hob_feature = inb(ioaddr->error_addr);
344 tf->hob_nsect = inb(ioaddr->nsect_addr);
345 tf->hob_lbal = inb(ioaddr->lbal_addr);
346 tf->hob_lbam = inb(ioaddr->lbam_addr);
347 tf->hob_lbah = inb(ioaddr->lbah_addr);
352 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
353 * @ap: Port from which input is read
354 * @tf: ATA taskfile register set for storing input
356 * Reads ATA taskfile registers for currently-selected device
360 * Inherited from caller.
363 static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
365 struct ata_ioports *ioaddr = &ap->ioaddr;
367 tf->command = ata_check_status(ap);
368 tf->feature = readb((void __iomem *)ioaddr->error_addr);
369 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
370 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
371 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
372 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
373 tf->device = readb((void __iomem *)ioaddr->device_addr);
375 if (tf->flags & ATA_TFLAG_LBA48) {
376 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
377 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
378 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
379 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
380 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
381 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
387 * ata_tf_read - input device's ATA taskfile shadow registers
388 * @ap: Port from which input is read
389 * @tf: ATA taskfile register set for storing input
391 * Reads ATA taskfile registers for currently-selected device
394 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
395 * is set, also reads the hob registers.
397 * May be used as the tf_read() entry in ata_port_operations.
400 * Inherited from caller.
402 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
404 if (ap->flags & ATA_FLAG_MMIO)
405 ata_tf_read_mmio(ap, tf);
407 ata_tf_read_pio(ap, tf);
411 * ata_check_status_pio - Read device status reg & clear interrupt
412 * @ap: port where the device is
414 * Reads ATA taskfile status register for currently-selected device
415 * and return its value. This also clears pending interrupts
419 * Inherited from caller.
421 static u8 ata_check_status_pio(struct ata_port *ap)
423 return inb(ap->ioaddr.status_addr);
427 * ata_check_status_mmio - Read device status reg & clear interrupt
428 * @ap: port where the device is
430 * Reads ATA taskfile status register for currently-selected device
431 * via MMIO and return its value. This also clears pending interrupts
435 * Inherited from caller.
437 static u8 ata_check_status_mmio(struct ata_port *ap)
439 return readb((void __iomem *) ap->ioaddr.status_addr);
444 * ata_check_status - Read device status reg & clear interrupt
445 * @ap: port where the device is
447 * Reads ATA taskfile status register for currently-selected device
448 * and return its value. This also clears pending interrupts
451 * May be used as the check_status() entry in ata_port_operations.
454 * Inherited from caller.
456 u8 ata_check_status(struct ata_port *ap)
458 if (ap->flags & ATA_FLAG_MMIO)
459 return ata_check_status_mmio(ap);
460 return ata_check_status_pio(ap);
465 * ata_altstatus - Read device alternate status reg
466 * @ap: port where the device is
468 * Reads ATA taskfile alternate status register for
469 * currently-selected device and return its value.
471 * Note: may NOT be used as the check_altstatus() entry in
472 * ata_port_operations.
475 * Inherited from caller.
477 u8 ata_altstatus(struct ata_port *ap)
479 if (ap->ops->check_altstatus)
480 return ap->ops->check_altstatus(ap);
482 if (ap->flags & ATA_FLAG_MMIO)
483 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
484 return inb(ap->ioaddr.altstatus_addr);
489 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
490 * @tf: Taskfile to convert
491 * @fis: Buffer into which data will output
492 * @pmp: Port multiplier port
494 * Converts a standard ATA taskfile to a Serial ATA
495 * FIS structure (Register - Host to Device).
498 * Inherited from caller.
501 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
503 fis[0] = 0x27; /* Register - Host to Device FIS */
504 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
505 bit 7 indicates Command FIS */
506 fis[2] = tf->command;
507 fis[3] = tf->feature;
514 fis[8] = tf->hob_lbal;
515 fis[9] = tf->hob_lbam;
516 fis[10] = tf->hob_lbah;
517 fis[11] = tf->hob_feature;
520 fis[13] = tf->hob_nsect;
531 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
532 * @fis: Buffer from which data will be input
533 * @tf: Taskfile to output
535 * Converts a serial ATA FIS structure to a standard ATA taskfile.
538 * Inherited from caller.
541 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
543 tf->command = fis[2]; /* status */
544 tf->feature = fis[3]; /* error */
551 tf->hob_lbal = fis[8];
552 tf->hob_lbam = fis[9];
553 tf->hob_lbah = fis[10];
556 tf->hob_nsect = fis[13];
559 static const u8 ata_rw_cmds[] = {
563 ATA_CMD_READ_MULTI_EXT,
564 ATA_CMD_WRITE_MULTI_EXT,
568 ATA_CMD_PIO_READ_EXT,
569 ATA_CMD_PIO_WRITE_EXT,
578 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
579 * @qc: command to examine and configure
581 * Examine the device configuration and tf->flags to calculate
582 * the proper read/write commands and protocol to use.
587 void ata_rwcmd_protocol(struct ata_queued_cmd *qc)
589 struct ata_taskfile *tf = &qc->tf;
590 struct ata_device *dev = qc->dev;
592 int index, lba48, write;
594 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
595 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
597 if (dev->flags & ATA_DFLAG_PIO) {
598 tf->protocol = ATA_PROT_PIO;
599 index = dev->multi_count ? 0 : 4;
601 tf->protocol = ATA_PROT_DMA;
605 tf->command = ata_rw_cmds[index + lba48 + write];
608 static const char * const xfer_mode_str[] = {
628 * ata_udma_string - convert UDMA bit offset to string
629 * @mask: mask of bits supported; only highest bit counts.
631 * Determine string which represents the highest speed
632 * (highest bit in @udma_mask).
638 * Constant C string representing highest speed listed in
639 * @udma_mask, or the constant C string "<n/a>".
642 static const char *ata_mode_string(unsigned int mask)
646 for (i = 7; i >= 0; i--)
649 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
652 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
659 return xfer_mode_str[i];
663 * ata_pio_devchk - PATA device presence detection
664 * @ap: ATA channel to examine
665 * @device: Device to examine (starting at zero)
667 * This technique was originally described in
668 * Hale Landis's ATADRVR (www.ata-atapi.com), and
669 * later found its way into the ATA/ATAPI spec.
671 * Write a pattern to the ATA shadow registers,
672 * and if a device is present, it will respond by
673 * correctly storing and echoing back the
674 * ATA shadow register contents.
680 static unsigned int ata_pio_devchk(struct ata_port *ap,
683 struct ata_ioports *ioaddr = &ap->ioaddr;
686 ap->ops->dev_select(ap, device);
688 outb(0x55, ioaddr->nsect_addr);
689 outb(0xaa, ioaddr->lbal_addr);
691 outb(0xaa, ioaddr->nsect_addr);
692 outb(0x55, ioaddr->lbal_addr);
694 outb(0x55, ioaddr->nsect_addr);
695 outb(0xaa, ioaddr->lbal_addr);
697 nsect = inb(ioaddr->nsect_addr);
698 lbal = inb(ioaddr->lbal_addr);
700 if ((nsect == 0x55) && (lbal == 0xaa))
701 return 1; /* we found a device */
703 return 0; /* nothing found */
707 * ata_mmio_devchk - PATA device presence detection
708 * @ap: ATA channel to examine
709 * @device: Device to examine (starting at zero)
711 * This technique was originally described in
712 * Hale Landis's ATADRVR (www.ata-atapi.com), and
713 * later found its way into the ATA/ATAPI spec.
715 * Write a pattern to the ATA shadow registers,
716 * and if a device is present, it will respond by
717 * correctly storing and echoing back the
718 * ATA shadow register contents.
724 static unsigned int ata_mmio_devchk(struct ata_port *ap,
727 struct ata_ioports *ioaddr = &ap->ioaddr;
730 ap->ops->dev_select(ap, device);
732 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
733 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
735 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
736 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
738 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
739 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
741 nsect = readb((void __iomem *) ioaddr->nsect_addr);
742 lbal = readb((void __iomem *) ioaddr->lbal_addr);
744 if ((nsect == 0x55) && (lbal == 0xaa))
745 return 1; /* we found a device */
747 return 0; /* nothing found */
751 * ata_devchk - PATA device presence detection
752 * @ap: ATA channel to examine
753 * @device: Device to examine (starting at zero)
755 * Dispatch ATA device presence detection, depending
756 * on whether we are using PIO or MMIO to talk to the
757 * ATA shadow registers.
763 static unsigned int ata_devchk(struct ata_port *ap,
766 if (ap->flags & ATA_FLAG_MMIO)
767 return ata_mmio_devchk(ap, device);
768 return ata_pio_devchk(ap, device);
772 * ata_dev_classify - determine device type based on ATA-spec signature
773 * @tf: ATA taskfile register set for device to be identified
775 * Determine from taskfile register contents whether a device is
776 * ATA or ATAPI, as per "Signature and persistence" section
777 * of ATA/PI spec (volume 1, sect 5.14).
783 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
784 * the event of failure.
787 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
789 /* Apple's open source Darwin code hints that some devices only
790 * put a proper signature into the LBA mid/high registers,
791 * So, we only check those. It's sufficient for uniqueness.
794 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
795 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
796 DPRINTK("found ATA device by sig\n");
800 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
801 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
802 DPRINTK("found ATAPI device by sig\n");
803 return ATA_DEV_ATAPI;
806 DPRINTK("unknown device\n");
807 return ATA_DEV_UNKNOWN;
811 * ata_dev_try_classify - Parse returned ATA device signature
812 * @ap: ATA channel to examine
813 * @device: Device to examine (starting at zero)
815 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
816 * an ATA/ATAPI-defined set of values is placed in the ATA
817 * shadow registers, indicating the results of device detection
820 * Select the ATA device, and read the values from the ATA shadow
821 * registers. Then parse according to the Error register value,
822 * and the spec-defined values examined by ata_dev_classify().
828 static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
830 struct ata_device *dev = &ap->device[device];
831 struct ata_taskfile tf;
835 ap->ops->dev_select(ap, device);
837 memset(&tf, 0, sizeof(tf));
839 ap->ops->tf_read(ap, &tf);
842 dev->class = ATA_DEV_NONE;
844 /* see if device passed diags */
847 else if ((device == 0) && (err == 0x81))
852 /* determine if device if ATA or ATAPI */
853 class = ata_dev_classify(&tf);
854 if (class == ATA_DEV_UNKNOWN)
856 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
865 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
866 * @id: IDENTIFY DEVICE results we will examine
867 * @s: string into which data is output
868 * @ofs: offset into identify device page
869 * @len: length of string to return. must be an even number.
871 * The strings in the IDENTIFY DEVICE page are broken up into
872 * 16-bit chunks. Run through the string, and output each
873 * 8-bit chunk linearly, regardless of platform.
879 void ata_dev_id_string(const u16 *id, unsigned char *s,
880 unsigned int ofs, unsigned int len)
900 * ata_noop_dev_select - Select device 0/1 on ATA bus
901 * @ap: ATA channel to manipulate
902 * @device: ATA device (numbered from zero) to select
904 * This function performs no actual function.
906 * May be used as the dev_select() entry in ata_port_operations.
911 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
917 * ata_std_dev_select - Select device 0/1 on ATA bus
918 * @ap: ATA channel to manipulate
919 * @device: ATA device (numbered from zero) to select
921 * Use the method defined in the ATA specification to
922 * make either device 0, or device 1, active on the
923 * ATA channel. Works with both PIO and MMIO.
925 * May be used as the dev_select() entry in ata_port_operations.
931 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
936 tmp = ATA_DEVICE_OBS;
938 tmp = ATA_DEVICE_OBS | ATA_DEV1;
940 if (ap->flags & ATA_FLAG_MMIO) {
941 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
943 outb(tmp, ap->ioaddr.device_addr);
945 ata_pause(ap); /* needed; also flushes, for mmio */
949 * ata_dev_select - Select device 0/1 on ATA bus
950 * @ap: ATA channel to manipulate
951 * @device: ATA device (numbered from zero) to select
952 * @wait: non-zero to wait for Status register BSY bit to clear
953 * @can_sleep: non-zero if context allows sleeping
955 * Use the method defined in the ATA specification to
956 * make either device 0, or device 1, active on the
959 * This is a high-level version of ata_std_dev_select(),
960 * which additionally provides the services of inserting
961 * the proper pauses and status polling, where needed.
967 void ata_dev_select(struct ata_port *ap, unsigned int device,
968 unsigned int wait, unsigned int can_sleep)
970 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
971 ap->id, device, wait);
976 ap->ops->dev_select(ap, device);
979 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
986 * ata_dump_id - IDENTIFY DEVICE info debugging output
987 * @dev: Device whose IDENTIFY DEVICE page we will dump
989 * Dump selected 16-bit words from a detected device's
990 * IDENTIFY PAGE page.
996 static inline void ata_dump_id(const struct ata_device *dev)
998 DPRINTK("49==0x%04x "
1008 DPRINTK("80==0x%04x "
1018 DPRINTK("88==0x%04x "
1025 * Compute the PIO modes available for this device. This is not as
1026 * trivial as it seems if we must consider early devices correctly.
1028 * FIXME: pre IDE drive timing (do we care ?).
1031 static unsigned int ata_pio_modes(const struct ata_device *adev)
1035 /* Usual case. Word 53 indicates word 88 is valid */
1036 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 2)) {
1037 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
1043 /* If word 88 isn't valid then Word 51 holds the PIO timing number
1044 for the maximum. Turn it into a mask and return it */
1045 modes = (2 << (adev->id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
1049 static int ata_qc_wait_err(struct ata_queued_cmd *qc,
1050 struct completion *wait)
1054 if (wait_for_completion_timeout(wait, 30 * HZ) < 1) {
1055 /* timeout handling */
1056 unsigned int err_mask = ac_err_mask(ata_chk_status(qc->ap));
1059 printk(KERN_WARNING "ata%u: slow completion (cmd %x)\n",
1060 qc->ap->id, qc->tf.command);
1062 printk(KERN_WARNING "ata%u: qc timeout (cmd %x)\n",
1063 qc->ap->id, qc->tf.command);
1067 ata_qc_complete(qc, err_mask);
1074 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1075 * @ap: port on which device we wish to probe resides
1076 * @device: device bus address, starting at zero
1078 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1079 * command, and read back the 512-byte device information page.
1080 * The device information page is fed to us via the standard
1081 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1082 * using standard PIO-IN paths)
1084 * After reading the device information page, we use several
1085 * bits of information from it to initialize data structures
1086 * that will be used during the lifetime of the ata_device.
1087 * Other data from the info page is used to disqualify certain
1088 * older ATA devices we do not wish to support.
1091 * Inherited from caller. Some functions called by this function
1092 * obtain the host_set lock.
1095 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1097 struct ata_device *dev = &ap->device[device];
1098 unsigned int major_version;
1100 unsigned long xfer_modes;
1101 unsigned int using_edd;
1102 DECLARE_COMPLETION(wait);
1103 struct ata_queued_cmd *qc;
1104 unsigned long flags;
1107 if (!ata_dev_present(dev)) {
1108 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1113 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1118 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1120 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1121 dev->class == ATA_DEV_NONE);
1123 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1125 qc = ata_qc_new_init(ap, dev);
1128 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
1129 qc->dma_dir = DMA_FROM_DEVICE;
1130 qc->tf.protocol = ATA_PROT_PIO;
1134 if (dev->class == ATA_DEV_ATA) {
1135 qc->tf.command = ATA_CMD_ID_ATA;
1136 DPRINTK("do ATA identify\n");
1138 qc->tf.command = ATA_CMD_ID_ATAPI;
1139 DPRINTK("do ATAPI identify\n");
1142 qc->waiting = &wait;
1143 qc->complete_fn = ata_qc_complete_noop;
1145 spin_lock_irqsave(&ap->host_set->lock, flags);
1146 rc = ata_qc_issue(qc);
1147 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1152 ata_qc_wait_err(qc, &wait);
1154 spin_lock_irqsave(&ap->host_set->lock, flags);
1155 ap->ops->tf_read(ap, &qc->tf);
1156 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1158 if (qc->tf.command & ATA_ERR) {
1160 * arg! EDD works for all test cases, but seems to return
1161 * the ATA signature for some ATAPI devices. Until the
1162 * reason for this is found and fixed, we fix up the mess
1163 * here. If IDENTIFY DEVICE returns command aborted
1164 * (as ATAPI devices do), then we issue an
1165 * IDENTIFY PACKET DEVICE.
1167 * ATA software reset (SRST, the default) does not appear
1168 * to have this problem.
1170 if ((using_edd) && (dev->class == ATA_DEV_ATA)) {
1171 u8 err = qc->tf.feature;
1172 if (err & ATA_ABORTED) {
1173 dev->class = ATA_DEV_ATAPI;
1184 swap_buf_le16(dev->id, ATA_ID_WORDS);
1186 /* print device capabilities */
1187 printk(KERN_DEBUG "ata%u: dev %u cfg "
1188 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1189 ap->id, device, dev->id[49],
1190 dev->id[82], dev->id[83], dev->id[84],
1191 dev->id[85], dev->id[86], dev->id[87],
1195 * common ATA, ATAPI feature tests
1198 /* we require DMA support (bits 8 of word 49) */
1199 if (!ata_id_has_dma(dev->id)) {
1200 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1204 /* quick-n-dirty find max transfer mode; for printk only */
1205 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1207 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1209 xfer_modes = ata_pio_modes(dev);
1213 /* ATA-specific feature tests */
1214 if (dev->class == ATA_DEV_ATA) {
1215 if (!ata_id_is_ata(dev->id)) /* sanity check */
1218 /* get major version */
1219 tmp = dev->id[ATA_ID_MAJOR_VER];
1220 for (major_version = 14; major_version >= 1; major_version--)
1221 if (tmp & (1 << major_version))
1225 * The exact sequence expected by certain pre-ATA4 drives is:
1228 * INITIALIZE DEVICE PARAMETERS
1230 * Some drives were very specific about that exact sequence.
1232 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
1233 ata_dev_init_params(ap, dev);
1235 /* current CHS translation info (id[53-58]) might be
1236 * changed. reread the identify device info.
1238 ata_dev_reread_id(ap, dev);
1241 if (ata_id_has_lba(dev->id)) {
1242 dev->flags |= ATA_DFLAG_LBA;
1244 if (ata_id_has_lba48(dev->id)) {
1245 dev->flags |= ATA_DFLAG_LBA48;
1246 dev->n_sectors = ata_id_u64(dev->id, 100);
1248 dev->n_sectors = ata_id_u32(dev->id, 60);
1251 /* print device info to dmesg */
1252 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1255 ata_mode_string(xfer_modes),
1256 (unsigned long long)dev->n_sectors,
1257 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1261 /* Default translation */
1262 dev->cylinders = dev->id[1];
1263 dev->heads = dev->id[3];
1264 dev->sectors = dev->id[6];
1265 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1267 if (ata_id_current_chs_valid(dev->id)) {
1268 /* Current CHS translation is valid. */
1269 dev->cylinders = dev->id[54];
1270 dev->heads = dev->id[55];
1271 dev->sectors = dev->id[56];
1273 dev->n_sectors = ata_id_u32(dev->id, 57);
1276 /* print device info to dmesg */
1277 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1280 ata_mode_string(xfer_modes),
1281 (unsigned long long)dev->n_sectors,
1282 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1286 ap->host->max_cmd_len = 16;
1289 /* ATAPI-specific feature tests */
1290 else if (dev->class == ATA_DEV_ATAPI) {
1291 if (ata_id_is_ata(dev->id)) /* sanity check */
1294 rc = atapi_cdb_len(dev->id);
1295 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1296 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1299 ap->cdb_len = (unsigned int) rc;
1300 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1302 /* print device info to dmesg */
1303 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1305 ata_mode_string(xfer_modes));
1308 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1312 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1315 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1316 DPRINTK("EXIT, err\n");
1320 static inline u8 ata_dev_knobble(const struct ata_port *ap)
1322 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1326 * ata_dev_config - Run device specific handlers and check for
1327 * SATA->PATA bridges
1334 void ata_dev_config(struct ata_port *ap, unsigned int i)
1336 /* limit bridge transfers to udma5, 200 sectors */
1337 if (ata_dev_knobble(ap)) {
1338 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1339 ap->id, ap->device->devno);
1340 ap->udma_mask &= ATA_UDMA5;
1341 ap->host->max_sectors = ATA_MAX_SECTORS;
1342 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1343 ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
1346 if (ap->ops->dev_config)
1347 ap->ops->dev_config(ap, &ap->device[i]);
1351 * ata_bus_probe - Reset and probe ATA bus
1354 * Master ATA bus probing function. Initiates a hardware-dependent
1355 * bus reset, then attempts to identify any devices found on
1359 * PCI/etc. bus probe sem.
1362 * Zero on success, non-zero on error.
1365 static int ata_bus_probe(struct ata_port *ap)
1367 unsigned int i, found = 0;
1369 ap->ops->phy_reset(ap);
1370 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1373 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1374 ata_dev_identify(ap, i);
1375 if (ata_dev_present(&ap->device[i])) {
1377 ata_dev_config(ap,i);
1381 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1382 goto err_out_disable;
1385 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1386 goto err_out_disable;
1391 ap->ops->port_disable(ap);
1397 * ata_port_probe - Mark port as enabled
1398 * @ap: Port for which we indicate enablement
1400 * Modify @ap data structure such that the system
1401 * thinks that the entire port is enabled.
1403 * LOCKING: host_set lock, or some other form of
1407 void ata_port_probe(struct ata_port *ap)
1409 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1413 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1414 * @ap: SATA port associated with target SATA PHY.
1416 * This function issues commands to standard SATA Sxxx
1417 * PHY registers, to wake up the phy (and device), and
1418 * clear any reset condition.
1421 * PCI/etc. bus probe sem.
1424 void __sata_phy_reset(struct ata_port *ap)
1427 unsigned long timeout = jiffies + (HZ * 5);
1429 if (ap->flags & ATA_FLAG_SATA_RESET) {
1430 /* issue phy wake/reset */
1431 scr_write_flush(ap, SCR_CONTROL, 0x301);
1432 /* Couldn't find anything in SATA I/II specs, but
1433 * AHCI-1.1 10.4.2 says at least 1 ms. */
1436 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1438 /* wait for phy to become ready, if necessary */
1441 sstatus = scr_read(ap, SCR_STATUS);
1442 if ((sstatus & 0xf) != 1)
1444 } while (time_before(jiffies, timeout));
1446 /* TODO: phy layer with polling, timeouts, etc. */
1447 sstatus = scr_read(ap, SCR_STATUS);
1448 if (sata_dev_present(ap)) {
1452 tmp = (sstatus >> 4) & 0xf;
1455 else if (tmp & (1 << 1))
1458 speed = "<unknown>";
1459 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1460 ap->id, speed, sstatus);
1463 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1465 ata_port_disable(ap);
1468 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1471 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1472 ata_port_disable(ap);
1476 ap->cbl = ATA_CBL_SATA;
1480 * sata_phy_reset - Reset SATA bus.
1481 * @ap: SATA port associated with target SATA PHY.
1483 * This function resets the SATA bus, and then probes
1484 * the bus for devices.
1487 * PCI/etc. bus probe sem.
1490 void sata_phy_reset(struct ata_port *ap)
1492 __sata_phy_reset(ap);
1493 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1499 * ata_port_disable - Disable port.
1500 * @ap: Port to be disabled.
1502 * Modify @ap data structure such that the system
1503 * thinks that the entire port is disabled, and should
1504 * never attempt to probe or communicate with devices
1507 * LOCKING: host_set lock, or some other form of
1511 void ata_port_disable(struct ata_port *ap)
1513 ap->device[0].class = ATA_DEV_NONE;
1514 ap->device[1].class = ATA_DEV_NONE;
1515 ap->flags |= ATA_FLAG_PORT_DISABLED;
1519 * This mode timing computation functionality is ported over from
1520 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1523 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1524 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1525 * for PIO 5, which is a nonstandard extension and UDMA6, which
1526 * is currently supported only by Maxtor drives.
1529 static const struct ata_timing ata_timing[] = {
1531 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1532 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1533 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1534 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1536 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1537 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1538 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1540 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1542 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1543 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1544 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1546 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1547 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1548 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1550 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1551 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1552 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1554 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1555 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1556 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1558 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1563 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1564 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1566 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1568 q->setup = EZ(t->setup * 1000, T);
1569 q->act8b = EZ(t->act8b * 1000, T);
1570 q->rec8b = EZ(t->rec8b * 1000, T);
1571 q->cyc8b = EZ(t->cyc8b * 1000, T);
1572 q->active = EZ(t->active * 1000, T);
1573 q->recover = EZ(t->recover * 1000, T);
1574 q->cycle = EZ(t->cycle * 1000, T);
1575 q->udma = EZ(t->udma * 1000, UT);
1578 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1579 struct ata_timing *m, unsigned int what)
1581 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1582 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1583 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1584 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1585 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1586 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1587 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1588 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1591 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1593 const struct ata_timing *t;
1595 for (t = ata_timing; t->mode != speed; t++)
1596 if (t->mode == 0xFF)
1601 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1602 struct ata_timing *t, int T, int UT)
1604 const struct ata_timing *s;
1605 struct ata_timing p;
1611 if (!(s = ata_timing_find_mode(speed)))
1614 memcpy(t, s, sizeof(*s));
1617 * If the drive is an EIDE drive, it can tell us it needs extended
1618 * PIO/MW_DMA cycle timing.
1621 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1622 memset(&p, 0, sizeof(p));
1623 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1624 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1625 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1626 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1627 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1629 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1633 * Convert the timing to bus clock counts.
1636 ata_timing_quantize(t, t, T, UT);
1639 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T
1640 * and some other commands. We have to ensure that the DMA cycle timing is
1641 * slower/equal than the fastest PIO timing.
1644 if (speed > XFER_PIO_4) {
1645 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1646 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1650 * Lenghten active & recovery time so that cycle time is correct.
1653 if (t->act8b + t->rec8b < t->cyc8b) {
1654 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1655 t->rec8b = t->cyc8b - t->act8b;
1658 if (t->active + t->recover < t->cycle) {
1659 t->active += (t->cycle - (t->active + t->recover)) / 2;
1660 t->recover = t->cycle - t->active;
1666 static const struct {
1669 } xfer_mode_classes[] = {
1670 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1671 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1672 { ATA_SHIFT_PIO, XFER_PIO_0 },
1675 static inline u8 base_from_shift(unsigned int shift)
1679 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1680 if (xfer_mode_classes[i].shift == shift)
1681 return xfer_mode_classes[i].base;
1686 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1691 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1694 if (dev->xfer_shift == ATA_SHIFT_PIO)
1695 dev->flags |= ATA_DFLAG_PIO;
1697 ata_dev_set_xfermode(ap, dev);
1699 base = base_from_shift(dev->xfer_shift);
1700 ofs = dev->xfer_mode - base;
1701 idx = ofs + dev->xfer_shift;
1702 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1704 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1705 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1707 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1708 ap->id, dev->devno, xfer_mode_str[idx]);
1711 static int ata_host_set_pio(struct ata_port *ap)
1717 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1720 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1724 base = base_from_shift(ATA_SHIFT_PIO);
1725 xfer_mode = base + x;
1727 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1728 (int)base, (int)xfer_mode, mask, x);
1730 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1731 struct ata_device *dev = &ap->device[i];
1732 if (ata_dev_present(dev)) {
1733 dev->pio_mode = xfer_mode;
1734 dev->xfer_mode = xfer_mode;
1735 dev->xfer_shift = ATA_SHIFT_PIO;
1736 if (ap->ops->set_piomode)
1737 ap->ops->set_piomode(ap, dev);
1744 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1745 unsigned int xfer_shift)
1749 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1750 struct ata_device *dev = &ap->device[i];
1751 if (ata_dev_present(dev)) {
1752 dev->dma_mode = xfer_mode;
1753 dev->xfer_mode = xfer_mode;
1754 dev->xfer_shift = xfer_shift;
1755 if (ap->ops->set_dmamode)
1756 ap->ops->set_dmamode(ap, dev);
1762 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1763 * @ap: port on which timings will be programmed
1765 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1768 * PCI/etc. bus probe sem.
1771 static void ata_set_mode(struct ata_port *ap)
1773 unsigned int xfer_shift;
1777 /* step 1: always set host PIO timings */
1778 rc = ata_host_set_pio(ap);
1782 /* step 2: choose the best data xfer mode */
1783 xfer_mode = xfer_shift = 0;
1784 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1788 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1789 if (xfer_shift != ATA_SHIFT_PIO)
1790 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1792 /* step 4: update devices' xfer mode */
1793 ata_dev_set_mode(ap, &ap->device[0]);
1794 ata_dev_set_mode(ap, &ap->device[1]);
1796 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1799 if (ap->ops->post_set_mode)
1800 ap->ops->post_set_mode(ap);
1805 ata_port_disable(ap);
1809 * ata_busy_sleep - sleep until BSY clears, or timeout
1810 * @ap: port containing status register to be polled
1811 * @tmout_pat: impatience timeout
1812 * @tmout: overall timeout
1814 * Sleep until ATA Status register bit BSY clears,
1815 * or a timeout occurs.
1821 static unsigned int ata_busy_sleep (struct ata_port *ap,
1822 unsigned long tmout_pat,
1823 unsigned long tmout)
1825 unsigned long timer_start, timeout;
1828 status = ata_busy_wait(ap, ATA_BUSY, 300);
1829 timer_start = jiffies;
1830 timeout = timer_start + tmout_pat;
1831 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1833 status = ata_busy_wait(ap, ATA_BUSY, 3);
1836 if (status & ATA_BUSY)
1837 printk(KERN_WARNING "ata%u is slow to respond, "
1838 "please be patient\n", ap->id);
1840 timeout = timer_start + tmout;
1841 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1843 status = ata_chk_status(ap);
1846 if (status & ATA_BUSY) {
1847 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1848 ap->id, tmout / HZ);
1855 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1857 struct ata_ioports *ioaddr = &ap->ioaddr;
1858 unsigned int dev0 = devmask & (1 << 0);
1859 unsigned int dev1 = devmask & (1 << 1);
1860 unsigned long timeout;
1862 /* if device 0 was found in ata_devchk, wait for its
1866 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1868 /* if device 1 was found in ata_devchk, wait for
1869 * register access, then wait for BSY to clear
1871 timeout = jiffies + ATA_TMOUT_BOOT;
1875 ap->ops->dev_select(ap, 1);
1876 if (ap->flags & ATA_FLAG_MMIO) {
1877 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1878 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1880 nsect = inb(ioaddr->nsect_addr);
1881 lbal = inb(ioaddr->lbal_addr);
1883 if ((nsect == 1) && (lbal == 1))
1885 if (time_after(jiffies, timeout)) {
1889 msleep(50); /* give drive a breather */
1892 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1894 /* is all this really necessary? */
1895 ap->ops->dev_select(ap, 0);
1897 ap->ops->dev_select(ap, 1);
1899 ap->ops->dev_select(ap, 0);
1903 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1904 * @ap: Port to reset and probe
1906 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1907 * probe the bus. Not often used these days.
1910 * PCI/etc. bus probe sem.
1911 * Obtains host_set lock.
1915 static unsigned int ata_bus_edd(struct ata_port *ap)
1917 struct ata_taskfile tf;
1918 unsigned long flags;
1920 /* set up execute-device-diag (bus reset) taskfile */
1921 /* also, take interrupts to a known state (disabled) */
1922 DPRINTK("execute-device-diag\n");
1923 ata_tf_init(ap, &tf, 0);
1925 tf.command = ATA_CMD_EDD;
1926 tf.protocol = ATA_PROT_NODATA;
1929 spin_lock_irqsave(&ap->host_set->lock, flags);
1930 ata_tf_to_host(ap, &tf);
1931 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1933 /* spec says at least 2ms. but who knows with those
1934 * crazy ATAPI devices...
1938 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1941 static unsigned int ata_bus_softreset(struct ata_port *ap,
1942 unsigned int devmask)
1944 struct ata_ioports *ioaddr = &ap->ioaddr;
1946 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1948 /* software reset. causes dev0 to be selected */
1949 if (ap->flags & ATA_FLAG_MMIO) {
1950 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1951 udelay(20); /* FIXME: flush */
1952 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1953 udelay(20); /* FIXME: flush */
1954 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1956 outb(ap->ctl, ioaddr->ctl_addr);
1958 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1960 outb(ap->ctl, ioaddr->ctl_addr);
1963 /* spec mandates ">= 2ms" before checking status.
1964 * We wait 150ms, because that was the magic delay used for
1965 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1966 * between when the ATA command register is written, and then
1967 * status is checked. Because waiting for "a while" before
1968 * checking status is fine, post SRST, we perform this magic
1969 * delay here as well.
1973 ata_bus_post_reset(ap, devmask);
1979 * ata_bus_reset - reset host port and associated ATA channel
1980 * @ap: port to reset
1982 * This is typically the first time we actually start issuing
1983 * commands to the ATA channel. We wait for BSY to clear, then
1984 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1985 * result. Determine what devices, if any, are on the channel
1986 * by looking at the device 0/1 error register. Look at the signature
1987 * stored in each device's taskfile registers, to determine if
1988 * the device is ATA or ATAPI.
1991 * PCI/etc. bus probe sem.
1992 * Obtains host_set lock.
1995 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1998 void ata_bus_reset(struct ata_port *ap)
2000 struct ata_ioports *ioaddr = &ap->ioaddr;
2001 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2003 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
2005 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2007 /* determine if device 0/1 are present */
2008 if (ap->flags & ATA_FLAG_SATA_RESET)
2011 dev0 = ata_devchk(ap, 0);
2013 dev1 = ata_devchk(ap, 1);
2017 devmask |= (1 << 0);
2019 devmask |= (1 << 1);
2021 /* select device 0 again */
2022 ap->ops->dev_select(ap, 0);
2024 /* issue bus reset */
2025 if (ap->flags & ATA_FLAG_SRST)
2026 rc = ata_bus_softreset(ap, devmask);
2027 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
2028 /* set up device control */
2029 if (ap->flags & ATA_FLAG_MMIO)
2030 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2032 outb(ap->ctl, ioaddr->ctl_addr);
2033 rc = ata_bus_edd(ap);
2040 * determine by signature whether we have ATA or ATAPI devices
2042 err = ata_dev_try_classify(ap, 0);
2043 if ((slave_possible) && (err != 0x81))
2044 ata_dev_try_classify(ap, 1);
2046 /* re-enable interrupts */
2047 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2050 /* is double-select really necessary? */
2051 if (ap->device[1].class != ATA_DEV_NONE)
2052 ap->ops->dev_select(ap, 1);
2053 if (ap->device[0].class != ATA_DEV_NONE)
2054 ap->ops->dev_select(ap, 0);
2056 /* if no devices were detected, disable this port */
2057 if ((ap->device[0].class == ATA_DEV_NONE) &&
2058 (ap->device[1].class == ATA_DEV_NONE))
2061 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2062 /* set up device control for ATA_FLAG_SATA_RESET */
2063 if (ap->flags & ATA_FLAG_MMIO)
2064 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2066 outb(ap->ctl, ioaddr->ctl_addr);
2073 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2074 ap->ops->port_disable(ap);
2079 static void ata_pr_blacklisted(const struct ata_port *ap,
2080 const struct ata_device *dev)
2082 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2083 ap->id, dev->devno);
2086 static const char * const ata_dma_blacklist [] = {
2105 "Toshiba CD-ROM XM-6202B",
2106 "TOSHIBA CD-ROM XM-1702BC",
2108 "E-IDE CD-ROM CR-840",
2111 "SAMSUNG CD-ROM SC-148C",
2112 "SAMSUNG CD-ROM SC",
2114 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2118 static int ata_dma_blacklisted(const struct ata_device *dev)
2120 unsigned char model_num[40];
2125 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2128 len = strnlen(s, sizeof(model_num));
2130 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2131 while ((len > 0) && (s[len - 1] == ' ')) {
2136 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2137 if (!strncmp(ata_dma_blacklist[i], s, len))
2143 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
2145 const struct ata_device *master, *slave;
2148 master = &ap->device[0];
2149 slave = &ap->device[1];
2151 assert (ata_dev_present(master) || ata_dev_present(slave));
2153 if (shift == ATA_SHIFT_UDMA) {
2154 mask = ap->udma_mask;
2155 if (ata_dev_present(master)) {
2156 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2157 if (ata_dma_blacklisted(master)) {
2159 ata_pr_blacklisted(ap, master);
2162 if (ata_dev_present(slave)) {
2163 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2164 if (ata_dma_blacklisted(slave)) {
2166 ata_pr_blacklisted(ap, slave);
2170 else if (shift == ATA_SHIFT_MWDMA) {
2171 mask = ap->mwdma_mask;
2172 if (ata_dev_present(master)) {
2173 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2174 if (ata_dma_blacklisted(master)) {
2176 ata_pr_blacklisted(ap, master);
2179 if (ata_dev_present(slave)) {
2180 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2181 if (ata_dma_blacklisted(slave)) {
2183 ata_pr_blacklisted(ap, slave);
2187 else if (shift == ATA_SHIFT_PIO) {
2188 mask = ap->pio_mask;
2189 if (ata_dev_present(master)) {
2190 /* spec doesn't return explicit support for
2191 * PIO0-2, so we fake it
2193 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2198 if (ata_dev_present(slave)) {
2199 /* spec doesn't return explicit support for
2200 * PIO0-2, so we fake it
2202 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2209 mask = 0xffffffff; /* shut up compiler warning */
2216 /* find greatest bit */
2217 static int fgb(u32 bitmap)
2222 for (i = 0; i < 32; i++)
2223 if (bitmap & (1 << i))
2230 * ata_choose_xfer_mode - attempt to find best transfer mode
2231 * @ap: Port for which an xfer mode will be selected
2232 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2233 * @xfer_shift_out: (output) bit shift that selects this mode
2235 * Based on host and device capabilities, determine the
2236 * maximum transfer mode that is amenable to all.
2239 * PCI/etc. bus probe sem.
2242 * Zero on success, negative on error.
2245 static int ata_choose_xfer_mode(const struct ata_port *ap,
2247 unsigned int *xfer_shift_out)
2249 unsigned int mask, shift;
2252 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2253 shift = xfer_mode_classes[i].shift;
2254 mask = ata_get_mode_mask(ap, shift);
2258 *xfer_mode_out = xfer_mode_classes[i].base + x;
2259 *xfer_shift_out = shift;
2268 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2269 * @ap: Port associated with device @dev
2270 * @dev: Device to which command will be sent
2272 * Issue SET FEATURES - XFER MODE command to device @dev
2276 * PCI/etc. bus probe sem.
2279 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2281 DECLARE_COMPLETION(wait);
2282 struct ata_queued_cmd *qc;
2284 unsigned long flags;
2286 /* set up set-features taskfile */
2287 DPRINTK("set features - xfer mode\n");
2289 qc = ata_qc_new_init(ap, dev);
2292 qc->tf.command = ATA_CMD_SET_FEATURES;
2293 qc->tf.feature = SETFEATURES_XFER;
2294 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2295 qc->tf.protocol = ATA_PROT_NODATA;
2296 qc->tf.nsect = dev->xfer_mode;
2298 qc->waiting = &wait;
2299 qc->complete_fn = ata_qc_complete_noop;
2301 spin_lock_irqsave(&ap->host_set->lock, flags);
2302 rc = ata_qc_issue(qc);
2303 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2306 ata_port_disable(ap);
2308 ata_qc_wait_err(qc, &wait);
2314 * ata_dev_reread_id - Reread the device identify device info
2315 * @ap: port where the device is
2316 * @dev: device to reread the identify device info
2321 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2323 DECLARE_COMPLETION(wait);
2324 struct ata_queued_cmd *qc;
2325 unsigned long flags;
2328 qc = ata_qc_new_init(ap, dev);
2331 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
2332 qc->dma_dir = DMA_FROM_DEVICE;
2334 if (dev->class == ATA_DEV_ATA) {
2335 qc->tf.command = ATA_CMD_ID_ATA;
2336 DPRINTK("do ATA identify\n");
2338 qc->tf.command = ATA_CMD_ID_ATAPI;
2339 DPRINTK("do ATAPI identify\n");
2342 qc->tf.flags |= ATA_TFLAG_DEVICE;
2343 qc->tf.protocol = ATA_PROT_PIO;
2346 qc->waiting = &wait;
2347 qc->complete_fn = ata_qc_complete_noop;
2349 spin_lock_irqsave(&ap->host_set->lock, flags);
2350 rc = ata_qc_issue(qc);
2351 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2356 ata_qc_wait_err(qc, &wait);
2358 swap_buf_le16(dev->id, ATA_ID_WORDS);
2366 ata_port_disable(ap);
2370 * ata_dev_init_params - Issue INIT DEV PARAMS command
2371 * @ap: Port associated with device @dev
2372 * @dev: Device to which command will be sent
2377 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2379 DECLARE_COMPLETION(wait);
2380 struct ata_queued_cmd *qc;
2382 unsigned long flags;
2383 u16 sectors = dev->id[6];
2384 u16 heads = dev->id[3];
2386 /* Number of sectors per track 1-255. Number of heads 1-16 */
2387 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2390 /* set up init dev params taskfile */
2391 DPRINTK("init dev params \n");
2393 qc = ata_qc_new_init(ap, dev);
2396 qc->tf.command = ATA_CMD_INIT_DEV_PARAMS;
2397 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2398 qc->tf.protocol = ATA_PROT_NODATA;
2399 qc->tf.nsect = sectors;
2400 qc->tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2402 qc->waiting = &wait;
2403 qc->complete_fn = ata_qc_complete_noop;
2405 spin_lock_irqsave(&ap->host_set->lock, flags);
2406 rc = ata_qc_issue(qc);
2407 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2410 ata_port_disable(ap);
2412 ata_qc_wait_err(qc, &wait);
2418 * ata_sg_clean - Unmap DMA memory associated with command
2419 * @qc: Command containing DMA memory to be released
2421 * Unmap all mapped DMA memory associated with this command.
2424 * spin_lock_irqsave(host_set lock)
2427 static void ata_sg_clean(struct ata_queued_cmd *qc)
2429 struct ata_port *ap = qc->ap;
2430 struct scatterlist *sg = qc->__sg;
2431 int dir = qc->dma_dir;
2432 void *pad_buf = NULL;
2434 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2437 if (qc->flags & ATA_QCFLAG_SINGLE)
2438 assert(qc->n_elem == 1);
2440 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
2442 /* if we padded the buffer out to 32-bit bound, and data
2443 * xfer direction is from-device, we must copy from the
2444 * pad buffer back into the supplied buffer
2446 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2447 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2449 if (qc->flags & ATA_QCFLAG_SG) {
2451 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2452 /* restore last sg */
2453 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2455 struct scatterlist *psg = &qc->pad_sgent;
2456 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2457 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2458 kunmap_atomic(psg->page, KM_IRQ0);
2461 if (sg_dma_len(&sg[0]) > 0)
2462 dma_unmap_single(ap->host_set->dev,
2463 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2466 sg->length += qc->pad_len;
2468 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2469 pad_buf, qc->pad_len);
2472 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2477 * ata_fill_sg - Fill PCI IDE PRD table
2478 * @qc: Metadata associated with taskfile to be transferred
2480 * Fill PCI IDE PRD (scatter-gather) table with segments
2481 * associated with the current disk command.
2484 * spin_lock_irqsave(host_set lock)
2487 static void ata_fill_sg(struct ata_queued_cmd *qc)
2489 struct ata_port *ap = qc->ap;
2490 struct scatterlist *sg;
2493 assert(qc->__sg != NULL);
2494 assert(qc->n_elem > 0);
2497 ata_for_each_sg(sg, qc) {
2501 /* determine if physical DMA addr spans 64K boundary.
2502 * Note h/w doesn't support 64-bit, so we unconditionally
2503 * truncate dma_addr_t to u32.
2505 addr = (u32) sg_dma_address(sg);
2506 sg_len = sg_dma_len(sg);
2509 offset = addr & 0xffff;
2511 if ((offset + sg_len) > 0x10000)
2512 len = 0x10000 - offset;
2514 ap->prd[idx].addr = cpu_to_le32(addr);
2515 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2516 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2525 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2528 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2529 * @qc: Metadata associated with taskfile to check
2531 * Allow low-level driver to filter ATA PACKET commands, returning
2532 * a status indicating whether or not it is OK to use DMA for the
2533 * supplied PACKET command.
2536 * spin_lock_irqsave(host_set lock)
2538 * RETURNS: 0 when ATAPI DMA can be used
2541 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2543 struct ata_port *ap = qc->ap;
2544 int rc = 0; /* Assume ATAPI DMA is OK by default */
2546 if (ap->ops->check_atapi_dma)
2547 rc = ap->ops->check_atapi_dma(qc);
2552 * ata_qc_prep - Prepare taskfile for submission
2553 * @qc: Metadata associated with taskfile to be prepared
2555 * Prepare ATA taskfile for submission.
2558 * spin_lock_irqsave(host_set lock)
2560 void ata_qc_prep(struct ata_queued_cmd *qc)
2562 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2569 * ata_sg_init_one - Associate command with memory buffer
2570 * @qc: Command to be associated
2571 * @buf: Memory buffer
2572 * @buflen: Length of memory buffer, in bytes.
2574 * Initialize the data-related elements of queued_cmd @qc
2575 * to point to a single memory buffer, @buf of byte length @buflen.
2578 * spin_lock_irqsave(host_set lock)
2581 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2583 struct scatterlist *sg;
2585 qc->flags |= ATA_QCFLAG_SINGLE;
2587 memset(&qc->sgent, 0, sizeof(qc->sgent));
2588 qc->__sg = &qc->sgent;
2590 qc->orig_n_elem = 1;
2594 sg_init_one(sg, buf, buflen);
2598 * ata_sg_init - Associate command with scatter-gather table.
2599 * @qc: Command to be associated
2600 * @sg: Scatter-gather table.
2601 * @n_elem: Number of elements in s/g table.
2603 * Initialize the data-related elements of queued_cmd @qc
2604 * to point to a scatter-gather table @sg, containing @n_elem
2608 * spin_lock_irqsave(host_set lock)
2611 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2612 unsigned int n_elem)
2614 qc->flags |= ATA_QCFLAG_SG;
2616 qc->n_elem = n_elem;
2617 qc->orig_n_elem = n_elem;
2621 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2622 * @qc: Command with memory buffer to be mapped.
2624 * DMA-map the memory buffer associated with queued_cmd @qc.
2627 * spin_lock_irqsave(host_set lock)
2630 * Zero on success, negative on error.
2633 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2635 struct ata_port *ap = qc->ap;
2636 int dir = qc->dma_dir;
2637 struct scatterlist *sg = qc->__sg;
2638 dma_addr_t dma_address;
2640 /* we must lengthen transfers to end on a 32-bit boundary */
2641 qc->pad_len = sg->length & 3;
2643 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2644 struct scatterlist *psg = &qc->pad_sgent;
2646 assert(qc->dev->class == ATA_DEV_ATAPI);
2648 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2650 if (qc->tf.flags & ATA_TFLAG_WRITE)
2651 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2654 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2655 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2657 sg->length -= qc->pad_len;
2659 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2660 sg->length, qc->pad_len);
2664 sg_dma_address(sg) = 0;
2668 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2670 if (dma_mapping_error(dma_address)) {
2672 sg->length += qc->pad_len;
2676 sg_dma_address(sg) = dma_address;
2678 sg_dma_len(sg) = sg->length;
2680 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2681 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2687 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2688 * @qc: Command with scatter-gather table to be mapped.
2690 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2693 * spin_lock_irqsave(host_set lock)
2696 * Zero on success, negative on error.
2700 static int ata_sg_setup(struct ata_queued_cmd *qc)
2702 struct ata_port *ap = qc->ap;
2703 struct scatterlist *sg = qc->__sg;
2704 struct scatterlist *lsg = &sg[qc->n_elem - 1];
2705 int n_elem, pre_n_elem, dir, trim_sg = 0;
2707 VPRINTK("ENTER, ata%u\n", ap->id);
2708 assert(qc->flags & ATA_QCFLAG_SG);
2710 /* we must lengthen transfers to end on a 32-bit boundary */
2711 qc->pad_len = lsg->length & 3;
2713 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2714 struct scatterlist *psg = &qc->pad_sgent;
2715 unsigned int offset;
2717 assert(qc->dev->class == ATA_DEV_ATAPI);
2719 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2722 * psg->page/offset are used to copy to-be-written
2723 * data in this function or read data in ata_sg_clean.
2725 offset = lsg->offset + lsg->length - qc->pad_len;
2726 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2727 psg->offset = offset_in_page(offset);
2729 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2730 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2731 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
2732 kunmap_atomic(psg->page, KM_IRQ0);
2735 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2736 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2738 lsg->length -= qc->pad_len;
2739 if (lsg->length == 0)
2742 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2743 qc->n_elem - 1, lsg->length, qc->pad_len);
2746 pre_n_elem = qc->n_elem;
2747 if (trim_sg && pre_n_elem)
2756 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
2758 /* restore last sg */
2759 lsg->length += qc->pad_len;
2763 DPRINTK("%d sg elements mapped\n", n_elem);
2766 qc->n_elem = n_elem;
2772 * ata_poll_qc_complete - turn irq back on and finish qc
2773 * @qc: Command to complete
2774 * @err_mask: ATA status register content
2777 * None. (grabs host lock)
2780 void ata_poll_qc_complete(struct ata_queued_cmd *qc, unsigned int err_mask)
2782 struct ata_port *ap = qc->ap;
2783 unsigned long flags;
2785 spin_lock_irqsave(&ap->host_set->lock, flags);
2786 ap->flags &= ~ATA_FLAG_NOINTR;
2788 ata_qc_complete(qc, err_mask);
2789 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2794 * @ap: the target ata_port
2797 * None. (executing in kernel thread context)
2800 * timeout value to use
2803 static unsigned long ata_pio_poll(struct ata_port *ap)
2806 unsigned int poll_state = HSM_ST_UNKNOWN;
2807 unsigned int reg_state = HSM_ST_UNKNOWN;
2809 switch (ap->hsm_task_state) {
2812 poll_state = HSM_ST_POLL;
2816 case HSM_ST_LAST_POLL:
2817 poll_state = HSM_ST_LAST_POLL;
2818 reg_state = HSM_ST_LAST;
2825 status = ata_chk_status(ap);
2826 if (status & ATA_BUSY) {
2827 if (time_after(jiffies, ap->pio_task_timeout)) {
2828 ap->hsm_task_state = HSM_ST_TMOUT;
2831 ap->hsm_task_state = poll_state;
2832 return ATA_SHORT_PAUSE;
2835 ap->hsm_task_state = reg_state;
2840 * ata_pio_complete - check if drive is busy or idle
2841 * @ap: the target ata_port
2844 * None. (executing in kernel thread context)
2847 * Non-zero if qc completed, zero otherwise.
2850 static int ata_pio_complete (struct ata_port *ap)
2852 struct ata_queued_cmd *qc;
2856 * This is purely heuristic. This is a fast path. Sometimes when
2857 * we enter, BSY will be cleared in a chk-status or two. If not,
2858 * the drive is probably seeking or something. Snooze for a couple
2859 * msecs, then chk-status again. If still busy, fall back to
2860 * HSM_ST_POLL state.
2862 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2863 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2865 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2866 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2867 ap->hsm_task_state = HSM_ST_LAST_POLL;
2868 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2873 drv_stat = ata_wait_idle(ap);
2874 if (!ata_ok(drv_stat)) {
2875 ap->hsm_task_state = HSM_ST_ERR;
2879 qc = ata_qc_from_tag(ap, ap->active_tag);
2882 ap->hsm_task_state = HSM_ST_IDLE;
2884 ata_poll_qc_complete(qc, 0);
2886 /* another command may start at this point */
2893 * swap_buf_le16 - swap halves of 16-words in place
2894 * @buf: Buffer to swap
2895 * @buf_words: Number of 16-bit words in buffer.
2897 * Swap halves of 16-bit words if needed to convert from
2898 * little-endian byte order to native cpu byte order, or
2902 * Inherited from caller.
2904 void swap_buf_le16(u16 *buf, unsigned int buf_words)
2909 for (i = 0; i < buf_words; i++)
2910 buf[i] = le16_to_cpu(buf[i]);
2911 #endif /* __BIG_ENDIAN */
2915 * ata_mmio_data_xfer - Transfer data by MMIO
2916 * @ap: port to read/write
2918 * @buflen: buffer length
2919 * @write_data: read/write
2921 * Transfer data from/to the device data register by MMIO.
2924 * Inherited from caller.
2927 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2928 unsigned int buflen, int write_data)
2931 unsigned int words = buflen >> 1;
2932 u16 *buf16 = (u16 *) buf;
2933 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2935 /* Transfer multiple of 2 bytes */
2937 for (i = 0; i < words; i++)
2938 writew(le16_to_cpu(buf16[i]), mmio);
2940 for (i = 0; i < words; i++)
2941 buf16[i] = cpu_to_le16(readw(mmio));
2944 /* Transfer trailing 1 byte, if any. */
2945 if (unlikely(buflen & 0x01)) {
2946 u16 align_buf[1] = { 0 };
2947 unsigned char *trailing_buf = buf + buflen - 1;
2950 memcpy(align_buf, trailing_buf, 1);
2951 writew(le16_to_cpu(align_buf[0]), mmio);
2953 align_buf[0] = cpu_to_le16(readw(mmio));
2954 memcpy(trailing_buf, align_buf, 1);
2960 * ata_pio_data_xfer - Transfer data by PIO
2961 * @ap: port to read/write
2963 * @buflen: buffer length
2964 * @write_data: read/write
2966 * Transfer data from/to the device data register by PIO.
2969 * Inherited from caller.
2972 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2973 unsigned int buflen, int write_data)
2975 unsigned int words = buflen >> 1;
2977 /* Transfer multiple of 2 bytes */
2979 outsw(ap->ioaddr.data_addr, buf, words);
2981 insw(ap->ioaddr.data_addr, buf, words);
2983 /* Transfer trailing 1 byte, if any. */
2984 if (unlikely(buflen & 0x01)) {
2985 u16 align_buf[1] = { 0 };
2986 unsigned char *trailing_buf = buf + buflen - 1;
2989 memcpy(align_buf, trailing_buf, 1);
2990 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
2992 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
2993 memcpy(trailing_buf, align_buf, 1);
2999 * ata_data_xfer - Transfer data from/to the data register.
3000 * @ap: port to read/write
3002 * @buflen: buffer length
3003 * @do_write: read/write
3005 * Transfer data from/to the device data register.
3008 * Inherited from caller.
3011 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3012 unsigned int buflen, int do_write)
3014 if (ap->flags & ATA_FLAG_MMIO)
3015 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3017 ata_pio_data_xfer(ap, buf, buflen, do_write);
3021 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3022 * @qc: Command on going
3024 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3027 * Inherited from caller.
3030 static void ata_pio_sector(struct ata_queued_cmd *qc)
3032 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3033 struct scatterlist *sg = qc->__sg;
3034 struct ata_port *ap = qc->ap;
3036 unsigned int offset;
3039 if (qc->cursect == (qc->nsect - 1))
3040 ap->hsm_task_state = HSM_ST_LAST;
3042 page = sg[qc->cursg].page;
3043 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3045 /* get the current page and offset */
3046 page = nth_page(page, (offset >> PAGE_SHIFT));
3047 offset %= PAGE_SIZE;
3049 buf = kmap(page) + offset;
3054 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3059 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3061 /* do the actual data transfer */
3062 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3063 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3069 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3070 * @qc: Command on going
3071 * @bytes: number of bytes
3073 * Transfer Transfer data from/to the ATAPI device.
3076 * Inherited from caller.
3080 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3082 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3083 struct scatterlist *sg = qc->__sg;
3084 struct ata_port *ap = qc->ap;
3087 unsigned int offset, count;
3089 if (qc->curbytes + bytes >= qc->nbytes)
3090 ap->hsm_task_state = HSM_ST_LAST;
3093 if (unlikely(qc->cursg >= qc->n_elem)) {
3095 * The end of qc->sg is reached and the device expects
3096 * more data to transfer. In order not to overrun qc->sg
3097 * and fulfill length specified in the byte count register,
3098 * - for read case, discard trailing data from the device
3099 * - for write case, padding zero data to the device
3101 u16 pad_buf[1] = { 0 };
3102 unsigned int words = bytes >> 1;
3105 if (words) /* warning if bytes > 1 */
3106 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3109 for (i = 0; i < words; i++)
3110 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3112 ap->hsm_task_state = HSM_ST_LAST;
3116 sg = &qc->__sg[qc->cursg];
3119 offset = sg->offset + qc->cursg_ofs;
3121 /* get the current page and offset */
3122 page = nth_page(page, (offset >> PAGE_SHIFT));
3123 offset %= PAGE_SIZE;
3125 /* don't overrun current sg */
3126 count = min(sg->length - qc->cursg_ofs, bytes);
3128 /* don't cross page boundaries */
3129 count = min(count, (unsigned int)PAGE_SIZE - offset);
3131 buf = kmap(page) + offset;
3134 qc->curbytes += count;
3135 qc->cursg_ofs += count;
3137 if (qc->cursg_ofs == sg->length) {
3142 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3144 /* do the actual data transfer */
3145 ata_data_xfer(ap, buf, count, do_write);
3154 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3155 * @qc: Command on going
3157 * Transfer Transfer data from/to the ATAPI device.
3160 * Inherited from caller.
3163 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3165 struct ata_port *ap = qc->ap;
3166 struct ata_device *dev = qc->dev;
3167 unsigned int ireason, bc_lo, bc_hi, bytes;
3168 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3170 ap->ops->tf_read(ap, &qc->tf);
3171 ireason = qc->tf.nsect;
3172 bc_lo = qc->tf.lbam;
3173 bc_hi = qc->tf.lbah;
3174 bytes = (bc_hi << 8) | bc_lo;
3176 /* shall be cleared to zero, indicating xfer of data */
3177 if (ireason & (1 << 0))
3180 /* make sure transfer direction matches expected */
3181 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3182 if (do_write != i_write)
3185 __atapi_pio_bytes(qc, bytes);
3190 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3191 ap->id, dev->devno);
3192 ap->hsm_task_state = HSM_ST_ERR;
3196 * ata_pio_block - start PIO on a block
3197 * @ap: the target ata_port
3200 * None. (executing in kernel thread context)
3203 static void ata_pio_block(struct ata_port *ap)
3205 struct ata_queued_cmd *qc;
3209 * This is purely heuristic. This is a fast path.
3210 * Sometimes when we enter, BSY will be cleared in
3211 * a chk-status or two. If not, the drive is probably seeking
3212 * or something. Snooze for a couple msecs, then
3213 * chk-status again. If still busy, fall back to
3214 * HSM_ST_POLL state.
3216 status = ata_busy_wait(ap, ATA_BUSY, 5);
3217 if (status & ATA_BUSY) {
3219 status = ata_busy_wait(ap, ATA_BUSY, 10);
3220 if (status & ATA_BUSY) {
3221 ap->hsm_task_state = HSM_ST_POLL;
3222 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3227 qc = ata_qc_from_tag(ap, ap->active_tag);
3230 if (is_atapi_taskfile(&qc->tf)) {
3231 /* no more data to transfer or unsupported ATAPI command */
3232 if ((status & ATA_DRQ) == 0) {
3233 ap->hsm_task_state = HSM_ST_LAST;
3237 atapi_pio_bytes(qc);
3239 /* handle BSY=0, DRQ=0 as error */
3240 if ((status & ATA_DRQ) == 0) {
3241 ap->hsm_task_state = HSM_ST_ERR;
3249 static void ata_pio_error(struct ata_port *ap)
3251 struct ata_queued_cmd *qc;
3253 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3255 qc = ata_qc_from_tag(ap, ap->active_tag);
3258 ap->hsm_task_state = HSM_ST_IDLE;
3260 ata_poll_qc_complete(qc, AC_ERR_ATA_BUS);
3263 static void ata_pio_task(void *_data)
3265 struct ata_port *ap = _data;
3266 unsigned long timeout;
3273 switch (ap->hsm_task_state) {
3282 qc_completed = ata_pio_complete(ap);
3286 case HSM_ST_LAST_POLL:
3287 timeout = ata_pio_poll(ap);
3297 queue_delayed_work(ata_wq, &ap->pio_task, timeout);
3298 else if (!qc_completed)
3303 * ata_qc_timeout - Handle timeout of queued command
3304 * @qc: Command that timed out
3306 * Some part of the kernel (currently, only the SCSI layer)
3307 * has noticed that the active command on port @ap has not
3308 * completed after a specified length of time. Handle this
3309 * condition by disabling DMA (if necessary) and completing
3310 * transactions, with error if necessary.
3312 * This also handles the case of the "lost interrupt", where
3313 * for some reason (possibly hardware bug, possibly driver bug)
3314 * an interrupt was not delivered to the driver, even though the
3315 * transaction completed successfully.
3318 * Inherited from SCSI layer (none, can sleep)
3321 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3323 struct ata_port *ap = qc->ap;
3324 struct ata_host_set *host_set = ap->host_set;
3325 u8 host_stat = 0, drv_stat;
3326 unsigned long flags;
3330 spin_lock_irqsave(&host_set->lock, flags);
3332 /* hack alert! We cannot use the supplied completion
3333 * function from inside the ->eh_strategy_handler() thread.
3334 * libata is the only user of ->eh_strategy_handler() in
3335 * any kernel, so the default scsi_done() assumes it is
3336 * not being called from the SCSI EH.
3338 qc->scsidone = scsi_finish_command;
3340 switch (qc->tf.protocol) {
3343 case ATA_PROT_ATAPI_DMA:
3344 host_stat = ap->ops->bmdma_status(ap);
3346 /* before we do anything else, clear DMA-Start bit */
3347 ap->ops->bmdma_stop(qc);
3353 drv_stat = ata_chk_status(ap);
3355 /* ack bmdma irq events */
3356 ap->ops->irq_clear(ap);
3358 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3359 ap->id, qc->tf.command, drv_stat, host_stat);
3361 /* complete taskfile transaction */
3362 ata_qc_complete(qc, ac_err_mask(drv_stat));
3366 spin_unlock_irqrestore(&host_set->lock, flags);
3372 * ata_eng_timeout - Handle timeout of queued command
3373 * @ap: Port on which timed-out command is active
3375 * Some part of the kernel (currently, only the SCSI layer)
3376 * has noticed that the active command on port @ap has not
3377 * completed after a specified length of time. Handle this
3378 * condition by disabling DMA (if necessary) and completing
3379 * transactions, with error if necessary.
3381 * This also handles the case of the "lost interrupt", where
3382 * for some reason (possibly hardware bug, possibly driver bug)
3383 * an interrupt was not delivered to the driver, even though the
3384 * transaction completed successfully.
3387 * Inherited from SCSI layer (none, can sleep)
3390 void ata_eng_timeout(struct ata_port *ap)
3392 struct ata_queued_cmd *qc;
3396 qc = ata_qc_from_tag(ap, ap->active_tag);
3400 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3410 * ata_qc_new - Request an available ATA command, for queueing
3411 * @ap: Port associated with device @dev
3412 * @dev: Device from whom we request an available command structure
3418 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3420 struct ata_queued_cmd *qc = NULL;
3423 for (i = 0; i < ATA_MAX_QUEUE; i++)
3424 if (!test_and_set_bit(i, &ap->qactive)) {
3425 qc = ata_qc_from_tag(ap, i);
3436 * ata_qc_new_init - Request an available ATA command, and initialize it
3437 * @ap: Port associated with device @dev
3438 * @dev: Device from whom we request an available command structure
3444 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3445 struct ata_device *dev)
3447 struct ata_queued_cmd *qc;
3449 qc = ata_qc_new(ap);
3461 int ata_qc_complete_noop(struct ata_queued_cmd *qc, unsigned int err_mask)
3466 static void __ata_qc_complete(struct ata_queued_cmd *qc)
3468 struct ata_port *ap = qc->ap;
3469 unsigned int tag, do_clear = 0;
3473 if (likely(ata_tag_valid(tag))) {
3474 if (tag == ap->active_tag)
3475 ap->active_tag = ATA_TAG_POISON;
3476 qc->tag = ATA_TAG_POISON;
3481 struct completion *waiting = qc->waiting;
3486 if (likely(do_clear))
3487 clear_bit(tag, &ap->qactive);
3491 * ata_qc_free - free unused ata_queued_cmd
3492 * @qc: Command to complete
3494 * Designed to free unused ata_queued_cmd object
3495 * in case something prevents using it.
3498 * spin_lock_irqsave(host_set lock)
3500 void ata_qc_free(struct ata_queued_cmd *qc)
3502 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3503 assert(qc->waiting == NULL); /* nothing should be waiting */
3505 __ata_qc_complete(qc);
3509 * ata_qc_complete - Complete an active ATA command
3510 * @qc: Command to complete
3511 * @err_mask: ATA Status register contents
3513 * Indicate to the mid and upper layers that an ATA
3514 * command has completed, with either an ok or not-ok status.
3517 * spin_lock_irqsave(host_set lock)
3520 void ata_qc_complete(struct ata_queued_cmd *qc, unsigned int err_mask)
3524 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3525 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3527 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3530 /* atapi: mark qc as inactive to prevent the interrupt handler
3531 * from completing the command twice later, before the error handler
3532 * is called. (when rc != 0 and atapi request sense is needed)
3534 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3536 /* call completion callback */
3537 rc = qc->complete_fn(qc, err_mask);
3539 /* if callback indicates not to complete command (non-zero),
3540 * return immediately
3545 __ata_qc_complete(qc);
3550 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3552 struct ata_port *ap = qc->ap;
3554 switch (qc->tf.protocol) {
3556 case ATA_PROT_ATAPI_DMA:
3559 case ATA_PROT_ATAPI:
3561 case ATA_PROT_PIO_MULT:
3562 if (ap->flags & ATA_FLAG_PIO_DMA)
3575 * ata_qc_issue - issue taskfile to device
3576 * @qc: command to issue to device
3578 * Prepare an ATA command to submission to device.
3579 * This includes mapping the data into a DMA-able
3580 * area, filling in the S/G table, and finally
3581 * writing the taskfile to hardware, starting the command.
3584 * spin_lock_irqsave(host_set lock)
3587 * Zero on success, negative on error.
3590 int ata_qc_issue(struct ata_queued_cmd *qc)
3592 struct ata_port *ap = qc->ap;
3594 if (ata_should_dma_map(qc)) {
3595 if (qc->flags & ATA_QCFLAG_SG) {
3596 if (ata_sg_setup(qc))
3598 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3599 if (ata_sg_setup_one(qc))
3603 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3606 ap->ops->qc_prep(qc);
3608 qc->ap->active_tag = qc->tag;
3609 qc->flags |= ATA_QCFLAG_ACTIVE;
3611 return ap->ops->qc_issue(qc);
3619 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3620 * @qc: command to issue to device
3622 * Using various libata functions and hooks, this function
3623 * starts an ATA command. ATA commands are grouped into
3624 * classes called "protocols", and issuing each type of protocol
3625 * is slightly different.
3627 * May be used as the qc_issue() entry in ata_port_operations.
3630 * spin_lock_irqsave(host_set lock)
3633 * Zero on success, negative on error.
3636 int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3638 struct ata_port *ap = qc->ap;
3640 ata_dev_select(ap, qc->dev->devno, 1, 0);
3642 switch (qc->tf.protocol) {
3643 case ATA_PROT_NODATA:
3644 ata_tf_to_host(ap, &qc->tf);
3648 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3649 ap->ops->bmdma_setup(qc); /* set up bmdma */
3650 ap->ops->bmdma_start(qc); /* initiate bmdma */
3653 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3654 ata_qc_set_polling(qc);
3655 ata_tf_to_host(ap, &qc->tf);
3656 ap->hsm_task_state = HSM_ST;
3657 queue_work(ata_wq, &ap->pio_task);
3660 case ATA_PROT_ATAPI:
3661 ata_qc_set_polling(qc);
3662 ata_tf_to_host(ap, &qc->tf);
3663 queue_work(ata_wq, &ap->packet_task);
3666 case ATA_PROT_ATAPI_NODATA:
3667 ap->flags |= ATA_FLAG_NOINTR;
3668 ata_tf_to_host(ap, &qc->tf);
3669 queue_work(ata_wq, &ap->packet_task);
3672 case ATA_PROT_ATAPI_DMA:
3673 ap->flags |= ATA_FLAG_NOINTR;
3674 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3675 ap->ops->bmdma_setup(qc); /* set up bmdma */
3676 queue_work(ata_wq, &ap->packet_task);
3688 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
3689 * @qc: Info associated with this ATA transaction.
3692 * spin_lock_irqsave(host_set lock)
3695 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3697 struct ata_port *ap = qc->ap;
3698 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3700 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3702 /* load PRD table addr. */
3703 mb(); /* make sure PRD table writes are visible to controller */
3704 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3706 /* specify data direction, triple-check start bit is clear */
3707 dmactl = readb(mmio + ATA_DMA_CMD);
3708 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3710 dmactl |= ATA_DMA_WR;
3711 writeb(dmactl, mmio + ATA_DMA_CMD);
3713 /* issue r/w command */
3714 ap->ops->exec_command(ap, &qc->tf);
3718 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
3719 * @qc: Info associated with this ATA transaction.
3722 * spin_lock_irqsave(host_set lock)
3725 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3727 struct ata_port *ap = qc->ap;
3728 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3731 /* start host DMA transaction */
3732 dmactl = readb(mmio + ATA_DMA_CMD);
3733 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3735 /* Strictly, one may wish to issue a readb() here, to
3736 * flush the mmio write. However, control also passes
3737 * to the hardware at this point, and it will interrupt
3738 * us when we are to resume control. So, in effect,
3739 * we don't care when the mmio write flushes.
3740 * Further, a read of the DMA status register _immediately_
3741 * following the write may not be what certain flaky hardware
3742 * is expected, so I think it is best to not add a readb()
3743 * without first all the MMIO ATA cards/mobos.
3744 * Or maybe I'm just being paranoid.
3749 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3750 * @qc: Info associated with this ATA transaction.
3753 * spin_lock_irqsave(host_set lock)
3756 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3758 struct ata_port *ap = qc->ap;
3759 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3762 /* load PRD table addr. */
3763 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3765 /* specify data direction, triple-check start bit is clear */
3766 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3767 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3769 dmactl |= ATA_DMA_WR;
3770 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3772 /* issue r/w command */
3773 ap->ops->exec_command(ap, &qc->tf);
3777 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3778 * @qc: Info associated with this ATA transaction.
3781 * spin_lock_irqsave(host_set lock)
3784 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3786 struct ata_port *ap = qc->ap;
3789 /* start host DMA transaction */
3790 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3791 outb(dmactl | ATA_DMA_START,
3792 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3797 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3798 * @qc: Info associated with this ATA transaction.
3800 * Writes the ATA_DMA_START flag to the DMA command register.
3802 * May be used as the bmdma_start() entry in ata_port_operations.
3805 * spin_lock_irqsave(host_set lock)
3807 void ata_bmdma_start(struct ata_queued_cmd *qc)
3809 if (qc->ap->flags & ATA_FLAG_MMIO)
3810 ata_bmdma_start_mmio(qc);
3812 ata_bmdma_start_pio(qc);
3817 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3818 * @qc: Info associated with this ATA transaction.
3820 * Writes address of PRD table to device's PRD Table Address
3821 * register, sets the DMA control register, and calls
3822 * ops->exec_command() to start the transfer.
3824 * May be used as the bmdma_setup() entry in ata_port_operations.
3827 * spin_lock_irqsave(host_set lock)
3829 void ata_bmdma_setup(struct ata_queued_cmd *qc)
3831 if (qc->ap->flags & ATA_FLAG_MMIO)
3832 ata_bmdma_setup_mmio(qc);
3834 ata_bmdma_setup_pio(qc);
3839 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
3840 * @ap: Port associated with this ATA transaction.
3842 * Clear interrupt and error flags in DMA status register.
3844 * May be used as the irq_clear() entry in ata_port_operations.
3847 * spin_lock_irqsave(host_set lock)
3850 void ata_bmdma_irq_clear(struct ata_port *ap)
3852 if (ap->flags & ATA_FLAG_MMIO) {
3853 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3854 writeb(readb(mmio), mmio);
3856 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3857 outb(inb(addr), addr);
3864 * ata_bmdma_status - Read PCI IDE BMDMA status
3865 * @ap: Port associated with this ATA transaction.
3867 * Read and return BMDMA status register.
3869 * May be used as the bmdma_status() entry in ata_port_operations.
3872 * spin_lock_irqsave(host_set lock)
3875 u8 ata_bmdma_status(struct ata_port *ap)
3878 if (ap->flags & ATA_FLAG_MMIO) {
3879 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3880 host_stat = readb(mmio + ATA_DMA_STATUS);
3882 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3888 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3889 * @qc: Command we are ending DMA for
3891 * Clears the ATA_DMA_START flag in the dma control register
3893 * May be used as the bmdma_stop() entry in ata_port_operations.
3896 * spin_lock_irqsave(host_set lock)
3899 void ata_bmdma_stop(struct ata_queued_cmd *qc)
3901 struct ata_port *ap = qc->ap;
3902 if (ap->flags & ATA_FLAG_MMIO) {
3903 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3905 /* clear start/stop bit */
3906 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3907 mmio + ATA_DMA_CMD);
3909 /* clear start/stop bit */
3910 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
3911 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3914 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3915 ata_altstatus(ap); /* dummy read */
3919 * ata_host_intr - Handle host interrupt for given (port, task)
3920 * @ap: Port on which interrupt arrived (possibly...)
3921 * @qc: Taskfile currently active in engine
3923 * Handle host interrupt for given queued command. Currently,
3924 * only DMA interrupts are handled. All other commands are
3925 * handled via polling with interrupts disabled (nIEN bit).
3928 * spin_lock_irqsave(host_set lock)
3931 * One if interrupt was handled, zero if not (shared irq).
3934 inline unsigned int ata_host_intr (struct ata_port *ap,
3935 struct ata_queued_cmd *qc)
3937 u8 status, host_stat;
3939 switch (qc->tf.protocol) {
3942 case ATA_PROT_ATAPI_DMA:
3943 case ATA_PROT_ATAPI:
3944 /* check status of DMA engine */
3945 host_stat = ap->ops->bmdma_status(ap);
3946 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
3948 /* if it's not our irq... */
3949 if (!(host_stat & ATA_DMA_INTR))
3952 /* before we do anything else, clear DMA-Start bit */
3953 ap->ops->bmdma_stop(qc);
3957 case ATA_PROT_ATAPI_NODATA:
3958 case ATA_PROT_NODATA:
3959 /* check altstatus */
3960 status = ata_altstatus(ap);
3961 if (status & ATA_BUSY)
3964 /* check main status, clearing INTRQ */
3965 status = ata_chk_status(ap);
3966 if (unlikely(status & ATA_BUSY))
3968 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
3969 ap->id, qc->tf.protocol, status);
3971 /* ack bmdma irq events */
3972 ap->ops->irq_clear(ap);
3974 /* complete taskfile transaction */
3975 ata_qc_complete(qc, ac_err_mask(status));
3982 return 1; /* irq handled */
3985 ap->stats.idle_irq++;
3988 if ((ap->stats.idle_irq % 1000) == 0) {
3990 ata_irq_ack(ap, 0); /* debug trap */
3991 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
3994 return 0; /* irq not handled */
3998 * ata_interrupt - Default ATA host interrupt handler
3999 * @irq: irq line (unused)
4000 * @dev_instance: pointer to our ata_host_set information structure
4003 * Default interrupt handler for PCI IDE devices. Calls
4004 * ata_host_intr() for each port that is not disabled.
4007 * Obtains host_set lock during operation.
4010 * IRQ_NONE or IRQ_HANDLED.
4013 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4015 struct ata_host_set *host_set = dev_instance;
4017 unsigned int handled = 0;
4018 unsigned long flags;
4020 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4021 spin_lock_irqsave(&host_set->lock, flags);
4023 for (i = 0; i < host_set->n_ports; i++) {
4024 struct ata_port *ap;
4026 ap = host_set->ports[i];
4028 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
4029 struct ata_queued_cmd *qc;
4031 qc = ata_qc_from_tag(ap, ap->active_tag);
4032 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4033 (qc->flags & ATA_QCFLAG_ACTIVE))
4034 handled |= ata_host_intr(ap, qc);
4038 spin_unlock_irqrestore(&host_set->lock, flags);
4040 return IRQ_RETVAL(handled);
4044 * atapi_packet_task - Write CDB bytes to hardware
4045 * @_data: Port to which ATAPI device is attached.
4047 * When device has indicated its readiness to accept
4048 * a CDB, this function is called. Send the CDB.
4049 * If DMA is to be performed, exit immediately.
4050 * Otherwise, we are in polling mode, so poll
4051 * status under operation succeeds or fails.
4054 * Kernel thread context (may sleep)
4057 static void atapi_packet_task(void *_data)
4059 struct ata_port *ap = _data;
4060 struct ata_queued_cmd *qc;
4063 qc = ata_qc_from_tag(ap, ap->active_tag);
4065 assert(qc->flags & ATA_QCFLAG_ACTIVE);
4067 /* sleep-wait for BSY to clear */
4068 DPRINTK("busy wait\n");
4069 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB))
4070 goto err_out_status;
4072 /* make sure DRQ is set */
4073 status = ata_chk_status(ap);
4074 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)
4078 DPRINTK("send cdb\n");
4079 assert(ap->cdb_len >= 12);
4081 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4082 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4083 unsigned long flags;
4085 /* Once we're done issuing command and kicking bmdma,
4086 * irq handler takes over. To not lose irq, we need
4087 * to clear NOINTR flag before sending cdb, but
4088 * interrupt handler shouldn't be invoked before we're
4089 * finished. Hence, the following locking.
4091 spin_lock_irqsave(&ap->host_set->lock, flags);
4092 ap->flags &= ~ATA_FLAG_NOINTR;
4093 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4094 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4095 ap->ops->bmdma_start(qc); /* initiate bmdma */
4096 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4098 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4100 /* PIO commands are handled by polling */
4101 ap->hsm_task_state = HSM_ST;
4102 queue_work(ata_wq, &ap->pio_task);
4108 status = ata_chk_status(ap);
4110 ata_poll_qc_complete(qc, __ac_err_mask(status));
4115 * ata_port_start - Set port up for dma.
4116 * @ap: Port to initialize
4118 * Called just after data structures for each port are
4119 * initialized. Allocates space for PRD table.
4121 * May be used as the port_start() entry in ata_port_operations.
4124 * Inherited from caller.
4127 int ata_port_start (struct ata_port *ap)
4129 struct device *dev = ap->host_set->dev;
4132 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4136 rc = ata_pad_alloc(ap, dev);
4138 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4142 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4149 * ata_port_stop - Undo ata_port_start()
4150 * @ap: Port to shut down
4152 * Frees the PRD table.
4154 * May be used as the port_stop() entry in ata_port_operations.
4157 * Inherited from caller.
4160 void ata_port_stop (struct ata_port *ap)
4162 struct device *dev = ap->host_set->dev;
4164 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4165 ata_pad_free(ap, dev);
4168 void ata_host_stop (struct ata_host_set *host_set)
4170 if (host_set->mmio_base)
4171 iounmap(host_set->mmio_base);
4176 * ata_host_remove - Unregister SCSI host structure with upper layers
4177 * @ap: Port to unregister
4178 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4181 * Inherited from caller.
4184 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4186 struct Scsi_Host *sh = ap->host;
4191 scsi_remove_host(sh);
4193 ap->ops->port_stop(ap);
4197 * ata_host_init - Initialize an ata_port structure
4198 * @ap: Structure to initialize
4199 * @host: associated SCSI mid-layer structure
4200 * @host_set: Collection of hosts to which @ap belongs
4201 * @ent: Probe information provided by low-level driver
4202 * @port_no: Port number associated with this ata_port
4204 * Initialize a new ata_port structure, and its associated
4208 * Inherited from caller.
4211 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4212 struct ata_host_set *host_set,
4213 const struct ata_probe_ent *ent, unsigned int port_no)
4219 host->max_channel = 1;
4220 host->unique_id = ata_unique_id++;
4221 host->max_cmd_len = 12;
4223 ap->flags = ATA_FLAG_PORT_DISABLED;
4224 ap->id = host->unique_id;
4226 ap->ctl = ATA_DEVCTL_OBS;
4227 ap->host_set = host_set;
4228 ap->port_no = port_no;
4230 ent->legacy_mode ? ent->hard_port_no : port_no;
4231 ap->pio_mask = ent->pio_mask;
4232 ap->mwdma_mask = ent->mwdma_mask;
4233 ap->udma_mask = ent->udma_mask;
4234 ap->flags |= ent->host_flags;
4235 ap->ops = ent->port_ops;
4236 ap->cbl = ATA_CBL_NONE;
4237 ap->active_tag = ATA_TAG_POISON;
4238 ap->last_ctl = 0xFF;
4240 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4241 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4243 for (i = 0; i < ATA_MAX_DEVICES; i++)
4244 ap->device[i].devno = i;
4247 ap->stats.unhandled_irq = 1;
4248 ap->stats.idle_irq = 1;
4251 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4255 * ata_host_add - Attach low-level ATA driver to system
4256 * @ent: Information provided by low-level driver
4257 * @host_set: Collections of ports to which we add
4258 * @port_no: Port number associated with this host
4260 * Attach low-level ATA driver to system.
4263 * PCI/etc. bus probe sem.
4266 * New ata_port on success, for NULL on error.
4269 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4270 struct ata_host_set *host_set,
4271 unsigned int port_no)
4273 struct Scsi_Host *host;
4274 struct ata_port *ap;
4278 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4282 ap = (struct ata_port *) &host->hostdata[0];
4284 ata_host_init(ap, host, host_set, ent, port_no);
4286 rc = ap->ops->port_start(ap);
4293 scsi_host_put(host);
4298 * ata_device_add - Register hardware device with ATA and SCSI layers
4299 * @ent: Probe information describing hardware device to be registered
4301 * This function processes the information provided in the probe
4302 * information struct @ent, allocates the necessary ATA and SCSI
4303 * host information structures, initializes them, and registers
4304 * everything with requisite kernel subsystems.
4306 * This function requests irqs, probes the ATA bus, and probes
4310 * PCI/etc. bus probe sem.
4313 * Number of ports registered. Zero on error (no ports registered).
4316 int ata_device_add(const struct ata_probe_ent *ent)
4318 unsigned int count = 0, i;
4319 struct device *dev = ent->dev;
4320 struct ata_host_set *host_set;
4323 /* alloc a container for our list of ATA ports (buses) */
4324 host_set = kzalloc(sizeof(struct ata_host_set) +
4325 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4328 spin_lock_init(&host_set->lock);
4330 host_set->dev = dev;
4331 host_set->n_ports = ent->n_ports;
4332 host_set->irq = ent->irq;
4333 host_set->mmio_base = ent->mmio_base;
4334 host_set->private_data = ent->private_data;
4335 host_set->ops = ent->port_ops;
4337 /* register each port bound to this device */
4338 for (i = 0; i < ent->n_ports; i++) {
4339 struct ata_port *ap;
4340 unsigned long xfer_mode_mask;
4342 ap = ata_host_add(ent, host_set, i);
4346 host_set->ports[i] = ap;
4347 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4348 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4349 (ap->pio_mask << ATA_SHIFT_PIO);
4351 /* print per-port info to dmesg */
4352 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4353 "bmdma 0x%lX irq %lu\n",
4355 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4356 ata_mode_string(xfer_mode_mask),
4357 ap->ioaddr.cmd_addr,
4358 ap->ioaddr.ctl_addr,
4359 ap->ioaddr.bmdma_addr,
4363 host_set->ops->irq_clear(ap);
4370 /* obtain irq, that is shared between channels */
4371 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4372 DRV_NAME, host_set))
4375 /* perform each probe synchronously */
4376 DPRINTK("probe begin\n");
4377 for (i = 0; i < count; i++) {
4378 struct ata_port *ap;
4381 ap = host_set->ports[i];
4383 DPRINTK("ata%u: probe begin\n", ap->id);
4384 rc = ata_bus_probe(ap);
4385 DPRINTK("ata%u: probe end\n", ap->id);
4388 /* FIXME: do something useful here?
4389 * Current libata behavior will
4390 * tear down everything when
4391 * the module is removed
4392 * or the h/w is unplugged.
4396 rc = scsi_add_host(ap->host, dev);
4398 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4400 /* FIXME: do something useful here */
4401 /* FIXME: handle unconditional calls to
4402 * scsi_scan_host and ata_host_remove, below,
4408 /* probes are done, now scan each port's disk(s) */
4409 DPRINTK("probe begin\n");
4410 for (i = 0; i < count; i++) {
4411 struct ata_port *ap = host_set->ports[i];
4413 ata_scsi_scan_host(ap);
4416 dev_set_drvdata(dev, host_set);
4418 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4419 return ent->n_ports; /* success */
4422 for (i = 0; i < count; i++) {
4423 ata_host_remove(host_set->ports[i], 1);
4424 scsi_host_put(host_set->ports[i]->host);
4428 VPRINTK("EXIT, returning 0\n");
4433 * ata_host_set_remove - PCI layer callback for device removal
4434 * @host_set: ATA host set that was removed
4436 * Unregister all objects associated with this host set. Free those
4440 * Inherited from calling layer (may sleep).
4443 void ata_host_set_remove(struct ata_host_set *host_set)
4445 struct ata_port *ap;
4448 for (i = 0; i < host_set->n_ports; i++) {
4449 ap = host_set->ports[i];
4450 scsi_remove_host(ap->host);
4453 free_irq(host_set->irq, host_set);
4455 for (i = 0; i < host_set->n_ports; i++) {
4456 ap = host_set->ports[i];
4458 ata_scsi_release(ap->host);
4460 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4461 struct ata_ioports *ioaddr = &ap->ioaddr;
4463 if (ioaddr->cmd_addr == 0x1f0)
4464 release_region(0x1f0, 8);
4465 else if (ioaddr->cmd_addr == 0x170)
4466 release_region(0x170, 8);
4469 scsi_host_put(ap->host);
4472 if (host_set->ops->host_stop)
4473 host_set->ops->host_stop(host_set);
4479 * ata_scsi_release - SCSI layer callback hook for host unload
4480 * @host: libata host to be unloaded
4482 * Performs all duties necessary to shut down a libata port...
4483 * Kill port kthread, disable port, and release resources.
4486 * Inherited from SCSI layer.
4492 int ata_scsi_release(struct Scsi_Host *host)
4494 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4498 ap->ops->port_disable(ap);
4499 ata_host_remove(ap, 0);
4506 * ata_std_ports - initialize ioaddr with standard port offsets.
4507 * @ioaddr: IO address structure to be initialized
4509 * Utility function which initializes data_addr, error_addr,
4510 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4511 * device_addr, status_addr, and command_addr to standard offsets
4512 * relative to cmd_addr.
4514 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4517 void ata_std_ports(struct ata_ioports *ioaddr)
4519 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4520 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4521 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4522 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4523 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4524 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4525 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4526 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4527 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4528 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4531 static struct ata_probe_ent *
4532 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
4534 struct ata_probe_ent *probe_ent;
4536 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
4538 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4539 kobject_name(&(dev->kobj)));
4543 INIT_LIST_HEAD(&probe_ent->node);
4544 probe_ent->dev = dev;
4546 probe_ent->sht = port->sht;
4547 probe_ent->host_flags = port->host_flags;
4548 probe_ent->pio_mask = port->pio_mask;
4549 probe_ent->mwdma_mask = port->mwdma_mask;
4550 probe_ent->udma_mask = port->udma_mask;
4551 probe_ent->port_ops = port->port_ops;
4560 void ata_pci_host_stop (struct ata_host_set *host_set)
4562 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4564 pci_iounmap(pdev, host_set->mmio_base);
4568 * ata_pci_init_native_mode - Initialize native-mode driver
4569 * @pdev: pci device to be initialized
4570 * @port: array[2] of pointers to port info structures.
4571 * @ports: bitmap of ports present
4573 * Utility function which allocates and initializes an
4574 * ata_probe_ent structure for a standard dual-port
4575 * PIO-based IDE controller. The returned ata_probe_ent
4576 * structure can be passed to ata_device_add(). The returned
4577 * ata_probe_ent structure should then be freed with kfree().
4579 * The caller need only pass the address of the primary port, the
4580 * secondary will be deduced automatically. If the device has non
4581 * standard secondary port mappings this function can be called twice,
4582 * once for each interface.
4585 struct ata_probe_ent *
4586 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports)
4588 struct ata_probe_ent *probe_ent =
4589 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4595 probe_ent->irq = pdev->irq;
4596 probe_ent->irq_flags = SA_SHIRQ;
4597 probe_ent->private_data = port[0]->private_data;
4599 if (ports & ATA_PORT_PRIMARY) {
4600 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0);
4601 probe_ent->port[p].altstatus_addr =
4602 probe_ent->port[p].ctl_addr =
4603 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4604 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4);
4605 ata_std_ports(&probe_ent->port[p]);
4609 if (ports & ATA_PORT_SECONDARY) {
4610 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2);
4611 probe_ent->port[p].altstatus_addr =
4612 probe_ent->port[p].ctl_addr =
4613 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4614 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4615 ata_std_ports(&probe_ent->port[p]);
4619 probe_ent->n_ports = p;
4623 static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info *port, int port_num)
4625 struct ata_probe_ent *probe_ent;
4627 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port);
4631 probe_ent->legacy_mode = 1;
4632 probe_ent->n_ports = 1;
4633 probe_ent->hard_port_no = port_num;
4634 probe_ent->private_data = port->private_data;
4639 probe_ent->irq = 14;
4640 probe_ent->port[0].cmd_addr = 0x1f0;
4641 probe_ent->port[0].altstatus_addr =
4642 probe_ent->port[0].ctl_addr = 0x3f6;
4645 probe_ent->irq = 15;
4646 probe_ent->port[0].cmd_addr = 0x170;
4647 probe_ent->port[0].altstatus_addr =
4648 probe_ent->port[0].ctl_addr = 0x376;
4651 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num;
4652 ata_std_ports(&probe_ent->port[0]);
4657 * ata_pci_init_one - Initialize/register PCI IDE host controller
4658 * @pdev: Controller to be initialized
4659 * @port_info: Information from low-level host driver
4660 * @n_ports: Number of ports attached to host controller
4662 * This is a helper function which can be called from a driver's
4663 * xxx_init_one() probe function if the hardware uses traditional
4664 * IDE taskfile registers.
4666 * This function calls pci_enable_device(), reserves its register
4667 * regions, sets the dma mask, enables bus master mode, and calls
4671 * Inherited from PCI layer (may sleep).
4674 * Zero on success, negative on errno-based value on error.
4677 int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4678 unsigned int n_ports)
4680 struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL;
4681 struct ata_port_info *port[2];
4683 unsigned int legacy_mode = 0;
4684 int disable_dev_on_err = 1;
4689 port[0] = port_info[0];
4691 port[1] = port_info[1];
4695 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4696 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
4697 /* TODO: What if one channel is in native mode ... */
4698 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4699 mask = (1 << 2) | (1 << 0);
4700 if ((tmp8 & mask) != mask)
4701 legacy_mode = (1 << 3);
4705 if ((!legacy_mode) && (n_ports > 2)) {
4706 printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n");
4711 /* FIXME: Really for ATA it isn't safe because the device may be
4712 multi-purpose and we want to leave it alone if it was already
4713 enabled. Secondly for shared use as Arjan says we want refcounting
4715 Checking dev->is_enabled is insufficient as this is not set at
4716 boot for the primary video which is BIOS enabled
4719 rc = pci_enable_device(pdev);
4723 rc = pci_request_regions(pdev, DRV_NAME);
4725 disable_dev_on_err = 0;
4729 /* FIXME: Should use platform specific mappers for legacy port ranges */
4731 if (!request_region(0x1f0, 8, "libata")) {
4732 struct resource *conflict, res;
4734 res.end = 0x1f0 + 8 - 1;
4735 conflict = ____request_resource(&ioport_resource, &res);
4736 if (!strcmp(conflict->name, "libata"))
4737 legacy_mode |= (1 << 0);
4739 disable_dev_on_err = 0;
4740 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
4743 legacy_mode |= (1 << 0);
4745 if (!request_region(0x170, 8, "libata")) {
4746 struct resource *conflict, res;
4748 res.end = 0x170 + 8 - 1;
4749 conflict = ____request_resource(&ioport_resource, &res);
4750 if (!strcmp(conflict->name, "libata"))
4751 legacy_mode |= (1 << 1);
4753 disable_dev_on_err = 0;
4754 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
4757 legacy_mode |= (1 << 1);
4760 /* we have legacy mode, but all ports are unavailable */
4761 if (legacy_mode == (1 << 3)) {
4763 goto err_out_regions;
4766 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
4768 goto err_out_regions;
4769 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
4771 goto err_out_regions;
4774 if (legacy_mode & (1 << 0))
4775 probe_ent = ata_pci_init_legacy_port(pdev, port[0], 0);
4776 if (legacy_mode & (1 << 1))
4777 probe_ent2 = ata_pci_init_legacy_port(pdev, port[1], 1);
4780 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
4782 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY);
4784 if (!probe_ent && !probe_ent2) {
4786 goto err_out_regions;
4789 pci_set_master(pdev);
4791 /* FIXME: check ata_device_add return */
4793 if (legacy_mode & (1 << 0))
4794 ata_device_add(probe_ent);
4795 if (legacy_mode & (1 << 1))
4796 ata_device_add(probe_ent2);
4798 ata_device_add(probe_ent);
4806 if (legacy_mode & (1 << 0))
4807 release_region(0x1f0, 8);
4808 if (legacy_mode & (1 << 1))
4809 release_region(0x170, 8);
4810 pci_release_regions(pdev);
4812 if (disable_dev_on_err)
4813 pci_disable_device(pdev);
4818 * ata_pci_remove_one - PCI layer callback for device removal
4819 * @pdev: PCI device that was removed
4821 * PCI layer indicates to libata via this hook that
4822 * hot-unplug or module unload event has occurred.
4823 * Handle this by unregistering all objects associated
4824 * with this PCI device. Free those objects. Then finally
4825 * release PCI resources and disable device.
4828 * Inherited from PCI layer (may sleep).
4831 void ata_pci_remove_one (struct pci_dev *pdev)
4833 struct device *dev = pci_dev_to_dev(pdev);
4834 struct ata_host_set *host_set = dev_get_drvdata(dev);
4836 ata_host_set_remove(host_set);
4837 pci_release_regions(pdev);
4838 pci_disable_device(pdev);
4839 dev_set_drvdata(dev, NULL);
4842 /* move to PCI subsystem */
4843 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
4845 unsigned long tmp = 0;
4847 switch (bits->width) {
4850 pci_read_config_byte(pdev, bits->reg, &tmp8);
4856 pci_read_config_word(pdev, bits->reg, &tmp16);
4862 pci_read_config_dword(pdev, bits->reg, &tmp32);
4873 return (tmp == bits->val) ? 1 : 0;
4875 #endif /* CONFIG_PCI */
4878 static int __init ata_init(void)
4880 ata_wq = create_workqueue("ata");
4884 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4888 static void __exit ata_exit(void)
4890 destroy_workqueue(ata_wq);
4893 module_init(ata_init);
4894 module_exit(ata_exit);
4896 static unsigned long ratelimit_time;
4897 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4899 int ata_ratelimit(void)
4902 unsigned long flags;
4904 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4906 if (time_after(jiffies, ratelimit_time)) {
4908 ratelimit_time = jiffies + (HZ/5);
4912 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4918 * libata is essentially a library of internal helper functions for
4919 * low-level ATA host controller drivers. As such, the API/ABI is
4920 * likely to change as new drivers are added and updated.
4921 * Do not depend on ABI/API stability.
4924 EXPORT_SYMBOL_GPL(ata_std_bios_param);
4925 EXPORT_SYMBOL_GPL(ata_std_ports);
4926 EXPORT_SYMBOL_GPL(ata_device_add);
4927 EXPORT_SYMBOL_GPL(ata_host_set_remove);
4928 EXPORT_SYMBOL_GPL(ata_sg_init);
4929 EXPORT_SYMBOL_GPL(ata_sg_init_one);
4930 EXPORT_SYMBOL_GPL(ata_qc_complete);
4931 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4932 EXPORT_SYMBOL_GPL(ata_eng_timeout);
4933 EXPORT_SYMBOL_GPL(ata_tf_load);
4934 EXPORT_SYMBOL_GPL(ata_tf_read);
4935 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4936 EXPORT_SYMBOL_GPL(ata_std_dev_select);
4937 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4938 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4939 EXPORT_SYMBOL_GPL(ata_check_status);
4940 EXPORT_SYMBOL_GPL(ata_altstatus);
4941 EXPORT_SYMBOL_GPL(ata_exec_command);
4942 EXPORT_SYMBOL_GPL(ata_port_start);
4943 EXPORT_SYMBOL_GPL(ata_port_stop);
4944 EXPORT_SYMBOL_GPL(ata_host_stop);
4945 EXPORT_SYMBOL_GPL(ata_interrupt);
4946 EXPORT_SYMBOL_GPL(ata_qc_prep);
4947 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4948 EXPORT_SYMBOL_GPL(ata_bmdma_start);
4949 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4950 EXPORT_SYMBOL_GPL(ata_bmdma_status);
4951 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4952 EXPORT_SYMBOL_GPL(ata_port_probe);
4953 EXPORT_SYMBOL_GPL(sata_phy_reset);
4954 EXPORT_SYMBOL_GPL(__sata_phy_reset);
4955 EXPORT_SYMBOL_GPL(ata_bus_reset);
4956 EXPORT_SYMBOL_GPL(ata_port_disable);
4957 EXPORT_SYMBOL_GPL(ata_ratelimit);
4958 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4959 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4960 EXPORT_SYMBOL_GPL(ata_scsi_error);
4961 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4962 EXPORT_SYMBOL_GPL(ata_scsi_release);
4963 EXPORT_SYMBOL_GPL(ata_host_intr);
4964 EXPORT_SYMBOL_GPL(ata_dev_classify);
4965 EXPORT_SYMBOL_GPL(ata_dev_id_string);
4966 EXPORT_SYMBOL_GPL(ata_dev_config);
4967 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
4969 EXPORT_SYMBOL_GPL(ata_timing_compute);
4970 EXPORT_SYMBOL_GPL(ata_timing_merge);
4973 EXPORT_SYMBOL_GPL(pci_test_config_bits);
4974 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
4975 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4976 EXPORT_SYMBOL_GPL(ata_pci_init_one);
4977 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
4978 #endif /* CONFIG_PCI */