2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
64 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
65 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
66 static void ata_set_mode(struct ata_port *ap);
67 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
68 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
69 static int fgb(u32 bitmap);
70 static int ata_choose_xfer_mode(const struct ata_port *ap,
72 unsigned int *xfer_shift_out);
73 static void ata_pio_error(struct ata_port *ap);
75 static unsigned int ata_unique_id = 1;
76 static struct workqueue_struct *ata_wq;
78 int atapi_enabled = 0;
79 module_param(atapi_enabled, int, 0444);
80 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
82 MODULE_AUTHOR("Jeff Garzik");
83 MODULE_DESCRIPTION("Library module for ATA devices");
84 MODULE_LICENSE("GPL");
85 MODULE_VERSION(DRV_VERSION);
89 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
90 * @tf: Taskfile to convert
91 * @fis: Buffer into which data will output
92 * @pmp: Port multiplier port
94 * Converts a standard ATA taskfile to a Serial ATA
95 * FIS structure (Register - Host to Device).
98 * Inherited from caller.
101 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
103 fis[0] = 0x27; /* Register - Host to Device FIS */
104 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
105 bit 7 indicates Command FIS */
106 fis[2] = tf->command;
107 fis[3] = tf->feature;
114 fis[8] = tf->hob_lbal;
115 fis[9] = tf->hob_lbam;
116 fis[10] = tf->hob_lbah;
117 fis[11] = tf->hob_feature;
120 fis[13] = tf->hob_nsect;
131 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
132 * @fis: Buffer from which data will be input
133 * @tf: Taskfile to output
135 * Converts a serial ATA FIS structure to a standard ATA taskfile.
138 * Inherited from caller.
141 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
143 tf->command = fis[2]; /* status */
144 tf->feature = fis[3]; /* error */
151 tf->hob_lbal = fis[8];
152 tf->hob_lbam = fis[9];
153 tf->hob_lbah = fis[10];
156 tf->hob_nsect = fis[13];
159 static const u8 ata_rw_cmds[] = {
163 ATA_CMD_READ_MULTI_EXT,
164 ATA_CMD_WRITE_MULTI_EXT,
168 ATA_CMD_WRITE_MULTI_FUA_EXT,
172 ATA_CMD_PIO_READ_EXT,
173 ATA_CMD_PIO_WRITE_EXT,
186 ATA_CMD_WRITE_FUA_EXT
190 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
191 * @qc: command to examine and configure
193 * Examine the device configuration and tf->flags to calculate
194 * the proper read/write commands and protocol to use.
199 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
201 struct ata_taskfile *tf = &qc->tf;
202 struct ata_device *dev = qc->dev;
205 int index, fua, lba48, write;
207 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
208 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
209 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
211 if (dev->flags & ATA_DFLAG_PIO) {
212 tf->protocol = ATA_PROT_PIO;
213 index = dev->multi_count ? 0 : 8;
214 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
215 /* Unable to use DMA due to host limitation */
216 tf->protocol = ATA_PROT_PIO;
217 index = dev->multi_count ? 0 : 8;
219 tf->protocol = ATA_PROT_DMA;
223 cmd = ata_rw_cmds[index + fua + lba48 + write];
231 static const char * const xfer_mode_str[] = {
251 * ata_udma_string - convert UDMA bit offset to string
252 * @mask: mask of bits supported; only highest bit counts.
254 * Determine string which represents the highest speed
255 * (highest bit in @udma_mask).
261 * Constant C string representing highest speed listed in
262 * @udma_mask, or the constant C string "<n/a>".
265 static const char *ata_mode_string(unsigned int mask)
269 for (i = 7; i >= 0; i--)
272 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
275 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
282 return xfer_mode_str[i];
286 * ata_pio_devchk - PATA device presence detection
287 * @ap: ATA channel to examine
288 * @device: Device to examine (starting at zero)
290 * This technique was originally described in
291 * Hale Landis's ATADRVR (www.ata-atapi.com), and
292 * later found its way into the ATA/ATAPI spec.
294 * Write a pattern to the ATA shadow registers,
295 * and if a device is present, it will respond by
296 * correctly storing and echoing back the
297 * ATA shadow register contents.
303 static unsigned int ata_pio_devchk(struct ata_port *ap,
306 struct ata_ioports *ioaddr = &ap->ioaddr;
309 ap->ops->dev_select(ap, device);
311 outb(0x55, ioaddr->nsect_addr);
312 outb(0xaa, ioaddr->lbal_addr);
314 outb(0xaa, ioaddr->nsect_addr);
315 outb(0x55, ioaddr->lbal_addr);
317 outb(0x55, ioaddr->nsect_addr);
318 outb(0xaa, ioaddr->lbal_addr);
320 nsect = inb(ioaddr->nsect_addr);
321 lbal = inb(ioaddr->lbal_addr);
323 if ((nsect == 0x55) && (lbal == 0xaa))
324 return 1; /* we found a device */
326 return 0; /* nothing found */
330 * ata_mmio_devchk - PATA device presence detection
331 * @ap: ATA channel to examine
332 * @device: Device to examine (starting at zero)
334 * This technique was originally described in
335 * Hale Landis's ATADRVR (www.ata-atapi.com), and
336 * later found its way into the ATA/ATAPI spec.
338 * Write a pattern to the ATA shadow registers,
339 * and if a device is present, it will respond by
340 * correctly storing and echoing back the
341 * ATA shadow register contents.
347 static unsigned int ata_mmio_devchk(struct ata_port *ap,
350 struct ata_ioports *ioaddr = &ap->ioaddr;
353 ap->ops->dev_select(ap, device);
355 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
356 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
358 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
359 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
361 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
362 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
364 nsect = readb((void __iomem *) ioaddr->nsect_addr);
365 lbal = readb((void __iomem *) ioaddr->lbal_addr);
367 if ((nsect == 0x55) && (lbal == 0xaa))
368 return 1; /* we found a device */
370 return 0; /* nothing found */
374 * ata_devchk - PATA device presence detection
375 * @ap: ATA channel to examine
376 * @device: Device to examine (starting at zero)
378 * Dispatch ATA device presence detection, depending
379 * on whether we are using PIO or MMIO to talk to the
380 * ATA shadow registers.
386 static unsigned int ata_devchk(struct ata_port *ap,
389 if (ap->flags & ATA_FLAG_MMIO)
390 return ata_mmio_devchk(ap, device);
391 return ata_pio_devchk(ap, device);
395 * ata_dev_classify - determine device type based on ATA-spec signature
396 * @tf: ATA taskfile register set for device to be identified
398 * Determine from taskfile register contents whether a device is
399 * ATA or ATAPI, as per "Signature and persistence" section
400 * of ATA/PI spec (volume 1, sect 5.14).
406 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
407 * the event of failure.
410 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
412 /* Apple's open source Darwin code hints that some devices only
413 * put a proper signature into the LBA mid/high registers,
414 * So, we only check those. It's sufficient for uniqueness.
417 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
418 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
419 DPRINTK("found ATA device by sig\n");
423 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
424 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
425 DPRINTK("found ATAPI device by sig\n");
426 return ATA_DEV_ATAPI;
429 DPRINTK("unknown device\n");
430 return ATA_DEV_UNKNOWN;
434 * ata_dev_try_classify - Parse returned ATA device signature
435 * @ap: ATA channel to examine
436 * @device: Device to examine (starting at zero)
437 * @r_err: Value of error register on completion
439 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
440 * an ATA/ATAPI-defined set of values is placed in the ATA
441 * shadow registers, indicating the results of device detection
444 * Select the ATA device, and read the values from the ATA shadow
445 * registers. Then parse according to the Error register value,
446 * and the spec-defined values examined by ata_dev_classify().
452 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
456 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
458 struct ata_taskfile tf;
462 ap->ops->dev_select(ap, device);
464 memset(&tf, 0, sizeof(tf));
466 ap->ops->tf_read(ap, &tf);
471 /* see if device passed diags */
474 else if ((device == 0) && (err == 0x81))
479 /* determine if device is ATA or ATAPI */
480 class = ata_dev_classify(&tf);
482 if (class == ATA_DEV_UNKNOWN)
484 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
490 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
491 * @id: IDENTIFY DEVICE results we will examine
492 * @s: string into which data is output
493 * @ofs: offset into identify device page
494 * @len: length of string to return. must be an even number.
496 * The strings in the IDENTIFY DEVICE page are broken up into
497 * 16-bit chunks. Run through the string, and output each
498 * 8-bit chunk linearly, regardless of platform.
504 void ata_dev_id_string(const u16 *id, unsigned char *s,
505 unsigned int ofs, unsigned int len)
525 * ata_noop_dev_select - Select device 0/1 on ATA bus
526 * @ap: ATA channel to manipulate
527 * @device: ATA device (numbered from zero) to select
529 * This function performs no actual function.
531 * May be used as the dev_select() entry in ata_port_operations.
536 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
542 * ata_std_dev_select - Select device 0/1 on ATA bus
543 * @ap: ATA channel to manipulate
544 * @device: ATA device (numbered from zero) to select
546 * Use the method defined in the ATA specification to
547 * make either device 0, or device 1, active on the
548 * ATA channel. Works with both PIO and MMIO.
550 * May be used as the dev_select() entry in ata_port_operations.
556 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
561 tmp = ATA_DEVICE_OBS;
563 tmp = ATA_DEVICE_OBS | ATA_DEV1;
565 if (ap->flags & ATA_FLAG_MMIO) {
566 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
568 outb(tmp, ap->ioaddr.device_addr);
570 ata_pause(ap); /* needed; also flushes, for mmio */
574 * ata_dev_select - Select device 0/1 on ATA bus
575 * @ap: ATA channel to manipulate
576 * @device: ATA device (numbered from zero) to select
577 * @wait: non-zero to wait for Status register BSY bit to clear
578 * @can_sleep: non-zero if context allows sleeping
580 * Use the method defined in the ATA specification to
581 * make either device 0, or device 1, active on the
584 * This is a high-level version of ata_std_dev_select(),
585 * which additionally provides the services of inserting
586 * the proper pauses and status polling, where needed.
592 void ata_dev_select(struct ata_port *ap, unsigned int device,
593 unsigned int wait, unsigned int can_sleep)
595 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
596 ap->id, device, wait);
601 ap->ops->dev_select(ap, device);
604 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
611 * ata_dump_id - IDENTIFY DEVICE info debugging output
612 * @dev: Device whose IDENTIFY DEVICE page we will dump
614 * Dump selected 16-bit words from a detected device's
615 * IDENTIFY PAGE page.
621 static inline void ata_dump_id(const struct ata_device *dev)
623 DPRINTK("49==0x%04x "
633 DPRINTK("80==0x%04x "
643 DPRINTK("88==0x%04x "
650 * Compute the PIO modes available for this device. This is not as
651 * trivial as it seems if we must consider early devices correctly.
653 * FIXME: pre IDE drive timing (do we care ?).
656 static unsigned int ata_pio_modes(const struct ata_device *adev)
660 /* Usual case. Word 53 indicates word 64 is valid */
661 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 1)) {
662 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
668 /* If word 64 isn't valid then Word 51 high byte holds the PIO timing
669 number for the maximum. Turn it into a mask and return it */
670 modes = (2 << ((adev->id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF)) - 1 ;
672 /* But wait.. there's more. Design your standards by committee and
673 you too can get a free iordy field to process. However its the
674 speeds not the modes that are supported... Note drivers using the
675 timing API will get this right anyway */
679 ata_queue_pio_task(struct ata_port *ap)
681 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
682 queue_work(ata_wq, &ap->pio_task);
686 ata_queue_delayed_pio_task(struct ata_port *ap, unsigned long delay)
688 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
689 queue_delayed_work(ata_wq, &ap->pio_task, delay);
693 * ata_flush_pio_tasks - Flush pio_task
694 * @ap: the target ata_port
696 * After this function completes, pio_task is
697 * guranteed not to be running or scheduled.
700 * Kernel thread context (may sleep)
703 static void ata_flush_pio_tasks(struct ata_port *ap)
710 spin_lock_irqsave(&ap->host_set->lock, flags);
711 ap->flags |= ATA_FLAG_FLUSH_PIO_TASK;
712 spin_unlock_irqrestore(&ap->host_set->lock, flags);
714 DPRINTK("flush #1\n");
715 flush_workqueue(ata_wq);
718 * At this point, if a task is running, it's guaranteed to see
719 * the FLUSH flag; thus, it will never queue pio tasks again.
722 tmp |= cancel_delayed_work(&ap->pio_task);
724 DPRINTK("flush #2\n");
725 flush_workqueue(ata_wq);
728 spin_lock_irqsave(&ap->host_set->lock, flags);
729 ap->flags &= ~ATA_FLAG_FLUSH_PIO_TASK;
730 spin_unlock_irqrestore(&ap->host_set->lock, flags);
735 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
737 struct completion *waiting = qc->private_data;
739 qc->ap->ops->tf_read(qc->ap, &qc->tf);
744 * ata_exec_internal - execute libata internal command
745 * @ap: Port to which the command is sent
746 * @dev: Device to which the command is sent
747 * @tf: Taskfile registers for the command and the result
748 * @dma_dir: Data tranfer direction of the command
749 * @buf: Data buffer of the command
750 * @buflen: Length of data buffer
752 * Executes libata internal command with timeout. @tf contains
753 * command on entry and result on return. Timeout and error
754 * conditions are reported via return value. No recovery action
755 * is taken after a command times out. It's caller's duty to
756 * clean up after timeout.
759 * None. Should be called with kernel context, might sleep.
763 ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
764 struct ata_taskfile *tf,
765 int dma_dir, void *buf, unsigned int buflen)
767 u8 command = tf->command;
768 struct ata_queued_cmd *qc;
769 DECLARE_COMPLETION(wait);
771 unsigned int err_mask;
773 spin_lock_irqsave(&ap->host_set->lock, flags);
775 qc = ata_qc_new_init(ap, dev);
779 qc->dma_dir = dma_dir;
780 if (dma_dir != DMA_NONE) {
781 ata_sg_init_one(qc, buf, buflen);
782 qc->nsect = buflen / ATA_SECT_SIZE;
785 qc->private_data = &wait;
786 qc->complete_fn = ata_qc_complete_internal;
788 qc->err_mask = ata_qc_issue(qc);
792 spin_unlock_irqrestore(&ap->host_set->lock, flags);
794 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
795 spin_lock_irqsave(&ap->host_set->lock, flags);
797 /* We're racing with irq here. If we lose, the
798 * following test prevents us from completing the qc
799 * again. If completion irq occurs after here but
800 * before the caller cleans up, it will result in a
801 * spurious interrupt. We can live with that.
803 if (qc->flags & ATA_QCFLAG_ACTIVE) {
804 qc->err_mask = AC_ERR_TIMEOUT;
806 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
810 spin_unlock_irqrestore(&ap->host_set->lock, flags);
814 err_mask = qc->err_mask;
822 * ata_pio_need_iordy - check if iordy needed
825 * Check if the current speed of the device requires IORDY. Used
826 * by various controllers for chip configuration.
829 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
832 int speed = adev->pio_mode - XFER_PIO_0;
839 /* If we have no drive specific rule, then PIO 2 is non IORDY */
841 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
842 pio = adev->id[ATA_ID_EIDE_PIO];
843 /* Is the speed faster than the drive allows non IORDY ? */
845 /* This is cycle times not frequency - watch the logic! */
846 if (pio > 240) /* PIO2 is 240nS per cycle */
855 * ata_dev_identify - obtain IDENTIFY x DEVICE page
856 * @ap: port on which device we wish to probe resides
857 * @device: device bus address, starting at zero
859 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
860 * command, and read back the 512-byte device information page.
861 * The device information page is fed to us via the standard
862 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
863 * using standard PIO-IN paths)
865 * After reading the device information page, we use several
866 * bits of information from it to initialize data structures
867 * that will be used during the lifetime of the ata_device.
868 * Other data from the info page is used to disqualify certain
869 * older ATA devices we do not wish to support.
872 * Inherited from caller. Some functions called by this function
873 * obtain the host_set lock.
876 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
878 struct ata_device *dev = &ap->device[device];
879 unsigned int major_version;
881 unsigned long xfer_modes;
882 unsigned int using_edd;
883 struct ata_taskfile tf;
884 unsigned int err_mask;
887 if (!ata_dev_present(dev)) {
888 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
893 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
898 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
900 WARN_ON(dev->class != ATA_DEV_ATA && dev->class != ATA_DEV_ATAPI &&
901 dev->class != ATA_DEV_NONE);
903 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
906 ata_tf_init(ap, &tf, device);
908 if (dev->class == ATA_DEV_ATA) {
909 tf.command = ATA_CMD_ID_ATA;
910 DPRINTK("do ATA identify\n");
912 tf.command = ATA_CMD_ID_ATAPI;
913 DPRINTK("do ATAPI identify\n");
916 tf.protocol = ATA_PROT_PIO;
918 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
919 dev->id, sizeof(dev->id));
922 if (err_mask & ~AC_ERR_DEV)
926 * arg! EDD works for all test cases, but seems to return
927 * the ATA signature for some ATAPI devices. Until the
928 * reason for this is found and fixed, we fix up the mess
929 * here. If IDENTIFY DEVICE returns command aborted
930 * (as ATAPI devices do), then we issue an
931 * IDENTIFY PACKET DEVICE.
933 * ATA software reset (SRST, the default) does not appear
934 * to have this problem.
936 if ((using_edd) && (dev->class == ATA_DEV_ATA)) {
938 if (err & ATA_ABORTED) {
939 dev->class = ATA_DEV_ATAPI;
946 swap_buf_le16(dev->id, ATA_ID_WORDS);
948 /* print device capabilities */
949 printk(KERN_DEBUG "ata%u: dev %u cfg "
950 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
951 ap->id, device, dev->id[49],
952 dev->id[82], dev->id[83], dev->id[84],
953 dev->id[85], dev->id[86], dev->id[87],
957 * common ATA, ATAPI feature tests
960 /* we require DMA support (bits 8 of word 49) */
961 if (!ata_id_has_dma(dev->id)) {
962 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
966 /* quick-n-dirty find max transfer mode; for printk only */
967 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
969 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
971 xfer_modes = ata_pio_modes(dev);
975 /* ATA-specific feature tests */
976 if (dev->class == ATA_DEV_ATA) {
977 if (!ata_id_is_ata(dev->id)) /* sanity check */
980 /* get major version */
981 tmp = dev->id[ATA_ID_MAJOR_VER];
982 for (major_version = 14; major_version >= 1; major_version--)
983 if (tmp & (1 << major_version))
987 * The exact sequence expected by certain pre-ATA4 drives is:
990 * INITIALIZE DEVICE PARAMETERS
992 * Some drives were very specific about that exact sequence.
994 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
995 ata_dev_init_params(ap, dev);
997 /* current CHS translation info (id[53-58]) might be
998 * changed. reread the identify device info.
1000 ata_dev_reread_id(ap, dev);
1003 if (ata_id_has_lba(dev->id)) {
1004 dev->flags |= ATA_DFLAG_LBA;
1006 if (ata_id_has_lba48(dev->id)) {
1007 dev->flags |= ATA_DFLAG_LBA48;
1008 dev->n_sectors = ata_id_u64(dev->id, 100);
1010 dev->n_sectors = ata_id_u32(dev->id, 60);
1013 /* print device info to dmesg */
1014 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1017 ata_mode_string(xfer_modes),
1018 (unsigned long long)dev->n_sectors,
1019 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1023 /* Default translation */
1024 dev->cylinders = dev->id[1];
1025 dev->heads = dev->id[3];
1026 dev->sectors = dev->id[6];
1027 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1029 if (ata_id_current_chs_valid(dev->id)) {
1030 /* Current CHS translation is valid. */
1031 dev->cylinders = dev->id[54];
1032 dev->heads = dev->id[55];
1033 dev->sectors = dev->id[56];
1035 dev->n_sectors = ata_id_u32(dev->id, 57);
1038 /* print device info to dmesg */
1039 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1042 ata_mode_string(xfer_modes),
1043 (unsigned long long)dev->n_sectors,
1044 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1048 if (dev->id[59] & 0x100) {
1049 dev->multi_count = dev->id[59] & 0xff;
1050 DPRINTK("ata%u: dev %u multi count %u\n",
1051 ap->id, device, dev->multi_count);
1054 ap->host->max_cmd_len = 16;
1057 /* ATAPI-specific feature tests */
1058 else if (dev->class == ATA_DEV_ATAPI) {
1059 if (ata_id_is_ata(dev->id)) /* sanity check */
1062 rc = atapi_cdb_len(dev->id);
1063 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1064 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1067 ap->cdb_len = (unsigned int) rc;
1068 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1070 if (ata_id_cdb_intr(dev->id))
1071 dev->flags |= ATA_DFLAG_CDB_INTR;
1073 /* print device info to dmesg */
1074 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1076 ata_mode_string(xfer_modes));
1079 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1083 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1086 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1087 DPRINTK("EXIT, err\n");
1091 static inline u8 ata_dev_knobble(const struct ata_port *ap)
1093 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1097 * ata_dev_config - Run device specific handlers & check for SATA->PATA bridges
1104 void ata_dev_config(struct ata_port *ap, unsigned int i)
1106 /* limit bridge transfers to udma5, 200 sectors */
1107 if (ata_dev_knobble(ap)) {
1108 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1109 ap->id, ap->device->devno);
1110 ap->udma_mask &= ATA_UDMA5;
1111 ap->host->max_sectors = ATA_MAX_SECTORS;
1112 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1113 ap->device[i].flags |= ATA_DFLAG_LOCK_SECTORS;
1116 if (ap->ops->dev_config)
1117 ap->ops->dev_config(ap, &ap->device[i]);
1121 * ata_bus_probe - Reset and probe ATA bus
1124 * Master ATA bus probing function. Initiates a hardware-dependent
1125 * bus reset, then attempts to identify any devices found on
1129 * PCI/etc. bus probe sem.
1132 * Zero on success, non-zero on error.
1135 static int ata_bus_probe(struct ata_port *ap)
1137 unsigned int i, found = 0;
1139 if (ap->ops->probe_reset) {
1140 unsigned int classes[ATA_MAX_DEVICES];
1145 rc = ap->ops->probe_reset(ap, classes);
1147 for (i = 0; i < ATA_MAX_DEVICES; i++)
1148 ap->device[i].class = classes[i];
1150 printk(KERN_ERR "ata%u: probe reset failed, "
1151 "disabling port\n", ap->id);
1152 ata_port_disable(ap);
1155 ap->ops->phy_reset(ap);
1157 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1160 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1161 ata_dev_identify(ap, i);
1162 if (ata_dev_present(&ap->device[i])) {
1164 ata_dev_config(ap,i);
1168 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1169 goto err_out_disable;
1172 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1173 goto err_out_disable;
1178 ap->ops->port_disable(ap);
1184 * ata_port_probe - Mark port as enabled
1185 * @ap: Port for which we indicate enablement
1187 * Modify @ap data structure such that the system
1188 * thinks that the entire port is enabled.
1190 * LOCKING: host_set lock, or some other form of
1194 void ata_port_probe(struct ata_port *ap)
1196 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1200 * sata_print_link_status - Print SATA link status
1201 * @ap: SATA port to printk link status about
1203 * This function prints link speed and status of a SATA link.
1208 static void sata_print_link_status(struct ata_port *ap)
1213 if (!ap->ops->scr_read)
1216 sstatus = scr_read(ap, SCR_STATUS);
1218 if (sata_dev_present(ap)) {
1219 tmp = (sstatus >> 4) & 0xf;
1222 else if (tmp & (1 << 1))
1225 speed = "<unknown>";
1226 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1227 ap->id, speed, sstatus);
1229 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1235 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1236 * @ap: SATA port associated with target SATA PHY.
1238 * This function issues commands to standard SATA Sxxx
1239 * PHY registers, to wake up the phy (and device), and
1240 * clear any reset condition.
1243 * PCI/etc. bus probe sem.
1246 void __sata_phy_reset(struct ata_port *ap)
1249 unsigned long timeout = jiffies + (HZ * 5);
1251 if (ap->flags & ATA_FLAG_SATA_RESET) {
1252 /* issue phy wake/reset */
1253 scr_write_flush(ap, SCR_CONTROL, 0x301);
1254 /* Couldn't find anything in SATA I/II specs, but
1255 * AHCI-1.1 10.4.2 says at least 1 ms. */
1258 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1260 /* wait for phy to become ready, if necessary */
1263 sstatus = scr_read(ap, SCR_STATUS);
1264 if ((sstatus & 0xf) != 1)
1266 } while (time_before(jiffies, timeout));
1268 /* print link status */
1269 sata_print_link_status(ap);
1271 /* TODO: phy layer with polling, timeouts, etc. */
1272 if (sata_dev_present(ap))
1275 ata_port_disable(ap);
1277 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1280 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1281 ata_port_disable(ap);
1285 ap->cbl = ATA_CBL_SATA;
1289 * sata_phy_reset - Reset SATA bus.
1290 * @ap: SATA port associated with target SATA PHY.
1292 * This function resets the SATA bus, and then probes
1293 * the bus for devices.
1296 * PCI/etc. bus probe sem.
1299 void sata_phy_reset(struct ata_port *ap)
1301 __sata_phy_reset(ap);
1302 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1308 * ata_port_disable - Disable port.
1309 * @ap: Port to be disabled.
1311 * Modify @ap data structure such that the system
1312 * thinks that the entire port is disabled, and should
1313 * never attempt to probe or communicate with devices
1316 * LOCKING: host_set lock, or some other form of
1320 void ata_port_disable(struct ata_port *ap)
1322 ap->device[0].class = ATA_DEV_NONE;
1323 ap->device[1].class = ATA_DEV_NONE;
1324 ap->flags |= ATA_FLAG_PORT_DISABLED;
1328 * This mode timing computation functionality is ported over from
1329 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1332 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1333 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1334 * for PIO 5, which is a nonstandard extension and UDMA6, which
1335 * is currently supported only by Maxtor drives.
1338 static const struct ata_timing ata_timing[] = {
1340 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1341 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1342 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1343 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1345 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1346 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1347 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1349 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1351 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1352 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1353 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1355 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1356 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1357 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1359 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1360 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1361 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1363 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1364 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1365 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1367 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1372 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1373 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1375 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1377 q->setup = EZ(t->setup * 1000, T);
1378 q->act8b = EZ(t->act8b * 1000, T);
1379 q->rec8b = EZ(t->rec8b * 1000, T);
1380 q->cyc8b = EZ(t->cyc8b * 1000, T);
1381 q->active = EZ(t->active * 1000, T);
1382 q->recover = EZ(t->recover * 1000, T);
1383 q->cycle = EZ(t->cycle * 1000, T);
1384 q->udma = EZ(t->udma * 1000, UT);
1387 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1388 struct ata_timing *m, unsigned int what)
1390 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1391 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1392 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1393 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1394 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1395 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1396 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1397 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1400 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1402 const struct ata_timing *t;
1404 for (t = ata_timing; t->mode != speed; t++)
1405 if (t->mode == 0xFF)
1410 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1411 struct ata_timing *t, int T, int UT)
1413 const struct ata_timing *s;
1414 struct ata_timing p;
1420 if (!(s = ata_timing_find_mode(speed)))
1423 memcpy(t, s, sizeof(*s));
1426 * If the drive is an EIDE drive, it can tell us it needs extended
1427 * PIO/MW_DMA cycle timing.
1430 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1431 memset(&p, 0, sizeof(p));
1432 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1433 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1434 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1435 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1436 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1438 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1442 * Convert the timing to bus clock counts.
1445 ata_timing_quantize(t, t, T, UT);
1448 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1449 * S.M.A.R.T * and some other commands. We have to ensure that the
1450 * DMA cycle timing is slower/equal than the fastest PIO timing.
1453 if (speed > XFER_PIO_4) {
1454 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1455 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1459 * Lengthen active & recovery time so that cycle time is correct.
1462 if (t->act8b + t->rec8b < t->cyc8b) {
1463 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1464 t->rec8b = t->cyc8b - t->act8b;
1467 if (t->active + t->recover < t->cycle) {
1468 t->active += (t->cycle - (t->active + t->recover)) / 2;
1469 t->recover = t->cycle - t->active;
1475 static const struct {
1478 } xfer_mode_classes[] = {
1479 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1480 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1481 { ATA_SHIFT_PIO, XFER_PIO_0 },
1484 static u8 base_from_shift(unsigned int shift)
1488 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1489 if (xfer_mode_classes[i].shift == shift)
1490 return xfer_mode_classes[i].base;
1495 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1500 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1503 if (dev->xfer_shift == ATA_SHIFT_PIO)
1504 dev->flags |= ATA_DFLAG_PIO;
1506 ata_dev_set_xfermode(ap, dev);
1508 base = base_from_shift(dev->xfer_shift);
1509 ofs = dev->xfer_mode - base;
1510 idx = ofs + dev->xfer_shift;
1511 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1513 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1514 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1516 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1517 ap->id, dev->devno, xfer_mode_str[idx]);
1520 static int ata_host_set_pio(struct ata_port *ap)
1526 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1529 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1533 base = base_from_shift(ATA_SHIFT_PIO);
1534 xfer_mode = base + x;
1536 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1537 (int)base, (int)xfer_mode, mask, x);
1539 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1540 struct ata_device *dev = &ap->device[i];
1541 if (ata_dev_present(dev)) {
1542 dev->pio_mode = xfer_mode;
1543 dev->xfer_mode = xfer_mode;
1544 dev->xfer_shift = ATA_SHIFT_PIO;
1545 if (ap->ops->set_piomode)
1546 ap->ops->set_piomode(ap, dev);
1553 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1554 unsigned int xfer_shift)
1558 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1559 struct ata_device *dev = &ap->device[i];
1560 if (ata_dev_present(dev)) {
1561 dev->dma_mode = xfer_mode;
1562 dev->xfer_mode = xfer_mode;
1563 dev->xfer_shift = xfer_shift;
1564 if (ap->ops->set_dmamode)
1565 ap->ops->set_dmamode(ap, dev);
1571 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1572 * @ap: port on which timings will be programmed
1574 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1577 * PCI/etc. bus probe sem.
1579 static void ata_set_mode(struct ata_port *ap)
1581 unsigned int xfer_shift;
1585 /* step 1: always set host PIO timings */
1586 rc = ata_host_set_pio(ap);
1590 /* step 2: choose the best data xfer mode */
1591 xfer_mode = xfer_shift = 0;
1592 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1596 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1597 if (xfer_shift != ATA_SHIFT_PIO)
1598 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1600 /* step 4: update devices' xfer mode */
1601 ata_dev_set_mode(ap, &ap->device[0]);
1602 ata_dev_set_mode(ap, &ap->device[1]);
1604 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1607 if (ap->ops->post_set_mode)
1608 ap->ops->post_set_mode(ap);
1613 ata_port_disable(ap);
1617 * ata_tf_to_host - issue ATA taskfile to host controller
1618 * @ap: port to which command is being issued
1619 * @tf: ATA taskfile register set
1621 * Issues ATA taskfile register set to ATA host controller,
1622 * with proper synchronization with interrupt handler and
1626 * spin_lock_irqsave(host_set lock)
1629 static inline void ata_tf_to_host(struct ata_port *ap,
1630 const struct ata_taskfile *tf)
1632 ap->ops->tf_load(ap, tf);
1633 ap->ops->exec_command(ap, tf);
1637 * ata_busy_sleep - sleep until BSY clears, or timeout
1638 * @ap: port containing status register to be polled
1639 * @tmout_pat: impatience timeout
1640 * @tmout: overall timeout
1642 * Sleep until ATA Status register bit BSY clears,
1643 * or a timeout occurs.
1648 unsigned int ata_busy_sleep (struct ata_port *ap,
1649 unsigned long tmout_pat, unsigned long tmout)
1651 unsigned long timer_start, timeout;
1654 status = ata_busy_wait(ap, ATA_BUSY, 300);
1655 timer_start = jiffies;
1656 timeout = timer_start + tmout_pat;
1657 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1659 status = ata_busy_wait(ap, ATA_BUSY, 3);
1662 if (status & ATA_BUSY)
1663 printk(KERN_WARNING "ata%u is slow to respond, "
1664 "please be patient\n", ap->id);
1666 timeout = timer_start + tmout;
1667 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1669 status = ata_chk_status(ap);
1672 if (status & ATA_BUSY) {
1673 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1674 ap->id, tmout / HZ);
1681 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1683 struct ata_ioports *ioaddr = &ap->ioaddr;
1684 unsigned int dev0 = devmask & (1 << 0);
1685 unsigned int dev1 = devmask & (1 << 1);
1686 unsigned long timeout;
1688 /* if device 0 was found in ata_devchk, wait for its
1692 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1694 /* if device 1 was found in ata_devchk, wait for
1695 * register access, then wait for BSY to clear
1697 timeout = jiffies + ATA_TMOUT_BOOT;
1701 ap->ops->dev_select(ap, 1);
1702 if (ap->flags & ATA_FLAG_MMIO) {
1703 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1704 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1706 nsect = inb(ioaddr->nsect_addr);
1707 lbal = inb(ioaddr->lbal_addr);
1709 if ((nsect == 1) && (lbal == 1))
1711 if (time_after(jiffies, timeout)) {
1715 msleep(50); /* give drive a breather */
1718 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1720 /* is all this really necessary? */
1721 ap->ops->dev_select(ap, 0);
1723 ap->ops->dev_select(ap, 1);
1725 ap->ops->dev_select(ap, 0);
1729 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1730 * @ap: Port to reset and probe
1732 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1733 * probe the bus. Not often used these days.
1736 * PCI/etc. bus probe sem.
1737 * Obtains host_set lock.
1741 static unsigned int ata_bus_edd(struct ata_port *ap)
1743 struct ata_taskfile tf;
1744 unsigned long flags;
1746 /* set up execute-device-diag (bus reset) taskfile */
1747 /* also, take interrupts to a known state (disabled) */
1748 DPRINTK("execute-device-diag\n");
1749 ata_tf_init(ap, &tf, 0);
1751 tf.command = ATA_CMD_EDD;
1752 tf.protocol = ATA_PROT_NODATA;
1755 spin_lock_irqsave(&ap->host_set->lock, flags);
1756 ata_tf_to_host(ap, &tf);
1757 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1759 /* spec says at least 2ms. but who knows with those
1760 * crazy ATAPI devices...
1764 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1767 static unsigned int ata_bus_softreset(struct ata_port *ap,
1768 unsigned int devmask)
1770 struct ata_ioports *ioaddr = &ap->ioaddr;
1772 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1774 /* software reset. causes dev0 to be selected */
1775 if (ap->flags & ATA_FLAG_MMIO) {
1776 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1777 udelay(20); /* FIXME: flush */
1778 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1779 udelay(20); /* FIXME: flush */
1780 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1782 outb(ap->ctl, ioaddr->ctl_addr);
1784 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1786 outb(ap->ctl, ioaddr->ctl_addr);
1789 /* spec mandates ">= 2ms" before checking status.
1790 * We wait 150ms, because that was the magic delay used for
1791 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1792 * between when the ATA command register is written, and then
1793 * status is checked. Because waiting for "a while" before
1794 * checking status is fine, post SRST, we perform this magic
1795 * delay here as well.
1799 ata_bus_post_reset(ap, devmask);
1805 * ata_bus_reset - reset host port and associated ATA channel
1806 * @ap: port to reset
1808 * This is typically the first time we actually start issuing
1809 * commands to the ATA channel. We wait for BSY to clear, then
1810 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1811 * result. Determine what devices, if any, are on the channel
1812 * by looking at the device 0/1 error register. Look at the signature
1813 * stored in each device's taskfile registers, to determine if
1814 * the device is ATA or ATAPI.
1817 * PCI/etc. bus probe sem.
1818 * Obtains host_set lock.
1821 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1824 void ata_bus_reset(struct ata_port *ap)
1826 struct ata_ioports *ioaddr = &ap->ioaddr;
1827 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1829 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1831 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1833 /* determine if device 0/1 are present */
1834 if (ap->flags & ATA_FLAG_SATA_RESET)
1837 dev0 = ata_devchk(ap, 0);
1839 dev1 = ata_devchk(ap, 1);
1843 devmask |= (1 << 0);
1845 devmask |= (1 << 1);
1847 /* select device 0 again */
1848 ap->ops->dev_select(ap, 0);
1850 /* issue bus reset */
1851 if (ap->flags & ATA_FLAG_SRST)
1852 rc = ata_bus_softreset(ap, devmask);
1853 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1854 /* set up device control */
1855 if (ap->flags & ATA_FLAG_MMIO)
1856 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1858 outb(ap->ctl, ioaddr->ctl_addr);
1859 rc = ata_bus_edd(ap);
1866 * determine by signature whether we have ATA or ATAPI devices
1868 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1869 if ((slave_possible) && (err != 0x81))
1870 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1872 /* re-enable interrupts */
1873 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
1876 /* is double-select really necessary? */
1877 if (ap->device[1].class != ATA_DEV_NONE)
1878 ap->ops->dev_select(ap, 1);
1879 if (ap->device[0].class != ATA_DEV_NONE)
1880 ap->ops->dev_select(ap, 0);
1882 /* if no devices were detected, disable this port */
1883 if ((ap->device[0].class == ATA_DEV_NONE) &&
1884 (ap->device[1].class == ATA_DEV_NONE))
1887 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
1888 /* set up device control for ATA_FLAG_SATA_RESET */
1889 if (ap->flags & ATA_FLAG_MMIO)
1890 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1892 outb(ap->ctl, ioaddr->ctl_addr);
1899 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
1900 ap->ops->port_disable(ap);
1905 static int sata_phy_resume(struct ata_port *ap)
1907 unsigned long timeout = jiffies + (HZ * 5);
1910 scr_write_flush(ap, SCR_CONTROL, 0x300);
1912 /* Wait for phy to become ready, if necessary. */
1915 sstatus = scr_read(ap, SCR_STATUS);
1916 if ((sstatus & 0xf) != 1)
1918 } while (time_before(jiffies, timeout));
1924 * ata_std_probeinit - initialize probing
1925 * @ap: port to be probed
1927 * @ap is about to be probed. Initialize it. This function is
1928 * to be used as standard callback for ata_drive_probe_reset().
1930 * NOTE!!! Do not use this function as probeinit if a low level
1931 * driver implements only hardreset. Just pass NULL as probeinit
1932 * in that case. Using this function is probably okay but doing
1933 * so makes reset sequence different from the original
1934 * ->phy_reset implementation and Jeff nervous. :-P
1936 extern void ata_std_probeinit(struct ata_port *ap)
1938 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
1939 sata_phy_resume(ap);
1940 if (sata_dev_present(ap))
1941 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1946 * ata_std_softreset - reset host port via ATA SRST
1947 * @ap: port to reset
1948 * @verbose: fail verbosely
1949 * @classes: resulting classes of attached devices
1951 * Reset host port using ATA SRST. This function is to be used
1952 * as standard callback for ata_drive_*_reset() functions.
1955 * Kernel thread context (may sleep)
1958 * 0 on success, -errno otherwise.
1960 int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
1962 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1963 unsigned int devmask = 0, err_mask;
1968 if (ap->ops->scr_read && !sata_dev_present(ap)) {
1969 classes[0] = ATA_DEV_NONE;
1973 /* determine if device 0/1 are present */
1974 if (ata_devchk(ap, 0))
1975 devmask |= (1 << 0);
1976 if (slave_possible && ata_devchk(ap, 1))
1977 devmask |= (1 << 1);
1979 /* select device 0 again */
1980 ap->ops->dev_select(ap, 0);
1982 /* issue bus reset */
1983 DPRINTK("about to softreset, devmask=%x\n", devmask);
1984 err_mask = ata_bus_softreset(ap, devmask);
1987 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
1990 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
1995 /* determine by signature whether we have ATA or ATAPI devices */
1996 classes[0] = ata_dev_try_classify(ap, 0, &err);
1997 if (slave_possible && err != 0x81)
1998 classes[1] = ata_dev_try_classify(ap, 1, &err);
2001 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2006 * sata_std_hardreset - reset host port via SATA phy reset
2007 * @ap: port to reset
2008 * @verbose: fail verbosely
2009 * @class: resulting class of attached device
2011 * SATA phy-reset host port using DET bits of SControl register.
2012 * This function is to be used as standard callback for
2013 * ata_drive_*_reset().
2016 * Kernel thread context (may sleep)
2019 * 0 on success, -errno otherwise.
2021 int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2025 /* Issue phy wake/reset */
2026 scr_write_flush(ap, SCR_CONTROL, 0x301);
2029 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2030 * 10.4.2 says at least 1 ms.
2034 /* Bring phy back */
2035 sata_phy_resume(ap);
2037 /* TODO: phy layer with polling, timeouts, etc. */
2038 if (!sata_dev_present(ap)) {
2039 *class = ATA_DEV_NONE;
2040 DPRINTK("EXIT, link offline\n");
2044 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2046 printk(KERN_ERR "ata%u: COMRESET failed "
2047 "(device not ready)\n", ap->id);
2049 DPRINTK("EXIT, device not ready\n");
2053 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2055 *class = ata_dev_try_classify(ap, 0, NULL);
2057 DPRINTK("EXIT, class=%u\n", *class);
2062 * ata_std_postreset - standard postreset callback
2063 * @ap: the target ata_port
2064 * @classes: classes of attached devices
2066 * This function is invoked after a successful reset. Note that
2067 * the device might have been reset more than once using
2068 * different reset methods before postreset is invoked.
2069 * postreset is also reponsible for setting cable type.
2071 * This function is to be used as standard callback for
2072 * ata_drive_*_reset().
2075 * Kernel thread context (may sleep)
2077 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2081 /* set cable type */
2082 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2083 ap->cbl = ATA_CBL_SATA;
2085 /* print link status */
2086 if (ap->cbl == ATA_CBL_SATA)
2087 sata_print_link_status(ap);
2089 /* re-enable interrupts */
2090 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2093 /* is double-select really necessary? */
2094 if (classes[0] != ATA_DEV_NONE)
2095 ap->ops->dev_select(ap, 1);
2096 if (classes[1] != ATA_DEV_NONE)
2097 ap->ops->dev_select(ap, 0);
2099 /* bail out if no device is present */
2100 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2101 DPRINTK("EXIT, no device\n");
2105 /* set up device control */
2106 if (ap->ioaddr.ctl_addr) {
2107 if (ap->flags & ATA_FLAG_MMIO)
2108 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2110 outb(ap->ctl, ap->ioaddr.ctl_addr);
2117 * ata_std_probe_reset - standard probe reset method
2118 * @ap: prot to perform probe-reset
2119 * @classes: resulting classes of attached devices
2121 * The stock off-the-shelf ->probe_reset method.
2124 * Kernel thread context (may sleep)
2127 * 0 on success, -errno otherwise.
2129 int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2131 ata_reset_fn_t hardreset;
2134 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
2135 hardreset = sata_std_hardreset;
2137 return ata_drive_probe_reset(ap, ata_std_probeinit,
2138 ata_std_softreset, hardreset,
2139 ata_std_postreset, classes);
2142 static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2143 ata_postreset_fn_t postreset,
2144 unsigned int *classes)
2148 for (i = 0; i < ATA_MAX_DEVICES; i++)
2149 classes[i] = ATA_DEV_UNKNOWN;
2151 rc = reset(ap, 0, classes);
2155 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2156 * is complete and convert all ATA_DEV_UNKNOWN to
2159 for (i = 0; i < ATA_MAX_DEVICES; i++)
2160 if (classes[i] != ATA_DEV_UNKNOWN)
2163 if (i < ATA_MAX_DEVICES)
2164 for (i = 0; i < ATA_MAX_DEVICES; i++)
2165 if (classes[i] == ATA_DEV_UNKNOWN)
2166 classes[i] = ATA_DEV_NONE;
2169 postreset(ap, classes);
2171 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2175 * ata_drive_probe_reset - Perform probe reset with given methods
2176 * @ap: port to reset
2177 * @probeinit: probeinit method (can be NULL)
2178 * @softreset: softreset method (can be NULL)
2179 * @hardreset: hardreset method (can be NULL)
2180 * @postreset: postreset method (can be NULL)
2181 * @classes: resulting classes of attached devices
2183 * Reset the specified port and classify attached devices using
2184 * given methods. This function prefers softreset but tries all
2185 * possible reset sequences to reset and classify devices. This
2186 * function is intended to be used for constructing ->probe_reset
2187 * callback by low level drivers.
2189 * Reset methods should follow the following rules.
2191 * - Return 0 on sucess, -errno on failure.
2192 * - If classification is supported, fill classes[] with
2193 * recognized class codes.
2194 * - If classification is not supported, leave classes[] alone.
2195 * - If verbose is non-zero, print error message on failure;
2196 * otherwise, shut up.
2199 * Kernel thread context (may sleep)
2202 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2203 * if classification fails, and any error code from reset
2206 int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
2207 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2208 ata_postreset_fn_t postreset, unsigned int *classes)
2216 rc = do_probe_reset(ap, softreset, postreset, classes);
2224 rc = do_probe_reset(ap, hardreset, postreset, classes);
2225 if (rc == 0 || rc != -ENODEV)
2229 rc = do_probe_reset(ap, softreset, postreset, classes);
2234 static void ata_pr_blacklisted(const struct ata_port *ap,
2235 const struct ata_device *dev)
2237 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2238 ap->id, dev->devno);
2241 static const char * const ata_dma_blacklist [] = {
2260 "Toshiba CD-ROM XM-6202B",
2261 "TOSHIBA CD-ROM XM-1702BC",
2263 "E-IDE CD-ROM CR-840",
2266 "SAMSUNG CD-ROM SC-148C",
2267 "SAMSUNG CD-ROM SC",
2269 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2273 static int ata_dma_blacklisted(const struct ata_device *dev)
2275 unsigned char model_num[40];
2280 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2283 len = strnlen(s, sizeof(model_num));
2285 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2286 while ((len > 0) && (s[len - 1] == ' ')) {
2291 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2292 if (!strncmp(ata_dma_blacklist[i], s, len))
2298 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
2300 const struct ata_device *master, *slave;
2303 master = &ap->device[0];
2304 slave = &ap->device[1];
2306 WARN_ON(!ata_dev_present(master) && !ata_dev_present(slave));
2308 if (shift == ATA_SHIFT_UDMA) {
2309 mask = ap->udma_mask;
2310 if (ata_dev_present(master)) {
2311 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2312 if (ata_dma_blacklisted(master)) {
2314 ata_pr_blacklisted(ap, master);
2317 if (ata_dev_present(slave)) {
2318 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2319 if (ata_dma_blacklisted(slave)) {
2321 ata_pr_blacklisted(ap, slave);
2325 else if (shift == ATA_SHIFT_MWDMA) {
2326 mask = ap->mwdma_mask;
2327 if (ata_dev_present(master)) {
2328 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2329 if (ata_dma_blacklisted(master)) {
2331 ata_pr_blacklisted(ap, master);
2334 if (ata_dev_present(slave)) {
2335 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2336 if (ata_dma_blacklisted(slave)) {
2338 ata_pr_blacklisted(ap, slave);
2342 else if (shift == ATA_SHIFT_PIO) {
2343 mask = ap->pio_mask;
2344 if (ata_dev_present(master)) {
2345 /* spec doesn't return explicit support for
2346 * PIO0-2, so we fake it
2348 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2353 if (ata_dev_present(slave)) {
2354 /* spec doesn't return explicit support for
2355 * PIO0-2, so we fake it
2357 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2364 mask = 0xffffffff; /* shut up compiler warning */
2371 /* find greatest bit */
2372 static int fgb(u32 bitmap)
2377 for (i = 0; i < 32; i++)
2378 if (bitmap & (1 << i))
2385 * ata_choose_xfer_mode - attempt to find best transfer mode
2386 * @ap: Port for which an xfer mode will be selected
2387 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2388 * @xfer_shift_out: (output) bit shift that selects this mode
2390 * Based on host and device capabilities, determine the
2391 * maximum transfer mode that is amenable to all.
2394 * PCI/etc. bus probe sem.
2397 * Zero on success, negative on error.
2400 static int ata_choose_xfer_mode(const struct ata_port *ap,
2402 unsigned int *xfer_shift_out)
2404 unsigned int mask, shift;
2407 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2408 shift = xfer_mode_classes[i].shift;
2409 mask = ata_get_mode_mask(ap, shift);
2413 *xfer_mode_out = xfer_mode_classes[i].base + x;
2414 *xfer_shift_out = shift;
2423 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2424 * @ap: Port associated with device @dev
2425 * @dev: Device to which command will be sent
2427 * Issue SET FEATURES - XFER MODE command to device @dev
2431 * PCI/etc. bus probe sem.
2434 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2436 struct ata_taskfile tf;
2438 /* set up set-features taskfile */
2439 DPRINTK("set features - xfer mode\n");
2441 ata_tf_init(ap, &tf, dev->devno);
2442 tf.command = ATA_CMD_SET_FEATURES;
2443 tf.feature = SETFEATURES_XFER;
2444 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2445 tf.protocol = ATA_PROT_NODATA;
2446 tf.nsect = dev->xfer_mode;
2448 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2449 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2451 ata_port_disable(ap);
2458 * ata_dev_reread_id - Reread the device identify device info
2459 * @ap: port where the device is
2460 * @dev: device to reread the identify device info
2465 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2467 struct ata_taskfile tf;
2469 ata_tf_init(ap, &tf, dev->devno);
2471 if (dev->class == ATA_DEV_ATA) {
2472 tf.command = ATA_CMD_ID_ATA;
2473 DPRINTK("do ATA identify\n");
2475 tf.command = ATA_CMD_ID_ATAPI;
2476 DPRINTK("do ATAPI identify\n");
2479 tf.flags |= ATA_TFLAG_DEVICE;
2480 tf.protocol = ATA_PROT_PIO;
2482 if (ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
2483 dev->id, sizeof(dev->id)))
2486 swap_buf_le16(dev->id, ATA_ID_WORDS);
2494 printk(KERN_ERR "ata%u: failed to reread ID, disabled\n", ap->id);
2495 ata_port_disable(ap);
2499 * ata_dev_init_params - Issue INIT DEV PARAMS command
2500 * @ap: Port associated with device @dev
2501 * @dev: Device to which command will be sent
2506 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2508 struct ata_taskfile tf;
2509 u16 sectors = dev->id[6];
2510 u16 heads = dev->id[3];
2512 /* Number of sectors per track 1-255. Number of heads 1-16 */
2513 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2516 /* set up init dev params taskfile */
2517 DPRINTK("init dev params \n");
2519 ata_tf_init(ap, &tf, dev->devno);
2520 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2521 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2522 tf.protocol = ATA_PROT_NODATA;
2524 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2526 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2527 printk(KERN_ERR "ata%u: failed to init parameters, disabled\n",
2529 ata_port_disable(ap);
2536 * ata_sg_clean - Unmap DMA memory associated with command
2537 * @qc: Command containing DMA memory to be released
2539 * Unmap all mapped DMA memory associated with this command.
2542 * spin_lock_irqsave(host_set lock)
2545 static void ata_sg_clean(struct ata_queued_cmd *qc)
2547 struct ata_port *ap = qc->ap;
2548 struct scatterlist *sg = qc->__sg;
2549 int dir = qc->dma_dir;
2550 void *pad_buf = NULL;
2552 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2553 WARN_ON(sg == NULL);
2555 if (qc->flags & ATA_QCFLAG_SINGLE)
2556 WARN_ON(qc->n_elem != 1);
2558 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
2560 /* if we padded the buffer out to 32-bit bound, and data
2561 * xfer direction is from-device, we must copy from the
2562 * pad buffer back into the supplied buffer
2564 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2565 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2567 if (qc->flags & ATA_QCFLAG_SG) {
2569 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2570 /* restore last sg */
2571 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2573 struct scatterlist *psg = &qc->pad_sgent;
2574 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2575 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2576 kunmap_atomic(addr, KM_IRQ0);
2579 if (sg_dma_len(&sg[0]) > 0)
2580 dma_unmap_single(ap->host_set->dev,
2581 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2584 sg->length += qc->pad_len;
2586 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2587 pad_buf, qc->pad_len);
2590 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2595 * ata_fill_sg - Fill PCI IDE PRD table
2596 * @qc: Metadata associated with taskfile to be transferred
2598 * Fill PCI IDE PRD (scatter-gather) table with segments
2599 * associated with the current disk command.
2602 * spin_lock_irqsave(host_set lock)
2605 static void ata_fill_sg(struct ata_queued_cmd *qc)
2607 struct ata_port *ap = qc->ap;
2608 struct scatterlist *sg;
2611 WARN_ON(qc->__sg == NULL);
2612 WARN_ON(qc->n_elem == 0);
2615 ata_for_each_sg(sg, qc) {
2619 /* determine if physical DMA addr spans 64K boundary.
2620 * Note h/w doesn't support 64-bit, so we unconditionally
2621 * truncate dma_addr_t to u32.
2623 addr = (u32) sg_dma_address(sg);
2624 sg_len = sg_dma_len(sg);
2627 offset = addr & 0xffff;
2629 if ((offset + sg_len) > 0x10000)
2630 len = 0x10000 - offset;
2632 ap->prd[idx].addr = cpu_to_le32(addr);
2633 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2634 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2643 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2646 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2647 * @qc: Metadata associated with taskfile to check
2649 * Allow low-level driver to filter ATA PACKET commands, returning
2650 * a status indicating whether or not it is OK to use DMA for the
2651 * supplied PACKET command.
2654 * spin_lock_irqsave(host_set lock)
2656 * RETURNS: 0 when ATAPI DMA can be used
2659 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2661 struct ata_port *ap = qc->ap;
2662 int rc = 0; /* Assume ATAPI DMA is OK by default */
2664 if (ap->ops->check_atapi_dma)
2665 rc = ap->ops->check_atapi_dma(qc);
2670 * ata_qc_prep - Prepare taskfile for submission
2671 * @qc: Metadata associated with taskfile to be prepared
2673 * Prepare ATA taskfile for submission.
2676 * spin_lock_irqsave(host_set lock)
2678 void ata_qc_prep(struct ata_queued_cmd *qc)
2680 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2687 * ata_sg_init_one - Associate command with memory buffer
2688 * @qc: Command to be associated
2689 * @buf: Memory buffer
2690 * @buflen: Length of memory buffer, in bytes.
2692 * Initialize the data-related elements of queued_cmd @qc
2693 * to point to a single memory buffer, @buf of byte length @buflen.
2696 * spin_lock_irqsave(host_set lock)
2699 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2701 struct scatterlist *sg;
2703 qc->flags |= ATA_QCFLAG_SINGLE;
2705 memset(&qc->sgent, 0, sizeof(qc->sgent));
2706 qc->__sg = &qc->sgent;
2708 qc->orig_n_elem = 1;
2712 sg_init_one(sg, buf, buflen);
2716 * ata_sg_init - Associate command with scatter-gather table.
2717 * @qc: Command to be associated
2718 * @sg: Scatter-gather table.
2719 * @n_elem: Number of elements in s/g table.
2721 * Initialize the data-related elements of queued_cmd @qc
2722 * to point to a scatter-gather table @sg, containing @n_elem
2726 * spin_lock_irqsave(host_set lock)
2729 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2730 unsigned int n_elem)
2732 qc->flags |= ATA_QCFLAG_SG;
2734 qc->n_elem = n_elem;
2735 qc->orig_n_elem = n_elem;
2739 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2740 * @qc: Command with memory buffer to be mapped.
2742 * DMA-map the memory buffer associated with queued_cmd @qc.
2745 * spin_lock_irqsave(host_set lock)
2748 * Zero on success, negative on error.
2751 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2753 struct ata_port *ap = qc->ap;
2754 int dir = qc->dma_dir;
2755 struct scatterlist *sg = qc->__sg;
2756 dma_addr_t dma_address;
2758 /* we must lengthen transfers to end on a 32-bit boundary */
2759 qc->pad_len = sg->length & 3;
2761 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2762 struct scatterlist *psg = &qc->pad_sgent;
2764 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
2766 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2768 if (qc->tf.flags & ATA_TFLAG_WRITE)
2769 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2772 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2773 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2775 sg->length -= qc->pad_len;
2777 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2778 sg->length, qc->pad_len);
2782 sg_dma_address(sg) = 0;
2786 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2788 if (dma_mapping_error(dma_address)) {
2790 sg->length += qc->pad_len;
2794 sg_dma_address(sg) = dma_address;
2796 sg_dma_len(sg) = sg->length;
2798 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2799 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2805 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2806 * @qc: Command with scatter-gather table to be mapped.
2808 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2811 * spin_lock_irqsave(host_set lock)
2814 * Zero on success, negative on error.
2818 static int ata_sg_setup(struct ata_queued_cmd *qc)
2820 struct ata_port *ap = qc->ap;
2821 struct scatterlist *sg = qc->__sg;
2822 struct scatterlist *lsg = &sg[qc->n_elem - 1];
2823 int n_elem, pre_n_elem, dir, trim_sg = 0;
2825 VPRINTK("ENTER, ata%u\n", ap->id);
2826 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
2828 /* we must lengthen transfers to end on a 32-bit boundary */
2829 qc->pad_len = lsg->length & 3;
2831 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2832 struct scatterlist *psg = &qc->pad_sgent;
2833 unsigned int offset;
2835 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
2837 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2840 * psg->page/offset are used to copy to-be-written
2841 * data in this function or read data in ata_sg_clean.
2843 offset = lsg->offset + lsg->length - qc->pad_len;
2844 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2845 psg->offset = offset_in_page(offset);
2847 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2848 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2849 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
2850 kunmap_atomic(addr, KM_IRQ0);
2853 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2854 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2856 lsg->length -= qc->pad_len;
2857 if (lsg->length == 0)
2860 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2861 qc->n_elem - 1, lsg->length, qc->pad_len);
2864 pre_n_elem = qc->n_elem;
2865 if (trim_sg && pre_n_elem)
2874 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
2876 /* restore last sg */
2877 lsg->length += qc->pad_len;
2881 DPRINTK("%d sg elements mapped\n", n_elem);
2884 qc->n_elem = n_elem;
2890 * ata_poll_qc_complete - turn irq back on and finish qc
2891 * @qc: Command to complete
2892 * @err_mask: ATA status register content
2895 * None. (grabs host lock)
2898 void ata_poll_qc_complete(struct ata_queued_cmd *qc)
2900 struct ata_port *ap = qc->ap;
2901 unsigned long flags;
2903 spin_lock_irqsave(&ap->host_set->lock, flags);
2905 ata_qc_complete(qc);
2906 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2910 * ata_pio_poll - poll using PIO, depending on current state
2911 * @ap: the target ata_port
2914 * None. (executing in kernel thread context)
2917 * timeout value to use
2920 static unsigned long ata_pio_poll(struct ata_port *ap)
2922 struct ata_queued_cmd *qc;
2924 unsigned int poll_state = HSM_ST_UNKNOWN;
2925 unsigned int reg_state = HSM_ST_UNKNOWN;
2927 qc = ata_qc_from_tag(ap, ap->active_tag);
2928 WARN_ON(qc == NULL);
2930 switch (ap->hsm_task_state) {
2933 poll_state = HSM_ST_POLL;
2937 case HSM_ST_LAST_POLL:
2938 poll_state = HSM_ST_LAST_POLL;
2939 reg_state = HSM_ST_LAST;
2946 status = ata_chk_status(ap);
2947 if (status & ATA_BUSY) {
2948 if (time_after(jiffies, ap->pio_task_timeout)) {
2949 qc->err_mask |= AC_ERR_TIMEOUT;
2950 ap->hsm_task_state = HSM_ST_TMOUT;
2953 ap->hsm_task_state = poll_state;
2954 return ATA_SHORT_PAUSE;
2957 ap->hsm_task_state = reg_state;
2962 * ata_pio_complete - check if drive is busy or idle
2963 * @ap: the target ata_port
2966 * None. (executing in kernel thread context)
2969 * Zero if qc completed.
2970 * Non-zero if has next.
2973 static int ata_pio_complete (struct ata_port *ap)
2975 struct ata_queued_cmd *qc;
2979 * This is purely heuristic. This is a fast path. Sometimes when
2980 * we enter, BSY will be cleared in a chk-status or two. If not,
2981 * the drive is probably seeking or something. Snooze for a couple
2982 * msecs, then chk-status again. If still busy, fall back to
2983 * HSM_ST_LAST_POLL state.
2985 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
2986 if (drv_stat & ATA_BUSY) {
2988 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
2989 if (drv_stat & ATA_BUSY) {
2990 ap->hsm_task_state = HSM_ST_LAST_POLL;
2991 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2996 qc = ata_qc_from_tag(ap, ap->active_tag);
2997 WARN_ON(qc == NULL);
2999 drv_stat = ata_wait_idle(ap);
3000 if (!ata_ok(drv_stat)) {
3001 qc->err_mask |= __ac_err_mask(drv_stat);
3002 ap->hsm_task_state = HSM_ST_ERR;
3006 ap->hsm_task_state = HSM_ST_IDLE;
3008 WARN_ON(qc->err_mask);
3009 ata_poll_qc_complete(qc);
3011 /* another command may start at this point */
3018 * swap_buf_le16 - swap halves of 16-bit words in place
3019 * @buf: Buffer to swap
3020 * @buf_words: Number of 16-bit words in buffer.
3022 * Swap halves of 16-bit words if needed to convert from
3023 * little-endian byte order to native cpu byte order, or
3027 * Inherited from caller.
3029 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3034 for (i = 0; i < buf_words; i++)
3035 buf[i] = le16_to_cpu(buf[i]);
3036 #endif /* __BIG_ENDIAN */
3040 * ata_mmio_data_xfer - Transfer data by MMIO
3041 * @ap: port to read/write
3043 * @buflen: buffer length
3044 * @write_data: read/write
3046 * Transfer data from/to the device data register by MMIO.
3049 * Inherited from caller.
3052 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3053 unsigned int buflen, int write_data)
3056 unsigned int words = buflen >> 1;
3057 u16 *buf16 = (u16 *) buf;
3058 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3060 /* Transfer multiple of 2 bytes */
3062 for (i = 0; i < words; i++)
3063 writew(le16_to_cpu(buf16[i]), mmio);
3065 for (i = 0; i < words; i++)
3066 buf16[i] = cpu_to_le16(readw(mmio));
3069 /* Transfer trailing 1 byte, if any. */
3070 if (unlikely(buflen & 0x01)) {
3071 u16 align_buf[1] = { 0 };
3072 unsigned char *trailing_buf = buf + buflen - 1;
3075 memcpy(align_buf, trailing_buf, 1);
3076 writew(le16_to_cpu(align_buf[0]), mmio);
3078 align_buf[0] = cpu_to_le16(readw(mmio));
3079 memcpy(trailing_buf, align_buf, 1);
3085 * ata_pio_data_xfer - Transfer data by PIO
3086 * @ap: port to read/write
3088 * @buflen: buffer length
3089 * @write_data: read/write
3091 * Transfer data from/to the device data register by PIO.
3094 * Inherited from caller.
3097 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3098 unsigned int buflen, int write_data)
3100 unsigned int words = buflen >> 1;
3102 /* Transfer multiple of 2 bytes */
3104 outsw(ap->ioaddr.data_addr, buf, words);
3106 insw(ap->ioaddr.data_addr, buf, words);
3108 /* Transfer trailing 1 byte, if any. */
3109 if (unlikely(buflen & 0x01)) {
3110 u16 align_buf[1] = { 0 };
3111 unsigned char *trailing_buf = buf + buflen - 1;
3114 memcpy(align_buf, trailing_buf, 1);
3115 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3117 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3118 memcpy(trailing_buf, align_buf, 1);
3124 * ata_data_xfer - Transfer data from/to the data register.
3125 * @ap: port to read/write
3127 * @buflen: buffer length
3128 * @do_write: read/write
3130 * Transfer data from/to the device data register.
3133 * Inherited from caller.
3136 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3137 unsigned int buflen, int do_write)
3139 /* Make the crap hardware pay the costs not the good stuff */
3140 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3141 unsigned long flags;
3142 local_irq_save(flags);
3143 if (ap->flags & ATA_FLAG_MMIO)
3144 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3146 ata_pio_data_xfer(ap, buf, buflen, do_write);
3147 local_irq_restore(flags);
3149 if (ap->flags & ATA_FLAG_MMIO)
3150 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3152 ata_pio_data_xfer(ap, buf, buflen, do_write);
3157 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3158 * @qc: Command on going
3160 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3163 * Inherited from caller.
3166 static void ata_pio_sector(struct ata_queued_cmd *qc)
3168 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3169 struct scatterlist *sg = qc->__sg;
3170 struct ata_port *ap = qc->ap;
3172 unsigned int offset;
3175 if (qc->cursect == (qc->nsect - 1))
3176 ap->hsm_task_state = HSM_ST_LAST;
3178 page = sg[qc->cursg].page;
3179 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3181 /* get the current page and offset */
3182 page = nth_page(page, (offset >> PAGE_SHIFT));
3183 offset %= PAGE_SIZE;
3185 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3187 if (PageHighMem(page)) {
3188 unsigned long flags;
3190 local_irq_save(flags);
3191 buf = kmap_atomic(page, KM_IRQ0);
3193 /* do the actual data transfer */
3194 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
3196 kunmap_atomic(buf, KM_IRQ0);
3197 local_irq_restore(flags);
3199 buf = page_address(page);
3200 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
3206 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3213 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3214 * @qc: Command on going
3216 * Transfer one or many ATA_SECT_SIZE of data from/to the
3217 * ATA device for the DRQ request.
3220 * Inherited from caller.
3223 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3225 if (is_multi_taskfile(&qc->tf)) {
3226 /* READ/WRITE MULTIPLE */
3229 assert(qc->dev->multi_count);
3231 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3239 * atapi_send_cdb - Write CDB bytes to hardware
3240 * @ap: Port to which ATAPI device is attached.
3241 * @qc: Taskfile currently active
3243 * When device has indicated its readiness to accept
3244 * a CDB, this function is called. Send the CDB.
3250 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3253 DPRINTK("send cdb\n");
3254 assert(ap->cdb_len >= 12);
3256 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3257 ata_altstatus(ap); /* flush */
3259 switch (qc->tf.protocol) {
3260 case ATA_PROT_ATAPI:
3261 ap->hsm_task_state = HSM_ST;
3263 case ATA_PROT_ATAPI_NODATA:
3264 ap->hsm_task_state = HSM_ST_LAST;
3266 case ATA_PROT_ATAPI_DMA:
3267 ap->hsm_task_state = HSM_ST_LAST;
3268 /* initiate bmdma */
3269 ap->ops->bmdma_start(qc);
3275 * ata_pio_first_block - Write first data block to hardware
3276 * @ap: Port to which ATA/ATAPI device is attached.
3278 * When device has indicated its readiness to accept
3279 * the data, this function sends out the CDB or
3280 * the first data block by PIO.
3282 * - If polling, ata_pio_task() handles the rest.
3283 * - Otherwise, interrupt handler takes over.
3286 * Kernel thread context (may sleep)
3289 * Zero if irq handler takes over
3290 * Non-zero if has next (polling).
3293 static int ata_pio_first_block(struct ata_port *ap)
3295 struct ata_queued_cmd *qc;
3297 unsigned long flags;
3300 qc = ata_qc_from_tag(ap, ap->active_tag);
3302 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3304 /* if polling, we will stay in the work queue after sending the data.
3305 * otherwise, interrupt handler takes over after sending the data.
3307 has_next = (qc->tf.flags & ATA_TFLAG_POLLING);
3309 /* sleep-wait for BSY to clear */
3310 DPRINTK("busy wait\n");
3311 if (ata_busy_sleep(ap, ATA_TMOUT_DATAOUT_QUICK, ATA_TMOUT_DATAOUT)) {
3312 qc->err_mask |= AC_ERR_TIMEOUT;
3313 ap->hsm_task_state = HSM_ST_TMOUT;
3317 /* make sure DRQ is set */
3318 status = ata_chk_status(ap);
3319 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3320 /* device status error */
3321 qc->err_mask |= AC_ERR_HSM;
3322 ap->hsm_task_state = HSM_ST_ERR;
3326 /* Send the CDB (atapi) or the first data block (ata pio out).
3327 * During the state transition, interrupt handler shouldn't
3328 * be invoked before the data transfer is complete and
3329 * hsm_task_state is changed. Hence, the following locking.
3331 spin_lock_irqsave(&ap->host_set->lock, flags);
3333 if (qc->tf.protocol == ATA_PROT_PIO) {
3334 /* PIO data out protocol.
3335 * send first data block.
3338 /* ata_pio_sectors() might change the state to HSM_ST_LAST.
3339 * so, the state is changed here before ata_pio_sectors().
3341 ap->hsm_task_state = HSM_ST;
3342 ata_pio_sectors(qc);
3343 ata_altstatus(ap); /* flush */
3346 atapi_send_cdb(ap, qc);
3348 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3350 /* if polling, ata_pio_task() handles the rest.
3351 * otherwise, interrupt handler takes over from here.
3356 return 1; /* has next */
3360 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3361 * @qc: Command on going
3362 * @bytes: number of bytes
3364 * Transfer Transfer data from/to the ATAPI device.
3367 * Inherited from caller.
3371 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3373 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3374 struct scatterlist *sg = qc->__sg;
3375 struct ata_port *ap = qc->ap;
3378 unsigned int offset, count;
3380 if (qc->curbytes + bytes >= qc->nbytes)
3381 ap->hsm_task_state = HSM_ST_LAST;
3384 if (unlikely(qc->cursg >= qc->n_elem)) {
3386 * The end of qc->sg is reached and the device expects
3387 * more data to transfer. In order not to overrun qc->sg
3388 * and fulfill length specified in the byte count register,
3389 * - for read case, discard trailing data from the device
3390 * - for write case, padding zero data to the device
3392 u16 pad_buf[1] = { 0 };
3393 unsigned int words = bytes >> 1;
3396 if (words) /* warning if bytes > 1 */
3397 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3400 for (i = 0; i < words; i++)
3401 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3403 ap->hsm_task_state = HSM_ST_LAST;
3407 sg = &qc->__sg[qc->cursg];
3410 offset = sg->offset + qc->cursg_ofs;
3412 /* get the current page and offset */
3413 page = nth_page(page, (offset >> PAGE_SHIFT));
3414 offset %= PAGE_SIZE;
3416 /* don't overrun current sg */
3417 count = min(sg->length - qc->cursg_ofs, bytes);
3419 /* don't cross page boundaries */
3420 count = min(count, (unsigned int)PAGE_SIZE - offset);
3422 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3424 if (PageHighMem(page)) {
3425 unsigned long flags;
3427 local_irq_save(flags);
3428 buf = kmap_atomic(page, KM_IRQ0);
3430 /* do the actual data transfer */
3431 ata_data_xfer(ap, buf + offset, count, do_write);
3433 kunmap_atomic(buf, KM_IRQ0);
3434 local_irq_restore(flags);
3436 buf = page_address(page);
3437 ata_data_xfer(ap, buf + offset, count, do_write);
3441 qc->curbytes += count;
3442 qc->cursg_ofs += count;
3444 if (qc->cursg_ofs == sg->length) {
3454 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3455 * @qc: Command on going
3457 * Transfer Transfer data from/to the ATAPI device.
3460 * Inherited from caller.
3463 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3465 struct ata_port *ap = qc->ap;
3466 struct ata_device *dev = qc->dev;
3467 unsigned int ireason, bc_lo, bc_hi, bytes;
3468 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3470 ap->ops->tf_read(ap, &qc->tf);
3471 ireason = qc->tf.nsect;
3472 bc_lo = qc->tf.lbam;
3473 bc_hi = qc->tf.lbah;
3474 bytes = (bc_hi << 8) | bc_lo;
3476 /* shall be cleared to zero, indicating xfer of data */
3477 if (ireason & (1 << 0))
3480 /* make sure transfer direction matches expected */
3481 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3482 if (do_write != i_write)
3485 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3487 __atapi_pio_bytes(qc, bytes);
3492 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3493 ap->id, dev->devno);
3494 qc->err_mask |= AC_ERR_HSM;
3495 ap->hsm_task_state = HSM_ST_ERR;
3499 * ata_pio_block - start PIO on a block
3500 * @ap: the target ata_port
3503 * None. (executing in kernel thread context)
3506 static void ata_pio_block(struct ata_port *ap)
3508 struct ata_queued_cmd *qc;
3512 * This is purely heuristic. This is a fast path.
3513 * Sometimes when we enter, BSY will be cleared in
3514 * a chk-status or two. If not, the drive is probably seeking
3515 * or something. Snooze for a couple msecs, then
3516 * chk-status again. If still busy, fall back to
3517 * HSM_ST_POLL state.
3519 status = ata_busy_wait(ap, ATA_BUSY, 5);
3520 if (status & ATA_BUSY) {
3522 status = ata_busy_wait(ap, ATA_BUSY, 10);
3523 if (status & ATA_BUSY) {
3524 ap->hsm_task_state = HSM_ST_POLL;
3525 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3530 qc = ata_qc_from_tag(ap, ap->active_tag);
3531 WARN_ON(qc == NULL);
3534 if (status & (ATA_ERR | ATA_DF)) {
3535 qc->err_mask |= AC_ERR_DEV;
3536 ap->hsm_task_state = HSM_ST_ERR;
3540 /* transfer data if any */
3541 if (is_atapi_taskfile(&qc->tf)) {
3542 /* DRQ=0 means no more data to transfer */
3543 if ((status & ATA_DRQ) == 0) {
3544 ap->hsm_task_state = HSM_ST_LAST;
3548 atapi_pio_bytes(qc);
3550 /* handle BSY=0, DRQ=0 as error */
3551 if ((status & ATA_DRQ) == 0) {
3552 qc->err_mask |= AC_ERR_HSM;
3553 ap->hsm_task_state = HSM_ST_ERR;
3557 ata_pio_sectors(qc);
3560 ata_altstatus(ap); /* flush */
3563 static void ata_pio_error(struct ata_port *ap)
3565 struct ata_queued_cmd *qc;
3567 qc = ata_qc_from_tag(ap, ap->active_tag);
3568 WARN_ON(qc == NULL);
3570 if (qc->tf.command != ATA_CMD_PACKET)
3571 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3573 /* make sure qc->err_mask is available to
3574 * know what's wrong and recover
3576 WARN_ON(qc->err_mask == 0);
3578 ap->hsm_task_state = HSM_ST_IDLE;
3580 ata_poll_qc_complete(qc);
3583 static void ata_pio_task(void *_data)
3585 struct ata_port *ap = _data;
3586 unsigned long timeout;
3593 switch (ap->hsm_task_state) {
3595 has_next = ata_pio_first_block(ap);
3603 has_next = ata_pio_complete(ap);
3607 case HSM_ST_LAST_POLL:
3608 timeout = ata_pio_poll(ap);
3622 ata_queue_delayed_pio_task(ap, timeout);
3628 * ata_qc_timeout - Handle timeout of queued command
3629 * @qc: Command that timed out
3631 * Some part of the kernel (currently, only the SCSI layer)
3632 * has noticed that the active command on port @ap has not
3633 * completed after a specified length of time. Handle this
3634 * condition by disabling DMA (if necessary) and completing
3635 * transactions, with error if necessary.
3637 * This also handles the case of the "lost interrupt", where
3638 * for some reason (possibly hardware bug, possibly driver bug)
3639 * an interrupt was not delivered to the driver, even though the
3640 * transaction completed successfully.
3643 * Inherited from SCSI layer (none, can sleep)
3646 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3648 struct ata_port *ap = qc->ap;
3649 struct ata_host_set *host_set = ap->host_set;
3650 u8 host_stat = 0, drv_stat;
3651 unsigned long flags;
3655 ata_flush_pio_tasks(ap);
3656 ap->hsm_task_state = HSM_ST_IDLE;
3658 spin_lock_irqsave(&host_set->lock, flags);
3660 switch (qc->tf.protocol) {
3663 case ATA_PROT_ATAPI_DMA:
3664 host_stat = ap->ops->bmdma_status(ap);
3666 /* before we do anything else, clear DMA-Start bit */
3667 ap->ops->bmdma_stop(qc);
3673 drv_stat = ata_chk_status(ap);
3675 /* ack bmdma irq events */
3676 ap->ops->irq_clear(ap);
3678 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3679 ap->id, qc->tf.command, drv_stat, host_stat);
3681 ap->hsm_task_state = HSM_ST_IDLE;
3683 /* complete taskfile transaction */
3684 qc->err_mask |= AC_ERR_TIMEOUT;
3688 spin_unlock_irqrestore(&host_set->lock, flags);
3690 ata_eh_qc_complete(qc);
3696 * ata_eng_timeout - Handle timeout of queued command
3697 * @ap: Port on which timed-out command is active
3699 * Some part of the kernel (currently, only the SCSI layer)
3700 * has noticed that the active command on port @ap has not
3701 * completed after a specified length of time. Handle this
3702 * condition by disabling DMA (if necessary) and completing
3703 * transactions, with error if necessary.
3705 * This also handles the case of the "lost interrupt", where
3706 * for some reason (possibly hardware bug, possibly driver bug)
3707 * an interrupt was not delivered to the driver, even though the
3708 * transaction completed successfully.
3711 * Inherited from SCSI layer (none, can sleep)
3714 void ata_eng_timeout(struct ata_port *ap)
3718 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
3724 * ata_qc_new - Request an available ATA command, for queueing
3725 * @ap: Port associated with device @dev
3726 * @dev: Device from whom we request an available command structure
3732 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3734 struct ata_queued_cmd *qc = NULL;
3737 for (i = 0; i < ATA_MAX_QUEUE; i++)
3738 if (!test_and_set_bit(i, &ap->qactive)) {
3739 qc = ata_qc_from_tag(ap, i);
3750 * ata_qc_new_init - Request an available ATA command, and initialize it
3751 * @ap: Port associated with device @dev
3752 * @dev: Device from whom we request an available command structure
3758 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3759 struct ata_device *dev)
3761 struct ata_queued_cmd *qc;
3763 qc = ata_qc_new(ap);
3776 * ata_qc_free - free unused ata_queued_cmd
3777 * @qc: Command to complete
3779 * Designed to free unused ata_queued_cmd object
3780 * in case something prevents using it.
3783 * spin_lock_irqsave(host_set lock)
3785 void ata_qc_free(struct ata_queued_cmd *qc)
3787 struct ata_port *ap = qc->ap;
3790 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3794 if (likely(ata_tag_valid(tag))) {
3795 if (tag == ap->active_tag)
3796 ap->active_tag = ATA_TAG_POISON;
3797 qc->tag = ATA_TAG_POISON;
3798 clear_bit(tag, &ap->qactive);
3802 void __ata_qc_complete(struct ata_queued_cmd *qc)
3804 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3805 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
3807 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3810 /* atapi: mark qc as inactive to prevent the interrupt handler
3811 * from completing the command twice later, before the error handler
3812 * is called. (when rc != 0 and atapi request sense is needed)
3814 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3816 /* call completion callback */
3817 qc->complete_fn(qc);
3820 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3822 struct ata_port *ap = qc->ap;
3824 switch (qc->tf.protocol) {
3826 case ATA_PROT_ATAPI_DMA:
3829 case ATA_PROT_ATAPI:
3831 case ATA_PROT_PIO_MULT:
3832 if (ap->flags & ATA_FLAG_PIO_DMA)
3845 * ata_qc_issue - issue taskfile to device
3846 * @qc: command to issue to device
3848 * Prepare an ATA command to submission to device.
3849 * This includes mapping the data into a DMA-able
3850 * area, filling in the S/G table, and finally
3851 * writing the taskfile to hardware, starting the command.
3854 * spin_lock_irqsave(host_set lock)
3857 * Zero on success, AC_ERR_* mask on failure
3860 unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
3862 struct ata_port *ap = qc->ap;
3864 if (ata_should_dma_map(qc)) {
3865 if (qc->flags & ATA_QCFLAG_SG) {
3866 if (ata_sg_setup(qc))
3868 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3869 if (ata_sg_setup_one(qc))
3873 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3876 ap->ops->qc_prep(qc);
3878 qc->ap->active_tag = qc->tag;
3879 qc->flags |= ATA_QCFLAG_ACTIVE;
3881 return ap->ops->qc_issue(qc);
3884 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3885 return AC_ERR_SYSTEM;
3890 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3891 * @qc: command to issue to device
3893 * Using various libata functions and hooks, this function
3894 * starts an ATA command. ATA commands are grouped into
3895 * classes called "protocols", and issuing each type of protocol
3896 * is slightly different.
3898 * May be used as the qc_issue() entry in ata_port_operations.
3901 * spin_lock_irqsave(host_set lock)
3904 * Zero on success, AC_ERR_* mask on failure
3907 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3909 struct ata_port *ap = qc->ap;
3911 /* Use polling pio if the LLD doesn't handle
3912 * interrupt driven pio and atapi CDB interrupt.
3914 if (ap->flags & ATA_FLAG_PIO_POLLING) {
3915 switch (qc->tf.protocol) {
3917 case ATA_PROT_ATAPI:
3918 case ATA_PROT_ATAPI_NODATA:
3919 qc->tf.flags |= ATA_TFLAG_POLLING;
3921 case ATA_PROT_ATAPI_DMA:
3922 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
3930 /* select the device */
3931 ata_dev_select(ap, qc->dev->devno, 1, 0);
3933 /* start the command */
3934 switch (qc->tf.protocol) {
3935 case ATA_PROT_NODATA:
3936 if (qc->tf.flags & ATA_TFLAG_POLLING)
3937 ata_qc_set_polling(qc);
3939 ata_tf_to_host(ap, &qc->tf);
3940 ap->hsm_task_state = HSM_ST_LAST;
3942 if (qc->tf.flags & ATA_TFLAG_POLLING)
3943 ata_queue_pio_task(ap);
3948 assert(!(qc->tf.flags & ATA_TFLAG_POLLING));
3950 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3951 ap->ops->bmdma_setup(qc); /* set up bmdma */
3952 ap->ops->bmdma_start(qc); /* initiate bmdma */
3953 ap->hsm_task_state = HSM_ST_LAST;
3957 if (qc->tf.flags & ATA_TFLAG_POLLING)
3958 ata_qc_set_polling(qc);
3960 ata_tf_to_host(ap, &qc->tf);
3962 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3963 /* PIO data out protocol */
3964 ap->hsm_task_state = HSM_ST_FIRST;
3965 ata_queue_pio_task(ap);
3967 /* always send first data block using
3968 * the ata_pio_task() codepath.
3971 /* PIO data in protocol */
3972 ap->hsm_task_state = HSM_ST;
3974 if (qc->tf.flags & ATA_TFLAG_POLLING)
3975 ata_queue_pio_task(ap);
3977 /* if polling, ata_pio_task() handles the rest.
3978 * otherwise, interrupt handler takes over from here.
3984 case ATA_PROT_ATAPI:
3985 case ATA_PROT_ATAPI_NODATA:
3986 if (qc->tf.flags & ATA_TFLAG_POLLING)
3987 ata_qc_set_polling(qc);
3989 ata_tf_to_host(ap, &qc->tf);
3991 ap->hsm_task_state = HSM_ST_FIRST;
3993 /* send cdb by polling if no cdb interrupt */
3994 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
3995 (qc->tf.flags & ATA_TFLAG_POLLING))
3996 ata_queue_pio_task(ap);
3999 case ATA_PROT_ATAPI_DMA:
4000 assert(!(qc->tf.flags & ATA_TFLAG_POLLING));
4002 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4003 ap->ops->bmdma_setup(qc); /* set up bmdma */
4004 ap->hsm_task_state = HSM_ST_FIRST;
4006 /* send cdb by polling if no cdb interrupt */
4007 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4008 ata_queue_pio_task(ap);
4013 return AC_ERR_SYSTEM;
4020 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
4021 * @qc: Info associated with this ATA transaction.
4024 * spin_lock_irqsave(host_set lock)
4027 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
4029 struct ata_port *ap = qc->ap;
4030 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4032 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4034 /* load PRD table addr. */
4035 mb(); /* make sure PRD table writes are visible to controller */
4036 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
4038 /* specify data direction, triple-check start bit is clear */
4039 dmactl = readb(mmio + ATA_DMA_CMD);
4040 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4042 dmactl |= ATA_DMA_WR;
4043 writeb(dmactl, mmio + ATA_DMA_CMD);
4045 /* issue r/w command */
4046 ap->ops->exec_command(ap, &qc->tf);
4050 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
4051 * @qc: Info associated with this ATA transaction.
4054 * spin_lock_irqsave(host_set lock)
4057 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
4059 struct ata_port *ap = qc->ap;
4060 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4063 /* start host DMA transaction */
4064 dmactl = readb(mmio + ATA_DMA_CMD);
4065 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
4067 /* Strictly, one may wish to issue a readb() here, to
4068 * flush the mmio write. However, control also passes
4069 * to the hardware at this point, and it will interrupt
4070 * us when we are to resume control. So, in effect,
4071 * we don't care when the mmio write flushes.
4072 * Further, a read of the DMA status register _immediately_
4073 * following the write may not be what certain flaky hardware
4074 * is expected, so I think it is best to not add a readb()
4075 * without first all the MMIO ATA cards/mobos.
4076 * Or maybe I'm just being paranoid.
4081 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
4082 * @qc: Info associated with this ATA transaction.
4085 * spin_lock_irqsave(host_set lock)
4088 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
4090 struct ata_port *ap = qc->ap;
4091 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4094 /* load PRD table addr. */
4095 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
4097 /* specify data direction, triple-check start bit is clear */
4098 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4099 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4101 dmactl |= ATA_DMA_WR;
4102 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4104 /* issue r/w command */
4105 ap->ops->exec_command(ap, &qc->tf);
4109 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
4110 * @qc: Info associated with this ATA transaction.
4113 * spin_lock_irqsave(host_set lock)
4116 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
4118 struct ata_port *ap = qc->ap;
4121 /* start host DMA transaction */
4122 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4123 outb(dmactl | ATA_DMA_START,
4124 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4129 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
4130 * @qc: Info associated with this ATA transaction.
4132 * Writes the ATA_DMA_START flag to the DMA command register.
4134 * May be used as the bmdma_start() entry in ata_port_operations.
4137 * spin_lock_irqsave(host_set lock)
4139 void ata_bmdma_start(struct ata_queued_cmd *qc)
4141 if (qc->ap->flags & ATA_FLAG_MMIO)
4142 ata_bmdma_start_mmio(qc);
4144 ata_bmdma_start_pio(qc);
4149 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
4150 * @qc: Info associated with this ATA transaction.
4152 * Writes address of PRD table to device's PRD Table Address
4153 * register, sets the DMA control register, and calls
4154 * ops->exec_command() to start the transfer.
4156 * May be used as the bmdma_setup() entry in ata_port_operations.
4159 * spin_lock_irqsave(host_set lock)
4161 void ata_bmdma_setup(struct ata_queued_cmd *qc)
4163 if (qc->ap->flags & ATA_FLAG_MMIO)
4164 ata_bmdma_setup_mmio(qc);
4166 ata_bmdma_setup_pio(qc);
4171 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
4172 * @ap: Port associated with this ATA transaction.
4174 * Clear interrupt and error flags in DMA status register.
4176 * May be used as the irq_clear() entry in ata_port_operations.
4179 * spin_lock_irqsave(host_set lock)
4182 void ata_bmdma_irq_clear(struct ata_port *ap)
4184 if (ap->flags & ATA_FLAG_MMIO) {
4185 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
4186 writeb(readb(mmio), mmio);
4188 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
4189 outb(inb(addr), addr);
4196 * ata_bmdma_status - Read PCI IDE BMDMA status
4197 * @ap: Port associated with this ATA transaction.
4199 * Read and return BMDMA status register.
4201 * May be used as the bmdma_status() entry in ata_port_operations.
4204 * spin_lock_irqsave(host_set lock)
4207 u8 ata_bmdma_status(struct ata_port *ap)
4210 if (ap->flags & ATA_FLAG_MMIO) {
4211 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4212 host_stat = readb(mmio + ATA_DMA_STATUS);
4214 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
4220 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
4221 * @qc: Command we are ending DMA for
4223 * Clears the ATA_DMA_START flag in the dma control register
4225 * May be used as the bmdma_stop() entry in ata_port_operations.
4228 * spin_lock_irqsave(host_set lock)
4231 void ata_bmdma_stop(struct ata_queued_cmd *qc)
4233 struct ata_port *ap = qc->ap;
4234 if (ap->flags & ATA_FLAG_MMIO) {
4235 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4237 /* clear start/stop bit */
4238 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
4239 mmio + ATA_DMA_CMD);
4241 /* clear start/stop bit */
4242 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4243 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4246 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4247 ata_altstatus(ap); /* dummy read */
4251 * ata_host_intr - Handle host interrupt for given (port, task)
4252 * @ap: Port on which interrupt arrived (possibly...)
4253 * @qc: Taskfile currently active in engine
4255 * Handle host interrupt for given queued command. Currently,
4256 * only DMA interrupts are handled. All other commands are
4257 * handled via polling with interrupts disabled (nIEN bit).
4260 * spin_lock_irqsave(host_set lock)
4263 * One if interrupt was handled, zero if not (shared irq).
4266 inline unsigned int ata_host_intr (struct ata_port *ap,
4267 struct ata_queued_cmd *qc)
4269 u8 status, host_stat = 0;
4271 VPRINTK("ata%u: protocol %d task_state %d\n",
4272 ap->id, qc->tf.protocol, ap->hsm_task_state);
4274 /* Check whether we are expecting interrupt in this state */
4275 switch (ap->hsm_task_state) {
4277 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4278 * The flag was turned on only for atapi devices.
4279 * No need to check is_atapi_taskfile(&qc->tf) again.
4281 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4285 if (qc->tf.protocol == ATA_PROT_DMA ||
4286 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4287 /* check status of DMA engine */
4288 host_stat = ap->ops->bmdma_status(ap);
4289 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4291 /* if it's not our irq... */
4292 if (!(host_stat & ATA_DMA_INTR))
4295 /* before we do anything else, clear DMA-Start bit */
4296 ap->ops->bmdma_stop(qc);
4298 if (unlikely(host_stat & ATA_DMA_ERR)) {
4299 /* error when transfering data to/from memory */
4300 qc->err_mask |= AC_ERR_HOST_BUS;
4301 ap->hsm_task_state = HSM_ST_ERR;
4311 /* check altstatus */
4312 status = ata_altstatus(ap);
4313 if (status & ATA_BUSY)
4316 /* check main status, clearing INTRQ */
4317 status = ata_chk_status(ap);
4318 if (unlikely(status & ATA_BUSY))
4321 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4322 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4324 /* ack bmdma irq events */
4325 ap->ops->irq_clear(ap);
4328 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4329 qc->err_mask |= AC_ERR_DEV;
4330 ap->hsm_task_state = HSM_ST_ERR;
4334 switch (ap->hsm_task_state) {
4336 /* Some pre-ATAPI-4 devices assert INTRQ
4337 * at this state when ready to receive CDB.
4340 /* check device status */
4341 if (unlikely((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)) {
4342 /* Wrong status. Let EH handle this */
4343 qc->err_mask |= AC_ERR_HSM;
4344 ap->hsm_task_state = HSM_ST_ERR;
4348 atapi_send_cdb(ap, qc);
4353 /* complete command or read/write the data register */
4354 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4355 /* ATAPI PIO protocol */
4356 if ((status & ATA_DRQ) == 0) {
4357 /* no more data to transfer */
4358 ap->hsm_task_state = HSM_ST_LAST;
4362 atapi_pio_bytes(qc);
4364 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4365 /* bad ireason reported by device */
4369 /* ATA PIO protocol */
4370 if (unlikely((status & ATA_DRQ) == 0)) {
4371 /* handle BSY=0, DRQ=0 as error */
4372 qc->err_mask |= AC_ERR_HSM;
4373 ap->hsm_task_state = HSM_ST_ERR;
4377 ata_pio_sectors(qc);
4379 if (ap->hsm_task_state == HSM_ST_LAST &&
4380 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4383 status = ata_chk_status(ap);
4388 ata_altstatus(ap); /* flush */
4392 if (unlikely(status & ATA_DRQ)) {
4393 /* handle DRQ=1 as error */
4394 qc->err_mask |= AC_ERR_HSM;
4395 ap->hsm_task_state = HSM_ST_ERR;
4399 /* no more data to transfer */
4400 DPRINTK("ata%u: command complete, drv_stat 0x%x\n",
4403 ap->hsm_task_state = HSM_ST_IDLE;
4405 /* complete taskfile transaction */
4406 qc->err_mask |= ac_err_mask(status);
4407 ata_qc_complete(qc);
4411 if (qc->tf.command != ATA_CMD_PACKET)
4412 printk(KERN_ERR "ata%u: command error, drv_stat 0x%x host_stat 0x%x\n",
4413 ap->id, status, host_stat);
4415 /* make sure qc->err_mask is available to
4416 * know what's wrong and recover
4418 assert(qc->err_mask);
4420 ap->hsm_task_state = HSM_ST_IDLE;
4421 ata_qc_complete(qc);
4427 return 1; /* irq handled */
4430 ap->stats.idle_irq++;
4433 if ((ap->stats.idle_irq % 1000) == 0) {
4435 ata_irq_ack(ap, 0); /* debug trap */
4436 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4439 return 0; /* irq not handled */
4443 * ata_interrupt - Default ATA host interrupt handler
4444 * @irq: irq line (unused)
4445 * @dev_instance: pointer to our ata_host_set information structure
4448 * Default interrupt handler for PCI IDE devices. Calls
4449 * ata_host_intr() for each port that is not disabled.
4452 * Obtains host_set lock during operation.
4455 * IRQ_NONE or IRQ_HANDLED.
4458 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4460 struct ata_host_set *host_set = dev_instance;
4462 unsigned int handled = 0;
4463 unsigned long flags;
4465 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4466 spin_lock_irqsave(&host_set->lock, flags);
4468 for (i = 0; i < host_set->n_ports; i++) {
4469 struct ata_port *ap;
4471 ap = host_set->ports[i];
4473 !(ap->flags & ATA_FLAG_PORT_DISABLED)) {
4474 struct ata_queued_cmd *qc;
4476 qc = ata_qc_from_tag(ap, ap->active_tag);
4477 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
4478 (qc->flags & ATA_QCFLAG_ACTIVE))
4479 handled |= ata_host_intr(ap, qc);
4483 spin_unlock_irqrestore(&host_set->lock, flags);
4485 return IRQ_RETVAL(handled);
4489 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4490 * without filling any other registers
4492 static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4495 struct ata_taskfile tf;
4498 ata_tf_init(ap, &tf, dev->devno);
4501 tf.flags |= ATA_TFLAG_DEVICE;
4502 tf.protocol = ATA_PROT_NODATA;
4504 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4506 printk(KERN_ERR "%s: ata command failed: %d\n",
4512 static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4516 if (!ata_try_flush_cache(dev))
4519 if (ata_id_has_flush_ext(dev->id))
4520 cmd = ATA_CMD_FLUSH_EXT;
4522 cmd = ATA_CMD_FLUSH;
4524 return ata_do_simple_cmd(ap, dev, cmd);
4527 static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4529 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4532 static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4534 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4538 * ata_device_resume - wakeup a previously suspended devices
4539 * @ap: port the device is connected to
4540 * @dev: the device to resume
4542 * Kick the drive back into action, by sending it an idle immediate
4543 * command and making sure its transfer mode matches between drive
4547 int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4549 if (ap->flags & ATA_FLAG_SUSPENDED) {
4550 ap->flags &= ~ATA_FLAG_SUSPENDED;
4553 if (!ata_dev_present(dev))
4555 if (dev->class == ATA_DEV_ATA)
4556 ata_start_drive(ap, dev);
4562 * ata_device_suspend - prepare a device for suspend
4563 * @ap: port the device is connected to
4564 * @dev: the device to suspend
4566 * Flush the cache on the drive, if appropriate, then issue a
4567 * standbynow command.
4569 int ata_device_suspend(struct ata_port *ap, struct ata_device *dev)
4571 if (!ata_dev_present(dev))
4573 if (dev->class == ATA_DEV_ATA)
4574 ata_flush_cache(ap, dev);
4576 ata_standby_drive(ap, dev);
4577 ap->flags |= ATA_FLAG_SUSPENDED;
4582 * ata_port_start - Set port up for dma.
4583 * @ap: Port to initialize
4585 * Called just after data structures for each port are
4586 * initialized. Allocates space for PRD table.
4588 * May be used as the port_start() entry in ata_port_operations.
4591 * Inherited from caller.
4594 int ata_port_start (struct ata_port *ap)
4596 struct device *dev = ap->host_set->dev;
4599 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4603 rc = ata_pad_alloc(ap, dev);
4605 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4609 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4616 * ata_port_stop - Undo ata_port_start()
4617 * @ap: Port to shut down
4619 * Frees the PRD table.
4621 * May be used as the port_stop() entry in ata_port_operations.
4624 * Inherited from caller.
4627 void ata_port_stop (struct ata_port *ap)
4629 struct device *dev = ap->host_set->dev;
4631 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4632 ata_pad_free(ap, dev);
4635 void ata_host_stop (struct ata_host_set *host_set)
4637 if (host_set->mmio_base)
4638 iounmap(host_set->mmio_base);
4643 * ata_host_remove - Unregister SCSI host structure with upper layers
4644 * @ap: Port to unregister
4645 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4648 * Inherited from caller.
4651 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4653 struct Scsi_Host *sh = ap->host;
4658 scsi_remove_host(sh);
4660 ap->ops->port_stop(ap);
4664 * ata_host_init - Initialize an ata_port structure
4665 * @ap: Structure to initialize
4666 * @host: associated SCSI mid-layer structure
4667 * @host_set: Collection of hosts to which @ap belongs
4668 * @ent: Probe information provided by low-level driver
4669 * @port_no: Port number associated with this ata_port
4671 * Initialize a new ata_port structure, and its associated
4675 * Inherited from caller.
4678 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4679 struct ata_host_set *host_set,
4680 const struct ata_probe_ent *ent, unsigned int port_no)
4686 host->max_channel = 1;
4687 host->unique_id = ata_unique_id++;
4688 host->max_cmd_len = 12;
4690 ap->flags = ATA_FLAG_PORT_DISABLED;
4691 ap->id = host->unique_id;
4693 ap->ctl = ATA_DEVCTL_OBS;
4694 ap->host_set = host_set;
4695 ap->port_no = port_no;
4697 ent->legacy_mode ? ent->hard_port_no : port_no;
4698 ap->pio_mask = ent->pio_mask;
4699 ap->mwdma_mask = ent->mwdma_mask;
4700 ap->udma_mask = ent->udma_mask;
4701 ap->flags |= ent->host_flags;
4702 ap->ops = ent->port_ops;
4703 ap->cbl = ATA_CBL_NONE;
4704 ap->active_tag = ATA_TAG_POISON;
4705 ap->last_ctl = 0xFF;
4707 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4708 INIT_LIST_HEAD(&ap->eh_done_q);
4710 for (i = 0; i < ATA_MAX_DEVICES; i++)
4711 ap->device[i].devno = i;
4714 ap->stats.unhandled_irq = 1;
4715 ap->stats.idle_irq = 1;
4718 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4722 * ata_host_add - Attach low-level ATA driver to system
4723 * @ent: Information provided by low-level driver
4724 * @host_set: Collections of ports to which we add
4725 * @port_no: Port number associated with this host
4727 * Attach low-level ATA driver to system.
4730 * PCI/etc. bus probe sem.
4733 * New ata_port on success, for NULL on error.
4736 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4737 struct ata_host_set *host_set,
4738 unsigned int port_no)
4740 struct Scsi_Host *host;
4741 struct ata_port *ap;
4745 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4749 ap = (struct ata_port *) &host->hostdata[0];
4751 ata_host_init(ap, host, host_set, ent, port_no);
4753 rc = ap->ops->port_start(ap);
4760 scsi_host_put(host);
4765 * ata_device_add - Register hardware device with ATA and SCSI layers
4766 * @ent: Probe information describing hardware device to be registered
4768 * This function processes the information provided in the probe
4769 * information struct @ent, allocates the necessary ATA and SCSI
4770 * host information structures, initializes them, and registers
4771 * everything with requisite kernel subsystems.
4773 * This function requests irqs, probes the ATA bus, and probes
4777 * PCI/etc. bus probe sem.
4780 * Number of ports registered. Zero on error (no ports registered).
4783 int ata_device_add(const struct ata_probe_ent *ent)
4785 unsigned int count = 0, i;
4786 struct device *dev = ent->dev;
4787 struct ata_host_set *host_set;
4790 /* alloc a container for our list of ATA ports (buses) */
4791 host_set = kzalloc(sizeof(struct ata_host_set) +
4792 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4795 spin_lock_init(&host_set->lock);
4797 host_set->dev = dev;
4798 host_set->n_ports = ent->n_ports;
4799 host_set->irq = ent->irq;
4800 host_set->mmio_base = ent->mmio_base;
4801 host_set->private_data = ent->private_data;
4802 host_set->ops = ent->port_ops;
4804 /* register each port bound to this device */
4805 for (i = 0; i < ent->n_ports; i++) {
4806 struct ata_port *ap;
4807 unsigned long xfer_mode_mask;
4809 ap = ata_host_add(ent, host_set, i);
4813 host_set->ports[i] = ap;
4814 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4815 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4816 (ap->pio_mask << ATA_SHIFT_PIO);
4818 /* print per-port info to dmesg */
4819 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4820 "bmdma 0x%lX irq %lu\n",
4822 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4823 ata_mode_string(xfer_mode_mask),
4824 ap->ioaddr.cmd_addr,
4825 ap->ioaddr.ctl_addr,
4826 ap->ioaddr.bmdma_addr,
4830 host_set->ops->irq_clear(ap);
4837 /* obtain irq, that is shared between channels */
4838 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4839 DRV_NAME, host_set))
4842 /* perform each probe synchronously */
4843 DPRINTK("probe begin\n");
4844 for (i = 0; i < count; i++) {
4845 struct ata_port *ap;
4848 ap = host_set->ports[i];
4850 DPRINTK("ata%u: bus probe begin\n", ap->id);
4851 rc = ata_bus_probe(ap);
4852 DPRINTK("ata%u: bus probe end\n", ap->id);
4855 /* FIXME: do something useful here?
4856 * Current libata behavior will
4857 * tear down everything when
4858 * the module is removed
4859 * or the h/w is unplugged.
4863 rc = scsi_add_host(ap->host, dev);
4865 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4867 /* FIXME: do something useful here */
4868 /* FIXME: handle unconditional calls to
4869 * scsi_scan_host and ata_host_remove, below,
4875 /* probes are done, now scan each port's disk(s) */
4876 DPRINTK("host probe begin\n");
4877 for (i = 0; i < count; i++) {
4878 struct ata_port *ap = host_set->ports[i];
4880 ata_scsi_scan_host(ap);
4883 dev_set_drvdata(dev, host_set);
4885 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4886 return ent->n_ports; /* success */
4889 for (i = 0; i < count; i++) {
4890 ata_host_remove(host_set->ports[i], 1);
4891 scsi_host_put(host_set->ports[i]->host);
4895 VPRINTK("EXIT, returning 0\n");
4900 * ata_host_set_remove - PCI layer callback for device removal
4901 * @host_set: ATA host set that was removed
4903 * Unregister all objects associated with this host set. Free those
4907 * Inherited from calling layer (may sleep).
4910 void ata_host_set_remove(struct ata_host_set *host_set)
4912 struct ata_port *ap;
4915 for (i = 0; i < host_set->n_ports; i++) {
4916 ap = host_set->ports[i];
4917 scsi_remove_host(ap->host);
4920 free_irq(host_set->irq, host_set);
4922 for (i = 0; i < host_set->n_ports; i++) {
4923 ap = host_set->ports[i];
4925 ata_scsi_release(ap->host);
4927 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4928 struct ata_ioports *ioaddr = &ap->ioaddr;
4930 if (ioaddr->cmd_addr == 0x1f0)
4931 release_region(0x1f0, 8);
4932 else if (ioaddr->cmd_addr == 0x170)
4933 release_region(0x170, 8);
4936 scsi_host_put(ap->host);
4939 if (host_set->ops->host_stop)
4940 host_set->ops->host_stop(host_set);
4946 * ata_scsi_release - SCSI layer callback hook for host unload
4947 * @host: libata host to be unloaded
4949 * Performs all duties necessary to shut down a libata port...
4950 * Kill port kthread, disable port, and release resources.
4953 * Inherited from SCSI layer.
4959 int ata_scsi_release(struct Scsi_Host *host)
4961 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4965 ap->ops->port_disable(ap);
4966 ata_host_remove(ap, 0);
4973 * ata_std_ports - initialize ioaddr with standard port offsets.
4974 * @ioaddr: IO address structure to be initialized
4976 * Utility function which initializes data_addr, error_addr,
4977 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4978 * device_addr, status_addr, and command_addr to standard offsets
4979 * relative to cmd_addr.
4981 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4984 void ata_std_ports(struct ata_ioports *ioaddr)
4986 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4987 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4988 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4989 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4990 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4991 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4992 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4993 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4994 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4995 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5001 void ata_pci_host_stop (struct ata_host_set *host_set)
5003 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5005 pci_iounmap(pdev, host_set->mmio_base);
5009 * ata_pci_remove_one - PCI layer callback for device removal
5010 * @pdev: PCI device that was removed
5012 * PCI layer indicates to libata via this hook that
5013 * hot-unplug or module unload event has occurred.
5014 * Handle this by unregistering all objects associated
5015 * with this PCI device. Free those objects. Then finally
5016 * release PCI resources and disable device.
5019 * Inherited from PCI layer (may sleep).
5022 void ata_pci_remove_one (struct pci_dev *pdev)
5024 struct device *dev = pci_dev_to_dev(pdev);
5025 struct ata_host_set *host_set = dev_get_drvdata(dev);
5027 ata_host_set_remove(host_set);
5028 pci_release_regions(pdev);
5029 pci_disable_device(pdev);
5030 dev_set_drvdata(dev, NULL);
5033 /* move to PCI subsystem */
5034 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5036 unsigned long tmp = 0;
5038 switch (bits->width) {
5041 pci_read_config_byte(pdev, bits->reg, &tmp8);
5047 pci_read_config_word(pdev, bits->reg, &tmp16);
5053 pci_read_config_dword(pdev, bits->reg, &tmp32);
5064 return (tmp == bits->val) ? 1 : 0;
5067 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5069 pci_save_state(pdev);
5070 pci_disable_device(pdev);
5071 pci_set_power_state(pdev, PCI_D3hot);
5075 int ata_pci_device_resume(struct pci_dev *pdev)
5077 pci_set_power_state(pdev, PCI_D0);
5078 pci_restore_state(pdev);
5079 pci_enable_device(pdev);
5080 pci_set_master(pdev);
5083 #endif /* CONFIG_PCI */
5086 static int __init ata_init(void)
5088 ata_wq = create_workqueue("ata");
5092 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5096 static void __exit ata_exit(void)
5098 destroy_workqueue(ata_wq);
5101 module_init(ata_init);
5102 module_exit(ata_exit);
5104 static unsigned long ratelimit_time;
5105 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5107 int ata_ratelimit(void)
5110 unsigned long flags;
5112 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5114 if (time_after(jiffies, ratelimit_time)) {
5116 ratelimit_time = jiffies + (HZ/5);
5120 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5126 * libata is essentially a library of internal helper functions for
5127 * low-level ATA host controller drivers. As such, the API/ABI is
5128 * likely to change as new drivers are added and updated.
5129 * Do not depend on ABI/API stability.
5132 EXPORT_SYMBOL_GPL(ata_std_bios_param);
5133 EXPORT_SYMBOL_GPL(ata_std_ports);
5134 EXPORT_SYMBOL_GPL(ata_device_add);
5135 EXPORT_SYMBOL_GPL(ata_host_set_remove);
5136 EXPORT_SYMBOL_GPL(ata_sg_init);
5137 EXPORT_SYMBOL_GPL(ata_sg_init_one);
5138 EXPORT_SYMBOL_GPL(__ata_qc_complete);
5139 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5140 EXPORT_SYMBOL_GPL(ata_eng_timeout);
5141 EXPORT_SYMBOL_GPL(ata_tf_load);
5142 EXPORT_SYMBOL_GPL(ata_tf_read);
5143 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5144 EXPORT_SYMBOL_GPL(ata_std_dev_select);
5145 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5146 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5147 EXPORT_SYMBOL_GPL(ata_check_status);
5148 EXPORT_SYMBOL_GPL(ata_altstatus);
5149 EXPORT_SYMBOL_GPL(ata_exec_command);
5150 EXPORT_SYMBOL_GPL(ata_port_start);
5151 EXPORT_SYMBOL_GPL(ata_port_stop);
5152 EXPORT_SYMBOL_GPL(ata_host_stop);
5153 EXPORT_SYMBOL_GPL(ata_interrupt);
5154 EXPORT_SYMBOL_GPL(ata_qc_prep);
5155 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5156 EXPORT_SYMBOL_GPL(ata_bmdma_start);
5157 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5158 EXPORT_SYMBOL_GPL(ata_bmdma_status);
5159 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5160 EXPORT_SYMBOL_GPL(ata_port_probe);
5161 EXPORT_SYMBOL_GPL(sata_phy_reset);
5162 EXPORT_SYMBOL_GPL(__sata_phy_reset);
5163 EXPORT_SYMBOL_GPL(ata_bus_reset);
5164 EXPORT_SYMBOL_GPL(ata_std_probeinit);
5165 EXPORT_SYMBOL_GPL(ata_std_softreset);
5166 EXPORT_SYMBOL_GPL(sata_std_hardreset);
5167 EXPORT_SYMBOL_GPL(ata_std_postreset);
5168 EXPORT_SYMBOL_GPL(ata_std_probe_reset);
5169 EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
5170 EXPORT_SYMBOL_GPL(ata_port_disable);
5171 EXPORT_SYMBOL_GPL(ata_ratelimit);
5172 EXPORT_SYMBOL_GPL(ata_busy_sleep);
5173 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5174 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5175 EXPORT_SYMBOL_GPL(ata_scsi_timed_out);
5176 EXPORT_SYMBOL_GPL(ata_scsi_error);
5177 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5178 EXPORT_SYMBOL_GPL(ata_scsi_release);
5179 EXPORT_SYMBOL_GPL(ata_host_intr);
5180 EXPORT_SYMBOL_GPL(ata_dev_classify);
5181 EXPORT_SYMBOL_GPL(ata_dev_id_string);
5182 EXPORT_SYMBOL_GPL(ata_dev_config);
5183 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5184 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5185 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
5187 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
5188 EXPORT_SYMBOL_GPL(ata_timing_compute);
5189 EXPORT_SYMBOL_GPL(ata_timing_merge);
5192 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5193 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5194 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5195 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5196 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5197 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5198 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
5199 #endif /* CONFIG_PCI */
5201 EXPORT_SYMBOL_GPL(ata_device_suspend);
5202 EXPORT_SYMBOL_GPL(ata_device_resume);
5203 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5204 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);