2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
55 #include "scsi_priv.h"
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
64 static unsigned int ata_busy_sleep (struct ata_port *ap,
65 unsigned long tmout_pat,
67 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
68 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
69 static void ata_set_mode(struct ata_port *ap);
70 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
71 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
72 static int fgb(u32 bitmap);
73 static int ata_choose_xfer_mode(const struct ata_port *ap,
75 unsigned int *xfer_shift_out);
76 static void __ata_qc_complete(struct ata_queued_cmd *qc);
78 static unsigned int ata_unique_id = 1;
79 static struct workqueue_struct *ata_wq;
81 int atapi_enabled = 0;
82 module_param(atapi_enabled, int, 0444);
83 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 MODULE_AUTHOR("Jeff Garzik");
86 MODULE_DESCRIPTION("Library module for ATA devices");
87 MODULE_LICENSE("GPL");
88 MODULE_VERSION(DRV_VERSION);
91 * ata_tf_load_pio - send taskfile registers to host controller
92 * @ap: Port to which output is sent
93 * @tf: ATA taskfile register set
95 * Outputs ATA taskfile to standard ATA host controller.
98 * Inherited from caller.
101 static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf)
103 struct ata_ioports *ioaddr = &ap->ioaddr;
104 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
106 if (tf->ctl != ap->last_ctl) {
107 outb(tf->ctl, ioaddr->ctl_addr);
108 ap->last_ctl = tf->ctl;
112 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
113 outb(tf->hob_feature, ioaddr->feature_addr);
114 outb(tf->hob_nsect, ioaddr->nsect_addr);
115 outb(tf->hob_lbal, ioaddr->lbal_addr);
116 outb(tf->hob_lbam, ioaddr->lbam_addr);
117 outb(tf->hob_lbah, ioaddr->lbah_addr);
118 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
127 outb(tf->feature, ioaddr->feature_addr);
128 outb(tf->nsect, ioaddr->nsect_addr);
129 outb(tf->lbal, ioaddr->lbal_addr);
130 outb(tf->lbam, ioaddr->lbam_addr);
131 outb(tf->lbah, ioaddr->lbah_addr);
132 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
140 if (tf->flags & ATA_TFLAG_DEVICE) {
141 outb(tf->device, ioaddr->device_addr);
142 VPRINTK("device 0x%X\n", tf->device);
149 * ata_tf_load_mmio - send taskfile registers to host controller
150 * @ap: Port to which output is sent
151 * @tf: ATA taskfile register set
153 * Outputs ATA taskfile to standard ATA host controller using MMIO.
156 * Inherited from caller.
159 static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
161 struct ata_ioports *ioaddr = &ap->ioaddr;
162 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
164 if (tf->ctl != ap->last_ctl) {
165 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
166 ap->last_ctl = tf->ctl;
170 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
171 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
172 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
173 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
174 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
175 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
176 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
185 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
186 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
187 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
188 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
189 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
190 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
198 if (tf->flags & ATA_TFLAG_DEVICE) {
199 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
200 VPRINTK("device 0x%X\n", tf->device);
208 * ata_tf_load - send taskfile registers to host controller
209 * @ap: Port to which output is sent
210 * @tf: ATA taskfile register set
212 * Outputs ATA taskfile to standard ATA host controller using MMIO
213 * or PIO as indicated by the ATA_FLAG_MMIO flag.
214 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
215 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
216 * hob_lbal, hob_lbam, and hob_lbah.
218 * This function waits for idle (!BUSY and !DRQ) after writing
219 * registers. If the control register has a new value, this
220 * function also waits for idle after writing control and before
221 * writing the remaining registers.
223 * May be used as the tf_load() entry in ata_port_operations.
226 * Inherited from caller.
228 void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
230 if (ap->flags & ATA_FLAG_MMIO)
231 ata_tf_load_mmio(ap, tf);
233 ata_tf_load_pio(ap, tf);
237 * ata_exec_command_pio - issue ATA command to host controller
238 * @ap: port to which command is being issued
239 * @tf: ATA taskfile register set
241 * Issues PIO write to ATA command register, with proper
242 * synchronization with interrupt handler / other threads.
245 * spin_lock_irqsave(host_set lock)
248 static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf)
250 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
252 outb(tf->command, ap->ioaddr.command_addr);
258 * ata_exec_command_mmio - issue ATA command to host controller
259 * @ap: port to which command is being issued
260 * @tf: ATA taskfile register set
262 * Issues MMIO write to ATA command register, with proper
263 * synchronization with interrupt handler / other threads.
266 * spin_lock_irqsave(host_set lock)
269 static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
271 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
273 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
279 * ata_exec_command - issue ATA command to host controller
280 * @ap: port to which command is being issued
281 * @tf: ATA taskfile register set
283 * Issues PIO/MMIO write to ATA command register, with proper
284 * synchronization with interrupt handler / other threads.
287 * spin_lock_irqsave(host_set lock)
289 void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
291 if (ap->flags & ATA_FLAG_MMIO)
292 ata_exec_command_mmio(ap, tf);
294 ata_exec_command_pio(ap, tf);
298 * ata_exec - issue ATA command to host controller
299 * @ap: port to which command is being issued
300 * @tf: ATA taskfile register set
302 * Issues PIO/MMIO write to ATA command register, with proper
303 * synchronization with interrupt handler / other threads.
306 * Obtains host_set lock.
309 static inline void ata_exec(struct ata_port *ap, const struct ata_taskfile *tf)
313 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
314 spin_lock_irqsave(&ap->host_set->lock, flags);
315 ap->ops->exec_command(ap, tf);
316 spin_unlock_irqrestore(&ap->host_set->lock, flags);
320 * ata_tf_to_host - issue ATA taskfile to host controller
321 * @ap: port to which command is being issued
322 * @tf: ATA taskfile register set
324 * Issues ATA taskfile register set to ATA host controller,
325 * with proper synchronization with interrupt handler and
329 * Obtains host_set lock.
332 static void ata_tf_to_host(struct ata_port *ap, const struct ata_taskfile *tf)
334 ap->ops->tf_load(ap, tf);
340 * ata_tf_to_host_nolock - issue ATA taskfile to host controller
341 * @ap: port to which command is being issued
342 * @tf: ATA taskfile register set
344 * Issues ATA taskfile register set to ATA host controller,
345 * with proper synchronization with interrupt handler and
349 * spin_lock_irqsave(host_set lock)
352 void ata_tf_to_host_nolock(struct ata_port *ap, const struct ata_taskfile *tf)
354 ap->ops->tf_load(ap, tf);
355 ap->ops->exec_command(ap, tf);
359 * ata_tf_read_pio - input device's ATA taskfile shadow registers
360 * @ap: Port from which input is read
361 * @tf: ATA taskfile register set for storing input
363 * Reads ATA taskfile registers for currently-selected device
367 * Inherited from caller.
370 static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
372 struct ata_ioports *ioaddr = &ap->ioaddr;
374 tf->command = ata_check_status(ap);
375 tf->feature = inb(ioaddr->error_addr);
376 tf->nsect = inb(ioaddr->nsect_addr);
377 tf->lbal = inb(ioaddr->lbal_addr);
378 tf->lbam = inb(ioaddr->lbam_addr);
379 tf->lbah = inb(ioaddr->lbah_addr);
380 tf->device = inb(ioaddr->device_addr);
382 if (tf->flags & ATA_TFLAG_LBA48) {
383 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
384 tf->hob_feature = inb(ioaddr->error_addr);
385 tf->hob_nsect = inb(ioaddr->nsect_addr);
386 tf->hob_lbal = inb(ioaddr->lbal_addr);
387 tf->hob_lbam = inb(ioaddr->lbam_addr);
388 tf->hob_lbah = inb(ioaddr->lbah_addr);
393 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
394 * @ap: Port from which input is read
395 * @tf: ATA taskfile register set for storing input
397 * Reads ATA taskfile registers for currently-selected device
401 * Inherited from caller.
404 static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
406 struct ata_ioports *ioaddr = &ap->ioaddr;
408 tf->command = ata_check_status(ap);
409 tf->feature = readb((void __iomem *)ioaddr->error_addr);
410 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
411 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
412 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
413 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
414 tf->device = readb((void __iomem *)ioaddr->device_addr);
416 if (tf->flags & ATA_TFLAG_LBA48) {
417 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
418 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
419 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
420 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
421 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
422 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
428 * ata_tf_read - input device's ATA taskfile shadow registers
429 * @ap: Port from which input is read
430 * @tf: ATA taskfile register set for storing input
432 * Reads ATA taskfile registers for currently-selected device
435 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
436 * is set, also reads the hob registers.
438 * May be used as the tf_read() entry in ata_port_operations.
441 * Inherited from caller.
443 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
445 if (ap->flags & ATA_FLAG_MMIO)
446 ata_tf_read_mmio(ap, tf);
448 ata_tf_read_pio(ap, tf);
452 * ata_check_status_pio - Read device status reg & clear interrupt
453 * @ap: port where the device is
455 * Reads ATA taskfile status register for currently-selected device
456 * and return its value. This also clears pending interrupts
460 * Inherited from caller.
462 static u8 ata_check_status_pio(struct ata_port *ap)
464 return inb(ap->ioaddr.status_addr);
468 * ata_check_status_mmio - Read device status reg & clear interrupt
469 * @ap: port where the device is
471 * Reads ATA taskfile status register for currently-selected device
472 * via MMIO and return its value. This also clears pending interrupts
476 * Inherited from caller.
478 static u8 ata_check_status_mmio(struct ata_port *ap)
480 return readb((void __iomem *) ap->ioaddr.status_addr);
485 * ata_check_status - Read device status reg & clear interrupt
486 * @ap: port where the device is
488 * Reads ATA taskfile status register for currently-selected device
489 * and return its value. This also clears pending interrupts
492 * May be used as the check_status() entry in ata_port_operations.
495 * Inherited from caller.
497 u8 ata_check_status(struct ata_port *ap)
499 if (ap->flags & ATA_FLAG_MMIO)
500 return ata_check_status_mmio(ap);
501 return ata_check_status_pio(ap);
506 * ata_altstatus - Read device alternate status reg
507 * @ap: port where the device is
509 * Reads ATA taskfile alternate status register for
510 * currently-selected device and return its value.
512 * Note: may NOT be used as the check_altstatus() entry in
513 * ata_port_operations.
516 * Inherited from caller.
518 u8 ata_altstatus(struct ata_port *ap)
520 if (ap->ops->check_altstatus)
521 return ap->ops->check_altstatus(ap);
523 if (ap->flags & ATA_FLAG_MMIO)
524 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
525 return inb(ap->ioaddr.altstatus_addr);
530 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
531 * @tf: Taskfile to convert
532 * @fis: Buffer into which data will output
533 * @pmp: Port multiplier port
535 * Converts a standard ATA taskfile to a Serial ATA
536 * FIS structure (Register - Host to Device).
539 * Inherited from caller.
542 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
544 fis[0] = 0x27; /* Register - Host to Device FIS */
545 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
546 bit 7 indicates Command FIS */
547 fis[2] = tf->command;
548 fis[3] = tf->feature;
555 fis[8] = tf->hob_lbal;
556 fis[9] = tf->hob_lbam;
557 fis[10] = tf->hob_lbah;
558 fis[11] = tf->hob_feature;
561 fis[13] = tf->hob_nsect;
572 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
573 * @fis: Buffer from which data will be input
574 * @tf: Taskfile to output
576 * Converts a standard ATA taskfile to a Serial ATA
577 * FIS structure (Register - Host to Device).
580 * Inherited from caller.
583 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
585 tf->command = fis[2]; /* status */
586 tf->feature = fis[3]; /* error */
593 tf->hob_lbal = fis[8];
594 tf->hob_lbam = fis[9];
595 tf->hob_lbah = fis[10];
598 tf->hob_nsect = fis[13];
601 static const u8 ata_rw_cmds[] = {
605 ATA_CMD_READ_MULTI_EXT,
606 ATA_CMD_WRITE_MULTI_EXT,
610 ATA_CMD_PIO_READ_EXT,
611 ATA_CMD_PIO_WRITE_EXT,
620 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
621 * @qc: command to examine and configure
623 * Examine the device configuration and tf->flags to calculate
624 * the proper read/write commands and protocol to use.
629 void ata_rwcmd_protocol(struct ata_queued_cmd *qc)
631 struct ata_taskfile *tf = &qc->tf;
632 struct ata_device *dev = qc->dev;
634 int index, lba48, write;
636 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
637 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
639 if (dev->flags & ATA_DFLAG_PIO) {
640 tf->protocol = ATA_PROT_PIO;
641 index = dev->multi_count ? 0 : 4;
643 tf->protocol = ATA_PROT_DMA;
647 tf->command = ata_rw_cmds[index + lba48 + write];
650 static const char * xfer_mode_str[] = {
670 * ata_udma_string - convert UDMA bit offset to string
671 * @mask: mask of bits supported; only highest bit counts.
673 * Determine string which represents the highest speed
674 * (highest bit in @udma_mask).
680 * Constant C string representing highest speed listed in
681 * @udma_mask, or the constant C string "<n/a>".
684 static const char *ata_mode_string(unsigned int mask)
688 for (i = 7; i >= 0; i--)
691 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
694 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
701 return xfer_mode_str[i];
705 * ata_pio_devchk - PATA device presence detection
706 * @ap: ATA channel to examine
707 * @device: Device to examine (starting at zero)
709 * This technique was originally described in
710 * Hale Landis's ATADRVR (www.ata-atapi.com), and
711 * later found its way into the ATA/ATAPI spec.
713 * Write a pattern to the ATA shadow registers,
714 * and if a device is present, it will respond by
715 * correctly storing and echoing back the
716 * ATA shadow register contents.
722 static unsigned int ata_pio_devchk(struct ata_port *ap,
725 struct ata_ioports *ioaddr = &ap->ioaddr;
728 ap->ops->dev_select(ap, device);
730 outb(0x55, ioaddr->nsect_addr);
731 outb(0xaa, ioaddr->lbal_addr);
733 outb(0xaa, ioaddr->nsect_addr);
734 outb(0x55, ioaddr->lbal_addr);
736 outb(0x55, ioaddr->nsect_addr);
737 outb(0xaa, ioaddr->lbal_addr);
739 nsect = inb(ioaddr->nsect_addr);
740 lbal = inb(ioaddr->lbal_addr);
742 if ((nsect == 0x55) && (lbal == 0xaa))
743 return 1; /* we found a device */
745 return 0; /* nothing found */
749 * ata_mmio_devchk - PATA device presence detection
750 * @ap: ATA channel to examine
751 * @device: Device to examine (starting at zero)
753 * This technique was originally described in
754 * Hale Landis's ATADRVR (www.ata-atapi.com), and
755 * later found its way into the ATA/ATAPI spec.
757 * Write a pattern to the ATA shadow registers,
758 * and if a device is present, it will respond by
759 * correctly storing and echoing back the
760 * ATA shadow register contents.
766 static unsigned int ata_mmio_devchk(struct ata_port *ap,
769 struct ata_ioports *ioaddr = &ap->ioaddr;
772 ap->ops->dev_select(ap, device);
774 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
775 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
777 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
778 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
780 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
781 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
783 nsect = readb((void __iomem *) ioaddr->nsect_addr);
784 lbal = readb((void __iomem *) ioaddr->lbal_addr);
786 if ((nsect == 0x55) && (lbal == 0xaa))
787 return 1; /* we found a device */
789 return 0; /* nothing found */
793 * ata_devchk - PATA device presence detection
794 * @ap: ATA channel to examine
795 * @device: Device to examine (starting at zero)
797 * Dispatch ATA device presence detection, depending
798 * on whether we are using PIO or MMIO to talk to the
799 * ATA shadow registers.
805 static unsigned int ata_devchk(struct ata_port *ap,
808 if (ap->flags & ATA_FLAG_MMIO)
809 return ata_mmio_devchk(ap, device);
810 return ata_pio_devchk(ap, device);
814 * ata_dev_classify - determine device type based on ATA-spec signature
815 * @tf: ATA taskfile register set for device to be identified
817 * Determine from taskfile register contents whether a device is
818 * ATA or ATAPI, as per "Signature and persistence" section
819 * of ATA/PI spec (volume 1, sect 5.14).
825 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
826 * the event of failure.
829 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
831 /* Apple's open source Darwin code hints that some devices only
832 * put a proper signature into the LBA mid/high registers,
833 * So, we only check those. It's sufficient for uniqueness.
836 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
837 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
838 DPRINTK("found ATA device by sig\n");
842 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
843 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
844 DPRINTK("found ATAPI device by sig\n");
845 return ATA_DEV_ATAPI;
848 DPRINTK("unknown device\n");
849 return ATA_DEV_UNKNOWN;
853 * ata_dev_try_classify - Parse returned ATA device signature
854 * @ap: ATA channel to examine
855 * @device: Device to examine (starting at zero)
857 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
858 * an ATA/ATAPI-defined set of values is placed in the ATA
859 * shadow registers, indicating the results of device detection
862 * Select the ATA device, and read the values from the ATA shadow
863 * registers. Then parse according to the Error register value,
864 * and the spec-defined values examined by ata_dev_classify().
870 static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
872 struct ata_device *dev = &ap->device[device];
873 struct ata_taskfile tf;
877 ap->ops->dev_select(ap, device);
879 memset(&tf, 0, sizeof(tf));
881 ap->ops->tf_read(ap, &tf);
884 dev->class = ATA_DEV_NONE;
886 /* see if device passed diags */
889 else if ((device == 0) && (err == 0x81))
894 /* determine if device if ATA or ATAPI */
895 class = ata_dev_classify(&tf);
896 if (class == ATA_DEV_UNKNOWN)
898 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
907 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
908 * @id: IDENTIFY DEVICE results we will examine
909 * @s: string into which data is output
910 * @ofs: offset into identify device page
911 * @len: length of string to return. must be an even number.
913 * The strings in the IDENTIFY DEVICE page are broken up into
914 * 16-bit chunks. Run through the string, and output each
915 * 8-bit chunk linearly, regardless of platform.
921 void ata_dev_id_string(const u16 *id, unsigned char *s,
922 unsigned int ofs, unsigned int len)
942 * ata_noop_dev_select - Select device 0/1 on ATA bus
943 * @ap: ATA channel to manipulate
944 * @device: ATA device (numbered from zero) to select
946 * This function performs no actual function.
948 * May be used as the dev_select() entry in ata_port_operations.
953 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
959 * ata_std_dev_select - Select device 0/1 on ATA bus
960 * @ap: ATA channel to manipulate
961 * @device: ATA device (numbered from zero) to select
963 * Use the method defined in the ATA specification to
964 * make either device 0, or device 1, active on the
965 * ATA channel. Works with both PIO and MMIO.
967 * May be used as the dev_select() entry in ata_port_operations.
973 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
978 tmp = ATA_DEVICE_OBS;
980 tmp = ATA_DEVICE_OBS | ATA_DEV1;
982 if (ap->flags & ATA_FLAG_MMIO) {
983 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
985 outb(tmp, ap->ioaddr.device_addr);
987 ata_pause(ap); /* needed; also flushes, for mmio */
991 * ata_dev_select - Select device 0/1 on ATA bus
992 * @ap: ATA channel to manipulate
993 * @device: ATA device (numbered from zero) to select
994 * @wait: non-zero to wait for Status register BSY bit to clear
995 * @can_sleep: non-zero if context allows sleeping
997 * Use the method defined in the ATA specification to
998 * make either device 0, or device 1, active on the
1001 * This is a high-level version of ata_std_dev_select(),
1002 * which additionally provides the services of inserting
1003 * the proper pauses and status polling, where needed.
1009 void ata_dev_select(struct ata_port *ap, unsigned int device,
1010 unsigned int wait, unsigned int can_sleep)
1012 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
1013 ap->id, device, wait);
1018 ap->ops->dev_select(ap, device);
1021 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
1028 * ata_dump_id - IDENTIFY DEVICE info debugging output
1029 * @dev: Device whose IDENTIFY DEVICE page we will dump
1031 * Dump selected 16-bit words from a detected device's
1032 * IDENTIFY PAGE page.
1038 static inline void ata_dump_id(const struct ata_device *dev)
1040 DPRINTK("49==0x%04x "
1050 DPRINTK("80==0x%04x "
1060 DPRINTK("88==0x%04x "
1067 * Compute the PIO modes available for this device. This is not as
1068 * trivial as it seems if we must consider early devices correctly.
1070 * FIXME: pre IDE drive timing (do we care ?).
1073 static unsigned int ata_pio_modes(const struct ata_device *adev)
1077 /* Usual case. Word 53 indicates word 88 is valid */
1078 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 2)) {
1079 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
1085 /* If word 88 isn't valid then Word 51 holds the PIO timing number
1086 for the maximum. Turn it into a mask and return it */
1087 modes = (2 << (adev->id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
1092 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1093 * @ap: port on which device we wish to probe resides
1094 * @device: device bus address, starting at zero
1096 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1097 * command, and read back the 512-byte device information page.
1098 * The device information page is fed to us via the standard
1099 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1100 * using standard PIO-IN paths)
1102 * After reading the device information page, we use several
1103 * bits of information from it to initialize data structures
1104 * that will be used during the lifetime of the ata_device.
1105 * Other data from the info page is used to disqualify certain
1106 * older ATA devices we do not wish to support.
1109 * Inherited from caller. Some functions called by this function
1110 * obtain the host_set lock.
1113 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1115 struct ata_device *dev = &ap->device[device];
1116 unsigned int major_version;
1118 unsigned long xfer_modes;
1119 unsigned int using_edd;
1120 DECLARE_COMPLETION(wait);
1121 struct ata_queued_cmd *qc;
1122 unsigned long flags;
1125 if (!ata_dev_present(dev)) {
1126 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1131 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1136 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1138 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1139 dev->class == ATA_DEV_NONE);
1141 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1143 qc = ata_qc_new_init(ap, dev);
1146 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
1147 qc->dma_dir = DMA_FROM_DEVICE;
1148 qc->tf.protocol = ATA_PROT_PIO;
1152 if (dev->class == ATA_DEV_ATA) {
1153 qc->tf.command = ATA_CMD_ID_ATA;
1154 DPRINTK("do ATA identify\n");
1156 qc->tf.command = ATA_CMD_ID_ATAPI;
1157 DPRINTK("do ATAPI identify\n");
1160 qc->waiting = &wait;
1161 qc->complete_fn = ata_qc_complete_noop;
1163 spin_lock_irqsave(&ap->host_set->lock, flags);
1164 rc = ata_qc_issue(qc);
1165 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1170 wait_for_completion(&wait);
1172 spin_lock_irqsave(&ap->host_set->lock, flags);
1173 ap->ops->tf_read(ap, &qc->tf);
1174 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1176 if (qc->tf.command & ATA_ERR) {
1178 * arg! EDD works for all test cases, but seems to return
1179 * the ATA signature for some ATAPI devices. Until the
1180 * reason for this is found and fixed, we fix up the mess
1181 * here. If IDENTIFY DEVICE returns command aborted
1182 * (as ATAPI devices do), then we issue an
1183 * IDENTIFY PACKET DEVICE.
1185 * ATA software reset (SRST, the default) does not appear
1186 * to have this problem.
1188 if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) {
1189 u8 err = qc->tf.feature;
1190 if (err & ATA_ABORTED) {
1191 dev->class = ATA_DEV_ATAPI;
1202 swap_buf_le16(dev->id, ATA_ID_WORDS);
1204 /* print device capabilities */
1205 printk(KERN_DEBUG "ata%u: dev %u cfg "
1206 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1207 ap->id, device, dev->id[49],
1208 dev->id[82], dev->id[83], dev->id[84],
1209 dev->id[85], dev->id[86], dev->id[87],
1213 * common ATA, ATAPI feature tests
1216 /* we require DMA support (bits 8 of word 49) */
1217 if (!ata_id_has_dma(dev->id)) {
1218 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1222 /* quick-n-dirty find max transfer mode; for printk only */
1223 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1225 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1227 xfer_modes = ata_pio_modes(dev);
1231 /* ATA-specific feature tests */
1232 if (dev->class == ATA_DEV_ATA) {
1233 if (!ata_id_is_ata(dev->id)) /* sanity check */
1236 /* get major version */
1237 tmp = dev->id[ATA_ID_MAJOR_VER];
1238 for (major_version = 14; major_version >= 1; major_version--)
1239 if (tmp & (1 << major_version))
1243 * The exact sequence expected by certain pre-ATA4 drives is:
1246 * INITIALIZE DEVICE PARAMETERS
1248 * Some drives were very specific about that exact sequence.
1250 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
1251 ata_dev_init_params(ap, dev);
1253 /* current CHS translation info (id[53-58]) might be
1254 * changed. reread the identify device info.
1256 ata_dev_reread_id(ap, dev);
1259 if (ata_id_has_lba(dev->id)) {
1260 dev->flags |= ATA_DFLAG_LBA;
1262 if (ata_id_has_lba48(dev->id)) {
1263 dev->flags |= ATA_DFLAG_LBA48;
1264 dev->n_sectors = ata_id_u64(dev->id, 100);
1266 dev->n_sectors = ata_id_u32(dev->id, 60);
1269 /* print device info to dmesg */
1270 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1273 ata_mode_string(xfer_modes),
1274 (unsigned long long)dev->n_sectors,
1275 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1279 /* Default translation */
1280 dev->cylinders = dev->id[1];
1281 dev->heads = dev->id[3];
1282 dev->sectors = dev->id[6];
1283 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1285 if (ata_id_current_chs_valid(dev->id)) {
1286 /* Current CHS translation is valid. */
1287 dev->cylinders = dev->id[54];
1288 dev->heads = dev->id[55];
1289 dev->sectors = dev->id[56];
1291 dev->n_sectors = ata_id_u32(dev->id, 57);
1294 /* print device info to dmesg */
1295 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1298 ata_mode_string(xfer_modes),
1299 (unsigned long long)dev->n_sectors,
1300 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1304 ap->host->max_cmd_len = 16;
1307 /* ATAPI-specific feature tests */
1309 if (ata_id_is_ata(dev->id)) /* sanity check */
1312 rc = atapi_cdb_len(dev->id);
1313 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1314 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1317 ap->cdb_len = (unsigned int) rc;
1318 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1320 /* print device info to dmesg */
1321 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1323 ata_mode_string(xfer_modes));
1326 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1330 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1333 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1334 DPRINTK("EXIT, err\n");
1338 static inline u8 ata_dev_knobble(const struct ata_port *ap)
1340 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1344 * ata_dev_config - Run device specific handlers and check for
1345 * SATA->PATA bridges
1352 void ata_dev_config(struct ata_port *ap, unsigned int i)
1354 /* limit bridge transfers to udma5, 200 sectors */
1355 if (ata_dev_knobble(ap)) {
1356 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1357 ap->id, ap->device->devno);
1358 ap->udma_mask &= ATA_UDMA5;
1359 ap->host->max_sectors = ATA_MAX_SECTORS;
1360 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1361 ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
1364 if (ap->ops->dev_config)
1365 ap->ops->dev_config(ap, &ap->device[i]);
1369 * ata_bus_probe - Reset and probe ATA bus
1372 * Master ATA bus probing function. Initiates a hardware-dependent
1373 * bus reset, then attempts to identify any devices found on
1377 * PCI/etc. bus probe sem.
1380 * Zero on success, non-zero on error.
1383 static int ata_bus_probe(struct ata_port *ap)
1385 unsigned int i, found = 0;
1387 ap->ops->phy_reset(ap);
1388 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1391 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1392 ata_dev_identify(ap, i);
1393 if (ata_dev_present(&ap->device[i])) {
1395 ata_dev_config(ap,i);
1399 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1400 goto err_out_disable;
1403 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1404 goto err_out_disable;
1409 ap->ops->port_disable(ap);
1415 * ata_port_probe - Mark port as enabled
1416 * @ap: Port for which we indicate enablement
1418 * Modify @ap data structure such that the system
1419 * thinks that the entire port is enabled.
1421 * LOCKING: host_set lock, or some other form of
1425 void ata_port_probe(struct ata_port *ap)
1427 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1431 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1432 * @ap: SATA port associated with target SATA PHY.
1434 * This function issues commands to standard SATA Sxxx
1435 * PHY registers, to wake up the phy (and device), and
1436 * clear any reset condition.
1439 * PCI/etc. bus probe sem.
1442 void __sata_phy_reset(struct ata_port *ap)
1445 unsigned long timeout = jiffies + (HZ * 5);
1447 if (ap->flags & ATA_FLAG_SATA_RESET) {
1448 /* issue phy wake/reset */
1449 scr_write_flush(ap, SCR_CONTROL, 0x301);
1450 /* Couldn't find anything in SATA I/II specs, but
1451 * AHCI-1.1 10.4.2 says at least 1 ms. */
1454 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1456 /* wait for phy to become ready, if necessary */
1459 sstatus = scr_read(ap, SCR_STATUS);
1460 if ((sstatus & 0xf) != 1)
1462 } while (time_before(jiffies, timeout));
1464 /* TODO: phy layer with polling, timeouts, etc. */
1465 if (sata_dev_present(ap))
1468 sstatus = scr_read(ap, SCR_STATUS);
1469 printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n",
1471 ata_port_disable(ap);
1474 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1477 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1478 ata_port_disable(ap);
1482 ap->cbl = ATA_CBL_SATA;
1486 * sata_phy_reset - Reset SATA bus.
1487 * @ap: SATA port associated with target SATA PHY.
1489 * This function resets the SATA bus, and then probes
1490 * the bus for devices.
1493 * PCI/etc. bus probe sem.
1496 void sata_phy_reset(struct ata_port *ap)
1498 __sata_phy_reset(ap);
1499 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1505 * ata_port_disable - Disable port.
1506 * @ap: Port to be disabled.
1508 * Modify @ap data structure such that the system
1509 * thinks that the entire port is disabled, and should
1510 * never attempt to probe or communicate with devices
1513 * LOCKING: host_set lock, or some other form of
1517 void ata_port_disable(struct ata_port *ap)
1519 ap->device[0].class = ATA_DEV_NONE;
1520 ap->device[1].class = ATA_DEV_NONE;
1521 ap->flags |= ATA_FLAG_PORT_DISABLED;
1525 * This mode timing computation functionality is ported over from
1526 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1529 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1530 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1531 * for PIO 5, which is a nonstandard extension and UDMA6, which
1532 * is currently supported only by Maxtor drives.
1535 static const struct ata_timing ata_timing[] = {
1537 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1538 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1539 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1540 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1542 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1543 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1544 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1546 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1548 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1549 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1550 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1552 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1553 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1554 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1556 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1557 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1558 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1560 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1561 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1562 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1564 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1569 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1570 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1572 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1574 q->setup = EZ(t->setup * 1000, T);
1575 q->act8b = EZ(t->act8b * 1000, T);
1576 q->rec8b = EZ(t->rec8b * 1000, T);
1577 q->cyc8b = EZ(t->cyc8b * 1000, T);
1578 q->active = EZ(t->active * 1000, T);
1579 q->recover = EZ(t->recover * 1000, T);
1580 q->cycle = EZ(t->cycle * 1000, T);
1581 q->udma = EZ(t->udma * 1000, UT);
1584 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1585 struct ata_timing *m, unsigned int what)
1587 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1588 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1589 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1590 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1591 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1592 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1593 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1594 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1597 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1599 const struct ata_timing *t;
1601 for (t = ata_timing; t->mode != speed; t++)
1602 if (t->mode == 0xFF)
1607 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1608 struct ata_timing *t, int T, int UT)
1610 const struct ata_timing *s;
1611 struct ata_timing p;
1617 if (!(s = ata_timing_find_mode(speed)))
1621 * If the drive is an EIDE drive, it can tell us it needs extended
1622 * PIO/MW_DMA cycle timing.
1625 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1626 memset(&p, 0, sizeof(p));
1627 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1628 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1629 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1630 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1631 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1633 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1637 * Convert the timing to bus clock counts.
1640 ata_timing_quantize(s, t, T, UT);
1643 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T
1644 * and some other commands. We have to ensure that the DMA cycle timing is
1645 * slower/equal than the fastest PIO timing.
1648 if (speed > XFER_PIO_4) {
1649 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1650 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1654 * Lenghten active & recovery time so that cycle time is correct.
1657 if (t->act8b + t->rec8b < t->cyc8b) {
1658 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1659 t->rec8b = t->cyc8b - t->act8b;
1662 if (t->active + t->recover < t->cycle) {
1663 t->active += (t->cycle - (t->active + t->recover)) / 2;
1664 t->recover = t->cycle - t->active;
1670 static const struct {
1673 } xfer_mode_classes[] = {
1674 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1675 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1676 { ATA_SHIFT_PIO, XFER_PIO_0 },
1679 static inline u8 base_from_shift(unsigned int shift)
1683 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1684 if (xfer_mode_classes[i].shift == shift)
1685 return xfer_mode_classes[i].base;
1690 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1695 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1698 if (dev->xfer_shift == ATA_SHIFT_PIO)
1699 dev->flags |= ATA_DFLAG_PIO;
1701 ata_dev_set_xfermode(ap, dev);
1703 base = base_from_shift(dev->xfer_shift);
1704 ofs = dev->xfer_mode - base;
1705 idx = ofs + dev->xfer_shift;
1706 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1708 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1709 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1711 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1712 ap->id, dev->devno, xfer_mode_str[idx]);
1715 static int ata_host_set_pio(struct ata_port *ap)
1721 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1724 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1728 base = base_from_shift(ATA_SHIFT_PIO);
1729 xfer_mode = base + x;
1731 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1732 (int)base, (int)xfer_mode, mask, x);
1734 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1735 struct ata_device *dev = &ap->device[i];
1736 if (ata_dev_present(dev)) {
1737 dev->pio_mode = xfer_mode;
1738 dev->xfer_mode = xfer_mode;
1739 dev->xfer_shift = ATA_SHIFT_PIO;
1740 if (ap->ops->set_piomode)
1741 ap->ops->set_piomode(ap, dev);
1748 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1749 unsigned int xfer_shift)
1753 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1754 struct ata_device *dev = &ap->device[i];
1755 if (ata_dev_present(dev)) {
1756 dev->dma_mode = xfer_mode;
1757 dev->xfer_mode = xfer_mode;
1758 dev->xfer_shift = xfer_shift;
1759 if (ap->ops->set_dmamode)
1760 ap->ops->set_dmamode(ap, dev);
1766 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1767 * @ap: port on which timings will be programmed
1769 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1772 * PCI/etc. bus probe sem.
1775 static void ata_set_mode(struct ata_port *ap)
1777 unsigned int xfer_shift;
1781 /* step 1: always set host PIO timings */
1782 rc = ata_host_set_pio(ap);
1786 /* step 2: choose the best data xfer mode */
1787 xfer_mode = xfer_shift = 0;
1788 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1792 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1793 if (xfer_shift != ATA_SHIFT_PIO)
1794 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1796 /* step 4: update devices' xfer mode */
1797 ata_dev_set_mode(ap, &ap->device[0]);
1798 ata_dev_set_mode(ap, &ap->device[1]);
1800 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1803 if (ap->ops->post_set_mode)
1804 ap->ops->post_set_mode(ap);
1809 ata_port_disable(ap);
1813 * ata_busy_sleep - sleep until BSY clears, or timeout
1814 * @ap: port containing status register to be polled
1815 * @tmout_pat: impatience timeout
1816 * @tmout: overall timeout
1818 * Sleep until ATA Status register bit BSY clears,
1819 * or a timeout occurs.
1825 static unsigned int ata_busy_sleep (struct ata_port *ap,
1826 unsigned long tmout_pat,
1827 unsigned long tmout)
1829 unsigned long timer_start, timeout;
1832 status = ata_busy_wait(ap, ATA_BUSY, 300);
1833 timer_start = jiffies;
1834 timeout = timer_start + tmout_pat;
1835 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1837 status = ata_busy_wait(ap, ATA_BUSY, 3);
1840 if (status & ATA_BUSY)
1841 printk(KERN_WARNING "ata%u is slow to respond, "
1842 "please be patient\n", ap->id);
1844 timeout = timer_start + tmout;
1845 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1847 status = ata_chk_status(ap);
1850 if (status & ATA_BUSY) {
1851 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1852 ap->id, tmout / HZ);
1859 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1861 struct ata_ioports *ioaddr = &ap->ioaddr;
1862 unsigned int dev0 = devmask & (1 << 0);
1863 unsigned int dev1 = devmask & (1 << 1);
1864 unsigned long timeout;
1866 /* if device 0 was found in ata_devchk, wait for its
1870 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1872 /* if device 1 was found in ata_devchk, wait for
1873 * register access, then wait for BSY to clear
1875 timeout = jiffies + ATA_TMOUT_BOOT;
1879 ap->ops->dev_select(ap, 1);
1880 if (ap->flags & ATA_FLAG_MMIO) {
1881 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1882 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1884 nsect = inb(ioaddr->nsect_addr);
1885 lbal = inb(ioaddr->lbal_addr);
1887 if ((nsect == 1) && (lbal == 1))
1889 if (time_after(jiffies, timeout)) {
1893 msleep(50); /* give drive a breather */
1896 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1898 /* is all this really necessary? */
1899 ap->ops->dev_select(ap, 0);
1901 ap->ops->dev_select(ap, 1);
1903 ap->ops->dev_select(ap, 0);
1907 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1908 * @ap: Port to reset and probe
1910 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1911 * probe the bus. Not often used these days.
1914 * PCI/etc. bus probe sem.
1918 static unsigned int ata_bus_edd(struct ata_port *ap)
1920 struct ata_taskfile tf;
1922 /* set up execute-device-diag (bus reset) taskfile */
1923 /* also, take interrupts to a known state (disabled) */
1924 DPRINTK("execute-device-diag\n");
1925 ata_tf_init(ap, &tf, 0);
1927 tf.command = ATA_CMD_EDD;
1928 tf.protocol = ATA_PROT_NODATA;
1931 ata_tf_to_host(ap, &tf);
1933 /* spec says at least 2ms. but who knows with those
1934 * crazy ATAPI devices...
1938 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1941 static unsigned int ata_bus_softreset(struct ata_port *ap,
1942 unsigned int devmask)
1944 struct ata_ioports *ioaddr = &ap->ioaddr;
1946 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1948 /* software reset. causes dev0 to be selected */
1949 if (ap->flags & ATA_FLAG_MMIO) {
1950 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1951 udelay(20); /* FIXME: flush */
1952 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1953 udelay(20); /* FIXME: flush */
1954 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1956 outb(ap->ctl, ioaddr->ctl_addr);
1958 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1960 outb(ap->ctl, ioaddr->ctl_addr);
1963 /* spec mandates ">= 2ms" before checking status.
1964 * We wait 150ms, because that was the magic delay used for
1965 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1966 * between when the ATA command register is written, and then
1967 * status is checked. Because waiting for "a while" before
1968 * checking status is fine, post SRST, we perform this magic
1969 * delay here as well.
1973 ata_bus_post_reset(ap, devmask);
1979 * ata_bus_reset - reset host port and associated ATA channel
1980 * @ap: port to reset
1982 * This is typically the first time we actually start issuing
1983 * commands to the ATA channel. We wait for BSY to clear, then
1984 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1985 * result. Determine what devices, if any, are on the channel
1986 * by looking at the device 0/1 error register. Look at the signature
1987 * stored in each device's taskfile registers, to determine if
1988 * the device is ATA or ATAPI.
1991 * PCI/etc. bus probe sem.
1992 * Obtains host_set lock.
1995 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1998 void ata_bus_reset(struct ata_port *ap)
2000 struct ata_ioports *ioaddr = &ap->ioaddr;
2001 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2003 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
2005 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2007 /* determine if device 0/1 are present */
2008 if (ap->flags & ATA_FLAG_SATA_RESET)
2011 dev0 = ata_devchk(ap, 0);
2013 dev1 = ata_devchk(ap, 1);
2017 devmask |= (1 << 0);
2019 devmask |= (1 << 1);
2021 /* select device 0 again */
2022 ap->ops->dev_select(ap, 0);
2024 /* issue bus reset */
2025 if (ap->flags & ATA_FLAG_SRST)
2026 rc = ata_bus_softreset(ap, devmask);
2027 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
2028 /* set up device control */
2029 if (ap->flags & ATA_FLAG_MMIO)
2030 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2032 outb(ap->ctl, ioaddr->ctl_addr);
2033 rc = ata_bus_edd(ap);
2040 * determine by signature whether we have ATA or ATAPI devices
2042 err = ata_dev_try_classify(ap, 0);
2043 if ((slave_possible) && (err != 0x81))
2044 ata_dev_try_classify(ap, 1);
2046 /* re-enable interrupts */
2047 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2050 /* is double-select really necessary? */
2051 if (ap->device[1].class != ATA_DEV_NONE)
2052 ap->ops->dev_select(ap, 1);
2053 if (ap->device[0].class != ATA_DEV_NONE)
2054 ap->ops->dev_select(ap, 0);
2056 /* if no devices were detected, disable this port */
2057 if ((ap->device[0].class == ATA_DEV_NONE) &&
2058 (ap->device[1].class == ATA_DEV_NONE))
2061 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2062 /* set up device control for ATA_FLAG_SATA_RESET */
2063 if (ap->flags & ATA_FLAG_MMIO)
2064 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2066 outb(ap->ctl, ioaddr->ctl_addr);
2073 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2074 ap->ops->port_disable(ap);
2079 static void ata_pr_blacklisted(const struct ata_port *ap,
2080 const struct ata_device *dev)
2082 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2083 ap->id, dev->devno);
2086 static const char * ata_dma_blacklist [] = {
2105 "Toshiba CD-ROM XM-6202B",
2106 "TOSHIBA CD-ROM XM-1702BC",
2108 "E-IDE CD-ROM CR-840",
2111 "SAMSUNG CD-ROM SC-148C",
2112 "SAMSUNG CD-ROM SC",
2114 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2118 static int ata_dma_blacklisted(const struct ata_device *dev)
2120 unsigned char model_num[40];
2125 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2128 len = strnlen(s, sizeof(model_num));
2130 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2131 while ((len > 0) && (s[len - 1] == ' ')) {
2136 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2137 if (!strncmp(ata_dma_blacklist[i], s, len))
2143 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
2145 const struct ata_device *master, *slave;
2148 master = &ap->device[0];
2149 slave = &ap->device[1];
2151 assert (ata_dev_present(master) || ata_dev_present(slave));
2153 if (shift == ATA_SHIFT_UDMA) {
2154 mask = ap->udma_mask;
2155 if (ata_dev_present(master)) {
2156 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2157 if (ata_dma_blacklisted(master)) {
2159 ata_pr_blacklisted(ap, master);
2162 if (ata_dev_present(slave)) {
2163 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2164 if (ata_dma_blacklisted(slave)) {
2166 ata_pr_blacklisted(ap, slave);
2170 else if (shift == ATA_SHIFT_MWDMA) {
2171 mask = ap->mwdma_mask;
2172 if (ata_dev_present(master)) {
2173 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2174 if (ata_dma_blacklisted(master)) {
2176 ata_pr_blacklisted(ap, master);
2179 if (ata_dev_present(slave)) {
2180 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2181 if (ata_dma_blacklisted(slave)) {
2183 ata_pr_blacklisted(ap, slave);
2187 else if (shift == ATA_SHIFT_PIO) {
2188 mask = ap->pio_mask;
2189 if (ata_dev_present(master)) {
2190 /* spec doesn't return explicit support for
2191 * PIO0-2, so we fake it
2193 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2198 if (ata_dev_present(slave)) {
2199 /* spec doesn't return explicit support for
2200 * PIO0-2, so we fake it
2202 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2209 mask = 0xffffffff; /* shut up compiler warning */
2216 /* find greatest bit */
2217 static int fgb(u32 bitmap)
2222 for (i = 0; i < 32; i++)
2223 if (bitmap & (1 << i))
2230 * ata_choose_xfer_mode - attempt to find best transfer mode
2231 * @ap: Port for which an xfer mode will be selected
2232 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2233 * @xfer_shift_out: (output) bit shift that selects this mode
2235 * Based on host and device capabilities, determine the
2236 * maximum transfer mode that is amenable to all.
2239 * PCI/etc. bus probe sem.
2242 * Zero on success, negative on error.
2245 static int ata_choose_xfer_mode(const struct ata_port *ap,
2247 unsigned int *xfer_shift_out)
2249 unsigned int mask, shift;
2252 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2253 shift = xfer_mode_classes[i].shift;
2254 mask = ata_get_mode_mask(ap, shift);
2258 *xfer_mode_out = xfer_mode_classes[i].base + x;
2259 *xfer_shift_out = shift;
2268 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2269 * @ap: Port associated with device @dev
2270 * @dev: Device to which command will be sent
2272 * Issue SET FEATURES - XFER MODE command to device @dev
2276 * PCI/etc. bus probe sem.
2279 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2281 DECLARE_COMPLETION(wait);
2282 struct ata_queued_cmd *qc;
2284 unsigned long flags;
2286 /* set up set-features taskfile */
2287 DPRINTK("set features - xfer mode\n");
2289 qc = ata_qc_new_init(ap, dev);
2292 qc->tf.command = ATA_CMD_SET_FEATURES;
2293 qc->tf.feature = SETFEATURES_XFER;
2294 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2295 qc->tf.protocol = ATA_PROT_NODATA;
2296 qc->tf.nsect = dev->xfer_mode;
2298 qc->waiting = &wait;
2299 qc->complete_fn = ata_qc_complete_noop;
2301 spin_lock_irqsave(&ap->host_set->lock, flags);
2302 rc = ata_qc_issue(qc);
2303 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2306 ata_port_disable(ap);
2308 wait_for_completion(&wait);
2314 * ata_dev_reread_id - Reread the device identify device info
2315 * @ap: port where the device is
2316 * @dev: device to reread the identify device info
2321 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2323 DECLARE_COMPLETION(wait);
2324 struct ata_queued_cmd *qc;
2325 unsigned long flags;
2328 qc = ata_qc_new_init(ap, dev);
2331 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
2332 qc->dma_dir = DMA_FROM_DEVICE;
2334 if (dev->class == ATA_DEV_ATA) {
2335 qc->tf.command = ATA_CMD_ID_ATA;
2336 DPRINTK("do ATA identify\n");
2338 qc->tf.command = ATA_CMD_ID_ATAPI;
2339 DPRINTK("do ATAPI identify\n");
2342 qc->tf.flags |= ATA_TFLAG_DEVICE;
2343 qc->tf.protocol = ATA_PROT_PIO;
2346 qc->waiting = &wait;
2347 qc->complete_fn = ata_qc_complete_noop;
2349 spin_lock_irqsave(&ap->host_set->lock, flags);
2350 rc = ata_qc_issue(qc);
2351 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2356 wait_for_completion(&wait);
2358 swap_buf_le16(dev->id, ATA_ID_WORDS);
2366 ata_port_disable(ap);
2370 * ata_dev_init_params - Issue INIT DEV PARAMS command
2371 * @ap: Port associated with device @dev
2372 * @dev: Device to which command will be sent
2377 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2379 DECLARE_COMPLETION(wait);
2380 struct ata_queued_cmd *qc;
2382 unsigned long flags;
2383 u16 sectors = dev->id[6];
2384 u16 heads = dev->id[3];
2386 /* Number of sectors per track 1-255. Number of heads 1-16 */
2387 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2390 /* set up init dev params taskfile */
2391 DPRINTK("init dev params \n");
2393 qc = ata_qc_new_init(ap, dev);
2396 qc->tf.command = ATA_CMD_INIT_DEV_PARAMS;
2397 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2398 qc->tf.protocol = ATA_PROT_NODATA;
2399 qc->tf.nsect = sectors;
2400 qc->tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2402 qc->waiting = &wait;
2403 qc->complete_fn = ata_qc_complete_noop;
2405 spin_lock_irqsave(&ap->host_set->lock, flags);
2406 rc = ata_qc_issue(qc);
2407 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2410 ata_port_disable(ap);
2412 wait_for_completion(&wait);
2418 * ata_sg_clean - Unmap DMA memory associated with command
2419 * @qc: Command containing DMA memory to be released
2421 * Unmap all mapped DMA memory associated with this command.
2424 * spin_lock_irqsave(host_set lock)
2427 static void ata_sg_clean(struct ata_queued_cmd *qc)
2429 struct ata_port *ap = qc->ap;
2430 struct scatterlist *sg = qc->__sg;
2431 int dir = qc->dma_dir;
2432 void *pad_buf = NULL;
2434 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2437 if (qc->flags & ATA_QCFLAG_SINGLE)
2438 assert(qc->n_elem == 1);
2440 DPRINTK("unmapping %u sg elements\n", qc->n_elem);
2442 /* if we padded the buffer out to 32-bit bound, and data
2443 * xfer direction is from-device, we must copy from the
2444 * pad buffer back into the supplied buffer
2446 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2447 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2449 if (qc->flags & ATA_QCFLAG_SG) {
2450 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2451 /* restore last sg */
2452 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2454 struct scatterlist *psg = &qc->pad_sgent;
2455 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2456 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2457 kunmap_atomic(psg->page, KM_IRQ0);
2460 dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]),
2461 sg_dma_len(&sg[0]), dir);
2463 sg->length += qc->pad_len;
2465 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2466 pad_buf, qc->pad_len);
2469 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2474 * ata_fill_sg - Fill PCI IDE PRD table
2475 * @qc: Metadata associated with taskfile to be transferred
2477 * Fill PCI IDE PRD (scatter-gather) table with segments
2478 * associated with the current disk command.
2481 * spin_lock_irqsave(host_set lock)
2484 static void ata_fill_sg(struct ata_queued_cmd *qc)
2486 struct ata_port *ap = qc->ap;
2487 struct scatterlist *sg;
2490 assert(qc->__sg != NULL);
2491 assert(qc->n_elem > 0);
2494 ata_for_each_sg(sg, qc) {
2498 /* determine if physical DMA addr spans 64K boundary.
2499 * Note h/w doesn't support 64-bit, so we unconditionally
2500 * truncate dma_addr_t to u32.
2502 addr = (u32) sg_dma_address(sg);
2503 sg_len = sg_dma_len(sg);
2506 offset = addr & 0xffff;
2508 if ((offset + sg_len) > 0x10000)
2509 len = 0x10000 - offset;
2511 ap->prd[idx].addr = cpu_to_le32(addr);
2512 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2513 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2522 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2525 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2526 * @qc: Metadata associated with taskfile to check
2528 * Allow low-level driver to filter ATA PACKET commands, returning
2529 * a status indicating whether or not it is OK to use DMA for the
2530 * supplied PACKET command.
2533 * spin_lock_irqsave(host_set lock)
2535 * RETURNS: 0 when ATAPI DMA can be used
2538 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2540 struct ata_port *ap = qc->ap;
2541 int rc = 0; /* Assume ATAPI DMA is OK by default */
2543 if (ap->ops->check_atapi_dma)
2544 rc = ap->ops->check_atapi_dma(qc);
2549 * ata_qc_prep - Prepare taskfile for submission
2550 * @qc: Metadata associated with taskfile to be prepared
2552 * Prepare ATA taskfile for submission.
2555 * spin_lock_irqsave(host_set lock)
2557 void ata_qc_prep(struct ata_queued_cmd *qc)
2559 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2566 * ata_sg_init_one - Associate command with memory buffer
2567 * @qc: Command to be associated
2568 * @buf: Memory buffer
2569 * @buflen: Length of memory buffer, in bytes.
2571 * Initialize the data-related elements of queued_cmd @qc
2572 * to point to a single memory buffer, @buf of byte length @buflen.
2575 * spin_lock_irqsave(host_set lock)
2578 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2580 struct scatterlist *sg;
2582 qc->flags |= ATA_QCFLAG_SINGLE;
2584 memset(&qc->sgent, 0, sizeof(qc->sgent));
2585 qc->__sg = &qc->sgent;
2587 qc->orig_n_elem = 1;
2591 sg_init_one(sg, buf, buflen);
2595 * ata_sg_init - Associate command with scatter-gather table.
2596 * @qc: Command to be associated
2597 * @sg: Scatter-gather table.
2598 * @n_elem: Number of elements in s/g table.
2600 * Initialize the data-related elements of queued_cmd @qc
2601 * to point to a scatter-gather table @sg, containing @n_elem
2605 * spin_lock_irqsave(host_set lock)
2608 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2609 unsigned int n_elem)
2611 qc->flags |= ATA_QCFLAG_SG;
2613 qc->n_elem = n_elem;
2614 qc->orig_n_elem = n_elem;
2618 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2619 * @qc: Command with memory buffer to be mapped.
2621 * DMA-map the memory buffer associated with queued_cmd @qc.
2624 * spin_lock_irqsave(host_set lock)
2627 * Zero on success, negative on error.
2630 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2632 struct ata_port *ap = qc->ap;
2633 int dir = qc->dma_dir;
2634 struct scatterlist *sg = qc->__sg;
2635 dma_addr_t dma_address;
2637 /* we must lengthen transfers to end on a 32-bit boundary */
2638 qc->pad_len = sg->length & 3;
2640 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2641 struct scatterlist *psg = &qc->pad_sgent;
2643 assert(qc->dev->class == ATA_DEV_ATAPI);
2645 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2647 if (qc->tf.flags & ATA_TFLAG_WRITE)
2648 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2651 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2652 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2654 sg->length -= qc->pad_len;
2656 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2657 sg->length, qc->pad_len);
2660 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2662 if (dma_mapping_error(dma_address))
2665 sg_dma_address(sg) = dma_address;
2666 sg_dma_len(sg) = sg->length;
2668 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2669 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2675 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2676 * @qc: Command with scatter-gather table to be mapped.
2678 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2681 * spin_lock_irqsave(host_set lock)
2684 * Zero on success, negative on error.
2688 static int ata_sg_setup(struct ata_queued_cmd *qc)
2690 struct ata_port *ap = qc->ap;
2691 struct scatterlist *sg = qc->__sg;
2692 struct scatterlist *lsg = &sg[qc->n_elem - 1];
2695 VPRINTK("ENTER, ata%u\n", ap->id);
2696 assert(qc->flags & ATA_QCFLAG_SG);
2698 /* we must lengthen transfers to end on a 32-bit boundary */
2699 qc->pad_len = lsg->length & 3;
2701 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2702 struct scatterlist *psg = &qc->pad_sgent;
2703 unsigned int offset;
2705 assert(qc->dev->class == ATA_DEV_ATAPI);
2707 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2710 * psg->page/offset are used to copy to-be-written
2711 * data in this function or read data in ata_sg_clean.
2713 offset = lsg->offset + lsg->length - qc->pad_len;
2714 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2715 psg->offset = offset_in_page(offset);
2717 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2718 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2719 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
2720 kunmap_atomic(psg->page, KM_IRQ0);
2723 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2724 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2726 lsg->length -= qc->pad_len;
2728 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2729 qc->n_elem - 1, lsg->length, qc->pad_len);
2733 n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2737 DPRINTK("%d sg elements mapped\n", n_elem);
2739 qc->n_elem = n_elem;
2745 * ata_poll_qc_complete - turn irq back on and finish qc
2746 * @qc: Command to complete
2747 * @drv_stat: ATA status register content
2750 * None. (grabs host lock)
2753 void ata_poll_qc_complete(struct ata_queued_cmd *qc, unsigned int err_mask)
2755 struct ata_port *ap = qc->ap;
2756 unsigned long flags;
2758 spin_lock_irqsave(&ap->host_set->lock, flags);
2759 ap->flags &= ~ATA_FLAG_NOINTR;
2761 ata_qc_complete(qc, err_mask);
2762 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2767 * @ap: the target ata_port
2770 * None. (executing in kernel thread context)
2773 * timeout value to use
2776 static unsigned long ata_pio_poll(struct ata_port *ap)
2779 unsigned int poll_state = HSM_ST_UNKNOWN;
2780 unsigned int reg_state = HSM_ST_UNKNOWN;
2781 const unsigned int tmout_state = HSM_ST_TMOUT;
2783 switch (ap->hsm_task_state) {
2786 poll_state = HSM_ST_POLL;
2790 case HSM_ST_LAST_POLL:
2791 poll_state = HSM_ST_LAST_POLL;
2792 reg_state = HSM_ST_LAST;
2799 status = ata_chk_status(ap);
2800 if (status & ATA_BUSY) {
2801 if (time_after(jiffies, ap->pio_task_timeout)) {
2802 ap->hsm_task_state = tmout_state;
2805 ap->hsm_task_state = poll_state;
2806 return ATA_SHORT_PAUSE;
2809 ap->hsm_task_state = reg_state;
2814 * ata_pio_complete - check if drive is busy or idle
2815 * @ap: the target ata_port
2818 * None. (executing in kernel thread context)
2821 * Non-zero if qc completed, zero otherwise.
2824 static int ata_pio_complete (struct ata_port *ap)
2826 struct ata_queued_cmd *qc;
2830 * This is purely heuristic. This is a fast path. Sometimes when
2831 * we enter, BSY will be cleared in a chk-status or two. If not,
2832 * the drive is probably seeking or something. Snooze for a couple
2833 * msecs, then chk-status again. If still busy, fall back to
2834 * HSM_ST_POLL state.
2836 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2837 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2839 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2840 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2841 ap->hsm_task_state = HSM_ST_LAST_POLL;
2842 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2847 drv_stat = ata_wait_idle(ap);
2848 if (!ata_ok(drv_stat)) {
2849 ap->hsm_task_state = HSM_ST_ERR;
2853 qc = ata_qc_from_tag(ap, ap->active_tag);
2856 ap->hsm_task_state = HSM_ST_IDLE;
2858 ata_poll_qc_complete(qc, 0);
2860 /* another command may start at this point */
2867 * swap_buf_le16 - swap halves of 16-words in place
2868 * @buf: Buffer to swap
2869 * @buf_words: Number of 16-bit words in buffer.
2871 * Swap halves of 16-bit words if needed to convert from
2872 * little-endian byte order to native cpu byte order, or
2876 * Inherited from caller.
2878 void swap_buf_le16(u16 *buf, unsigned int buf_words)
2883 for (i = 0; i < buf_words; i++)
2884 buf[i] = le16_to_cpu(buf[i]);
2885 #endif /* __BIG_ENDIAN */
2889 * ata_mmio_data_xfer - Transfer data by MMIO
2890 * @ap: port to read/write
2892 * @buflen: buffer length
2893 * @write_data: read/write
2895 * Transfer data from/to the device data register by MMIO.
2898 * Inherited from caller.
2901 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2902 unsigned int buflen, int write_data)
2905 unsigned int words = buflen >> 1;
2906 u16 *buf16 = (u16 *) buf;
2907 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2909 /* Transfer multiple of 2 bytes */
2911 for (i = 0; i < words; i++)
2912 writew(le16_to_cpu(buf16[i]), mmio);
2914 for (i = 0; i < words; i++)
2915 buf16[i] = cpu_to_le16(readw(mmio));
2918 /* Transfer trailing 1 byte, if any. */
2919 if (unlikely(buflen & 0x01)) {
2920 u16 align_buf[1] = { 0 };
2921 unsigned char *trailing_buf = buf + buflen - 1;
2924 memcpy(align_buf, trailing_buf, 1);
2925 writew(le16_to_cpu(align_buf[0]), mmio);
2927 align_buf[0] = cpu_to_le16(readw(mmio));
2928 memcpy(trailing_buf, align_buf, 1);
2934 * ata_pio_data_xfer - Transfer data by PIO
2935 * @ap: port to read/write
2937 * @buflen: buffer length
2938 * @write_data: read/write
2940 * Transfer data from/to the device data register by PIO.
2943 * Inherited from caller.
2946 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2947 unsigned int buflen, int write_data)
2949 unsigned int words = buflen >> 1;
2951 /* Transfer multiple of 2 bytes */
2953 outsw(ap->ioaddr.data_addr, buf, words);
2955 insw(ap->ioaddr.data_addr, buf, words);
2957 /* Transfer trailing 1 byte, if any. */
2958 if (unlikely(buflen & 0x01)) {
2959 u16 align_buf[1] = { 0 };
2960 unsigned char *trailing_buf = buf + buflen - 1;
2963 memcpy(align_buf, trailing_buf, 1);
2964 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
2966 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
2967 memcpy(trailing_buf, align_buf, 1);
2973 * ata_data_xfer - Transfer data from/to the data register.
2974 * @ap: port to read/write
2976 * @buflen: buffer length
2977 * @do_write: read/write
2979 * Transfer data from/to the device data register.
2982 * Inherited from caller.
2985 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
2986 unsigned int buflen, int do_write)
2988 if (ap->flags & ATA_FLAG_MMIO)
2989 ata_mmio_data_xfer(ap, buf, buflen, do_write);
2991 ata_pio_data_xfer(ap, buf, buflen, do_write);
2995 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
2996 * @qc: Command on going
2998 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3001 * Inherited from caller.
3004 static void ata_pio_sector(struct ata_queued_cmd *qc)
3006 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3007 struct scatterlist *sg = qc->__sg;
3008 struct ata_port *ap = qc->ap;
3010 unsigned int offset;
3013 if (qc->cursect == (qc->nsect - 1))
3014 ap->hsm_task_state = HSM_ST_LAST;
3016 page = sg[qc->cursg].page;
3017 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3019 /* get the current page and offset */
3020 page = nth_page(page, (offset >> PAGE_SHIFT));
3021 offset %= PAGE_SIZE;
3023 buf = kmap(page) + offset;
3028 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3033 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3035 /* do the actual data transfer */
3036 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3037 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3043 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3044 * @qc: Command on going
3045 * @bytes: number of bytes
3047 * Transfer Transfer data from/to the ATAPI device.
3050 * Inherited from caller.
3054 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3056 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3057 struct scatterlist *sg = qc->__sg;
3058 struct ata_port *ap = qc->ap;
3061 unsigned int offset, count;
3063 if (qc->curbytes + bytes >= qc->nbytes)
3064 ap->hsm_task_state = HSM_ST_LAST;
3067 if (unlikely(qc->cursg >= qc->n_elem)) {
3069 * The end of qc->sg is reached and the device expects
3070 * more data to transfer. In order not to overrun qc->sg
3071 * and fulfill length specified in the byte count register,
3072 * - for read case, discard trailing data from the device
3073 * - for write case, padding zero data to the device
3075 u16 pad_buf[1] = { 0 };
3076 unsigned int words = bytes >> 1;
3079 if (words) /* warning if bytes > 1 */
3080 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3083 for (i = 0; i < words; i++)
3084 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3086 ap->hsm_task_state = HSM_ST_LAST;
3090 sg = &qc->__sg[qc->cursg];
3093 offset = sg->offset + qc->cursg_ofs;
3095 /* get the current page and offset */
3096 page = nth_page(page, (offset >> PAGE_SHIFT));
3097 offset %= PAGE_SIZE;
3099 /* don't overrun current sg */
3100 count = min(sg->length - qc->cursg_ofs, bytes);
3102 /* don't cross page boundaries */
3103 count = min(count, (unsigned int)PAGE_SIZE - offset);
3105 buf = kmap(page) + offset;
3108 qc->curbytes += count;
3109 qc->cursg_ofs += count;
3111 if (qc->cursg_ofs == sg->length) {
3116 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3118 /* do the actual data transfer */
3119 ata_data_xfer(ap, buf, count, do_write);
3128 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3129 * @qc: Command on going
3131 * Transfer Transfer data from/to the ATAPI device.
3134 * Inherited from caller.
3137 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3139 struct ata_port *ap = qc->ap;
3140 struct ata_device *dev = qc->dev;
3141 unsigned int ireason, bc_lo, bc_hi, bytes;
3142 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3144 ap->ops->tf_read(ap, &qc->tf);
3145 ireason = qc->tf.nsect;
3146 bc_lo = qc->tf.lbam;
3147 bc_hi = qc->tf.lbah;
3148 bytes = (bc_hi << 8) | bc_lo;
3150 /* shall be cleared to zero, indicating xfer of data */
3151 if (ireason & (1 << 0))
3154 /* make sure transfer direction matches expected */
3155 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3156 if (do_write != i_write)
3159 __atapi_pio_bytes(qc, bytes);
3164 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3165 ap->id, dev->devno);
3166 ap->hsm_task_state = HSM_ST_ERR;
3170 * ata_pio_block - start PIO on a block
3171 * @ap: the target ata_port
3174 * None. (executing in kernel thread context)
3177 static void ata_pio_block(struct ata_port *ap)
3179 struct ata_queued_cmd *qc;
3183 * This is purely heuristic. This is a fast path.
3184 * Sometimes when we enter, BSY will be cleared in
3185 * a chk-status or two. If not, the drive is probably seeking
3186 * or something. Snooze for a couple msecs, then
3187 * chk-status again. If still busy, fall back to
3188 * HSM_ST_POLL state.
3190 status = ata_busy_wait(ap, ATA_BUSY, 5);
3191 if (status & ATA_BUSY) {
3193 status = ata_busy_wait(ap, ATA_BUSY, 10);
3194 if (status & ATA_BUSY) {
3195 ap->hsm_task_state = HSM_ST_POLL;
3196 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3201 qc = ata_qc_from_tag(ap, ap->active_tag);
3204 if (is_atapi_taskfile(&qc->tf)) {
3205 /* no more data to transfer or unsupported ATAPI command */
3206 if ((status & ATA_DRQ) == 0) {
3207 ap->hsm_task_state = HSM_ST_LAST;
3211 atapi_pio_bytes(qc);
3213 /* handle BSY=0, DRQ=0 as error */
3214 if ((status & ATA_DRQ) == 0) {
3215 ap->hsm_task_state = HSM_ST_ERR;
3223 static void ata_pio_error(struct ata_port *ap)
3225 struct ata_queued_cmd *qc;
3227 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3229 qc = ata_qc_from_tag(ap, ap->active_tag);
3232 ap->hsm_task_state = HSM_ST_IDLE;
3234 ata_poll_qc_complete(qc, AC_ERR_ATA_BUS);
3237 static void ata_pio_task(void *_data)
3239 struct ata_port *ap = _data;
3240 unsigned long timeout;
3247 switch (ap->hsm_task_state) {
3256 qc_completed = ata_pio_complete(ap);
3260 case HSM_ST_LAST_POLL:
3261 timeout = ata_pio_poll(ap);
3271 queue_delayed_work(ata_wq, &ap->pio_task, timeout);
3272 else if (!qc_completed)
3277 * ata_qc_timeout - Handle timeout of queued command
3278 * @qc: Command that timed out
3280 * Some part of the kernel (currently, only the SCSI layer)
3281 * has noticed that the active command on port @ap has not
3282 * completed after a specified length of time. Handle this
3283 * condition by disabling DMA (if necessary) and completing
3284 * transactions, with error if necessary.
3286 * This also handles the case of the "lost interrupt", where
3287 * for some reason (possibly hardware bug, possibly driver bug)
3288 * an interrupt was not delivered to the driver, even though the
3289 * transaction completed successfully.
3292 * Inherited from SCSI layer (none, can sleep)
3295 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3297 struct ata_port *ap = qc->ap;
3298 struct ata_host_set *host_set = ap->host_set;
3299 struct ata_device *dev = qc->dev;
3300 u8 host_stat = 0, drv_stat;
3301 unsigned long flags;
3305 /* FIXME: doesn't this conflict with timeout handling? */
3306 if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) {
3307 struct scsi_cmnd *cmd = qc->scsicmd;
3309 if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) {
3311 /* finish completing original command */
3312 spin_lock_irqsave(&host_set->lock, flags);
3313 __ata_qc_complete(qc);
3314 spin_unlock_irqrestore(&host_set->lock, flags);
3316 atapi_request_sense(ap, dev, cmd);
3318 cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16);
3319 scsi_finish_command(cmd);
3325 spin_lock_irqsave(&host_set->lock, flags);
3327 /* hack alert! We cannot use the supplied completion
3328 * function from inside the ->eh_strategy_handler() thread.
3329 * libata is the only user of ->eh_strategy_handler() in
3330 * any kernel, so the default scsi_done() assumes it is
3331 * not being called from the SCSI EH.
3333 qc->scsidone = scsi_finish_command;
3335 switch (qc->tf.protocol) {
3338 case ATA_PROT_ATAPI_DMA:
3339 host_stat = ap->ops->bmdma_status(ap);
3341 /* before we do anything else, clear DMA-Start bit */
3342 ap->ops->bmdma_stop(qc);
3348 drv_stat = ata_chk_status(ap);
3350 /* ack bmdma irq events */
3351 ap->ops->irq_clear(ap);
3353 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3354 ap->id, qc->tf.command, drv_stat, host_stat);
3356 /* complete taskfile transaction */
3357 ata_qc_complete(qc, ac_err_mask(drv_stat));
3361 spin_unlock_irqrestore(&host_set->lock, flags);
3368 * ata_eng_timeout - Handle timeout of queued command
3369 * @ap: Port on which timed-out command is active
3371 * Some part of the kernel (currently, only the SCSI layer)
3372 * has noticed that the active command on port @ap has not
3373 * completed after a specified length of time. Handle this
3374 * condition by disabling DMA (if necessary) and completing
3375 * transactions, with error if necessary.
3377 * This also handles the case of the "lost interrupt", where
3378 * for some reason (possibly hardware bug, possibly driver bug)
3379 * an interrupt was not delivered to the driver, even though the
3380 * transaction completed successfully.
3383 * Inherited from SCSI layer (none, can sleep)
3386 void ata_eng_timeout(struct ata_port *ap)
3388 struct ata_queued_cmd *qc;
3392 qc = ata_qc_from_tag(ap, ap->active_tag);
3396 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3406 * ata_qc_new - Request an available ATA command, for queueing
3407 * @ap: Port associated with device @dev
3408 * @dev: Device from whom we request an available command structure
3414 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3416 struct ata_queued_cmd *qc = NULL;
3419 for (i = 0; i < ATA_MAX_QUEUE; i++)
3420 if (!test_and_set_bit(i, &ap->qactive)) {
3421 qc = ata_qc_from_tag(ap, i);
3432 * ata_qc_new_init - Request an available ATA command, and initialize it
3433 * @ap: Port associated with device @dev
3434 * @dev: Device from whom we request an available command structure
3440 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3441 struct ata_device *dev)
3443 struct ata_queued_cmd *qc;
3445 qc = ata_qc_new(ap);
3452 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
3454 qc->nbytes = qc->curbytes = 0;
3456 ata_tf_init(ap, &qc->tf, dev->devno);
3462 int ata_qc_complete_noop(struct ata_queued_cmd *qc, unsigned int err_mask)
3467 static void __ata_qc_complete(struct ata_queued_cmd *qc)
3469 struct ata_port *ap = qc->ap;
3470 unsigned int tag, do_clear = 0;
3474 if (likely(ata_tag_valid(tag))) {
3475 if (tag == ap->active_tag)
3476 ap->active_tag = ATA_TAG_POISON;
3477 qc->tag = ATA_TAG_POISON;
3482 struct completion *waiting = qc->waiting;
3487 if (likely(do_clear))
3488 clear_bit(tag, &ap->qactive);
3492 * ata_qc_free - free unused ata_queued_cmd
3493 * @qc: Command to complete
3495 * Designed to free unused ata_queued_cmd object
3496 * in case something prevents using it.
3499 * spin_lock_irqsave(host_set lock)
3501 void ata_qc_free(struct ata_queued_cmd *qc)
3503 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3504 assert(qc->waiting == NULL); /* nothing should be waiting */
3506 __ata_qc_complete(qc);
3510 * ata_qc_complete - Complete an active ATA command
3511 * @qc: Command to complete
3512 * @drv_stat: ATA Status register contents
3514 * Indicate to the mid and upper layers that an ATA
3515 * command has completed, with either an ok or not-ok status.
3518 * spin_lock_irqsave(host_set lock)
3521 void ata_qc_complete(struct ata_queued_cmd *qc, unsigned int err_mask)
3525 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3526 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3528 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3531 /* atapi: mark qc as inactive to prevent the interrupt handler
3532 * from completing the command twice later, before the error handler
3533 * is called. (when rc != 0 and atapi request sense is needed)
3535 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3537 /* call completion callback */
3538 rc = qc->complete_fn(qc, err_mask);
3540 /* if callback indicates not to complete command (non-zero),
3541 * return immediately
3546 __ata_qc_complete(qc);
3551 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3553 struct ata_port *ap = qc->ap;
3555 switch (qc->tf.protocol) {
3557 case ATA_PROT_ATAPI_DMA:
3560 case ATA_PROT_ATAPI:
3562 case ATA_PROT_PIO_MULT:
3563 if (ap->flags & ATA_FLAG_PIO_DMA)
3576 * ata_qc_issue - issue taskfile to device
3577 * @qc: command to issue to device
3579 * Prepare an ATA command to submission to device.
3580 * This includes mapping the data into a DMA-able
3581 * area, filling in the S/G table, and finally
3582 * writing the taskfile to hardware, starting the command.
3585 * spin_lock_irqsave(host_set lock)
3588 * Zero on success, negative on error.
3591 int ata_qc_issue(struct ata_queued_cmd *qc)
3593 struct ata_port *ap = qc->ap;
3595 if (ata_should_dma_map(qc)) {
3596 if (qc->flags & ATA_QCFLAG_SG) {
3597 if (ata_sg_setup(qc))
3599 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3600 if (ata_sg_setup_one(qc))
3604 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3607 ap->ops->qc_prep(qc);
3609 qc->ap->active_tag = qc->tag;
3610 qc->flags |= ATA_QCFLAG_ACTIVE;
3612 return ap->ops->qc_issue(qc);
3620 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3621 * @qc: command to issue to device
3623 * Using various libata functions and hooks, this function
3624 * starts an ATA command. ATA commands are grouped into
3625 * classes called "protocols", and issuing each type of protocol
3626 * is slightly different.
3628 * May be used as the qc_issue() entry in ata_port_operations.
3631 * spin_lock_irqsave(host_set lock)
3634 * Zero on success, negative on error.
3637 int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3639 struct ata_port *ap = qc->ap;
3641 ata_dev_select(ap, qc->dev->devno, 1, 0);
3643 switch (qc->tf.protocol) {
3644 case ATA_PROT_NODATA:
3645 ata_tf_to_host_nolock(ap, &qc->tf);
3649 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3650 ap->ops->bmdma_setup(qc); /* set up bmdma */
3651 ap->ops->bmdma_start(qc); /* initiate bmdma */
3654 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3655 ata_qc_set_polling(qc);
3656 ata_tf_to_host_nolock(ap, &qc->tf);
3657 ap->hsm_task_state = HSM_ST;
3658 queue_work(ata_wq, &ap->pio_task);
3661 case ATA_PROT_ATAPI:
3662 ata_qc_set_polling(qc);
3663 ata_tf_to_host_nolock(ap, &qc->tf);
3664 queue_work(ata_wq, &ap->packet_task);
3667 case ATA_PROT_ATAPI_NODATA:
3668 ap->flags |= ATA_FLAG_NOINTR;
3669 ata_tf_to_host_nolock(ap, &qc->tf);
3670 queue_work(ata_wq, &ap->packet_task);
3673 case ATA_PROT_ATAPI_DMA:
3674 ap->flags |= ATA_FLAG_NOINTR;
3675 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3676 ap->ops->bmdma_setup(qc); /* set up bmdma */
3677 queue_work(ata_wq, &ap->packet_task);
3689 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
3690 * @qc: Info associated with this ATA transaction.
3693 * spin_lock_irqsave(host_set lock)
3696 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3698 struct ata_port *ap = qc->ap;
3699 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3701 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3703 /* load PRD table addr. */
3704 mb(); /* make sure PRD table writes are visible to controller */
3705 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3707 /* specify data direction, triple-check start bit is clear */
3708 dmactl = readb(mmio + ATA_DMA_CMD);
3709 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3711 dmactl |= ATA_DMA_WR;
3712 writeb(dmactl, mmio + ATA_DMA_CMD);
3714 /* issue r/w command */
3715 ap->ops->exec_command(ap, &qc->tf);
3719 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
3720 * @qc: Info associated with this ATA transaction.
3723 * spin_lock_irqsave(host_set lock)
3726 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3728 struct ata_port *ap = qc->ap;
3729 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3732 /* start host DMA transaction */
3733 dmactl = readb(mmio + ATA_DMA_CMD);
3734 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3736 /* Strictly, one may wish to issue a readb() here, to
3737 * flush the mmio write. However, control also passes
3738 * to the hardware at this point, and it will interrupt
3739 * us when we are to resume control. So, in effect,
3740 * we don't care when the mmio write flushes.
3741 * Further, a read of the DMA status register _immediately_
3742 * following the write may not be what certain flaky hardware
3743 * is expected, so I think it is best to not add a readb()
3744 * without first all the MMIO ATA cards/mobos.
3745 * Or maybe I'm just being paranoid.
3750 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3751 * @qc: Info associated with this ATA transaction.
3754 * spin_lock_irqsave(host_set lock)
3757 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3759 struct ata_port *ap = qc->ap;
3760 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3763 /* load PRD table addr. */
3764 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3766 /* specify data direction, triple-check start bit is clear */
3767 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3768 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3770 dmactl |= ATA_DMA_WR;
3771 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3773 /* issue r/w command */
3774 ap->ops->exec_command(ap, &qc->tf);
3778 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3779 * @qc: Info associated with this ATA transaction.
3782 * spin_lock_irqsave(host_set lock)
3785 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3787 struct ata_port *ap = qc->ap;
3790 /* start host DMA transaction */
3791 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3792 outb(dmactl | ATA_DMA_START,
3793 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3798 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3799 * @qc: Info associated with this ATA transaction.
3801 * Writes the ATA_DMA_START flag to the DMA command register.
3803 * May be used as the bmdma_start() entry in ata_port_operations.
3806 * spin_lock_irqsave(host_set lock)
3808 void ata_bmdma_start(struct ata_queued_cmd *qc)
3810 if (qc->ap->flags & ATA_FLAG_MMIO)
3811 ata_bmdma_start_mmio(qc);
3813 ata_bmdma_start_pio(qc);
3818 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3819 * @qc: Info associated with this ATA transaction.
3821 * Writes address of PRD table to device's PRD Table Address
3822 * register, sets the DMA control register, and calls
3823 * ops->exec_command() to start the transfer.
3825 * May be used as the bmdma_setup() entry in ata_port_operations.
3828 * spin_lock_irqsave(host_set lock)
3830 void ata_bmdma_setup(struct ata_queued_cmd *qc)
3832 if (qc->ap->flags & ATA_FLAG_MMIO)
3833 ata_bmdma_setup_mmio(qc);
3835 ata_bmdma_setup_pio(qc);
3840 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
3841 * @ap: Port associated with this ATA transaction.
3843 * Clear interrupt and error flags in DMA status register.
3845 * May be used as the irq_clear() entry in ata_port_operations.
3848 * spin_lock_irqsave(host_set lock)
3851 void ata_bmdma_irq_clear(struct ata_port *ap)
3853 if (ap->flags & ATA_FLAG_MMIO) {
3854 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3855 writeb(readb(mmio), mmio);
3857 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3858 outb(inb(addr), addr);
3865 * ata_bmdma_status - Read PCI IDE BMDMA status
3866 * @ap: Port associated with this ATA transaction.
3868 * Read and return BMDMA status register.
3870 * May be used as the bmdma_status() entry in ata_port_operations.
3873 * spin_lock_irqsave(host_set lock)
3876 u8 ata_bmdma_status(struct ata_port *ap)
3879 if (ap->flags & ATA_FLAG_MMIO) {
3880 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3881 host_stat = readb(mmio + ATA_DMA_STATUS);
3883 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3889 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3890 * @qc: Command we are ending DMA for
3892 * Clears the ATA_DMA_START flag in the dma control register
3894 * May be used as the bmdma_stop() entry in ata_port_operations.
3897 * spin_lock_irqsave(host_set lock)
3900 void ata_bmdma_stop(struct ata_queued_cmd *qc)
3902 struct ata_port *ap = qc->ap;
3903 if (ap->flags & ATA_FLAG_MMIO) {
3904 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3906 /* clear start/stop bit */
3907 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3908 mmio + ATA_DMA_CMD);
3910 /* clear start/stop bit */
3911 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
3912 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3915 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3916 ata_altstatus(ap); /* dummy read */
3920 * ata_host_intr - Handle host interrupt for given (port, task)
3921 * @ap: Port on which interrupt arrived (possibly...)
3922 * @qc: Taskfile currently active in engine
3924 * Handle host interrupt for given queued command. Currently,
3925 * only DMA interrupts are handled. All other commands are
3926 * handled via polling with interrupts disabled (nIEN bit).
3929 * spin_lock_irqsave(host_set lock)
3932 * One if interrupt was handled, zero if not (shared irq).
3935 inline unsigned int ata_host_intr (struct ata_port *ap,
3936 struct ata_queued_cmd *qc)
3938 u8 status, host_stat;
3940 switch (qc->tf.protocol) {
3943 case ATA_PROT_ATAPI_DMA:
3944 case ATA_PROT_ATAPI:
3945 /* check status of DMA engine */
3946 host_stat = ap->ops->bmdma_status(ap);
3947 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
3949 /* if it's not our irq... */
3950 if (!(host_stat & ATA_DMA_INTR))
3953 /* before we do anything else, clear DMA-Start bit */
3954 ap->ops->bmdma_stop(qc);
3958 case ATA_PROT_ATAPI_NODATA:
3959 case ATA_PROT_NODATA:
3960 /* check altstatus */
3961 status = ata_altstatus(ap);
3962 if (status & ATA_BUSY)
3965 /* check main status, clearing INTRQ */
3966 status = ata_chk_status(ap);
3967 if (unlikely(status & ATA_BUSY))
3969 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
3970 ap->id, qc->tf.protocol, status);
3972 /* ack bmdma irq events */
3973 ap->ops->irq_clear(ap);
3975 /* complete taskfile transaction */
3976 ata_qc_complete(qc, ac_err_mask(status));
3983 return 1; /* irq handled */
3986 ap->stats.idle_irq++;
3989 if ((ap->stats.idle_irq % 1000) == 0) {
3991 ata_irq_ack(ap, 0); /* debug trap */
3992 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
3995 return 0; /* irq not handled */
3999 * ata_interrupt - Default ATA host interrupt handler
4000 * @irq: irq line (unused)
4001 * @dev_instance: pointer to our ata_host_set information structure
4004 * Default interrupt handler for PCI IDE devices. Calls
4005 * ata_host_intr() for each port that is not disabled.
4008 * Obtains host_set lock during operation.
4011 * IRQ_NONE or IRQ_HANDLED.
4014 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4016 struct ata_host_set *host_set = dev_instance;
4018 unsigned int handled = 0;
4019 unsigned long flags;
4021 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4022 spin_lock_irqsave(&host_set->lock, flags);
4024 for (i = 0; i < host_set->n_ports; i++) {
4025 struct ata_port *ap;
4027 ap = host_set->ports[i];
4029 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
4030 struct ata_queued_cmd *qc;
4032 qc = ata_qc_from_tag(ap, ap->active_tag);
4033 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4034 (qc->flags & ATA_QCFLAG_ACTIVE))
4035 handled |= ata_host_intr(ap, qc);
4039 spin_unlock_irqrestore(&host_set->lock, flags);
4041 return IRQ_RETVAL(handled);
4045 * atapi_packet_task - Write CDB bytes to hardware
4046 * @_data: Port to which ATAPI device is attached.
4048 * When device has indicated its readiness to accept
4049 * a CDB, this function is called. Send the CDB.
4050 * If DMA is to be performed, exit immediately.
4051 * Otherwise, we are in polling mode, so poll
4052 * status under operation succeeds or fails.
4055 * Kernel thread context (may sleep)
4058 static void atapi_packet_task(void *_data)
4060 struct ata_port *ap = _data;
4061 struct ata_queued_cmd *qc;
4064 qc = ata_qc_from_tag(ap, ap->active_tag);
4066 assert(qc->flags & ATA_QCFLAG_ACTIVE);
4068 /* sleep-wait for BSY to clear */
4069 DPRINTK("busy wait\n");
4070 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB))
4071 goto err_out_status;
4073 /* make sure DRQ is set */
4074 status = ata_chk_status(ap);
4075 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)
4079 DPRINTK("send cdb\n");
4080 assert(ap->cdb_len >= 12);
4082 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4083 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4084 unsigned long flags;
4086 /* Once we're done issuing command and kicking bmdma,
4087 * irq handler takes over. To not lose irq, we need
4088 * to clear NOINTR flag before sending cdb, but
4089 * interrupt handler shouldn't be invoked before we're
4090 * finished. Hence, the following locking.
4092 spin_lock_irqsave(&ap->host_set->lock, flags);
4093 ap->flags &= ~ATA_FLAG_NOINTR;
4094 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4095 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4096 ap->ops->bmdma_start(qc); /* initiate bmdma */
4097 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4099 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4101 /* PIO commands are handled by polling */
4102 ap->hsm_task_state = HSM_ST;
4103 queue_work(ata_wq, &ap->pio_task);
4109 status = ata_chk_status(ap);
4111 ata_poll_qc_complete(qc, __ac_err_mask(status));
4116 * ata_port_start - Set port up for dma.
4117 * @ap: Port to initialize
4119 * Called just after data structures for each port are
4120 * initialized. Allocates space for PRD table.
4122 * May be used as the port_start() entry in ata_port_operations.
4125 * Inherited from caller.
4128 int ata_port_start (struct ata_port *ap)
4130 struct device *dev = ap->host_set->dev;
4132 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4136 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ, &ap->pad_dma, GFP_KERNEL);
4138 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4142 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4149 * ata_port_stop - Undo ata_port_start()
4150 * @ap: Port to shut down
4152 * Frees the PRD table.
4154 * May be used as the port_stop() entry in ata_port_operations.
4157 * Inherited from caller.
4160 void ata_port_stop (struct ata_port *ap)
4162 struct device *dev = ap->host_set->dev;
4164 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4165 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
4168 void ata_host_stop (struct ata_host_set *host_set)
4170 if (host_set->mmio_base)
4171 iounmap(host_set->mmio_base);
4176 * ata_host_remove - Unregister SCSI host structure with upper layers
4177 * @ap: Port to unregister
4178 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4181 * Inherited from caller.
4184 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4186 struct Scsi_Host *sh = ap->host;
4191 scsi_remove_host(sh);
4193 ap->ops->port_stop(ap);
4197 * ata_host_init - Initialize an ata_port structure
4198 * @ap: Structure to initialize
4199 * @host: associated SCSI mid-layer structure
4200 * @host_set: Collection of hosts to which @ap belongs
4201 * @ent: Probe information provided by low-level driver
4202 * @port_no: Port number associated with this ata_port
4204 * Initialize a new ata_port structure, and its associated
4208 * Inherited from caller.
4211 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4212 struct ata_host_set *host_set,
4213 const struct ata_probe_ent *ent, unsigned int port_no)
4219 host->max_channel = 1;
4220 host->unique_id = ata_unique_id++;
4221 host->max_cmd_len = 12;
4223 scsi_assign_lock(host, &host_set->lock);
4225 ap->flags = ATA_FLAG_PORT_DISABLED;
4226 ap->id = host->unique_id;
4228 ap->ctl = ATA_DEVCTL_OBS;
4229 ap->host_set = host_set;
4230 ap->port_no = port_no;
4232 ent->legacy_mode ? ent->hard_port_no : port_no;
4233 ap->pio_mask = ent->pio_mask;
4234 ap->mwdma_mask = ent->mwdma_mask;
4235 ap->udma_mask = ent->udma_mask;
4236 ap->flags |= ent->host_flags;
4237 ap->ops = ent->port_ops;
4238 ap->cbl = ATA_CBL_NONE;
4239 ap->active_tag = ATA_TAG_POISON;
4240 ap->last_ctl = 0xFF;
4242 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4243 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4245 for (i = 0; i < ATA_MAX_DEVICES; i++)
4246 ap->device[i].devno = i;
4249 ap->stats.unhandled_irq = 1;
4250 ap->stats.idle_irq = 1;
4253 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4257 * ata_host_add - Attach low-level ATA driver to system
4258 * @ent: Information provided by low-level driver
4259 * @host_set: Collections of ports to which we add
4260 * @port_no: Port number associated with this host
4262 * Attach low-level ATA driver to system.
4265 * PCI/etc. bus probe sem.
4268 * New ata_port on success, for NULL on error.
4271 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4272 struct ata_host_set *host_set,
4273 unsigned int port_no)
4275 struct Scsi_Host *host;
4276 struct ata_port *ap;
4280 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4284 ap = (struct ata_port *) &host->hostdata[0];
4286 ata_host_init(ap, host, host_set, ent, port_no);
4288 rc = ap->ops->port_start(ap);
4295 scsi_host_put(host);
4300 * ata_device_add - Register hardware device with ATA and SCSI layers
4301 * @ent: Probe information describing hardware device to be registered
4303 * This function processes the information provided in the probe
4304 * information struct @ent, allocates the necessary ATA and SCSI
4305 * host information structures, initializes them, and registers
4306 * everything with requisite kernel subsystems.
4308 * This function requests irqs, probes the ATA bus, and probes
4312 * PCI/etc. bus probe sem.
4315 * Number of ports registered. Zero on error (no ports registered).
4318 int ata_device_add(const struct ata_probe_ent *ent)
4320 unsigned int count = 0, i;
4321 struct device *dev = ent->dev;
4322 struct ata_host_set *host_set;
4325 /* alloc a container for our list of ATA ports (buses) */
4326 host_set = kzalloc(sizeof(struct ata_host_set) +
4327 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4330 spin_lock_init(&host_set->lock);
4332 host_set->dev = dev;
4333 host_set->n_ports = ent->n_ports;
4334 host_set->irq = ent->irq;
4335 host_set->mmio_base = ent->mmio_base;
4336 host_set->private_data = ent->private_data;
4337 host_set->ops = ent->port_ops;
4339 /* register each port bound to this device */
4340 for (i = 0; i < ent->n_ports; i++) {
4341 struct ata_port *ap;
4342 unsigned long xfer_mode_mask;
4344 ap = ata_host_add(ent, host_set, i);
4348 host_set->ports[i] = ap;
4349 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4350 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4351 (ap->pio_mask << ATA_SHIFT_PIO);
4353 /* print per-port info to dmesg */
4354 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4355 "bmdma 0x%lX irq %lu\n",
4357 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4358 ata_mode_string(xfer_mode_mask),
4359 ap->ioaddr.cmd_addr,
4360 ap->ioaddr.ctl_addr,
4361 ap->ioaddr.bmdma_addr,
4365 host_set->ops->irq_clear(ap);
4372 /* obtain irq, that is shared between channels */
4373 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4374 DRV_NAME, host_set))
4377 /* perform each probe synchronously */
4378 DPRINTK("probe begin\n");
4379 for (i = 0; i < count; i++) {
4380 struct ata_port *ap;
4383 ap = host_set->ports[i];
4385 DPRINTK("ata%u: probe begin\n", ap->id);
4386 rc = ata_bus_probe(ap);
4387 DPRINTK("ata%u: probe end\n", ap->id);
4390 /* FIXME: do something useful here?
4391 * Current libata behavior will
4392 * tear down everything when
4393 * the module is removed
4394 * or the h/w is unplugged.
4398 rc = scsi_add_host(ap->host, dev);
4400 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4402 /* FIXME: do something useful here */
4403 /* FIXME: handle unconditional calls to
4404 * scsi_scan_host and ata_host_remove, below,
4410 /* probes are done, now scan each port's disk(s) */
4411 DPRINTK("probe begin\n");
4412 for (i = 0; i < count; i++) {
4413 struct ata_port *ap = host_set->ports[i];
4415 ata_scsi_scan_host(ap);
4418 dev_set_drvdata(dev, host_set);
4420 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4421 return ent->n_ports; /* success */
4424 for (i = 0; i < count; i++) {
4425 ata_host_remove(host_set->ports[i], 1);
4426 scsi_host_put(host_set->ports[i]->host);
4430 VPRINTK("EXIT, returning 0\n");
4435 * ata_host_set_remove - PCI layer callback for device removal
4436 * @host_set: ATA host set that was removed
4438 * Unregister all objects associated with this host set. Free those
4442 * Inherited from calling layer (may sleep).
4445 void ata_host_set_remove(struct ata_host_set *host_set)
4447 struct ata_port *ap;
4450 for (i = 0; i < host_set->n_ports; i++) {
4451 ap = host_set->ports[i];
4452 scsi_remove_host(ap->host);
4455 free_irq(host_set->irq, host_set);
4457 for (i = 0; i < host_set->n_ports; i++) {
4458 ap = host_set->ports[i];
4460 ata_scsi_release(ap->host);
4462 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4463 struct ata_ioports *ioaddr = &ap->ioaddr;
4465 if (ioaddr->cmd_addr == 0x1f0)
4466 release_region(0x1f0, 8);
4467 else if (ioaddr->cmd_addr == 0x170)
4468 release_region(0x170, 8);
4471 scsi_host_put(ap->host);
4474 if (host_set->ops->host_stop)
4475 host_set->ops->host_stop(host_set);
4481 * ata_scsi_release - SCSI layer callback hook for host unload
4482 * @host: libata host to be unloaded
4484 * Performs all duties necessary to shut down a libata port...
4485 * Kill port kthread, disable port, and release resources.
4488 * Inherited from SCSI layer.
4494 int ata_scsi_release(struct Scsi_Host *host)
4496 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4500 ap->ops->port_disable(ap);
4501 ata_host_remove(ap, 0);
4508 * ata_std_ports - initialize ioaddr with standard port offsets.
4509 * @ioaddr: IO address structure to be initialized
4511 * Utility function which initializes data_addr, error_addr,
4512 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4513 * device_addr, status_addr, and command_addr to standard offsets
4514 * relative to cmd_addr.
4516 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4519 void ata_std_ports(struct ata_ioports *ioaddr)
4521 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4522 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4523 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4524 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4525 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4526 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4527 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4528 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4529 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4530 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4533 static struct ata_probe_ent *
4534 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
4536 struct ata_probe_ent *probe_ent;
4538 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
4540 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4541 kobject_name(&(dev->kobj)));
4545 INIT_LIST_HEAD(&probe_ent->node);
4546 probe_ent->dev = dev;
4548 probe_ent->sht = port->sht;
4549 probe_ent->host_flags = port->host_flags;
4550 probe_ent->pio_mask = port->pio_mask;
4551 probe_ent->mwdma_mask = port->mwdma_mask;
4552 probe_ent->udma_mask = port->udma_mask;
4553 probe_ent->port_ops = port->port_ops;
4562 void ata_pci_host_stop (struct ata_host_set *host_set)
4564 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4566 pci_iounmap(pdev, host_set->mmio_base);
4570 * ata_pci_init_native_mode - Initialize native-mode driver
4571 * @pdev: pci device to be initialized
4572 * @port: array[2] of pointers to port info structures.
4573 * @ports: bitmap of ports present
4575 * Utility function which allocates and initializes an
4576 * ata_probe_ent structure for a standard dual-port
4577 * PIO-based IDE controller. The returned ata_probe_ent
4578 * structure can be passed to ata_device_add(). The returned
4579 * ata_probe_ent structure should then be freed with kfree().
4581 * The caller need only pass the address of the primary port, the
4582 * secondary will be deduced automatically. If the device has non
4583 * standard secondary port mappings this function can be called twice,
4584 * once for each interface.
4587 struct ata_probe_ent *
4588 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports)
4590 struct ata_probe_ent *probe_ent =
4591 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4597 probe_ent->irq = pdev->irq;
4598 probe_ent->irq_flags = SA_SHIRQ;
4600 if (ports & ATA_PORT_PRIMARY) {
4601 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0);
4602 probe_ent->port[p].altstatus_addr =
4603 probe_ent->port[p].ctl_addr =
4604 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4605 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4);
4606 ata_std_ports(&probe_ent->port[p]);
4610 if (ports & ATA_PORT_SECONDARY) {
4611 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2);
4612 probe_ent->port[p].altstatus_addr =
4613 probe_ent->port[p].ctl_addr =
4614 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4615 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4616 ata_std_ports(&probe_ent->port[p]);
4620 probe_ent->n_ports = p;
4624 static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info **port, int port_num)
4626 struct ata_probe_ent *probe_ent;
4628 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4632 probe_ent->legacy_mode = 1;
4633 probe_ent->n_ports = 1;
4634 probe_ent->hard_port_no = port_num;
4639 probe_ent->irq = 14;
4640 probe_ent->port[0].cmd_addr = 0x1f0;
4641 probe_ent->port[0].altstatus_addr =
4642 probe_ent->port[0].ctl_addr = 0x3f6;
4645 probe_ent->irq = 15;
4646 probe_ent->port[0].cmd_addr = 0x170;
4647 probe_ent->port[0].altstatus_addr =
4648 probe_ent->port[0].ctl_addr = 0x376;
4651 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num;
4652 ata_std_ports(&probe_ent->port[0]);
4657 * ata_pci_init_one - Initialize/register PCI IDE host controller
4658 * @pdev: Controller to be initialized
4659 * @port_info: Information from low-level host driver
4660 * @n_ports: Number of ports attached to host controller
4662 * This is a helper function which can be called from a driver's
4663 * xxx_init_one() probe function if the hardware uses traditional
4664 * IDE taskfile registers.
4666 * This function calls pci_enable_device(), reserves its register
4667 * regions, sets the dma mask, enables bus master mode, and calls
4671 * Inherited from PCI layer (may sleep).
4674 * Zero on success, negative on errno-based value on error.
4677 int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4678 unsigned int n_ports)
4680 struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL;
4681 struct ata_port_info *port[2];
4683 unsigned int legacy_mode = 0;
4684 int disable_dev_on_err = 1;
4689 port[0] = port_info[0];
4691 port[1] = port_info[1];
4695 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4696 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
4697 /* TODO: What if one channel is in native mode ... */
4698 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4699 mask = (1 << 2) | (1 << 0);
4700 if ((tmp8 & mask) != mask)
4701 legacy_mode = (1 << 3);
4705 if ((!legacy_mode) && (n_ports > 2)) {
4706 printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n");
4711 /* FIXME: Really for ATA it isn't safe because the device may be
4712 multi-purpose and we want to leave it alone if it was already
4713 enabled. Secondly for shared use as Arjan says we want refcounting
4715 Checking dev->is_enabled is insufficient as this is not set at
4716 boot for the primary video which is BIOS enabled
4719 rc = pci_enable_device(pdev);
4723 rc = pci_request_regions(pdev, DRV_NAME);
4725 disable_dev_on_err = 0;
4729 /* FIXME: Should use platform specific mappers for legacy port ranges */
4731 if (!request_region(0x1f0, 8, "libata")) {
4732 struct resource *conflict, res;
4734 res.end = 0x1f0 + 8 - 1;
4735 conflict = ____request_resource(&ioport_resource, &res);
4736 if (!strcmp(conflict->name, "libata"))
4737 legacy_mode |= (1 << 0);
4739 disable_dev_on_err = 0;
4740 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
4743 legacy_mode |= (1 << 0);
4745 if (!request_region(0x170, 8, "libata")) {
4746 struct resource *conflict, res;
4748 res.end = 0x170 + 8 - 1;
4749 conflict = ____request_resource(&ioport_resource, &res);
4750 if (!strcmp(conflict->name, "libata"))
4751 legacy_mode |= (1 << 1);
4753 disable_dev_on_err = 0;
4754 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
4757 legacy_mode |= (1 << 1);
4760 /* we have legacy mode, but all ports are unavailable */
4761 if (legacy_mode == (1 << 3)) {
4763 goto err_out_regions;
4766 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
4768 goto err_out_regions;
4769 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
4771 goto err_out_regions;
4774 if (legacy_mode & (1 << 0))
4775 probe_ent = ata_pci_init_legacy_port(pdev, port, 0);
4776 if (legacy_mode & (1 << 1))
4777 probe_ent2 = ata_pci_init_legacy_port(pdev, port, 1);
4780 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
4782 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY);
4784 if (!probe_ent && !probe_ent2) {
4786 goto err_out_regions;
4789 pci_set_master(pdev);
4791 /* FIXME: check ata_device_add return */
4793 if (legacy_mode & (1 << 0))
4794 ata_device_add(probe_ent);
4795 if (legacy_mode & (1 << 1))
4796 ata_device_add(probe_ent2);
4798 ata_device_add(probe_ent);
4806 if (legacy_mode & (1 << 0))
4807 release_region(0x1f0, 8);
4808 if (legacy_mode & (1 << 1))
4809 release_region(0x170, 8);
4810 pci_release_regions(pdev);
4812 if (disable_dev_on_err)
4813 pci_disable_device(pdev);
4818 * ata_pci_remove_one - PCI layer callback for device removal
4819 * @pdev: PCI device that was removed
4821 * PCI layer indicates to libata via this hook that
4822 * hot-unplug or module unload event has occurred.
4823 * Handle this by unregistering all objects associated
4824 * with this PCI device. Free those objects. Then finally
4825 * release PCI resources and disable device.
4828 * Inherited from PCI layer (may sleep).
4831 void ata_pci_remove_one (struct pci_dev *pdev)
4833 struct device *dev = pci_dev_to_dev(pdev);
4834 struct ata_host_set *host_set = dev_get_drvdata(dev);
4836 ata_host_set_remove(host_set);
4837 pci_release_regions(pdev);
4838 pci_disable_device(pdev);
4839 dev_set_drvdata(dev, NULL);
4842 /* move to PCI subsystem */
4843 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
4845 unsigned long tmp = 0;
4847 switch (bits->width) {
4850 pci_read_config_byte(pdev, bits->reg, &tmp8);
4856 pci_read_config_word(pdev, bits->reg, &tmp16);
4862 pci_read_config_dword(pdev, bits->reg, &tmp32);
4873 return (tmp == bits->val) ? 1 : 0;
4875 #endif /* CONFIG_PCI */
4878 static int __init ata_init(void)
4880 ata_wq = create_workqueue("ata");
4884 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4888 static void __exit ata_exit(void)
4890 destroy_workqueue(ata_wq);
4893 module_init(ata_init);
4894 module_exit(ata_exit);
4896 static unsigned long ratelimit_time;
4897 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4899 int ata_ratelimit(void)
4902 unsigned long flags;
4904 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4906 if (time_after(jiffies, ratelimit_time)) {
4908 ratelimit_time = jiffies + (HZ/5);
4912 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4918 * libata is essentially a library of internal helper functions for
4919 * low-level ATA host controller drivers. As such, the API/ABI is
4920 * likely to change as new drivers are added and updated.
4921 * Do not depend on ABI/API stability.
4924 EXPORT_SYMBOL_GPL(ata_std_bios_param);
4925 EXPORT_SYMBOL_GPL(ata_std_ports);
4926 EXPORT_SYMBOL_GPL(ata_device_add);
4927 EXPORT_SYMBOL_GPL(ata_host_set_remove);
4928 EXPORT_SYMBOL_GPL(ata_sg_init);
4929 EXPORT_SYMBOL_GPL(ata_sg_init_one);
4930 EXPORT_SYMBOL_GPL(ata_qc_complete);
4931 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4932 EXPORT_SYMBOL_GPL(ata_eng_timeout);
4933 EXPORT_SYMBOL_GPL(ata_tf_load);
4934 EXPORT_SYMBOL_GPL(ata_tf_read);
4935 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4936 EXPORT_SYMBOL_GPL(ata_std_dev_select);
4937 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4938 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4939 EXPORT_SYMBOL_GPL(ata_check_status);
4940 EXPORT_SYMBOL_GPL(ata_altstatus);
4941 EXPORT_SYMBOL_GPL(ata_exec_command);
4942 EXPORT_SYMBOL_GPL(ata_port_start);
4943 EXPORT_SYMBOL_GPL(ata_port_stop);
4944 EXPORT_SYMBOL_GPL(ata_host_stop);
4945 EXPORT_SYMBOL_GPL(ata_interrupt);
4946 EXPORT_SYMBOL_GPL(ata_qc_prep);
4947 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4948 EXPORT_SYMBOL_GPL(ata_bmdma_start);
4949 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4950 EXPORT_SYMBOL_GPL(ata_bmdma_status);
4951 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4952 EXPORT_SYMBOL_GPL(ata_port_probe);
4953 EXPORT_SYMBOL_GPL(sata_phy_reset);
4954 EXPORT_SYMBOL_GPL(__sata_phy_reset);
4955 EXPORT_SYMBOL_GPL(ata_bus_reset);
4956 EXPORT_SYMBOL_GPL(ata_port_disable);
4957 EXPORT_SYMBOL_GPL(ata_ratelimit);
4958 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4959 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4960 EXPORT_SYMBOL_GPL(ata_scsi_error);
4961 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4962 EXPORT_SYMBOL_GPL(ata_scsi_release);
4963 EXPORT_SYMBOL_GPL(ata_host_intr);
4964 EXPORT_SYMBOL_GPL(ata_dev_classify);
4965 EXPORT_SYMBOL_GPL(ata_dev_id_string);
4966 EXPORT_SYMBOL_GPL(ata_dev_config);
4967 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
4969 EXPORT_SYMBOL_GPL(ata_timing_compute);
4970 EXPORT_SYMBOL_GPL(ata_timing_merge);
4973 EXPORT_SYMBOL_GPL(pci_test_config_bits);
4974 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
4975 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4976 EXPORT_SYMBOL_GPL(ata_pci_init_one);
4977 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
4978 #endif /* CONFIG_PCI */