1 /*****************************************************************************/
2 /* ips.c -- driver for the Adaptec / IBM ServeRAID controller */
4 /* Written By: Keith Mitchell, IBM Corporation */
5 /* Jack Hammer, Adaptec, Inc. */
6 /* David Jeffery, Adaptec, Inc. */
8 /* Copyright (C) 2000 IBM Corporation */
9 /* Copyright (C) 2002,2003 Adaptec, Inc. */
11 /* This program is free software; you can redistribute it and/or modify */
12 /* it under the terms of the GNU General Public License as published by */
13 /* the Free Software Foundation; either version 2 of the License, or */
14 /* (at your option) any later version. */
16 /* This program is distributed in the hope that it will be useful, */
17 /* but WITHOUT ANY WARRANTY; without even the implied warranty of */
18 /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
19 /* GNU General Public License for more details. */
22 /* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR */
23 /* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT */
24 /* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, */
25 /* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is */
26 /* solely responsible for determining the appropriateness of using and */
27 /* distributing the Program and assumes all risks associated with its */
28 /* exercise of rights under this Agreement, including but not limited to */
29 /* the risks and costs of program errors, damage to or loss of data, */
30 /* programs or equipment, and unavailability or interruption of operations. */
32 /* DISCLAIMER OF LIABILITY */
33 /* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY */
34 /* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL */
35 /* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND */
36 /* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR */
37 /* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE */
38 /* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED */
39 /* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES */
41 /* You should have received a copy of the GNU General Public License */
42 /* along with this program; if not, write to the Free Software */
43 /* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
45 /* Bugs/Comments/Suggestions about this driver should be mailed to: */
46 /* ipslinux@adaptec.com */
48 /* For system support issues, contact your local IBM Customer support. */
49 /* Directions to find IBM Customer Support for each country can be found at: */
50 /* http://www.ibm.com/planetwide/ */
52 /*****************************************************************************/
54 /*****************************************************************************/
57 /* 0.99.02 - Breakup commands that are bigger than 8 * the stripe size */
58 /* 0.99.03 - Make interrupt routine handle all completed request on the */
59 /* adapter not just the first one */
60 /* - Make sure passthru commands get woken up if we run out of */
62 /* - Send all of the commands on the queue at once rather than */
63 /* one at a time since the card will support it. */
64 /* 0.99.04 - Fix race condition in the passthru mechanism -- this required */
65 /* the interface to the utilities to change */
66 /* - Fix error recovery code */
67 /* 0.99.05 - Fix an oops when we get certain passthru commands */
68 /* 1.00.00 - Initial Public Release */
69 /* Functionally equivalent to 0.99.05 */
70 /* 3.60.00 - Bump max commands to 128 for use with firmware 3.60 */
71 /* - Change version to 3.60 to coincide with release numbering. */
72 /* 3.60.01 - Remove bogus error check in passthru routine */
73 /* 3.60.02 - Make DCDB direction based on lookup table */
74 /* - Only allow one DCDB command to a SCSI ID at a time */
75 /* 4.00.00 - Add support for ServeRAID 4 */
76 /* 4.00.01 - Add support for First Failure Data Capture */
77 /* 4.00.02 - Fix problem with PT DCDB with no buffer */
78 /* 4.00.03 - Add alternative passthru interface */
79 /* - Add ability to flash BIOS */
80 /* 4.00.04 - Rename structures/constants to be prefixed with IPS_ */
81 /* 4.00.05 - Remove wish_block from init routine */
82 /* - Use linux/spinlock.h instead of asm/spinlock.h for kernels */
83 /* 2.3.18 and later */
84 /* - Sync with other changes from the 2.3 kernels */
85 /* 4.00.06 - Fix timeout with initial FFDC command */
86 /* 4.00.06a - Port to 2.4 (trivial) -- Christoph Hellwig <hch@infradead.org> */
87 /* 4.10.00 - Add support for ServeRAID 4M/4L */
88 /* 4.10.13 - Fix for dynamic unload and proc file system */
89 /* 4.20.03 - Rename version to coincide with new release schedules */
90 /* Performance fixes */
91 /* Fix truncation of /proc files with cat */
92 /* Merge in changes through kernel 2.4.0test1ac21 */
93 /* 4.20.13 - Fix some failure cases / reset code */
94 /* - Hook into the reboot_notifier to flush the controller cache */
95 /* 4.50.01 - Fix problem when there is a hole in logical drive numbering */
96 /* 4.70.09 - Use a Common ( Large Buffer ) for Flashing from the JCRM CD */
97 /* - Add IPSSEND Flash Support */
98 /* - Set Sense Data for Unknown SCSI Command */
99 /* - Use Slot Number from NVRAM Page 5 */
100 /* - Restore caller's DCDB Structure */
101 /* 4.70.12 - Corrective actions for bad controller ( during initialization )*/
102 /* 4.70.13 - Don't Send CDB's if we already know the device is not present */
103 /* - Don't release HA Lock in ips_next() until SC taken off queue */
104 /* - Unregister SCSI device in ips_release() */
105 /* 4.70.15 - Fix Breakup for very large ( non-SG ) requests in ips_done() */
106 /* 4.71.00 - Change all memory allocations to not use GFP_DMA flag */
107 /* Code Clean-Up for 2.4.x kernel */
108 /* 4.72.00 - Allow for a Scatter-Gather Element to exceed MAX_XFER Size */
109 /* 4.72.01 - I/O Mapped Memory release ( so "insmod ips" does not Fail ) */
110 /* - Don't Issue Internal FFDC Command if there are Active Commands */
111 /* - Close Window for getting too many IOCTL's active */
112 /* 4.80.00 - Make ia64 Safe */
113 /* 4.80.04 - Eliminate calls to strtok() if 2.4.x or greater */
114 /* - Adjustments to Device Queue Depth */
115 /* 4.80.14 - Take all semaphores off stack */
116 /* - Clean Up New_IOCTL path */
117 /* 4.80.20 - Set max_sectors in Scsi_Host structure ( if >= 2.4.7 kernel ) */
118 /* - 5 second delay needed after resetting an i960 adapter */
119 /* 4.80.26 - Clean up potential code problems ( Arjan's recommendations ) */
120 /* 4.90.01 - Version Matching for FirmWare, BIOS, and Driver */
121 /* 4.90.05 - Use New PCI Architecture to facilitate Hot Plug Development */
122 /* 4.90.08 - Increase Delays in Flashing ( Trombone Only - 4H ) */
123 /* 4.90.08 - Data Corruption if First Scatter Gather Element is > 64K */
124 /* 4.90.11 - Don't actually RESET unless it's physically required */
125 /* - Remove unused compile options */
126 /* 5.00.01 - Sarasota ( 5i ) adapters must always be scanned first */
127 /* - Get rid on IOCTL_NEW_COMMAND code */
128 /* - Add Extended DCDB Commands for Tape Support in 5I */
129 /* 5.10.12 - use pci_dma interfaces, update for 2.5 kernel changes */
130 /* 5.10.15 - remove unused code (sem, macros, etc.) */
131 /* 5.30.00 - use __devexit_p() */
132 /* 6.00.00 - Add 6x Adapters and Battery Flash */
133 /* 6.10.00 - Remove 1G Addressing Limitations */
134 /* 6.11.xx - Get VersionInfo buffer off the stack ! DDTS 60401 */
135 /* 6.11.xx - Make Logical Drive Info structure safe for DMA DDTS 60639 */
136 /* 7.10.18 - Add highmem_io flag in SCSI Templete for 2.4 kernels */
137 /* - Fix path/name for scsi_hosts.h include for 2.6 kernels */
138 /* - Fix sort order of 7k */
139 /* - Remove 3 unused "inline" functions */
140 /* 7.12.xx - Use STATIC functions whereever possible */
141 /* - Clean up deprecated MODULE_PARM calls */
142 /* 7.12.05 - Remove Version Matching per IBM request */
143 /*****************************************************************************/
146 * Conditional Compilation directives for this driver:
148 * IPS_DEBUG - Turn on debugging info
152 * debug:<number> - Set debug level to <number>
153 * NOTE: only works when IPS_DEBUG compile directive is used.
154 * 1 - Normal debug messages
155 * 2 - Verbose debug messages
156 * 11 - Method trace (non interrupt)
157 * 12 - Method trace (includes interrupt)
159 * noi2o - Don't use I2O Queues (ServeRAID 4 only)
160 * nommap - Don't use memory mapped I/O
161 * ioctlsize - Initial size of the IOCTL buffer
165 #include <asm/byteorder.h>
166 #include <asm/page.h>
167 #include <linux/stddef.h>
168 #include <linux/version.h>
169 #include <linux/string.h>
170 #include <linux/errno.h>
171 #include <linux/kernel.h>
172 #include <linux/ioport.h>
173 #include <linux/slab.h>
174 #include <linux/delay.h>
175 #include <linux/pci.h>
176 #include <linux/proc_fs.h>
177 #include <linux/reboot.h>
178 #include <linux/interrupt.h>
180 #include <linux/blkdev.h>
181 #include <linux/types.h>
182 #include <linux/dma-mapping.h>
186 #include <scsi/scsi_host.h>
190 #include <linux/module.h>
192 #include <linux/stat.h>
194 #include <linux/spinlock.h>
195 #include <linux/init.h>
197 #include <linux/smp.h>
200 static char *ips = NULL;
201 module_param(ips, charp, 0);
207 #define IPS_VERSION_HIGH IPS_VER_MAJOR_STRING "." IPS_VER_MINOR_STRING
208 #define IPS_VERSION_LOW "." IPS_VER_BUILD_STRING " "
210 #if !defined(__i386__) && !defined(__ia64__) && !defined(__x86_64__)
211 #warning "This driver has only been tested on the x86/ia64/x86_64 platforms"
214 #define IPS_DMA_DIR(scb) ((!scb->scsi_cmd || ips_is_passthru(scb->scsi_cmd) || \
215 DMA_NONE == scb->scsi_cmd->sc_data_direction) ? \
216 PCI_DMA_BIDIRECTIONAL : \
217 scb->scsi_cmd->sc_data_direction)
220 #define METHOD_TRACE(s, i) if (ips_debug >= (i+10)) printk(KERN_NOTICE s "\n");
221 #define DEBUG(i, s) if (ips_debug >= i) printk(KERN_NOTICE s "\n");
222 #define DEBUG_VAR(i, s, v...) if (ips_debug >= i) printk(KERN_NOTICE s "\n", v);
224 #define METHOD_TRACE(s, i)
226 #define DEBUG_VAR(i, s, v...)
230 * Function prototypes
232 static int ips_detect(struct scsi_host_template *);
233 static int ips_release(struct Scsi_Host *);
234 static int ips_eh_abort(struct scsi_cmnd *);
235 static int ips_eh_reset(struct scsi_cmnd *);
236 static int ips_queue(struct scsi_cmnd *, void (*)(struct scsi_cmnd *));
237 static const char *ips_info(struct Scsi_Host *);
238 static irqreturn_t do_ipsintr(int, void *);
239 static int ips_hainit(ips_ha_t *);
240 static int ips_map_status(ips_ha_t *, ips_scb_t *, ips_stat_t *);
241 static int ips_send_wait(ips_ha_t *, ips_scb_t *, int, int);
242 static int ips_send_cmd(ips_ha_t *, ips_scb_t *);
243 static int ips_online(ips_ha_t *, ips_scb_t *);
244 static int ips_inquiry(ips_ha_t *, ips_scb_t *);
245 static int ips_rdcap(ips_ha_t *, ips_scb_t *);
246 static int ips_msense(ips_ha_t *, ips_scb_t *);
247 static int ips_reqsen(ips_ha_t *, ips_scb_t *);
248 static int ips_deallocatescbs(ips_ha_t *, int);
249 static int ips_allocatescbs(ips_ha_t *);
250 static int ips_reset_copperhead(ips_ha_t *);
251 static int ips_reset_copperhead_memio(ips_ha_t *);
252 static int ips_reset_morpheus(ips_ha_t *);
253 static int ips_issue_copperhead(ips_ha_t *, ips_scb_t *);
254 static int ips_issue_copperhead_memio(ips_ha_t *, ips_scb_t *);
255 static int ips_issue_i2o(ips_ha_t *, ips_scb_t *);
256 static int ips_issue_i2o_memio(ips_ha_t *, ips_scb_t *);
257 static int ips_isintr_copperhead(ips_ha_t *);
258 static int ips_isintr_copperhead_memio(ips_ha_t *);
259 static int ips_isintr_morpheus(ips_ha_t *);
260 static int ips_wait(ips_ha_t *, int, int);
261 static int ips_write_driver_status(ips_ha_t *, int);
262 static int ips_read_adapter_status(ips_ha_t *, int);
263 static int ips_read_subsystem_parameters(ips_ha_t *, int);
264 static int ips_read_config(ips_ha_t *, int);
265 static int ips_clear_adapter(ips_ha_t *, int);
266 static int ips_readwrite_page5(ips_ha_t *, int, int);
267 static int ips_init_copperhead(ips_ha_t *);
268 static int ips_init_copperhead_memio(ips_ha_t *);
269 static int ips_init_morpheus(ips_ha_t *);
270 static int ips_isinit_copperhead(ips_ha_t *);
271 static int ips_isinit_copperhead_memio(ips_ha_t *);
272 static int ips_isinit_morpheus(ips_ha_t *);
273 static int ips_erase_bios(ips_ha_t *);
274 static int ips_program_bios(ips_ha_t *, char *, uint32_t, uint32_t);
275 static int ips_verify_bios(ips_ha_t *, char *, uint32_t, uint32_t);
276 static int ips_erase_bios_memio(ips_ha_t *);
277 static int ips_program_bios_memio(ips_ha_t *, char *, uint32_t, uint32_t);
278 static int ips_verify_bios_memio(ips_ha_t *, char *, uint32_t, uint32_t);
279 static int ips_flash_copperhead(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
280 static int ips_flash_bios(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
281 static int ips_flash_firmware(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
282 static void ips_free_flash_copperhead(ips_ha_t * ha);
283 static void ips_get_bios_version(ips_ha_t *, int);
284 static void ips_identify_controller(ips_ha_t *);
285 static void ips_chkstatus(ips_ha_t *, IPS_STATUS *);
286 static void ips_enable_int_copperhead(ips_ha_t *);
287 static void ips_enable_int_copperhead_memio(ips_ha_t *);
288 static void ips_enable_int_morpheus(ips_ha_t *);
289 static int ips_intr_copperhead(ips_ha_t *);
290 static int ips_intr_morpheus(ips_ha_t *);
291 static void ips_next(ips_ha_t *, int);
292 static void ipsintr_blocking(ips_ha_t *, struct ips_scb *);
293 static void ipsintr_done(ips_ha_t *, struct ips_scb *);
294 static void ips_done(ips_ha_t *, ips_scb_t *);
295 static void ips_free(ips_ha_t *);
296 static void ips_init_scb(ips_ha_t *, ips_scb_t *);
297 static void ips_freescb(ips_ha_t *, ips_scb_t *);
298 static void ips_setup_funclist(ips_ha_t *);
299 static void ips_statinit(ips_ha_t *);
300 static void ips_statinit_memio(ips_ha_t *);
301 static void ips_fix_ffdc_time(ips_ha_t *, ips_scb_t *, time_t);
302 static void ips_ffdc_reset(ips_ha_t *, int);
303 static void ips_ffdc_time(ips_ha_t *);
304 static uint32_t ips_statupd_copperhead(ips_ha_t *);
305 static uint32_t ips_statupd_copperhead_memio(ips_ha_t *);
306 static uint32_t ips_statupd_morpheus(ips_ha_t *);
307 static ips_scb_t *ips_getscb(ips_ha_t *);
308 static void ips_putq_scb_head(ips_scb_queue_t *, ips_scb_t *);
309 static void ips_putq_wait_tail(ips_wait_queue_t *, struct scsi_cmnd *);
310 static void ips_putq_copp_tail(ips_copp_queue_t *,
311 ips_copp_wait_item_t *);
312 static ips_scb_t *ips_removeq_scb_head(ips_scb_queue_t *);
313 static ips_scb_t *ips_removeq_scb(ips_scb_queue_t *, ips_scb_t *);
314 static struct scsi_cmnd *ips_removeq_wait_head(ips_wait_queue_t *);
315 static struct scsi_cmnd *ips_removeq_wait(ips_wait_queue_t *,
317 static ips_copp_wait_item_t *ips_removeq_copp(ips_copp_queue_t *,
318 ips_copp_wait_item_t *);
319 static ips_copp_wait_item_t *ips_removeq_copp_head(ips_copp_queue_t *);
321 static int ips_is_passthru(struct scsi_cmnd *);
322 static int ips_make_passthru(ips_ha_t *, struct scsi_cmnd *, ips_scb_t *, int);
323 static int ips_usrcmd(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
324 static void ips_cleanup_passthru(ips_ha_t *, ips_scb_t *);
325 static void ips_scmd_buf_write(struct scsi_cmnd * scmd, void *data,
327 static void ips_scmd_buf_read(struct scsi_cmnd * scmd, void *data,
330 static int ips_proc_info(struct Scsi_Host *, char *, char **, off_t, int, int);
331 static int ips_host_info(ips_ha_t *, char *, off_t, int);
332 static void copy_mem_info(IPS_INFOSTR *, char *, int);
333 static int copy_info(IPS_INFOSTR *, char *, ...);
334 static int ips_abort_init(ips_ha_t * ha, int index);
335 static int ips_init_phase2(int index);
337 static int ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr);
338 static int ips_register_scsi(int index);
340 static int ips_poll_for_flush_complete(ips_ha_t * ha);
341 static void ips_flush_and_reset(ips_ha_t *ha);
346 static const char ips_name[] = "ips";
347 static struct Scsi_Host *ips_sh[IPS_MAX_ADAPTERS]; /* Array of host controller structures */
348 static ips_ha_t *ips_ha[IPS_MAX_ADAPTERS]; /* Array of HA structures */
349 static unsigned int ips_next_controller;
350 static unsigned int ips_num_controllers;
351 static unsigned int ips_released_controllers;
352 static int ips_hotplug;
353 static int ips_cmd_timeout = 60;
354 static int ips_reset_timeout = 60 * 5;
355 static int ips_force_memio = 1; /* Always use Memory Mapped I/O */
356 static int ips_force_i2o = 1; /* Always use I2O command delivery */
357 static int ips_ioctlsize = IPS_IOCTL_SIZE; /* Size of the ioctl buffer */
358 static int ips_cd_boot; /* Booting from Manager CD */
359 static char *ips_FlashData = NULL; /* CD Boot - Flash Data Buffer */
360 static dma_addr_t ips_flashbusaddr;
361 static long ips_FlashDataInUse; /* CD Boot - Flash Data In Use Flag */
362 static uint32_t MaxLiteCmds = 32; /* Max Active Cmds for a Lite Adapter */
363 static struct scsi_host_template ips_driver_template = {
364 .detect = ips_detect,
365 .release = ips_release,
367 .queuecommand = ips_queue,
368 .eh_abort_handler = ips_eh_abort,
369 .eh_host_reset_handler = ips_eh_reset,
371 .proc_info = ips_proc_info,
372 .slave_configure = ips_slave_configure,
373 .bios_param = ips_biosparam,
375 .sg_tablesize = IPS_MAX_SG,
377 .use_clustering = ENABLE_CLUSTERING,
381 /* This table describes all ServeRAID Adapters */
382 static struct pci_device_id ips_pci_table[] = {
383 { 0x1014, 0x002E, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
384 { 0x1014, 0x01BD, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
385 { 0x9005, 0x0250, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
389 MODULE_DEVICE_TABLE( pci, ips_pci_table );
391 static char ips_hot_plug_name[] = "ips";
393 static int __devinit ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent);
394 static void __devexit ips_remove_device(struct pci_dev *pci_dev);
396 static struct pci_driver ips_pci_driver = {
397 .name = ips_hot_plug_name,
398 .id_table = ips_pci_table,
399 .probe = ips_insert_device,
400 .remove = __devexit_p(ips_remove_device),
405 * Necessary forward function protoypes
407 static int ips_halt(struct notifier_block *nb, ulong event, void *buf);
409 #define MAX_ADAPTER_NAME 15
411 static char ips_adapter_name[][30] = {
414 "ServeRAID on motherboard",
415 "ServeRAID on motherboard",
432 static struct notifier_block ips_notifier = {
439 static char ips_command_direction[] = {
440 IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT,
441 IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK,
442 IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
443 IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_OUT,
444 IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_OUT,
445 IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_OUT,
446 IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_IN,
447 IPS_DATA_UNK, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK,
448 IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_UNK,
449 IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT,
450 IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_NONE,
451 IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT,
452 IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT,
453 IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_NONE,
454 IPS_DATA_UNK, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_UNK,
455 IPS_DATA_NONE, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK,
456 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
457 IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
458 IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
459 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
460 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
461 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
462 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
463 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
464 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
465 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
466 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
467 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
468 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
469 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
470 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
471 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
472 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
473 IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_NONE,
474 IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_OUT,
475 IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_NONE,
476 IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_IN,
477 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
478 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
479 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
480 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
481 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
482 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
483 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
484 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
485 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
486 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_OUT,
487 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
488 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
489 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
490 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK
494 /****************************************************************************/
496 /* Routine Name: ips_setup */
498 /* Routine Description: */
500 /* setup parameters to the driver */
502 /****************************************************************************/
504 ips_setup(char *ips_str)
510 IPS_OPTION options[] = {
511 {"noi2o", &ips_force_i2o, 0},
512 {"nommap", &ips_force_memio, 0},
513 {"ioctlsize", &ips_ioctlsize, IPS_IOCTL_SIZE},
514 {"cdboot", &ips_cd_boot, 0},
515 {"maxcmds", &MaxLiteCmds, 32},
518 /* Don't use strtok() anymore ( if 2.4 Kernel or beyond ) */
519 /* Search for value */
520 while ((key = strsep(&ips_str, ",."))) {
523 value = strchr(key, ':');
527 * We now have key/value pairs.
528 * Update the variables
530 for (i = 0; i < ARRAY_SIZE(options); i++) {
532 (key, options[i].option_name,
533 strlen(options[i].option_name)) == 0) {
535 *options[i].option_flag =
536 simple_strtoul(value, NULL, 0);
538 *options[i].option_flag =
539 options[i].option_value;
548 __setup("ips=", ips_setup);
550 /****************************************************************************/
552 /* Routine Name: ips_detect */
554 /* Routine Description: */
556 /* Detect and initialize the driver */
558 /* NOTE: this routine is called under the io_request_lock spinlock */
560 /****************************************************************************/
562 ips_detect(struct scsi_host_template * SHT)
566 METHOD_TRACE("ips_detect", 1);
573 for (i = 0; i < ips_num_controllers; i++) {
574 if (ips_register_scsi(i))
576 ips_released_controllers++;
579 return (ips_num_controllers);
582 /****************************************************************************/
583 /* configure the function pointers to use the functions that will work */
584 /* with the found version of the adapter */
585 /****************************************************************************/
587 ips_setup_funclist(ips_ha_t * ha)
593 if (IPS_IS_MORPHEUS(ha) || IPS_IS_MARCO(ha)) {
594 /* morpheus / marco / sebring */
595 ha->func.isintr = ips_isintr_morpheus;
596 ha->func.isinit = ips_isinit_morpheus;
597 ha->func.issue = ips_issue_i2o_memio;
598 ha->func.init = ips_init_morpheus;
599 ha->func.statupd = ips_statupd_morpheus;
600 ha->func.reset = ips_reset_morpheus;
601 ha->func.intr = ips_intr_morpheus;
602 ha->func.enableint = ips_enable_int_morpheus;
603 } else if (IPS_USE_MEMIO(ha)) {
604 /* copperhead w/MEMIO */
605 ha->func.isintr = ips_isintr_copperhead_memio;
606 ha->func.isinit = ips_isinit_copperhead_memio;
607 ha->func.init = ips_init_copperhead_memio;
608 ha->func.statupd = ips_statupd_copperhead_memio;
609 ha->func.statinit = ips_statinit_memio;
610 ha->func.reset = ips_reset_copperhead_memio;
611 ha->func.intr = ips_intr_copperhead;
612 ha->func.erasebios = ips_erase_bios_memio;
613 ha->func.programbios = ips_program_bios_memio;
614 ha->func.verifybios = ips_verify_bios_memio;
615 ha->func.enableint = ips_enable_int_copperhead_memio;
616 if (IPS_USE_I2O_DELIVER(ha))
617 ha->func.issue = ips_issue_i2o_memio;
619 ha->func.issue = ips_issue_copperhead_memio;
622 ha->func.isintr = ips_isintr_copperhead;
623 ha->func.isinit = ips_isinit_copperhead;
624 ha->func.init = ips_init_copperhead;
625 ha->func.statupd = ips_statupd_copperhead;
626 ha->func.statinit = ips_statinit;
627 ha->func.reset = ips_reset_copperhead;
628 ha->func.intr = ips_intr_copperhead;
629 ha->func.erasebios = ips_erase_bios;
630 ha->func.programbios = ips_program_bios;
631 ha->func.verifybios = ips_verify_bios;
632 ha->func.enableint = ips_enable_int_copperhead;
634 if (IPS_USE_I2O_DELIVER(ha))
635 ha->func.issue = ips_issue_i2o;
637 ha->func.issue = ips_issue_copperhead;
641 /****************************************************************************/
643 /* Routine Name: ips_release */
645 /* Routine Description: */
647 /* Remove a driver */
649 /****************************************************************************/
651 ips_release(struct Scsi_Host *sh)
657 METHOD_TRACE("ips_release", 1);
659 scsi_remove_host(sh);
661 for (i = 0; i < IPS_MAX_ADAPTERS && ips_sh[i] != sh; i++) ;
663 if (i == IPS_MAX_ADAPTERS) {
665 "(%s) release, invalid Scsi_Host pointer.\n", ips_name);
675 /* flush the cache on the controller */
676 scb = &ha->scbs[ha->max_cmds - 1];
678 ips_init_scb(ha, scb);
680 scb->timeout = ips_cmd_timeout;
681 scb->cdb[0] = IPS_CMD_FLUSH;
683 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
684 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
685 scb->cmd.flush_cache.state = IPS_NORM_STATE;
686 scb->cmd.flush_cache.reserved = 0;
687 scb->cmd.flush_cache.reserved2 = 0;
688 scb->cmd.flush_cache.reserved3 = 0;
689 scb->cmd.flush_cache.reserved4 = 0;
691 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n");
694 if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) == IPS_FAILURE)
695 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Incomplete Flush.\n");
697 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Complete.\n");
702 /* free extra memory */
706 free_irq(ha->pcidev->irq, ha);
710 ips_released_controllers++;
715 /****************************************************************************/
717 /* Routine Name: ips_halt */
719 /* Routine Description: */
721 /* Perform cleanup when the system reboots */
723 /****************************************************************************/
725 ips_halt(struct notifier_block *nb, ulong event, void *buf)
731 if ((event != SYS_RESTART) && (event != SYS_HALT) &&
732 (event != SYS_POWER_OFF))
733 return (NOTIFY_DONE);
735 for (i = 0; i < ips_next_controller; i++) {
736 ha = (ips_ha_t *) ips_ha[i];
744 /* flush the cache on the controller */
745 scb = &ha->scbs[ha->max_cmds - 1];
747 ips_init_scb(ha, scb);
749 scb->timeout = ips_cmd_timeout;
750 scb->cdb[0] = IPS_CMD_FLUSH;
752 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
753 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
754 scb->cmd.flush_cache.state = IPS_NORM_STATE;
755 scb->cmd.flush_cache.reserved = 0;
756 scb->cmd.flush_cache.reserved2 = 0;
757 scb->cmd.flush_cache.reserved3 = 0;
758 scb->cmd.flush_cache.reserved4 = 0;
760 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n");
763 if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) ==
765 IPS_PRINTK(KERN_WARNING, ha->pcidev,
766 "Incomplete Flush.\n");
768 IPS_PRINTK(KERN_WARNING, ha->pcidev,
769 "Flushing Complete.\n");
775 /****************************************************************************/
777 /* Routine Name: ips_eh_abort */
779 /* Routine Description: */
781 /* Abort a command (using the new error code stuff) */
782 /* Note: this routine is called under the io_request_lock */
783 /****************************************************************************/
784 int ips_eh_abort(struct scsi_cmnd *SC)
787 ips_copp_wait_item_t *item;
789 struct Scsi_Host *host;
791 METHOD_TRACE("ips_eh_abort", 1);
796 host = SC->device->host;
797 ha = (ips_ha_t *) SC->device->host->hostdata;
805 spin_lock(host->host_lock);
807 /* See if the command is on the copp queue */
808 item = ha->copp_waitlist.head;
809 while ((item) && (item->scsi_cmd != SC))
814 ips_removeq_copp(&ha->copp_waitlist, item);
817 /* See if the command is on the wait queue */
818 } else if (ips_removeq_wait(&ha->scb_waitlist, SC)) {
819 /* command not sent yet */
822 /* command must have already been sent */
826 spin_unlock(host->host_lock);
830 /****************************************************************************/
832 /* Routine Name: ips_eh_reset */
834 /* Routine Description: */
836 /* Reset the controller (with new eh error code) */
838 /* NOTE: this routine is called under the io_request_lock spinlock */
840 /****************************************************************************/
841 static int __ips_eh_reset(struct scsi_cmnd *SC)
847 ips_copp_wait_item_t *item;
849 METHOD_TRACE("ips_eh_reset", 1);
856 DEBUG(1, "Reset called with NULL scsi command");
861 ha = (ips_ha_t *) SC->device->host->hostdata;
864 DEBUG(1, "Reset called with NULL ha struct");
872 /* See if the command is on the copp queue */
873 item = ha->copp_waitlist.head;
874 while ((item) && (item->scsi_cmd != SC))
879 ips_removeq_copp(&ha->copp_waitlist, item);
883 /* See if the command is on the wait queue */
884 if (ips_removeq_wait(&ha->scb_waitlist, SC)) {
885 /* command not sent yet */
889 /* An explanation for the casual observer: */
890 /* Part of the function of a RAID controller is automatic error */
891 /* detection and recovery. As such, the only problem that physically */
892 /* resetting an adapter will ever fix is when, for some reason, */
893 /* the driver is not successfully communicating with the adapter. */
894 /* Therefore, we will attempt to flush this adapter. If that succeeds, */
895 /* then there's no real purpose in a physical reset. This will complete */
896 /* much faster and avoids any problems that might be caused by a */
897 /* physical reset ( such as having to fail all the outstanding I/O's ). */
899 if (ha->ioctl_reset == 0) { /* IF Not an IOCTL Requested Reset */
900 scb = &ha->scbs[ha->max_cmds - 1];
902 ips_init_scb(ha, scb);
904 scb->timeout = ips_cmd_timeout;
905 scb->cdb[0] = IPS_CMD_FLUSH;
907 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
908 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
909 scb->cmd.flush_cache.state = IPS_NORM_STATE;
910 scb->cmd.flush_cache.reserved = 0;
911 scb->cmd.flush_cache.reserved2 = 0;
912 scb->cmd.flush_cache.reserved3 = 0;
913 scb->cmd.flush_cache.reserved4 = 0;
915 /* Attempt the flush command */
916 ret = ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_IORL);
917 if (ret == IPS_SUCCESS) {
918 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
919 "Reset Request - Flushed Cache\n");
924 /* Either we can't communicate with the adapter or it's an IOCTL request */
925 /* from a utility. A physical reset is needed at this point. */
927 ha->ioctl_reset = 0; /* Reset the IOCTL Requested Reset Flag */
930 * command must have already been sent
931 * reset the controller
933 IPS_PRINTK(KERN_NOTICE, ha->pcidev, "Resetting controller.\n");
934 ret = (*ha->func.reset) (ha);
937 struct scsi_cmnd *scsi_cmd;
939 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
940 "Controller reset failed - controller now offline.\n");
942 /* Now fail all of the active commands */
943 DEBUG_VAR(1, "(%s%d) Failing active commands",
944 ips_name, ha->host_num);
946 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
947 scb->scsi_cmd->result = DID_ERROR << 16;
948 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
949 ips_freescb(ha, scb);
952 /* Now fail all of the pending commands */
953 DEBUG_VAR(1, "(%s%d) Failing pending commands",
954 ips_name, ha->host_num);
956 while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) {
957 scsi_cmd->result = DID_ERROR;
958 scsi_cmd->scsi_done(scsi_cmd);
965 if (!ips_clear_adapter(ha, IPS_INTR_IORL)) {
966 struct scsi_cmnd *scsi_cmd;
968 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
969 "Controller reset failed - controller now offline.\n");
971 /* Now fail all of the active commands */
972 DEBUG_VAR(1, "(%s%d) Failing active commands",
973 ips_name, ha->host_num);
975 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
976 scb->scsi_cmd->result = DID_ERROR << 16;
977 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
978 ips_freescb(ha, scb);
981 /* Now fail all of the pending commands */
982 DEBUG_VAR(1, "(%s%d) Failing pending commands",
983 ips_name, ha->host_num);
985 while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) {
986 scsi_cmd->result = DID_ERROR << 16;
987 scsi_cmd->scsi_done(scsi_cmd);
995 if (le32_to_cpu(ha->subsys->param[3]) & 0x300000) {
998 do_gettimeofday(&tv);
999 ha->last_ffdc = tv.tv_sec;
1001 ips_ffdc_reset(ha, IPS_INTR_IORL);
1004 /* Now fail all of the active commands */
1005 DEBUG_VAR(1, "(%s%d) Failing active commands", ips_name, ha->host_num);
1007 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
1008 scb->scsi_cmd->result =
1009 (DID_RESET << 16) | (SUGGEST_RETRY << 24);
1010 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
1011 ips_freescb(ha, scb);
1014 /* Reset DCDB active command bits */
1015 for (i = 1; i < ha->nbus; i++)
1016 ha->dcdb_active[i - 1] = 0;
1018 /* Reset the number of active IOCTLs */
1021 ips_next(ha, IPS_INTR_IORL);
1024 #endif /* NO_IPS_RESET */
1028 static int ips_eh_reset(struct scsi_cmnd *SC)
1032 spin_lock_irq(SC->device->host->host_lock);
1033 rc = __ips_eh_reset(SC);
1034 spin_unlock_irq(SC->device->host->host_lock);
1039 /****************************************************************************/
1041 /* Routine Name: ips_queue */
1043 /* Routine Description: */
1045 /* Send a command to the controller */
1048 /* Linux obtains io_request_lock before calling this function */
1050 /****************************************************************************/
1051 static int ips_queue(struct scsi_cmnd *SC, void (*done) (struct scsi_cmnd *))
1056 METHOD_TRACE("ips_queue", 1);
1058 ha = (ips_ha_t *) SC->device->host->hostdata;
1066 if (ips_is_passthru(SC)) {
1067 if (ha->copp_waitlist.count == IPS_MAX_IOCTL_QUEUE) {
1068 SC->result = DID_BUS_BUSY << 16;
1073 } else if (ha->scb_waitlist.count == IPS_MAX_QUEUE) {
1074 SC->result = DID_BUS_BUSY << 16;
1080 SC->scsi_done = done;
1082 DEBUG_VAR(2, "(%s%d): ips_queue: cmd 0x%X (%d %d %d)",
1086 SC->device->channel, SC->device->id, SC->device->lun);
1088 /* Check for command to initiator IDs */
1089 if ((scmd_channel(SC) > 0)
1090 && (scmd_id(SC) == ha->ha_id[scmd_channel(SC)])) {
1091 SC->result = DID_NO_CONNECT << 16;
1097 if (ips_is_passthru(SC)) {
1099 ips_copp_wait_item_t *scratch;
1101 /* A Reset IOCTL is only sent by the boot CD in extreme cases. */
1102 /* There can never be any system activity ( network or disk ), but check */
1103 /* anyway just as a good practice. */
1104 pt = (ips_passthru_t *) scsi_sglist(SC);
1105 if ((pt->CoppCP.cmd.reset.op_code == IPS_CMD_RESET_CHANNEL) &&
1106 (pt->CoppCP.cmd.reset.adapter_flag == 1)) {
1107 if (ha->scb_activelist.count != 0) {
1108 SC->result = DID_BUS_BUSY << 16;
1112 ha->ioctl_reset = 1; /* This reset request is from an IOCTL */
1114 SC->result = DID_OK << 16;
1119 /* allocate space for the scribble */
1120 scratch = kmalloc(sizeof (ips_copp_wait_item_t), GFP_ATOMIC);
1123 SC->result = DID_ERROR << 16;
1129 scratch->scsi_cmd = SC;
1130 scratch->next = NULL;
1132 ips_putq_copp_tail(&ha->copp_waitlist, scratch);
1134 ips_putq_wait_tail(&ha->scb_waitlist, SC);
1137 ips_next(ha, IPS_INTR_IORL);
1142 /****************************************************************************/
1144 /* Routine Name: ips_biosparam */
1146 /* Routine Description: */
1148 /* Set bios geometry for the controller */
1150 /****************************************************************************/
1151 static int ips_biosparam(struct scsi_device *sdev, struct block_device *bdev,
1152 sector_t capacity, int geom[])
1154 ips_ha_t *ha = (ips_ha_t *) sdev->host->hostdata;
1159 METHOD_TRACE("ips_biosparam", 1);
1162 /* ?!?! host adater info invalid */
1168 if (!ips_read_adapter_status(ha, IPS_INTR_ON))
1169 /* ?!?! Enquiry command failed */
1172 if ((capacity > 0x400000) && ((ha->enq->ucMiscFlag & 0x8) == 0)) {
1173 heads = IPS_NORM_HEADS;
1174 sectors = IPS_NORM_SECTORS;
1176 heads = IPS_COMP_HEADS;
1177 sectors = IPS_COMP_SECTORS;
1180 cylinders = (unsigned long) capacity / (heads * sectors);
1182 DEBUG_VAR(2, "Geometry: heads: %d, sectors: %d, cylinders: %d",
1183 heads, sectors, cylinders);
1187 geom[2] = cylinders;
1192 /****************************************************************************/
1194 /* Routine Name: ips_slave_configure */
1196 /* Routine Description: */
1198 /* Set queue depths on devices once scan is complete */
1200 /****************************************************************************/
1202 ips_slave_configure(struct scsi_device * SDptr)
1207 ha = IPS_HA(SDptr->host);
1208 if (SDptr->tagged_supported && SDptr->type == TYPE_DISK) {
1209 min = ha->max_cmds / 2;
1210 if (ha->enq->ucLogDriveCount <= 2)
1211 min = ha->max_cmds - 1;
1212 scsi_adjust_queue_depth(SDptr, MSG_ORDERED_TAG, min);
1215 SDptr->skip_ms_page_8 = 1;
1216 SDptr->skip_ms_page_3f = 1;
1220 /****************************************************************************/
1222 /* Routine Name: do_ipsintr */
1224 /* Routine Description: */
1226 /* Wrapper for the interrupt handler */
1228 /****************************************************************************/
1230 do_ipsintr(int irq, void *dev_id)
1233 struct Scsi_Host *host;
1236 METHOD_TRACE("do_ipsintr", 2);
1238 ha = (ips_ha_t *) dev_id;
1241 host = ips_sh[ha->host_num];
1242 /* interrupt during initialization */
1244 (*ha->func.intr) (ha);
1248 spin_lock(host->host_lock);
1251 spin_unlock(host->host_lock);
1255 irqstatus = (*ha->func.intr) (ha);
1257 spin_unlock(host->host_lock);
1259 /* start the next command */
1260 ips_next(ha, IPS_INTR_ON);
1261 return IRQ_RETVAL(irqstatus);
1264 /****************************************************************************/
1266 /* Routine Name: ips_intr_copperhead */
1268 /* Routine Description: */
1270 /* Polling interrupt handler */
1272 /* ASSUMES interrupts are disabled */
1274 /****************************************************************************/
1276 ips_intr_copperhead(ips_ha_t * ha)
1283 METHOD_TRACE("ips_intr", 2);
1291 intrstatus = (*ha->func.isintr) (ha);
1295 * Unexpected/Shared interrupt
1304 intrstatus = (*ha->func.isintr) (ha);
1309 cstatus.value = (*ha->func.statupd) (ha);
1311 if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
1312 /* Spurious Interrupt ? */
1316 ips_chkstatus(ha, &cstatus);
1317 scb = (ips_scb_t *) sp->scb_addr;
1320 * use the callback function to finish things up
1321 * NOTE: interrupts are OFF for this
1323 (*scb->callback) (ha, scb);
1328 /****************************************************************************/
1330 /* Routine Name: ips_intr_morpheus */
1332 /* Routine Description: */
1334 /* Polling interrupt handler */
1336 /* ASSUMES interrupts are disabled */
1338 /****************************************************************************/
1340 ips_intr_morpheus(ips_ha_t * ha)
1347 METHOD_TRACE("ips_intr_morpheus", 2);
1355 intrstatus = (*ha->func.isintr) (ha);
1359 * Unexpected/Shared interrupt
1368 intrstatus = (*ha->func.isintr) (ha);
1373 cstatus.value = (*ha->func.statupd) (ha);
1375 if (cstatus.value == 0xffffffff)
1376 /* No more to process */
1379 if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
1380 IPS_PRINTK(KERN_WARNING, ha->pcidev,
1381 "Spurious interrupt; no ccb.\n");
1386 ips_chkstatus(ha, &cstatus);
1387 scb = (ips_scb_t *) sp->scb_addr;
1390 * use the callback function to finish things up
1391 * NOTE: interrupts are OFF for this
1393 (*scb->callback) (ha, scb);
1398 /****************************************************************************/
1400 /* Routine Name: ips_info */
1402 /* Routine Description: */
1404 /* Return info about the driver */
1406 /****************************************************************************/
1408 ips_info(struct Scsi_Host *SH)
1410 static char buffer[256];
1414 METHOD_TRACE("ips_info", 1);
1422 memset(bp, 0, sizeof (buffer));
1424 sprintf(bp, "%s%s%s Build %d", "IBM PCI ServeRAID ",
1425 IPS_VERSION_HIGH, IPS_VERSION_LOW, IPS_BUILD_IDENT);
1427 if (ha->ad_type > 0 && ha->ad_type <= MAX_ADAPTER_NAME) {
1429 strcat(bp, ips_adapter_name[ha->ad_type - 1]);
1436 /****************************************************************************/
1438 /* Routine Name: ips_proc_info */
1440 /* Routine Description: */
1442 /* The passthru interface for the driver */
1444 /****************************************************************************/
1446 ips_proc_info(struct Scsi_Host *host, char *buffer, char **start, off_t offset,
1447 int length, int func)
1451 ips_ha_t *ha = NULL;
1453 METHOD_TRACE("ips_proc_info", 1);
1455 /* Find our host structure */
1456 for (i = 0; i < ips_next_controller; i++) {
1458 if (ips_sh[i] == host) {
1459 ha = (ips_ha_t *) ips_sh[i]->hostdata;
1476 ret = ips_host_info(ha, buffer, offset, length);
1482 /*--------------------------------------------------------------------------*/
1483 /* Helper Functions */
1484 /*--------------------------------------------------------------------------*/
1486 /****************************************************************************/
1488 /* Routine Name: ips_is_passthru */
1490 /* Routine Description: */
1492 /* Determine if the specified SCSI command is really a passthru command */
1494 /****************************************************************************/
1495 static int ips_is_passthru(struct scsi_cmnd *SC)
1497 unsigned long flags;
1499 METHOD_TRACE("ips_is_passthru", 1);
1504 if ((SC->cmnd[0] == IPS_IOCTL_COMMAND) &&
1505 (SC->device->channel == 0) &&
1506 (SC->device->id == IPS_ADAPTER_ID) &&
1507 (SC->device->lun == 0) && scsi_sglist(SC)) {
1508 struct scatterlist *sg = scsi_sglist(SC);
1511 /* kmap_atomic() ensures addressability of the user buffer.*/
1512 /* local_irq_save() protects the KM_IRQ0 address slot. */
1513 local_irq_save(flags);
1514 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
1515 if (buffer && buffer[0] == 'C' && buffer[1] == 'O' &&
1516 buffer[2] == 'P' && buffer[3] == 'P') {
1517 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
1518 local_irq_restore(flags);
1521 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
1522 local_irq_restore(flags);
1527 /****************************************************************************/
1529 /* Routine Name: ips_alloc_passthru_buffer */
1531 /* Routine Description: */
1532 /* allocate a buffer large enough for the ioctl data if the ioctl buffer */
1533 /* is too small or doesn't exist */
1534 /****************************************************************************/
1536 ips_alloc_passthru_buffer(ips_ha_t * ha, int length)
1539 dma_addr_t dma_busaddr;
1541 if (ha->ioctl_data && length <= ha->ioctl_len)
1543 /* there is no buffer or it's not big enough, allocate a new one */
1544 bigger_buf = pci_alloc_consistent(ha->pcidev, length, &dma_busaddr);
1546 /* free the old memory */
1547 pci_free_consistent(ha->pcidev, ha->ioctl_len, ha->ioctl_data,
1549 /* use the new memory */
1550 ha->ioctl_data = (char *) bigger_buf;
1551 ha->ioctl_len = length;
1552 ha->ioctl_busaddr = dma_busaddr;
1559 /****************************************************************************/
1561 /* Routine Name: ips_make_passthru */
1563 /* Routine Description: */
1565 /* Make a passthru command out of the info in the Scsi block */
1567 /****************************************************************************/
1569 ips_make_passthru(ips_ha_t *ha, struct scsi_cmnd *SC, ips_scb_t *scb, int intr)
1574 struct scatterlist *sg = scsi_sglist(SC);
1576 METHOD_TRACE("ips_make_passthru", 1);
1578 scsi_for_each_sg(SC, sg, scsi_sg_count(SC), i)
1579 length += sg->length;
1581 if (length < sizeof (ips_passthru_t)) {
1583 DEBUG_VAR(1, "(%s%d) Passthru structure wrong size",
1584 ips_name, ha->host_num);
1585 return (IPS_FAILURE);
1587 if (ips_alloc_passthru_buffer(ha, length)) {
1588 /* allocation failure! If ha->ioctl_data exists, use it to return
1589 some error codes. Return a failed command to the scsi layer. */
1590 if (ha->ioctl_data) {
1591 pt = (ips_passthru_t *) ha->ioctl_data;
1592 ips_scmd_buf_read(SC, pt, sizeof (ips_passthru_t));
1593 pt->BasicStatus = 0x0B;
1594 pt->ExtendedStatus = 0x00;
1595 ips_scmd_buf_write(SC, pt, sizeof (ips_passthru_t));
1599 ha->ioctl_datasize = length;
1601 ips_scmd_buf_read(SC, ha->ioctl_data, ha->ioctl_datasize);
1602 pt = (ips_passthru_t *) ha->ioctl_data;
1605 * Some notes about the passthru interface used
1607 * IF the scsi op_code == 0x0d then we assume
1608 * that the data came along with/goes with the
1609 * packet we received from the sg driver. In this
1610 * case the CmdBSize field of the pt structure is
1611 * used for the size of the buffer.
1614 switch (pt->CoppCmd) {
1616 memcpy(ha->ioctl_data + sizeof (ips_passthru_t),
1617 &ips_num_controllers, sizeof (int));
1618 ips_scmd_buf_write(SC, ha->ioctl_data,
1619 sizeof (ips_passthru_t) + sizeof (int));
1620 SC->result = DID_OK << 16;
1622 return (IPS_SUCCESS_IMM);
1624 case IPS_COPPUSRCMD:
1625 case IPS_COPPIOCCMD:
1626 if (SC->cmnd[0] == IPS_IOCTL_COMMAND) {
1627 if (length < (sizeof (ips_passthru_t) + pt->CmdBSize)) {
1630 "(%s%d) Passthru structure wrong size",
1631 ips_name, ha->host_num);
1633 return (IPS_FAILURE);
1636 if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD &&
1637 pt->CoppCP.cmd.flashfw.op_code ==
1638 IPS_CMD_RW_BIOSFW) {
1639 ret = ips_flash_copperhead(ha, pt, scb);
1640 ips_scmd_buf_write(SC, ha->ioctl_data,
1641 sizeof (ips_passthru_t));
1644 if (ips_usrcmd(ha, pt, scb))
1645 return (IPS_SUCCESS);
1647 return (IPS_FAILURE);
1654 return (IPS_FAILURE);
1657 /****************************************************************************/
1658 /* Routine Name: ips_flash_copperhead */
1659 /* Routine Description: */
1660 /* Flash the BIOS/FW on a Copperhead style controller */
1661 /****************************************************************************/
1663 ips_flash_copperhead(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1667 /* Trombone is the only copperhead that can do packet flash, but only
1668 * for firmware. No one said it had to make sence. */
1669 if (IPS_IS_TROMBONE(ha) && pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE) {
1670 if (ips_usrcmd(ha, pt, scb))
1675 pt->BasicStatus = 0x0B;
1676 pt->ExtendedStatus = 0;
1677 scb->scsi_cmd->result = DID_OK << 16;
1678 /* IF it's OK to Use the "CD BOOT" Flash Buffer, then you can */
1679 /* avoid allocating a huge buffer per adapter ( which can fail ). */
1680 if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1681 pt->CoppCP.cmd.flashfw.direction == IPS_ERASE_BIOS) {
1682 pt->BasicStatus = 0;
1683 return ips_flash_bios(ha, pt, scb);
1684 } else if (pt->CoppCP.cmd.flashfw.packet_num == 0) {
1685 if (ips_FlashData && !test_and_set_bit(0, &ips_FlashDataInUse)){
1686 ha->flash_data = ips_FlashData;
1687 ha->flash_busaddr = ips_flashbusaddr;
1688 ha->flash_len = PAGE_SIZE << 7;
1689 ha->flash_datasize = 0;
1690 } else if (!ha->flash_data) {
1691 datasize = pt->CoppCP.cmd.flashfw.total_packets *
1692 pt->CoppCP.cmd.flashfw.count;
1693 ha->flash_data = pci_alloc_consistent(ha->pcidev,
1695 &ha->flash_busaddr);
1696 if (!ha->flash_data){
1697 printk(KERN_WARNING "Unable to allocate a flash buffer\n");
1700 ha->flash_datasize = 0;
1701 ha->flash_len = datasize;
1705 if (pt->CoppCP.cmd.flashfw.count + ha->flash_datasize >
1707 ips_free_flash_copperhead(ha);
1708 IPS_PRINTK(KERN_WARNING, ha->pcidev,
1709 "failed size sanity check\n");
1713 if (!ha->flash_data)
1715 pt->BasicStatus = 0;
1716 memcpy(&ha->flash_data[ha->flash_datasize], pt + 1,
1717 pt->CoppCP.cmd.flashfw.count);
1718 ha->flash_datasize += pt->CoppCP.cmd.flashfw.count;
1719 if (pt->CoppCP.cmd.flashfw.packet_num ==
1720 pt->CoppCP.cmd.flashfw.total_packets - 1) {
1721 if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE)
1722 return ips_flash_bios(ha, pt, scb);
1723 else if (pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE)
1724 return ips_flash_firmware(ha, pt, scb);
1726 return IPS_SUCCESS_IMM;
1729 /****************************************************************************/
1730 /* Routine Name: ips_flash_bios */
1731 /* Routine Description: */
1732 /* flashes the bios of a copperhead adapter */
1733 /****************************************************************************/
1735 ips_flash_bios(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1738 if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1739 pt->CoppCP.cmd.flashfw.direction == IPS_WRITE_BIOS) {
1740 if ((!ha->func.programbios) || (!ha->func.erasebios) ||
1741 (!ha->func.verifybios))
1743 if ((*ha->func.erasebios) (ha)) {
1745 "(%s%d) flash bios failed - unable to erase flash",
1746 ips_name, ha->host_num);
1749 if ((*ha->func.programbios) (ha,
1752 ha->flash_datasize -
1753 IPS_BIOS_HEADER, 0)) {
1755 "(%s%d) flash bios failed - unable to flash",
1756 ips_name, ha->host_num);
1759 if ((*ha->func.verifybios) (ha,
1762 ha->flash_datasize -
1763 IPS_BIOS_HEADER, 0)) {
1765 "(%s%d) flash bios failed - unable to verify flash",
1766 ips_name, ha->host_num);
1769 ips_free_flash_copperhead(ha);
1770 return IPS_SUCCESS_IMM;
1771 } else if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1772 pt->CoppCP.cmd.flashfw.direction == IPS_ERASE_BIOS) {
1773 if (!ha->func.erasebios)
1775 if ((*ha->func.erasebios) (ha)) {
1777 "(%s%d) flash bios failed - unable to erase flash",
1778 ips_name, ha->host_num);
1781 return IPS_SUCCESS_IMM;
1784 pt->BasicStatus = 0x0B;
1785 pt->ExtendedStatus = 0x00;
1786 ips_free_flash_copperhead(ha);
1790 /****************************************************************************/
1792 /* Routine Name: ips_fill_scb_sg_single */
1794 /* Routine Description: */
1795 /* Fill in a single scb sg_list element from an address */
1796 /* return a -1 if a breakup occurred */
1797 /****************************************************************************/
1799 ips_fill_scb_sg_single(ips_ha_t * ha, dma_addr_t busaddr,
1800 ips_scb_t * scb, int indx, unsigned int e_len)
1805 if ((scb->data_len + e_len) > ha->max_xfer) {
1806 e_len = ha->max_xfer - scb->data_len;
1807 scb->breakup = indx;
1814 if (IPS_USE_ENH_SGLIST(ha)) {
1815 scb->sg_list.enh_list[indx].address_lo =
1816 cpu_to_le32(pci_dma_lo32(busaddr));
1817 scb->sg_list.enh_list[indx].address_hi =
1818 cpu_to_le32(pci_dma_hi32(busaddr));
1819 scb->sg_list.enh_list[indx].length = cpu_to_le32(e_len);
1821 scb->sg_list.std_list[indx].address =
1822 cpu_to_le32(pci_dma_lo32(busaddr));
1823 scb->sg_list.std_list[indx].length = cpu_to_le32(e_len);
1827 scb->data_len += e_len;
1831 /****************************************************************************/
1832 /* Routine Name: ips_flash_firmware */
1833 /* Routine Description: */
1834 /* flashes the firmware of a copperhead adapter */
1835 /****************************************************************************/
1837 ips_flash_firmware(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1839 IPS_SG_LIST sg_list;
1840 uint32_t cmd_busaddr;
1842 if (pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE &&
1843 pt->CoppCP.cmd.flashfw.direction == IPS_WRITE_FW) {
1844 memset(&pt->CoppCP.cmd, 0, sizeof (IPS_HOST_COMMAND));
1845 pt->CoppCP.cmd.flashfw.op_code = IPS_CMD_DOWNLOAD;
1846 pt->CoppCP.cmd.flashfw.count = cpu_to_le32(ha->flash_datasize);
1848 pt->BasicStatus = 0x0B;
1849 pt->ExtendedStatus = 0x00;
1850 ips_free_flash_copperhead(ha);
1853 /* Save the S/G list pointer so it doesn't get clobbered */
1854 sg_list.list = scb->sg_list.list;
1855 cmd_busaddr = scb->scb_busaddr;
1856 /* copy in the CP */
1857 memcpy(&scb->cmd, &pt->CoppCP.cmd, sizeof (IPS_IOCTL_CMD));
1858 /* FIX stuff that might be wrong */
1859 scb->sg_list.list = sg_list.list;
1860 scb->scb_busaddr = cmd_busaddr;
1861 scb->bus = scb->scsi_cmd->device->channel;
1862 scb->target_id = scb->scsi_cmd->device->id;
1863 scb->lun = scb->scsi_cmd->device->lun;
1868 scb->callback = ipsintr_done;
1869 scb->timeout = ips_cmd_timeout;
1871 scb->data_len = ha->flash_datasize;
1873 pci_map_single(ha->pcidev, ha->flash_data, scb->data_len,
1875 scb->flags |= IPS_SCB_MAP_SINGLE;
1876 scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb);
1877 scb->cmd.flashfw.buffer_addr = cpu_to_le32(scb->data_busaddr);
1879 scb->timeout = pt->TimeOut;
1880 scb->scsi_cmd->result = DID_OK << 16;
1884 /****************************************************************************/
1885 /* Routine Name: ips_free_flash_copperhead */
1886 /* Routine Description: */
1887 /* release the memory resources used to hold the flash image */
1888 /****************************************************************************/
1890 ips_free_flash_copperhead(ips_ha_t * ha)
1892 if (ha->flash_data == ips_FlashData)
1893 test_and_clear_bit(0, &ips_FlashDataInUse);
1894 else if (ha->flash_data)
1895 pci_free_consistent(ha->pcidev, ha->flash_len, ha->flash_data,
1897 ha->flash_data = NULL;
1900 /****************************************************************************/
1902 /* Routine Name: ips_usrcmd */
1904 /* Routine Description: */
1906 /* Process a user command and make it ready to send */
1908 /****************************************************************************/
1910 ips_usrcmd(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1912 IPS_SG_LIST sg_list;
1913 uint32_t cmd_busaddr;
1915 METHOD_TRACE("ips_usrcmd", 1);
1917 if ((!scb) || (!pt) || (!ha))
1920 /* Save the S/G list pointer so it doesn't get clobbered */
1921 sg_list.list = scb->sg_list.list;
1922 cmd_busaddr = scb->scb_busaddr;
1923 /* copy in the CP */
1924 memcpy(&scb->cmd, &pt->CoppCP.cmd, sizeof (IPS_IOCTL_CMD));
1925 memcpy(&scb->dcdb, &pt->CoppCP.dcdb, sizeof (IPS_DCDB_TABLE));
1927 /* FIX stuff that might be wrong */
1928 scb->sg_list.list = sg_list.list;
1929 scb->scb_busaddr = cmd_busaddr;
1930 scb->bus = scb->scsi_cmd->device->channel;
1931 scb->target_id = scb->scsi_cmd->device->id;
1932 scb->lun = scb->scsi_cmd->device->lun;
1937 scb->callback = ipsintr_done;
1938 scb->timeout = ips_cmd_timeout;
1939 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
1941 /* we don't support DCDB/READ/WRITE Scatter Gather */
1942 if ((scb->cmd.basic_io.op_code == IPS_CMD_READ_SG) ||
1943 (scb->cmd.basic_io.op_code == IPS_CMD_WRITE_SG) ||
1944 (scb->cmd.basic_io.op_code == IPS_CMD_DCDB_SG))
1948 scb->data_len = pt->CmdBSize;
1949 scb->data_busaddr = ha->ioctl_busaddr + sizeof (ips_passthru_t);
1951 scb->data_busaddr = 0L;
1954 if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)
1955 scb->cmd.dcdb.dcdb_address = cpu_to_le32(scb->scb_busaddr +
1956 (unsigned long) &scb->
1958 (unsigned long) scb);
1961 if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)
1962 scb->dcdb.buffer_pointer =
1963 cpu_to_le32(scb->data_busaddr);
1965 scb->cmd.basic_io.sg_addr =
1966 cpu_to_le32(scb->data_busaddr);
1971 scb->timeout = pt->TimeOut;
1973 if (pt->TimeOut <= 10)
1974 scb->dcdb.cmd_attribute |= IPS_TIMEOUT10;
1975 else if (pt->TimeOut <= 60)
1976 scb->dcdb.cmd_attribute |= IPS_TIMEOUT60;
1978 scb->dcdb.cmd_attribute |= IPS_TIMEOUT20M;
1981 /* assume success */
1982 scb->scsi_cmd->result = DID_OK << 16;
1988 /****************************************************************************/
1990 /* Routine Name: ips_cleanup_passthru */
1992 /* Routine Description: */
1994 /* Cleanup after a passthru command */
1996 /****************************************************************************/
1998 ips_cleanup_passthru(ips_ha_t * ha, ips_scb_t * scb)
2002 METHOD_TRACE("ips_cleanup_passthru", 1);
2004 if ((!scb) || (!scb->scsi_cmd) || (!scsi_sglist(scb->scsi_cmd))) {
2005 DEBUG_VAR(1, "(%s%d) couldn't cleanup after passthru",
2006 ips_name, ha->host_num);
2010 pt = (ips_passthru_t *) ha->ioctl_data;
2012 /* Copy data back to the user */
2013 if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB) /* Copy DCDB Back to Caller's Area */
2014 memcpy(&pt->CoppCP.dcdb, &scb->dcdb, sizeof (IPS_DCDB_TABLE));
2016 pt->BasicStatus = scb->basic_status;
2017 pt->ExtendedStatus = scb->extended_status;
2018 pt->AdapterType = ha->ad_type;
2020 if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD &&
2021 (scb->cmd.flashfw.op_code == IPS_CMD_DOWNLOAD ||
2022 scb->cmd.flashfw.op_code == IPS_CMD_RW_BIOSFW))
2023 ips_free_flash_copperhead(ha);
2025 ips_scmd_buf_write(scb->scsi_cmd, ha->ioctl_data, ha->ioctl_datasize);
2028 /****************************************************************************/
2030 /* Routine Name: ips_host_info */
2032 /* Routine Description: */
2034 /* The passthru interface for the driver */
2036 /****************************************************************************/
2038 ips_host_info(ips_ha_t * ha, char *ptr, off_t offset, int len)
2042 METHOD_TRACE("ips_host_info", 1);
2046 info.offset = offset;
2050 copy_info(&info, "\nIBM ServeRAID General Information:\n\n");
2052 if ((le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) &&
2053 (le16_to_cpu(ha->nvram->adapter_type) != 0))
2054 copy_info(&info, "\tController Type : %s\n",
2055 ips_adapter_name[ha->ad_type - 1]);
2058 "\tController Type : Unknown\n");
2062 "\tIO region : 0x%lx (%d bytes)\n",
2063 ha->io_addr, ha->io_len);
2067 "\tMemory region : 0x%lx (%d bytes)\n",
2068 ha->mem_addr, ha->mem_len);
2070 "\tShared memory address : 0x%lx\n",
2074 copy_info(&info, "\tIRQ number : %d\n", ha->pcidev->irq);
2076 /* For the Next 3 lines Check for Binary 0 at the end and don't include it if it's there. */
2077 /* That keeps everything happy for "text" operations on the proc file. */
2079 if (le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) {
2080 if (ha->nvram->bios_low[3] == 0) {
2082 "\tBIOS Version : %c%c%c%c%c%c%c\n",
2083 ha->nvram->bios_high[0], ha->nvram->bios_high[1],
2084 ha->nvram->bios_high[2], ha->nvram->bios_high[3],
2085 ha->nvram->bios_low[0], ha->nvram->bios_low[1],
2086 ha->nvram->bios_low[2]);
2090 "\tBIOS Version : %c%c%c%c%c%c%c%c\n",
2091 ha->nvram->bios_high[0], ha->nvram->bios_high[1],
2092 ha->nvram->bios_high[2], ha->nvram->bios_high[3],
2093 ha->nvram->bios_low[0], ha->nvram->bios_low[1],
2094 ha->nvram->bios_low[2], ha->nvram->bios_low[3]);
2099 if (ha->enq->CodeBlkVersion[7] == 0) {
2101 "\tFirmware Version : %c%c%c%c%c%c%c\n",
2102 ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1],
2103 ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3],
2104 ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5],
2105 ha->enq->CodeBlkVersion[6]);
2108 "\tFirmware Version : %c%c%c%c%c%c%c%c\n",
2109 ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1],
2110 ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3],
2111 ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5],
2112 ha->enq->CodeBlkVersion[6], ha->enq->CodeBlkVersion[7]);
2115 if (ha->enq->BootBlkVersion[7] == 0) {
2117 "\tBoot Block Version : %c%c%c%c%c%c%c\n",
2118 ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1],
2119 ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3],
2120 ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5],
2121 ha->enq->BootBlkVersion[6]);
2124 "\tBoot Block Version : %c%c%c%c%c%c%c%c\n",
2125 ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1],
2126 ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3],
2127 ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5],
2128 ha->enq->BootBlkVersion[6], ha->enq->BootBlkVersion[7]);
2131 copy_info(&info, "\tDriver Version : %s%s\n",
2132 IPS_VERSION_HIGH, IPS_VERSION_LOW);
2134 copy_info(&info, "\tDriver Build : %d\n",
2137 copy_info(&info, "\tMax Physical Devices : %d\n",
2138 ha->enq->ucMaxPhysicalDevices);
2139 copy_info(&info, "\tMax Active Commands : %d\n",
2141 copy_info(&info, "\tCurrent Queued Commands : %d\n",
2142 ha->scb_waitlist.count);
2143 copy_info(&info, "\tCurrent Active Commands : %d\n",
2144 ha->scb_activelist.count - ha->num_ioctl);
2145 copy_info(&info, "\tCurrent Queued PT Commands : %d\n",
2146 ha->copp_waitlist.count);
2147 copy_info(&info, "\tCurrent Active PT Commands : %d\n",
2150 copy_info(&info, "\n");
2152 return (info.localpos);
2155 /****************************************************************************/
2157 /* Routine Name: copy_mem_info */
2159 /* Routine Description: */
2161 /* Copy data into an IPS_INFOSTR structure */
2163 /****************************************************************************/
2165 copy_mem_info(IPS_INFOSTR * info, char *data, int len)
2167 METHOD_TRACE("copy_mem_info", 1);
2169 if (info->pos + len < info->offset) {
2174 if (info->pos < info->offset) {
2175 data += (info->offset - info->pos);
2176 len -= (info->offset - info->pos);
2177 info->pos += (info->offset - info->pos);
2180 if (info->localpos + len > info->length)
2181 len = info->length - info->localpos;
2184 memcpy(info->buffer + info->localpos, data, len);
2186 info->localpos += len;
2190 /****************************************************************************/
2192 /* Routine Name: copy_info */
2194 /* Routine Description: */
2196 /* printf style wrapper for an info structure */
2198 /****************************************************************************/
2200 copy_info(IPS_INFOSTR * info, char *fmt, ...)
2206 METHOD_TRACE("copy_info", 1);
2208 va_start(args, fmt);
2209 len = vsprintf(buf, fmt, args);
2212 copy_mem_info(info, buf, len);
2217 /****************************************************************************/
2219 /* Routine Name: ips_identify_controller */
2221 /* Routine Description: */
2223 /* Identify this controller */
2225 /****************************************************************************/
2227 ips_identify_controller(ips_ha_t * ha)
2229 METHOD_TRACE("ips_identify_controller", 1);
2231 switch (ha->pcidev->device) {
2232 case IPS_DEVICEID_COPPERHEAD:
2233 if (ha->pcidev->revision <= IPS_REVID_SERVERAID) {
2234 ha->ad_type = IPS_ADTYPE_SERVERAID;
2235 } else if (ha->pcidev->revision == IPS_REVID_SERVERAID2) {
2236 ha->ad_type = IPS_ADTYPE_SERVERAID2;
2237 } else if (ha->pcidev->revision == IPS_REVID_NAVAJO) {
2238 ha->ad_type = IPS_ADTYPE_NAVAJO;
2239 } else if ((ha->pcidev->revision == IPS_REVID_SERVERAID2)
2240 && (ha->slot_num == 0)) {
2241 ha->ad_type = IPS_ADTYPE_KIOWA;
2242 } else if ((ha->pcidev->revision >= IPS_REVID_CLARINETP1) &&
2243 (ha->pcidev->revision <= IPS_REVID_CLARINETP3)) {
2244 if (ha->enq->ucMaxPhysicalDevices == 15)
2245 ha->ad_type = IPS_ADTYPE_SERVERAID3L;
2247 ha->ad_type = IPS_ADTYPE_SERVERAID3;
2248 } else if ((ha->pcidev->revision >= IPS_REVID_TROMBONE32) &&
2249 (ha->pcidev->revision <= IPS_REVID_TROMBONE64)) {
2250 ha->ad_type = IPS_ADTYPE_SERVERAID4H;
2254 case IPS_DEVICEID_MORPHEUS:
2255 switch (ha->pcidev->subsystem_device) {
2256 case IPS_SUBDEVICEID_4L:
2257 ha->ad_type = IPS_ADTYPE_SERVERAID4L;
2260 case IPS_SUBDEVICEID_4M:
2261 ha->ad_type = IPS_ADTYPE_SERVERAID4M;
2264 case IPS_SUBDEVICEID_4MX:
2265 ha->ad_type = IPS_ADTYPE_SERVERAID4MX;
2268 case IPS_SUBDEVICEID_4LX:
2269 ha->ad_type = IPS_ADTYPE_SERVERAID4LX;
2272 case IPS_SUBDEVICEID_5I2:
2273 ha->ad_type = IPS_ADTYPE_SERVERAID5I2;
2276 case IPS_SUBDEVICEID_5I1:
2277 ha->ad_type = IPS_ADTYPE_SERVERAID5I1;
2283 case IPS_DEVICEID_MARCO:
2284 switch (ha->pcidev->subsystem_device) {
2285 case IPS_SUBDEVICEID_6M:
2286 ha->ad_type = IPS_ADTYPE_SERVERAID6M;
2288 case IPS_SUBDEVICEID_6I:
2289 ha->ad_type = IPS_ADTYPE_SERVERAID6I;
2291 case IPS_SUBDEVICEID_7k:
2292 ha->ad_type = IPS_ADTYPE_SERVERAID7k;
2294 case IPS_SUBDEVICEID_7M:
2295 ha->ad_type = IPS_ADTYPE_SERVERAID7M;
2302 /****************************************************************************/
2304 /* Routine Name: ips_get_bios_version */
2306 /* Routine Description: */
2308 /* Get the BIOS revision number */
2310 /****************************************************************************/
2312 ips_get_bios_version(ips_ha_t * ha, int intr)
2321 { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C',
2324 METHOD_TRACE("ips_get_bios_version", 1);
2329 strncpy(ha->bios_version, " ?", 8);
2331 if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD) {
2332 if (IPS_USE_MEMIO(ha)) {
2333 /* Memory Mapped I/O */
2336 writel(0, ha->mem_ptr + IPS_REG_FLAP);
2337 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2338 udelay(25); /* 25 us */
2340 if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55)
2343 writel(1, ha->mem_ptr + IPS_REG_FLAP);
2344 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2345 udelay(25); /* 25 us */
2347 if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA)
2350 /* Get Major version */
2351 writel(0x1FF, ha->mem_ptr + IPS_REG_FLAP);
2352 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2353 udelay(25); /* 25 us */
2355 major = readb(ha->mem_ptr + IPS_REG_FLDP);
2357 /* Get Minor version */
2358 writel(0x1FE, ha->mem_ptr + IPS_REG_FLAP);
2359 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2360 udelay(25); /* 25 us */
2361 minor = readb(ha->mem_ptr + IPS_REG_FLDP);
2363 /* Get SubMinor version */
2364 writel(0x1FD, ha->mem_ptr + IPS_REG_FLAP);
2365 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2366 udelay(25); /* 25 us */
2367 subminor = readb(ha->mem_ptr + IPS_REG_FLDP);
2370 /* Programmed I/O */
2373 outl(0, ha->io_addr + IPS_REG_FLAP);
2374 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2375 udelay(25); /* 25 us */
2377 if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
2380 outl(cpu_to_le32(1), ha->io_addr + IPS_REG_FLAP);
2381 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2382 udelay(25); /* 25 us */
2384 if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
2387 /* Get Major version */
2388 outl(cpu_to_le32(0x1FF), ha->io_addr + IPS_REG_FLAP);
2389 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2390 udelay(25); /* 25 us */
2392 major = inb(ha->io_addr + IPS_REG_FLDP);
2394 /* Get Minor version */
2395 outl(cpu_to_le32(0x1FE), ha->io_addr + IPS_REG_FLAP);
2396 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2397 udelay(25); /* 25 us */
2399 minor = inb(ha->io_addr + IPS_REG_FLDP);
2401 /* Get SubMinor version */
2402 outl(cpu_to_le32(0x1FD), ha->io_addr + IPS_REG_FLAP);
2403 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2404 udelay(25); /* 25 us */
2406 subminor = inb(ha->io_addr + IPS_REG_FLDP);
2410 /* Morpheus Family - Send Command to the card */
2412 buffer = ha->ioctl_data;
2414 memset(buffer, 0, 0x1000);
2416 scb = &ha->scbs[ha->max_cmds - 1];
2418 ips_init_scb(ha, scb);
2420 scb->timeout = ips_cmd_timeout;
2421 scb->cdb[0] = IPS_CMD_RW_BIOSFW;
2423 scb->cmd.flashfw.op_code = IPS_CMD_RW_BIOSFW;
2424 scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb);
2425 scb->cmd.flashfw.type = 1;
2426 scb->cmd.flashfw.direction = 0;
2427 scb->cmd.flashfw.count = cpu_to_le32(0x800);
2428 scb->cmd.flashfw.total_packets = 1;
2429 scb->cmd.flashfw.packet_num = 0;
2430 scb->data_len = 0x1000;
2431 scb->cmd.flashfw.buffer_addr = ha->ioctl_busaddr;
2433 /* issue the command */
2435 ips_send_wait(ha, scb, ips_cmd_timeout,
2436 intr)) == IPS_FAILURE)
2437 || (ret == IPS_SUCCESS_IMM)
2438 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
2439 /* Error occurred */
2444 if ((buffer[0xC0] == 0x55) && (buffer[0xC1] == 0xAA)) {
2445 major = buffer[0x1ff + 0xC0]; /* Offset 0x1ff after the header (0xc0) */
2446 minor = buffer[0x1fe + 0xC0]; /* Offset 0x1fe after the header (0xc0) */
2447 subminor = buffer[0x1fd + 0xC0]; /* Offset 0x1fd after the header (0xc0) */
2453 ha->bios_version[0] = hexDigits[(major & 0xF0) >> 4];
2454 ha->bios_version[1] = '.';
2455 ha->bios_version[2] = hexDigits[major & 0x0F];
2456 ha->bios_version[3] = hexDigits[subminor];
2457 ha->bios_version[4] = '.';
2458 ha->bios_version[5] = hexDigits[(minor & 0xF0) >> 4];
2459 ha->bios_version[6] = hexDigits[minor & 0x0F];
2460 ha->bios_version[7] = 0;
2463 /****************************************************************************/
2465 /* Routine Name: ips_hainit */
2467 /* Routine Description: */
2469 /* Initialize the controller */
2471 /* NOTE: Assumes to be called from with a lock */
2473 /****************************************************************************/
2475 ips_hainit(ips_ha_t * ha)
2480 METHOD_TRACE("ips_hainit", 1);
2485 if (ha->func.statinit)
2486 (*ha->func.statinit) (ha);
2488 if (ha->func.enableint)
2489 (*ha->func.enableint) (ha);
2492 ha->reset_count = 1;
2493 do_gettimeofday(&tv);
2494 ha->last_ffdc = tv.tv_sec;
2495 ips_ffdc_reset(ha, IPS_INTR_IORL);
2497 if (!ips_read_config(ha, IPS_INTR_IORL)) {
2498 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2499 "unable to read config from controller.\n");
2504 if (!ips_read_adapter_status(ha, IPS_INTR_IORL)) {
2505 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2506 "unable to read controller status.\n");
2511 /* Identify this controller */
2512 ips_identify_controller(ha);
2514 if (!ips_read_subsystem_parameters(ha, IPS_INTR_IORL)) {
2515 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2516 "unable to read subsystem parameters.\n");
2521 /* write nvram user page 5 */
2522 if (!ips_write_driver_status(ha, IPS_INTR_IORL)) {
2523 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2524 "unable to write driver info to controller.\n");
2529 /* If there are Logical Drives and a Reset Occurred, then an EraseStripeLock is Needed */
2530 if ((ha->conf->ucLogDriveCount > 0) && (ha->requires_esl == 1))
2531 ips_clear_adapter(ha, IPS_INTR_IORL);
2533 /* set limits on SID, LUN, BUS */
2534 ha->ntargets = IPS_MAX_TARGETS + 1;
2536 ha->nbus = (ha->enq->ucMaxPhysicalDevices / IPS_MAX_TARGETS) + 1;
2538 switch (ha->conf->logical_drive[0].ucStripeSize) {
2540 ha->max_xfer = 0x10000;
2544 ha->max_xfer = 0x20000;
2548 ha->max_xfer = 0x40000;
2553 ha->max_xfer = 0x80000;
2557 /* setup max concurrent commands */
2558 if (le32_to_cpu(ha->subsys->param[4]) & 0x1) {
2559 /* Use the new method */
2560 ha->max_cmds = ha->enq->ucConcurrentCmdCount;
2562 /* use the old method */
2563 switch (ha->conf->logical_drive[0].ucStripeSize) {
2583 /* Limit the Active Commands on a Lite Adapter */
2584 if ((ha->ad_type == IPS_ADTYPE_SERVERAID3L) ||
2585 (ha->ad_type == IPS_ADTYPE_SERVERAID4L) ||
2586 (ha->ad_type == IPS_ADTYPE_SERVERAID4LX)) {
2587 if ((ha->max_cmds > MaxLiteCmds) && (MaxLiteCmds))
2588 ha->max_cmds = MaxLiteCmds;
2591 /* set controller IDs */
2592 ha->ha_id[0] = IPS_ADAPTER_ID;
2593 for (i = 1; i < ha->nbus; i++) {
2594 ha->ha_id[i] = ha->conf->init_id[i - 1] & 0x1f;
2595 ha->dcdb_active[i - 1] = 0;
2601 /****************************************************************************/
2603 /* Routine Name: ips_next */
2605 /* Routine Description: */
2607 /* Take the next command off the queue and send it to the controller */
2609 /****************************************************************************/
2611 ips_next(ips_ha_t * ha, int intr)
2614 struct scsi_cmnd *SC;
2615 struct scsi_cmnd *p;
2616 struct scsi_cmnd *q;
2617 ips_copp_wait_item_t *item;
2619 struct Scsi_Host *host;
2620 METHOD_TRACE("ips_next", 1);
2624 host = ips_sh[ha->host_num];
2626 * Block access to the queue function so
2627 * this command won't time out
2629 if (intr == IPS_INTR_ON)
2630 spin_lock(host->host_lock);
2632 if ((ha->subsys->param[3] & 0x300000)
2633 && (ha->scb_activelist.count == 0)) {
2636 do_gettimeofday(&tv);
2638 if (tv.tv_sec - ha->last_ffdc > IPS_SECS_8HOURS) {
2639 ha->last_ffdc = tv.tv_sec;
2645 * Send passthru commands
2646 * These have priority over normal I/O
2647 * but shouldn't affect performance too much
2648 * since we limit the number that can be active
2649 * on the card at any one time
2651 while ((ha->num_ioctl < IPS_MAX_IOCTL) &&
2652 (ha->copp_waitlist.head) && (scb = ips_getscb(ha))) {
2654 item = ips_removeq_copp_head(&ha->copp_waitlist);
2656 if (intr == IPS_INTR_ON)
2657 spin_unlock(host->host_lock);
2658 scb->scsi_cmd = item->scsi_cmd;
2661 ret = ips_make_passthru(ha, scb->scsi_cmd, scb, intr);
2663 if (intr == IPS_INTR_ON)
2664 spin_lock(host->host_lock);
2667 if (scb->scsi_cmd) {
2668 scb->scsi_cmd->result = DID_ERROR << 16;
2669 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2672 ips_freescb(ha, scb);
2674 case IPS_SUCCESS_IMM:
2675 if (scb->scsi_cmd) {
2676 scb->scsi_cmd->result = DID_OK << 16;
2677 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2680 ips_freescb(ha, scb);
2686 if (ret != IPS_SUCCESS) {
2691 ret = ips_send_cmd(ha, scb);
2693 if (ret == IPS_SUCCESS)
2694 ips_putq_scb_head(&ha->scb_activelist, scb);
2700 if (scb->scsi_cmd) {
2701 scb->scsi_cmd->result = DID_ERROR << 16;
2704 ips_freescb(ha, scb);
2706 case IPS_SUCCESS_IMM:
2707 ips_freescb(ha, scb);
2716 * Send "Normal" I/O commands
2719 p = ha->scb_waitlist.head;
2720 while ((p) && (scb = ips_getscb(ha))) {
2721 if ((scmd_channel(p) > 0)
2723 dcdb_active[scmd_channel(p) -
2724 1] & (1 << scmd_id(p)))) {
2725 ips_freescb(ha, scb);
2726 p = (struct scsi_cmnd *) p->host_scribble;
2731 SC = ips_removeq_wait(&ha->scb_waitlist, q);
2733 if (intr == IPS_INTR_ON)
2734 spin_unlock(host->host_lock); /* Unlock HA after command is taken off queue */
2736 SC->result = DID_OK;
2737 SC->host_scribble = NULL;
2739 scb->target_id = SC->device->id;
2740 scb->lun = SC->device->lun;
2741 scb->bus = SC->device->channel;
2745 scb->callback = ipsintr_done;
2746 scb->timeout = ips_cmd_timeout;
2747 memset(&scb->cmd, 0, 16);
2749 /* copy in the CDB */
2750 memcpy(scb->cdb, SC->cmnd, SC->cmd_len);
2752 scb->sg_count = scsi_dma_map(SC);
2753 BUG_ON(scb->sg_count < 0);
2754 if (scb->sg_count) {
2755 struct scatterlist *sg;
2758 scb->flags |= IPS_SCB_MAP_SG;
2760 scsi_for_each_sg(SC, sg, scb->sg_count, i) {
2761 if (ips_fill_scb_sg_single
2762 (ha, sg_dma_address(sg), scb, i,
2763 sg_dma_len(sg)) < 0)
2766 scb->dcdb.transfer_length = scb->data_len;
2768 scb->data_busaddr = 0L;
2771 scb->dcdb.transfer_length = 0;
2774 scb->dcdb.cmd_attribute =
2775 ips_command_direction[scb->scsi_cmd->cmnd[0]];
2777 /* Allow a WRITE BUFFER Command to Have no Data */
2778 /* This is Used by Tape Flash Utilites */
2779 if ((scb->scsi_cmd->cmnd[0] == WRITE_BUFFER) &&
2780 (scb->data_len == 0))
2781 scb->dcdb.cmd_attribute = 0;
2783 if (!(scb->dcdb.cmd_attribute & 0x3))
2784 scb->dcdb.transfer_length = 0;
2786 if (scb->data_len >= IPS_MAX_XFER) {
2787 scb->dcdb.cmd_attribute |= IPS_TRANSFER64K;
2788 scb->dcdb.transfer_length = 0;
2790 if (intr == IPS_INTR_ON)
2791 spin_lock(host->host_lock);
2793 ret = ips_send_cmd(ha, scb);
2797 ips_putq_scb_head(&ha->scb_activelist, scb);
2800 if (scb->scsi_cmd) {
2801 scb->scsi_cmd->result = DID_ERROR << 16;
2802 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2806 ha->dcdb_active[scb->bus - 1] &=
2807 ~(1 << scb->target_id);
2809 ips_freescb(ha, scb);
2811 case IPS_SUCCESS_IMM:
2813 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2816 ha->dcdb_active[scb->bus - 1] &=
2817 ~(1 << scb->target_id);
2819 ips_freescb(ha, scb);
2825 p = (struct scsi_cmnd *) p->host_scribble;
2829 if (intr == IPS_INTR_ON)
2830 spin_unlock(host->host_lock);
2833 /****************************************************************************/
2835 /* Routine Name: ips_putq_scb_head */
2837 /* Routine Description: */
2839 /* Add an item to the head of the queue */
2841 /* ASSUMED to be called from within the HA lock */
2843 /****************************************************************************/
2845 ips_putq_scb_head(ips_scb_queue_t * queue, ips_scb_t * item)
2847 METHOD_TRACE("ips_putq_scb_head", 1);
2852 item->q_next = queue->head;
2861 /****************************************************************************/
2863 /* Routine Name: ips_removeq_scb_head */
2865 /* Routine Description: */
2867 /* Remove the head of the queue */
2869 /* ASSUMED to be called from within the HA lock */
2871 /****************************************************************************/
2873 ips_removeq_scb_head(ips_scb_queue_t * queue)
2877 METHOD_TRACE("ips_removeq_scb_head", 1);
2885 queue->head = item->q_next;
2886 item->q_next = NULL;
2888 if (queue->tail == item)
2896 /****************************************************************************/
2898 /* Routine Name: ips_removeq_scb */
2900 /* Routine Description: */
2902 /* Remove an item from a queue */
2904 /* ASSUMED to be called from within the HA lock */
2906 /****************************************************************************/
2908 ips_removeq_scb(ips_scb_queue_t * queue, ips_scb_t * item)
2912 METHOD_TRACE("ips_removeq_scb", 1);
2917 if (item == queue->head) {
2918 return (ips_removeq_scb_head(queue));
2923 while ((p) && (item != p->q_next))
2928 p->q_next = item->q_next;
2933 item->q_next = NULL;
2942 /****************************************************************************/
2944 /* Routine Name: ips_putq_wait_tail */
2946 /* Routine Description: */
2948 /* Add an item to the tail of the queue */
2950 /* ASSUMED to be called from within the HA lock */
2952 /****************************************************************************/
2953 static void ips_putq_wait_tail(ips_wait_queue_t *queue, struct scsi_cmnd *item)
2955 METHOD_TRACE("ips_putq_wait_tail", 1);
2960 item->host_scribble = NULL;
2963 queue->tail->host_scribble = (char *) item;
2973 /****************************************************************************/
2975 /* Routine Name: ips_removeq_wait_head */
2977 /* Routine Description: */
2979 /* Remove the head of the queue */
2981 /* ASSUMED to be called from within the HA lock */
2983 /****************************************************************************/
2984 static struct scsi_cmnd *ips_removeq_wait_head(ips_wait_queue_t *queue)
2986 struct scsi_cmnd *item;
2988 METHOD_TRACE("ips_removeq_wait_head", 1);
2996 queue->head = (struct scsi_cmnd *) item->host_scribble;
2997 item->host_scribble = NULL;
2999 if (queue->tail == item)
3007 /****************************************************************************/
3009 /* Routine Name: ips_removeq_wait */
3011 /* Routine Description: */
3013 /* Remove an item from a queue */
3015 /* ASSUMED to be called from within the HA lock */
3017 /****************************************************************************/
3018 static struct scsi_cmnd *ips_removeq_wait(ips_wait_queue_t *queue,
3019 struct scsi_cmnd *item)
3021 struct scsi_cmnd *p;
3023 METHOD_TRACE("ips_removeq_wait", 1);
3028 if (item == queue->head) {
3029 return (ips_removeq_wait_head(queue));
3034 while ((p) && (item != (struct scsi_cmnd *) p->host_scribble))
3035 p = (struct scsi_cmnd *) p->host_scribble;
3039 p->host_scribble = item->host_scribble;
3041 if (!item->host_scribble)
3044 item->host_scribble = NULL;
3053 /****************************************************************************/
3055 /* Routine Name: ips_putq_copp_tail */
3057 /* Routine Description: */
3059 /* Add an item to the tail of the queue */
3061 /* ASSUMED to be called from within the HA lock */
3063 /****************************************************************************/
3065 ips_putq_copp_tail(ips_copp_queue_t * queue, ips_copp_wait_item_t * item)
3067 METHOD_TRACE("ips_putq_copp_tail", 1);
3075 queue->tail->next = item;
3085 /****************************************************************************/
3087 /* Routine Name: ips_removeq_copp_head */
3089 /* Routine Description: */
3091 /* Remove the head of the queue */
3093 /* ASSUMED to be called from within the HA lock */
3095 /****************************************************************************/
3096 static ips_copp_wait_item_t *
3097 ips_removeq_copp_head(ips_copp_queue_t * queue)
3099 ips_copp_wait_item_t *item;
3101 METHOD_TRACE("ips_removeq_copp_head", 1);
3109 queue->head = item->next;
3112 if (queue->tail == item)
3120 /****************************************************************************/
3122 /* Routine Name: ips_removeq_copp */
3124 /* Routine Description: */
3126 /* Remove an item from a queue */
3128 /* ASSUMED to be called from within the HA lock */
3130 /****************************************************************************/
3131 static ips_copp_wait_item_t *
3132 ips_removeq_copp(ips_copp_queue_t * queue, ips_copp_wait_item_t * item)
3134 ips_copp_wait_item_t *p;
3136 METHOD_TRACE("ips_removeq_copp", 1);
3141 if (item == queue->head) {
3142 return (ips_removeq_copp_head(queue));
3147 while ((p) && (item != p->next))
3152 p->next = item->next;
3166 /****************************************************************************/
3168 /* Routine Name: ipsintr_blocking */
3170 /* Routine Description: */
3172 /* Finalize an interrupt for internal commands */
3174 /****************************************************************************/
3176 ipsintr_blocking(ips_ha_t * ha, ips_scb_t * scb)
3178 METHOD_TRACE("ipsintr_blocking", 2);
3180 ips_freescb(ha, scb);
3181 if ((ha->waitflag == TRUE) && (ha->cmd_in_progress == scb->cdb[0])) {
3182 ha->waitflag = FALSE;
3188 /****************************************************************************/
3190 /* Routine Name: ipsintr_done */
3192 /* Routine Description: */
3194 /* Finalize an interrupt for non-internal commands */
3196 /****************************************************************************/
3198 ipsintr_done(ips_ha_t * ha, ips_scb_t * scb)
3200 METHOD_TRACE("ipsintr_done", 2);
3203 IPS_PRINTK(KERN_WARNING, ha->pcidev,
3204 "Spurious interrupt; scb NULL.\n");
3209 if (scb->scsi_cmd == NULL) {
3210 /* unexpected interrupt */
3211 IPS_PRINTK(KERN_WARNING, ha->pcidev,
3212 "Spurious interrupt; scsi_cmd not set.\n");
3220 /****************************************************************************/
3222 /* Routine Name: ips_done */
3224 /* Routine Description: */
3226 /* Do housekeeping on completed commands */
3227 /* ASSUMED to be called form within the request lock */
3228 /****************************************************************************/
3230 ips_done(ips_ha_t * ha, ips_scb_t * scb)
3234 METHOD_TRACE("ips_done", 1);
3239 if ((scb->scsi_cmd) && (ips_is_passthru(scb->scsi_cmd))) {
3240 ips_cleanup_passthru(ha, scb);
3244 * Check to see if this command had too much
3245 * data and had to be broke up. If so, queue
3246 * the rest of the data and continue.
3248 if ((scb->breakup) || (scb->sg_break)) {
3249 struct scatterlist *sg;
3250 int i, sg_dma_index, ips_sg_index = 0;
3252 /* we had a data breakup */
3255 sg = scsi_sglist(scb->scsi_cmd);
3257 /* Spin forward to last dma chunk */
3258 sg_dma_index = scb->breakup;
3259 for (i = 0; i < scb->breakup; i++)
3262 /* Take care of possible partial on last chunk */
3263 ips_fill_scb_sg_single(ha,
3265 scb, ips_sg_index++,
3268 for (; sg_dma_index < scsi_sg_count(scb->scsi_cmd);
3269 sg_dma_index++, sg = sg_next(sg)) {
3270 if (ips_fill_scb_sg_single
3273 scb, ips_sg_index++,
3274 sg_dma_len(sg)) < 0)
3278 scb->dcdb.transfer_length = scb->data_len;
3279 scb->dcdb.cmd_attribute |=
3280 ips_command_direction[scb->scsi_cmd->cmnd[0]];
3282 if (!(scb->dcdb.cmd_attribute & 0x3))
3283 scb->dcdb.transfer_length = 0;
3285 if (scb->data_len >= IPS_MAX_XFER) {
3286 scb->dcdb.cmd_attribute |= IPS_TRANSFER64K;
3287 scb->dcdb.transfer_length = 0;
3290 ret = ips_send_cmd(ha, scb);
3294 if (scb->scsi_cmd) {
3295 scb->scsi_cmd->result = DID_ERROR << 16;
3296 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3299 ips_freescb(ha, scb);
3301 case IPS_SUCCESS_IMM:
3302 if (scb->scsi_cmd) {
3303 scb->scsi_cmd->result = DID_ERROR << 16;
3304 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3307 ips_freescb(ha, scb);
3315 } /* end if passthru */
3318 ha->dcdb_active[scb->bus - 1] &= ~(1 << scb->target_id);
3321 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3323 ips_freescb(ha, scb);
3326 /****************************************************************************/
3328 /* Routine Name: ips_map_status */
3330 /* Routine Description: */
3332 /* Map Controller Error codes to Linux Error Codes */
3334 /****************************************************************************/
3336 ips_map_status(ips_ha_t * ha, ips_scb_t * scb, ips_stat_t * sp)
3340 uint32_t transfer_len;
3341 IPS_DCDB_TABLE_TAPE *tapeDCDB;
3342 IPS_SCSI_INQ_DATA inquiryData;
3344 METHOD_TRACE("ips_map_status", 1);
3348 "(%s%d) Physical device error (%d %d %d): %x %x, Sense Key: %x, ASC: %x, ASCQ: %x",
3349 ips_name, ha->host_num,
3350 scb->scsi_cmd->device->channel,
3351 scb->scsi_cmd->device->id, scb->scsi_cmd->device->lun,
3352 scb->basic_status, scb->extended_status,
3353 scb->extended_status ==
3354 IPS_ERR_CKCOND ? scb->dcdb.sense_info[2] & 0xf : 0,
3355 scb->extended_status ==
3356 IPS_ERR_CKCOND ? scb->dcdb.sense_info[12] : 0,
3357 scb->extended_status ==
3358 IPS_ERR_CKCOND ? scb->dcdb.sense_info[13] : 0);
3361 /* default driver error */
3362 errcode = DID_ERROR;
3365 switch (scb->basic_status & IPS_GSC_STATUS_MASK) {
3366 case IPS_CMD_TIMEOUT:
3367 errcode = DID_TIME_OUT;
3370 case IPS_INVAL_OPCO:
3371 case IPS_INVAL_CMD_BLK:
3372 case IPS_INVAL_PARM_BLK:
3374 case IPS_CMD_CMPLT_WERROR:
3377 case IPS_PHYS_DRV_ERROR:
3378 switch (scb->extended_status) {
3379 case IPS_ERR_SEL_TO:
3381 errcode = DID_NO_CONNECT;
3385 case IPS_ERR_OU_RUN:
3386 if ((scb->cmd.dcdb.op_code == IPS_CMD_EXTENDED_DCDB) ||
3387 (scb->cmd.dcdb.op_code ==
3388 IPS_CMD_EXTENDED_DCDB_SG)) {
3389 tapeDCDB = (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;
3390 transfer_len = tapeDCDB->transfer_length;
3393 (uint32_t) scb->dcdb.transfer_length;
3396 if ((scb->bus) && (transfer_len < scb->data_len)) {
3397 /* Underrun - set default to no error */
3400 /* Restrict access to physical DASD */
3401 if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3402 ips_scmd_buf_read(scb->scsi_cmd,
3403 &inquiryData, sizeof (inquiryData));
3404 if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK) {
3405 errcode = DID_TIME_OUT;
3410 errcode = DID_ERROR;
3414 case IPS_ERR_RECOVERY:
3415 /* don't fail recovered errors */
3421 case IPS_ERR_HOST_RESET:
3422 case IPS_ERR_DEV_RESET:
3423 errcode = DID_RESET;
3426 case IPS_ERR_CKCOND:
3428 if ((scb->cmd.dcdb.op_code ==
3429 IPS_CMD_EXTENDED_DCDB)
3430 || (scb->cmd.dcdb.op_code ==
3431 IPS_CMD_EXTENDED_DCDB_SG)) {
3433 (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;
3434 memcpy(scb->scsi_cmd->sense_buffer,
3435 tapeDCDB->sense_info,
3436 SCSI_SENSE_BUFFERSIZE);
3438 memcpy(scb->scsi_cmd->sense_buffer,
3439 scb->dcdb.sense_info,
3440 SCSI_SENSE_BUFFERSIZE);
3442 device_error = 2; /* check condition */
3450 errcode = DID_ERROR;
3456 scb->scsi_cmd->result = device_error | (errcode << 16);
3461 /****************************************************************************/
3463 /* Routine Name: ips_send_wait */
3465 /* Routine Description: */
3467 /* Send a command to the controller and wait for it to return */
3469 /* The FFDC Time Stamp use this function for the callback, but doesn't */
3470 /* actually need to wait. */
3471 /****************************************************************************/
3473 ips_send_wait(ips_ha_t * ha, ips_scb_t * scb, int timeout, int intr)
3477 METHOD_TRACE("ips_send_wait", 1);
3479 if (intr != IPS_FFDC) { /* Won't be Waiting if this is a Time Stamp */
3480 ha->waitflag = TRUE;
3481 ha->cmd_in_progress = scb->cdb[0];
3483 scb->callback = ipsintr_blocking;
3484 ret = ips_send_cmd(ha, scb);
3486 if ((ret == IPS_FAILURE) || (ret == IPS_SUCCESS_IMM))
3489 if (intr != IPS_FFDC) /* Don't Wait around if this is a Time Stamp */
3490 ret = ips_wait(ha, timeout, intr);
3495 /****************************************************************************/
3497 /* Routine Name: ips_scmd_buf_write */
3499 /* Routine Description: */
3500 /* Write data to struct scsi_cmnd request_buffer at proper offsets */
3501 /****************************************************************************/
3503 ips_scmd_buf_write(struct scsi_cmnd *scmd, void *data, unsigned int count)
3506 unsigned int min_cnt, xfer_cnt;
3507 char *cdata = (char *) data;
3508 unsigned char *buffer;
3509 unsigned long flags;
3510 struct scatterlist *sg = scsi_sglist(scmd);
3512 for (i = 0, xfer_cnt = 0;
3513 (i < scsi_sg_count(scmd)) && (xfer_cnt < count);
3514 i++, sg = sg_next(sg)) {
3515 min_cnt = min(count - xfer_cnt, sg->length);
3517 /* kmap_atomic() ensures addressability of the data buffer.*/
3518 /* local_irq_save() protects the KM_IRQ0 address slot. */
3519 local_irq_save(flags);
3520 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
3521 memcpy(buffer, &cdata[xfer_cnt], min_cnt);
3522 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
3523 local_irq_restore(flags);
3525 xfer_cnt += min_cnt;
3529 /****************************************************************************/
3531 /* Routine Name: ips_scmd_buf_read */
3533 /* Routine Description: */
3534 /* Copy data from a struct scsi_cmnd to a new, linear buffer */
3535 /****************************************************************************/
3537 ips_scmd_buf_read(struct scsi_cmnd *scmd, void *data, unsigned int count)
3540 unsigned int min_cnt, xfer_cnt;
3541 char *cdata = (char *) data;
3542 unsigned char *buffer;
3543 unsigned long flags;
3544 struct scatterlist *sg = scsi_sglist(scmd);
3546 for (i = 0, xfer_cnt = 0;
3547 (i < scsi_sg_count(scmd)) && (xfer_cnt < count);
3548 i++, sg = sg_next(sg)) {
3549 min_cnt = min(count - xfer_cnt, sg->length);
3551 /* kmap_atomic() ensures addressability of the data buffer.*/
3552 /* local_irq_save() protects the KM_IRQ0 address slot. */
3553 local_irq_save(flags);
3554 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
3555 memcpy(&cdata[xfer_cnt], buffer, min_cnt);
3556 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
3557 local_irq_restore(flags);
3559 xfer_cnt += min_cnt;
3563 /****************************************************************************/
3565 /* Routine Name: ips_send_cmd */
3567 /* Routine Description: */
3569 /* Map SCSI commands to ServeRAID commands for logical drives */
3571 /****************************************************************************/
3573 ips_send_cmd(ips_ha_t * ha, ips_scb_t * scb)
3578 IPS_DCDB_TABLE_TAPE *tapeDCDB;
3581 METHOD_TRACE("ips_send_cmd", 1);
3585 if (!scb->scsi_cmd) {
3586 /* internal command */
3589 /* Controller commands can't be issued */
3590 /* to real devices -- fail them */
3591 if ((ha->waitflag == TRUE) &&
3592 (ha->cmd_in_progress == scb->cdb[0])) {
3593 ha->waitflag = FALSE;
3598 } else if ((scb->bus == 0) && (!ips_is_passthru(scb->scsi_cmd))) {
3599 /* command to logical bus -- interpret */
3600 ret = IPS_SUCCESS_IMM;
3602 switch (scb->scsi_cmd->cmnd[0]) {
3603 case ALLOW_MEDIUM_REMOVAL:
3606 case WRITE_FILEMARKS:
3608 scb->scsi_cmd->result = DID_ERROR << 16;
3612 scb->scsi_cmd->result = DID_OK << 16;
3614 case TEST_UNIT_READY:
3616 if (scb->target_id == IPS_ADAPTER_ID) {
3618 * Either we have a TUR
3619 * or we have a SCSI inquiry
3621 if (scb->scsi_cmd->cmnd[0] == TEST_UNIT_READY)
3622 scb->scsi_cmd->result = DID_OK << 16;
3624 if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3625 IPS_SCSI_INQ_DATA inquiry;
3628 sizeof (IPS_SCSI_INQ_DATA));
3630 inquiry.DeviceType =
3631 IPS_SCSI_INQ_TYPE_PROCESSOR;
3632 inquiry.DeviceTypeQualifier =
3633 IPS_SCSI_INQ_LU_CONNECTED;
3634 inquiry.Version = IPS_SCSI_INQ_REV2;
3635 inquiry.ResponseDataFormat =
3636 IPS_SCSI_INQ_RD_REV2;
3637 inquiry.AdditionalLength = 31;
3639 IPS_SCSI_INQ_Address16;
3641 IPS_SCSI_INQ_WBus16 |
3643 strncpy(inquiry.VendorId, "IBM ",
3645 strncpy(inquiry.ProductId,
3647 strncpy(inquiry.ProductRevisionLevel,
3650 ips_scmd_buf_write(scb->scsi_cmd,
3654 scb->scsi_cmd->result = DID_OK << 16;
3657 scb->cmd.logical_info.op_code = IPS_CMD_GET_LD_INFO;
3658 scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb);
3659 scb->cmd.logical_info.reserved = 0;
3660 scb->cmd.logical_info.reserved2 = 0;
3661 scb->data_len = sizeof (IPS_LD_INFO);
3662 scb->data_busaddr = ha->logical_drive_info_dma_addr;
3664 scb->cmd.logical_info.buffer_addr = scb->data_busaddr;
3671 ips_reqsen(ha, scb);
3672 scb->scsi_cmd->result = DID_OK << 16;
3678 scb->cmd.basic_io.op_code =
3679 (scb->scsi_cmd->cmnd[0] ==
3680 READ_6) ? IPS_CMD_READ : IPS_CMD_WRITE;
3681 scb->cmd.basic_io.enhanced_sg = 0;
3682 scb->cmd.basic_io.sg_addr =
3683 cpu_to_le32(scb->data_busaddr);
3685 scb->cmd.basic_io.op_code =
3686 (scb->scsi_cmd->cmnd[0] ==
3687 READ_6) ? IPS_CMD_READ_SG :
3689 scb->cmd.basic_io.enhanced_sg =
3690 IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3691 scb->cmd.basic_io.sg_addr =
3692 cpu_to_le32(scb->sg_busaddr);
3695 scb->cmd.basic_io.segment_4G = 0;
3696 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3697 scb->cmd.basic_io.log_drv = scb->target_id;
3698 scb->cmd.basic_io.sg_count = scb->sg_len;
3700 if (scb->cmd.basic_io.lba)
3701 scb->cmd.basic_io.lba =
3702 cpu_to_le32(le32_to_cpu
3703 (scb->cmd.basic_io.lba) +
3704 le16_to_cpu(scb->cmd.basic_io.
3707 scb->cmd.basic_io.lba =
3709 cmnd[1] & 0x1f) << 16) | (scb->scsi_cmd->
3711 (scb->scsi_cmd->cmnd[3]));
3713 scb->cmd.basic_io.sector_count =
3714 cpu_to_le16(scb->data_len / IPS_BLKSIZE);
3716 if (le16_to_cpu(scb->cmd.basic_io.sector_count) == 0)
3717 scb->cmd.basic_io.sector_count =
3726 scb->cmd.basic_io.op_code =
3727 (scb->scsi_cmd->cmnd[0] ==
3728 READ_10) ? IPS_CMD_READ : IPS_CMD_WRITE;
3729 scb->cmd.basic_io.enhanced_sg = 0;
3730 scb->cmd.basic_io.sg_addr =
3731 cpu_to_le32(scb->data_busaddr);
3733 scb->cmd.basic_io.op_code =
3734 (scb->scsi_cmd->cmnd[0] ==
3735 READ_10) ? IPS_CMD_READ_SG :
3737 scb->cmd.basic_io.enhanced_sg =
3738 IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3739 scb->cmd.basic_io.sg_addr =
3740 cpu_to_le32(scb->sg_busaddr);
3743 scb->cmd.basic_io.segment_4G = 0;
3744 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3745 scb->cmd.basic_io.log_drv = scb->target_id;
3746 scb->cmd.basic_io.sg_count = scb->sg_len;
3748 if (scb->cmd.basic_io.lba)
3749 scb->cmd.basic_io.lba =
3750 cpu_to_le32(le32_to_cpu
3751 (scb->cmd.basic_io.lba) +
3752 le16_to_cpu(scb->cmd.basic_io.
3755 scb->cmd.basic_io.lba =
3756 ((scb->scsi_cmd->cmnd[2] << 24) | (scb->
3760 (scb->scsi_cmd->cmnd[4] << 8) | scb->
3763 scb->cmd.basic_io.sector_count =
3764 cpu_to_le16(scb->data_len / IPS_BLKSIZE);
3766 if (cpu_to_le16(scb->cmd.basic_io.sector_count) == 0) {
3768 * This is a null condition
3769 * we don't have to do anything
3772 scb->scsi_cmd->result = DID_OK << 16;
3780 scb->scsi_cmd->result = DID_OK << 16;
3784 scb->cmd.basic_io.op_code = IPS_CMD_ENQUIRY;
3785 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3786 scb->cmd.basic_io.segment_4G = 0;
3787 scb->cmd.basic_io.enhanced_sg = 0;
3788 scb->data_len = sizeof (*ha->enq);
3789 scb->cmd.basic_io.sg_addr = ha->enq_busaddr;
3794 scb->cmd.logical_info.op_code = IPS_CMD_GET_LD_INFO;
3795 scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb);
3796 scb->cmd.logical_info.reserved = 0;
3797 scb->cmd.logical_info.reserved2 = 0;
3798 scb->cmd.logical_info.reserved3 = 0;
3799 scb->data_len = sizeof (IPS_LD_INFO);
3800 scb->data_busaddr = ha->logical_drive_info_dma_addr;
3802 scb->cmd.logical_info.buffer_addr = scb->data_busaddr;
3806 case SEND_DIAGNOSTIC:
3807 case REASSIGN_BLOCKS:
3811 case READ_DEFECT_DATA:
3814 scb->scsi_cmd->result = DID_OK << 16;
3818 /* Set the Return Info to appear like the Command was */
3819 /* attempted, a Check Condition occurred, and Sense */
3820 /* Data indicating an Invalid CDB OpCode is returned. */
3821 sp = (char *) scb->scsi_cmd->sense_buffer;
3823 sp[0] = 0x70; /* Error Code */
3824 sp[2] = ILLEGAL_REQUEST; /* Sense Key 5 Illegal Req. */
3825 sp[7] = 0x0A; /* Additional Sense Length */
3826 sp[12] = 0x20; /* ASC = Invalid OpCode */
3827 sp[13] = 0x00; /* ASCQ */
3829 device_error = 2; /* Indicate Check Condition */
3830 scb->scsi_cmd->result = device_error | (DID_OK << 16);
3835 if (ret == IPS_SUCCESS_IMM)
3841 /* If we already know the Device is Not there, no need to attempt a Command */
3842 /* This also protects an NT FailOver Controller from getting CDB's sent to it */
3843 if (ha->conf->dev[scb->bus - 1][scb->target_id].ucState == 0) {
3844 scb->scsi_cmd->result = DID_NO_CONNECT << 16;
3845 return (IPS_SUCCESS_IMM);
3848 ha->dcdb_active[scb->bus - 1] |= (1 << scb->target_id);
3849 scb->cmd.dcdb.command_id = IPS_COMMAND_ID(ha, scb);
3850 scb->cmd.dcdb.dcdb_address = cpu_to_le32(scb->scb_busaddr +
3851 (unsigned long) &scb->
3853 (unsigned long) scb);
3854 scb->cmd.dcdb.reserved = 0;
3855 scb->cmd.dcdb.reserved2 = 0;
3856 scb->cmd.dcdb.reserved3 = 0;
3857 scb->cmd.dcdb.segment_4G = 0;
3858 scb->cmd.dcdb.enhanced_sg = 0;
3860 TimeOut = scb->scsi_cmd->timeout_per_command;
3862 if (ha->subsys->param[4] & 0x00100000) { /* If NEW Tape DCDB is Supported */
3864 scb->cmd.dcdb.op_code = IPS_CMD_EXTENDED_DCDB;
3866 scb->cmd.dcdb.op_code =
3867 IPS_CMD_EXTENDED_DCDB_SG;
3868 scb->cmd.dcdb.enhanced_sg =
3869 IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3872 tapeDCDB = (IPS_DCDB_TABLE_TAPE *) & scb->dcdb; /* Use Same Data Area as Old DCDB Struct */
3873 tapeDCDB->device_address =
3874 ((scb->bus - 1) << 4) | scb->target_id;
3875 tapeDCDB->cmd_attribute |= IPS_DISCONNECT_ALLOWED;
3876 tapeDCDB->cmd_attribute &= ~IPS_TRANSFER64K; /* Always Turn OFF 64K Size Flag */
3879 if (TimeOut < (10 * HZ))
3880 tapeDCDB->cmd_attribute |= IPS_TIMEOUT10; /* TimeOut is 10 Seconds */
3881 else if (TimeOut < (60 * HZ))
3882 tapeDCDB->cmd_attribute |= IPS_TIMEOUT60; /* TimeOut is 60 Seconds */
3883 else if (TimeOut < (1200 * HZ))
3884 tapeDCDB->cmd_attribute |= IPS_TIMEOUT20M; /* TimeOut is 20 Minutes */
3887 tapeDCDB->cdb_length = scb->scsi_cmd->cmd_len;
3888 tapeDCDB->reserved_for_LUN = 0;
3889 tapeDCDB->transfer_length = scb->data_len;
3890 if (scb->cmd.dcdb.op_code == IPS_CMD_EXTENDED_DCDB_SG)
3891 tapeDCDB->buffer_pointer =
3892 cpu_to_le32(scb->sg_busaddr);
3894 tapeDCDB->buffer_pointer =
3895 cpu_to_le32(scb->data_busaddr);
3896 tapeDCDB->sg_count = scb->sg_len;
3897 tapeDCDB->sense_length = sizeof (tapeDCDB->sense_info);
3898 tapeDCDB->scsi_status = 0;
3899 tapeDCDB->reserved = 0;
3900 memcpy(tapeDCDB->scsi_cdb, scb->scsi_cmd->cmnd,
3901 scb->scsi_cmd->cmd_len);
3904 scb->cmd.dcdb.op_code = IPS_CMD_DCDB;
3906 scb->cmd.dcdb.op_code = IPS_CMD_DCDB_SG;
3907 scb->cmd.dcdb.enhanced_sg =
3908 IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3911 scb->dcdb.device_address =
3912 ((scb->bus - 1) << 4) | scb->target_id;
3913 scb->dcdb.cmd_attribute |= IPS_DISCONNECT_ALLOWED;
3916 if (TimeOut < (10 * HZ))
3917 scb->dcdb.cmd_attribute |= IPS_TIMEOUT10; /* TimeOut is 10 Seconds */
3918 else if (TimeOut < (60 * HZ))
3919 scb->dcdb.cmd_attribute |= IPS_TIMEOUT60; /* TimeOut is 60 Seconds */
3920 else if (TimeOut < (1200 * HZ))
3921 scb->dcdb.cmd_attribute |= IPS_TIMEOUT20M; /* TimeOut is 20 Minutes */
3924 scb->dcdb.transfer_length = scb->data_len;
3925 if (scb->dcdb.cmd_attribute & IPS_TRANSFER64K)
3926 scb->dcdb.transfer_length = 0;
3927 if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB_SG)
3928 scb->dcdb.buffer_pointer =
3929 cpu_to_le32(scb->sg_busaddr);
3931 scb->dcdb.buffer_pointer =
3932 cpu_to_le32(scb->data_busaddr);
3933 scb->dcdb.cdb_length = scb->scsi_cmd->cmd_len;
3934 scb->dcdb.sense_length = sizeof (scb->dcdb.sense_info);
3935 scb->dcdb.sg_count = scb->sg_len;
3936 scb->dcdb.reserved = 0;
3937 memcpy(scb->dcdb.scsi_cdb, scb->scsi_cmd->cmnd,
3938 scb->scsi_cmd->cmd_len);
3939 scb->dcdb.scsi_status = 0;
3940 scb->dcdb.reserved2[0] = 0;
3941 scb->dcdb.reserved2[1] = 0;
3942 scb->dcdb.reserved2[2] = 0;
3946 return ((*ha->func.issue) (ha, scb));
3949 /****************************************************************************/
3951 /* Routine Name: ips_chk_status */
3953 /* Routine Description: */
3955 /* Check the status of commands to logical drives */
3956 /* Assumed to be called with the HA lock */
3957 /****************************************************************************/
3959 ips_chkstatus(ips_ha_t * ha, IPS_STATUS * pstatus)
3963 uint8_t basic_status;
3966 IPS_SCSI_INQ_DATA inquiryData;
3968 METHOD_TRACE("ips_chkstatus", 1);
3970 scb = &ha->scbs[pstatus->fields.command_id];
3971 scb->basic_status = basic_status =
3972 pstatus->fields.basic_status & IPS_BASIC_STATUS_MASK;
3973 scb->extended_status = ext_status = pstatus->fields.extended_status;
3976 sp->residue_len = 0;
3977 sp->scb_addr = (void *) scb;
3979 /* Remove the item from the active queue */
3980 ips_removeq_scb(&ha->scb_activelist, scb);
3983 /* internal commands are handled in do_ipsintr */
3986 DEBUG_VAR(2, "(%s%d) ips_chkstatus: cmd 0x%X id %d (%d %d %d)",
3990 scb->cmd.basic_io.command_id,
3991 scb->bus, scb->target_id, scb->lun);
3993 if ((scb->scsi_cmd) && (ips_is_passthru(scb->scsi_cmd)))
3994 /* passthru - just returns the raw result */
3999 if (((basic_status & IPS_GSC_STATUS_MASK) == IPS_CMD_SUCCESS) ||
4000 ((basic_status & IPS_GSC_STATUS_MASK) == IPS_CMD_RECOVERED_ERROR)) {
4002 if (scb->bus == 0) {
4003 if ((basic_status & IPS_GSC_STATUS_MASK) ==
4004 IPS_CMD_RECOVERED_ERROR) {
4006 "(%s%d) Recovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
4007 ips_name, ha->host_num,
4008 scb->cmd.basic_io.op_code,
4009 basic_status, ext_status);
4012 switch (scb->scsi_cmd->cmnd[0]) {
4013 case ALLOW_MEDIUM_REMOVAL:
4016 case WRITE_FILEMARKS:
4018 errcode = DID_ERROR;
4024 case TEST_UNIT_READY:
4025 if (!ips_online(ha, scb)) {
4026 errcode = DID_TIME_OUT;
4031 if (ips_online(ha, scb)) {
4032 ips_inquiry(ha, scb);
4034 errcode = DID_TIME_OUT;
4039 ips_reqsen(ha, scb);
4051 if (!ips_online(ha, scb)
4052 || !ips_msense(ha, scb)) {
4053 errcode = DID_ERROR;
4058 if (ips_online(ha, scb))
4061 errcode = DID_TIME_OUT;
4065 case SEND_DIAGNOSTIC:
4066 case REASSIGN_BLOCKS:
4070 errcode = DID_ERROR;
4075 case READ_DEFECT_DATA:
4081 errcode = DID_ERROR;
4084 scb->scsi_cmd->result = errcode << 16;
4085 } else { /* bus == 0 */
4086 /* restrict access to physical drives */
4087 if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
4088 ips_scmd_buf_read(scb->scsi_cmd,
4089 &inquiryData, sizeof (inquiryData));
4090 if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK)
4091 scb->scsi_cmd->result = DID_TIME_OUT << 16;
4094 } else { /* recovered error / success */
4095 if (scb->bus == 0) {
4097 "(%s%d) Unrecovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
4098 ips_name, ha->host_num,
4099 scb->cmd.basic_io.op_code, basic_status,
4103 ips_map_status(ha, scb, sp);
4107 /****************************************************************************/
4109 /* Routine Name: ips_online */
4111 /* Routine Description: */
4113 /* Determine if a logical drive is online */
4115 /****************************************************************************/
4117 ips_online(ips_ha_t * ha, ips_scb_t * scb)
4119 METHOD_TRACE("ips_online", 1);
4121 if (scb->target_id >= IPS_MAX_LD)
4124 if ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1) {
4125 memset(ha->logical_drive_info, 0, sizeof (IPS_LD_INFO));
4129 if (ha->logical_drive_info->drive_info[scb->target_id].state !=
4131 && ha->logical_drive_info->drive_info[scb->target_id].state !=
4133 && ha->logical_drive_info->drive_info[scb->target_id].state !=
4135 && ha->logical_drive_info->drive_info[scb->target_id].state !=
4142 /****************************************************************************/
4144 /* Routine Name: ips_inquiry */
4146 /* Routine Description: */
4148 /* Simulate an inquiry command to a logical drive */
4150 /****************************************************************************/
4152 ips_inquiry(ips_ha_t * ha, ips_scb_t * scb)
4154 IPS_SCSI_INQ_DATA inquiry;
4156 METHOD_TRACE("ips_inquiry", 1);
4158 memset(&inquiry, 0, sizeof (IPS_SCSI_INQ_DATA));
4160 inquiry.DeviceType = IPS_SCSI_INQ_TYPE_DASD;
4161 inquiry.DeviceTypeQualifier = IPS_SCSI_INQ_LU_CONNECTED;
4162 inquiry.Version = IPS_SCSI_INQ_REV2;
4163 inquiry.ResponseDataFormat = IPS_SCSI_INQ_RD_REV2;
4164 inquiry.AdditionalLength = 31;
4165 inquiry.Flags[0] = IPS_SCSI_INQ_Address16;
4167 IPS_SCSI_INQ_WBus16 | IPS_SCSI_INQ_Sync | IPS_SCSI_INQ_CmdQue;
4168 strncpy(inquiry.VendorId, "IBM ", 8);
4169 strncpy(inquiry.ProductId, "SERVERAID ", 16);
4170 strncpy(inquiry.ProductRevisionLevel, "1.00", 4);
4172 ips_scmd_buf_write(scb->scsi_cmd, &inquiry, sizeof (inquiry));
4177 /****************************************************************************/
4179 /* Routine Name: ips_rdcap */
4181 /* Routine Description: */
4183 /* Simulate a read capacity command to a logical drive */
4185 /****************************************************************************/
4187 ips_rdcap(ips_ha_t * ha, ips_scb_t * scb)
4189 IPS_SCSI_CAPACITY cap;
4191 METHOD_TRACE("ips_rdcap", 1);
4193 if (scsi_bufflen(scb->scsi_cmd) < 8)
4197 cpu_to_be32(le32_to_cpu
4198 (ha->logical_drive_info->
4199 drive_info[scb->target_id].sector_count) - 1);
4200 cap.len = cpu_to_be32((uint32_t) IPS_BLKSIZE);
4202 ips_scmd_buf_write(scb->scsi_cmd, &cap, sizeof (cap));
4207 /****************************************************************************/
4209 /* Routine Name: ips_msense */
4211 /* Routine Description: */
4213 /* Simulate a mode sense command to a logical drive */
4215 /****************************************************************************/
4217 ips_msense(ips_ha_t * ha, ips_scb_t * scb)
4222 IPS_SCSI_MODE_PAGE_DATA mdata;
4224 METHOD_TRACE("ips_msense", 1);
4226 if (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) > 0x400000 &&
4227 (ha->enq->ucMiscFlag & 0x8) == 0) {
4228 heads = IPS_NORM_HEADS;
4229 sectors = IPS_NORM_SECTORS;
4231 heads = IPS_COMP_HEADS;
4232 sectors = IPS_COMP_SECTORS;
4236 (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) -
4237 1) / (heads * sectors);
4239 memset(&mdata, 0, sizeof (IPS_SCSI_MODE_PAGE_DATA));
4241 mdata.hdr.BlockDescLength = 8;
4243 switch (scb->scsi_cmd->cmnd[2] & 0x3f) {
4244 case 0x03: /* page 3 */
4245 mdata.pdata.pg3.PageCode = 3;
4246 mdata.pdata.pg3.PageLength = sizeof (IPS_SCSI_MODE_PAGE3);
4247 mdata.hdr.DataLength =
4248 3 + mdata.hdr.BlockDescLength + mdata.pdata.pg3.PageLength;
4249 mdata.pdata.pg3.TracksPerZone = 0;
4250 mdata.pdata.pg3.AltSectorsPerZone = 0;
4251 mdata.pdata.pg3.AltTracksPerZone = 0;
4252 mdata.pdata.pg3.AltTracksPerVolume = 0;
4253 mdata.pdata.pg3.SectorsPerTrack = cpu_to_be16(sectors);
4254 mdata.pdata.pg3.BytesPerSector = cpu_to_be16(IPS_BLKSIZE);
4255 mdata.pdata.pg3.Interleave = cpu_to_be16(1);
4256 mdata.pdata.pg3.TrackSkew = 0;
4257 mdata.pdata.pg3.CylinderSkew = 0;
4258 mdata.pdata.pg3.flags = IPS_SCSI_MP3_SoftSector;
4262 mdata.pdata.pg4.PageCode = 4;
4263 mdata.pdata.pg4.PageLength = sizeof (IPS_SCSI_MODE_PAGE4);
4264 mdata.hdr.DataLength =
4265 3 + mdata.hdr.BlockDescLength + mdata.pdata.pg4.PageLength;
4266 mdata.pdata.pg4.CylindersHigh =
4267 cpu_to_be16((cylinders >> 8) & 0xFFFF);
4268 mdata.pdata.pg4.CylindersLow = (cylinders & 0xFF);
4269 mdata.pdata.pg4.Heads = heads;
4270 mdata.pdata.pg4.WritePrecompHigh = 0;
4271 mdata.pdata.pg4.WritePrecompLow = 0;
4272 mdata.pdata.pg4.ReducedWriteCurrentHigh = 0;
4273 mdata.pdata.pg4.ReducedWriteCurrentLow = 0;
4274 mdata.pdata.pg4.StepRate = cpu_to_be16(1);
4275 mdata.pdata.pg4.LandingZoneHigh = 0;
4276 mdata.pdata.pg4.LandingZoneLow = 0;
4277 mdata.pdata.pg4.flags = 0;
4278 mdata.pdata.pg4.RotationalOffset = 0;
4279 mdata.pdata.pg4.MediumRotationRate = 0;
4282 mdata.pdata.pg8.PageCode = 8;
4283 mdata.pdata.pg8.PageLength = sizeof (IPS_SCSI_MODE_PAGE8);
4284 mdata.hdr.DataLength =
4285 3 + mdata.hdr.BlockDescLength + mdata.pdata.pg8.PageLength;
4286 /* everything else is left set to 0 */
4293 ips_scmd_buf_write(scb->scsi_cmd, &mdata, sizeof (mdata));
4298 /****************************************************************************/
4300 /* Routine Name: ips_reqsen */
4302 /* Routine Description: */
4304 /* Simulate a request sense command to a logical drive */
4306 /****************************************************************************/
4308 ips_reqsen(ips_ha_t * ha, ips_scb_t * scb)
4310 IPS_SCSI_REQSEN reqsen;
4312 METHOD_TRACE("ips_reqsen", 1);
4314 memset(&reqsen, 0, sizeof (IPS_SCSI_REQSEN));
4316 reqsen.ResponseCode =
4317 IPS_SCSI_REQSEN_VALID | IPS_SCSI_REQSEN_CURRENT_ERR;
4318 reqsen.AdditionalLength = 10;
4319 reqsen.AdditionalSenseCode = IPS_SCSI_REQSEN_NO_SENSE;
4320 reqsen.AdditionalSenseCodeQual = IPS_SCSI_REQSEN_NO_SENSE;
4322 ips_scmd_buf_write(scb->scsi_cmd, &reqsen, sizeof (reqsen));
4327 /****************************************************************************/
4329 /* Routine Name: ips_free */
4331 /* Routine Description: */
4333 /* Free any allocated space for this controller */
4335 /****************************************************************************/
4337 ips_free(ips_ha_t * ha)
4340 METHOD_TRACE("ips_free", 1);
4344 pci_free_consistent(ha->pcidev, sizeof(IPS_ENQ),
4345 ha->enq, ha->enq_busaddr);
4353 pci_free_consistent(ha->pcidev,
4354 sizeof (IPS_ADAPTER) +
4355 sizeof (IPS_IO_CMD), ha->adapt,
4356 ha->adapt->hw_status_start);
4360 if (ha->logical_drive_info) {
4361 pci_free_consistent(ha->pcidev,
4362 sizeof (IPS_LD_INFO),
4363 ha->logical_drive_info,
4364 ha->logical_drive_info_dma_addr);
4365 ha->logical_drive_info = NULL;
4374 if (ha->ioctl_data) {
4375 pci_free_consistent(ha->pcidev, ha->ioctl_len,
4376 ha->ioctl_data, ha->ioctl_busaddr);
4377 ha->ioctl_data = NULL;
4378 ha->ioctl_datasize = 0;
4381 ips_deallocatescbs(ha, ha->max_cmds);
4383 /* free memory mapped (if applicable) */
4385 iounmap(ha->ioremap_ptr);
4386 ha->ioremap_ptr = NULL;
4395 /****************************************************************************/
4397 /* Routine Name: ips_deallocatescbs */
4399 /* Routine Description: */
4401 /* Free the command blocks */
4403 /****************************************************************************/
4405 ips_deallocatescbs(ips_ha_t * ha, int cmds)
4408 pci_free_consistent(ha->pcidev,
4409 IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * cmds,
4410 ha->scbs->sg_list.list,
4411 ha->scbs->sg_busaddr);
4412 pci_free_consistent(ha->pcidev, sizeof (ips_scb_t) * cmds,
4413 ha->scbs, ha->scbs->scb_busaddr);
4419 /****************************************************************************/
4421 /* Routine Name: ips_allocatescbs */
4423 /* Routine Description: */
4425 /* Allocate the command blocks */
4427 /****************************************************************************/
4429 ips_allocatescbs(ips_ha_t * ha)
4434 dma_addr_t command_dma, sg_dma;
4436 METHOD_TRACE("ips_allocatescbs", 1);
4438 /* Allocate memory for the SCBs */
4440 pci_alloc_consistent(ha->pcidev, ha->max_cmds * sizeof (ips_scb_t),
4442 if (ha->scbs == NULL)
4445 pci_alloc_consistent(ha->pcidev,
4446 IPS_SGLIST_SIZE(ha) * IPS_MAX_SG *
4447 ha->max_cmds, &sg_dma);
4448 if (ips_sg.list == NULL) {
4449 pci_free_consistent(ha->pcidev,
4450 ha->max_cmds * sizeof (ips_scb_t), ha->scbs,
4455 memset(ha->scbs, 0, ha->max_cmds * sizeof (ips_scb_t));
4457 for (i = 0; i < ha->max_cmds; i++) {
4458 scb_p = &ha->scbs[i];
4459 scb_p->scb_busaddr = command_dma + sizeof (ips_scb_t) * i;
4460 /* set up S/G list */
4461 if (IPS_USE_ENH_SGLIST(ha)) {
4462 scb_p->sg_list.enh_list =
4463 ips_sg.enh_list + i * IPS_MAX_SG;
4465 sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i;
4467 scb_p->sg_list.std_list =
4468 ips_sg.std_list + i * IPS_MAX_SG;
4470 sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i;
4473 /* add to the free list */
4474 if (i < ha->max_cmds - 1) {
4475 scb_p->q_next = ha->scb_freelist;
4476 ha->scb_freelist = scb_p;
4484 /****************************************************************************/
4486 /* Routine Name: ips_init_scb */
4488 /* Routine Description: */
4490 /* Initialize a CCB to default values */
4492 /****************************************************************************/
4494 ips_init_scb(ips_ha_t * ha, ips_scb_t * scb)
4496 IPS_SG_LIST sg_list;
4497 uint32_t cmd_busaddr, sg_busaddr;
4498 METHOD_TRACE("ips_init_scb", 1);
4503 sg_list.list = scb->sg_list.list;
4504 cmd_busaddr = scb->scb_busaddr;
4505 sg_busaddr = scb->sg_busaddr;
4507 memset(scb, 0, sizeof (ips_scb_t));
4508 memset(ha->dummy, 0, sizeof (IPS_IO_CMD));
4510 /* Initialize dummy command bucket */
4511 ha->dummy->op_code = 0xFF;
4512 ha->dummy->ccsar = cpu_to_le32(ha->adapt->hw_status_start
4513 + sizeof (IPS_ADAPTER));
4514 ha->dummy->command_id = IPS_MAX_CMDS;
4516 /* set bus address of scb */
4517 scb->scb_busaddr = cmd_busaddr;
4518 scb->sg_busaddr = sg_busaddr;
4519 scb->sg_list.list = sg_list.list;
4522 scb->cmd.basic_io.cccr = cpu_to_le32((uint32_t) IPS_BIT_ILE);
4523 scb->cmd.basic_io.ccsar = cpu_to_le32(ha->adapt->hw_status_start
4524 + sizeof (IPS_ADAPTER));
4527 /****************************************************************************/
4529 /* Routine Name: ips_get_scb */
4531 /* Routine Description: */
4533 /* Initialize a CCB to default values */
4535 /* ASSUMED to be callled from within a lock */
4537 /****************************************************************************/
4539 ips_getscb(ips_ha_t * ha)
4543 METHOD_TRACE("ips_getscb", 1);
4545 if ((scb = ha->scb_freelist) == NULL) {
4550 ha->scb_freelist = scb->q_next;
4554 ips_init_scb(ha, scb);
4559 /****************************************************************************/
4561 /* Routine Name: ips_free_scb */
4563 /* Routine Description: */
4565 /* Return an unused CCB back to the free list */
4567 /* ASSUMED to be called from within a lock */
4569 /****************************************************************************/
4571 ips_freescb(ips_ha_t * ha, ips_scb_t * scb)
4574 METHOD_TRACE("ips_freescb", 1);
4575 if (scb->flags & IPS_SCB_MAP_SG)
4576 scsi_dma_unmap(scb->scsi_cmd);
4577 else if (scb->flags & IPS_SCB_MAP_SINGLE)
4578 pci_unmap_single(ha->pcidev, scb->data_busaddr, scb->data_len,
4581 /* check to make sure this is not our "special" scb */
4582 if (IPS_COMMAND_ID(ha, scb) < (ha->max_cmds - 1)) {
4583 scb->q_next = ha->scb_freelist;
4584 ha->scb_freelist = scb;
4588 /****************************************************************************/
4590 /* Routine Name: ips_isinit_copperhead */
4592 /* Routine Description: */
4594 /* Is controller initialized ? */
4596 /****************************************************************************/
4598 ips_isinit_copperhead(ips_ha_t * ha)
4603 METHOD_TRACE("ips_isinit_copperhead", 1);
4605 isr = inb(ha->io_addr + IPS_REG_HISR);
4606 scpr = inb(ha->io_addr + IPS_REG_SCPR);
4608 if (((isr & IPS_BIT_EI) == 0) && ((scpr & IPS_BIT_EBM) == 0))
4614 /****************************************************************************/
4616 /* Routine Name: ips_isinit_copperhead_memio */
4618 /* Routine Description: */
4620 /* Is controller initialized ? */
4622 /****************************************************************************/
4624 ips_isinit_copperhead_memio(ips_ha_t * ha)
4629 METHOD_TRACE("ips_is_init_copperhead_memio", 1);
4631 isr = readb(ha->mem_ptr + IPS_REG_HISR);
4632 scpr = readb(ha->mem_ptr + IPS_REG_SCPR);
4634 if (((isr & IPS_BIT_EI) == 0) && ((scpr & IPS_BIT_EBM) == 0))
4640 /****************************************************************************/
4642 /* Routine Name: ips_isinit_morpheus */
4644 /* Routine Description: */
4646 /* Is controller initialized ? */
4648 /****************************************************************************/
4650 ips_isinit_morpheus(ips_ha_t * ha)
4655 METHOD_TRACE("ips_is_init_morpheus", 1);
4657 if (ips_isintr_morpheus(ha))
4658 ips_flush_and_reset(ha);
4660 post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
4661 bits = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
4665 else if (bits & 0x3)
4671 /****************************************************************************/
4673 /* Routine Name: ips_flush_and_reset */
4675 /* Routine Description: */
4677 /* Perform cleanup ( FLUSH and RESET ) when the adapter is in an unknown */
4678 /* state ( was trying to INIT and an interrupt was already pending ) ... */
4680 /****************************************************************************/
4682 ips_flush_and_reset(ips_ha_t *ha)
4688 dma_addr_t command_dma;
4690 /* Create a usuable SCB */
4691 scb = pci_alloc_consistent(ha->pcidev, sizeof(ips_scb_t), &command_dma);
4693 memset(scb, 0, sizeof(ips_scb_t));
4694 ips_init_scb(ha, scb);
4695 scb->scb_busaddr = command_dma;
4697 scb->timeout = ips_cmd_timeout;
4698 scb->cdb[0] = IPS_CMD_FLUSH;
4700 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
4701 scb->cmd.flush_cache.command_id = IPS_MAX_CMDS; /* Use an ID that would otherwise not exist */
4702 scb->cmd.flush_cache.state = IPS_NORM_STATE;
4703 scb->cmd.flush_cache.reserved = 0;
4704 scb->cmd.flush_cache.reserved2 = 0;
4705 scb->cmd.flush_cache.reserved3 = 0;
4706 scb->cmd.flush_cache.reserved4 = 0;
4708 ret = ips_send_cmd(ha, scb); /* Send the Flush Command */
4710 if (ret == IPS_SUCCESS) {
4711 time = 60 * IPS_ONE_SEC; /* Max Wait time is 60 seconds */
4714 while ((time > 0) && (!done)) {
4715 done = ips_poll_for_flush_complete(ha);
4716 /* This may look evil, but it's only done during extremely rare start-up conditions ! */
4723 /* Now RESET and INIT the adapter */
4724 (*ha->func.reset) (ha);
4726 pci_free_consistent(ha->pcidev, sizeof(ips_scb_t), scb, command_dma);
4730 /****************************************************************************/
4732 /* Routine Name: ips_poll_for_flush_complete */
4734 /* Routine Description: */
4736 /* Poll for the Flush Command issued by ips_flush_and_reset() to complete */
4737 /* All other responses are just taken off the queue and ignored */
4739 /****************************************************************************/
4741 ips_poll_for_flush_complete(ips_ha_t * ha)
4746 cstatus.value = (*ha->func.statupd) (ha);
4748 if (cstatus.value == 0xffffffff) /* If No Interrupt to process */
4751 /* Success is when we see the Flush Command ID */
4752 if (cstatus.fields.command_id == IPS_MAX_CMDS)
4759 /****************************************************************************/
4761 /* Routine Name: ips_enable_int_copperhead */
4763 /* Routine Description: */
4764 /* Turn on interrupts */
4766 /****************************************************************************/
4768 ips_enable_int_copperhead(ips_ha_t * ha)
4770 METHOD_TRACE("ips_enable_int_copperhead", 1);
4772 outb(ha->io_addr + IPS_REG_HISR, IPS_BIT_EI);
4773 inb(ha->io_addr + IPS_REG_HISR); /*Ensure PCI Posting Completes*/
4776 /****************************************************************************/
4778 /* Routine Name: ips_enable_int_copperhead_memio */
4780 /* Routine Description: */
4781 /* Turn on interrupts */
4783 /****************************************************************************/
4785 ips_enable_int_copperhead_memio(ips_ha_t * ha)
4787 METHOD_TRACE("ips_enable_int_copperhead_memio", 1);
4789 writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR);
4790 readb(ha->mem_ptr + IPS_REG_HISR); /*Ensure PCI Posting Completes*/
4793 /****************************************************************************/
4795 /* Routine Name: ips_enable_int_morpheus */
4797 /* Routine Description: */
4798 /* Turn on interrupts */
4800 /****************************************************************************/
4802 ips_enable_int_morpheus(ips_ha_t * ha)
4806 METHOD_TRACE("ips_enable_int_morpheus", 1);
4808 Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
4810 writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
4811 readl(ha->mem_ptr + IPS_REG_I960_OIMR); /*Ensure PCI Posting Completes*/
4814 /****************************************************************************/
4816 /* Routine Name: ips_init_copperhead */
4818 /* Routine Description: */
4820 /* Initialize a copperhead controller */
4822 /****************************************************************************/
4824 ips_init_copperhead(ips_ha_t * ha)
4828 uint8_t PostByte[IPS_MAX_POST_BYTES];
4829 uint8_t ConfigByte[IPS_MAX_CONFIG_BYTES];
4832 METHOD_TRACE("ips_init_copperhead", 1);
4834 for (i = 0; i < IPS_MAX_POST_BYTES; i++) {
4835 for (j = 0; j < 45; j++) {
4836 Isr = inb(ha->io_addr + IPS_REG_HISR);
4837 if (Isr & IPS_BIT_GHI)
4840 /* Delay for 1 Second */
4841 MDELAY(IPS_ONE_SEC);
4845 /* error occurred */
4848 PostByte[i] = inb(ha->io_addr + IPS_REG_ISPR);
4849 outb(Isr, ha->io_addr + IPS_REG_HISR);
4852 if (PostByte[0] < IPS_GOOD_POST_STATUS) {
4853 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4854 "reset controller fails (post status %x %x).\n",
4855 PostByte[0], PostByte[1]);
4860 for (i = 0; i < IPS_MAX_CONFIG_BYTES; i++) {
4861 for (j = 0; j < 240; j++) {
4862 Isr = inb(ha->io_addr + IPS_REG_HISR);
4863 if (Isr & IPS_BIT_GHI)
4866 /* Delay for 1 Second */
4867 MDELAY(IPS_ONE_SEC);
4871 /* error occurred */
4874 ConfigByte[i] = inb(ha->io_addr + IPS_REG_ISPR);
4875 outb(Isr, ha->io_addr + IPS_REG_HISR);
4878 for (i = 0; i < 240; i++) {
4879 Cbsp = inb(ha->io_addr + IPS_REG_CBSP);
4881 if ((Cbsp & IPS_BIT_OP) == 0)
4884 /* Delay for 1 Second */
4885 MDELAY(IPS_ONE_SEC);
4893 outl(cpu_to_le32(0x1010), ha->io_addr + IPS_REG_CCCR);
4895 /* Enable busmastering */
4896 outb(IPS_BIT_EBM, ha->io_addr + IPS_REG_SCPR);
4898 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
4899 /* fix for anaconda64 */
4900 outl(0, ha->io_addr + IPS_REG_NDAE);
4902 /* Enable interrupts */
4903 outb(IPS_BIT_EI, ha->io_addr + IPS_REG_HISR);
4908 /****************************************************************************/
4910 /* Routine Name: ips_init_copperhead_memio */
4912 /* Routine Description: */
4914 /* Initialize a copperhead controller with memory mapped I/O */
4916 /****************************************************************************/
4918 ips_init_copperhead_memio(ips_ha_t * ha)
4922 uint8_t PostByte[IPS_MAX_POST_BYTES];
4923 uint8_t ConfigByte[IPS_MAX_CONFIG_BYTES];
4926 METHOD_TRACE("ips_init_copperhead_memio", 1);
4928 for (i = 0; i < IPS_MAX_POST_BYTES; i++) {
4929 for (j = 0; j < 45; j++) {
4930 Isr = readb(ha->mem_ptr + IPS_REG_HISR);
4931 if (Isr & IPS_BIT_GHI)
4934 /* Delay for 1 Second */
4935 MDELAY(IPS_ONE_SEC);
4939 /* error occurred */
4942 PostByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR);
4943 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
4946 if (PostByte[0] < IPS_GOOD_POST_STATUS) {
4947 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4948 "reset controller fails (post status %x %x).\n",
4949 PostByte[0], PostByte[1]);
4954 for (i = 0; i < IPS_MAX_CONFIG_BYTES; i++) {
4955 for (j = 0; j < 240; j++) {
4956 Isr = readb(ha->mem_ptr + IPS_REG_HISR);
4957 if (Isr & IPS_BIT_GHI)
4960 /* Delay for 1 Second */
4961 MDELAY(IPS_ONE_SEC);
4965 /* error occurred */
4968 ConfigByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR);
4969 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
4972 for (i = 0; i < 240; i++) {
4973 Cbsp = readb(ha->mem_ptr + IPS_REG_CBSP);
4975 if ((Cbsp & IPS_BIT_OP) == 0)
4978 /* Delay for 1 Second */
4979 MDELAY(IPS_ONE_SEC);
4983 /* error occurred */
4987 writel(0x1010, ha->mem_ptr + IPS_REG_CCCR);
4989 /* Enable busmastering */
4990 writeb(IPS_BIT_EBM, ha->mem_ptr + IPS_REG_SCPR);
4992 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
4993 /* fix for anaconda64 */
4994 writel(0, ha->mem_ptr + IPS_REG_NDAE);
4996 /* Enable interrupts */
4997 writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR);
4999 /* if we get here then everything went OK */
5003 /****************************************************************************/
5005 /* Routine Name: ips_init_morpheus */
5007 /* Routine Description: */
5009 /* Initialize a morpheus controller */
5011 /****************************************************************************/
5013 ips_init_morpheus(ips_ha_t * ha)
5021 METHOD_TRACE("ips_init_morpheus", 1);
5023 /* Wait up to 45 secs for Post */
5024 for (i = 0; i < 45; i++) {
5025 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5027 if (Isr & IPS_BIT_I960_MSG0I)
5030 /* Delay for 1 Second */
5031 MDELAY(IPS_ONE_SEC);
5035 /* error occurred */
5036 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5037 "timeout waiting for post.\n");
5042 Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
5044 if (Post == 0x4F00) { /* If Flashing the Battery PIC */
5045 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5046 "Flashing Battery PIC, Please wait ...\n");
5048 /* Clear the interrupt bit */
5049 Isr = (uint32_t) IPS_BIT_I960_MSG0I;
5050 writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
5052 for (i = 0; i < 120; i++) { /* Wait Up to 2 Min. for Completion */
5053 Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
5056 /* Delay for 1 Second */
5057 MDELAY(IPS_ONE_SEC);
5061 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5062 "timeout waiting for Battery PIC Flash\n");
5068 /* Clear the interrupt bit */
5069 Isr = (uint32_t) IPS_BIT_I960_MSG0I;
5070 writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
5072 if (Post < (IPS_GOOD_POST_STATUS << 8)) {
5073 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5074 "reset controller fails (post status %x).\n", Post);
5079 /* Wait up to 240 secs for config bytes */
5080 for (i = 0; i < 240; i++) {
5081 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5083 if (Isr & IPS_BIT_I960_MSG1I)
5086 /* Delay for 1 Second */
5087 MDELAY(IPS_ONE_SEC);
5091 /* error occurred */
5092 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5093 "timeout waiting for config.\n");
5098 Config = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
5100 /* Clear interrupt bit */
5101 Isr = (uint32_t) IPS_BIT_I960_MSG1I;
5102 writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
5104 /* Turn on the interrupts */
5105 Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
5107 writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
5109 /* if we get here then everything went OK */
5111 /* Since we did a RESET, an EraseStripeLock may be needed */
5112 if (Post == 0xEF10) {
5113 if ((Config == 0x000F) || (Config == 0x0009))
5114 ha->requires_esl = 1;
5120 /****************************************************************************/
5122 /* Routine Name: ips_reset_copperhead */
5124 /* Routine Description: */
5126 /* Reset the controller */
5128 /****************************************************************************/
5130 ips_reset_copperhead(ips_ha_t * ha)
5134 METHOD_TRACE("ips_reset_copperhead", 1);
5136 DEBUG_VAR(1, "(%s%d) ips_reset_copperhead: io addr: %x, irq: %d",
5137 ips_name, ha->host_num, ha->io_addr, ha->pcidev->irq);
5141 while (reset_counter < 2) {
5144 outb(IPS_BIT_RST, ha->io_addr + IPS_REG_SCPR);
5146 /* Delay for 1 Second */
5147 MDELAY(IPS_ONE_SEC);
5149 outb(0, ha->io_addr + IPS_REG_SCPR);
5151 /* Delay for 1 Second */
5152 MDELAY(IPS_ONE_SEC);
5154 if ((*ha->func.init) (ha))
5156 else if (reset_counter >= 2) {
5165 /****************************************************************************/
5167 /* Routine Name: ips_reset_copperhead_memio */
5169 /* Routine Description: */
5171 /* Reset the controller */
5173 /****************************************************************************/
5175 ips_reset_copperhead_memio(ips_ha_t * ha)
5179 METHOD_TRACE("ips_reset_copperhead_memio", 1);
5181 DEBUG_VAR(1, "(%s%d) ips_reset_copperhead_memio: mem addr: %x, irq: %d",
5182 ips_name, ha->host_num, ha->mem_addr, ha->pcidev->irq);
5186 while (reset_counter < 2) {
5189 writeb(IPS_BIT_RST, ha->mem_ptr + IPS_REG_SCPR);
5191 /* Delay for 1 Second */
5192 MDELAY(IPS_ONE_SEC);
5194 writeb(0, ha->mem_ptr + IPS_REG_SCPR);
5196 /* Delay for 1 Second */
5197 MDELAY(IPS_ONE_SEC);
5199 if ((*ha->func.init) (ha))
5201 else if (reset_counter >= 2) {
5210 /****************************************************************************/
5212 /* Routine Name: ips_reset_morpheus */
5214 /* Routine Description: */
5216 /* Reset the controller */
5218 /****************************************************************************/
5220 ips_reset_morpheus(ips_ha_t * ha)
5225 METHOD_TRACE("ips_reset_morpheus", 1);
5227 DEBUG_VAR(1, "(%s%d) ips_reset_morpheus: mem addr: %x, irq: %d",
5228 ips_name, ha->host_num, ha->mem_addr, ha->pcidev->irq);
5232 while (reset_counter < 2) {
5235 writel(0x80000000, ha->mem_ptr + IPS_REG_I960_IDR);
5237 /* Delay for 5 Seconds */
5238 MDELAY(5 * IPS_ONE_SEC);
5240 /* Do a PCI config read to wait for adapter */
5241 pci_read_config_byte(ha->pcidev, 4, &junk);
5243 if ((*ha->func.init) (ha))
5245 else if (reset_counter >= 2) {
5254 /****************************************************************************/
5256 /* Routine Name: ips_statinit */
5258 /* Routine Description: */
5260 /* Initialize the status queues on the controller */
5262 /****************************************************************************/
5264 ips_statinit(ips_ha_t * ha)
5266 uint32_t phys_status_start;
5268 METHOD_TRACE("ips_statinit", 1);
5270 ha->adapt->p_status_start = ha->adapt->status;
5271 ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS;
5272 ha->adapt->p_status_tail = ha->adapt->status;
5274 phys_status_start = ha->adapt->hw_status_start;
5275 outl(cpu_to_le32(phys_status_start), ha->io_addr + IPS_REG_SQSR);
5276 outl(cpu_to_le32(phys_status_start + IPS_STATUS_Q_SIZE),
5277 ha->io_addr + IPS_REG_SQER);
5278 outl(cpu_to_le32(phys_status_start + IPS_STATUS_SIZE),
5279 ha->io_addr + IPS_REG_SQHR);
5280 outl(cpu_to_le32(phys_status_start), ha->io_addr + IPS_REG_SQTR);
5282 ha->adapt->hw_status_tail = phys_status_start;
5285 /****************************************************************************/
5287 /* Routine Name: ips_statinit_memio */
5289 /* Routine Description: */
5291 /* Initialize the status queues on the controller */
5293 /****************************************************************************/
5295 ips_statinit_memio(ips_ha_t * ha)
5297 uint32_t phys_status_start;
5299 METHOD_TRACE("ips_statinit_memio", 1);
5301 ha->adapt->p_status_start = ha->adapt->status;
5302 ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS;
5303 ha->adapt->p_status_tail = ha->adapt->status;
5305 phys_status_start = ha->adapt->hw_status_start;
5306 writel(phys_status_start, ha->mem_ptr + IPS_REG_SQSR);
5307 writel(phys_status_start + IPS_STATUS_Q_SIZE,
5308 ha->mem_ptr + IPS_REG_SQER);
5309 writel(phys_status_start + IPS_STATUS_SIZE, ha->mem_ptr + IPS_REG_SQHR);
5310 writel(phys_status_start, ha->mem_ptr + IPS_REG_SQTR);
5312 ha->adapt->hw_status_tail = phys_status_start;
5315 /****************************************************************************/
5317 /* Routine Name: ips_statupd_copperhead */
5319 /* Routine Description: */
5321 /* Remove an element from the status queue */
5323 /****************************************************************************/
5325 ips_statupd_copperhead(ips_ha_t * ha)
5327 METHOD_TRACE("ips_statupd_copperhead", 1);
5329 if (ha->adapt->p_status_tail != ha->adapt->p_status_end) {
5330 ha->adapt->p_status_tail++;
5331 ha->adapt->hw_status_tail += sizeof (IPS_STATUS);
5333 ha->adapt->p_status_tail = ha->adapt->p_status_start;
5334 ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
5337 outl(cpu_to_le32(ha->adapt->hw_status_tail),
5338 ha->io_addr + IPS_REG_SQTR);
5340 return (ha->adapt->p_status_tail->value);
5343 /****************************************************************************/
5345 /* Routine Name: ips_statupd_copperhead_memio */
5347 /* Routine Description: */
5349 /* Remove an element from the status queue */
5351 /****************************************************************************/
5353 ips_statupd_copperhead_memio(ips_ha_t * ha)
5355 METHOD_TRACE("ips_statupd_copperhead_memio", 1);
5357 if (ha->adapt->p_status_tail != ha->adapt->p_status_end) {
5358 ha->adapt->p_status_tail++;
5359 ha->adapt->hw_status_tail += sizeof (IPS_STATUS);
5361 ha->adapt->p_status_tail = ha->adapt->p_status_start;
5362 ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
5365 writel(ha->adapt->hw_status_tail, ha->mem_ptr + IPS_REG_SQTR);
5367 return (ha->adapt->p_status_tail->value);
5370 /****************************************************************************/
5372 /* Routine Name: ips_statupd_morpheus */
5374 /* Routine Description: */
5376 /* Remove an element from the status queue */
5378 /****************************************************************************/
5380 ips_statupd_morpheus(ips_ha_t * ha)
5384 METHOD_TRACE("ips_statupd_morpheus", 1);
5386 val = readl(ha->mem_ptr + IPS_REG_I2O_OUTMSGQ);
5391 /****************************************************************************/
5393 /* Routine Name: ips_issue_copperhead */
5395 /* Routine Description: */
5397 /* Send a command down to the controller */
5399 /****************************************************************************/
5401 ips_issue_copperhead(ips_ha_t * ha, ips_scb_t * scb)
5406 METHOD_TRACE("ips_issue_copperhead", 1);
5408 if (scb->scsi_cmd) {
5409 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5413 scb->cmd.basic_io.command_id,
5414 scb->bus, scb->target_id, scb->lun);
5416 DEBUG_VAR(2, KERN_NOTICE "(%s%d) ips_issue: logical cmd id %d",
5417 ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5423 le32_to_cpu(inl(ha->io_addr + IPS_REG_CCCR))) & IPS_BIT_SEM) {
5426 if (++TimeOut >= IPS_SEM_TIMEOUT) {
5427 if (!(val & IPS_BIT_START_STOP))
5430 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5431 "ips_issue val [0x%x].\n", val);
5432 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5433 "ips_issue semaphore chk timeout.\n");
5435 return (IPS_FAILURE);
5439 outl(cpu_to_le32(scb->scb_busaddr), ha->io_addr + IPS_REG_CCSAR);
5440 outw(cpu_to_le32(IPS_BIT_START_CMD), ha->io_addr + IPS_REG_CCCR);
5442 return (IPS_SUCCESS);
5445 /****************************************************************************/
5447 /* Routine Name: ips_issue_copperhead_memio */
5449 /* Routine Description: */
5451 /* Send a command down to the controller */
5453 /****************************************************************************/
5455 ips_issue_copperhead_memio(ips_ha_t * ha, ips_scb_t * scb)
5460 METHOD_TRACE("ips_issue_copperhead_memio", 1);
5462 if (scb->scsi_cmd) {
5463 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5467 scb->cmd.basic_io.command_id,
5468 scb->bus, scb->target_id, scb->lun);
5470 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5471 ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5476 while ((val = readl(ha->mem_ptr + IPS_REG_CCCR)) & IPS_BIT_SEM) {
5479 if (++TimeOut >= IPS_SEM_TIMEOUT) {
5480 if (!(val & IPS_BIT_START_STOP))
5483 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5484 "ips_issue val [0x%x].\n", val);
5485 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5486 "ips_issue semaphore chk timeout.\n");
5488 return (IPS_FAILURE);
5492 writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_CCSAR);
5493 writel(IPS_BIT_START_CMD, ha->mem_ptr + IPS_REG_CCCR);
5495 return (IPS_SUCCESS);
5498 /****************************************************************************/
5500 /* Routine Name: ips_issue_i2o */
5502 /* Routine Description: */
5504 /* Send a command down to the controller */
5506 /****************************************************************************/
5508 ips_issue_i2o(ips_ha_t * ha, ips_scb_t * scb)
5511 METHOD_TRACE("ips_issue_i2o", 1);
5513 if (scb->scsi_cmd) {
5514 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5518 scb->cmd.basic_io.command_id,
5519 scb->bus, scb->target_id, scb->lun);
5521 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5522 ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5525 outl(cpu_to_le32(scb->scb_busaddr), ha->io_addr + IPS_REG_I2O_INMSGQ);
5527 return (IPS_SUCCESS);
5530 /****************************************************************************/
5532 /* Routine Name: ips_issue_i2o_memio */
5534 /* Routine Description: */
5536 /* Send a command down to the controller */
5538 /****************************************************************************/
5540 ips_issue_i2o_memio(ips_ha_t * ha, ips_scb_t * scb)
5543 METHOD_TRACE("ips_issue_i2o_memio", 1);
5545 if (scb->scsi_cmd) {
5546 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5550 scb->cmd.basic_io.command_id,
5551 scb->bus, scb->target_id, scb->lun);
5553 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5554 ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5557 writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_I2O_INMSGQ);
5559 return (IPS_SUCCESS);
5562 /****************************************************************************/
5564 /* Routine Name: ips_isintr_copperhead */
5566 /* Routine Description: */
5568 /* Test to see if an interrupt is for us */
5570 /****************************************************************************/
5572 ips_isintr_copperhead(ips_ha_t * ha)
5576 METHOD_TRACE("ips_isintr_copperhead", 2);
5578 Isr = inb(ha->io_addr + IPS_REG_HISR);
5581 /* ?!?! Nothing really there */
5584 if (Isr & IPS_BIT_SCE)
5586 else if (Isr & (IPS_BIT_SQO | IPS_BIT_GHI)) {
5587 /* status queue overflow or GHI */
5588 /* just clear the interrupt */
5589 outb(Isr, ha->io_addr + IPS_REG_HISR);
5595 /****************************************************************************/
5597 /* Routine Name: ips_isintr_copperhead_memio */
5599 /* Routine Description: */
5601 /* Test to see if an interrupt is for us */
5603 /****************************************************************************/
5605 ips_isintr_copperhead_memio(ips_ha_t * ha)
5609 METHOD_TRACE("ips_isintr_memio", 2);
5611 Isr = readb(ha->mem_ptr + IPS_REG_HISR);
5614 /* ?!?! Nothing really there */
5617 if (Isr & IPS_BIT_SCE)
5619 else if (Isr & (IPS_BIT_SQO | IPS_BIT_GHI)) {
5620 /* status queue overflow or GHI */
5621 /* just clear the interrupt */
5622 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
5628 /****************************************************************************/
5630 /* Routine Name: ips_isintr_morpheus */
5632 /* Routine Description: */
5634 /* Test to see if an interrupt is for us */
5636 /****************************************************************************/
5638 ips_isintr_morpheus(ips_ha_t * ha)
5642 METHOD_TRACE("ips_isintr_morpheus", 2);
5644 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5646 if (Isr & IPS_BIT_I2O_OPQI)
5652 /****************************************************************************/
5654 /* Routine Name: ips_wait */
5656 /* Routine Description: */
5658 /* Wait for a command to complete */
5660 /****************************************************************************/
5662 ips_wait(ips_ha_t * ha, int time, int intr)
5667 METHOD_TRACE("ips_wait", 1);
5672 time *= IPS_ONE_SEC; /* convert seconds */
5674 while ((time > 0) && (!done)) {
5675 if (intr == IPS_INTR_ON) {
5676 if (ha->waitflag == FALSE) {
5681 } else if (intr == IPS_INTR_IORL) {
5682 if (ha->waitflag == FALSE) {
5684 * controller generated an interrupt to
5685 * acknowledge completion of the command
5686 * and ips_intr() has serviced the interrupt.
5694 * NOTE: we already have the io_request_lock so
5695 * even if we get an interrupt it won't get serviced
5696 * until after we finish.
5699 (*ha->func.intr) (ha);
5702 /* This looks like a very evil loop, but it only does this during start-up */
5710 /****************************************************************************/
5712 /* Routine Name: ips_write_driver_status */
5714 /* Routine Description: */
5716 /* Write OS/Driver version to Page 5 of the nvram on the controller */
5718 /****************************************************************************/
5720 ips_write_driver_status(ips_ha_t * ha, int intr)
5722 METHOD_TRACE("ips_write_driver_status", 1);
5724 if (!ips_readwrite_page5(ha, FALSE, intr)) {
5725 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5726 "unable to read NVRAM page 5.\n");
5731 /* check to make sure the page has a valid */
5733 if (le32_to_cpu(ha->nvram->signature) != IPS_NVRAM_P5_SIG) {
5735 "(%s%d) NVRAM page 5 has an invalid signature: %X.",
5736 ips_name, ha->host_num, ha->nvram->signature);
5737 ha->nvram->signature = IPS_NVRAM_P5_SIG;
5741 "(%s%d) Ad Type: %d, Ad Slot: %d, BIOS: %c%c%c%c %c%c%c%c.",
5742 ips_name, ha->host_num, le16_to_cpu(ha->nvram->adapter_type),
5743 ha->nvram->adapter_slot, ha->nvram->bios_high[0],
5744 ha->nvram->bios_high[1], ha->nvram->bios_high[2],
5745 ha->nvram->bios_high[3], ha->nvram->bios_low[0],
5746 ha->nvram->bios_low[1], ha->nvram->bios_low[2],
5747 ha->nvram->bios_low[3]);
5749 ips_get_bios_version(ha, intr);
5751 /* change values (as needed) */
5752 ha->nvram->operating_system = IPS_OS_LINUX;
5753 ha->nvram->adapter_type = ha->ad_type;
5754 strncpy((char *) ha->nvram->driver_high, IPS_VERSION_HIGH, 4);
5755 strncpy((char *) ha->nvram->driver_low, IPS_VERSION_LOW, 4);
5756 strncpy((char *) ha->nvram->bios_high, ha->bios_version, 4);
5757 strncpy((char *) ha->nvram->bios_low, ha->bios_version + 4, 4);
5759 ha->nvram->versioning = 0; /* Indicate the Driver Does Not Support Versioning */
5761 /* now update the page */
5762 if (!ips_readwrite_page5(ha, TRUE, intr)) {
5763 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5764 "unable to write NVRAM page 5.\n");
5769 /* IF NVRAM Page 5 is OK, Use it for Slot Number Info Because Linux Doesn't Do Slots */
5770 ha->slot_num = ha->nvram->adapter_slot;
5775 /****************************************************************************/
5777 /* Routine Name: ips_read_adapter_status */
5779 /* Routine Description: */
5781 /* Do an Inquiry command to the adapter */
5783 /****************************************************************************/
5785 ips_read_adapter_status(ips_ha_t * ha, int intr)
5790 METHOD_TRACE("ips_read_adapter_status", 1);
5792 scb = &ha->scbs[ha->max_cmds - 1];
5794 ips_init_scb(ha, scb);
5796 scb->timeout = ips_cmd_timeout;
5797 scb->cdb[0] = IPS_CMD_ENQUIRY;
5799 scb->cmd.basic_io.op_code = IPS_CMD_ENQUIRY;
5800 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5801 scb->cmd.basic_io.sg_count = 0;
5802 scb->cmd.basic_io.lba = 0;
5803 scb->cmd.basic_io.sector_count = 0;
5804 scb->cmd.basic_io.log_drv = 0;
5805 scb->data_len = sizeof (*ha->enq);
5806 scb->cmd.basic_io.sg_addr = ha->enq_busaddr;
5810 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5811 || (ret == IPS_SUCCESS_IMM)
5812 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5818 /****************************************************************************/
5820 /* Routine Name: ips_read_subsystem_parameters */
5822 /* Routine Description: */
5824 /* Read subsystem parameters from the adapter */
5826 /****************************************************************************/
5828 ips_read_subsystem_parameters(ips_ha_t * ha, int intr)
5833 METHOD_TRACE("ips_read_subsystem_parameters", 1);
5835 scb = &ha->scbs[ha->max_cmds - 1];
5837 ips_init_scb(ha, scb);
5839 scb->timeout = ips_cmd_timeout;
5840 scb->cdb[0] = IPS_CMD_GET_SUBSYS;
5842 scb->cmd.basic_io.op_code = IPS_CMD_GET_SUBSYS;
5843 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5844 scb->cmd.basic_io.sg_count = 0;
5845 scb->cmd.basic_io.lba = 0;
5846 scb->cmd.basic_io.sector_count = 0;
5847 scb->cmd.basic_io.log_drv = 0;
5848 scb->data_len = sizeof (*ha->subsys);
5849 scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr;
5853 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5854 || (ret == IPS_SUCCESS_IMM)
5855 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5858 memcpy(ha->subsys, ha->ioctl_data, sizeof(*ha->subsys));
5862 /****************************************************************************/
5864 /* Routine Name: ips_read_config */
5866 /* Routine Description: */
5868 /* Read the configuration on the adapter */
5870 /****************************************************************************/
5872 ips_read_config(ips_ha_t * ha, int intr)
5878 METHOD_TRACE("ips_read_config", 1);
5880 /* set defaults for initiator IDs */
5881 for (i = 0; i < 4; i++)
5882 ha->conf->init_id[i] = 7;
5884 scb = &ha->scbs[ha->max_cmds - 1];
5886 ips_init_scb(ha, scb);
5888 scb->timeout = ips_cmd_timeout;
5889 scb->cdb[0] = IPS_CMD_READ_CONF;
5891 scb->cmd.basic_io.op_code = IPS_CMD_READ_CONF;
5892 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5893 scb->data_len = sizeof (*ha->conf);
5894 scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr;
5898 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5899 || (ret == IPS_SUCCESS_IMM)
5900 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
5902 memset(ha->conf, 0, sizeof (IPS_CONF));
5904 /* reset initiator IDs */
5905 for (i = 0; i < 4; i++)
5906 ha->conf->init_id[i] = 7;
5908 /* Allow Completed with Errors, so JCRM can access the Adapter to fix the problems */
5909 if ((scb->basic_status & IPS_GSC_STATUS_MASK) ==
5910 IPS_CMD_CMPLT_WERROR)
5916 memcpy(ha->conf, ha->ioctl_data, sizeof(*ha->conf));
5920 /****************************************************************************/
5922 /* Routine Name: ips_readwrite_page5 */
5924 /* Routine Description: */
5926 /* Read nvram page 5 from the adapter */
5928 /****************************************************************************/
5930 ips_readwrite_page5(ips_ha_t * ha, int write, int intr)
5935 METHOD_TRACE("ips_readwrite_page5", 1);
5937 scb = &ha->scbs[ha->max_cmds - 1];
5939 ips_init_scb(ha, scb);
5941 scb->timeout = ips_cmd_timeout;
5942 scb->cdb[0] = IPS_CMD_RW_NVRAM_PAGE;
5944 scb->cmd.nvram.op_code = IPS_CMD_RW_NVRAM_PAGE;
5945 scb->cmd.nvram.command_id = IPS_COMMAND_ID(ha, scb);
5946 scb->cmd.nvram.page = 5;
5947 scb->cmd.nvram.write = write;
5948 scb->cmd.nvram.reserved = 0;
5949 scb->cmd.nvram.reserved2 = 0;
5950 scb->data_len = sizeof (*ha->nvram);
5951 scb->cmd.nvram.buffer_addr = ha->ioctl_busaddr;
5953 memcpy(ha->ioctl_data, ha->nvram, sizeof(*ha->nvram));
5955 /* issue the command */
5957 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5958 || (ret == IPS_SUCCESS_IMM)
5959 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
5961 memset(ha->nvram, 0, sizeof (IPS_NVRAM_P5));
5966 memcpy(ha->nvram, ha->ioctl_data, sizeof(*ha->nvram));
5970 /****************************************************************************/
5972 /* Routine Name: ips_clear_adapter */
5974 /* Routine Description: */
5976 /* Clear the stripe lock tables */
5978 /****************************************************************************/
5980 ips_clear_adapter(ips_ha_t * ha, int intr)
5985 METHOD_TRACE("ips_clear_adapter", 1);
5987 scb = &ha->scbs[ha->max_cmds - 1];
5989 ips_init_scb(ha, scb);
5991 scb->timeout = ips_reset_timeout;
5992 scb->cdb[0] = IPS_CMD_CONFIG_SYNC;
5994 scb->cmd.config_sync.op_code = IPS_CMD_CONFIG_SYNC;
5995 scb->cmd.config_sync.command_id = IPS_COMMAND_ID(ha, scb);
5996 scb->cmd.config_sync.channel = 0;
5997 scb->cmd.config_sync.source_target = IPS_POCL;
5998 scb->cmd.config_sync.reserved = 0;
5999 scb->cmd.config_sync.reserved2 = 0;
6000 scb->cmd.config_sync.reserved3 = 0;
6004 ips_send_wait(ha, scb, ips_reset_timeout, intr)) == IPS_FAILURE)
6005 || (ret == IPS_SUCCESS_IMM)
6006 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
6009 /* send unlock stripe command */
6010 ips_init_scb(ha, scb);
6012 scb->cdb[0] = IPS_CMD_ERROR_TABLE;
6013 scb->timeout = ips_reset_timeout;
6015 scb->cmd.unlock_stripe.op_code = IPS_CMD_ERROR_TABLE;
6016 scb->cmd.unlock_stripe.command_id = IPS_COMMAND_ID(ha, scb);
6017 scb->cmd.unlock_stripe.log_drv = 0;
6018 scb->cmd.unlock_stripe.control = IPS_CSL;
6019 scb->cmd.unlock_stripe.reserved = 0;
6020 scb->cmd.unlock_stripe.reserved2 = 0;
6021 scb->cmd.unlock_stripe.reserved3 = 0;
6025 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
6026 || (ret == IPS_SUCCESS_IMM)
6027 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
6033 /****************************************************************************/
6035 /* Routine Name: ips_ffdc_reset */
6037 /* Routine Description: */
6039 /* FFDC: write reset info */
6041 /****************************************************************************/
6043 ips_ffdc_reset(ips_ha_t * ha, int intr)
6047 METHOD_TRACE("ips_ffdc_reset", 1);
6049 scb = &ha->scbs[ha->max_cmds - 1];
6051 ips_init_scb(ha, scb);
6053 scb->timeout = ips_cmd_timeout;
6054 scb->cdb[0] = IPS_CMD_FFDC;
6055 scb->cmd.ffdc.op_code = IPS_CMD_FFDC;
6056 scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb);
6057 scb->cmd.ffdc.reset_count = ha->reset_count;
6058 scb->cmd.ffdc.reset_type = 0x80;
6060 /* convert time to what the card wants */
6061 ips_fix_ffdc_time(ha, scb, ha->last_ffdc);
6064 ips_send_wait(ha, scb, ips_cmd_timeout, intr);
6067 /****************************************************************************/
6069 /* Routine Name: ips_ffdc_time */
6071 /* Routine Description: */
6073 /* FFDC: write time info */
6075 /****************************************************************************/
6077 ips_ffdc_time(ips_ha_t * ha)
6081 METHOD_TRACE("ips_ffdc_time", 1);
6083 DEBUG_VAR(1, "(%s%d) Sending time update.", ips_name, ha->host_num);
6085 scb = &ha->scbs[ha->max_cmds - 1];
6087 ips_init_scb(ha, scb);
6089 scb->timeout = ips_cmd_timeout;
6090 scb->cdb[0] = IPS_CMD_FFDC;
6091 scb->cmd.ffdc.op_code = IPS_CMD_FFDC;
6092 scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb);
6093 scb->cmd.ffdc.reset_count = 0;
6094 scb->cmd.ffdc.reset_type = 0;
6096 /* convert time to what the card wants */
6097 ips_fix_ffdc_time(ha, scb, ha->last_ffdc);
6100 ips_send_wait(ha, scb, ips_cmd_timeout, IPS_FFDC);
6103 /****************************************************************************/
6105 /* Routine Name: ips_fix_ffdc_time */
6107 /* Routine Description: */
6108 /* Adjust time_t to what the card wants */
6110 /****************************************************************************/
6112 ips_fix_ffdc_time(ips_ha_t * ha, ips_scb_t * scb, time_t current_time)
6119 int year_lengths[2] = { IPS_DAYS_NORMAL_YEAR, IPS_DAYS_LEAP_YEAR };
6120 int month_lengths[12][2] = { {31, 31},
6134 METHOD_TRACE("ips_fix_ffdc_time", 1);
6136 days = current_time / IPS_SECS_DAY;
6137 rem = current_time % IPS_SECS_DAY;
6139 scb->cmd.ffdc.hour = (rem / IPS_SECS_HOUR);
6140 rem = rem % IPS_SECS_HOUR;
6141 scb->cmd.ffdc.minute = (rem / IPS_SECS_MIN);
6142 scb->cmd.ffdc.second = (rem % IPS_SECS_MIN);
6144 year = IPS_EPOCH_YEAR;
6145 while (days < 0 || days >= year_lengths[yleap = IPS_IS_LEAP_YEAR(year)]) {
6148 newy = year + (days / IPS_DAYS_NORMAL_YEAR);
6151 days -= (newy - year) * IPS_DAYS_NORMAL_YEAR +
6152 IPS_NUM_LEAP_YEARS_THROUGH(newy - 1) -
6153 IPS_NUM_LEAP_YEARS_THROUGH(year - 1);
6157 scb->cmd.ffdc.yearH = year / 100;
6158 scb->cmd.ffdc.yearL = year % 100;
6160 for (i = 0; days >= month_lengths[i][yleap]; ++i)
6161 days -= month_lengths[i][yleap];
6163 scb->cmd.ffdc.month = i + 1;
6164 scb->cmd.ffdc.day = days + 1;
6167 /****************************************************************************
6168 * BIOS Flash Routines *
6169 ****************************************************************************/
6171 /****************************************************************************/
6173 /* Routine Name: ips_erase_bios */
6175 /* Routine Description: */
6176 /* Erase the BIOS on the adapter */
6178 /****************************************************************************/
6180 ips_erase_bios(ips_ha_t * ha)
6185 METHOD_TRACE("ips_erase_bios", 1);
6189 /* Clear the status register */
6190 outl(0, ha->io_addr + IPS_REG_FLAP);
6191 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6192 udelay(25); /* 25 us */
6194 outb(0x50, ha->io_addr + IPS_REG_FLDP);
6195 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6196 udelay(25); /* 25 us */
6199 outb(0x20, ha->io_addr + IPS_REG_FLDP);
6200 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6201 udelay(25); /* 25 us */
6204 outb(0xD0, ha->io_addr + IPS_REG_FLDP);
6205 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6206 udelay(25); /* 25 us */
6209 outb(0x70, ha->io_addr + IPS_REG_FLDP);
6210 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6211 udelay(25); /* 25 us */
6213 timeout = 80000; /* 80 seconds */
6215 while (timeout > 0) {
6216 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6217 outl(0, ha->io_addr + IPS_REG_FLAP);
6218 udelay(25); /* 25 us */
6221 status = inb(ha->io_addr + IPS_REG_FLDP);
6230 /* check for timeout */
6234 /* try to suspend the erase */
6235 outb(0xB0, ha->io_addr + IPS_REG_FLDP);
6236 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6237 udelay(25); /* 25 us */
6239 /* wait for 10 seconds */
6241 while (timeout > 0) {
6242 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6243 outl(0, ha->io_addr + IPS_REG_FLAP);
6244 udelay(25); /* 25 us */
6247 status = inb(ha->io_addr + IPS_REG_FLDP);
6259 /* check for valid VPP */
6264 /* check for successful flash */
6266 /* sequence error */
6269 /* Otherwise, we were successful */
6271 outb(0x50, ha->io_addr + IPS_REG_FLDP);
6272 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6273 udelay(25); /* 25 us */
6276 outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6277 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6278 udelay(25); /* 25 us */
6283 /****************************************************************************/
6285 /* Routine Name: ips_erase_bios_memio */
6287 /* Routine Description: */
6288 /* Erase the BIOS on the adapter */
6290 /****************************************************************************/
6292 ips_erase_bios_memio(ips_ha_t * ha)
6297 METHOD_TRACE("ips_erase_bios_memio", 1);
6301 /* Clear the status register */
6302 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6303 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6304 udelay(25); /* 25 us */
6306 writeb(0x50, ha->mem_ptr + IPS_REG_FLDP);
6307 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6308 udelay(25); /* 25 us */
6311 writeb(0x20, ha->mem_ptr + IPS_REG_FLDP);
6312 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6313 udelay(25); /* 25 us */
6316 writeb(0xD0, ha->mem_ptr + IPS_REG_FLDP);
6317 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6318 udelay(25); /* 25 us */
6321 writeb(0x70, ha->mem_ptr + IPS_REG_FLDP);
6322 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6323 udelay(25); /* 25 us */
6325 timeout = 80000; /* 80 seconds */
6327 while (timeout > 0) {
6328 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6329 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6330 udelay(25); /* 25 us */
6333 status = readb(ha->mem_ptr + IPS_REG_FLDP);
6342 /* check for timeout */
6346 /* try to suspend the erase */
6347 writeb(0xB0, ha->mem_ptr + IPS_REG_FLDP);
6348 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6349 udelay(25); /* 25 us */
6351 /* wait for 10 seconds */
6353 while (timeout > 0) {
6354 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6355 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6356 udelay(25); /* 25 us */
6359 status = readb(ha->mem_ptr + IPS_REG_FLDP);
6371 /* check for valid VPP */
6376 /* check for successful flash */
6378 /* sequence error */
6381 /* Otherwise, we were successful */
6383 writeb(0x50, ha->mem_ptr + IPS_REG_FLDP);
6384 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6385 udelay(25); /* 25 us */
6388 writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6389 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6390 udelay(25); /* 25 us */
6395 /****************************************************************************/
6397 /* Routine Name: ips_program_bios */
6399 /* Routine Description: */
6400 /* Program the BIOS on the adapter */
6402 /****************************************************************************/
6404 ips_program_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6411 METHOD_TRACE("ips_program_bios", 1);
6415 for (i = 0; i < buffersize; i++) {
6417 outl(cpu_to_le32(i + offset), ha->io_addr + IPS_REG_FLAP);
6418 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6419 udelay(25); /* 25 us */
6421 outb(0x40, ha->io_addr + IPS_REG_FLDP);
6422 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6423 udelay(25); /* 25 us */
6425 outb(buffer[i], ha->io_addr + IPS_REG_FLDP);
6426 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6427 udelay(25); /* 25 us */
6429 /* wait up to one second */
6431 while (timeout > 0) {
6432 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6433 outl(0, ha->io_addr + IPS_REG_FLAP);
6434 udelay(25); /* 25 us */
6437 status = inb(ha->io_addr + IPS_REG_FLDP);
6448 outl(0, ha->io_addr + IPS_REG_FLAP);
6449 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6450 udelay(25); /* 25 us */
6452 outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6453 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6454 udelay(25); /* 25 us */
6459 /* check the status */
6460 if (status & 0x18) {
6461 /* programming error */
6462 outl(0, ha->io_addr + IPS_REG_FLAP);
6463 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6464 udelay(25); /* 25 us */
6466 outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6467 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6468 udelay(25); /* 25 us */
6474 /* Enable reading */
6475 outl(0, ha->io_addr + IPS_REG_FLAP);
6476 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6477 udelay(25); /* 25 us */
6479 outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6480 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6481 udelay(25); /* 25 us */
6486 /****************************************************************************/
6488 /* Routine Name: ips_program_bios_memio */
6490 /* Routine Description: */
6491 /* Program the BIOS on the adapter */
6493 /****************************************************************************/
6495 ips_program_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6502 METHOD_TRACE("ips_program_bios_memio", 1);
6506 for (i = 0; i < buffersize; i++) {
6508 writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
6509 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6510 udelay(25); /* 25 us */
6512 writeb(0x40, ha->mem_ptr + IPS_REG_FLDP);
6513 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6514 udelay(25); /* 25 us */
6516 writeb(buffer[i], ha->mem_ptr + IPS_REG_FLDP);
6517 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6518 udelay(25); /* 25 us */
6520 /* wait up to one second */
6522 while (timeout > 0) {
6523 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6524 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6525 udelay(25); /* 25 us */
6528 status = readb(ha->mem_ptr + IPS_REG_FLDP);
6539 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6540 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6541 udelay(25); /* 25 us */
6543 writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6544 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6545 udelay(25); /* 25 us */
6550 /* check the status */
6551 if (status & 0x18) {
6552 /* programming error */
6553 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6554 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6555 udelay(25); /* 25 us */
6557 writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6558 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6559 udelay(25); /* 25 us */
6565 /* Enable reading */
6566 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6567 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6568 udelay(25); /* 25 us */
6570 writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6571 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6572 udelay(25); /* 25 us */
6577 /****************************************************************************/
6579 /* Routine Name: ips_verify_bios */
6581 /* Routine Description: */
6582 /* Verify the BIOS on the adapter */
6584 /****************************************************************************/
6586 ips_verify_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6592 METHOD_TRACE("ips_verify_bios", 1);
6595 outl(0, ha->io_addr + IPS_REG_FLAP);
6596 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6597 udelay(25); /* 25 us */
6599 if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
6602 outl(cpu_to_le32(1), ha->io_addr + IPS_REG_FLAP);
6603 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6604 udelay(25); /* 25 us */
6605 if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
6609 for (i = 2; i < buffersize; i++) {
6611 outl(cpu_to_le32(i + offset), ha->io_addr + IPS_REG_FLAP);
6612 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6613 udelay(25); /* 25 us */
6615 checksum = (uint8_t) checksum + inb(ha->io_addr + IPS_REG_FLDP);
6626 /****************************************************************************/
6628 /* Routine Name: ips_verify_bios_memio */
6630 /* Routine Description: */
6631 /* Verify the BIOS on the adapter */
6633 /****************************************************************************/
6635 ips_verify_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6641 METHOD_TRACE("ips_verify_bios_memio", 1);
6644 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6645 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6646 udelay(25); /* 25 us */
6648 if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55)
6651 writel(1, ha->mem_ptr + IPS_REG_FLAP);
6652 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6653 udelay(25); /* 25 us */
6654 if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA)
6658 for (i = 2; i < buffersize; i++) {
6660 writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
6661 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6662 udelay(25); /* 25 us */
6665 (uint8_t) checksum + readb(ha->mem_ptr + IPS_REG_FLDP);
6676 /****************************************************************************/
6678 /* Routine Name: ips_abort_init */
6680 /* Routine Description: */
6681 /* cleanup routine for a failed adapter initialization */
6682 /****************************************************************************/
6684 ips_abort_init(ips_ha_t * ha, int index)
6688 ips_ha[index] = NULL;
6689 ips_sh[index] = NULL;
6693 /****************************************************************************/
6695 /* Routine Name: ips_shift_controllers */
6697 /* Routine Description: */
6698 /* helper function for ordering adapters */
6699 /****************************************************************************/
6701 ips_shift_controllers(int lowindex, int highindex)
6703 ips_ha_t *ha_sav = ips_ha[highindex];
6704 struct Scsi_Host *sh_sav = ips_sh[highindex];
6707 for (i = highindex; i > lowindex; i--) {
6708 ips_ha[i] = ips_ha[i - 1];
6709 ips_sh[i] = ips_sh[i - 1];
6710 ips_ha[i]->host_num = i;
6712 ha_sav->host_num = lowindex;
6713 ips_ha[lowindex] = ha_sav;
6714 ips_sh[lowindex] = sh_sav;
6717 /****************************************************************************/
6719 /* Routine Name: ips_order_controllers */
6721 /* Routine Description: */
6722 /* place controllers is the "proper" boot order */
6723 /****************************************************************************/
6725 ips_order_controllers(void)
6727 int i, j, tmp, position = 0;
6728 IPS_NVRAM_P5 *nvram;
6731 nvram = ips_ha[0]->nvram;
6733 if (nvram->adapter_order[0]) {
6734 for (i = 1; i <= nvram->adapter_order[0]; i++) {
6735 for (j = position; j < ips_num_controllers; j++) {
6736 switch (ips_ha[j]->ad_type) {
6737 case IPS_ADTYPE_SERVERAID6M:
6738 case IPS_ADTYPE_SERVERAID7M:
6739 if (nvram->adapter_order[i] == 'M') {
6740 ips_shift_controllers(position,
6745 case IPS_ADTYPE_SERVERAID4L:
6746 case IPS_ADTYPE_SERVERAID4M:
6747 case IPS_ADTYPE_SERVERAID4MX:
6748 case IPS_ADTYPE_SERVERAID4LX:
6749 if (nvram->adapter_order[i] == 'N') {
6750 ips_shift_controllers(position,
6755 case IPS_ADTYPE_SERVERAID6I:
6756 case IPS_ADTYPE_SERVERAID5I2:
6757 case IPS_ADTYPE_SERVERAID5I1:
6758 case IPS_ADTYPE_SERVERAID7k:
6759 if (nvram->adapter_order[i] == 'S') {
6760 ips_shift_controllers(position,
6765 case IPS_ADTYPE_SERVERAID:
6766 case IPS_ADTYPE_SERVERAID2:
6767 case IPS_ADTYPE_NAVAJO:
6768 case IPS_ADTYPE_KIOWA:
6769 case IPS_ADTYPE_SERVERAID3L:
6770 case IPS_ADTYPE_SERVERAID3:
6771 case IPS_ADTYPE_SERVERAID4H:
6772 if (nvram->adapter_order[i] == 'A') {
6773 ips_shift_controllers(position,
6783 /* if adapter_order[0], then ordering is complete */
6786 /* old bios, use older ordering */
6788 for (i = position; i < ips_num_controllers; i++) {
6789 if (ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID5I2 ||
6790 ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID5I1) {
6791 ips_shift_controllers(position, i);
6796 /* if there were no 5I cards, then don't do any extra ordering */
6799 for (i = position; i < ips_num_controllers; i++) {
6800 if (ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4L ||
6801 ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4M ||
6802 ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4LX ||
6803 ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4MX) {
6804 ips_shift_controllers(position, i);
6812 /****************************************************************************/
6814 /* Routine Name: ips_register_scsi */
6816 /* Routine Description: */
6817 /* perform any registration and setup with the scsi layer */
6818 /****************************************************************************/
6820 ips_register_scsi(int index)
6822 struct Scsi_Host *sh;
6823 ips_ha_t *ha, *oldha = ips_ha[index];
6824 sh = scsi_host_alloc(&ips_driver_template, sizeof (ips_ha_t));
6826 IPS_PRINTK(KERN_WARNING, oldha->pcidev,
6827 "Unable to register controller with SCSI subsystem\n");
6831 memcpy(ha, oldha, sizeof (ips_ha_t));
6832 free_irq(oldha->pcidev->irq, oldha);
6833 /* Install the interrupt handler with the new ha */
6834 if (request_irq(ha->pcidev->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) {
6835 IPS_PRINTK(KERN_WARNING, ha->pcidev,
6836 "Unable to install interrupt handler\n");
6842 /* Store away needed values for later use */
6843 sh->unique_id = (ha->io_addr) ? ha->io_addr : ha->mem_addr;
6844 sh->sg_tablesize = sh->hostt->sg_tablesize;
6845 sh->can_queue = sh->hostt->can_queue;
6846 sh->cmd_per_lun = sh->hostt->cmd_per_lun;
6847 sh->use_clustering = sh->hostt->use_clustering;
6848 sh->max_sectors = 128;
6850 sh->max_id = ha->ntargets;
6851 sh->max_lun = ha->nlun;
6852 sh->max_channel = ha->nbus - 1;
6853 sh->can_queue = ha->max_cmds - 1;
6855 if (scsi_add_host(sh, &ha->pcidev->dev))
6866 free_irq(ha->pcidev->irq, ha);
6872 /*---------------------------------------------------------------------------*/
6873 /* Routine Name: ips_remove_device */
6875 /* Routine Description: */
6876 /* Remove one Adapter ( Hot Plugging ) */
6877 /*---------------------------------------------------------------------------*/
6878 static void __devexit
6879 ips_remove_device(struct pci_dev *pci_dev)
6881 struct Scsi_Host *sh = pci_get_drvdata(pci_dev);
6883 pci_set_drvdata(pci_dev, NULL);
6887 pci_release_regions(pci_dev);
6888 pci_disable_device(pci_dev);
6891 /****************************************************************************/
6893 /* Routine Name: ips_module_init */
6895 /* Routine Description: */
6896 /* function called on module load */
6897 /****************************************************************************/
6899 ips_module_init(void)
6901 if (pci_register_driver(&ips_pci_driver) < 0)
6903 ips_driver_template.module = THIS_MODULE;
6904 ips_order_controllers();
6905 if (!ips_detect(&ips_driver_template)) {
6906 pci_unregister_driver(&ips_pci_driver);
6909 register_reboot_notifier(&ips_notifier);
6913 /****************************************************************************/
6915 /* Routine Name: ips_module_exit */
6917 /* Routine Description: */
6918 /* function called on module unload */
6919 /****************************************************************************/
6921 ips_module_exit(void)
6923 pci_unregister_driver(&ips_pci_driver);
6924 unregister_reboot_notifier(&ips_notifier);
6927 module_init(ips_module_init);
6928 module_exit(ips_module_exit);
6930 /*---------------------------------------------------------------------------*/
6931 /* Routine Name: ips_insert_device */
6933 /* Routine Description: */
6934 /* Add One Adapter ( Hot Plug ) */
6937 /* 0 if Successful, else non-zero */
6938 /*---------------------------------------------------------------------------*/
6939 static int __devinit
6940 ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent)
6945 METHOD_TRACE("ips_insert_device", 1);
6946 rc = pci_enable_device(pci_dev);
6950 rc = pci_request_regions(pci_dev, "ips");
6954 rc = ips_init_phase1(pci_dev, &index);
6956 rc = ips_init_phase2(index);
6959 if (ips_register_scsi(index)) {
6960 ips_free(ips_ha[index]);
6965 ips_num_controllers++;
6967 ips_next_controller = ips_num_controllers;
6971 goto err_out_regions;
6974 pci_set_drvdata(pci_dev, ips_sh[index]);
6978 pci_release_regions(pci_dev);
6980 pci_disable_device(pci_dev);
6984 /*---------------------------------------------------------------------------*/
6985 /* Routine Name: ips_init_phase1 */
6987 /* Routine Description: */
6988 /* Adapter Initialization */
6991 /* 0 if Successful, else non-zero */
6992 /*---------------------------------------------------------------------------*/
6994 ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr)
7005 dma_addr_t dma_address;
7006 char __iomem *ioremap_ptr;
7007 char __iomem *mem_ptr;
7010 METHOD_TRACE("ips_init_phase1", 1);
7011 index = IPS_MAX_ADAPTERS;
7012 for (j = 0; j < IPS_MAX_ADAPTERS; j++) {
7013 if (ips_ha[j] == NULL) {
7019 if (index >= IPS_MAX_ADAPTERS)
7022 /* stuff that we get in dev */
7023 bus = pci_dev->bus->number;
7024 func = pci_dev->devfn;
7026 /* Init MEM/IO addresses to 0 */
7032 for (j = 0; j < 2; j++) {
7033 if (!pci_resource_start(pci_dev, j))
7036 if (pci_resource_flags(pci_dev, j) & IORESOURCE_IO) {
7037 io_addr = pci_resource_start(pci_dev, j);
7038 io_len = pci_resource_len(pci_dev, j);
7040 mem_addr = pci_resource_start(pci_dev, j);
7041 mem_len = pci_resource_len(pci_dev, j);
7045 /* setup memory mapped area (if applicable) */
7050 base = mem_addr & PAGE_MASK;
7051 offs = mem_addr - base;
7052 ioremap_ptr = ioremap(base, PAGE_SIZE);
7055 mem_ptr = ioremap_ptr + offs;
7061 /* found a controller */
7062 ha = kzalloc(sizeof (ips_ha_t), GFP_KERNEL);
7064 IPS_PRINTK(KERN_WARNING, pci_dev,
7065 "Unable to allocate temporary ha struct\n");
7069 ips_sh[index] = NULL;
7073 /* Store info in HA structure */
7074 ha->io_addr = io_addr;
7075 ha->io_len = io_len;
7076 ha->mem_addr = mem_addr;
7077 ha->mem_len = mem_len;
7078 ha->mem_ptr = mem_ptr;
7079 ha->ioremap_ptr = ioremap_ptr;
7080 ha->host_num = (uint32_t) index;
7081 ha->slot_num = PCI_SLOT(pci_dev->devfn);
7082 ha->pcidev = pci_dev;
7085 * Set the pci_dev's dma_mask. Not all adapters support 64bit
7086 * addressing so don't enable it if the adapter can't support
7087 * it! Also, don't use 64bit addressing if dma addresses
7088 * are guaranteed to be < 4G.
7090 if (IPS_ENABLE_DMA64 && IPS_HAS_ENH_SGLIST(ha) &&
7091 !pci_set_dma_mask(ha->pcidev, DMA_64BIT_MASK)) {
7092 (ha)->flags |= IPS_HA_ENH_SG;
7094 if (pci_set_dma_mask(ha->pcidev, DMA_32BIT_MASK) != 0) {
7095 printk(KERN_WARNING "Unable to set DMA Mask\n");
7096 return ips_abort_init(ha, index);
7099 if(ips_cd_boot && !ips_FlashData){
7100 ips_FlashData = pci_alloc_consistent(pci_dev, PAGE_SIZE << 7,
7104 ha->enq = pci_alloc_consistent(pci_dev, sizeof (IPS_ENQ),
7107 IPS_PRINTK(KERN_WARNING, pci_dev,
7108 "Unable to allocate host inquiry structure\n");
7109 return ips_abort_init(ha, index);
7112 ha->adapt = pci_alloc_consistent(pci_dev, sizeof (IPS_ADAPTER) +
7113 sizeof (IPS_IO_CMD), &dma_address);
7115 IPS_PRINTK(KERN_WARNING, pci_dev,
7116 "Unable to allocate host adapt & dummy structures\n");
7117 return ips_abort_init(ha, index);
7119 ha->adapt->hw_status_start = dma_address;
7120 ha->dummy = (void *) (ha->adapt + 1);
7124 ha->logical_drive_info = pci_alloc_consistent(pci_dev, sizeof (IPS_LD_INFO), &dma_address);
7125 if (!ha->logical_drive_info) {
7126 IPS_PRINTK(KERN_WARNING, pci_dev,
7127 "Unable to allocate logical drive info structure\n");
7128 return ips_abort_init(ha, index);
7130 ha->logical_drive_info_dma_addr = dma_address;
7133 ha->conf = kmalloc(sizeof (IPS_CONF), GFP_KERNEL);
7136 IPS_PRINTK(KERN_WARNING, pci_dev,
7137 "Unable to allocate host conf structure\n");
7138 return ips_abort_init(ha, index);
7141 ha->nvram = kmalloc(sizeof (IPS_NVRAM_P5), GFP_KERNEL);
7144 IPS_PRINTK(KERN_WARNING, pci_dev,
7145 "Unable to allocate host NVRAM structure\n");
7146 return ips_abort_init(ha, index);
7149 ha->subsys = kmalloc(sizeof (IPS_SUBSYS), GFP_KERNEL);
7152 IPS_PRINTK(KERN_WARNING, pci_dev,
7153 "Unable to allocate host subsystem structure\n");
7154 return ips_abort_init(ha, index);
7157 /* the ioctl buffer is now used during adapter initialization, so its
7158 * successful allocation is now required */
7159 if (ips_ioctlsize < PAGE_SIZE)
7160 ips_ioctlsize = PAGE_SIZE;
7162 ha->ioctl_data = pci_alloc_consistent(pci_dev, ips_ioctlsize,
7163 &ha->ioctl_busaddr);
7164 ha->ioctl_len = ips_ioctlsize;
7165 if (!ha->ioctl_data) {
7166 IPS_PRINTK(KERN_WARNING, pci_dev,
7167 "Unable to allocate IOCTL data\n");
7168 return ips_abort_init(ha, index);
7174 ips_setup_funclist(ha);
7176 if ((IPS_IS_MORPHEUS(ha)) || (IPS_IS_MARCO(ha))) {
7177 /* If Morpheus appears dead, reset it */
7178 IsDead = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
7179 if (IsDead == 0xDEADBEEF) {
7180 ips_reset_morpheus(ha);
7185 * Initialize the card if it isn't already
7188 if (!(*ha->func.isinit) (ha)) {
7189 if (!(*ha->func.init) (ha)) {
7191 * Initialization failed
7193 IPS_PRINTK(KERN_WARNING, pci_dev,
7194 "Unable to initialize controller\n");
7195 return ips_abort_init(ha, index);
7203 /*---------------------------------------------------------------------------*/
7204 /* Routine Name: ips_init_phase2 */
7206 /* Routine Description: */
7207 /* Adapter Initialization Phase 2 */
7210 /* 0 if Successful, else non-zero */
7211 /*---------------------------------------------------------------------------*/
7213 ips_init_phase2(int index)
7219 METHOD_TRACE("ips_init_phase2", 1);
7221 ips_ha[index] = NULL;
7225 /* Install the interrupt handler */
7226 if (request_irq(ha->pcidev->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) {
7227 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7228 "Unable to install interrupt handler\n");
7229 return ips_abort_init(ha, index);
7233 * Allocate a temporary SCB for initialization
7236 if (!ips_allocatescbs(ha)) {
7237 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7238 "Unable to allocate a CCB\n");
7239 free_irq(ha->pcidev->irq, ha);
7240 return ips_abort_init(ha, index);
7243 if (!ips_hainit(ha)) {
7244 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7245 "Unable to initialize controller\n");
7246 free_irq(ha->pcidev->irq, ha);
7247 return ips_abort_init(ha, index);
7249 /* Free the temporary SCB */
7250 ips_deallocatescbs(ha, 1);
7253 if (!ips_allocatescbs(ha)) {
7254 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7255 "Unable to allocate CCBs\n");
7256 free_irq(ha->pcidev->irq, ha);
7257 return ips_abort_init(ha, index);
7263 MODULE_LICENSE("GPL");
7264 MODULE_DESCRIPTION("IBM ServeRAID Adapter Driver " IPS_VER_STRING);
7265 MODULE_VERSION(IPS_VER_STRING);
7269 * Overrides for Emacs so that we almost follow Linus's tabbing style.
7270 * Emacs will notice this stuff at the end of the file and automatically
7271 * adjust the settings for this buffer only. This must remain at the end
7273 * ---------------------------------------------------------------------------
7276 * c-brace-imaginary-offset: 0
7277 * c-brace-offset: -2
7278 * c-argdecl-indent: 2
7279 * c-label-offset: -2
7280 * c-continued-statement-offset: 2
7281 * c-continued-brace-offset: 0
7282 * indent-tabs-mode: nil