1 #define ASC_VERSION "3.4" /* AdvanSys Driver Version */
4 * advansys.c - Linux Host Driver for AdvanSys SCSI Adapters
6 * Copyright (c) 1995-2000 Advanced System Products, Inc.
7 * Copyright (c) 2000-2001 ConnectCom Solutions, Inc.
8 * Copyright (c) 2007 Matthew Wilcox <matthew@wil.cx>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
18 * As of March 8, 2000 Advanced System Products, Inc. (AdvanSys)
19 * changed its name to ConnectCom Solutions, Inc.
20 * On June 18, 2001 Initio Corp. acquired ConnectCom's SCSI assets
23 #include <linux/module.h>
24 #include <linux/string.h>
25 #include <linux/kernel.h>
26 #include <linux/types.h>
27 #include <linux/ioport.h>
28 #include <linux/interrupt.h>
29 #include <linux/delay.h>
30 #include <linux/slab.h>
32 #include <linux/proc_fs.h>
33 #include <linux/init.h>
34 #include <linux/blkdev.h>
35 #include <linux/isa.h>
36 #include <linux/eisa.h>
37 #include <linux/pci.h>
38 #include <linux/spinlock.h>
39 #include <linux/dma-mapping.h>
42 #include <asm/system.h>
45 #include <scsi/scsi_cmnd.h>
46 #include <scsi/scsi_device.h>
47 #include <scsi/scsi_tcq.h>
48 #include <scsi/scsi.h>
49 #include <scsi/scsi_host.h>
53 * 1. Although all of the necessary command mapping places have the
54 * appropriate dma_map.. APIs, the driver still processes its internal
55 * queue using bus_to_virt() and virt_to_bus() which are illegal under
56 * the API. The entire queue processing structure will need to be
57 * altered to fix this.
58 * 2. Need to add memory mapping workaround. Test the memory mapping.
59 * If it doesn't work revert to I/O port access. Can a test be done
61 * 3. Handle an interrupt not working. Keep an interrupt counter in
62 * the interrupt handler. In the timeout function if the interrupt
63 * has not occurred then print a message and run in polled mode.
64 * 4. Need to add support for target mode commands, cf. CAM XPT.
65 * 5. check DMA mapping functions for failure
66 * 6. Use scsi_transport_spi
67 * 7. advansys_info is not safe against multiple simultaneous callers
69 * 9. Add module_param to override ISA/VLB ioport array
71 #warning this driver is still not properly converted to the DMA API
73 /* Enable driver assertions. */
74 #define ADVANSYS_ASSERT
76 /* Enable driver /proc statistics. */
77 #define ADVANSYS_STATS
79 /* Enable driver tracing. */
80 /* #define ADVANSYS_DEBUG */
83 * --- Asc Library Constants and Macros
86 #define ASC_LIB_VERSION_MAJOR 1
87 #define ASC_LIB_VERSION_MINOR 24
88 #define ASC_LIB_SERIAL_NUMBER 123
93 * Any instance where a 32-bit long or pointer type is assumed
94 * for precision or HW defined structures, the following define
95 * types must be used. In Linux the char, short, and int types
96 * are all consistent at 8, 16, and 32 bits respectively. Pointers
97 * and long types are 64 bits on Alpha and UltraSPARC.
99 #define ASC_PADDR __u32 /* Physical/Bus address data type. */
100 #define ASC_VADDR __u32 /* Virtual address data type. */
101 #define ASC_DCNT __u32 /* Unsigned Data count type. */
102 #define ASC_SDCNT __s32 /* Signed Data count type. */
105 * These macros are used to convert a virtual address to a
106 * 32-bit value. This currently can be used on Linux Alpha
107 * which uses 64-bit virtual address but a 32-bit bus address.
108 * This is likely to break in the future, but doing this now
109 * will give us time to change the HW and FW to handle 64-bit
112 #define ASC_VADDR_TO_U32 virt_to_bus
113 #define ASC_U32_TO_VADDR bus_to_virt
115 typedef unsigned char uchar;
126 #define UW_ERR (uint)(0xFFFF)
127 #define isodd_word(val) ((((uint)val) & (uint)0x0001) != 0)
129 #define ASC_DVCLIB_CALL_DONE (1)
130 #define ASC_DVCLIB_CALL_FAILED (0)
131 #define ASC_DVCLIB_CALL_ERROR (-1)
133 #define PCI_VENDOR_ID_ASP 0x10cd
134 #define PCI_DEVICE_ID_ASP_1200A 0x1100
135 #define PCI_DEVICE_ID_ASP_ABP940 0x1200
136 #define PCI_DEVICE_ID_ASP_ABP940U 0x1300
137 #define PCI_DEVICE_ID_ASP_ABP940UW 0x2300
138 #define PCI_DEVICE_ID_38C0800_REV1 0x2500
139 #define PCI_DEVICE_ID_38C1600_REV1 0x2700
142 * Enable CC_VERY_LONG_SG_LIST to support up to 64K element SG lists.
143 * The SRB structure will have to be changed and the ASC_SRB2SCSIQ()
144 * macro re-defined to be able to obtain a ASC_SCSI_Q pointer from the
147 #define CC_VERY_LONG_SG_LIST 0
148 #define ASC_SRB2SCSIQ(srb_ptr) (srb_ptr)
150 #define PortAddr unsigned short /* port address size */
151 #define inp(port) inb(port)
152 #define outp(port, byte) outb((byte), (port))
154 #define inpw(port) inw(port)
155 #define outpw(port, word) outw((word), (port))
157 #define ASC_MAX_SG_QUEUE 7
158 #define ASC_MAX_SG_LIST 255
160 #define ASC_CS_TYPE unsigned short
162 #define ASC_IS_ISA (0x0001)
163 #define ASC_IS_ISAPNP (0x0081)
164 #define ASC_IS_EISA (0x0002)
165 #define ASC_IS_PCI (0x0004)
166 #define ASC_IS_PCI_ULTRA (0x0104)
167 #define ASC_IS_PCMCIA (0x0008)
168 #define ASC_IS_MCA (0x0020)
169 #define ASC_IS_VL (0x0040)
170 #define ASC_ISA_PNP_PORT_ADDR (0x279)
171 #define ASC_ISA_PNP_PORT_WRITE (ASC_ISA_PNP_PORT_ADDR+0x800)
172 #define ASC_IS_WIDESCSI_16 (0x0100)
173 #define ASC_IS_WIDESCSI_32 (0x0200)
174 #define ASC_IS_BIG_ENDIAN (0x8000)
175 #define ASC_CHIP_MIN_VER_VL (0x01)
176 #define ASC_CHIP_MAX_VER_VL (0x07)
177 #define ASC_CHIP_MIN_VER_PCI (0x09)
178 #define ASC_CHIP_MAX_VER_PCI (0x0F)
179 #define ASC_CHIP_VER_PCI_BIT (0x08)
180 #define ASC_CHIP_MIN_VER_ISA (0x11)
181 #define ASC_CHIP_MIN_VER_ISA_PNP (0x21)
182 #define ASC_CHIP_MAX_VER_ISA (0x27)
183 #define ASC_CHIP_VER_ISA_BIT (0x30)
184 #define ASC_CHIP_VER_ISAPNP_BIT (0x20)
185 #define ASC_CHIP_VER_ASYN_BUG (0x21)
186 #define ASC_CHIP_VER_PCI 0x08
187 #define ASC_CHIP_VER_PCI_ULTRA_3150 (ASC_CHIP_VER_PCI | 0x02)
188 #define ASC_CHIP_VER_PCI_ULTRA_3050 (ASC_CHIP_VER_PCI | 0x03)
189 #define ASC_CHIP_MIN_VER_EISA (0x41)
190 #define ASC_CHIP_MAX_VER_EISA (0x47)
191 #define ASC_CHIP_VER_EISA_BIT (0x40)
192 #define ASC_CHIP_LATEST_VER_EISA ((ASC_CHIP_MIN_VER_EISA - 1) + 3)
193 #define ASC_MAX_LIB_SUPPORTED_ISA_CHIP_VER 0x21
194 #define ASC_MAX_LIB_SUPPORTED_PCI_CHIP_VER 0x0A
195 #define ASC_MAX_VL_DMA_ADDR (0x07FFFFFFL)
196 #define ASC_MAX_VL_DMA_COUNT (0x07FFFFFFL)
197 #define ASC_MAX_PCI_DMA_ADDR (0xFFFFFFFFL)
198 #define ASC_MAX_PCI_DMA_COUNT (0xFFFFFFFFL)
199 #define ASC_MAX_ISA_DMA_ADDR (0x00FFFFFFL)
200 #define ASC_MAX_ISA_DMA_COUNT (0x00FFFFFFL)
201 #define ASC_MAX_EISA_DMA_ADDR (0x07FFFFFFL)
202 #define ASC_MAX_EISA_DMA_COUNT (0x07FFFFFFL)
204 #define ASC_SCSI_ID_BITS 3
205 #define ASC_SCSI_TIX_TYPE uchar
206 #define ASC_ALL_DEVICE_BIT_SET 0xFF
207 #define ASC_SCSI_BIT_ID_TYPE uchar
208 #define ASC_MAX_TID 7
209 #define ASC_MAX_LUN 7
210 #define ASC_SCSI_WIDTH_BIT_SET 0xFF
211 #define ASC_MAX_SENSE_LEN 32
212 #define ASC_MIN_SENSE_LEN 14
213 #define ASC_SCSI_RESET_HOLD_TIME_US 60
216 * Narrow boards only support 12-byte commands, while wide boards
217 * extend to 16-byte commands.
219 #define ASC_MAX_CDB_LEN 12
220 #define ADV_MAX_CDB_LEN 16
223 * Inquiry SPC-2 SPI Byte 1 EVPD (Enable Vital Product Data)
224 * and CmdDt (Command Support Data) field bit definitions.
226 #define ADV_INQ_RTN_VPD_AND_CMDDT 0x3
227 #define ADV_INQ_RTN_CMDDT_FOR_OP_CODE 0x2
228 #define ADV_INQ_RTN_VPD_FOR_PG_CODE 0x1
229 #define ADV_INQ_RTN_STD_INQUIRY_DATA 0x0
231 #define ASC_SCSIDIR_NOCHK 0x00
232 #define ASC_SCSIDIR_T2H 0x08
233 #define ASC_SCSIDIR_H2T 0x10
234 #define ASC_SCSIDIR_NODATA 0x18
235 #define SCSI_ASC_NOMEDIA 0x3A
236 #define ASC_SRB_HOST(x) ((uchar)((uchar)(x) >> 4))
237 #define ASC_SRB_TID(x) ((uchar)((uchar)(x) & (uchar)0x0F))
238 #define ASC_SRB_LUN(x) ((uchar)((uint)(x) >> 13))
239 #define PUT_CDB1(x) ((uchar)((uint)(x) >> 8))
240 #define MS_SDTR_LEN 0x03
241 #define MS_WDTR_LEN 0x02
243 #define ASC_SG_LIST_PER_Q 7
245 #define QS_READY 0x01
246 #define QS_DISC1 0x02
247 #define QS_DISC2 0x04
249 #define QS_ABORTED 0x40
251 #define QC_NO_CALLBACK 0x01
252 #define QC_SG_SWAP_QUEUE 0x02
253 #define QC_SG_HEAD 0x04
254 #define QC_DATA_IN 0x08
255 #define QC_DATA_OUT 0x10
256 #define QC_URGENT 0x20
257 #define QC_MSG_OUT 0x40
258 #define QC_REQ_SENSE 0x80
259 #define QCSG_SG_XFER_LIST 0x02
260 #define QCSG_SG_XFER_MORE 0x04
261 #define QCSG_SG_XFER_END 0x08
262 #define QD_IN_PROGRESS 0x00
263 #define QD_NO_ERROR 0x01
264 #define QD_ABORTED_BY_HOST 0x02
265 #define QD_WITH_ERROR 0x04
266 #define QD_INVALID_REQUEST 0x80
267 #define QD_INVALID_HOST_NUM 0x81
268 #define QD_INVALID_DEVICE 0x82
269 #define QD_ERR_INTERNAL 0xFF
270 #define QHSTA_NO_ERROR 0x00
271 #define QHSTA_M_SEL_TIMEOUT 0x11
272 #define QHSTA_M_DATA_OVER_RUN 0x12
273 #define QHSTA_M_DATA_UNDER_RUN 0x12
274 #define QHSTA_M_UNEXPECTED_BUS_FREE 0x13
275 #define QHSTA_M_BAD_BUS_PHASE_SEQ 0x14
276 #define QHSTA_D_QDONE_SG_LIST_CORRUPTED 0x21
277 #define QHSTA_D_ASC_DVC_ERROR_CODE_SET 0x22
278 #define QHSTA_D_HOST_ABORT_FAILED 0x23
279 #define QHSTA_D_EXE_SCSI_Q_FAILED 0x24
280 #define QHSTA_D_EXE_SCSI_Q_BUSY_TIMEOUT 0x25
281 #define QHSTA_D_ASPI_NO_BUF_POOL 0x26
282 #define QHSTA_M_WTM_TIMEOUT 0x41
283 #define QHSTA_M_BAD_CMPL_STATUS_IN 0x42
284 #define QHSTA_M_NO_AUTO_REQ_SENSE 0x43
285 #define QHSTA_M_AUTO_REQ_SENSE_FAIL 0x44
286 #define QHSTA_M_TARGET_STATUS_BUSY 0x45
287 #define QHSTA_M_BAD_TAG_CODE 0x46
288 #define QHSTA_M_BAD_QUEUE_FULL_OR_BUSY 0x47
289 #define QHSTA_M_HUNG_REQ_SCSI_BUS_RESET 0x48
290 #define QHSTA_D_LRAM_CMP_ERROR 0x81
291 #define QHSTA_M_MICRO_CODE_ERROR_HALT 0xA1
292 #define ASC_FLAG_SCSIQ_REQ 0x01
293 #define ASC_FLAG_BIOS_SCSIQ_REQ 0x02
294 #define ASC_FLAG_BIOS_ASYNC_IO 0x04
295 #define ASC_FLAG_SRB_LINEAR_ADDR 0x08
296 #define ASC_FLAG_WIN16 0x10
297 #define ASC_FLAG_WIN32 0x20
298 #define ASC_FLAG_ISA_OVER_16MB 0x40
299 #define ASC_FLAG_DOS_VM_CALLBACK 0x80
300 #define ASC_TAG_FLAG_EXTRA_BYTES 0x10
301 #define ASC_TAG_FLAG_DISABLE_DISCONNECT 0x04
302 #define ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX 0x08
303 #define ASC_TAG_FLAG_DISABLE_CHK_COND_INT_HOST 0x40
304 #define ASC_SCSIQ_CPY_BEG 4
305 #define ASC_SCSIQ_SGHD_CPY_BEG 2
306 #define ASC_SCSIQ_B_FWD 0
307 #define ASC_SCSIQ_B_BWD 1
308 #define ASC_SCSIQ_B_STATUS 2
309 #define ASC_SCSIQ_B_QNO 3
310 #define ASC_SCSIQ_B_CNTL 4
311 #define ASC_SCSIQ_B_SG_QUEUE_CNT 5
312 #define ASC_SCSIQ_D_DATA_ADDR 8
313 #define ASC_SCSIQ_D_DATA_CNT 12
314 #define ASC_SCSIQ_B_SENSE_LEN 20
315 #define ASC_SCSIQ_DONE_INFO_BEG 22
316 #define ASC_SCSIQ_D_SRBPTR 22
317 #define ASC_SCSIQ_B_TARGET_IX 26
318 #define ASC_SCSIQ_B_CDB_LEN 28
319 #define ASC_SCSIQ_B_TAG_CODE 29
320 #define ASC_SCSIQ_W_VM_ID 30
321 #define ASC_SCSIQ_DONE_STATUS 32
322 #define ASC_SCSIQ_HOST_STATUS 33
323 #define ASC_SCSIQ_SCSI_STATUS 34
324 #define ASC_SCSIQ_CDB_BEG 36
325 #define ASC_SCSIQ_DW_REMAIN_XFER_ADDR 56
326 #define ASC_SCSIQ_DW_REMAIN_XFER_CNT 60
327 #define ASC_SCSIQ_B_FIRST_SG_WK_QP 48
328 #define ASC_SCSIQ_B_SG_WK_QP 49
329 #define ASC_SCSIQ_B_SG_WK_IX 50
330 #define ASC_SCSIQ_W_ALT_DC1 52
331 #define ASC_SCSIQ_B_LIST_CNT 6
332 #define ASC_SCSIQ_B_CUR_LIST_CNT 7
333 #define ASC_SGQ_B_SG_CNTL 4
334 #define ASC_SGQ_B_SG_HEAD_QP 5
335 #define ASC_SGQ_B_SG_LIST_CNT 6
336 #define ASC_SGQ_B_SG_CUR_LIST_CNT 7
337 #define ASC_SGQ_LIST_BEG 8
338 #define ASC_DEF_SCSI1_QNG 4
339 #define ASC_MAX_SCSI1_QNG 4
340 #define ASC_DEF_SCSI2_QNG 16
341 #define ASC_MAX_SCSI2_QNG 32
342 #define ASC_TAG_CODE_MASK 0x23
343 #define ASC_STOP_REQ_RISC_STOP 0x01
344 #define ASC_STOP_ACK_RISC_STOP 0x03
345 #define ASC_STOP_CLEAN_UP_BUSY_Q 0x10
346 #define ASC_STOP_CLEAN_UP_DISC_Q 0x20
347 #define ASC_STOP_HOST_REQ_RISC_HALT 0x40
348 #define ASC_TIDLUN_TO_IX(tid, lun) (ASC_SCSI_TIX_TYPE)((tid) + ((lun)<<ASC_SCSI_ID_BITS))
349 #define ASC_TID_TO_TARGET_ID(tid) (ASC_SCSI_BIT_ID_TYPE)(0x01 << (tid))
350 #define ASC_TIX_TO_TARGET_ID(tix) (0x01 << ((tix) & ASC_MAX_TID))
351 #define ASC_TIX_TO_TID(tix) ((tix) & ASC_MAX_TID)
352 #define ASC_TID_TO_TIX(tid) ((tid) & ASC_MAX_TID)
353 #define ASC_TIX_TO_LUN(tix) (((tix) >> ASC_SCSI_ID_BITS) & ASC_MAX_LUN)
354 #define ASC_QNO_TO_QADDR(q_no) ((ASC_QADR_BEG)+((int)(q_no) << 6))
356 typedef struct asc_scsiq_1 {
365 ASC_PADDR sense_addr;
370 typedef struct asc_scsiq_2 {
379 typedef struct asc_scsiq_3 {
386 typedef struct asc_scsiq_4 {
387 uchar cdb[ASC_MAX_CDB_LEN];
388 uchar y_first_sg_list_qp;
389 uchar y_working_sg_qp;
390 uchar y_working_sg_ix;
393 ushort x_reconnect_rtn;
394 ASC_PADDR x_saved_data_addr;
395 ASC_DCNT x_saved_data_cnt;
398 typedef struct asc_q_done_info {
407 ASC_DCNT remain_bytes;
410 typedef struct asc_sg_list {
415 typedef struct asc_sg_head {
418 ushort entry_to_copy;
420 ASC_SG_LIST sg_list[ASC_MAX_SG_LIST];
423 #define ASC_MIN_SG_LIST 2
425 typedef struct asc_min_sg_head {
428 ushort entry_to_copy;
430 ASC_SG_LIST sg_list[ASC_MIN_SG_LIST];
433 #define QCX_SORT (0x0001)
434 #define QCX_COALEASE (0x0002)
436 typedef struct asc_scsi_q {
440 ASC_SG_HEAD *sg_head;
441 ushort remain_sg_entry_cnt;
442 ushort next_sg_index;
445 typedef struct asc_scsi_req_q {
449 ASC_SG_HEAD *sg_head;
452 uchar cdb[ASC_MAX_CDB_LEN];
453 uchar sense[ASC_MIN_SENSE_LEN];
456 typedef struct asc_scsi_bios_req_q {
460 ASC_SG_HEAD *sg_head;
463 uchar cdb[ASC_MAX_CDB_LEN];
464 uchar sense[ASC_MIN_SENSE_LEN];
465 } ASC_SCSI_BIOS_REQ_Q;
467 typedef struct asc_risc_q {
476 typedef struct asc_sg_list_q {
482 uchar sg_cur_list_cnt;
485 typedef struct asc_risc_sg_list_q {
489 ASC_SG_LIST sg_list[7];
490 } ASC_RISC_SG_LIST_Q;
492 #define ASC_EXE_SCSI_IO_MAX_IDLE_LOOP 0x1000000UL
493 #define ASC_EXE_SCSI_IO_MAX_WAIT_LOOP 1024
494 #define ASCQ_ERR_NO_ERROR 0
495 #define ASCQ_ERR_IO_NOT_FOUND 1
496 #define ASCQ_ERR_LOCAL_MEM 2
497 #define ASCQ_ERR_CHKSUM 3
498 #define ASCQ_ERR_START_CHIP 4
499 #define ASCQ_ERR_INT_TARGET_ID 5
500 #define ASCQ_ERR_INT_LOCAL_MEM 6
501 #define ASCQ_ERR_HALT_RISC 7
502 #define ASCQ_ERR_GET_ASPI_ENTRY 8
503 #define ASCQ_ERR_CLOSE_ASPI 9
504 #define ASCQ_ERR_HOST_INQUIRY 0x0A
505 #define ASCQ_ERR_SAVED_SRB_BAD 0x0B
506 #define ASCQ_ERR_QCNTL_SG_LIST 0x0C
507 #define ASCQ_ERR_Q_STATUS 0x0D
508 #define ASCQ_ERR_WR_SCSIQ 0x0E
509 #define ASCQ_ERR_PC_ADDR 0x0F
510 #define ASCQ_ERR_SYN_OFFSET 0x10
511 #define ASCQ_ERR_SYN_XFER_TIME 0x11
512 #define ASCQ_ERR_LOCK_DMA 0x12
513 #define ASCQ_ERR_UNLOCK_DMA 0x13
514 #define ASCQ_ERR_VDS_CHK_INSTALL 0x14
515 #define ASCQ_ERR_MICRO_CODE_HALT 0x15
516 #define ASCQ_ERR_SET_LRAM_ADDR 0x16
517 #define ASCQ_ERR_CUR_QNG 0x17
518 #define ASCQ_ERR_SG_Q_LINKS 0x18
519 #define ASCQ_ERR_SCSIQ_PTR 0x19
520 #define ASCQ_ERR_ISR_RE_ENTRY 0x1A
521 #define ASCQ_ERR_CRITICAL_RE_ENTRY 0x1B
522 #define ASCQ_ERR_ISR_ON_CRITICAL 0x1C
523 #define ASCQ_ERR_SG_LIST_ODD_ADDRESS 0x1D
524 #define ASCQ_ERR_XFER_ADDRESS_TOO_BIG 0x1E
525 #define ASCQ_ERR_SCSIQ_NULL_PTR 0x1F
526 #define ASCQ_ERR_SCSIQ_BAD_NEXT_PTR 0x20
527 #define ASCQ_ERR_GET_NUM_OF_FREE_Q 0x21
528 #define ASCQ_ERR_SEND_SCSI_Q 0x22
529 #define ASCQ_ERR_HOST_REQ_RISC_HALT 0x23
530 #define ASCQ_ERR_RESET_SDTR 0x24
533 * Warning code values are set in ASC_DVC_VAR 'warn_code'.
535 #define ASC_WARN_NO_ERROR 0x0000
536 #define ASC_WARN_IO_PORT_ROTATE 0x0001
537 #define ASC_WARN_EEPROM_CHKSUM 0x0002
538 #define ASC_WARN_IRQ_MODIFIED 0x0004
539 #define ASC_WARN_AUTO_CONFIG 0x0008
540 #define ASC_WARN_CMD_QNG_CONFLICT 0x0010
541 #define ASC_WARN_EEPROM_RECOVER 0x0020
542 #define ASC_WARN_CFG_MSW_RECOVER 0x0040
543 #define ASC_WARN_SET_PCI_CONFIG_SPACE 0x0080
546 * Error code values are set in ASC_DVC_VAR 'err_code'.
548 #define ASC_IERR_WRITE_EEPROM 0x0001
549 #define ASC_IERR_MCODE_CHKSUM 0x0002
550 #define ASC_IERR_SET_PC_ADDR 0x0004
551 #define ASC_IERR_START_STOP_CHIP 0x0008
552 #define ASC_IERR_IRQ_NO 0x0010
553 #define ASC_IERR_SET_IRQ_NO 0x0020
554 #define ASC_IERR_CHIP_VERSION 0x0040
555 #define ASC_IERR_SET_SCSI_ID 0x0080
556 #define ASC_IERR_GET_PHY_ADDR 0x0100
557 #define ASC_IERR_BAD_SIGNATURE 0x0200
558 #define ASC_IERR_NO_BUS_TYPE 0x0400
559 #define ASC_IERR_SCAM 0x0800
560 #define ASC_IERR_SET_SDTR 0x1000
561 #define ASC_IERR_RW_LRAM 0x8000
563 #define ASC_DEF_IRQ_NO 10
564 #define ASC_MAX_IRQ_NO 15
565 #define ASC_MIN_IRQ_NO 10
566 #define ASC_MIN_REMAIN_Q (0x02)
567 #define ASC_DEF_MAX_TOTAL_QNG (0xF0)
568 #define ASC_MIN_TAG_Q_PER_DVC (0x04)
569 #define ASC_DEF_TAG_Q_PER_DVC (0x04)
570 #define ASC_MIN_FREE_Q ASC_MIN_REMAIN_Q
571 #define ASC_MIN_TOTAL_QNG ((ASC_MAX_SG_QUEUE)+(ASC_MIN_FREE_Q))
572 #define ASC_MAX_TOTAL_QNG 240
573 #define ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG 16
574 #define ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG 8
575 #define ASC_MAX_PCI_INRAM_TOTAL_QNG 20
576 #define ASC_MAX_INRAM_TAG_QNG 16
577 #define ASC_IOADR_TABLE_MAX_IX 11
578 #define ASC_IOADR_GAP 0x10
579 #define ASC_LIB_SCSIQ_WK_SP 256
580 #define ASC_MAX_SYN_XFER_NO 16
581 #define ASC_SYN_MAX_OFFSET 0x0F
582 #define ASC_DEF_SDTR_OFFSET 0x0F
583 #define ASC_DEF_SDTR_INDEX 0x00
584 #define ASC_SDTR_ULTRA_PCI_10MB_INDEX 0x02
585 #define SYN_XFER_NS_0 25
586 #define SYN_XFER_NS_1 30
587 #define SYN_XFER_NS_2 35
588 #define SYN_XFER_NS_3 40
589 #define SYN_XFER_NS_4 50
590 #define SYN_XFER_NS_5 60
591 #define SYN_XFER_NS_6 70
592 #define SYN_XFER_NS_7 85
593 #define SYN_ULTRA_XFER_NS_0 12
594 #define SYN_ULTRA_XFER_NS_1 19
595 #define SYN_ULTRA_XFER_NS_2 25
596 #define SYN_ULTRA_XFER_NS_3 32
597 #define SYN_ULTRA_XFER_NS_4 38
598 #define SYN_ULTRA_XFER_NS_5 44
599 #define SYN_ULTRA_XFER_NS_6 50
600 #define SYN_ULTRA_XFER_NS_7 57
601 #define SYN_ULTRA_XFER_NS_8 63
602 #define SYN_ULTRA_XFER_NS_9 69
603 #define SYN_ULTRA_XFER_NS_10 75
604 #define SYN_ULTRA_XFER_NS_11 82
605 #define SYN_ULTRA_XFER_NS_12 88
606 #define SYN_ULTRA_XFER_NS_13 94
607 #define SYN_ULTRA_XFER_NS_14 100
608 #define SYN_ULTRA_XFER_NS_15 107
610 typedef struct ext_msg {
616 uchar sdtr_xfer_period;
617 uchar sdtr_req_ack_offset;
632 #define xfer_period u_ext_msg.sdtr.sdtr_xfer_period
633 #define req_ack_offset u_ext_msg.sdtr.sdtr_req_ack_offset
634 #define wdtr_width u_ext_msg.wdtr.wdtr_width
635 #define mdp_b3 u_ext_msg.mdp_b3
636 #define mdp_b2 u_ext_msg.mdp_b2
637 #define mdp_b1 u_ext_msg.mdp_b1
638 #define mdp_b0 u_ext_msg.mdp_b0
640 typedef struct asc_dvc_cfg {
641 ASC_SCSI_BIT_ID_TYPE can_tagged_qng;
642 ASC_SCSI_BIT_ID_TYPE cmd_qng_enabled;
643 ASC_SCSI_BIT_ID_TYPE disc_enable;
644 ASC_SCSI_BIT_ID_TYPE sdtr_enable;
647 uchar isa_dma_channel;
649 ushort lib_serial_no;
652 ushort mcode_version;
653 uchar max_tag_qng[ASC_MAX_TID + 1];
655 uchar sdtr_period_offset[ASC_MAX_TID + 1];
656 uchar adapter_info[6];
659 #define ASC_DEF_DVC_CNTL 0xFFFF
660 #define ASC_DEF_CHIP_SCSI_ID 7
661 #define ASC_DEF_ISA_DMA_SPEED 4
662 #define ASC_INIT_STATE_NULL 0x0000
663 #define ASC_INIT_STATE_BEG_GET_CFG 0x0001
664 #define ASC_INIT_STATE_END_GET_CFG 0x0002
665 #define ASC_INIT_STATE_BEG_SET_CFG 0x0004
666 #define ASC_INIT_STATE_END_SET_CFG 0x0008
667 #define ASC_INIT_STATE_BEG_LOAD_MC 0x0010
668 #define ASC_INIT_STATE_END_LOAD_MC 0x0020
669 #define ASC_INIT_STATE_BEG_INQUIRY 0x0040
670 #define ASC_INIT_STATE_END_INQUIRY 0x0080
671 #define ASC_INIT_RESET_SCSI_DONE 0x0100
672 #define ASC_INIT_STATE_WITHOUT_EEP 0x8000
673 #define ASC_BUG_FIX_IF_NOT_DWB 0x0001
674 #define ASC_BUG_FIX_ASYN_USE_SYN 0x0002
675 #define ASYN_SDTR_DATA_FIX_PCI_REV_AB 0x41
676 #define ASC_MIN_TAGGED_CMD 7
677 #define ASC_MAX_SCSI_RESET_WAIT 30
679 struct asc_dvc_var; /* Forward Declaration. */
681 typedef struct asc_dvc_var {
687 ASC_SCSI_BIT_ID_TYPE init_sdtr;
688 ASC_SCSI_BIT_ID_TYPE sdtr_done;
689 ASC_SCSI_BIT_ID_TYPE use_tagged_qng;
690 ASC_SCSI_BIT_ID_TYPE unit_not_ready;
691 ASC_SCSI_BIT_ID_TYPE queue_full_or_busy;
692 ASC_SCSI_BIT_ID_TYPE start_motor;
693 uchar scsi_reset_wait;
698 uchar in_critical_cnt;
700 uchar last_q_shortage;
702 uchar cur_dvc_qng[ASC_MAX_TID + 1];
703 uchar max_dvc_qng[ASC_MAX_TID + 1];
704 ASC_SCSI_Q *scsiq_busy_head[ASC_MAX_TID + 1];
705 ASC_SCSI_Q *scsiq_busy_tail[ASC_MAX_TID + 1];
706 uchar sdtr_period_tbl[ASC_MAX_SYN_XFER_NO];
708 ASC_SCSI_BIT_ID_TYPE pci_fix_asyn_xfer_always;
711 uchar dos_int13_table[ASC_MAX_TID + 1];
712 ASC_DCNT max_dma_count;
713 ASC_SCSI_BIT_ID_TYPE no_scam;
714 ASC_SCSI_BIT_ID_TYPE pci_fix_asyn_xfer;
715 uchar max_sdtr_index;
716 uchar host_init_sdtr_index;
717 struct asc_board *drv_ptr;
721 typedef struct asc_dvc_inq_info {
722 uchar type[ASC_MAX_TID + 1][ASC_MAX_LUN + 1];
725 typedef struct asc_cap_info {
730 typedef struct asc_cap_info_array {
731 ASC_CAP_INFO cap_info[ASC_MAX_TID + 1][ASC_MAX_LUN + 1];
732 } ASC_CAP_INFO_ARRAY;
734 #define ASC_MCNTL_NO_SEL_TIMEOUT (ushort)0x0001
735 #define ASC_MCNTL_NULL_TARGET (ushort)0x0002
736 #define ASC_CNTL_INITIATOR (ushort)0x0001
737 #define ASC_CNTL_BIOS_GT_1GB (ushort)0x0002
738 #define ASC_CNTL_BIOS_GT_2_DISK (ushort)0x0004
739 #define ASC_CNTL_BIOS_REMOVABLE (ushort)0x0008
740 #define ASC_CNTL_NO_SCAM (ushort)0x0010
741 #define ASC_CNTL_INT_MULTI_Q (ushort)0x0080
742 #define ASC_CNTL_NO_LUN_SUPPORT (ushort)0x0040
743 #define ASC_CNTL_NO_VERIFY_COPY (ushort)0x0100
744 #define ASC_CNTL_RESET_SCSI (ushort)0x0200
745 #define ASC_CNTL_INIT_INQUIRY (ushort)0x0400
746 #define ASC_CNTL_INIT_VERBOSE (ushort)0x0800
747 #define ASC_CNTL_SCSI_PARITY (ushort)0x1000
748 #define ASC_CNTL_BURST_MODE (ushort)0x2000
749 #define ASC_CNTL_SDTR_ENABLE_ULTRA (ushort)0x4000
750 #define ASC_EEP_DVC_CFG_BEG_VL 2
751 #define ASC_EEP_MAX_DVC_ADDR_VL 15
752 #define ASC_EEP_DVC_CFG_BEG 32
753 #define ASC_EEP_MAX_DVC_ADDR 45
754 #define ASC_EEP_DEFINED_WORDS 10
755 #define ASC_EEP_MAX_ADDR 63
756 #define ASC_EEP_RES_WORDS 0
757 #define ASC_EEP_MAX_RETRY 20
758 #define ASC_MAX_INIT_BUSY_RETRY 8
759 #define ASC_EEP_ISA_PNP_WSIZE 16
762 * These macros keep the chip SCSI id and ISA DMA speed
763 * bitfields in board order. C bitfields aren't portable
764 * between big and little-endian platforms so they are
768 #define ASC_EEP_GET_CHIP_ID(cfg) ((cfg)->id_speed & 0x0f)
769 #define ASC_EEP_GET_DMA_SPD(cfg) (((cfg)->id_speed & 0xf0) >> 4)
770 #define ASC_EEP_SET_CHIP_ID(cfg, sid) \
771 ((cfg)->id_speed = ((cfg)->id_speed & 0xf0) | ((sid) & ASC_MAX_TID))
772 #define ASC_EEP_SET_DMA_SPD(cfg, spd) \
773 ((cfg)->id_speed = ((cfg)->id_speed & 0x0f) | ((spd) & 0x0f) << 4)
775 typedef struct asceep_config {
787 uchar id_speed; /* low order 4 bits is chip scsi id */
788 /* high order 4 bits is isa dma speed */
789 uchar dos_int13_table[ASC_MAX_TID + 1];
790 uchar adapter_info[6];
795 #define ASC_PCI_CFG_LSW_SCSI_PARITY 0x0800
796 #define ASC_PCI_CFG_LSW_BURST_MODE 0x0080
797 #define ASC_PCI_CFG_LSW_INTR_ABLE 0x0020
799 #define ASC_EEP_CMD_READ 0x80
800 #define ASC_EEP_CMD_WRITE 0x40
801 #define ASC_EEP_CMD_WRITE_ABLE 0x30
802 #define ASC_EEP_CMD_WRITE_DISABLE 0x00
803 #define ASC_OVERRUN_BSIZE 0x00000048UL
804 #define ASC_CTRL_BREAK_ONCE 0x0001
805 #define ASC_CTRL_BREAK_STAY_IDLE 0x0002
806 #define ASCV_MSGOUT_BEG 0x0000
807 #define ASCV_MSGOUT_SDTR_PERIOD (ASCV_MSGOUT_BEG+3)
808 #define ASCV_MSGOUT_SDTR_OFFSET (ASCV_MSGOUT_BEG+4)
809 #define ASCV_BREAK_SAVED_CODE (ushort)0x0006
810 #define ASCV_MSGIN_BEG (ASCV_MSGOUT_BEG+8)
811 #define ASCV_MSGIN_SDTR_PERIOD (ASCV_MSGIN_BEG+3)
812 #define ASCV_MSGIN_SDTR_OFFSET (ASCV_MSGIN_BEG+4)
813 #define ASCV_SDTR_DATA_BEG (ASCV_MSGIN_BEG+8)
814 #define ASCV_SDTR_DONE_BEG (ASCV_SDTR_DATA_BEG+8)
815 #define ASCV_MAX_DVC_QNG_BEG (ushort)0x0020
816 #define ASCV_BREAK_ADDR (ushort)0x0028
817 #define ASCV_BREAK_NOTIFY_COUNT (ushort)0x002A
818 #define ASCV_BREAK_CONTROL (ushort)0x002C
819 #define ASCV_BREAK_HIT_COUNT (ushort)0x002E
821 #define ASCV_ASCDVC_ERR_CODE_W (ushort)0x0030
822 #define ASCV_MCODE_CHKSUM_W (ushort)0x0032
823 #define ASCV_MCODE_SIZE_W (ushort)0x0034
824 #define ASCV_STOP_CODE_B (ushort)0x0036
825 #define ASCV_DVC_ERR_CODE_B (ushort)0x0037
826 #define ASCV_OVERRUN_PADDR_D (ushort)0x0038
827 #define ASCV_OVERRUN_BSIZE_D (ushort)0x003C
828 #define ASCV_HALTCODE_W (ushort)0x0040
829 #define ASCV_CHKSUM_W (ushort)0x0042
830 #define ASCV_MC_DATE_W (ushort)0x0044
831 #define ASCV_MC_VER_W (ushort)0x0046
832 #define ASCV_NEXTRDY_B (ushort)0x0048
833 #define ASCV_DONENEXT_B (ushort)0x0049
834 #define ASCV_USE_TAGGED_QNG_B (ushort)0x004A
835 #define ASCV_SCSIBUSY_B (ushort)0x004B
836 #define ASCV_Q_DONE_IN_PROGRESS_B (ushort)0x004C
837 #define ASCV_CURCDB_B (ushort)0x004D
838 #define ASCV_RCLUN_B (ushort)0x004E
839 #define ASCV_BUSY_QHEAD_B (ushort)0x004F
840 #define ASCV_DISC1_QHEAD_B (ushort)0x0050
841 #define ASCV_DISC_ENABLE_B (ushort)0x0052
842 #define ASCV_CAN_TAGGED_QNG_B (ushort)0x0053
843 #define ASCV_HOSTSCSI_ID_B (ushort)0x0055
844 #define ASCV_MCODE_CNTL_B (ushort)0x0056
845 #define ASCV_NULL_TARGET_B (ushort)0x0057
846 #define ASCV_FREE_Q_HEAD_W (ushort)0x0058
847 #define ASCV_DONE_Q_TAIL_W (ushort)0x005A
848 #define ASCV_FREE_Q_HEAD_B (ushort)(ASCV_FREE_Q_HEAD_W+1)
849 #define ASCV_DONE_Q_TAIL_B (ushort)(ASCV_DONE_Q_TAIL_W+1)
850 #define ASCV_HOST_FLAG_B (ushort)0x005D
851 #define ASCV_TOTAL_READY_Q_B (ushort)0x0064
852 #define ASCV_VER_SERIAL_B (ushort)0x0065
853 #define ASCV_HALTCODE_SAVED_W (ushort)0x0066
854 #define ASCV_WTM_FLAG_B (ushort)0x0068
855 #define ASCV_RISC_FLAG_B (ushort)0x006A
856 #define ASCV_REQ_SG_LIST_QP (ushort)0x006B
857 #define ASC_HOST_FLAG_IN_ISR 0x01
858 #define ASC_HOST_FLAG_ACK_INT 0x02
859 #define ASC_RISC_FLAG_GEN_INT 0x01
860 #define ASC_RISC_FLAG_REQ_SG_LIST 0x02
861 #define IOP_CTRL (0x0F)
862 #define IOP_STATUS (0x0E)
863 #define IOP_INT_ACK IOP_STATUS
864 #define IOP_REG_IFC (0x0D)
865 #define IOP_SYN_OFFSET (0x0B)
866 #define IOP_EXTRA_CONTROL (0x0D)
867 #define IOP_REG_PC (0x0C)
868 #define IOP_RAM_ADDR (0x0A)
869 #define IOP_RAM_DATA (0x08)
870 #define IOP_EEP_DATA (0x06)
871 #define IOP_EEP_CMD (0x07)
872 #define IOP_VERSION (0x03)
873 #define IOP_CONFIG_HIGH (0x04)
874 #define IOP_CONFIG_LOW (0x02)
875 #define IOP_SIG_BYTE (0x01)
876 #define IOP_SIG_WORD (0x00)
877 #define IOP_REG_DC1 (0x0E)
878 #define IOP_REG_DC0 (0x0C)
879 #define IOP_REG_SB (0x0B)
880 #define IOP_REG_DA1 (0x0A)
881 #define IOP_REG_DA0 (0x08)
882 #define IOP_REG_SC (0x09)
883 #define IOP_DMA_SPEED (0x07)
884 #define IOP_REG_FLAG (0x07)
885 #define IOP_FIFO_H (0x06)
886 #define IOP_FIFO_L (0x04)
887 #define IOP_REG_ID (0x05)
888 #define IOP_REG_QP (0x03)
889 #define IOP_REG_IH (0x02)
890 #define IOP_REG_IX (0x01)
891 #define IOP_REG_AX (0x00)
892 #define IFC_REG_LOCK (0x00)
893 #define IFC_REG_UNLOCK (0x09)
894 #define IFC_WR_EN_FILTER (0x10)
895 #define IFC_RD_NO_EEPROM (0x10)
896 #define IFC_SLEW_RATE (0x20)
897 #define IFC_ACT_NEG (0x40)
898 #define IFC_INP_FILTER (0x80)
899 #define IFC_INIT_DEFAULT (IFC_ACT_NEG | IFC_REG_UNLOCK)
900 #define SC_SEL (uchar)(0x80)
901 #define SC_BSY (uchar)(0x40)
902 #define SC_ACK (uchar)(0x20)
903 #define SC_REQ (uchar)(0x10)
904 #define SC_ATN (uchar)(0x08)
905 #define SC_IO (uchar)(0x04)
906 #define SC_CD (uchar)(0x02)
907 #define SC_MSG (uchar)(0x01)
908 #define SEC_SCSI_CTL (uchar)(0x80)
909 #define SEC_ACTIVE_NEGATE (uchar)(0x40)
910 #define SEC_SLEW_RATE (uchar)(0x20)
911 #define SEC_ENABLE_FILTER (uchar)(0x10)
912 #define ASC_HALT_EXTMSG_IN (ushort)0x8000
913 #define ASC_HALT_CHK_CONDITION (ushort)0x8100
914 #define ASC_HALT_SS_QUEUE_FULL (ushort)0x8200
915 #define ASC_HALT_DISABLE_ASYN_USE_SYN_FIX (ushort)0x8300
916 #define ASC_HALT_ENABLE_ASYN_USE_SYN_FIX (ushort)0x8400
917 #define ASC_HALT_SDTR_REJECTED (ushort)0x4000
918 #define ASC_HALT_HOST_COPY_SG_LIST_TO_RISC ( ushort )0x2000
919 #define ASC_MAX_QNO 0xF8
920 #define ASC_DATA_SEC_BEG (ushort)0x0080
921 #define ASC_DATA_SEC_END (ushort)0x0080
922 #define ASC_CODE_SEC_BEG (ushort)0x0080
923 #define ASC_CODE_SEC_END (ushort)0x0080
924 #define ASC_QADR_BEG (0x4000)
925 #define ASC_QADR_USED (ushort)(ASC_MAX_QNO * 64)
926 #define ASC_QADR_END (ushort)0x7FFF
927 #define ASC_QLAST_ADR (ushort)0x7FC0
928 #define ASC_QBLK_SIZE 0x40
929 #define ASC_BIOS_DATA_QBEG 0xF8
930 #define ASC_MIN_ACTIVE_QNO 0x01
931 #define ASC_QLINK_END 0xFF
932 #define ASC_EEPROM_WORDS 0x10
933 #define ASC_MAX_MGS_LEN 0x10
934 #define ASC_BIOS_ADDR_DEF 0xDC00
935 #define ASC_BIOS_SIZE 0x3800
936 #define ASC_BIOS_RAM_OFF 0x3800
937 #define ASC_BIOS_RAM_SIZE 0x800
938 #define ASC_BIOS_MIN_ADDR 0xC000
939 #define ASC_BIOS_MAX_ADDR 0xEC00
940 #define ASC_BIOS_BANK_SIZE 0x0400
941 #define ASC_MCODE_START_ADDR 0x0080
942 #define ASC_CFG0_HOST_INT_ON 0x0020
943 #define ASC_CFG0_BIOS_ON 0x0040
944 #define ASC_CFG0_VERA_BURST_ON 0x0080
945 #define ASC_CFG0_SCSI_PARITY_ON 0x0800
946 #define ASC_CFG1_SCSI_TARGET_ON 0x0080
947 #define ASC_CFG1_LRAM_8BITS_ON 0x0800
948 #define ASC_CFG_MSW_CLR_MASK 0x3080
949 #define CSW_TEST1 (ASC_CS_TYPE)0x8000
950 #define CSW_AUTO_CONFIG (ASC_CS_TYPE)0x4000
951 #define CSW_RESERVED1 (ASC_CS_TYPE)0x2000
952 #define CSW_IRQ_WRITTEN (ASC_CS_TYPE)0x1000
953 #define CSW_33MHZ_SELECTED (ASC_CS_TYPE)0x0800
954 #define CSW_TEST2 (ASC_CS_TYPE)0x0400
955 #define CSW_TEST3 (ASC_CS_TYPE)0x0200
956 #define CSW_RESERVED2 (ASC_CS_TYPE)0x0100
957 #define CSW_DMA_DONE (ASC_CS_TYPE)0x0080
958 #define CSW_FIFO_RDY (ASC_CS_TYPE)0x0040
959 #define CSW_EEP_READ_DONE (ASC_CS_TYPE)0x0020
960 #define CSW_HALTED (ASC_CS_TYPE)0x0010
961 #define CSW_SCSI_RESET_ACTIVE (ASC_CS_TYPE)0x0008
962 #define CSW_PARITY_ERR (ASC_CS_TYPE)0x0004
963 #define CSW_SCSI_RESET_LATCH (ASC_CS_TYPE)0x0002
964 #define CSW_INT_PENDING (ASC_CS_TYPE)0x0001
965 #define CIW_CLR_SCSI_RESET_INT (ASC_CS_TYPE)0x1000
966 #define CIW_INT_ACK (ASC_CS_TYPE)0x0100
967 #define CIW_TEST1 (ASC_CS_TYPE)0x0200
968 #define CIW_TEST2 (ASC_CS_TYPE)0x0400
969 #define CIW_SEL_33MHZ (ASC_CS_TYPE)0x0800
970 #define CIW_IRQ_ACT (ASC_CS_TYPE)0x1000
971 #define CC_CHIP_RESET (uchar)0x80
972 #define CC_SCSI_RESET (uchar)0x40
973 #define CC_HALT (uchar)0x20
974 #define CC_SINGLE_STEP (uchar)0x10
975 #define CC_DMA_ABLE (uchar)0x08
976 #define CC_TEST (uchar)0x04
977 #define CC_BANK_ONE (uchar)0x02
978 #define CC_DIAG (uchar)0x01
979 #define ASC_1000_ID0W 0x04C1
980 #define ASC_1000_ID0W_FIX 0x00C1
981 #define ASC_1000_ID1B 0x25
982 #define ASC_EISA_REV_IOP_MASK (0x0C83)
983 #define ASC_EISA_PID_IOP_MASK (0x0C80)
984 #define ASC_EISA_CFG_IOP_MASK (0x0C86)
985 #define ASC_GET_EISA_SLOT(iop) (PortAddr)((iop) & 0xF000)
986 #define INS_HALTINT (ushort)0x6281
987 #define INS_HALT (ushort)0x6280
988 #define INS_SINT (ushort)0x6200
989 #define INS_RFLAG_WTM (ushort)0x7380
990 #define ASC_MC_SAVE_CODE_WSIZE 0x500
991 #define ASC_MC_SAVE_DATA_WSIZE 0x40
993 typedef struct asc_mc_saved {
994 ushort data[ASC_MC_SAVE_DATA_WSIZE];
995 ushort code[ASC_MC_SAVE_CODE_WSIZE];
998 #define AscGetQDoneInProgress(port) AscReadLramByte((port), ASCV_Q_DONE_IN_PROGRESS_B)
999 #define AscPutQDoneInProgress(port, val) AscWriteLramByte((port), ASCV_Q_DONE_IN_PROGRESS_B, val)
1000 #define AscGetVarFreeQHead(port) AscReadLramWord((port), ASCV_FREE_Q_HEAD_W)
1001 #define AscGetVarDoneQTail(port) AscReadLramWord((port), ASCV_DONE_Q_TAIL_W)
1002 #define AscPutVarFreeQHead(port, val) AscWriteLramWord((port), ASCV_FREE_Q_HEAD_W, val)
1003 #define AscPutVarDoneQTail(port, val) AscWriteLramWord((port), ASCV_DONE_Q_TAIL_W, val)
1004 #define AscGetRiscVarFreeQHead(port) AscReadLramByte((port), ASCV_NEXTRDY_B)
1005 #define AscGetRiscVarDoneQTail(port) AscReadLramByte((port), ASCV_DONENEXT_B)
1006 #define AscPutRiscVarFreeQHead(port, val) AscWriteLramByte((port), ASCV_NEXTRDY_B, val)
1007 #define AscPutRiscVarDoneQTail(port, val) AscWriteLramByte((port), ASCV_DONENEXT_B, val)
1008 #define AscPutMCodeSDTRDoneAtID(port, id, data) AscWriteLramByte((port), (ushort)((ushort)ASCV_SDTR_DONE_BEG+(ushort)id), (data));
1009 #define AscGetMCodeSDTRDoneAtID(port, id) AscReadLramByte((port), (ushort)((ushort)ASCV_SDTR_DONE_BEG+(ushort)id));
1010 #define AscPutMCodeInitSDTRAtID(port, id, data) AscWriteLramByte((port), (ushort)((ushort)ASCV_SDTR_DATA_BEG+(ushort)id), data);
1011 #define AscGetMCodeInitSDTRAtID(port, id) AscReadLramByte((port), (ushort)((ushort)ASCV_SDTR_DATA_BEG+(ushort)id));
1012 #define AscSynIndexToPeriod(index) (uchar)(asc_dvc->sdtr_period_tbl[ (index) ])
1013 #define AscGetChipSignatureByte(port) (uchar)inp((port)+IOP_SIG_BYTE)
1014 #define AscGetChipSignatureWord(port) (ushort)inpw((port)+IOP_SIG_WORD)
1015 #define AscGetChipVerNo(port) (uchar)inp((port)+IOP_VERSION)
1016 #define AscGetChipCfgLsw(port) (ushort)inpw((port)+IOP_CONFIG_LOW)
1017 #define AscGetChipCfgMsw(port) (ushort)inpw((port)+IOP_CONFIG_HIGH)
1018 #define AscSetChipCfgLsw(port, data) outpw((port)+IOP_CONFIG_LOW, data)
1019 #define AscSetChipCfgMsw(port, data) outpw((port)+IOP_CONFIG_HIGH, data)
1020 #define AscGetChipEEPCmd(port) (uchar)inp((port)+IOP_EEP_CMD)
1021 #define AscSetChipEEPCmd(port, data) outp((port)+IOP_EEP_CMD, data)
1022 #define AscGetChipEEPData(port) (ushort)inpw((port)+IOP_EEP_DATA)
1023 #define AscSetChipEEPData(port, data) outpw((port)+IOP_EEP_DATA, data)
1024 #define AscGetChipLramAddr(port) (ushort)inpw((PortAddr)((port)+IOP_RAM_ADDR))
1025 #define AscSetChipLramAddr(port, addr) outpw((PortAddr)((port)+IOP_RAM_ADDR), addr)
1026 #define AscGetChipLramData(port) (ushort)inpw((port)+IOP_RAM_DATA)
1027 #define AscSetChipLramData(port, data) outpw((port)+IOP_RAM_DATA, data)
1028 #define AscGetChipIFC(port) (uchar)inp((port)+IOP_REG_IFC)
1029 #define AscSetChipIFC(port, data) outp((port)+IOP_REG_IFC, data)
1030 #define AscGetChipStatus(port) (ASC_CS_TYPE)inpw((port)+IOP_STATUS)
1031 #define AscSetChipStatus(port, cs_val) outpw((port)+IOP_STATUS, cs_val)
1032 #define AscGetChipControl(port) (uchar)inp((port)+IOP_CTRL)
1033 #define AscSetChipControl(port, cc_val) outp((port)+IOP_CTRL, cc_val)
1034 #define AscGetChipSyn(port) (uchar)inp((port)+IOP_SYN_OFFSET)
1035 #define AscSetChipSyn(port, data) outp((port)+IOP_SYN_OFFSET, data)
1036 #define AscSetPCAddr(port, data) outpw((port)+IOP_REG_PC, data)
1037 #define AscGetPCAddr(port) (ushort)inpw((port)+IOP_REG_PC)
1038 #define AscIsIntPending(port) (AscGetChipStatus(port) & (CSW_INT_PENDING | CSW_SCSI_RESET_LATCH))
1039 #define AscGetChipScsiID(port) ((AscGetChipCfgLsw(port) >> 8) & ASC_MAX_TID)
1040 #define AscGetExtraControl(port) (uchar)inp((port)+IOP_EXTRA_CONTROL)
1041 #define AscSetExtraControl(port, data) outp((port)+IOP_EXTRA_CONTROL, data)
1042 #define AscReadChipAX(port) (ushort)inpw((port)+IOP_REG_AX)
1043 #define AscWriteChipAX(port, data) outpw((port)+IOP_REG_AX, data)
1044 #define AscReadChipIX(port) (uchar)inp((port)+IOP_REG_IX)
1045 #define AscWriteChipIX(port, data) outp((port)+IOP_REG_IX, data)
1046 #define AscReadChipIH(port) (ushort)inpw((port)+IOP_REG_IH)
1047 #define AscWriteChipIH(port, data) outpw((port)+IOP_REG_IH, data)
1048 #define AscReadChipQP(port) (uchar)inp((port)+IOP_REG_QP)
1049 #define AscWriteChipQP(port, data) outp((port)+IOP_REG_QP, data)
1050 #define AscReadChipFIFO_L(port) (ushort)inpw((port)+IOP_REG_FIFO_L)
1051 #define AscWriteChipFIFO_L(port, data) outpw((port)+IOP_REG_FIFO_L, data)
1052 #define AscReadChipFIFO_H(port) (ushort)inpw((port)+IOP_REG_FIFO_H)
1053 #define AscWriteChipFIFO_H(port, data) outpw((port)+IOP_REG_FIFO_H, data)
1054 #define AscReadChipDmaSpeed(port) (uchar)inp((port)+IOP_DMA_SPEED)
1055 #define AscWriteChipDmaSpeed(port, data) outp((port)+IOP_DMA_SPEED, data)
1056 #define AscReadChipDA0(port) (ushort)inpw((port)+IOP_REG_DA0)
1057 #define AscWriteChipDA0(port) outpw((port)+IOP_REG_DA0, data)
1058 #define AscReadChipDA1(port) (ushort)inpw((port)+IOP_REG_DA1)
1059 #define AscWriteChipDA1(port) outpw((port)+IOP_REG_DA1, data)
1060 #define AscReadChipDC0(port) (ushort)inpw((port)+IOP_REG_DC0)
1061 #define AscWriteChipDC0(port) outpw((port)+IOP_REG_DC0, data)
1062 #define AscReadChipDC1(port) (ushort)inpw((port)+IOP_REG_DC1)
1063 #define AscWriteChipDC1(port) outpw((port)+IOP_REG_DC1, data)
1064 #define AscReadChipDvcID(port) (uchar)inp((port)+IOP_REG_ID)
1065 #define AscWriteChipDvcID(port, data) outp((port)+IOP_REG_ID, data)
1067 static int AscWriteEEPCmdReg(PortAddr iop_base, uchar cmd_reg);
1068 static int AscWriteEEPDataReg(PortAddr iop_base, ushort data_reg);
1069 static void AscWaitEEPRead(void);
1070 static void AscWaitEEPWrite(void);
1071 static ushort AscReadEEPWord(PortAddr, uchar);
1072 static ushort AscWriteEEPWord(PortAddr, uchar, ushort);
1073 static ushort AscGetEEPConfig(PortAddr, ASCEEP_CONFIG *, ushort);
1074 static int AscSetEEPConfigOnce(PortAddr, ASCEEP_CONFIG *, ushort);
1075 static int AscSetEEPConfig(PortAddr, ASCEEP_CONFIG *, ushort);
1076 static int AscStartChip(PortAddr);
1077 static int AscStopChip(PortAddr);
1078 static void AscSetChipIH(PortAddr, ushort);
1079 static int AscIsChipHalted(PortAddr);
1080 static void AscAckInterrupt(PortAddr);
1081 static void AscDisableInterrupt(PortAddr);
1082 static void AscEnableInterrupt(PortAddr);
1083 static void AscSetBank(PortAddr, uchar);
1084 static int AscResetChipAndScsiBus(ASC_DVC_VAR *);
1086 static uchar AscGetIsaDmaSpeed(PortAddr);
1087 #endif /* CONFIG_ISA */
1088 static uchar AscReadLramByte(PortAddr, ushort);
1089 static ushort AscReadLramWord(PortAddr, ushort);
1090 #if CC_VERY_LONG_SG_LIST
1091 static ASC_DCNT AscReadLramDWord(PortAddr, ushort);
1092 #endif /* CC_VERY_LONG_SG_LIST */
1093 static void AscWriteLramWord(PortAddr, ushort, ushort);
1094 static void AscWriteLramByte(PortAddr, ushort, uchar);
1095 static ASC_DCNT AscMemSumLramWord(PortAddr, ushort, int);
1096 static void AscMemWordSetLram(PortAddr, ushort, ushort, int);
1097 static void AscMemWordCopyPtrToLram(PortAddr, ushort, uchar *, int);
1098 static void AscMemDWordCopyPtrToLram(PortAddr, ushort, uchar *, int);
1099 static void AscMemWordCopyPtrFromLram(PortAddr, ushort, uchar *, int);
1100 static ushort AscInitAscDvcVar(ASC_DVC_VAR *);
1101 static ushort AscInitFromEEP(ASC_DVC_VAR *);
1102 static ushort AscInitMicroCodeVar(ASC_DVC_VAR *);
1103 static int AscTestExternalLram(ASC_DVC_VAR *);
1104 static uchar AscMsgOutSDTR(ASC_DVC_VAR *, uchar, uchar);
1105 static uchar AscCalSDTRData(ASC_DVC_VAR *, uchar, uchar);
1106 static void AscSetChipSDTR(PortAddr, uchar, uchar);
1107 static uchar AscGetSynPeriodIndex(ASC_DVC_VAR *, uchar);
1108 static uchar AscAllocFreeQueue(PortAddr, uchar);
1109 static uchar AscAllocMultipleFreeQueue(PortAddr, uchar, uchar);
1110 static int AscHostReqRiscHalt(PortAddr);
1111 static int AscStopQueueExe(PortAddr);
1112 static int AscSendScsiQueue(ASC_DVC_VAR *,
1113 ASC_SCSI_Q *scsiq, uchar n_q_required);
1114 static int AscPutReadyQueue(ASC_DVC_VAR *, ASC_SCSI_Q *, uchar);
1115 static int AscPutReadySgListQueue(ASC_DVC_VAR *, ASC_SCSI_Q *, uchar);
1116 static int AscSetChipSynRegAtID(PortAddr, uchar, uchar);
1117 static int AscSetRunChipSynRegAtID(PortAddr, uchar, uchar);
1118 static ushort AscInitLram(ASC_DVC_VAR *);
1119 static ushort AscInitQLinkVar(ASC_DVC_VAR *);
1120 static int AscSetLibErrorCode(ASC_DVC_VAR *, ushort);
1121 static int AscIsrChipHalted(ASC_DVC_VAR *);
1122 static uchar _AscCopyLramScsiDoneQ(PortAddr, ushort,
1123 ASC_QDONE_INFO *, ASC_DCNT);
1124 static int AscIsrQDone(ASC_DVC_VAR *);
1126 static ushort AscGetEisaChipCfg(PortAddr);
1127 #endif /* CONFIG_ISA */
1128 static uchar AscGetChipScsiCtrl(PortAddr);
1129 static uchar AscGetChipVersion(PortAddr, ushort);
1130 static ASC_DCNT AscLoadMicroCode(PortAddr, ushort, uchar *, ushort);
1131 static void AscToggleIRQAct(PortAddr);
1132 static inline ulong DvcEnterCritical(void);
1133 static inline void DvcLeaveCritical(ulong);
1134 static void DvcSleepMilliSecond(ASC_DCNT);
1135 static void DvcDelayNanoSecond(ASC_DVC_VAR *, ASC_DCNT);
1136 static void DvcPutScsiQ(PortAddr, ushort, uchar *, int);
1137 static void DvcGetQinfo(PortAddr, ushort, uchar *, int);
1138 static ushort AscInitAsc1000Driver(ASC_DVC_VAR *);
1139 static void AscAsyncFix(ASC_DVC_VAR *, struct scsi_device *);
1140 static int AscExeScsiQueue(ASC_DVC_VAR *, ASC_SCSI_Q *);
1141 static int AscISR(ASC_DVC_VAR *);
1142 static uint AscGetNumOfFreeQueue(ASC_DVC_VAR *, uchar, uchar);
1143 static int AscSgListToQueue(int);
1145 static void AscEnableIsaDma(uchar);
1146 #endif /* CONFIG_ISA */
1147 static const char *advansys_info(struct Scsi_Host *shost);
1150 * --- Adv Library Constants and Macros
1153 #define ADV_LIB_VERSION_MAJOR 5
1154 #define ADV_LIB_VERSION_MINOR 14
1157 * Define Adv Library required special types.
1161 * Portable Data Types
1163 * Any instance where a 32-bit long or pointer type is assumed
1164 * for precision or HW defined structures, the following define
1165 * types must be used. In Linux the char, short, and int types
1166 * are all consistent at 8, 16, and 32 bits respectively. Pointers
1167 * and long types are 64 bits on Alpha and UltraSPARC.
1169 #define ADV_PADDR __u32 /* Physical address data type. */
1170 #define ADV_VADDR __u32 /* Virtual address data type. */
1171 #define ADV_DCNT __u32 /* Unsigned Data count type. */
1172 #define ADV_SDCNT __s32 /* Signed Data count type. */
1175 * These macros are used to convert a virtual address to a
1176 * 32-bit value. This currently can be used on Linux Alpha
1177 * which uses 64-bit virtual address but a 32-bit bus address.
1178 * This is likely to break in the future, but doing this now
1179 * will give us time to change the HW and FW to handle 64-bit
1182 #define ADV_VADDR_TO_U32 virt_to_bus
1183 #define ADV_U32_TO_VADDR bus_to_virt
1185 #define AdvPortAddr void __iomem * /* Virtual memory address size */
1188 * Define Adv Library required memory access macros.
1190 #define ADV_MEM_READB(addr) readb(addr)
1191 #define ADV_MEM_READW(addr) readw(addr)
1192 #define ADV_MEM_WRITEB(addr, byte) writeb(byte, addr)
1193 #define ADV_MEM_WRITEW(addr, word) writew(word, addr)
1194 #define ADV_MEM_WRITEDW(addr, dword) writel(dword, addr)
1196 #define ADV_CARRIER_COUNT (ASC_DEF_MAX_HOST_QNG + 15)
1199 * Define total number of simultaneous maximum element scatter-gather
1200 * request blocks per wide adapter. ASC_DEF_MAX_HOST_QNG (253) is the
1201 * maximum number of outstanding commands per wide host adapter. Each
1202 * command uses one or more ADV_SG_BLOCK each with 15 scatter-gather
1203 * elements. Allow each command to have at least one ADV_SG_BLOCK structure.
1204 * This allows about 15 commands to have the maximum 17 ADV_SG_BLOCK
1205 * structures or 255 scatter-gather elements.
1208 #define ADV_TOT_SG_BLOCK ASC_DEF_MAX_HOST_QNG
1211 * Define Adv Library required maximum number of scatter-gather
1212 * elements per request.
1214 #define ADV_MAX_SG_LIST 255
1216 /* Number of SG blocks needed. */
1217 #define ADV_NUM_SG_BLOCK \
1218 ((ADV_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK)
1220 /* Total contiguous memory needed for SG blocks. */
1221 #define ADV_SG_TOTAL_MEM_SIZE \
1222 (sizeof(ADV_SG_BLOCK) * ADV_NUM_SG_BLOCK)
1224 #define ADV_PAGE_SIZE PAGE_SIZE
1226 #define ADV_NUM_PAGE_CROSSING \
1227 ((ADV_SG_TOTAL_MEM_SIZE + (ADV_PAGE_SIZE - 1))/ADV_PAGE_SIZE)
1229 #define ADV_EEP_DVC_CFG_BEGIN (0x00)
1230 #define ADV_EEP_DVC_CFG_END (0x15)
1231 #define ADV_EEP_DVC_CTL_BEGIN (0x16) /* location of OEM name */
1232 #define ADV_EEP_MAX_WORD_ADDR (0x1E)
1234 #define ADV_EEP_DELAY_MS 100
1236 #define ADV_EEPROM_BIG_ENDIAN 0x8000 /* EEPROM Bit 15 */
1237 #define ADV_EEPROM_BIOS_ENABLE 0x4000 /* EEPROM Bit 14 */
1239 * For the ASC3550 Bit 13 is Termination Polarity control bit.
1240 * For later ICs Bit 13 controls whether the CIS (Card Information
1241 * Service Section) is loaded from EEPROM.
1243 #define ADV_EEPROM_TERM_POL 0x2000 /* EEPROM Bit 13 */
1244 #define ADV_EEPROM_CIS_LD 0x2000 /* EEPROM Bit 13 */
1248 * If EEPROM Bit 11 is 0 for Function 0, then Function 0 will specify
1249 * INT A in the PCI Configuration Space Int Pin field. If it is 1, then
1250 * Function 0 will specify INT B.
1252 * If EEPROM Bit 11 is 0 for Function 1, then Function 1 will specify
1253 * INT B in the PCI Configuration Space Int Pin field. If it is 1, then
1254 * Function 1 will specify INT A.
1256 #define ADV_EEPROM_INTAB 0x0800 /* EEPROM Bit 11 */
1258 typedef struct adveep_3550_config {
1259 /* Word Offset, Description */
1261 ushort cfg_lsw; /* 00 power up initialization */
1262 /* bit 13 set - Term Polarity Control */
1263 /* bit 14 set - BIOS Enable */
1264 /* bit 15 set - Big Endian Mode */
1265 ushort cfg_msw; /* 01 unused */
1266 ushort disc_enable; /* 02 disconnect enable */
1267 ushort wdtr_able; /* 03 Wide DTR able */
1268 ushort sdtr_able; /* 04 Synchronous DTR able */
1269 ushort start_motor; /* 05 send start up motor */
1270 ushort tagqng_able; /* 06 tag queuing able */
1271 ushort bios_scan; /* 07 BIOS device control */
1272 ushort scam_tolerant; /* 08 no scam */
1274 uchar adapter_scsi_id; /* 09 Host Adapter ID */
1275 uchar bios_boot_delay; /* power up wait */
1277 uchar scsi_reset_delay; /* 10 reset delay */
1278 uchar bios_id_lun; /* first boot device scsi id & lun */
1279 /* high nibble is lun */
1280 /* low nibble is scsi id */
1282 uchar termination; /* 11 0 - automatic */
1283 /* 1 - low off / high off */
1284 /* 2 - low off / high on */
1285 /* 3 - low on / high on */
1286 /* There is no low on / high off */
1288 uchar reserved1; /* reserved byte (not used) */
1290 ushort bios_ctrl; /* 12 BIOS control bits */
1291 /* bit 0 BIOS don't act as initiator. */
1292 /* bit 1 BIOS > 1 GB support */
1293 /* bit 2 BIOS > 2 Disk Support */
1294 /* bit 3 BIOS don't support removables */
1295 /* bit 4 BIOS support bootable CD */
1296 /* bit 5 BIOS scan enabled */
1297 /* bit 6 BIOS support multiple LUNs */
1298 /* bit 7 BIOS display of message */
1299 /* bit 8 SCAM disabled */
1300 /* bit 9 Reset SCSI bus during init. */
1302 /* bit 11 No verbose initialization. */
1303 /* bit 12 SCSI parity enabled */
1307 ushort ultra_able; /* 13 ULTRA speed able */
1308 ushort reserved2; /* 14 reserved */
1309 uchar max_host_qng; /* 15 maximum host queuing */
1310 uchar max_dvc_qng; /* maximum per device queuing */
1311 ushort dvc_cntl; /* 16 control bit for driver */
1312 ushort bug_fix; /* 17 control bit for bug fix */
1313 ushort serial_number_word1; /* 18 Board serial number word 1 */
1314 ushort serial_number_word2; /* 19 Board serial number word 2 */
1315 ushort serial_number_word3; /* 20 Board serial number word 3 */
1316 ushort check_sum; /* 21 EEP check sum */
1317 uchar oem_name[16]; /* 22 OEM name */
1318 ushort dvc_err_code; /* 30 last device driver error code */
1319 ushort adv_err_code; /* 31 last uc and Adv Lib error code */
1320 ushort adv_err_addr; /* 32 last uc error address */
1321 ushort saved_dvc_err_code; /* 33 saved last dev. driver error code */
1322 ushort saved_adv_err_code; /* 34 saved last uc and Adv Lib error code */
1323 ushort saved_adv_err_addr; /* 35 saved last uc error address */
1324 ushort num_of_err; /* 36 number of error */
1325 } ADVEEP_3550_CONFIG;
1327 typedef struct adveep_38C0800_config {
1328 /* Word Offset, Description */
1330 ushort cfg_lsw; /* 00 power up initialization */
1331 /* bit 13 set - Load CIS */
1332 /* bit 14 set - BIOS Enable */
1333 /* bit 15 set - Big Endian Mode */
1334 ushort cfg_msw; /* 01 unused */
1335 ushort disc_enable; /* 02 disconnect enable */
1336 ushort wdtr_able; /* 03 Wide DTR able */
1337 ushort sdtr_speed1; /* 04 SDTR Speed TID 0-3 */
1338 ushort start_motor; /* 05 send start up motor */
1339 ushort tagqng_able; /* 06 tag queuing able */
1340 ushort bios_scan; /* 07 BIOS device control */
1341 ushort scam_tolerant; /* 08 no scam */
1343 uchar adapter_scsi_id; /* 09 Host Adapter ID */
1344 uchar bios_boot_delay; /* power up wait */
1346 uchar scsi_reset_delay; /* 10 reset delay */
1347 uchar bios_id_lun; /* first boot device scsi id & lun */
1348 /* high nibble is lun */
1349 /* low nibble is scsi id */
1351 uchar termination_se; /* 11 0 - automatic */
1352 /* 1 - low off / high off */
1353 /* 2 - low off / high on */
1354 /* 3 - low on / high on */
1355 /* There is no low on / high off */
1357 uchar termination_lvd; /* 11 0 - automatic */
1358 /* 1 - low off / high off */
1359 /* 2 - low off / high on */
1360 /* 3 - low on / high on */
1361 /* There is no low on / high off */
1363 ushort bios_ctrl; /* 12 BIOS control bits */
1364 /* bit 0 BIOS don't act as initiator. */
1365 /* bit 1 BIOS > 1 GB support */
1366 /* bit 2 BIOS > 2 Disk Support */
1367 /* bit 3 BIOS don't support removables */
1368 /* bit 4 BIOS support bootable CD */
1369 /* bit 5 BIOS scan enabled */
1370 /* bit 6 BIOS support multiple LUNs */
1371 /* bit 7 BIOS display of message */
1372 /* bit 8 SCAM disabled */
1373 /* bit 9 Reset SCSI bus during init. */
1375 /* bit 11 No verbose initialization. */
1376 /* bit 12 SCSI parity enabled */
1380 ushort sdtr_speed2; /* 13 SDTR speed TID 4-7 */
1381 ushort sdtr_speed3; /* 14 SDTR speed TID 8-11 */
1382 uchar max_host_qng; /* 15 maximum host queueing */
1383 uchar max_dvc_qng; /* maximum per device queuing */
1384 ushort dvc_cntl; /* 16 control bit for driver */
1385 ushort sdtr_speed4; /* 17 SDTR speed 4 TID 12-15 */
1386 ushort serial_number_word1; /* 18 Board serial number word 1 */
1387 ushort serial_number_word2; /* 19 Board serial number word 2 */
1388 ushort serial_number_word3; /* 20 Board serial number word 3 */
1389 ushort check_sum; /* 21 EEP check sum */
1390 uchar oem_name[16]; /* 22 OEM name */
1391 ushort dvc_err_code; /* 30 last device driver error code */
1392 ushort adv_err_code; /* 31 last uc and Adv Lib error code */
1393 ushort adv_err_addr; /* 32 last uc error address */
1394 ushort saved_dvc_err_code; /* 33 saved last dev. driver error code */
1395 ushort saved_adv_err_code; /* 34 saved last uc and Adv Lib error code */
1396 ushort saved_adv_err_addr; /* 35 saved last uc error address */
1397 ushort reserved36; /* 36 reserved */
1398 ushort reserved37; /* 37 reserved */
1399 ushort reserved38; /* 38 reserved */
1400 ushort reserved39; /* 39 reserved */
1401 ushort reserved40; /* 40 reserved */
1402 ushort reserved41; /* 41 reserved */
1403 ushort reserved42; /* 42 reserved */
1404 ushort reserved43; /* 43 reserved */
1405 ushort reserved44; /* 44 reserved */
1406 ushort reserved45; /* 45 reserved */
1407 ushort reserved46; /* 46 reserved */
1408 ushort reserved47; /* 47 reserved */
1409 ushort reserved48; /* 48 reserved */
1410 ushort reserved49; /* 49 reserved */
1411 ushort reserved50; /* 50 reserved */
1412 ushort reserved51; /* 51 reserved */
1413 ushort reserved52; /* 52 reserved */
1414 ushort reserved53; /* 53 reserved */
1415 ushort reserved54; /* 54 reserved */
1416 ushort reserved55; /* 55 reserved */
1417 ushort cisptr_lsw; /* 56 CIS PTR LSW */
1418 ushort cisprt_msw; /* 57 CIS PTR MSW */
1419 ushort subsysvid; /* 58 SubSystem Vendor ID */
1420 ushort subsysid; /* 59 SubSystem ID */
1421 ushort reserved60; /* 60 reserved */
1422 ushort reserved61; /* 61 reserved */
1423 ushort reserved62; /* 62 reserved */
1424 ushort reserved63; /* 63 reserved */
1425 } ADVEEP_38C0800_CONFIG;
1427 typedef struct adveep_38C1600_config {
1428 /* Word Offset, Description */
1430 ushort cfg_lsw; /* 00 power up initialization */
1431 /* bit 11 set - Func. 0 INTB, Func. 1 INTA */
1432 /* clear - Func. 0 INTA, Func. 1 INTB */
1433 /* bit 13 set - Load CIS */
1434 /* bit 14 set - BIOS Enable */
1435 /* bit 15 set - Big Endian Mode */
1436 ushort cfg_msw; /* 01 unused */
1437 ushort disc_enable; /* 02 disconnect enable */
1438 ushort wdtr_able; /* 03 Wide DTR able */
1439 ushort sdtr_speed1; /* 04 SDTR Speed TID 0-3 */
1440 ushort start_motor; /* 05 send start up motor */
1441 ushort tagqng_able; /* 06 tag queuing able */
1442 ushort bios_scan; /* 07 BIOS device control */
1443 ushort scam_tolerant; /* 08 no scam */
1445 uchar adapter_scsi_id; /* 09 Host Adapter ID */
1446 uchar bios_boot_delay; /* power up wait */
1448 uchar scsi_reset_delay; /* 10 reset delay */
1449 uchar bios_id_lun; /* first boot device scsi id & lun */
1450 /* high nibble is lun */
1451 /* low nibble is scsi id */
1453 uchar termination_se; /* 11 0 - automatic */
1454 /* 1 - low off / high off */
1455 /* 2 - low off / high on */
1456 /* 3 - low on / high on */
1457 /* There is no low on / high off */
1459 uchar termination_lvd; /* 11 0 - automatic */
1460 /* 1 - low off / high off */
1461 /* 2 - low off / high on */
1462 /* 3 - low on / high on */
1463 /* There is no low on / high off */
1465 ushort bios_ctrl; /* 12 BIOS control bits */
1466 /* bit 0 BIOS don't act as initiator. */
1467 /* bit 1 BIOS > 1 GB support */
1468 /* bit 2 BIOS > 2 Disk Support */
1469 /* bit 3 BIOS don't support removables */
1470 /* bit 4 BIOS support bootable CD */
1471 /* bit 5 BIOS scan enabled */
1472 /* bit 6 BIOS support multiple LUNs */
1473 /* bit 7 BIOS display of message */
1474 /* bit 8 SCAM disabled */
1475 /* bit 9 Reset SCSI bus during init. */
1476 /* bit 10 Basic Integrity Checking disabled */
1477 /* bit 11 No verbose initialization. */
1478 /* bit 12 SCSI parity enabled */
1479 /* bit 13 AIPP (Asyn. Info. Ph. Prot.) dis. */
1482 ushort sdtr_speed2; /* 13 SDTR speed TID 4-7 */
1483 ushort sdtr_speed3; /* 14 SDTR speed TID 8-11 */
1484 uchar max_host_qng; /* 15 maximum host queueing */
1485 uchar max_dvc_qng; /* maximum per device queuing */
1486 ushort dvc_cntl; /* 16 control bit for driver */
1487 ushort sdtr_speed4; /* 17 SDTR speed 4 TID 12-15 */
1488 ushort serial_number_word1; /* 18 Board serial number word 1 */
1489 ushort serial_number_word2; /* 19 Board serial number word 2 */
1490 ushort serial_number_word3; /* 20 Board serial number word 3 */
1491 ushort check_sum; /* 21 EEP check sum */
1492 uchar oem_name[16]; /* 22 OEM name */
1493 ushort dvc_err_code; /* 30 last device driver error code */
1494 ushort adv_err_code; /* 31 last uc and Adv Lib error code */
1495 ushort adv_err_addr; /* 32 last uc error address */
1496 ushort saved_dvc_err_code; /* 33 saved last dev. driver error code */
1497 ushort saved_adv_err_code; /* 34 saved last uc and Adv Lib error code */
1498 ushort saved_adv_err_addr; /* 35 saved last uc error address */
1499 ushort reserved36; /* 36 reserved */
1500 ushort reserved37; /* 37 reserved */
1501 ushort reserved38; /* 38 reserved */
1502 ushort reserved39; /* 39 reserved */
1503 ushort reserved40; /* 40 reserved */
1504 ushort reserved41; /* 41 reserved */
1505 ushort reserved42; /* 42 reserved */
1506 ushort reserved43; /* 43 reserved */
1507 ushort reserved44; /* 44 reserved */
1508 ushort reserved45; /* 45 reserved */
1509 ushort reserved46; /* 46 reserved */
1510 ushort reserved47; /* 47 reserved */
1511 ushort reserved48; /* 48 reserved */
1512 ushort reserved49; /* 49 reserved */
1513 ushort reserved50; /* 50 reserved */
1514 ushort reserved51; /* 51 reserved */
1515 ushort reserved52; /* 52 reserved */
1516 ushort reserved53; /* 53 reserved */
1517 ushort reserved54; /* 54 reserved */
1518 ushort reserved55; /* 55 reserved */
1519 ushort cisptr_lsw; /* 56 CIS PTR LSW */
1520 ushort cisprt_msw; /* 57 CIS PTR MSW */
1521 ushort subsysvid; /* 58 SubSystem Vendor ID */
1522 ushort subsysid; /* 59 SubSystem ID */
1523 ushort reserved60; /* 60 reserved */
1524 ushort reserved61; /* 61 reserved */
1525 ushort reserved62; /* 62 reserved */
1526 ushort reserved63; /* 63 reserved */
1527 } ADVEEP_38C1600_CONFIG;
1532 #define ASC_EEP_CMD_DONE 0x0200
1533 #define ASC_EEP_CMD_DONE_ERR 0x0001
1536 #define EEP_CFG_WORD_BIG_ENDIAN 0x8000
1539 #define BIOS_CTRL_BIOS 0x0001
1540 #define BIOS_CTRL_EXTENDED_XLAT 0x0002
1541 #define BIOS_CTRL_GT_2_DISK 0x0004
1542 #define BIOS_CTRL_BIOS_REMOVABLE 0x0008
1543 #define BIOS_CTRL_BOOTABLE_CD 0x0010
1544 #define BIOS_CTRL_MULTIPLE_LUN 0x0040
1545 #define BIOS_CTRL_DISPLAY_MSG 0x0080
1546 #define BIOS_CTRL_NO_SCAM 0x0100
1547 #define BIOS_CTRL_RESET_SCSI_BUS 0x0200
1548 #define BIOS_CTRL_INIT_VERBOSE 0x0800
1549 #define BIOS_CTRL_SCSI_PARITY 0x1000
1550 #define BIOS_CTRL_AIPP_DIS 0x2000
1552 #define ADV_3550_MEMSIZE 0x2000 /* 8 KB Internal Memory */
1554 #define ADV_38C0800_MEMSIZE 0x4000 /* 16 KB Internal Memory */
1557 * XXX - Since ASC38C1600 Rev.3 has a local RAM failure issue, there is
1558 * a special 16K Adv Library and Microcode version. After the issue is
1559 * resolved, should restore 32K support.
1561 * #define ADV_38C1600_MEMSIZE 0x8000L * 32 KB Internal Memory *
1563 #define ADV_38C1600_MEMSIZE 0x4000 /* 16 KB Internal Memory */
1566 * Byte I/O register address from base of 'iop_base'.
1568 #define IOPB_INTR_STATUS_REG 0x00
1569 #define IOPB_CHIP_ID_1 0x01
1570 #define IOPB_INTR_ENABLES 0x02
1571 #define IOPB_CHIP_TYPE_REV 0x03
1572 #define IOPB_RES_ADDR_4 0x04
1573 #define IOPB_RES_ADDR_5 0x05
1574 #define IOPB_RAM_DATA 0x06
1575 #define IOPB_RES_ADDR_7 0x07
1576 #define IOPB_FLAG_REG 0x08
1577 #define IOPB_RES_ADDR_9 0x09
1578 #define IOPB_RISC_CSR 0x0A
1579 #define IOPB_RES_ADDR_B 0x0B
1580 #define IOPB_RES_ADDR_C 0x0C
1581 #define IOPB_RES_ADDR_D 0x0D
1582 #define IOPB_SOFT_OVER_WR 0x0E
1583 #define IOPB_RES_ADDR_F 0x0F
1584 #define IOPB_MEM_CFG 0x10
1585 #define IOPB_RES_ADDR_11 0x11
1586 #define IOPB_GPIO_DATA 0x12
1587 #define IOPB_RES_ADDR_13 0x13
1588 #define IOPB_FLASH_PAGE 0x14
1589 #define IOPB_RES_ADDR_15 0x15
1590 #define IOPB_GPIO_CNTL 0x16
1591 #define IOPB_RES_ADDR_17 0x17
1592 #define IOPB_FLASH_DATA 0x18
1593 #define IOPB_RES_ADDR_19 0x19
1594 #define IOPB_RES_ADDR_1A 0x1A
1595 #define IOPB_RES_ADDR_1B 0x1B
1596 #define IOPB_RES_ADDR_1C 0x1C
1597 #define IOPB_RES_ADDR_1D 0x1D
1598 #define IOPB_RES_ADDR_1E 0x1E
1599 #define IOPB_RES_ADDR_1F 0x1F
1600 #define IOPB_DMA_CFG0 0x20
1601 #define IOPB_DMA_CFG1 0x21
1602 #define IOPB_TICKLE 0x22
1603 #define IOPB_DMA_REG_WR 0x23
1604 #define IOPB_SDMA_STATUS 0x24
1605 #define IOPB_SCSI_BYTE_CNT 0x25
1606 #define IOPB_HOST_BYTE_CNT 0x26
1607 #define IOPB_BYTE_LEFT_TO_XFER 0x27
1608 #define IOPB_BYTE_TO_XFER_0 0x28
1609 #define IOPB_BYTE_TO_XFER_1 0x29
1610 #define IOPB_BYTE_TO_XFER_2 0x2A
1611 #define IOPB_BYTE_TO_XFER_3 0x2B
1612 #define IOPB_ACC_GRP 0x2C
1613 #define IOPB_RES_ADDR_2D 0x2D
1614 #define IOPB_DEV_ID 0x2E
1615 #define IOPB_RES_ADDR_2F 0x2F
1616 #define IOPB_SCSI_DATA 0x30
1617 #define IOPB_RES_ADDR_31 0x31
1618 #define IOPB_RES_ADDR_32 0x32
1619 #define IOPB_SCSI_DATA_HSHK 0x33
1620 #define IOPB_SCSI_CTRL 0x34
1621 #define IOPB_RES_ADDR_35 0x35
1622 #define IOPB_RES_ADDR_36 0x36
1623 #define IOPB_RES_ADDR_37 0x37
1624 #define IOPB_RAM_BIST 0x38
1625 #define IOPB_PLL_TEST 0x39
1626 #define IOPB_PCI_INT_CFG 0x3A
1627 #define IOPB_RES_ADDR_3B 0x3B
1628 #define IOPB_RFIFO_CNT 0x3C
1629 #define IOPB_RES_ADDR_3D 0x3D
1630 #define IOPB_RES_ADDR_3E 0x3E
1631 #define IOPB_RES_ADDR_3F 0x3F
1634 * Word I/O register address from base of 'iop_base'.
1636 #define IOPW_CHIP_ID_0 0x00 /* CID0 */
1637 #define IOPW_CTRL_REG 0x02 /* CC */
1638 #define IOPW_RAM_ADDR 0x04 /* LA */
1639 #define IOPW_RAM_DATA 0x06 /* LD */
1640 #define IOPW_RES_ADDR_08 0x08
1641 #define IOPW_RISC_CSR 0x0A /* CSR */
1642 #define IOPW_SCSI_CFG0 0x0C /* CFG0 */
1643 #define IOPW_SCSI_CFG1 0x0E /* CFG1 */
1644 #define IOPW_RES_ADDR_10 0x10
1645 #define IOPW_SEL_MASK 0x12 /* SM */
1646 #define IOPW_RES_ADDR_14 0x14
1647 #define IOPW_FLASH_ADDR 0x16 /* FA */
1648 #define IOPW_RES_ADDR_18 0x18
1649 #define IOPW_EE_CMD 0x1A /* EC */
1650 #define IOPW_EE_DATA 0x1C /* ED */
1651 #define IOPW_SFIFO_CNT 0x1E /* SFC */
1652 #define IOPW_RES_ADDR_20 0x20
1653 #define IOPW_Q_BASE 0x22 /* QB */
1654 #define IOPW_QP 0x24 /* QP */
1655 #define IOPW_IX 0x26 /* IX */
1656 #define IOPW_SP 0x28 /* SP */
1657 #define IOPW_PC 0x2A /* PC */
1658 #define IOPW_RES_ADDR_2C 0x2C
1659 #define IOPW_RES_ADDR_2E 0x2E
1660 #define IOPW_SCSI_DATA 0x30 /* SD */
1661 #define IOPW_SCSI_DATA_HSHK 0x32 /* SDH */
1662 #define IOPW_SCSI_CTRL 0x34 /* SC */
1663 #define IOPW_HSHK_CFG 0x36 /* HCFG */
1664 #define IOPW_SXFR_STATUS 0x36 /* SXS */
1665 #define IOPW_SXFR_CNTL 0x38 /* SXL */
1666 #define IOPW_SXFR_CNTH 0x3A /* SXH */
1667 #define IOPW_RES_ADDR_3C 0x3C
1668 #define IOPW_RFIFO_DATA 0x3E /* RFD */
1671 * Doubleword I/O register address from base of 'iop_base'.
1673 #define IOPDW_RES_ADDR_0 0x00
1674 #define IOPDW_RAM_DATA 0x04
1675 #define IOPDW_RES_ADDR_8 0x08
1676 #define IOPDW_RES_ADDR_C 0x0C
1677 #define IOPDW_RES_ADDR_10 0x10
1678 #define IOPDW_COMMA 0x14
1679 #define IOPDW_COMMB 0x18
1680 #define IOPDW_RES_ADDR_1C 0x1C
1681 #define IOPDW_SDMA_ADDR0 0x20
1682 #define IOPDW_SDMA_ADDR1 0x24
1683 #define IOPDW_SDMA_COUNT 0x28
1684 #define IOPDW_SDMA_ERROR 0x2C
1685 #define IOPDW_RDMA_ADDR0 0x30
1686 #define IOPDW_RDMA_ADDR1 0x34
1687 #define IOPDW_RDMA_COUNT 0x38
1688 #define IOPDW_RDMA_ERROR 0x3C
1690 #define ADV_CHIP_ID_BYTE 0x25
1691 #define ADV_CHIP_ID_WORD 0x04C1
1693 #define ADV_SC_SCSI_BUS_RESET 0x2000
1695 #define ADV_INTR_ENABLE_HOST_INTR 0x01
1696 #define ADV_INTR_ENABLE_SEL_INTR 0x02
1697 #define ADV_INTR_ENABLE_DPR_INTR 0x04
1698 #define ADV_INTR_ENABLE_RTA_INTR 0x08
1699 #define ADV_INTR_ENABLE_RMA_INTR 0x10
1700 #define ADV_INTR_ENABLE_RST_INTR 0x20
1701 #define ADV_INTR_ENABLE_DPE_INTR 0x40
1702 #define ADV_INTR_ENABLE_GLOBAL_INTR 0x80
1704 #define ADV_INTR_STATUS_INTRA 0x01
1705 #define ADV_INTR_STATUS_INTRB 0x02
1706 #define ADV_INTR_STATUS_INTRC 0x04
1708 #define ADV_RISC_CSR_STOP (0x0000)
1709 #define ADV_RISC_TEST_COND (0x2000)
1710 #define ADV_RISC_CSR_RUN (0x4000)
1711 #define ADV_RISC_CSR_SINGLE_STEP (0x8000)
1713 #define ADV_CTRL_REG_HOST_INTR 0x0100
1714 #define ADV_CTRL_REG_SEL_INTR 0x0200
1715 #define ADV_CTRL_REG_DPR_INTR 0x0400
1716 #define ADV_CTRL_REG_RTA_INTR 0x0800
1717 #define ADV_CTRL_REG_RMA_INTR 0x1000
1718 #define ADV_CTRL_REG_RES_BIT14 0x2000
1719 #define ADV_CTRL_REG_DPE_INTR 0x4000
1720 #define ADV_CTRL_REG_POWER_DONE 0x8000
1721 #define ADV_CTRL_REG_ANY_INTR 0xFF00
1723 #define ADV_CTRL_REG_CMD_RESET 0x00C6
1724 #define ADV_CTRL_REG_CMD_WR_IO_REG 0x00C5
1725 #define ADV_CTRL_REG_CMD_RD_IO_REG 0x00C4
1726 #define ADV_CTRL_REG_CMD_WR_PCI_CFG_SPACE 0x00C3
1727 #define ADV_CTRL_REG_CMD_RD_PCI_CFG_SPACE 0x00C2
1729 #define ADV_TICKLE_NOP 0x00
1730 #define ADV_TICKLE_A 0x01
1731 #define ADV_TICKLE_B 0x02
1732 #define ADV_TICKLE_C 0x03
1734 #define ADV_SCSI_CTRL_RSTOUT 0x2000
1736 #define AdvIsIntPending(port) \
1737 (AdvReadWordRegister(port, IOPW_CTRL_REG) & ADV_CTRL_REG_HOST_INTR)
1740 * SCSI_CFG0 Register bit definitions
1742 #define TIMER_MODEAB 0xC000 /* Watchdog, Second, and Select. Timer Ctrl. */
1743 #define PARITY_EN 0x2000 /* Enable SCSI Parity Error detection */
1744 #define EVEN_PARITY 0x1000 /* Select Even Parity */
1745 #define WD_LONG 0x0800 /* Watchdog Interval, 1: 57 min, 0: 13 sec */
1746 #define QUEUE_128 0x0400 /* Queue Size, 1: 128 byte, 0: 64 byte */
1747 #define PRIM_MODE 0x0100 /* Primitive SCSI mode */
1748 #define SCAM_EN 0x0080 /* Enable SCAM selection */
1749 #define SEL_TMO_LONG 0x0040 /* Sel/Resel Timeout, 1: 400 ms, 0: 1.6 ms */
1750 #define CFRM_ID 0x0020 /* SCAM id sel. confirm., 1: fast, 0: 6.4 ms */
1751 #define OUR_ID_EN 0x0010 /* Enable OUR_ID bits */
1752 #define OUR_ID 0x000F /* SCSI ID */
1755 * SCSI_CFG1 Register bit definitions
1757 #define BIG_ENDIAN 0x8000 /* Enable Big Endian Mode MIO:15, EEP:15 */
1758 #define TERM_POL 0x2000 /* Terminator Polarity Ctrl. MIO:13, EEP:13 */
1759 #define SLEW_RATE 0x1000 /* SCSI output buffer slew rate */
1760 #define FILTER_SEL 0x0C00 /* Filter Period Selection */
1761 #define FLTR_DISABLE 0x0000 /* Input Filtering Disabled */
1762 #define FLTR_11_TO_20NS 0x0800 /* Input Filtering 11ns to 20ns */
1763 #define FLTR_21_TO_39NS 0x0C00 /* Input Filtering 21ns to 39ns */
1764 #define ACTIVE_DBL 0x0200 /* Disable Active Negation */
1765 #define DIFF_MODE 0x0100 /* SCSI differential Mode (Read-Only) */
1766 #define DIFF_SENSE 0x0080 /* 1: No SE cables, 0: SE cable (Read-Only) */
1767 #define TERM_CTL_SEL 0x0040 /* Enable TERM_CTL_H and TERM_CTL_L */
1768 #define TERM_CTL 0x0030 /* External SCSI Termination Bits */
1769 #define TERM_CTL_H 0x0020 /* Enable External SCSI Upper Termination */
1770 #define TERM_CTL_L 0x0010 /* Enable External SCSI Lower Termination */
1771 #define CABLE_DETECT 0x000F /* External SCSI Cable Connection Status */
1774 * Addendum for ASC-38C0800 Chip
1776 * The ASC-38C1600 Chip uses the same definitions except that the
1777 * bus mode override bits [12:10] have been moved to byte register
1778 * offset 0xE (IOPB_SOFT_OVER_WR) bits [12:10]. The [12:10] bits in
1779 * SCSI_CFG1 are read-only and always available. Bit 14 (DIS_TERM_DRV)
1780 * is not needed. The [12:10] bits in IOPB_SOFT_OVER_WR are write-only.
1781 * Also each ASC-38C1600 function or channel uses only cable bits [5:4]
1782 * and [1:0]. Bits [14], [7:6], [3:2] are unused.
1784 #define DIS_TERM_DRV 0x4000 /* 1: Read c_det[3:0], 0: cannot read */
1785 #define HVD_LVD_SE 0x1C00 /* Device Detect Bits */
1786 #define HVD 0x1000 /* HVD Device Detect */
1787 #define LVD 0x0800 /* LVD Device Detect */
1788 #define SE 0x0400 /* SE Device Detect */
1789 #define TERM_LVD 0x00C0 /* LVD Termination Bits */
1790 #define TERM_LVD_HI 0x0080 /* Enable LVD Upper Termination */
1791 #define TERM_LVD_LO 0x0040 /* Enable LVD Lower Termination */
1792 #define TERM_SE 0x0030 /* SE Termination Bits */
1793 #define TERM_SE_HI 0x0020 /* Enable SE Upper Termination */
1794 #define TERM_SE_LO 0x0010 /* Enable SE Lower Termination */
1795 #define C_DET_LVD 0x000C /* LVD Cable Detect Bits */
1796 #define C_DET3 0x0008 /* Cable Detect for LVD External Wide */
1797 #define C_DET2 0x0004 /* Cable Detect for LVD Internal Wide */
1798 #define C_DET_SE 0x0003 /* SE Cable Detect Bits */
1799 #define C_DET1 0x0002 /* Cable Detect for SE Internal Wide */
1800 #define C_DET0 0x0001 /* Cable Detect for SE Internal Narrow */
1802 #define CABLE_ILLEGAL_A 0x7
1803 /* x 0 0 0 | on on | Illegal (all 3 connectors are used) */
1805 #define CABLE_ILLEGAL_B 0xB
1806 /* 0 x 0 0 | on on | Illegal (all 3 connectors are used) */
1809 * MEM_CFG Register bit definitions
1811 #define BIOS_EN 0x40 /* BIOS Enable MIO:14,EEP:14 */
1812 #define FAST_EE_CLK 0x20 /* Diagnostic Bit */
1813 #define RAM_SZ 0x1C /* Specify size of RAM to RISC */
1814 #define RAM_SZ_2KB 0x00 /* 2 KB */
1815 #define RAM_SZ_4KB 0x04 /* 4 KB */
1816 #define RAM_SZ_8KB 0x08 /* 8 KB */
1817 #define RAM_SZ_16KB 0x0C /* 16 KB */
1818 #define RAM_SZ_32KB 0x10 /* 32 KB */
1819 #define RAM_SZ_64KB 0x14 /* 64 KB */
1822 * DMA_CFG0 Register bit definitions
1824 * This register is only accessible to the host.
1826 #define BC_THRESH_ENB 0x80 /* PCI DMA Start Conditions */
1827 #define FIFO_THRESH 0x70 /* PCI DMA FIFO Threshold */
1828 #define FIFO_THRESH_16B 0x00 /* 16 bytes */
1829 #define FIFO_THRESH_32B 0x20 /* 32 bytes */
1830 #define FIFO_THRESH_48B 0x30 /* 48 bytes */
1831 #define FIFO_THRESH_64B 0x40 /* 64 bytes */
1832 #define FIFO_THRESH_80B 0x50 /* 80 bytes (default) */
1833 #define FIFO_THRESH_96B 0x60 /* 96 bytes */
1834 #define FIFO_THRESH_112B 0x70 /* 112 bytes */
1835 #define START_CTL 0x0C /* DMA start conditions */
1836 #define START_CTL_TH 0x00 /* Wait threshold level (default) */
1837 #define START_CTL_ID 0x04 /* Wait SDMA/SBUS idle */
1838 #define START_CTL_THID 0x08 /* Wait threshold and SDMA/SBUS idle */
1839 #define START_CTL_EMFU 0x0C /* Wait SDMA FIFO empty/full */
1840 #define READ_CMD 0x03 /* Memory Read Method */
1841 #define READ_CMD_MR 0x00 /* Memory Read */
1842 #define READ_CMD_MRL 0x02 /* Memory Read Long */
1843 #define READ_CMD_MRM 0x03 /* Memory Read Multiple (default) */
1846 * ASC-38C0800 RAM BIST Register bit definitions
1848 #define RAM_TEST_MODE 0x80
1849 #define PRE_TEST_MODE 0x40
1850 #define NORMAL_MODE 0x00
1851 #define RAM_TEST_DONE 0x10
1852 #define RAM_TEST_STATUS 0x0F
1853 #define RAM_TEST_HOST_ERROR 0x08
1854 #define RAM_TEST_INTRAM_ERROR 0x04
1855 #define RAM_TEST_RISC_ERROR 0x02
1856 #define RAM_TEST_SCSI_ERROR 0x01
1857 #define RAM_TEST_SUCCESS 0x00
1858 #define PRE_TEST_VALUE 0x05
1859 #define NORMAL_VALUE 0x00
1862 * ASC38C1600 Definitions
1864 * IOPB_PCI_INT_CFG Bit Field Definitions
1867 #define INTAB_LD 0x80 /* Value loaded from EEPROM Bit 11. */
1870 * Bit 1 can be set to change the interrupt for the Function to operate in
1871 * Totem Pole mode. By default Bit 1 is 0 and the interrupt operates in
1872 * Open Drain mode. Both functions of the ASC38C1600 must be set to the same
1873 * mode, otherwise the operating mode is undefined.
1875 #define TOTEMPOLE 0x02
1878 * Bit 0 can be used to change the Int Pin for the Function. The value is
1879 * 0 by default for both Functions with Function 0 using INT A and Function
1880 * B using INT B. For Function 0 if set, INT B is used. For Function 1 if set,
1883 * EEPROM Word 0 Bit 11 for each Function may change the initial Int Pin
1884 * value specified in the PCI Configuration Space.
1891 * Adv Library Status Definitions
1895 #define ADV_NOERROR 1
1896 #define ADV_SUCCESS 1
1898 #define ADV_ERROR (-1)
1901 * ADV_DVC_VAR 'warn_code' values
1903 #define ASC_WARN_BUSRESET_ERROR 0x0001 /* SCSI Bus Reset error */
1904 #define ASC_WARN_EEPROM_CHKSUM 0x0002 /* EEP check sum error */
1905 #define ASC_WARN_EEPROM_TERMINATION 0x0004 /* EEP termination bad field */
1906 #define ASC_WARN_SET_PCI_CONFIG_SPACE 0x0080 /* PCI config space set error */
1907 #define ASC_WARN_ERROR 0xFFFF /* ADV_ERROR return */
1909 #define ADV_MAX_TID 15 /* max. target identifier */
1910 #define ADV_MAX_LUN 7 /* max. logical unit number */
1913 * Error code values are set in ADV_DVC_VAR 'err_code'.
1915 #define ASC_IERR_WRITE_EEPROM 0x0001 /* write EEPROM error */
1916 #define ASC_IERR_MCODE_CHKSUM 0x0002 /* micro code check sum error */
1917 #define ASC_IERR_NO_CARRIER 0x0004 /* No more carrier memory. */
1918 #define ASC_IERR_START_STOP_CHIP 0x0008 /* start/stop chip failed */
1919 #define ASC_IERR_CHIP_VERSION 0x0040 /* wrong chip version */
1920 #define ASC_IERR_SET_SCSI_ID 0x0080 /* set SCSI ID failed */
1921 #define ASC_IERR_HVD_DEVICE 0x0100 /* HVD attached to LVD connector. */
1922 #define ASC_IERR_BAD_SIGNATURE 0x0200 /* signature not found */
1923 #define ASC_IERR_ILLEGAL_CONNECTION 0x0400 /* Illegal cable connection */
1924 #define ASC_IERR_SINGLE_END_DEVICE 0x0800 /* Single-end used w/differential */
1925 #define ASC_IERR_REVERSED_CABLE 0x1000 /* Narrow flat cable reversed */
1926 #define ASC_IERR_BIST_PRE_TEST 0x2000 /* BIST pre-test error */
1927 #define ASC_IERR_BIST_RAM_TEST 0x4000 /* BIST RAM test error */
1928 #define ASC_IERR_BAD_CHIPTYPE 0x8000 /* Invalid 'chip_type' setting. */
1931 * Fixed locations of microcode operating variables.
1933 #define ASC_MC_CODE_BEGIN_ADDR 0x0028 /* microcode start address */
1934 #define ASC_MC_CODE_END_ADDR 0x002A /* microcode end address */
1935 #define ASC_MC_CODE_CHK_SUM 0x002C /* microcode code checksum */
1936 #define ASC_MC_VERSION_DATE 0x0038 /* microcode version */
1937 #define ASC_MC_VERSION_NUM 0x003A /* microcode number */
1938 #define ASC_MC_BIOSMEM 0x0040 /* BIOS RISC Memory Start */
1939 #define ASC_MC_BIOSLEN 0x0050 /* BIOS RISC Memory Length */
1940 #define ASC_MC_BIOS_SIGNATURE 0x0058 /* BIOS Signature 0x55AA */
1941 #define ASC_MC_BIOS_VERSION 0x005A /* BIOS Version (2 bytes) */
1942 #define ASC_MC_SDTR_SPEED1 0x0090 /* SDTR Speed for TID 0-3 */
1943 #define ASC_MC_SDTR_SPEED2 0x0092 /* SDTR Speed for TID 4-7 */
1944 #define ASC_MC_SDTR_SPEED3 0x0094 /* SDTR Speed for TID 8-11 */
1945 #define ASC_MC_SDTR_SPEED4 0x0096 /* SDTR Speed for TID 12-15 */
1946 #define ASC_MC_CHIP_TYPE 0x009A
1947 #define ASC_MC_INTRB_CODE 0x009B
1948 #define ASC_MC_WDTR_ABLE 0x009C
1949 #define ASC_MC_SDTR_ABLE 0x009E
1950 #define ASC_MC_TAGQNG_ABLE 0x00A0
1951 #define ASC_MC_DISC_ENABLE 0x00A2
1952 #define ASC_MC_IDLE_CMD_STATUS 0x00A4
1953 #define ASC_MC_IDLE_CMD 0x00A6
1954 #define ASC_MC_IDLE_CMD_PARAMETER 0x00A8
1955 #define ASC_MC_DEFAULT_SCSI_CFG0 0x00AC
1956 #define ASC_MC_DEFAULT_SCSI_CFG1 0x00AE
1957 #define ASC_MC_DEFAULT_MEM_CFG 0x00B0
1958 #define ASC_MC_DEFAULT_SEL_MASK 0x00B2
1959 #define ASC_MC_SDTR_DONE 0x00B6
1960 #define ASC_MC_NUMBER_OF_QUEUED_CMD 0x00C0
1961 #define ASC_MC_NUMBER_OF_MAX_CMD 0x00D0
1962 #define ASC_MC_DEVICE_HSHK_CFG_TABLE 0x0100
1963 #define ASC_MC_CONTROL_FLAG 0x0122 /* Microcode control flag. */
1964 #define ASC_MC_WDTR_DONE 0x0124
1965 #define ASC_MC_CAM_MODE_MASK 0x015E /* CAM mode TID bitmask. */
1966 #define ASC_MC_ICQ 0x0160
1967 #define ASC_MC_IRQ 0x0164
1968 #define ASC_MC_PPR_ABLE 0x017A
1971 * BIOS LRAM variable absolute offsets.
1973 #define BIOS_CODESEG 0x54
1974 #define BIOS_CODELEN 0x56
1975 #define BIOS_SIGNATURE 0x58
1976 #define BIOS_VERSION 0x5A
1979 * Microcode Control Flags
1981 * Flags set by the Adv Library in RISC variable 'control_flag' (0x122)
1982 * and handled by the microcode.
1984 #define CONTROL_FLAG_IGNORE_PERR 0x0001 /* Ignore DMA Parity Errors */
1985 #define CONTROL_FLAG_ENABLE_AIPP 0x0002 /* Enabled AIPP checking. */
1988 * ASC_MC_DEVICE_HSHK_CFG_TABLE microcode table or HSHK_CFG register format
1990 #define HSHK_CFG_WIDE_XFR 0x8000
1991 #define HSHK_CFG_RATE 0x0F00
1992 #define HSHK_CFG_OFFSET 0x001F
1994 #define ASC_DEF_MAX_HOST_QNG 0xFD /* Max. number of host commands (253) */
1995 #define ASC_DEF_MIN_HOST_QNG 0x10 /* Min. number of host commands (16) */
1996 #define ASC_DEF_MAX_DVC_QNG 0x3F /* Max. number commands per device (63) */
1997 #define ASC_DEF_MIN_DVC_QNG 0x04 /* Min. number commands per device (4) */
1999 #define ASC_QC_DATA_CHECK 0x01 /* Require ASC_QC_DATA_OUT set or clear. */
2000 #define ASC_QC_DATA_OUT 0x02 /* Data out DMA transfer. */
2001 #define ASC_QC_START_MOTOR 0x04 /* Send auto-start motor before request. */
2002 #define ASC_QC_NO_OVERRUN 0x08 /* Don't report overrun. */
2003 #define ASC_QC_FREEZE_TIDQ 0x10 /* Freeze TID queue after request. XXX TBD */
2005 #define ASC_QSC_NO_DISC 0x01 /* Don't allow disconnect for request. */
2006 #define ASC_QSC_NO_TAGMSG 0x02 /* Don't allow tag queuing for request. */
2007 #define ASC_QSC_NO_SYNC 0x04 /* Don't use Synch. transfer on request. */
2008 #define ASC_QSC_NO_WIDE 0x08 /* Don't use Wide transfer on request. */
2009 #define ASC_QSC_REDO_DTR 0x10 /* Renegotiate WDTR/SDTR before request. */
2011 * Note: If a Tag Message is to be sent and neither ASC_QSC_HEAD_TAG or
2012 * ASC_QSC_ORDERED_TAG is set, then a Simple Tag Message (0x20) is used.
2014 #define ASC_QSC_HEAD_TAG 0x40 /* Use Head Tag Message (0x21). */
2015 #define ASC_QSC_ORDERED_TAG 0x80 /* Use Ordered Tag Message (0x22). */
2018 * All fields here are accessed by the board microcode and need to be
2021 typedef struct adv_carr_t {
2022 ADV_VADDR carr_va; /* Carrier Virtual Address */
2023 ADV_PADDR carr_pa; /* Carrier Physical Address */
2024 ADV_VADDR areq_vpa; /* ASC_SCSI_REQ_Q Virtual or Physical Address */
2026 * next_vpa [31:4] Carrier Virtual or Physical Next Pointer
2028 * next_vpa [3:1] Reserved Bits
2029 * next_vpa [0] Done Flag set in Response Queue.
2035 * Mask used to eliminate low 4 bits of carrier 'next_vpa' field.
2037 #define ASC_NEXT_VPA_MASK 0xFFFFFFF0
2039 #define ASC_RQ_DONE 0x00000001
2040 #define ASC_RQ_GOOD 0x00000002
2041 #define ASC_CQ_STOPPER 0x00000000
2043 #define ASC_GET_CARRP(carrp) ((carrp) & ASC_NEXT_VPA_MASK)
2045 #define ADV_CARRIER_NUM_PAGE_CROSSING \
2046 (((ADV_CARRIER_COUNT * sizeof(ADV_CARR_T)) + \
2047 (ADV_PAGE_SIZE - 1))/ADV_PAGE_SIZE)
2049 #define ADV_CARRIER_BUFSIZE \
2050 ((ADV_CARRIER_COUNT + ADV_CARRIER_NUM_PAGE_CROSSING) * sizeof(ADV_CARR_T))
2053 * ASC_SCSI_REQ_Q 'a_flag' definitions
2055 * The Adv Library should limit use to the lower nibble (4 bits) of
2056 * a_flag. Drivers are free to use the upper nibble (4 bits) of a_flag.
2058 #define ADV_POLL_REQUEST 0x01 /* poll for request completion */
2059 #define ADV_SCSIQ_DONE 0x02 /* request done */
2060 #define ADV_DONT_RETRY 0x08 /* don't do retry */
2062 #define ADV_CHIP_ASC3550 0x01 /* Ultra-Wide IC */
2063 #define ADV_CHIP_ASC38C0800 0x02 /* Ultra2-Wide/LVD IC */
2064 #define ADV_CHIP_ASC38C1600 0x03 /* Ultra3-Wide/LVD2 IC */
2067 * Adapter temporary configuration structure
2069 * This structure can be discarded after initialization. Don't add
2070 * fields here needed after initialization.
2072 * Field naming convention:
2074 * *_enable indicates the field enables or disables a feature. The
2075 * value of the field is never reset.
2077 typedef struct adv_dvc_cfg {
2078 ushort disc_enable; /* enable disconnection */
2079 uchar chip_version; /* chip version */
2080 uchar termination; /* Term. Ctrl. bits 6-5 of SCSI_CFG1 register */
2081 ushort lib_version; /* Adv Library version number */
2082 ushort control_flag; /* Microcode Control Flag */
2083 ushort mcode_date; /* Microcode date */
2084 ushort mcode_version; /* Microcode version */
2085 ushort serial1; /* EEPROM serial number word 1 */
2086 ushort serial2; /* EEPROM serial number word 2 */
2087 ushort serial3; /* EEPROM serial number word 3 */
2091 struct adv_scsi_req_q;
2094 * Adapter operation variable structure.
2096 * One structure is required per host adapter.
2098 * Field naming convention:
2100 * *_able indicates both whether a feature should be enabled or disabled
2101 * and whether a device isi capable of the feature. At initialization
2102 * this field may be set, but later if a device is found to be incapable
2103 * of the feature, the field is cleared.
2105 typedef struct adv_dvc_var {
2106 AdvPortAddr iop_base; /* I/O port address */
2107 ushort err_code; /* fatal error code */
2108 ushort bios_ctrl; /* BIOS control word, EEPROM word 12 */
2109 ushort wdtr_able; /* try WDTR for a device */
2110 ushort sdtr_able; /* try SDTR for a device */
2111 ushort ultra_able; /* try SDTR Ultra speed for a device */
2112 ushort sdtr_speed1; /* EEPROM SDTR Speed for TID 0-3 */
2113 ushort sdtr_speed2; /* EEPROM SDTR Speed for TID 4-7 */
2114 ushort sdtr_speed3; /* EEPROM SDTR Speed for TID 8-11 */
2115 ushort sdtr_speed4; /* EEPROM SDTR Speed for TID 12-15 */
2116 ushort tagqng_able; /* try tagged queuing with a device */
2117 ushort ppr_able; /* PPR message capable per TID bitmask. */
2118 uchar max_dvc_qng; /* maximum number of tagged commands per device */
2119 ushort start_motor; /* start motor command allowed */
2120 uchar scsi_reset_wait; /* delay in seconds after scsi bus reset */
2121 uchar chip_no; /* should be assigned by caller */
2122 uchar max_host_qng; /* maximum number of Q'ed command allowed */
2123 uchar irq_no; /* IRQ number */
2124 ushort no_scam; /* scam_tolerant of EEPROM */
2125 struct asc_board *drv_ptr; /* driver pointer to private structure */
2126 uchar chip_scsi_id; /* chip SCSI target ID */
2128 uchar bist_err_code;
2129 ADV_CARR_T *carrier_buf;
2130 ADV_CARR_T *carr_freelist; /* Carrier free list. */
2131 ADV_CARR_T *icq_sp; /* Initiator command queue stopper pointer. */
2132 ADV_CARR_T *irq_sp; /* Initiator response queue stopper pointer. */
2133 ushort carr_pending_cnt; /* Count of pending carriers. */
2135 * Note: The following fields will not be used after initialization. The
2136 * driver may discard the buffer after initialization is done.
2138 ADV_DVC_CFG *cfg; /* temporary configuration structure */
2141 #define NO_OF_SG_PER_BLOCK 15
2143 typedef struct asc_sg_block {
2147 uchar sg_cnt; /* Valid entries in block. */
2148 ADV_PADDR sg_ptr; /* Pointer to next sg block. */
2150 ADV_PADDR sg_addr; /* SG element address. */
2151 ADV_DCNT sg_count; /* SG element count. */
2152 } sg_list[NO_OF_SG_PER_BLOCK];
2156 * ADV_SCSI_REQ_Q - microcode request structure
2158 * All fields in this structure up to byte 60 are used by the microcode.
2159 * The microcode makes assumptions about the size and ordering of fields
2160 * in this structure. Do not change the structure definition here without
2161 * coordinating the change with the microcode.
2163 * All fields accessed by microcode must be maintained in little_endian
2166 typedef struct adv_scsi_req_q {
2167 uchar cntl; /* Ucode flags and state (ASC_MC_QC_*). */
2169 uchar target_id; /* Device target identifier. */
2170 uchar target_lun; /* Device target logical unit number. */
2171 ADV_PADDR data_addr; /* Data buffer physical address. */
2172 ADV_DCNT data_cnt; /* Data count. Ucode sets to residual. */
2173 ADV_PADDR sense_addr;
2177 uchar cdb_len; /* SCSI CDB length. Must <= 16 bytes. */
2179 uchar done_status; /* Completion status. */
2180 uchar scsi_status; /* SCSI status byte. */
2181 uchar host_status; /* Ucode host status. */
2182 uchar sg_working_ix;
2183 uchar cdb[12]; /* SCSI CDB bytes 0-11. */
2184 ADV_PADDR sg_real_addr; /* SG list physical address. */
2185 ADV_PADDR scsiq_rptr;
2186 uchar cdb16[4]; /* SCSI CDB bytes 12-15. */
2187 ADV_VADDR scsiq_ptr;
2190 * End of microcode structure - 60 bytes. The rest of the structure
2191 * is used by the Adv Library and ignored by the microcode.
2194 ADV_SG_BLOCK *sg_list_ptr; /* SG list virtual address. */
2195 char *vdata_addr; /* Data buffer virtual address. */
2197 uchar pad[2]; /* Pad out to a word boundary. */
2201 * Microcode idle loop commands
2203 #define IDLE_CMD_COMPLETED 0
2204 #define IDLE_CMD_STOP_CHIP 0x0001
2205 #define IDLE_CMD_STOP_CHIP_SEND_INT 0x0002
2206 #define IDLE_CMD_SEND_INT 0x0004
2207 #define IDLE_CMD_ABORT 0x0008
2208 #define IDLE_CMD_DEVICE_RESET 0x0010
2209 #define IDLE_CMD_SCSI_RESET_START 0x0020 /* Assert SCSI Bus Reset */
2210 #define IDLE_CMD_SCSI_RESET_END 0x0040 /* Deassert SCSI Bus Reset */
2211 #define IDLE_CMD_SCSIREQ 0x0080
2213 #define IDLE_CMD_STATUS_SUCCESS 0x0001
2214 #define IDLE_CMD_STATUS_FAILURE 0x0002
2217 * AdvSendIdleCmd() flag definitions.
2219 #define ADV_NOWAIT 0x01
2222 * Wait loop time out values.
2224 #define SCSI_WAIT_10_SEC 10UL /* 10 seconds */
2225 #define SCSI_WAIT_100_MSEC 100UL /* 100 milliseconds */
2226 #define SCSI_US_PER_MSEC 1000 /* microseconds per millisecond */
2227 #define SCSI_MS_PER_SEC 1000UL /* milliseconds per second */
2228 #define SCSI_MAX_RETRY 10 /* retry count */
2230 #define ADV_ASYNC_RDMA_FAILURE 0x01 /* Fatal RDMA failure. */
2231 #define ADV_ASYNC_SCSI_BUS_RESET_DET 0x02 /* Detected SCSI Bus Reset. */
2232 #define ADV_ASYNC_CARRIER_READY_FAILURE 0x03 /* Carrier Ready failure. */
2233 #define ADV_RDMA_IN_CARR_AND_Q_INVALID 0x04 /* RDMAed-in data invalid. */
2235 #define ADV_HOST_SCSI_BUS_RESET 0x80 /* Host Initiated SCSI Bus Reset. */
2238 * Device drivers must define the following functions.
2240 static inline ulong DvcEnterCritical(void);
2241 static inline void DvcLeaveCritical(ulong);
2242 static void DvcSleepMilliSecond(ADV_DCNT);
2243 static ADV_PADDR DvcGetPhyAddr(ADV_DVC_VAR *, ADV_SCSI_REQ_Q *,
2244 uchar *, ASC_SDCNT *, int);
2245 static void DvcDelayMicroSecond(ADV_DVC_VAR *, ushort);
2248 * Adv Library functions available to drivers.
2250 static int AdvExeScsiQueue(ADV_DVC_VAR *, ADV_SCSI_REQ_Q *);
2251 static int AdvISR(ADV_DVC_VAR *);
2252 static int AdvInitAsc3550Driver(ADV_DVC_VAR *);
2253 static int AdvInitAsc38C0800Driver(ADV_DVC_VAR *);
2254 static int AdvInitAsc38C1600Driver(ADV_DVC_VAR *);
2255 static int AdvResetChipAndSB(ADV_DVC_VAR *);
2256 static int AdvResetSB(ADV_DVC_VAR *asc_dvc);
2259 * Internal Adv Library functions.
2261 static int AdvSendIdleCmd(ADV_DVC_VAR *, ushort, ADV_DCNT);
2262 static int AdvInitFrom3550EEP(ADV_DVC_VAR *);
2263 static int AdvInitFrom38C0800EEP(ADV_DVC_VAR *);
2264 static int AdvInitFrom38C1600EEP(ADV_DVC_VAR *);
2265 static ushort AdvGet3550EEPConfig(AdvPortAddr, ADVEEP_3550_CONFIG *);
2266 static void AdvSet3550EEPConfig(AdvPortAddr, ADVEEP_3550_CONFIG *);
2267 static ushort AdvGet38C0800EEPConfig(AdvPortAddr, ADVEEP_38C0800_CONFIG *);
2268 static void AdvSet38C0800EEPConfig(AdvPortAddr, ADVEEP_38C0800_CONFIG *);
2269 static ushort AdvGet38C1600EEPConfig(AdvPortAddr, ADVEEP_38C1600_CONFIG *);
2270 static void AdvSet38C1600EEPConfig(AdvPortAddr, ADVEEP_38C1600_CONFIG *);
2271 static void AdvWaitEEPCmd(AdvPortAddr);
2272 static ushort AdvReadEEPWord(AdvPortAddr, int);
2274 /* Read byte from a register. */
2275 #define AdvReadByteRegister(iop_base, reg_off) \
2276 (ADV_MEM_READB((iop_base) + (reg_off)))
2278 /* Write byte to a register. */
2279 #define AdvWriteByteRegister(iop_base, reg_off, byte) \
2280 (ADV_MEM_WRITEB((iop_base) + (reg_off), (byte)))
2282 /* Read word (2 bytes) from a register. */
2283 #define AdvReadWordRegister(iop_base, reg_off) \
2284 (ADV_MEM_READW((iop_base) + (reg_off)))
2286 /* Write word (2 bytes) to a register. */
2287 #define AdvWriteWordRegister(iop_base, reg_off, word) \
2288 (ADV_MEM_WRITEW((iop_base) + (reg_off), (word)))
2290 /* Write dword (4 bytes) to a register. */
2291 #define AdvWriteDWordRegister(iop_base, reg_off, dword) \
2292 (ADV_MEM_WRITEDW((iop_base) + (reg_off), (dword)))
2294 /* Read byte from LRAM. */
2295 #define AdvReadByteLram(iop_base, addr, byte) \
2297 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)); \
2298 (byte) = ADV_MEM_READB((iop_base) + IOPB_RAM_DATA); \
2301 /* Write byte to LRAM. */
2302 #define AdvWriteByteLram(iop_base, addr, byte) \
2303 (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)), \
2304 ADV_MEM_WRITEB((iop_base) + IOPB_RAM_DATA, (byte)))
2306 /* Read word (2 bytes) from LRAM. */
2307 #define AdvReadWordLram(iop_base, addr, word) \
2309 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)); \
2310 (word) = (ADV_MEM_READW((iop_base) + IOPW_RAM_DATA)); \
2313 /* Write word (2 bytes) to LRAM. */
2314 #define AdvWriteWordLram(iop_base, addr, word) \
2315 (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)), \
2316 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, (word)))
2318 /* Write little-endian double word (4 bytes) to LRAM */
2319 /* Because of unspecified C language ordering don't use auto-increment. */
2320 #define AdvWriteDWordLramNoSwap(iop_base, addr, dword) \
2321 ((ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)), \
2322 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, \
2323 cpu_to_le16((ushort) ((dword) & 0xFFFF)))), \
2324 (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr) + 2), \
2325 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, \
2326 cpu_to_le16((ushort) ((dword >> 16) & 0xFFFF)))))
2328 /* Read word (2 bytes) from LRAM assuming that the address is already set. */
2329 #define AdvReadWordAutoIncLram(iop_base) \
2330 (ADV_MEM_READW((iop_base) + IOPW_RAM_DATA))
2332 /* Write word (2 bytes) to LRAM assuming that the address is already set. */
2333 #define AdvWriteWordAutoIncLram(iop_base, word) \
2334 (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, (word)))
2337 * Define macro to check for Condor signature.
2339 * Evaluate to ADV_TRUE if a Condor chip is found the specified port
2340 * address 'iop_base'. Otherwise evalue to ADV_FALSE.
2342 #define AdvFindSignature(iop_base) \
2343 (((AdvReadByteRegister((iop_base), IOPB_CHIP_ID_1) == \
2344 ADV_CHIP_ID_BYTE) && \
2345 (AdvReadWordRegister((iop_base), IOPW_CHIP_ID_0) == \
2346 ADV_CHIP_ID_WORD)) ? ADV_TRUE : ADV_FALSE)
2349 * Define macro to Return the version number of the chip at 'iop_base'.
2351 * The second parameter 'bus_type' is currently unused.
2353 #define AdvGetChipVersion(iop_base, bus_type) \
2354 AdvReadByteRegister((iop_base), IOPB_CHIP_TYPE_REV)
2357 * Abort an SRB in the chip's RISC Memory. The 'srb_ptr' argument must
2358 * match the ASC_SCSI_REQ_Q 'srb_ptr' field.
2360 * If the request has not yet been sent to the device it will simply be
2361 * aborted from RISC memory. If the request is disconnected it will be
2362 * aborted on reselection by sending an Abort Message to the target ID.
2365 * ADV_TRUE(1) - Queue was successfully aborted.
2366 * ADV_FALSE(0) - Queue was not found on the active queue list.
2368 #define AdvAbortQueue(asc_dvc, scsiq) \
2369 AdvSendIdleCmd((asc_dvc), (ushort) IDLE_CMD_ABORT, \
2373 * Send a Bus Device Reset Message to the specified target ID.
2375 * All outstanding commands will be purged if sending the
2376 * Bus Device Reset Message is successful.
2379 * ADV_TRUE(1) - All requests on the target are purged.
2380 * ADV_FALSE(0) - Couldn't issue Bus Device Reset Message; Requests
2383 #define AdvResetDevice(asc_dvc, target_id) \
2384 AdvSendIdleCmd((asc_dvc), (ushort) IDLE_CMD_DEVICE_RESET, \
2385 (ADV_DCNT) (target_id))
2388 * SCSI Wide Type definition.
2390 #define ADV_SCSI_BIT_ID_TYPE ushort
2393 * AdvInitScsiTarget() 'cntl_flag' options.
2395 #define ADV_SCAN_LUN 0x01
2396 #define ADV_CAPINFO_NOLUN 0x02
2399 * Convert target id to target id bit mask.
2401 #define ADV_TID_TO_TIDMASK(tid) (0x01 << ((tid) & ADV_MAX_TID))
2404 * ASC_SCSI_REQ_Q 'done_status' and 'host_status' return values.
2407 #define QD_NO_STATUS 0x00 /* Request not completed yet. */
2408 #define QD_NO_ERROR 0x01
2409 #define QD_ABORTED_BY_HOST 0x02
2410 #define QD_WITH_ERROR 0x04
2412 #define QHSTA_NO_ERROR 0x00
2413 #define QHSTA_M_SEL_TIMEOUT 0x11
2414 #define QHSTA_M_DATA_OVER_RUN 0x12
2415 #define QHSTA_M_UNEXPECTED_BUS_FREE 0x13
2416 #define QHSTA_M_QUEUE_ABORTED 0x15
2417 #define QHSTA_M_SXFR_SDMA_ERR 0x16 /* SXFR_STATUS SCSI DMA Error */
2418 #define QHSTA_M_SXFR_SXFR_PERR 0x17 /* SXFR_STATUS SCSI Bus Parity Error */
2419 #define QHSTA_M_RDMA_PERR 0x18 /* RISC PCI DMA parity error */
2420 #define QHSTA_M_SXFR_OFF_UFLW 0x19 /* SXFR_STATUS Offset Underflow */
2421 #define QHSTA_M_SXFR_OFF_OFLW 0x20 /* SXFR_STATUS Offset Overflow */
2422 #define QHSTA_M_SXFR_WD_TMO 0x21 /* SXFR_STATUS Watchdog Timeout */
2423 #define QHSTA_M_SXFR_DESELECTED 0x22 /* SXFR_STATUS Deselected */
2424 /* Note: QHSTA_M_SXFR_XFR_OFLW is identical to QHSTA_M_DATA_OVER_RUN. */
2425 #define QHSTA_M_SXFR_XFR_OFLW 0x12 /* SXFR_STATUS Transfer Overflow */
2426 #define QHSTA_M_SXFR_XFR_PH_ERR 0x24 /* SXFR_STATUS Transfer Phase Error */
2427 #define QHSTA_M_SXFR_UNKNOWN_ERROR 0x25 /* SXFR_STATUS Unknown Error */
2428 #define QHSTA_M_SCSI_BUS_RESET 0x30 /* Request aborted from SBR */
2429 #define QHSTA_M_SCSI_BUS_RESET_UNSOL 0x31 /* Request aborted from unsol. SBR */
2430 #define QHSTA_M_BUS_DEVICE_RESET 0x32 /* Request aborted from BDR */
2431 #define QHSTA_M_DIRECTION_ERR 0x35 /* Data Phase mismatch */
2432 #define QHSTA_M_DIRECTION_ERR_HUNG 0x36 /* Data Phase mismatch and bus hang */
2433 #define QHSTA_M_WTM_TIMEOUT 0x41
2434 #define QHSTA_M_BAD_CMPL_STATUS_IN 0x42
2435 #define QHSTA_M_NO_AUTO_REQ_SENSE 0x43
2436 #define QHSTA_M_AUTO_REQ_SENSE_FAIL 0x44
2437 #define QHSTA_M_INVALID_DEVICE 0x45 /* Bad target ID */
2438 #define QHSTA_M_FROZEN_TIDQ 0x46 /* TID Queue frozen. */
2439 #define QHSTA_M_SGBACKUP_ERROR 0x47 /* Scatter-Gather backup error */
2442 * DvcGetPhyAddr() flag arguments
2444 #define ADV_IS_SCSIQ_FLAG 0x01 /* 'addr' is ASC_SCSI_REQ_Q pointer */
2445 #define ADV_ASCGETSGLIST_VADDR 0x02 /* 'addr' is AscGetSGList() virtual addr */
2446 #define ADV_IS_SENSE_FLAG 0x04 /* 'addr' is sense virtual pointer */
2447 #define ADV_IS_DATA_FLAG 0x08 /* 'addr' is data virtual pointer */
2448 #define ADV_IS_SGLIST_FLAG 0x10 /* 'addr' is sglist virtual pointer */
2449 #define ADV_IS_CARRIER_FLAG 0x20 /* 'addr' is ADV_CARR_T pointer */
2451 /* Return the address that is aligned at the next doubleword >= to 'addr'. */
2452 #define ADV_8BALIGN(addr) (((ulong) (addr) + 0x7) & ~0x7)
2453 #define ADV_16BALIGN(addr) (((ulong) (addr) + 0xF) & ~0xF)
2454 #define ADV_32BALIGN(addr) (((ulong) (addr) + 0x1F) & ~0x1F)
2457 * Total contiguous memory needed for driver SG blocks.
2459 * ADV_MAX_SG_LIST must be defined by a driver. It is the maximum
2460 * number of scatter-gather elements the driver supports in a
2464 #define ADV_SG_LIST_MAX_BYTE_SIZE \
2465 (sizeof(ADV_SG_BLOCK) * \
2466 ((ADV_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK))
2469 * --- Driver Constants and Macros
2472 /* Reference Scsi_Host hostdata */
2473 #define ASC_BOARDP(host) ((asc_board_t *) &((host)->hostdata))
2475 /* asc_board_t flags */
2476 #define ASC_HOST_IN_RESET 0x01
2477 #define ASC_IS_WIDE_BOARD 0x04 /* AdvanSys Wide Board */
2478 #define ASC_SELECT_QUEUE_DEPTHS 0x08
2480 #define ASC_NARROW_BOARD(boardp) (((boardp)->flags & ASC_IS_WIDE_BOARD) == 0)
2481 #define ASC_WIDE_BOARD(boardp) ((boardp)->flags & ASC_IS_WIDE_BOARD)
2483 #define NO_ISA_DMA 0xff /* No ISA DMA Channel Used */
2485 #define ASC_INFO_SIZE 128 /* advansys_info() line size */
2487 #ifdef CONFIG_PROC_FS
2488 /* /proc/scsi/advansys/[0...] related definitions */
2489 #define ASC_PRTBUF_SIZE 2048
2490 #define ASC_PRTLINE_SIZE 160
2492 #define ASC_PRT_NEXT() \
2496 if (leftlen == 0) { \
2501 #endif /* CONFIG_PROC_FS */
2503 /* Asc Library return codes */
2506 #define ASC_NOERROR 1
2508 #define ASC_ERROR (-1)
2510 /* struct scsi_cmnd function return codes */
2511 #define STATUS_BYTE(byte) (byte)
2512 #define MSG_BYTE(byte) ((byte) << 8)
2513 #define HOST_BYTE(byte) ((byte) << 16)
2514 #define DRIVER_BYTE(byte) ((byte) << 24)
2516 #ifndef ADVANSYS_STATS
2517 #define ASC_STATS(shost, counter)
2518 #define ASC_STATS_ADD(shost, counter, count)
2519 #else /* ADVANSYS_STATS */
2520 #define ASC_STATS(shost, counter) \
2521 (ASC_BOARDP(shost)->asc_stats.counter++)
2523 #define ASC_STATS_ADD(shost, counter, count) \
2524 (ASC_BOARDP(shost)->asc_stats.counter += (count))
2525 #endif /* ADVANSYS_STATS */
2527 #define ASC_CEILING(val, unit) (((val) + ((unit) - 1))/(unit))
2529 /* If the result wraps when calculating tenths, return 0. */
2530 #define ASC_TENTHS(num, den) \
2531 (((10 * ((num)/(den))) > (((num) * 10)/(den))) ? \
2532 0 : ((((num) * 10)/(den)) - (10 * ((num)/(den)))))
2535 * Display a message to the console.
2537 #define ASC_PRINT(s) \
2539 printk("advansys: "); \
2543 #define ASC_PRINT1(s, a1) \
2545 printk("advansys: "); \
2546 printk((s), (a1)); \
2549 #define ASC_PRINT2(s, a1, a2) \
2551 printk("advansys: "); \
2552 printk((s), (a1), (a2)); \
2555 #define ASC_PRINT3(s, a1, a2, a3) \
2557 printk("advansys: "); \
2558 printk((s), (a1), (a2), (a3)); \
2561 #define ASC_PRINT4(s, a1, a2, a3, a4) \
2563 printk("advansys: "); \
2564 printk((s), (a1), (a2), (a3), (a4)); \
2567 #ifndef ADVANSYS_DEBUG
2569 #define ASC_DBG(lvl, s)
2570 #define ASC_DBG1(lvl, s, a1)
2571 #define ASC_DBG2(lvl, s, a1, a2)
2572 #define ASC_DBG3(lvl, s, a1, a2, a3)
2573 #define ASC_DBG4(lvl, s, a1, a2, a3, a4)
2574 #define ASC_DBG_PRT_SCSI_HOST(lvl, s)
2575 #define ASC_DBG_PRT_SCSI_CMND(lvl, s)
2576 #define ASC_DBG_PRT_ASC_SCSI_Q(lvl, scsiqp)
2577 #define ASC_DBG_PRT_ADV_SCSI_REQ_Q(lvl, scsiqp)
2578 #define ASC_DBG_PRT_ASC_QDONE_INFO(lvl, qdone)
2579 #define ADV_DBG_PRT_ADV_SCSI_REQ_Q(lvl, scsiqp)
2580 #define ASC_DBG_PRT_HEX(lvl, name, start, length)
2581 #define ASC_DBG_PRT_CDB(lvl, cdb, len)
2582 #define ASC_DBG_PRT_SENSE(lvl, sense, len)
2583 #define ASC_DBG_PRT_INQUIRY(lvl, inq, len)
2585 #else /* ADVANSYS_DEBUG */
2588 * Debugging Message Levels:
2590 * 1: High-Level Tracing
2591 * 2-N: Verbose Tracing
2594 #define ASC_DBG(lvl, s) \
2596 if (asc_dbglvl >= (lvl)) { \
2601 #define ASC_DBG1(lvl, s, a1) \
2603 if (asc_dbglvl >= (lvl)) { \
2604 printk((s), (a1)); \
2608 #define ASC_DBG2(lvl, s, a1, a2) \
2610 if (asc_dbglvl >= (lvl)) { \
2611 printk((s), (a1), (a2)); \
2615 #define ASC_DBG3(lvl, s, a1, a2, a3) \
2617 if (asc_dbglvl >= (lvl)) { \
2618 printk((s), (a1), (a2), (a3)); \
2622 #define ASC_DBG4(lvl, s, a1, a2, a3, a4) \
2624 if (asc_dbglvl >= (lvl)) { \
2625 printk((s), (a1), (a2), (a3), (a4)); \
2629 #define ASC_DBG_PRT_SCSI_HOST(lvl, s) \
2631 if (asc_dbglvl >= (lvl)) { \
2632 asc_prt_scsi_host(s); \
2636 #define ASC_DBG_PRT_SCSI_CMND(lvl, s) \
2638 if (asc_dbglvl >= (lvl)) { \
2639 asc_prt_scsi_cmnd(s); \
2643 #define ASC_DBG_PRT_ASC_SCSI_Q(lvl, scsiqp) \
2645 if (asc_dbglvl >= (lvl)) { \
2646 asc_prt_asc_scsi_q(scsiqp); \
2650 #define ASC_DBG_PRT_ASC_QDONE_INFO(lvl, qdone) \
2652 if (asc_dbglvl >= (lvl)) { \
2653 asc_prt_asc_qdone_info(qdone); \
2657 #define ASC_DBG_PRT_ADV_SCSI_REQ_Q(lvl, scsiqp) \
2659 if (asc_dbglvl >= (lvl)) { \
2660 asc_prt_adv_scsi_req_q(scsiqp); \
2664 #define ASC_DBG_PRT_HEX(lvl, name, start, length) \
2666 if (asc_dbglvl >= (lvl)) { \
2667 asc_prt_hex((name), (start), (length)); \
2671 #define ASC_DBG_PRT_CDB(lvl, cdb, len) \
2672 ASC_DBG_PRT_HEX((lvl), "CDB", (uchar *) (cdb), (len));
2674 #define ASC_DBG_PRT_SENSE(lvl, sense, len) \
2675 ASC_DBG_PRT_HEX((lvl), "SENSE", (uchar *) (sense), (len));
2677 #define ASC_DBG_PRT_INQUIRY(lvl, inq, len) \
2678 ASC_DBG_PRT_HEX((lvl), "INQUIRY", (uchar *) (inq), (len));
2679 #endif /* ADVANSYS_DEBUG */
2681 #ifndef ADVANSYS_ASSERT
2682 #define ASC_ASSERT(a)
2683 #else /* ADVANSYS_ASSERT */
2685 #define ASC_ASSERT(a) \
2688 printk("ASC_ASSERT() Failure: file %s, line %d\n", \
2689 __FILE__, __LINE__); \
2693 #endif /* ADVANSYS_ASSERT */
2696 * --- Driver Structures
2699 #ifdef ADVANSYS_STATS
2701 /* Per board statistics structure */
2703 /* Driver Entrypoint Statistics */
2704 ADV_DCNT queuecommand; /* # calls to advansys_queuecommand() */
2705 ADV_DCNT reset; /* # calls to advansys_eh_bus_reset() */
2706 ADV_DCNT biosparam; /* # calls to advansys_biosparam() */
2707 ADV_DCNT interrupt; /* # advansys_interrupt() calls */
2708 ADV_DCNT callback; /* # calls to asc/adv_isr_callback() */
2709 ADV_DCNT done; /* # calls to request's scsi_done function */
2710 ADV_DCNT build_error; /* # asc/adv_build_req() ASC_ERROR returns. */
2711 ADV_DCNT adv_build_noreq; /* # adv_build_req() adv_req_t alloc. fail. */
2712 ADV_DCNT adv_build_nosg; /* # adv_build_req() adv_sgblk_t alloc. fail. */
2713 /* AscExeScsiQueue()/AdvExeScsiQueue() Statistics */
2714 ADV_DCNT exe_noerror; /* # ASC_NOERROR returns. */
2715 ADV_DCNT exe_busy; /* # ASC_BUSY returns. */
2716 ADV_DCNT exe_error; /* # ASC_ERROR returns. */
2717 ADV_DCNT exe_unknown; /* # unknown returns. */
2718 /* Data Transfer Statistics */
2719 ADV_DCNT cont_cnt; /* # non-scatter-gather I/O requests received */
2720 ADV_DCNT cont_xfer; /* # contiguous transfer 512-bytes */
2721 ADV_DCNT sg_cnt; /* # scatter-gather I/O requests received */
2722 ADV_DCNT sg_elem; /* # scatter-gather elements */
2723 ADV_DCNT sg_xfer; /* # scatter-gather transfer 512-bytes */
2725 #endif /* ADVANSYS_STATS */
2728 * Adv Library Request Structures
2730 * The following two structures are used to process Wide Board requests.
2732 * The ADV_SCSI_REQ_Q structure in adv_req_t is passed to the Adv Library
2733 * and microcode with the ADV_SCSI_REQ_Q field 'srb_ptr' pointing to the
2734 * adv_req_t. The adv_req_t structure 'cmndp' field in turn points to the
2735 * Mid-Level SCSI request structure.
2737 * Zero or more ADV_SG_BLOCK are used with each ADV_SCSI_REQ_Q. Each
2738 * ADV_SG_BLOCK structure holds 15 scatter-gather elements. Under Linux
2739 * up to 255 scatter-gather elements may be used per request or
2742 * Both structures must be 32 byte aligned.
2744 typedef struct adv_sgblk {
2745 ADV_SG_BLOCK sg_block; /* Sgblock structure. */
2746 uchar align[32]; /* Sgblock structure padding. */
2747 struct adv_sgblk *next_sgblkp; /* Next scatter-gather structure. */
2750 typedef struct adv_req {
2751 ADV_SCSI_REQ_Q scsi_req_q; /* Adv Library request structure. */
2752 uchar align[32]; /* Request structure padding. */
2753 struct scsi_cmnd *cmndp; /* Mid-Level SCSI command pointer. */
2754 adv_sgblk_t *sgblkp; /* Adv Library scatter-gather pointer. */
2755 struct adv_req *next_reqp; /* Next Request Structure. */
2759 * Structure allocated for each board.
2761 * This structure is allocated by scsi_host_alloc() at the end
2762 * of the 'Scsi_Host' structure starting at the 'hostdata'
2763 * field. It is guaranteed to be allocated from DMA-able memory.
2765 typedef struct asc_board {
2767 int id; /* Board Id */
2768 uint flags; /* Board flags */
2770 ASC_DVC_VAR asc_dvc_var; /* Narrow board */
2771 ADV_DVC_VAR adv_dvc_var; /* Wide board */
2774 ASC_DVC_CFG asc_dvc_cfg; /* Narrow board */
2775 ADV_DVC_CFG adv_dvc_cfg; /* Wide board */
2777 ushort asc_n_io_port; /* Number I/O ports. */
2778 ADV_SCSI_BIT_ID_TYPE init_tidmask; /* Target init./valid mask */
2779 struct scsi_device *device[ADV_MAX_TID + 1]; /* Mid-Level Scsi Device */
2780 ushort reqcnt[ADV_MAX_TID + 1]; /* Starvation request count */
2781 ADV_SCSI_BIT_ID_TYPE queue_full; /* Queue full mask */
2782 ushort queue_full_cnt[ADV_MAX_TID + 1]; /* Queue full count */
2784 ASCEEP_CONFIG asc_eep; /* Narrow EEPROM config. */
2785 ADVEEP_3550_CONFIG adv_3550_eep; /* 3550 EEPROM config. */
2786 ADVEEP_38C0800_CONFIG adv_38C0800_eep; /* 38C0800 EEPROM config. */
2787 ADVEEP_38C1600_CONFIG adv_38C1600_eep; /* 38C1600 EEPROM config. */
2789 ulong last_reset; /* Saved last reset time */
2790 spinlock_t lock; /* Board spinlock */
2791 /* /proc/scsi/advansys/[0...] */
2792 char *prtbuf; /* /proc print buffer */
2793 #ifdef ADVANSYS_STATS
2794 struct asc_stats asc_stats; /* Board statistics */
2795 #endif /* ADVANSYS_STATS */
2797 * The following fields are used only for Narrow Boards.
2799 uchar sdtr_data[ASC_MAX_TID + 1]; /* SDTR information */
2801 * The following fields are used only for Wide Boards.
2803 void __iomem *ioremap_addr; /* I/O Memory remap address. */
2804 ushort ioport; /* I/O Port address. */
2805 ADV_CARR_T *carrp; /* ADV_CARR_T memory block. */
2806 adv_req_t *orig_reqp; /* adv_req_t memory block. */
2807 adv_req_t *adv_reqp; /* Request structures. */
2808 adv_sgblk_t *adv_sgblkp; /* Scatter-gather structures. */
2809 ushort bios_signature; /* BIOS Signature. */
2810 ushort bios_version; /* BIOS Version. */
2811 ushort bios_codeseg; /* BIOS Code Segment. */
2812 ushort bios_codelen; /* BIOS Code Segment Length. */
2815 #define adv_dvc_to_board(adv_dvc) container_of(adv_dvc, struct asc_board, \
2816 dvc_var.adv_dvc_var)
2817 #define adv_dvc_to_pdev(adv_dvc) to_pci_dev(adv_dvc_to_board(adv_dvc)->dev)
2819 /* Number of boards detected in system. */
2820 static int asc_board_count;
2822 /* Overrun buffer used by all narrow boards. */
2823 static uchar overrun_buf[ASC_OVERRUN_BSIZE] = { 0 };
2826 * Global structures required to issue a command.
2828 static ASC_SCSI_Q asc_scsi_q = { {0} };
2829 static ASC_SG_HEAD asc_sg_head = { 0 };
2831 #ifdef ADVANSYS_DEBUG
2832 static int asc_dbglvl = 3;
2833 #endif /* ADVANSYS_DEBUG */
2836 * --- Driver Function Prototypes
2839 static int advansys_slave_configure(struct scsi_device *);
2840 static int asc_execute_scsi_cmnd(struct scsi_cmnd *);
2841 static int asc_build_req(asc_board_t *, struct scsi_cmnd *);
2842 static int adv_build_req(asc_board_t *, struct scsi_cmnd *, ADV_SCSI_REQ_Q **);
2843 static int adv_get_sglist(asc_board_t *, adv_req_t *, struct scsi_cmnd *, int);
2844 #ifdef CONFIG_PROC_FS
2845 static int asc_proc_copy(off_t, off_t, char *, int, char *, int);
2846 static int asc_prt_board_devices(struct Scsi_Host *, char *, int);
2847 static int asc_prt_adv_bios(struct Scsi_Host *, char *, int);
2848 static int asc_get_eeprom_string(ushort *serialnum, uchar *cp);
2849 static int asc_prt_asc_board_eeprom(struct Scsi_Host *, char *, int);
2850 static int asc_prt_adv_board_eeprom(struct Scsi_Host *, char *, int);
2851 static int asc_prt_driver_conf(struct Scsi_Host *, char *, int);
2852 static int asc_prt_asc_board_info(struct Scsi_Host *, char *, int);
2853 static int asc_prt_adv_board_info(struct Scsi_Host *, char *, int);
2854 static int asc_prt_line(char *, int, char *fmt, ...);
2855 #endif /* CONFIG_PROC_FS */
2857 /* Statistics function prototypes. */
2858 #ifdef ADVANSYS_STATS
2859 #ifdef CONFIG_PROC_FS
2860 static int asc_prt_board_stats(struct Scsi_Host *, char *, int);
2861 #endif /* CONFIG_PROC_FS */
2862 #endif /* ADVANSYS_STATS */
2864 /* Debug function prototypes. */
2865 #ifdef ADVANSYS_DEBUG
2866 static void asc_prt_scsi_host(struct Scsi_Host *);
2867 static void asc_prt_scsi_cmnd(struct scsi_cmnd *);
2868 static void asc_prt_asc_dvc_cfg(ASC_DVC_CFG *);
2869 static void asc_prt_asc_dvc_var(ASC_DVC_VAR *);
2870 static void asc_prt_asc_scsi_q(ASC_SCSI_Q *);
2871 static void asc_prt_asc_qdone_info(ASC_QDONE_INFO *);
2872 static void asc_prt_adv_dvc_cfg(ADV_DVC_CFG *);
2873 static void asc_prt_adv_dvc_var(ADV_DVC_VAR *);
2874 static void asc_prt_adv_scsi_req_q(ADV_SCSI_REQ_Q *);
2875 static void asc_prt_adv_sgblock(int, ADV_SG_BLOCK *);
2876 static void asc_prt_hex(char *f, uchar *, int);
2877 #endif /* ADVANSYS_DEBUG */
2879 #ifdef CONFIG_PROC_FS
2881 * advansys_proc_info() - /proc/scsi/advansys/{0,1,2,3,...}
2883 * *buffer: I/O buffer
2884 * **start: if inout == FALSE pointer into buffer where user read should start
2885 * offset: current offset into a /proc/scsi/advansys/[0...] file
2886 * length: length of buffer
2887 * hostno: Scsi_Host host_no
2888 * inout: TRUE - user is writing; FALSE - user is reading
2890 * Return the number of bytes read from or written to a
2891 * /proc/scsi/advansys/[0...] file.
2893 * Note: This function uses the per board buffer 'prtbuf' which is
2894 * allocated when the board is initialized in advansys_detect(). The
2895 * buffer is ASC_PRTBUF_SIZE bytes. The function asc_proc_copy() is
2896 * used to write to the buffer. The way asc_proc_copy() is written
2897 * if 'prtbuf' is too small it will not be overwritten. Instead the
2898 * user just won't get all the available statistics.
2901 advansys_proc_info(struct Scsi_Host *shost, char *buffer, char **start,
2902 off_t offset, int length, int inout)
2904 asc_board_t *boardp;
2913 ASC_DBG(1, "advansys_proc_info: begin\n");
2916 * User write not supported.
2918 if (inout == TRUE) {
2923 * User read of /proc/scsi/advansys/[0...] file.
2926 boardp = ASC_BOARDP(shost);
2928 /* Copy read data starting at the beginning of the buffer. */
2936 * Get board configuration information.
2938 * advansys_info() returns the board string from its own static buffer.
2940 cp = (char *)advansys_info(shost);
2943 /* Copy board information. */
2944 cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen);
2948 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
2955 * Display Wide Board BIOS Information.
2957 if (ASC_WIDE_BOARD(boardp)) {
2958 cp = boardp->prtbuf;
2959 cplen = asc_prt_adv_bios(shost, cp, ASC_PRTBUF_SIZE);
2960 ASC_ASSERT(cplen < ASC_PRTBUF_SIZE);
2961 cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp,
2966 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
2974 * Display driver information for each device attached to the board.
2976 cp = boardp->prtbuf;
2977 cplen = asc_prt_board_devices(shost, cp, ASC_PRTBUF_SIZE);
2978 ASC_ASSERT(cplen < ASC_PRTBUF_SIZE);
2979 cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen);
2983 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
2990 * Display EEPROM configuration for the board.
2992 cp = boardp->prtbuf;
2993 if (ASC_NARROW_BOARD(boardp)) {
2994 cplen = asc_prt_asc_board_eeprom(shost, cp, ASC_PRTBUF_SIZE);
2996 cplen = asc_prt_adv_board_eeprom(shost, cp, ASC_PRTBUF_SIZE);
2998 ASC_ASSERT(cplen < ASC_PRTBUF_SIZE);
2999 cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen);
3003 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
3010 * Display driver configuration and information for the board.
3012 cp = boardp->prtbuf;
3013 cplen = asc_prt_driver_conf(shost, cp, ASC_PRTBUF_SIZE);
3014 ASC_ASSERT(cplen < ASC_PRTBUF_SIZE);
3015 cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen);
3019 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
3025 #ifdef ADVANSYS_STATS
3027 * Display driver statistics for the board.
3029 cp = boardp->prtbuf;
3030 cplen = asc_prt_board_stats(shost, cp, ASC_PRTBUF_SIZE);
3031 ASC_ASSERT(cplen <= ASC_PRTBUF_SIZE);
3032 cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen);
3036 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
3041 #endif /* ADVANSYS_STATS */
3044 * Display Asc Library dynamic configuration information
3047 cp = boardp->prtbuf;
3048 if (ASC_NARROW_BOARD(boardp)) {
3049 cplen = asc_prt_asc_board_info(shost, cp, ASC_PRTBUF_SIZE);
3051 cplen = asc_prt_adv_board_info(shost, cp, ASC_PRTBUF_SIZE);
3053 ASC_ASSERT(cplen < ASC_PRTBUF_SIZE);
3054 cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen);
3058 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
3064 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
3068 #endif /* CONFIG_PROC_FS */
3073 * Return suitable for printing on the console with the argument
3074 * adapter's configuration information.
3076 * Note: The information line should not exceed ASC_INFO_SIZE bytes,
3077 * otherwise the static 'info' array will be overrun.
3079 static const char *advansys_info(struct Scsi_Host *shost)
3081 static char info[ASC_INFO_SIZE];
3082 asc_board_t *boardp;
3083 ASC_DVC_VAR *asc_dvc_varp;
3084 ADV_DVC_VAR *adv_dvc_varp;
3086 char *widename = NULL;
3088 boardp = ASC_BOARDP(shost);
3089 if (ASC_NARROW_BOARD(boardp)) {
3090 asc_dvc_varp = &boardp->dvc_var.asc_dvc_var;
3091 ASC_DBG(1, "advansys_info: begin\n");
3092 if (asc_dvc_varp->bus_type & ASC_IS_ISA) {
3093 if ((asc_dvc_varp->bus_type & ASC_IS_ISAPNP) ==
3095 busname = "ISA PnP";
3100 "AdvanSys SCSI %s: %s: IO 0x%lX-0x%lX, IRQ 0x%X, DMA 0x%X",
3101 ASC_VERSION, busname,
3102 (ulong)shost->io_port,
3103 (ulong)shost->io_port + ASC_IOADR_GAP - 1,
3104 shost->irq, shost->dma_channel);
3106 if (asc_dvc_varp->bus_type & ASC_IS_VL) {
3108 } else if (asc_dvc_varp->bus_type & ASC_IS_EISA) {
3110 } else if (asc_dvc_varp->bus_type & ASC_IS_PCI) {
3111 if ((asc_dvc_varp->bus_type & ASC_IS_PCI_ULTRA)
3112 == ASC_IS_PCI_ULTRA) {
3113 busname = "PCI Ultra";
3119 ASC_PRINT2("advansys_info: board %d: unknown "
3120 "bus type %d\n", boardp->id,
3121 asc_dvc_varp->bus_type);
3124 "AdvanSys SCSI %s: %s: IO 0x%lX-0x%lX, IRQ 0x%X",
3125 ASC_VERSION, busname, (ulong)shost->io_port,
3126 (ulong)shost->io_port + ASC_IOADR_GAP - 1,
3131 * Wide Adapter Information
3133 * Memory-mapped I/O is used instead of I/O space to access
3134 * the adapter, but display the I/O Port range. The Memory
3135 * I/O address is displayed through the driver /proc file.
3137 adv_dvc_varp = &boardp->dvc_var.adv_dvc_var;
3138 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
3139 widename = "Ultra-Wide";
3140 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
3141 widename = "Ultra2-Wide";
3143 widename = "Ultra3-Wide";
3146 "AdvanSys SCSI %s: PCI %s: PCIMEM 0x%lX-0x%lX, IRQ 0x%X",
3147 ASC_VERSION, widename, (ulong)adv_dvc_varp->iop_base,
3148 (ulong)adv_dvc_varp->iop_base + boardp->asc_n_io_port - 1, shost->irq);
3150 ASC_ASSERT(strlen(info) < ASC_INFO_SIZE);
3151 ASC_DBG(1, "advansys_info: end\n");
3155 static void asc_scsi_done(struct scsi_cmnd *scp)
3157 struct asc_board *boardp = ASC_BOARDP(scp->device->host);
3160 dma_unmap_sg(boardp->dev,
3161 (struct scatterlist *)scp->request_buffer,
3162 scp->use_sg, scp->sc_data_direction);
3163 else if (scp->request_bufflen)
3164 dma_unmap_single(boardp->dev, scp->SCp.dma_handle,
3165 scp->request_bufflen, scp->sc_data_direction);
3167 ASC_STATS(scp->device->host, done);
3169 scp->scsi_done(scp);
3173 * advansys_queuecommand() - interrupt-driven I/O entrypoint.
3175 * This function always returns 0. Command return status is saved
3176 * in the 'scp' result field.
3179 advansys_queuecommand(struct scsi_cmnd *scp, void (*done)(struct scsi_cmnd *))
3181 struct Scsi_Host *shost = scp->device->host;
3182 asc_board_t *boardp = ASC_BOARDP(shost);
3183 unsigned long flags;
3184 int asc_res, result = 0;
3186 ASC_STATS(shost, queuecommand);
3187 scp->scsi_done = done;
3190 * host_lock taken by mid-level prior to call, but need
3191 * to protect against own ISR
3193 spin_lock_irqsave(&boardp->lock, flags);
3194 asc_res = asc_execute_scsi_cmnd(scp);
3195 spin_unlock_irqrestore(&boardp->lock, flags);
3201 result = SCSI_MLQUEUE_HOST_BUSY;
3215 * Reset the bus associated with the command 'scp'.
3217 * This function runs its own thread. Interrupts must be blocked but
3218 * sleeping is allowed and no locking other than for host structures is
3219 * required. Returns SUCCESS or FAILED.
3221 static int advansys_reset(struct scsi_cmnd *scp)
3223 struct Scsi_Host *shost;
3224 asc_board_t *boardp;
3225 ASC_DVC_VAR *asc_dvc_varp;
3226 ADV_DVC_VAR *adv_dvc_varp;
3231 ASC_DBG1(1, "advansys_reset: 0x%lx\n", (ulong)scp);
3233 #ifdef ADVANSYS_STATS
3234 if (scp->device->host != NULL) {
3235 ASC_STATS(scp->device->host, reset);
3237 #endif /* ADVANSYS_STATS */
3239 if ((shost = scp->device->host) == NULL) {
3240 scp->result = HOST_BYTE(DID_ERROR);
3244 boardp = ASC_BOARDP(shost);
3246 ASC_PRINT1("advansys_reset: board %d: SCSI bus reset started...\n",
3249 * Check for re-entrancy.
3251 spin_lock_irqsave(&boardp->lock, flags);
3252 if (boardp->flags & ASC_HOST_IN_RESET) {
3253 spin_unlock_irqrestore(&boardp->lock, flags);
3256 boardp->flags |= ASC_HOST_IN_RESET;
3257 spin_unlock_irqrestore(&boardp->lock, flags);
3259 if (ASC_NARROW_BOARD(boardp)) {
3263 asc_dvc_varp = &boardp->dvc_var.asc_dvc_var;
3266 * Reset the chip and SCSI bus.
3268 ASC_DBG(1, "advansys_reset: before AscInitAsc1000Driver()\n");
3269 status = AscInitAsc1000Driver(asc_dvc_varp);
3271 /* Refer to ASC_IERR_* defintions for meaning of 'err_code'. */
3272 if (asc_dvc_varp->err_code) {
3273 ASC_PRINT2("advansys_reset: board %d: SCSI bus reset "
3274 "error: 0x%x\n", boardp->id,
3275 asc_dvc_varp->err_code);
3277 } else if (status) {
3278 ASC_PRINT2("advansys_reset: board %d: SCSI bus reset "
3279 "warning: 0x%x\n", boardp->id, status);
3281 ASC_PRINT1("advansys_reset: board %d: SCSI bus reset "
3282 "successful.\n", boardp->id);
3285 ASC_DBG(1, "advansys_reset: after AscInitAsc1000Driver()\n");
3286 spin_lock_irqsave(&boardp->lock, flags);
3292 * If the suggest reset bus flags are set, then reset the bus.
3293 * Otherwise only reset the device.
3295 adv_dvc_varp = &boardp->dvc_var.adv_dvc_var;
3298 * Reset the target's SCSI bus.
3300 ASC_DBG(1, "advansys_reset: before AdvResetChipAndSB()\n");
3301 switch (AdvResetChipAndSB(adv_dvc_varp)) {
3303 ASC_PRINT1("advansys_reset: board %d: SCSI bus reset "
3304 "successful.\n", boardp->id);
3308 ASC_PRINT1("advansys_reset: board %d: SCSI bus reset "
3309 "error.\n", boardp->id);
3313 spin_lock_irqsave(&boardp->lock, flags);
3314 (void)AdvISR(adv_dvc_varp);
3316 /* Board lock is held. */
3318 /* Save the time of the most recently completed reset. */
3319 boardp->last_reset = jiffies;
3321 /* Clear reset flag. */
3322 boardp->flags &= ~ASC_HOST_IN_RESET;
3323 spin_unlock_irqrestore(&boardp->lock, flags);
3325 ASC_DBG1(1, "advansys_reset: ret %d\n", ret);
3331 * advansys_biosparam()
3333 * Translate disk drive geometry if the "BIOS greater than 1 GB"
3334 * support is enabled for a drive.
3336 * ip (information pointer) is an int array with the following definition:
3342 advansys_biosparam(struct scsi_device *sdev, struct block_device *bdev,
3343 sector_t capacity, int ip[])
3345 asc_board_t *boardp;
3347 ASC_DBG(1, "advansys_biosparam: begin\n");
3348 ASC_STATS(sdev->host, biosparam);
3349 boardp = ASC_BOARDP(sdev->host);
3350 if (ASC_NARROW_BOARD(boardp)) {
3351 if ((boardp->dvc_var.asc_dvc_var.dvc_cntl &
3352 ASC_CNTL_BIOS_GT_1GB) && capacity > 0x200000) {
3360 if ((boardp->dvc_var.adv_dvc_var.bios_ctrl &
3361 BIOS_CTRL_EXTENDED_XLAT) && capacity > 0x200000) {
3369 ip[2] = (unsigned long)capacity / (ip[0] * ip[1]);
3370 ASC_DBG(1, "advansys_biosparam: end\n");
3374 static struct scsi_host_template advansys_template = {
3375 .proc_name = "advansys",
3376 #ifdef CONFIG_PROC_FS
3377 .proc_info = advansys_proc_info,
3380 .info = advansys_info,
3381 .queuecommand = advansys_queuecommand,
3382 .eh_bus_reset_handler = advansys_reset,
3383 .bios_param = advansys_biosparam,
3384 .slave_configure = advansys_slave_configure,
3386 * Because the driver may control an ISA adapter 'unchecked_isa_dma'
3387 * must be set. The flag will be cleared in advansys_board_found
3388 * for non-ISA adapters.
3390 .unchecked_isa_dma = 1,
3392 * All adapters controlled by this driver are capable of large
3393 * scatter-gather lists. According to the mid-level SCSI documentation
3394 * this obviates any performance gain provided by setting
3395 * 'use_clustering'. But empirically while CPU utilization is increased
3396 * by enabling clustering, I/O throughput increases as well.
3398 .use_clustering = ENABLE_CLUSTERING,
3402 * --- Miscellaneous Driver Functions
3406 * First-level interrupt handler.
3408 * 'dev_id' is a pointer to the interrupting adapter's asc_board_t. Because
3409 * all boards are currently checked for interrupts on each interrupt, 'dev_id'
3410 * is not referenced. 'dev_id' could be used to identify an interrupt passed
3411 * to the AdvanSys driver which is for a device sharing an interrupt with
3412 * an AdvanSys adapter.
3414 static irqreturn_t advansys_interrupt(int irq, void *dev_id)
3416 unsigned long flags;
3417 struct Scsi_Host *shost = dev_id;
3418 asc_board_t *boardp = ASC_BOARDP(shost);
3419 irqreturn_t result = IRQ_NONE;
3421 ASC_DBG1(2, "advansys_interrupt: boardp 0x%p\n", boardp);
3422 spin_lock_irqsave(&boardp->lock, flags);
3423 if (ASC_NARROW_BOARD(boardp)) {
3427 if (AscIsIntPending(shost->io_port)) {
3428 result = IRQ_HANDLED;
3429 ASC_STATS(shost, interrupt);
3430 ASC_DBG(1, "advansys_interrupt: before AscISR()\n");
3431 AscISR(&boardp->dvc_var.asc_dvc_var);
3437 ASC_DBG(1, "advansys_interrupt: before AdvISR()\n");
3438 if (AdvISR(&boardp->dvc_var.adv_dvc_var)) {
3439 result = IRQ_HANDLED;
3440 ASC_STATS(shost, interrupt);
3444 spin_unlock_irqrestore(&boardp->lock, flags);
3447 * If interrupts were enabled on entry, then they
3448 * are now enabled here.
3451 ASC_DBG(1, "advansys_interrupt: end\n");
3456 advansys_narrow_slave_configure(struct scsi_device *sdev, ASC_DVC_VAR *asc_dvc)
3458 ASC_SCSI_BIT_ID_TYPE tid_bit = 1 << sdev->id;
3459 ASC_SCSI_BIT_ID_TYPE orig_use_tagged_qng = asc_dvc->use_tagged_qng;
3461 if (sdev->lun == 0) {
3462 ASC_SCSI_BIT_ID_TYPE orig_init_sdtr = asc_dvc->init_sdtr;
3463 if ((asc_dvc->cfg->sdtr_enable & tid_bit) && sdev->sdtr) {
3464 asc_dvc->init_sdtr |= tid_bit;
3466 asc_dvc->init_sdtr &= ~tid_bit;
3469 if (orig_init_sdtr != asc_dvc->init_sdtr)
3470 AscAsyncFix(asc_dvc, sdev);
3473 if (sdev->tagged_supported) {
3474 if (asc_dvc->cfg->cmd_qng_enabled & tid_bit) {
3475 if (sdev->lun == 0) {
3476 asc_dvc->cfg->can_tagged_qng |= tid_bit;
3477 asc_dvc->use_tagged_qng |= tid_bit;
3479 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG,
3480 asc_dvc->max_dvc_qng[sdev->id]);
3483 if (sdev->lun == 0) {
3484 asc_dvc->cfg->can_tagged_qng &= ~tid_bit;
3485 asc_dvc->use_tagged_qng &= ~tid_bit;
3487 scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
3490 if ((sdev->lun == 0) &&
3491 (orig_use_tagged_qng != asc_dvc->use_tagged_qng)) {
3492 AscWriteLramByte(asc_dvc->iop_base, ASCV_DISC_ENABLE_B,
3493 asc_dvc->cfg->disc_enable);
3494 AscWriteLramByte(asc_dvc->iop_base, ASCV_USE_TAGGED_QNG_B,
3495 asc_dvc->use_tagged_qng);
3496 AscWriteLramByte(asc_dvc->iop_base, ASCV_CAN_TAGGED_QNG_B,
3497 asc_dvc->cfg->can_tagged_qng);
3499 asc_dvc->max_dvc_qng[sdev->id] =
3500 asc_dvc->cfg->max_tag_qng[sdev->id];
3501 AscWriteLramByte(asc_dvc->iop_base,
3502 (ushort)(ASCV_MAX_DVC_QNG_BEG + sdev->id),
3503 asc_dvc->max_dvc_qng[sdev->id]);
3510 * If the EEPROM enabled WDTR for the device and the device supports wide
3511 * bus (16 bit) transfers, then turn on the device's 'wdtr_able' bit and
3512 * write the new value to the microcode.
3515 advansys_wide_enable_wdtr(AdvPortAddr iop_base, unsigned short tidmask)
3517 unsigned short cfg_word;
3518 AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, cfg_word);
3519 if ((cfg_word & tidmask) != 0)
3522 cfg_word |= tidmask;
3523 AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, cfg_word);
3526 * Clear the microcode SDTR and WDTR negotiation done indicators for
3527 * the target to cause it to negotiate with the new setting set above.
3528 * WDTR when accepted causes the target to enter asynchronous mode, so
3529 * SDTR must be negotiated.
3531 AdvReadWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word);
3532 cfg_word &= ~tidmask;
3533 AdvWriteWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word);
3534 AdvReadWordLram(iop_base, ASC_MC_WDTR_DONE, cfg_word);
3535 cfg_word &= ~tidmask;
3536 AdvWriteWordLram(iop_base, ASC_MC_WDTR_DONE, cfg_word);
3540 * Synchronous Transfers
3542 * If the EEPROM enabled SDTR for the device and the device
3543 * supports synchronous transfers, then turn on the device's
3544 * 'sdtr_able' bit. Write the new value to the microcode.
3547 advansys_wide_enable_sdtr(AdvPortAddr iop_base, unsigned short tidmask)
3549 unsigned short cfg_word;
3550 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, cfg_word);
3551 if ((cfg_word & tidmask) != 0)
3554 cfg_word |= tidmask;
3555 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, cfg_word);
3558 * Clear the microcode "SDTR negotiation" done indicator for the
3559 * target to cause it to negotiate with the new setting set above.
3561 AdvReadWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word);
3562 cfg_word &= ~tidmask;
3563 AdvWriteWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word);
3567 * PPR (Parallel Protocol Request) Capable
3569 * If the device supports DT mode, then it must be PPR capable.
3570 * The PPR message will be used in place of the SDTR and WDTR
3571 * messages to negotiate synchronous speed and offset, transfer
3572 * width, and protocol options.
3574 static void advansys_wide_enable_ppr(ADV_DVC_VAR *adv_dvc,
3575 AdvPortAddr iop_base, unsigned short tidmask)
3577 AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, adv_dvc->ppr_able);
3578 adv_dvc->ppr_able |= tidmask;
3579 AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, adv_dvc->ppr_able);
3583 advansys_wide_slave_configure(struct scsi_device *sdev, ADV_DVC_VAR *adv_dvc)
3585 AdvPortAddr iop_base = adv_dvc->iop_base;
3586 unsigned short tidmask = 1 << sdev->id;
3588 if (sdev->lun == 0) {
3590 * Handle WDTR, SDTR, and Tag Queuing. If the feature
3591 * is enabled in the EEPROM and the device supports the
3592 * feature, then enable it in the microcode.
3595 if ((adv_dvc->wdtr_able & tidmask) && sdev->wdtr)
3596 advansys_wide_enable_wdtr(iop_base, tidmask);
3597 if ((adv_dvc->sdtr_able & tidmask) && sdev->sdtr)
3598 advansys_wide_enable_sdtr(iop_base, tidmask);
3599 if (adv_dvc->chip_type == ADV_CHIP_ASC38C1600 && sdev->ppr)
3600 advansys_wide_enable_ppr(adv_dvc, iop_base, tidmask);
3603 * Tag Queuing is disabled for the BIOS which runs in polled
3604 * mode and would see no benefit from Tag Queuing. Also by
3605 * disabling Tag Queuing in the BIOS devices with Tag Queuing
3606 * bugs will at least work with the BIOS.
3608 if ((adv_dvc->tagqng_able & tidmask) &&
3609 sdev->tagged_supported) {
3610 unsigned short cfg_word;
3611 AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, cfg_word);
3612 cfg_word |= tidmask;
3613 AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE,
3615 AdvWriteByteLram(iop_base,
3616 ASC_MC_NUMBER_OF_MAX_CMD + sdev->id,
3617 adv_dvc->max_dvc_qng);
3621 if ((adv_dvc->tagqng_able & tidmask) && sdev->tagged_supported) {
3622 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG,
3623 adv_dvc->max_dvc_qng);
3625 scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
3630 * Set the number of commands to queue per device for the
3631 * specified host adapter.
3633 static int advansys_slave_configure(struct scsi_device *sdev)
3635 asc_board_t *boardp = ASC_BOARDP(sdev->host);
3636 boardp->flags |= ASC_SELECT_QUEUE_DEPTHS;
3639 * Save a pointer to the sdev and set its initial/maximum
3640 * queue depth. Only save the pointer for a lun0 dev though.
3643 boardp->device[sdev->id] = sdev;
3645 if (ASC_NARROW_BOARD(boardp))
3646 advansys_narrow_slave_configure(sdev,
3647 &boardp->dvc_var.asc_dvc_var);
3649 advansys_wide_slave_configure(sdev,
3650 &boardp->dvc_var.adv_dvc_var);
3656 * Execute a single 'Scsi_Cmnd'.
3658 * The function 'done' is called when the request has been completed.
3662 * host - board controlling device
3663 * device - device to send command
3664 * target - target of device
3665 * lun - lun of device
3666 * cmd_len - length of SCSI CDB
3667 * cmnd - buffer for SCSI 8, 10, or 12 byte CDB
3668 * use_sg - if non-zero indicates scatter-gather request with use_sg elements
3670 * if (use_sg == 0) {
3671 * request_buffer - buffer address for request
3672 * request_bufflen - length of request buffer
3674 * request_buffer - pointer to scatterlist structure
3677 * sense_buffer - sense command buffer
3679 * result (4 bytes of an int):
3681 * 0 SCSI Status Byte Code
3682 * 1 SCSI One Byte Message Code
3684 * 3 Mid-Level Error Code
3686 * host driver fields:
3687 * SCp - Scsi_Pointer used for command processing status
3688 * scsi_done - used to save caller's done function
3689 * host_scribble - used for pointer to another struct scsi_cmnd
3691 * If this function returns ASC_NOERROR the request will be completed
3692 * from the interrupt handler.
3694 * If this function returns ASC_ERROR the host error code has been set,
3695 * and the called must call asc_scsi_done.
3697 * If ASC_BUSY is returned the request will be returned to the midlayer
3698 * and re-tried later.
3700 static int asc_execute_scsi_cmnd(struct scsi_cmnd *scp)
3702 asc_board_t *boardp;
3703 ASC_DVC_VAR *asc_dvc_varp;
3704 ADV_DVC_VAR *adv_dvc_varp;
3705 ADV_SCSI_REQ_Q *adv_scsiqp;
3706 struct scsi_device *device;
3709 ASC_DBG2(1, "asc_execute_scsi_cmnd: scp 0x%lx, done 0x%lx\n",
3710 (ulong)scp, (ulong)scp->scsi_done);
3712 boardp = ASC_BOARDP(scp->device->host);
3713 device = boardp->device[scp->device->id];
3715 if (ASC_NARROW_BOARD(boardp)) {
3717 * Build and execute Narrow Board request.
3720 asc_dvc_varp = &boardp->dvc_var.asc_dvc_var;
3723 * Build Asc Library request structure using the
3724 * global structures 'asc_scsi_req' and 'asc_sg_head'.
3726 * If an error is returned, then the request has been
3727 * queued on the board done queue. It will be completed
3730 * asc_build_req() can not return ASC_BUSY.
3732 if (asc_build_req(boardp, scp) == ASC_ERROR) {
3733 ASC_STATS(scp->device->host, build_error);
3737 switch (ret = AscExeScsiQueue(asc_dvc_varp, &asc_scsi_q)) {
3739 ASC_STATS(scp->device->host, exe_noerror);
3741 * Increment monotonically increasing per device
3742 * successful request counter. Wrapping doesn't matter.
3744 boardp->reqcnt[scp->device->id]++;
3745 ASC_DBG(1, "asc_execute_scsi_cmnd: AscExeScsiQueue(), "
3749 ASC_STATS(scp->device->host, exe_busy);
3752 ASC_PRINT2("asc_execute_scsi_cmnd: board %d: "
3753 "AscExeScsiQueue() ASC_ERROR, err_code 0x%x\n",
3754 boardp->id, asc_dvc_varp->err_code);
3755 ASC_STATS(scp->device->host, exe_error);
3756 scp->result = HOST_BYTE(DID_ERROR);
3759 ASC_PRINT2("asc_execute_scsi_cmnd: board %d: "
3760 "AscExeScsiQueue() unknown, err_code 0x%x\n",
3761 boardp->id, asc_dvc_varp->err_code);
3762 ASC_STATS(scp->device->host, exe_unknown);
3763 scp->result = HOST_BYTE(DID_ERROR);
3768 * Build and execute Wide Board request.
3770 adv_dvc_varp = &boardp->dvc_var.adv_dvc_var;
3773 * Build and get a pointer to an Adv Library request structure.
3775 * If the request is successfully built then send it below,
3776 * otherwise return with an error.
3778 switch (adv_build_req(boardp, scp, &adv_scsiqp)) {
3780 ASC_DBG(3, "asc_execute_scsi_cmnd: adv_build_req "
3784 ASC_DBG(1, "asc_execute_scsi_cmnd: adv_build_req "
3787 * The asc_stats fields 'adv_build_noreq' and
3788 * 'adv_build_nosg' count wide board busy conditions.
3789 * They are updated in adv_build_req and
3790 * adv_get_sglist, respectively.
3795 ASC_DBG(1, "asc_execute_scsi_cmnd: adv_build_req "
3797 ASC_STATS(scp->device->host, build_error);
3801 switch (ret = AdvExeScsiQueue(adv_dvc_varp, adv_scsiqp)) {
3803 ASC_STATS(scp->device->host, exe_noerror);
3805 * Increment monotonically increasing per device
3806 * successful request counter. Wrapping doesn't matter.
3808 boardp->reqcnt[scp->device->id]++;
3809 ASC_DBG(1, "asc_execute_scsi_cmnd: AdvExeScsiQueue(), "
3813 ASC_STATS(scp->device->host, exe_busy);
3816 ASC_PRINT2("asc_execute_scsi_cmnd: board %d: "
3817 "AdvExeScsiQueue() ASC_ERROR, err_code 0x%x\n",
3818 boardp->id, adv_dvc_varp->err_code);
3819 ASC_STATS(scp->device->host, exe_error);
3820 scp->result = HOST_BYTE(DID_ERROR);
3823 ASC_PRINT2("asc_execute_scsi_cmnd: board %d: "
3824 "AdvExeScsiQueue() unknown, err_code 0x%x\n",
3825 boardp->id, adv_dvc_varp->err_code);
3826 ASC_STATS(scp->device->host, exe_unknown);
3827 scp->result = HOST_BYTE(DID_ERROR);
3832 ASC_DBG(1, "asc_execute_scsi_cmnd: end\n");
3837 * Build a request structure for the Asc Library (Narrow Board).
3839 * The global structures 'asc_scsi_q' and 'asc_sg_head' are
3840 * used to build the request.
3842 * If an error occurs, then return ASC_ERROR.
3844 static int asc_build_req(asc_board_t *boardp, struct scsi_cmnd *scp)
3847 * Mutually exclusive access is required to 'asc_scsi_q' and
3848 * 'asc_sg_head' until after the request is started.
3850 memset(&asc_scsi_q, 0, sizeof(ASC_SCSI_Q));
3853 * Point the ASC_SCSI_Q to the 'struct scsi_cmnd'.
3855 asc_scsi_q.q2.srb_ptr = ASC_VADDR_TO_U32(scp);
3858 * Build the ASC_SCSI_Q request.
3860 asc_scsi_q.cdbptr = &scp->cmnd[0];
3861 asc_scsi_q.q2.cdb_len = scp->cmd_len;
3862 asc_scsi_q.q1.target_id = ASC_TID_TO_TARGET_ID(scp->device->id);
3863 asc_scsi_q.q1.target_lun = scp->device->lun;
3864 asc_scsi_q.q2.target_ix =
3865 ASC_TIDLUN_TO_IX(scp->device->id, scp->device->lun);
3866 asc_scsi_q.q1.sense_addr =
3867 cpu_to_le32(virt_to_bus(&scp->sense_buffer[0]));
3868 asc_scsi_q.q1.sense_len = sizeof(scp->sense_buffer);
3871 * If there are any outstanding requests for the current target,
3872 * then every 255th request send an ORDERED request. This heuristic
3873 * tries to retain the benefit of request sorting while preventing
3874 * request starvation. 255 is the max number of tags or pending commands
3875 * a device may have outstanding.
3877 * The request count is incremented below for every successfully
3881 if ((boardp->dvc_var.asc_dvc_var.cur_dvc_qng[scp->device->id] > 0) &&
3882 (boardp->reqcnt[scp->device->id] % 255) == 0) {
3883 asc_scsi_q.q2.tag_code = MSG_ORDERED_TAG;
3885 asc_scsi_q.q2.tag_code = MSG_SIMPLE_TAG;
3889 * Build ASC_SCSI_Q for a contiguous buffer or a scatter-gather
3892 if (scp->use_sg == 0) {
3894 * CDB request of single contiguous buffer.
3896 ASC_STATS(scp->device->host, cont_cnt);
3897 scp->SCp.dma_handle = scp->request_bufflen ?
3898 dma_map_single(boardp->dev, scp->request_buffer,
3899 scp->request_bufflen,
3900 scp->sc_data_direction) : 0;
3901 asc_scsi_q.q1.data_addr = cpu_to_le32(scp->SCp.dma_handle);
3902 asc_scsi_q.q1.data_cnt = cpu_to_le32(scp->request_bufflen);
3903 ASC_STATS_ADD(scp->device->host, cont_xfer,
3904 ASC_CEILING(scp->request_bufflen, 512));
3905 asc_scsi_q.q1.sg_queue_cnt = 0;
3906 asc_scsi_q.sg_head = NULL;
3909 * CDB scatter-gather request list.
3913 struct scatterlist *slp;
3915 slp = (struct scatterlist *)scp->request_buffer;
3916 use_sg = dma_map_sg(boardp->dev, slp, scp->use_sg,
3917 scp->sc_data_direction);
3919 if (use_sg > scp->device->host->sg_tablesize) {
3920 ASC_PRINT3("asc_build_req: board %d: use_sg %d > "
3921 "sg_tablesize %d\n", boardp->id, use_sg,
3922 scp->device->host->sg_tablesize);
3923 dma_unmap_sg(boardp->dev, slp, scp->use_sg,
3924 scp->sc_data_direction);
3925 scp->result = HOST_BYTE(DID_ERROR);
3929 ASC_STATS(scp->device->host, sg_cnt);
3932 * Use global ASC_SG_HEAD structure and set the ASC_SCSI_Q
3933 * structure to point to it.
3935 memset(&asc_sg_head, 0, sizeof(ASC_SG_HEAD));
3937 asc_scsi_q.q1.cntl |= QC_SG_HEAD;
3938 asc_scsi_q.sg_head = &asc_sg_head;
3939 asc_scsi_q.q1.data_cnt = 0;
3940 asc_scsi_q.q1.data_addr = 0;
3941 /* This is a byte value, otherwise it would need to be swapped. */
3942 asc_sg_head.entry_cnt = asc_scsi_q.q1.sg_queue_cnt = use_sg;
3943 ASC_STATS_ADD(scp->device->host, sg_elem,
3944 asc_sg_head.entry_cnt);
3947 * Convert scatter-gather list into ASC_SG_HEAD list.
3949 for (sgcnt = 0; sgcnt < use_sg; sgcnt++, slp++) {
3950 asc_sg_head.sg_list[sgcnt].addr =
3951 cpu_to_le32(sg_dma_address(slp));
3952 asc_sg_head.sg_list[sgcnt].bytes =
3953 cpu_to_le32(sg_dma_len(slp));
3954 ASC_STATS_ADD(scp->device->host, sg_xfer,
3955 ASC_CEILING(sg_dma_len(slp), 512));
3959 ASC_DBG_PRT_ASC_SCSI_Q(2, &asc_scsi_q);
3960 ASC_DBG_PRT_CDB(1, scp->cmnd, scp->cmd_len);
3966 * Build a request structure for the Adv Library (Wide Board).
3968 * If an adv_req_t can not be allocated to issue the request,
3969 * then return ASC_BUSY. If an error occurs, then return ASC_ERROR.
3971 * Multi-byte fields in the ASC_SCSI_REQ_Q that are used by the
3972 * microcode for DMA addresses or math operations are byte swapped
3973 * to little-endian order.
3976 adv_build_req(asc_board_t *boardp, struct scsi_cmnd *scp,
3977 ADV_SCSI_REQ_Q **adv_scsiqpp)
3980 ADV_SCSI_REQ_Q *scsiqp;
3985 * Allocate an adv_req_t structure from the board to execute
3988 if (boardp->adv_reqp == NULL) {
3989 ASC_DBG(1, "adv_build_req: no free adv_req_t\n");
3990 ASC_STATS(scp->device->host, adv_build_noreq);
3993 reqp = boardp->adv_reqp;
3994 boardp->adv_reqp = reqp->next_reqp;
3995 reqp->next_reqp = NULL;
3999 * Get 32-byte aligned ADV_SCSI_REQ_Q and ADV_SG_BLOCK pointers.
4001 scsiqp = (ADV_SCSI_REQ_Q *)ADV_32BALIGN(&reqp->scsi_req_q);
4004 * Initialize the structure.
4006 scsiqp->cntl = scsiqp->scsi_cntl = scsiqp->done_status = 0;
4009 * Set the ADV_SCSI_REQ_Q 'srb_ptr' to point to the adv_req_t structure.
4011 scsiqp->srb_ptr = ASC_VADDR_TO_U32(reqp);
4014 * Set the adv_req_t 'cmndp' to point to the struct scsi_cmnd structure.
4019 * Build the ADV_SCSI_REQ_Q request.
4022 /* Set CDB length and copy it to the request structure. */
4023 scsiqp->cdb_len = scp->cmd_len;
4024 /* Copy first 12 CDB bytes to cdb[]. */
4025 for (i = 0; i < scp->cmd_len && i < 12; i++) {
4026 scsiqp->cdb[i] = scp->cmnd[i];
4028 /* Copy last 4 CDB bytes, if present, to cdb16[]. */
4029 for (; i < scp->cmd_len; i++) {
4030 scsiqp->cdb16[i - 12] = scp->cmnd[i];
4033 scsiqp->target_id = scp->device->id;
4034 scsiqp->target_lun = scp->device->lun;
4036 scsiqp->sense_addr = cpu_to_le32(virt_to_bus(&scp->sense_buffer[0]));
4037 scsiqp->sense_len = sizeof(scp->sense_buffer);
4040 * Build ADV_SCSI_REQ_Q for a contiguous buffer or a scatter-gather
4044 scsiqp->data_cnt = cpu_to_le32(scp->request_bufflen);
4045 scsiqp->vdata_addr = scp->request_buffer;
4046 scsiqp->data_addr = cpu_to_le32(virt_to_bus(scp->request_buffer));
4048 if (scp->use_sg == 0) {
4050 * CDB request of single contiguous buffer.
4052 reqp->sgblkp = NULL;
4053 scsiqp->data_cnt = cpu_to_le32(scp->request_bufflen);
4054 if (scp->request_bufflen) {
4055 scsiqp->vdata_addr = scp->request_buffer;
4056 scp->SCp.dma_handle =
4057 dma_map_single(boardp->dev, scp->request_buffer,
4058 scp->request_bufflen,
4059 scp->sc_data_direction);
4061 scsiqp->vdata_addr = NULL;
4062 scp->SCp.dma_handle = 0;
4064 scsiqp->data_addr = cpu_to_le32(scp->SCp.dma_handle);
4065 scsiqp->sg_list_ptr = NULL;
4066 scsiqp->sg_real_addr = 0;
4067 ASC_STATS(scp->device->host, cont_cnt);
4068 ASC_STATS_ADD(scp->device->host, cont_xfer,
4069 ASC_CEILING(scp->request_bufflen, 512));
4072 * CDB scatter-gather request list.
4074 struct scatterlist *slp;
4077 slp = (struct scatterlist *)scp->request_buffer;
4078 use_sg = dma_map_sg(boardp->dev, slp, scp->use_sg,
4079 scp->sc_data_direction);
4081 if (use_sg > ADV_MAX_SG_LIST) {
4082 ASC_PRINT3("adv_build_req: board %d: use_sg %d > "
4083 "ADV_MAX_SG_LIST %d\n", boardp->id, use_sg,
4084 scp->device->host->sg_tablesize);
4085 dma_unmap_sg(boardp->dev, slp, scp->use_sg,
4086 scp->sc_data_direction);
4087 scp->result = HOST_BYTE(DID_ERROR);
4090 * Free the 'adv_req_t' structure by adding it back
4091 * to the board free list.
4093 reqp->next_reqp = boardp->adv_reqp;
4094 boardp->adv_reqp = reqp;
4099 ret = adv_get_sglist(boardp, reqp, scp, use_sg);
4100 if (ret != ADV_SUCCESS) {
4102 * Free the adv_req_t structure by adding it back to
4103 * the board free list.
4105 reqp->next_reqp = boardp->adv_reqp;
4106 boardp->adv_reqp = reqp;
4111 ASC_STATS(scp->device->host, sg_cnt);
4112 ASC_STATS_ADD(scp->device->host, sg_elem, use_sg);
4115 ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp);
4116 ASC_DBG_PRT_CDB(1, scp->cmnd, scp->cmd_len);
4118 *adv_scsiqpp = scsiqp;
4124 * Build scatter-gather list for Adv Library (Wide Board).
4126 * Additional ADV_SG_BLOCK structures will need to be allocated
4127 * if the total number of scatter-gather elements exceeds
4128 * NO_OF_SG_PER_BLOCK (15). The ADV_SG_BLOCK structures are
4129 * assumed to be physically contiguous.
4132 * ADV_SUCCESS(1) - SG List successfully created
4133 * ADV_ERROR(-1) - SG List creation failed
4136 adv_get_sglist(asc_board_t *boardp, adv_req_t *reqp, struct scsi_cmnd *scp,
4139 adv_sgblk_t *sgblkp;
4140 ADV_SCSI_REQ_Q *scsiqp;
4141 struct scatterlist *slp;
4143 ADV_SG_BLOCK *sg_block, *prev_sg_block;
4144 ADV_PADDR sg_block_paddr;
4147 scsiqp = (ADV_SCSI_REQ_Q *)ADV_32BALIGN(&reqp->scsi_req_q);
4148 slp = (struct scatterlist *)scp->request_buffer;
4149 sg_elem_cnt = use_sg;
4150 prev_sg_block = NULL;
4151 reqp->sgblkp = NULL;
4155 * Allocate a 'adv_sgblk_t' structure from the board free
4156 * list. One 'adv_sgblk_t' structure holds NO_OF_SG_PER_BLOCK
4157 * (15) scatter-gather elements.
4159 if ((sgblkp = boardp->adv_sgblkp) == NULL) {
4160 ASC_DBG(1, "adv_get_sglist: no free adv_sgblk_t\n");
4161 ASC_STATS(scp->device->host, adv_build_nosg);
4164 * Allocation failed. Free 'adv_sgblk_t' structures already
4165 * allocated for the request.
4167 while ((sgblkp = reqp->sgblkp) != NULL) {
4168 /* Remove 'sgblkp' from the request list. */
4169 reqp->sgblkp = sgblkp->next_sgblkp;
4171 /* Add 'sgblkp' to the board free list. */
4172 sgblkp->next_sgblkp = boardp->adv_sgblkp;
4173 boardp->adv_sgblkp = sgblkp;
4177 /* Complete 'adv_sgblk_t' board allocation. */
4178 boardp->adv_sgblkp = sgblkp->next_sgblkp;
4179 sgblkp->next_sgblkp = NULL;
4182 * Get 8 byte aligned virtual and physical addresses for
4183 * the allocated ADV_SG_BLOCK structure.
4186 (ADV_SG_BLOCK *)ADV_8BALIGN(&sgblkp->sg_block);
4187 sg_block_paddr = virt_to_bus(sg_block);
4190 * Check if this is the first 'adv_sgblk_t' for the request.
4192 if (reqp->sgblkp == NULL) {
4193 /* Request's first scatter-gather block. */
4194 reqp->sgblkp = sgblkp;
4197 * Set ADV_SCSI_REQ_T ADV_SG_BLOCK virtual and physical
4200 scsiqp->sg_list_ptr = sg_block;
4201 scsiqp->sg_real_addr =
4202 cpu_to_le32(sg_block_paddr);
4204 /* Request's second or later scatter-gather block. */
4205 sgblkp->next_sgblkp = reqp->sgblkp;
4206 reqp->sgblkp = sgblkp;
4209 * Point the previous ADV_SG_BLOCK structure to
4210 * the newly allocated ADV_SG_BLOCK structure.
4212 ASC_ASSERT(prev_sg_block != NULL);
4213 prev_sg_block->sg_ptr =
4214 cpu_to_le32(sg_block_paddr);
4218 for (i = 0; i < NO_OF_SG_PER_BLOCK; i++) {
4219 sg_block->sg_list[i].sg_addr =
4220 cpu_to_le32(sg_dma_address(slp));
4221 sg_block->sg_list[i].sg_count =
4222 cpu_to_le32(sg_dma_len(slp));
4223 ASC_STATS_ADD(scp->device->host, sg_xfer,
4224 ASC_CEILING(sg_dma_len(slp), 512));
4226 if (--sg_elem_cnt == 0) { /* Last ADV_SG_BLOCK and scatter-gather entry. */
4227 sg_block->sg_cnt = i + 1;
4228 sg_block->sg_ptr = 0L; /* Last ADV_SG_BLOCK in list. */
4233 sg_block->sg_cnt = NO_OF_SG_PER_BLOCK;
4234 prev_sg_block = sg_block;
4241 * asc_isr_callback() - Second Level Interrupt Handler called by AscISR().
4243 * Interrupt callback function for the Narrow SCSI Asc Library.
4245 static void asc_isr_callback(ASC_DVC_VAR *asc_dvc_varp, ASC_QDONE_INFO *qdonep)
4247 asc_board_t *boardp;
4248 struct scsi_cmnd *scp;
4249 struct Scsi_Host *shost;
4251 ASC_DBG2(1, "asc_isr_callback: asc_dvc_varp 0x%lx, qdonep 0x%lx\n",
4252 (ulong)asc_dvc_varp, (ulong)qdonep);
4253 ASC_DBG_PRT_ASC_QDONE_INFO(2, qdonep);
4256 * Get the struct scsi_cmnd structure and Scsi_Host structure for the
4257 * command that has been completed.
4259 scp = (struct scsi_cmnd *)ASC_U32_TO_VADDR(qdonep->d2.srb_ptr);
4260 ASC_DBG1(1, "asc_isr_callback: scp 0x%lx\n", (ulong)scp);
4263 ASC_PRINT("asc_isr_callback: scp is NULL\n");
4266 ASC_DBG_PRT_CDB(2, scp->cmnd, scp->cmd_len);
4268 shost = scp->device->host;
4269 ASC_STATS(shost, callback);
4270 ASC_DBG1(1, "asc_isr_callback: shost 0x%lx\n", (ulong)shost);
4272 boardp = ASC_BOARDP(shost);
4273 ASC_ASSERT(asc_dvc_varp == &boardp->dvc_var.asc_dvc_var);
4276 * 'qdonep' contains the command's ending status.
4278 switch (qdonep->d3.done_stat) {
4280 ASC_DBG(2, "asc_isr_callback: QD_NO_ERROR\n");
4284 * Check for an underrun condition.
4286 * If there was no error and an underrun condition, then
4287 * return the number of underrun bytes.
4289 if (scp->request_bufflen != 0 && qdonep->remain_bytes != 0 &&
4290 qdonep->remain_bytes <= scp->request_bufflen) {
4292 "asc_isr_callback: underrun condition %u bytes\n",
4293 (unsigned)qdonep->remain_bytes);
4294 scp->resid = qdonep->remain_bytes;
4299 ASC_DBG(2, "asc_isr_callback: QD_WITH_ERROR\n");
4300 switch (qdonep->d3.host_stat) {
4301 case QHSTA_NO_ERROR:
4302 if (qdonep->d3.scsi_stat == SAM_STAT_CHECK_CONDITION) {
4304 "asc_isr_callback: SAM_STAT_CHECK_CONDITION\n");
4305 ASC_DBG_PRT_SENSE(2, scp->sense_buffer,
4306 sizeof(scp->sense_buffer));
4308 * Note: The 'status_byte()' macro used by target drivers
4309 * defined in scsi.h shifts the status byte returned by
4310 * host drivers right by 1 bit. This is why target drivers
4311 * also use right shifted status byte definitions. For
4312 * instance target drivers use CHECK_CONDITION, defined to
4313 * 0x1, instead of the SCSI defined check condition value
4314 * of 0x2. Host drivers are supposed to return the status
4315 * byte as it is defined by SCSI.
4317 scp->result = DRIVER_BYTE(DRIVER_SENSE) |
4318 STATUS_BYTE(qdonep->d3.scsi_stat);
4320 scp->result = STATUS_BYTE(qdonep->d3.scsi_stat);
4325 /* QHSTA error occurred */
4326 ASC_DBG1(1, "asc_isr_callback: host_stat 0x%x\n",
4327 qdonep->d3.host_stat);
4328 scp->result = HOST_BYTE(DID_BAD_TARGET);
4333 case QD_ABORTED_BY_HOST:
4334 ASC_DBG(1, "asc_isr_callback: QD_ABORTED_BY_HOST\n");
4336 HOST_BYTE(DID_ABORT) | MSG_BYTE(qdonep->d3.
4338 STATUS_BYTE(qdonep->d3.scsi_stat);
4342 ASC_DBG1(1, "asc_isr_callback: done_stat 0x%x\n",
4343 qdonep->d3.done_stat);
4345 HOST_BYTE(DID_ERROR) | MSG_BYTE(qdonep->d3.
4347 STATUS_BYTE(qdonep->d3.scsi_stat);
4352 * If the 'init_tidmask' bit isn't already set for the target and the
4353 * current request finished normally, then set the bit for the target
4354 * to indicate that a device is present.
4356 if ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(scp->device->id)) == 0 &&
4357 qdonep->d3.done_stat == QD_NO_ERROR &&
4358 qdonep->d3.host_stat == QHSTA_NO_ERROR) {
4359 boardp->init_tidmask |= ADV_TID_TO_TIDMASK(scp->device->id);
4368 * adv_isr_callback() - Second Level Interrupt Handler called by AdvISR().
4370 * Callback function for the Wide SCSI Adv Library.
4372 static void adv_isr_callback(ADV_DVC_VAR *adv_dvc_varp, ADV_SCSI_REQ_Q *scsiqp)
4374 asc_board_t *boardp;
4376 adv_sgblk_t *sgblkp;
4377 struct scsi_cmnd *scp;
4378 struct Scsi_Host *shost;
4381 ASC_DBG2(1, "adv_isr_callback: adv_dvc_varp 0x%lx, scsiqp 0x%lx\n",
4382 (ulong)adv_dvc_varp, (ulong)scsiqp);
4383 ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp);
4386 * Get the adv_req_t structure for the command that has been
4387 * completed. The adv_req_t structure actually contains the
4388 * completed ADV_SCSI_REQ_Q structure.
4390 reqp = (adv_req_t *)ADV_U32_TO_VADDR(scsiqp->srb_ptr);
4391 ASC_DBG1(1, "adv_isr_callback: reqp 0x%lx\n", (ulong)reqp);
4393 ASC_PRINT("adv_isr_callback: reqp is NULL\n");
4398 * Get the struct scsi_cmnd structure and Scsi_Host structure for the
4399 * command that has been completed.
4401 * Note: The adv_req_t request structure and adv_sgblk_t structure,
4402 * if any, are dropped, because a board structure pointer can not be
4406 ASC_DBG1(1, "adv_isr_callback: scp 0x%lx\n", (ulong)scp);
4409 ("adv_isr_callback: scp is NULL; adv_req_t dropped.\n");
4412 ASC_DBG_PRT_CDB(2, scp->cmnd, scp->cmd_len);
4414 shost = scp->device->host;
4415 ASC_STATS(shost, callback);
4416 ASC_DBG1(1, "adv_isr_callback: shost 0x%lx\n", (ulong)shost);
4418 boardp = ASC_BOARDP(shost);
4419 ASC_ASSERT(adv_dvc_varp == &boardp->dvc_var.adv_dvc_var);
4422 * 'done_status' contains the command's ending status.
4424 switch (scsiqp->done_status) {
4426 ASC_DBG(2, "adv_isr_callback: QD_NO_ERROR\n");
4430 * Check for an underrun condition.
4432 * If there was no error and an underrun condition, then
4433 * then return the number of underrun bytes.
4435 resid_cnt = le32_to_cpu(scsiqp->data_cnt);
4436 if (scp->request_bufflen != 0 && resid_cnt != 0 &&
4437 resid_cnt <= scp->request_bufflen) {
4439 "adv_isr_callback: underrun condition %lu bytes\n",
4441 scp->resid = resid_cnt;
4446 ASC_DBG(2, "adv_isr_callback: QD_WITH_ERROR\n");
4447 switch (scsiqp->host_status) {
4448 case QHSTA_NO_ERROR:
4449 if (scsiqp->scsi_status == SAM_STAT_CHECK_CONDITION) {
4451 "adv_isr_callback: SAM_STAT_CHECK_CONDITION\n");
4452 ASC_DBG_PRT_SENSE(2, scp->sense_buffer,
4453 sizeof(scp->sense_buffer));
4455 * Note: The 'status_byte()' macro used by target drivers
4456 * defined in scsi.h shifts the status byte returned by
4457 * host drivers right by 1 bit. This is why target drivers
4458 * also use right shifted status byte definitions. For
4459 * instance target drivers use CHECK_CONDITION, defined to
4460 * 0x1, instead of the SCSI defined check condition value
4461 * of 0x2. Host drivers are supposed to return the status
4462 * byte as it is defined by SCSI.
4464 scp->result = DRIVER_BYTE(DRIVER_SENSE) |
4465 STATUS_BYTE(scsiqp->scsi_status);
4467 scp->result = STATUS_BYTE(scsiqp->scsi_status);
4472 /* Some other QHSTA error occurred. */
4473 ASC_DBG1(1, "adv_isr_callback: host_status 0x%x\n",
4474 scsiqp->host_status);
4475 scp->result = HOST_BYTE(DID_BAD_TARGET);
4480 case QD_ABORTED_BY_HOST:
4481 ASC_DBG(1, "adv_isr_callback: QD_ABORTED_BY_HOST\n");
4483 HOST_BYTE(DID_ABORT) | STATUS_BYTE(scsiqp->scsi_status);
4487 ASC_DBG1(1, "adv_isr_callback: done_status 0x%x\n",
4488 scsiqp->done_status);
4490 HOST_BYTE(DID_ERROR) | STATUS_BYTE(scsiqp->scsi_status);
4495 * If the 'init_tidmask' bit isn't already set for the target and the
4496 * current request finished normally, then set the bit for the target
4497 * to indicate that a device is present.
4499 if ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(scp->device->id)) == 0 &&
4500 scsiqp->done_status == QD_NO_ERROR &&
4501 scsiqp->host_status == QHSTA_NO_ERROR) {
4502 boardp->init_tidmask |= ADV_TID_TO_TIDMASK(scp->device->id);
4508 * Free all 'adv_sgblk_t' structures allocated for the request.
4510 while ((sgblkp = reqp->sgblkp) != NULL) {
4511 /* Remove 'sgblkp' from the request list. */
4512 reqp->sgblkp = sgblkp->next_sgblkp;
4514 /* Add 'sgblkp' to the board free list. */
4515 sgblkp->next_sgblkp = boardp->adv_sgblkp;
4516 boardp->adv_sgblkp = sgblkp;
4520 * Free the adv_req_t structure used with the command by adding
4521 * it back to the board free list.
4523 reqp->next_reqp = boardp->adv_reqp;
4524 boardp->adv_reqp = reqp;
4526 ASC_DBG(1, "adv_isr_callback: done\n");
4532 * adv_async_callback() - Adv Library asynchronous event callback function.
4534 static void adv_async_callback(ADV_DVC_VAR *adv_dvc_varp, uchar code)
4537 case ADV_ASYNC_SCSI_BUS_RESET_DET:
4539 * The firmware detected a SCSI Bus reset.
4542 "adv_async_callback: ADV_ASYNC_SCSI_BUS_RESET_DET\n");
4545 case ADV_ASYNC_RDMA_FAILURE:
4547 * Handle RDMA failure by resetting the SCSI Bus and
4548 * possibly the chip if it is unresponsive. Log the error
4549 * with a unique code.
4551 ASC_DBG(0, "adv_async_callback: ADV_ASYNC_RDMA_FAILURE\n");
4552 AdvResetChipAndSB(adv_dvc_varp);
4555 case ADV_HOST_SCSI_BUS_RESET:
4557 * Host generated SCSI bus reset occurred.
4559 ASC_DBG(0, "adv_async_callback: ADV_HOST_SCSI_BUS_RESET\n");
4563 ASC_DBG1(0, "DvcAsyncCallBack: unknown code 0x%x\n", code);
4568 #ifdef CONFIG_PROC_FS
4570 * asc_prt_board_devices()
4572 * Print driver information for devices attached to the board.
4574 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
4575 * cf. asc_prt_line().
4577 * Return the number of characters copied into 'cp'. No more than
4578 * 'cplen' characters will be copied to 'cp'.
4580 static int asc_prt_board_devices(struct Scsi_Host *shost, char *cp, int cplen)
4582 asc_board_t *boardp;
4589 boardp = ASC_BOARDP(shost);
4593 len = asc_prt_line(cp, leftlen,
4594 "\nDevice Information for AdvanSys SCSI Host %d:\n",
4598 if (ASC_NARROW_BOARD(boardp)) {
4599 chip_scsi_id = boardp->dvc_cfg.asc_dvc_cfg.chip_scsi_id;
4601 chip_scsi_id = boardp->dvc_var.adv_dvc_var.chip_scsi_id;
4604 len = asc_prt_line(cp, leftlen, "Target IDs Detected:");
4606 for (i = 0; i <= ADV_MAX_TID; i++) {
4607 if (boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) {
4608 len = asc_prt_line(cp, leftlen, " %X,", i);
4612 len = asc_prt_line(cp, leftlen, " (%X=Host Adapter)\n", chip_scsi_id);
4619 * Display Wide Board BIOS Information.
4621 static int asc_prt_adv_bios(struct Scsi_Host *shost, char *cp, int cplen)
4623 asc_board_t *boardp;
4627 ushort major, minor, letter;
4629 boardp = ASC_BOARDP(shost);
4633 len = asc_prt_line(cp, leftlen, "\nROM BIOS Version: ");
4637 * If the BIOS saved a valid signature, then fill in
4638 * the BIOS code segment base address.
4640 if (boardp->bios_signature != 0x55AA) {
4641 len = asc_prt_line(cp, leftlen, "Disabled or Pre-3.1\n");
4643 len = asc_prt_line(cp, leftlen,
4644 "BIOS either disabled or Pre-3.1. If it is pre-3.1, then a newer version\n");
4646 len = asc_prt_line(cp, leftlen,
4647 "can be found at the ConnectCom FTP site: ftp://ftp.connectcom.net/pub\n");
4650 major = (boardp->bios_version >> 12) & 0xF;
4651 minor = (boardp->bios_version >> 8) & 0xF;
4652 letter = (boardp->bios_version & 0xFF);
4654 len = asc_prt_line(cp, leftlen, "%d.%d%c\n",
4656 letter >= 26 ? '?' : letter + 'A');
4660 * Current available ROM BIOS release is 3.1I for UW
4661 * and 3.2I for U2W. This code doesn't differentiate
4662 * UW and U2W boards.
4664 if (major < 3 || (major <= 3 && minor < 1) ||
4665 (major <= 3 && minor <= 1 && letter < ('I' - 'A'))) {
4666 len = asc_prt_line(cp, leftlen,
4667 "Newer version of ROM BIOS is available at the ConnectCom FTP site:\n");
4669 len = asc_prt_line(cp, leftlen,
4670 "ftp://ftp.connectcom.net/pub\n");
4679 * Add serial number to information bar if signature AAh
4680 * is found in at bit 15-9 (7 bits) of word 1.
4682 * Serial Number consists fo 12 alpha-numeric digits.
4684 * 1 - Product type (A,B,C,D..) Word0: 15-13 (3 bits)
4685 * 2 - MFG Location (A,B,C,D..) Word0: 12-10 (3 bits)
4686 * 3-4 - Product ID (0-99) Word0: 9-0 (10 bits)
4687 * 5 - Product revision (A-J) Word0: " "
4689 * Signature Word1: 15-9 (7 bits)
4690 * 6 - Year (0-9) Word1: 8-6 (3 bits) & Word2: 15 (1 bit)
4691 * 7-8 - Week of the year (1-52) Word1: 5-0 (6 bits)
4693 * 9-12 - Serial Number (A001-Z999) Word2: 14-0 (15 bits)
4695 * Note 1: Only production cards will have a serial number.
4697 * Note 2: Signature is most significant 7 bits (0xFE).
4699 * Returns ASC_TRUE if serial number found, otherwise returns ASC_FALSE.
4701 static int asc_get_eeprom_string(ushort *serialnum, uchar *cp)
4705 if ((serialnum[1] & 0xFE00) != ((ushort)0xAA << 8)) {
4709 * First word - 6 digits.
4713 /* Product type - 1st digit. */
4714 if ((*cp = 'A' + ((w & 0xE000) >> 13)) == 'H') {
4715 /* Product type is P=Prototype */
4720 /* Manufacturing location - 2nd digit. */
4721 *cp++ = 'A' + ((w & 0x1C00) >> 10);
4723 /* Product ID - 3rd, 4th digits. */
4725 *cp++ = '0' + (num / 100);
4727 *cp++ = '0' + (num / 10);
4729 /* Product revision - 5th digit. */
4730 *cp++ = 'A' + (num % 10);
4740 * If bit 15 of third word is set, then the
4741 * last digit of the year is greater than 7.
4743 if (serialnum[2] & 0x8000) {
4744 *cp++ = '8' + ((w & 0x1C0) >> 6);
4746 *cp++ = '0' + ((w & 0x1C0) >> 6);
4749 /* Week of year - 7th, 8th digits. */
4751 *cp++ = '0' + num / 10;
4758 w = serialnum[2] & 0x7FFF;
4760 /* Serial number - 9th digit. */
4761 *cp++ = 'A' + (w / 1000);
4763 /* 10th, 11th, 12th digits. */
4765 *cp++ = '0' + num / 100;
4767 *cp++ = '0' + num / 10;
4771 *cp = '\0'; /* Null Terminate the string. */
4777 * asc_prt_asc_board_eeprom()
4779 * Print board EEPROM configuration.
4781 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
4782 * cf. asc_prt_line().
4784 * Return the number of characters copied into 'cp'. No more than
4785 * 'cplen' characters will be copied to 'cp'.
4787 static int asc_prt_asc_board_eeprom(struct Scsi_Host *shost, char *cp, int cplen)
4789 asc_board_t *boardp;
4790 ASC_DVC_VAR *asc_dvc_varp;
4797 int isa_dma_speed[] = { 10, 8, 7, 6, 5, 4, 3, 2 };
4798 #endif /* CONFIG_ISA */
4799 uchar serialstr[13];
4801 boardp = ASC_BOARDP(shost);
4802 asc_dvc_varp = &boardp->dvc_var.asc_dvc_var;
4803 ep = &boardp->eep_config.asc_eep;
4808 len = asc_prt_line(cp, leftlen,
4809 "\nEEPROM Settings for AdvanSys SCSI Host %d:\n",
4813 if (asc_get_eeprom_string((ushort *)&ep->adapter_info[0], serialstr)
4816 asc_prt_line(cp, leftlen, " Serial Number: %s\n",
4820 if (ep->adapter_info[5] == 0xBB) {
4821 len = asc_prt_line(cp, leftlen,
4822 " Default Settings Used for EEPROM-less Adapter.\n");
4825 len = asc_prt_line(cp, leftlen,
4826 " Serial Number Signature Not Present.\n");
4831 len = asc_prt_line(cp, leftlen,
4832 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
4833 ASC_EEP_GET_CHIP_ID(ep), ep->max_total_qng,
4837 len = asc_prt_line(cp, leftlen,
4838 " cntl 0x%x, no_scam 0x%x\n", ep->cntl, ep->no_scam);
4841 len = asc_prt_line(cp, leftlen, " Target ID: ");
4843 for (i = 0; i <= ASC_MAX_TID; i++) {
4844 len = asc_prt_line(cp, leftlen, " %d", i);
4847 len = asc_prt_line(cp, leftlen, "\n");
4850 len = asc_prt_line(cp, leftlen, " Disconnects: ");
4852 for (i = 0; i <= ASC_MAX_TID; i++) {
4853 len = asc_prt_line(cp, leftlen, " %c",
4855 disc_enable & ADV_TID_TO_TIDMASK(i)) ? 'Y' :
4859 len = asc_prt_line(cp, leftlen, "\n");
4862 len = asc_prt_line(cp, leftlen, " Command Queuing: ");
4864 for (i = 0; i <= ASC_MAX_TID; i++) {
4865 len = asc_prt_line(cp, leftlen, " %c",
4867 use_cmd_qng & ADV_TID_TO_TIDMASK(i)) ? 'Y' :
4871 len = asc_prt_line(cp, leftlen, "\n");
4874 len = asc_prt_line(cp, leftlen, " Start Motor: ");
4876 for (i = 0; i <= ASC_MAX_TID; i++) {
4877 len = asc_prt_line(cp, leftlen, " %c",
4879 start_motor & ADV_TID_TO_TIDMASK(i)) ? 'Y' :
4883 len = asc_prt_line(cp, leftlen, "\n");
4886 len = asc_prt_line(cp, leftlen, " Synchronous Transfer:");
4888 for (i = 0; i <= ASC_MAX_TID; i++) {
4889 len = asc_prt_line(cp, leftlen, " %c",
4891 init_sdtr & ADV_TID_TO_TIDMASK(i)) ? 'Y' :
4895 len = asc_prt_line(cp, leftlen, "\n");
4899 if (asc_dvc_varp->bus_type & ASC_IS_ISA) {
4900 len = asc_prt_line(cp, leftlen,
4901 " Host ISA DMA speed: %d MB/S\n",
4902 isa_dma_speed[ASC_EEP_GET_DMA_SPD(ep)]);
4905 #endif /* CONFIG_ISA */
4911 * asc_prt_adv_board_eeprom()
4913 * Print board EEPROM configuration.
4915 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
4916 * cf. asc_prt_line().
4918 * Return the number of characters copied into 'cp'. No more than
4919 * 'cplen' characters will be copied to 'cp'.
4921 static int asc_prt_adv_board_eeprom(struct Scsi_Host *shost, char *cp, int cplen)
4923 asc_board_t *boardp;
4924 ADV_DVC_VAR *adv_dvc_varp;
4930 uchar serialstr[13];
4931 ADVEEP_3550_CONFIG *ep_3550 = NULL;
4932 ADVEEP_38C0800_CONFIG *ep_38C0800 = NULL;
4933 ADVEEP_38C1600_CONFIG *ep_38C1600 = NULL;
4936 ushort sdtr_speed = 0;
4938 boardp = ASC_BOARDP(shost);
4939 adv_dvc_varp = &boardp->dvc_var.adv_dvc_var;
4940 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
4941 ep_3550 = &boardp->eep_config.adv_3550_eep;
4942 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
4943 ep_38C0800 = &boardp->eep_config.adv_38C0800_eep;
4945 ep_38C1600 = &boardp->eep_config.adv_38C1600_eep;
4951 len = asc_prt_line(cp, leftlen,
4952 "\nEEPROM Settings for AdvanSys SCSI Host %d:\n",
4956 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
4957 wordp = &ep_3550->serial_number_word1;
4958 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
4959 wordp = &ep_38C0800->serial_number_word1;
4961 wordp = &ep_38C1600->serial_number_word1;
4964 if (asc_get_eeprom_string(wordp, serialstr) == ASC_TRUE) {
4966 asc_prt_line(cp, leftlen, " Serial Number: %s\n",
4970 len = asc_prt_line(cp, leftlen,
4971 " Serial Number Signature Not Present.\n");
4975 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
4976 len = asc_prt_line(cp, leftlen,
4977 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
4978 ep_3550->adapter_scsi_id,
4979 ep_3550->max_host_qng, ep_3550->max_dvc_qng);
4981 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
4982 len = asc_prt_line(cp, leftlen,
4983 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
4984 ep_38C0800->adapter_scsi_id,
4985 ep_38C0800->max_host_qng,
4986 ep_38C0800->max_dvc_qng);
4989 len = asc_prt_line(cp, leftlen,
4990 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
4991 ep_38C1600->adapter_scsi_id,
4992 ep_38C1600->max_host_qng,
4993 ep_38C1600->max_dvc_qng);
4996 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
4997 word = ep_3550->termination;
4998 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
4999 word = ep_38C0800->termination_lvd;
5001 word = ep_38C1600->termination_lvd;
5005 termstr = "Low Off/High Off";
5008 termstr = "Low Off/High On";
5011 termstr = "Low On/High On";
5015 termstr = "Automatic";
5019 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
5020 len = asc_prt_line(cp, leftlen,
5021 " termination: %u (%s), bios_ctrl: 0x%x\n",
5022 ep_3550->termination, termstr,
5023 ep_3550->bios_ctrl);
5025 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
5026 len = asc_prt_line(cp, leftlen,
5027 " termination: %u (%s), bios_ctrl: 0x%x\n",
5028 ep_38C0800->termination_lvd, termstr,
5029 ep_38C0800->bios_ctrl);
5032 len = asc_prt_line(cp, leftlen,
5033 " termination: %u (%s), bios_ctrl: 0x%x\n",
5034 ep_38C1600->termination_lvd, termstr,
5035 ep_38C1600->bios_ctrl);
5039 len = asc_prt_line(cp, leftlen, " Target ID: ");
5041 for (i = 0; i <= ADV_MAX_TID; i++) {
5042 len = asc_prt_line(cp, leftlen, " %X", i);
5045 len = asc_prt_line(cp, leftlen, "\n");
5048 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
5049 word = ep_3550->disc_enable;
5050 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
5051 word = ep_38C0800->disc_enable;
5053 word = ep_38C1600->disc_enable;
5055 len = asc_prt_line(cp, leftlen, " Disconnects: ");
5057 for (i = 0; i <= ADV_MAX_TID; i++) {
5058 len = asc_prt_line(cp, leftlen, " %c",
5059 (word & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N');
5062 len = asc_prt_line(cp, leftlen, "\n");
5065 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
5066 word = ep_3550->tagqng_able;
5067 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
5068 word = ep_38C0800->tagqng_able;
5070 word = ep_38C1600->tagqng_able;
5072 len = asc_prt_line(cp, leftlen, " Command Queuing: ");
5074 for (i = 0; i <= ADV_MAX_TID; i++) {
5075 len = asc_prt_line(cp, leftlen, " %c",
5076 (word & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N');
5079 len = asc_prt_line(cp, leftlen, "\n");
5082 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
5083 word = ep_3550->start_motor;
5084 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
5085 word = ep_38C0800->start_motor;
5087 word = ep_38C1600->start_motor;
5089 len = asc_prt_line(cp, leftlen, " Start Motor: ");
5091 for (i = 0; i <= ADV_MAX_TID; i++) {
5092 len = asc_prt_line(cp, leftlen, " %c",
5093 (word & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N');
5096 len = asc_prt_line(cp, leftlen, "\n");
5099 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
5100 len = asc_prt_line(cp, leftlen, " Synchronous Transfer:");
5102 for (i = 0; i <= ADV_MAX_TID; i++) {
5103 len = asc_prt_line(cp, leftlen, " %c",
5105 sdtr_able & ADV_TID_TO_TIDMASK(i)) ?
5109 len = asc_prt_line(cp, leftlen, "\n");
5113 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
5114 len = asc_prt_line(cp, leftlen, " Ultra Transfer: ");
5116 for (i = 0; i <= ADV_MAX_TID; i++) {
5117 len = asc_prt_line(cp, leftlen, " %c",
5119 ultra_able & ADV_TID_TO_TIDMASK(i))
5123 len = asc_prt_line(cp, leftlen, "\n");
5127 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
5128 word = ep_3550->wdtr_able;
5129 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
5130 word = ep_38C0800->wdtr_able;
5132 word = ep_38C1600->wdtr_able;
5134 len = asc_prt_line(cp, leftlen, " Wide Transfer: ");
5136 for (i = 0; i <= ADV_MAX_TID; i++) {
5137 len = asc_prt_line(cp, leftlen, " %c",
5138 (word & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N');
5141 len = asc_prt_line(cp, leftlen, "\n");
5144 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800 ||
5145 adv_dvc_varp->chip_type == ADV_CHIP_ASC38C1600) {
5146 len = asc_prt_line(cp, leftlen,
5147 " Synchronous Transfer Speed (Mhz):\n ");
5149 for (i = 0; i <= ADV_MAX_TID; i++) {
5153 sdtr_speed = adv_dvc_varp->sdtr_speed1;
5154 } else if (i == 4) {
5155 sdtr_speed = adv_dvc_varp->sdtr_speed2;
5156 } else if (i == 8) {
5157 sdtr_speed = adv_dvc_varp->sdtr_speed3;
5158 } else if (i == 12) {
5159 sdtr_speed = adv_dvc_varp->sdtr_speed4;
5161 switch (sdtr_speed & ADV_MAX_TID) {
5184 len = asc_prt_line(cp, leftlen, "%X:%s ", i, speed_str);
5187 len = asc_prt_line(cp, leftlen, "\n ");
5192 len = asc_prt_line(cp, leftlen, "\n");
5200 * asc_prt_driver_conf()
5202 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
5203 * cf. asc_prt_line().
5205 * Return the number of characters copied into 'cp'. No more than
5206 * 'cplen' characters will be copied to 'cp'.
5208 static int asc_prt_driver_conf(struct Scsi_Host *shost, char *cp, int cplen)
5210 asc_board_t *boardp;
5216 boardp = ASC_BOARDP(shost);
5221 len = asc_prt_line(cp, leftlen,
5222 "\nLinux Driver Configuration and Information for AdvanSys SCSI Host %d:\n",
5226 len = asc_prt_line(cp, leftlen,
5227 " host_busy %u, last_reset %u, max_id %u, max_lun %u, max_channel %u\n",
5228 shost->host_busy, shost->last_reset, shost->max_id,
5229 shost->max_lun, shost->max_channel);
5232 len = asc_prt_line(cp, leftlen,
5233 " unique_id %d, can_queue %d, this_id %d, sg_tablesize %u, cmd_per_lun %u\n",
5234 shost->unique_id, shost->can_queue, shost->this_id,
5235 shost->sg_tablesize, shost->cmd_per_lun);
5238 len = asc_prt_line(cp, leftlen,
5239 " unchecked_isa_dma %d, use_clustering %d\n",
5240 shost->unchecked_isa_dma, shost->use_clustering);
5243 len = asc_prt_line(cp, leftlen,
5244 " flags 0x%x, last_reset 0x%x, jiffies 0x%x, asc_n_io_port 0x%x\n",
5245 boardp->flags, boardp->last_reset, jiffies,
5246 boardp->asc_n_io_port);
5249 len = asc_prt_line(cp, leftlen, " io_port 0x%x\n", shost->io_port);
5252 if (ASC_NARROW_BOARD(boardp)) {
5253 chip_scsi_id = boardp->dvc_cfg.asc_dvc_cfg.chip_scsi_id;
5255 chip_scsi_id = boardp->dvc_var.adv_dvc_var.chip_scsi_id;
5262 * asc_prt_asc_board_info()
5264 * Print dynamic board configuration information.
5266 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
5267 * cf. asc_prt_line().
5269 * Return the number of characters copied into 'cp'. No more than
5270 * 'cplen' characters will be copied to 'cp'.
5272 static int asc_prt_asc_board_info(struct Scsi_Host *shost, char *cp, int cplen)
5274 asc_board_t *boardp;
5282 int renegotiate = 0;
5284 boardp = ASC_BOARDP(shost);
5285 v = &boardp->dvc_var.asc_dvc_var;
5286 c = &boardp->dvc_cfg.asc_dvc_cfg;
5287 chip_scsi_id = c->chip_scsi_id;
5292 len = asc_prt_line(cp, leftlen,
5293 "\nAsc Library Configuration and Statistics for AdvanSys SCSI Host %d:\n",
5297 len = asc_prt_line(cp, leftlen,
5298 " chip_version %u, lib_version 0x%x, lib_serial_no %u, mcode_date 0x%x\n",
5299 c->chip_version, c->lib_version, c->lib_serial_no,
5303 len = asc_prt_line(cp, leftlen,
5304 " mcode_version 0x%x, err_code %u\n",
5305 c->mcode_version, v->err_code);
5308 /* Current number of commands waiting for the host. */
5309 len = asc_prt_line(cp, leftlen,
5310 " Total Command Pending: %d\n", v->cur_total_qng);
5313 len = asc_prt_line(cp, leftlen, " Command Queuing:");
5315 for (i = 0; i <= ASC_MAX_TID; i++) {
5316 if ((chip_scsi_id == i) ||
5317 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
5320 len = asc_prt_line(cp, leftlen, " %X:%c",
5323 use_tagged_qng & ADV_TID_TO_TIDMASK(i)) ?
5327 len = asc_prt_line(cp, leftlen, "\n");
5330 /* Current number of commands waiting for a device. */
5331 len = asc_prt_line(cp, leftlen, " Command Queue Pending:");
5333 for (i = 0; i <= ASC_MAX_TID; i++) {
5334 if ((chip_scsi_id == i) ||
5335 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
5338 len = asc_prt_line(cp, leftlen, " %X:%u", i, v->cur_dvc_qng[i]);
5341 len = asc_prt_line(cp, leftlen, "\n");
5344 /* Current limit on number of commands that can be sent to a device. */
5345 len = asc_prt_line(cp, leftlen, " Command Queue Limit:");
5347 for (i = 0; i <= ASC_MAX_TID; i++) {
5348 if ((chip_scsi_id == i) ||
5349 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
5352 len = asc_prt_line(cp, leftlen, " %X:%u", i, v->max_dvc_qng[i]);
5355 len = asc_prt_line(cp, leftlen, "\n");
5358 /* Indicate whether the device has returned queue full status. */
5359 len = asc_prt_line(cp, leftlen, " Command Queue Full:");
5361 for (i = 0; i <= ASC_MAX_TID; i++) {
5362 if ((chip_scsi_id == i) ||
5363 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
5366 if (boardp->queue_full & ADV_TID_TO_TIDMASK(i)) {
5367 len = asc_prt_line(cp, leftlen, " %X:Y-%d",
5368 i, boardp->queue_full_cnt[i]);
5370 len = asc_prt_line(cp, leftlen, " %X:N", i);
5374 len = asc_prt_line(cp, leftlen, "\n");
5377 len = asc_prt_line(cp, leftlen, " Synchronous Transfer:");
5379 for (i = 0; i <= ASC_MAX_TID; i++) {
5380 if ((chip_scsi_id == i) ||
5381 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
5384 len = asc_prt_line(cp, leftlen, " %X:%c",
5387 sdtr_done & ADV_TID_TO_TIDMASK(i)) ? 'Y' :
5391 len = asc_prt_line(cp, leftlen, "\n");
5394 for (i = 0; i <= ASC_MAX_TID; i++) {
5395 uchar syn_period_ix;
5397 if ((chip_scsi_id == i) ||
5398 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0) ||
5399 ((v->init_sdtr & ADV_TID_TO_TIDMASK(i)) == 0)) {
5403 len = asc_prt_line(cp, leftlen, " %X:", i);
5406 if ((boardp->sdtr_data[i] & ASC_SYN_MAX_OFFSET) == 0) {
5407 len = asc_prt_line(cp, leftlen, " Asynchronous");
5411 (boardp->sdtr_data[i] >> 4) & (v->max_sdtr_index -
5414 len = asc_prt_line(cp, leftlen,
5415 " Transfer Period Factor: %d (%d.%d Mhz),",
5416 v->sdtr_period_tbl[syn_period_ix],
5418 v->sdtr_period_tbl[syn_period_ix],
5425 len = asc_prt_line(cp, leftlen, " REQ/ACK Offset: %d",
5427 sdtr_data[i] & ASC_SYN_MAX_OFFSET);
5431 if ((v->sdtr_done & ADV_TID_TO_TIDMASK(i)) == 0) {
5432 len = asc_prt_line(cp, leftlen, "*\n");
5435 len = asc_prt_line(cp, leftlen, "\n");
5441 len = asc_prt_line(cp, leftlen,
5442 " * = Re-negotiation pending before next command.\n");
5450 * asc_prt_adv_board_info()
5452 * Print dynamic board configuration information.
5454 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
5455 * cf. asc_prt_line().
5457 * Return the number of characters copied into 'cp'. No more than
5458 * 'cplen' characters will be copied to 'cp'.
5460 static int asc_prt_adv_board_info(struct Scsi_Host *shost, char *cp, int cplen)
5462 asc_board_t *boardp;
5469 AdvPortAddr iop_base;
5470 ushort chip_scsi_id;
5474 ushort sdtr_able, wdtr_able;
5475 ushort wdtr_done, sdtr_done;
5477 int renegotiate = 0;
5479 boardp = ASC_BOARDP(shost);
5480 v = &boardp->dvc_var.adv_dvc_var;
5481 c = &boardp->dvc_cfg.adv_dvc_cfg;
5482 iop_base = v->iop_base;
5483 chip_scsi_id = v->chip_scsi_id;
5488 len = asc_prt_line(cp, leftlen,
5489 "\nAdv Library Configuration and Statistics for AdvanSys SCSI Host %d:\n",
5493 len = asc_prt_line(cp, leftlen,
5494 " iop_base 0x%lx, cable_detect: %X, err_code %u\n",
5496 AdvReadWordRegister(iop_base,
5497 IOPW_SCSI_CFG1) & CABLE_DETECT,
5501 len = asc_prt_line(cp, leftlen,
5502 " chip_version %u, lib_version 0x%x, mcode_date 0x%x, mcode_version 0x%x\n",
5503 c->chip_version, c->lib_version, c->mcode_date,
5507 AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
5508 len = asc_prt_line(cp, leftlen, " Queuing Enabled:");
5510 for (i = 0; i <= ADV_MAX_TID; i++) {
5511 if ((chip_scsi_id == i) ||
5512 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
5516 len = asc_prt_line(cp, leftlen, " %X:%c",
5518 (tagqng_able & ADV_TID_TO_TIDMASK(i)) ? 'Y' :
5522 len = asc_prt_line(cp, leftlen, "\n");
5525 len = asc_prt_line(cp, leftlen, " Queue Limit:");
5527 for (i = 0; i <= ADV_MAX_TID; i++) {
5528 if ((chip_scsi_id == i) ||
5529 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
5533 AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + i,
5536 len = asc_prt_line(cp, leftlen, " %X:%d", i, lrambyte);
5539 len = asc_prt_line(cp, leftlen, "\n");
5542 len = asc_prt_line(cp, leftlen, " Command Pending:");
5544 for (i = 0; i <= ADV_MAX_TID; i++) {
5545 if ((chip_scsi_id == i) ||
5546 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
5550 AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_QUEUED_CMD + i,
5553 len = asc_prt_line(cp, leftlen, " %X:%d", i, lrambyte);
5556 len = asc_prt_line(cp, leftlen, "\n");
5559 AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
5560 len = asc_prt_line(cp, leftlen, " Wide Enabled:");
5562 for (i = 0; i <= ADV_MAX_TID; i++) {
5563 if ((chip_scsi_id == i) ||
5564 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
5568 len = asc_prt_line(cp, leftlen, " %X:%c",
5570 (wdtr_able & ADV_TID_TO_TIDMASK(i)) ? 'Y' :
5574 len = asc_prt_line(cp, leftlen, "\n");
5577 AdvReadWordLram(iop_base, ASC_MC_WDTR_DONE, wdtr_done);
5578 len = asc_prt_line(cp, leftlen, " Transfer Bit Width:");
5580 for (i = 0; i <= ADV_MAX_TID; i++) {
5581 if ((chip_scsi_id == i) ||
5582 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
5586 AdvReadWordLram(iop_base,
5587 ASC_MC_DEVICE_HSHK_CFG_TABLE + (2 * i),
5590 len = asc_prt_line(cp, leftlen, " %X:%d",
5591 i, (lramword & 0x8000) ? 16 : 8);
5594 if ((wdtr_able & ADV_TID_TO_TIDMASK(i)) &&
5595 (wdtr_done & ADV_TID_TO_TIDMASK(i)) == 0) {
5596 len = asc_prt_line(cp, leftlen, "*");
5601 len = asc_prt_line(cp, leftlen, "\n");
5604 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
5605 len = asc_prt_line(cp, leftlen, " Synchronous Enabled:");
5607 for (i = 0; i <= ADV_MAX_TID; i++) {
5608 if ((chip_scsi_id == i) ||
5609 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
5613 len = asc_prt_line(cp, leftlen, " %X:%c",
5615 (sdtr_able & ADV_TID_TO_TIDMASK(i)) ? 'Y' :
5619 len = asc_prt_line(cp, leftlen, "\n");
5622 AdvReadWordLram(iop_base, ASC_MC_SDTR_DONE, sdtr_done);
5623 for (i = 0; i <= ADV_MAX_TID; i++) {
5625 AdvReadWordLram(iop_base,
5626 ASC_MC_DEVICE_HSHK_CFG_TABLE + (2 * i),
5628 lramword &= ~0x8000;
5630 if ((chip_scsi_id == i) ||
5631 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0) ||
5632 ((sdtr_able & ADV_TID_TO_TIDMASK(i)) == 0)) {
5636 len = asc_prt_line(cp, leftlen, " %X:", i);
5639 if ((lramword & 0x1F) == 0) { /* Check for REQ/ACK Offset 0. */
5640 len = asc_prt_line(cp, leftlen, " Asynchronous");
5644 asc_prt_line(cp, leftlen,
5645 " Transfer Period Factor: ");
5648 if ((lramword & 0x1F00) == 0x1100) { /* 80 Mhz */
5650 asc_prt_line(cp, leftlen, "9 (80.0 Mhz),");
5652 } else if ((lramword & 0x1F00) == 0x1000) { /* 40 Mhz */
5654 asc_prt_line(cp, leftlen, "10 (40.0 Mhz),");
5656 } else { /* 20 Mhz or below. */
5658 period = (((lramword >> 8) * 25) + 50) / 4;
5660 if (period == 0) { /* Should never happen. */
5662 asc_prt_line(cp, leftlen,
5666 len = asc_prt_line(cp, leftlen,
5668 period, 250 / period,
5675 len = asc_prt_line(cp, leftlen, " REQ/ACK Offset: %d",
5680 if ((sdtr_done & ADV_TID_TO_TIDMASK(i)) == 0) {
5681 len = asc_prt_line(cp, leftlen, "*\n");
5684 len = asc_prt_line(cp, leftlen, "\n");
5690 len = asc_prt_line(cp, leftlen,
5691 " * = Re-negotiation pending before next command.\n");
5701 * Copy proc information to a read buffer taking into account the current
5702 * read offset in the file and the remaining space in the read buffer.
5705 asc_proc_copy(off_t advoffset, off_t offset, char *curbuf, int leftlen,
5706 char *cp, int cplen)
5710 ASC_DBG3(2, "asc_proc_copy: offset %d, advoffset %d, cplen %d\n",
5711 (unsigned)offset, (unsigned)advoffset, cplen);
5712 if (offset <= advoffset) {
5713 /* Read offset below current offset, copy everything. */
5714 cnt = min(cplen, leftlen);
5715 ASC_DBG3(2, "asc_proc_copy: curbuf 0x%lx, cp 0x%lx, cnt %d\n",
5716 (ulong)curbuf, (ulong)cp, cnt);
5717 memcpy(curbuf, cp, cnt);
5718 } else if (offset < advoffset + cplen) {
5719 /* Read offset within current range, partial copy. */
5720 cnt = (advoffset + cplen) - offset;
5721 cp = (cp + cplen) - cnt;
5722 cnt = min(cnt, leftlen);
5723 ASC_DBG3(2, "asc_proc_copy: curbuf 0x%lx, cp 0x%lx, cnt %d\n",
5724 (ulong)curbuf, (ulong)cp, cnt);
5725 memcpy(curbuf, cp, cnt);
5733 * If 'cp' is NULL print to the console, otherwise print to a buffer.
5735 * Return 0 if printing to the console, otherwise return the number of
5736 * bytes written to the buffer.
5738 * Note: If any single line is greater than ASC_PRTLINE_SIZE bytes the stack
5739 * will be corrupted. 's[]' is defined to be ASC_PRTLINE_SIZE bytes.
5741 static int asc_prt_line(char *buf, int buflen, char *fmt, ...)
5745 char s[ASC_PRTLINE_SIZE];
5747 va_start(args, fmt);
5748 ret = vsprintf(s, fmt, args);
5749 ASC_ASSERT(ret < ASC_PRTLINE_SIZE);
5754 ret = min(buflen, ret);
5755 memcpy(buf, s, ret);
5760 #endif /* CONFIG_PROC_FS */
5763 * --- Functions Required by the Asc Library
5767 * Delay for 'n' milliseconds. Don't use the 'jiffies'
5768 * global variable which is incremented once every 5 ms
5769 * from a timer interrupt, because this function may be
5770 * called when interrupts are disabled.
5772 static void DvcSleepMilliSecond(ADV_DCNT n)
5774 ASC_DBG1(4, "DvcSleepMilliSecond: %lu\n", (ulong)n);
5779 * Currently and inline noop but leave as a placeholder.
5780 * Leave DvcEnterCritical() as a noop placeholder.
5782 static inline ulong DvcEnterCritical(void)
5788 * Critical sections are all protected by the board spinlock.
5789 * Leave DvcLeaveCritical() as a noop placeholder.
5791 static inline void DvcLeaveCritical(ulong flags)
5798 * DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words)
5800 * Calling/Exit State:
5804 * Output an ASC_SCSI_Q structure to the chip
5807 DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words)
5811 ASC_DBG_PRT_HEX(2, "DvcPutScsiQ", outbuf, 2 * words);
5812 AscSetChipLramAddr(iop_base, s_addr);
5813 for (i = 0; i < 2 * words; i += 2) {
5814 if (i == 4 || i == 20) {
5817 outpw(iop_base + IOP_RAM_DATA,
5818 ((ushort)outbuf[i + 1] << 8) | outbuf[i]);
5824 * DvcGetQinfo(PortAddr iop_base, ushort s_addr, uchar *inbuf, int words)
5826 * Calling/Exit State:
5830 * Input an ASC_QDONE_INFO structure from the chip
5833 DvcGetQinfo(PortAddr iop_base, ushort s_addr, uchar *inbuf, int words)
5838 AscSetChipLramAddr(iop_base, s_addr);
5839 for (i = 0; i < 2 * words; i += 2) {
5843 word = inpw(iop_base + IOP_RAM_DATA);
5844 inbuf[i] = word & 0xff;
5845 inbuf[i + 1] = (word >> 8) & 0xff;
5847 ASC_DBG_PRT_HEX(2, "DvcGetQinfo", inbuf, 2 * words);
5851 * Return the BIOS address of the adapter at the specified
5852 * I/O port and with the specified bus type.
5854 static unsigned short __devinit
5855 AscGetChipBiosAddress(PortAddr iop_base, unsigned short bus_type)
5857 unsigned short cfg_lsw;
5858 unsigned short bios_addr;
5861 * The PCI BIOS is re-located by the motherboard BIOS. Because
5862 * of this the driver can not determine where a PCI BIOS is
5863 * loaded and executes.
5865 if (bus_type & ASC_IS_PCI)
5869 if ((bus_type & ASC_IS_EISA) != 0) {
5870 cfg_lsw = AscGetEisaChipCfg(iop_base);
5872 bios_addr = ASC_BIOS_MIN_ADDR + cfg_lsw * ASC_BIOS_BANK_SIZE;
5875 #endif /* CONFIG_ISA */
5877 cfg_lsw = AscGetChipCfgLsw(iop_base);
5880 * ISA PnP uses the top bit as the 32K BIOS flag
5882 if (bus_type == ASC_IS_ISAPNP)
5884 bios_addr = ASC_BIOS_MIN_ADDR + (cfg_lsw >> 12) * ASC_BIOS_BANK_SIZE;
5889 * --- Functions Required by the Adv Library
5895 * Return the physical address of 'vaddr' and set '*lenp' to the
5896 * number of physically contiguous bytes that follow 'vaddr'.
5897 * 'flag' indicates the type of structure whose physical address
5898 * is being translated.
5900 * Note: Because Linux currently doesn't page the kernel and all
5901 * kernel buffers are physically contiguous, leave '*lenp' unchanged.
5904 DvcGetPhyAddr(ADV_DVC_VAR *asc_dvc, ADV_SCSI_REQ_Q *scsiq,
5905 uchar *vaddr, ADV_SDCNT *lenp, int flag)
5909 paddr = virt_to_bus(vaddr);
5912 "DvcGetPhyAddr: vaddr 0x%lx, lenp 0x%lx *lenp %lu, paddr 0x%lx\n",
5913 (ulong)vaddr, (ulong)lenp, (ulong)*((ulong *)lenp),
5920 * --- Tracing and Debugging Functions
5923 #ifdef ADVANSYS_STATS
5924 #ifdef CONFIG_PROC_FS
5926 * asc_prt_board_stats()
5928 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
5929 * cf. asc_prt_line().
5931 * Return the number of characters copied into 'cp'. No more than
5932 * 'cplen' characters will be copied to 'cp'.
5934 static int asc_prt_board_stats(struct Scsi_Host *shost, char *cp, int cplen)
5939 struct asc_stats *s;
5940 asc_board_t *boardp;
5945 boardp = ASC_BOARDP(shost);
5946 s = &boardp->asc_stats;
5948 len = asc_prt_line(cp, leftlen,
5949 "\nLinux Driver Statistics for AdvanSys SCSI Host %d:\n",
5953 len = asc_prt_line(cp, leftlen,
5954 " queuecommand %lu, reset %lu, biosparam %lu, interrupt %lu\n",
5955 s->queuecommand, s->reset, s->biosparam,
5959 len = asc_prt_line(cp, leftlen,
5960 " callback %lu, done %lu, build_error %lu, build_noreq %lu, build_nosg %lu\n",
5961 s->callback, s->done, s->build_error,
5962 s->adv_build_noreq, s->adv_build_nosg);
5965 len = asc_prt_line(cp, leftlen,
5966 " exe_noerror %lu, exe_busy %lu, exe_error %lu, exe_unknown %lu\n",
5967 s->exe_noerror, s->exe_busy, s->exe_error,
5972 * Display data transfer statistics.
5974 if (s->cont_cnt > 0) {
5975 len = asc_prt_line(cp, leftlen, " cont_cnt %lu, ", s->cont_cnt);
5978 len = asc_prt_line(cp, leftlen, "cont_xfer %lu.%01lu kb ",
5980 ASC_TENTHS(s->cont_xfer, 2));
5983 /* Contiguous transfer average size */
5984 len = asc_prt_line(cp, leftlen, "avg_xfer %lu.%01lu kb\n",
5985 (s->cont_xfer / 2) / s->cont_cnt,
5986 ASC_TENTHS((s->cont_xfer / 2), s->cont_cnt));
5990 if (s->sg_cnt > 0) {
5992 len = asc_prt_line(cp, leftlen, " sg_cnt %lu, sg_elem %lu, ",
5993 s->sg_cnt, s->sg_elem);
5996 len = asc_prt_line(cp, leftlen, "sg_xfer %lu.%01lu kb\n",
5997 s->sg_xfer / 2, ASC_TENTHS(s->sg_xfer, 2));
6000 /* Scatter gather transfer statistics */
6001 len = asc_prt_line(cp, leftlen, " avg_num_elem %lu.%01lu, ",
6002 s->sg_elem / s->sg_cnt,
6003 ASC_TENTHS(s->sg_elem, s->sg_cnt));
6006 len = asc_prt_line(cp, leftlen, "avg_elem_size %lu.%01lu kb, ",
6007 (s->sg_xfer / 2) / s->sg_elem,
6008 ASC_TENTHS((s->sg_xfer / 2), s->sg_elem));
6011 len = asc_prt_line(cp, leftlen, "avg_xfer_size %lu.%01lu kb\n",
6012 (s->sg_xfer / 2) / s->sg_cnt,
6013 ASC_TENTHS((s->sg_xfer / 2), s->sg_cnt));
6018 * Display request queuing statistics.
6020 len = asc_prt_line(cp, leftlen,
6021 " Active and Waiting Request Queues (Time Unit: %d HZ):\n",
6027 #endif /* CONFIG_PROC_FS */
6028 #endif /* ADVANSYS_STATS */
6030 #ifdef ADVANSYS_DEBUG
6032 * asc_prt_scsi_host()
6034 static void asc_prt_scsi_host(struct Scsi_Host *s)
6036 asc_board_t *boardp;
6038 boardp = ASC_BOARDP(s);
6040 printk("Scsi_Host at addr 0x%lx\n", (ulong)s);
6041 printk(" host_busy %u, host_no %d, last_reset %d,\n",
6042 s->host_busy, s->host_no, (unsigned)s->last_reset);
6044 printk(" base 0x%lx, io_port 0x%lx, irq 0x%x,\n",
6045 (ulong)s->base, (ulong)s->io_port, s->irq);
6047 printk(" dma_channel %d, this_id %d, can_queue %d,\n",
6048 s->dma_channel, s->this_id, s->can_queue);
6050 printk(" cmd_per_lun %d, sg_tablesize %d, unchecked_isa_dma %d\n",
6051 s->cmd_per_lun, s->sg_tablesize, s->unchecked_isa_dma);
6053 if (ASC_NARROW_BOARD(boardp)) {
6054 asc_prt_asc_dvc_var(&ASC_BOARDP(s)->dvc_var.asc_dvc_var);
6055 asc_prt_asc_dvc_cfg(&ASC_BOARDP(s)->dvc_cfg.asc_dvc_cfg);
6057 asc_prt_adv_dvc_var(&ASC_BOARDP(s)->dvc_var.adv_dvc_var);
6058 asc_prt_adv_dvc_cfg(&ASC_BOARDP(s)->dvc_cfg.adv_dvc_cfg);
6063 * asc_prt_scsi_cmnd()
6065 static void asc_prt_scsi_cmnd(struct scsi_cmnd *s)
6067 printk("struct scsi_cmnd at addr 0x%lx\n", (ulong)s);
6069 printk(" host 0x%lx, device 0x%lx, target %u, lun %u, channel %u,\n",
6070 (ulong)s->device->host, (ulong)s->device, s->device->id,
6071 s->device->lun, s->device->channel);
6073 asc_prt_hex(" CDB", s->cmnd, s->cmd_len);
6075 printk("sc_data_direction %u, resid %d\n",
6076 s->sc_data_direction, s->resid);
6078 printk(" use_sg %u, sglist_len %u\n", s->use_sg, s->sglist_len);
6080 printk(" serial_number 0x%x, retries %d, allowed %d\n",
6081 (unsigned)s->serial_number, s->retries, s->allowed);
6083 printk(" timeout_per_command %d\n", s->timeout_per_command);
6085 printk(" scsi_done 0x%p, done 0x%p, host_scribble 0x%p, result 0x%x\n",
6086 s->scsi_done, s->done, s->host_scribble, s->result);
6088 printk(" tag %u, pid %u\n", (unsigned)s->tag, (unsigned)s->pid);
6092 * asc_prt_asc_dvc_var()
6094 static void asc_prt_asc_dvc_var(ASC_DVC_VAR *h)
6096 printk("ASC_DVC_VAR at addr 0x%lx\n", (ulong)h);
6098 printk(" iop_base 0x%x, err_code 0x%x, dvc_cntl 0x%x, bug_fix_cntl "
6099 "%d,\n", h->iop_base, h->err_code, h->dvc_cntl, h->bug_fix_cntl);
6101 printk(" bus_type %d, init_sdtr 0x%x,\n", h->bus_type,
6102 (unsigned)h->init_sdtr);
6104 printk(" sdtr_done 0x%x, use_tagged_qng 0x%x, unit_not_ready 0x%x, "
6105 "chip_no 0x%x,\n", (unsigned)h->sdtr_done,
6106 (unsigned)h->use_tagged_qng, (unsigned)h->unit_not_ready,
6107 (unsigned)h->chip_no);
6109 printk(" queue_full_or_busy 0x%x, start_motor 0x%x, scsi_reset_wait "
6110 "%u,\n", (unsigned)h->queue_full_or_busy,
6111 (unsigned)h->start_motor, (unsigned)h->scsi_reset_wait);
6113 printk(" is_in_int %u, max_total_qng %u, cur_total_qng %u, "
6114 "in_critical_cnt %u,\n", (unsigned)h->is_in_int,
6115 (unsigned)h->max_total_qng, (unsigned)h->cur_total_qng,
6116 (unsigned)h->in_critical_cnt);
6118 printk(" last_q_shortage %u, init_state 0x%x, no_scam 0x%x, "
6119 "pci_fix_asyn_xfer 0x%x,\n", (unsigned)h->last_q_shortage,
6120 (unsigned)h->init_state, (unsigned)h->no_scam,
6121 (unsigned)h->pci_fix_asyn_xfer);
6123 printk(" cfg 0x%lx, irq_no 0x%x\n", (ulong)h->cfg, (unsigned)h->irq_no);
6127 * asc_prt_asc_dvc_cfg()
6129 static void asc_prt_asc_dvc_cfg(ASC_DVC_CFG *h)
6131 printk("ASC_DVC_CFG at addr 0x%lx\n", (ulong)h);
6133 printk(" can_tagged_qng 0x%x, cmd_qng_enabled 0x%x,\n",
6134 h->can_tagged_qng, h->cmd_qng_enabled);
6135 printk(" disc_enable 0x%x, sdtr_enable 0x%x,\n",
6136 h->disc_enable, h->sdtr_enable);
6139 (" chip_scsi_id %d, isa_dma_speed %d, isa_dma_channel %d, chip_version %d,\n",
6140 h->chip_scsi_id, h->isa_dma_speed, h->isa_dma_channel,
6144 (" pci_device_id %d, lib_serial_no %u, lib_version %u, mcode_date 0x%x,\n",
6145 to_pci_dev(h->dev)->device, h->lib_serial_no, h->lib_version,
6148 printk(" mcode_version %d, overrun_buf 0x%lx\n",
6149 h->mcode_version, (ulong)h->overrun_buf);
6153 * asc_prt_asc_scsi_q()
6155 static void asc_prt_asc_scsi_q(ASC_SCSI_Q *q)
6160 printk("ASC_SCSI_Q at addr 0x%lx\n", (ulong)q);
6163 (" target_ix 0x%x, target_lun %u, srb_ptr 0x%lx, tag_code 0x%x,\n",
6164 q->q2.target_ix, q->q1.target_lun, (ulong)q->q2.srb_ptr,
6168 (" data_addr 0x%lx, data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n",
6169 (ulong)le32_to_cpu(q->q1.data_addr),
6170 (ulong)le32_to_cpu(q->q1.data_cnt),
6171 (ulong)le32_to_cpu(q->q1.sense_addr), q->q1.sense_len);
6173 printk(" cdbptr 0x%lx, cdb_len %u, sg_head 0x%lx, sg_queue_cnt %u\n",
6174 (ulong)q->cdbptr, q->q2.cdb_len,
6175 (ulong)q->sg_head, q->q1.sg_queue_cnt);
6179 printk("ASC_SG_HEAD at addr 0x%lx\n", (ulong)sgp);
6180 printk(" entry_cnt %u, queue_cnt %u\n", sgp->entry_cnt,
6182 for (i = 0; i < sgp->entry_cnt; i++) {
6183 printk(" [%u]: addr 0x%lx, bytes %lu\n",
6184 i, (ulong)le32_to_cpu(sgp->sg_list[i].addr),
6185 (ulong)le32_to_cpu(sgp->sg_list[i].bytes));
6192 * asc_prt_asc_qdone_info()
6194 static void asc_prt_asc_qdone_info(ASC_QDONE_INFO *q)
6196 printk("ASC_QDONE_INFO at addr 0x%lx\n", (ulong)q);
6197 printk(" srb_ptr 0x%lx, target_ix %u, cdb_len %u, tag_code %u,\n",
6198 (ulong)q->d2.srb_ptr, q->d2.target_ix, q->d2.cdb_len,
6201 (" done_stat 0x%x, host_stat 0x%x, scsi_stat 0x%x, scsi_msg 0x%x\n",
6202 q->d3.done_stat, q->d3.host_stat, q->d3.scsi_stat, q->d3.scsi_msg);
6206 * asc_prt_adv_dvc_var()
6208 * Display an ADV_DVC_VAR structure.
6210 static void asc_prt_adv_dvc_var(ADV_DVC_VAR *h)
6212 printk(" ADV_DVC_VAR at addr 0x%lx\n", (ulong)h);
6214 printk(" iop_base 0x%lx, err_code 0x%x, ultra_able 0x%x\n",
6215 (ulong)h->iop_base, h->err_code, (unsigned)h->ultra_able);
6217 printk(" isr_callback 0x%lx, sdtr_able 0x%x, wdtr_able 0x%x\n",
6218 (ulong)h->isr_callback, (unsigned)h->sdtr_able,
6219 (unsigned)h->wdtr_able);
6221 printk(" start_motor 0x%x, scsi_reset_wait 0x%x, irq_no 0x%x,\n",
6222 (unsigned)h->start_motor,
6223 (unsigned)h->scsi_reset_wait, (unsigned)h->irq_no);
6225 printk(" max_host_qng %u, max_dvc_qng %u, carr_freelist 0x%lxn\n",
6226 (unsigned)h->max_host_qng, (unsigned)h->max_dvc_qng,
6227 (ulong)h->carr_freelist);
6229 printk(" icq_sp 0x%lx, irq_sp 0x%lx\n",
6230 (ulong)h->icq_sp, (ulong)h->irq_sp);
6232 printk(" no_scam 0x%x, tagqng_able 0x%x\n",
6233 (unsigned)h->no_scam, (unsigned)h->tagqng_able);
6235 printk(" chip_scsi_id 0x%x, cfg 0x%lx\n",
6236 (unsigned)h->chip_scsi_id, (ulong)h->cfg);
6240 * asc_prt_adv_dvc_cfg()
6242 * Display an ADV_DVC_CFG structure.
6244 static void asc_prt_adv_dvc_cfg(ADV_DVC_CFG *h)
6246 printk(" ADV_DVC_CFG at addr 0x%lx\n", (ulong)h);
6248 printk(" disc_enable 0x%x, termination 0x%x\n",
6249 h->disc_enable, h->termination);
6251 printk(" chip_version 0x%x, mcode_date 0x%x\n",
6252 h->chip_version, h->mcode_date);
6254 printk(" mcode_version 0x%x, pci_device_id 0x%x, lib_version %u\n",
6255 h->mcode_version, to_pci_dev(h->dev)->device, h->lib_version);
6257 printk(" control_flag 0x%x\n", h->control_flag);
6261 * asc_prt_adv_scsi_req_q()
6263 * Display an ADV_SCSI_REQ_Q structure.
6265 static void asc_prt_adv_scsi_req_q(ADV_SCSI_REQ_Q *q)
6268 struct asc_sg_block *sg_ptr;
6270 printk("ADV_SCSI_REQ_Q at addr 0x%lx\n", (ulong)q);
6272 printk(" target_id %u, target_lun %u, srb_ptr 0x%lx, a_flag 0x%x\n",
6273 q->target_id, q->target_lun, (ulong)q->srb_ptr, q->a_flag);
6275 printk(" cntl 0x%x, data_addr 0x%lx, vdata_addr 0x%lx\n",
6276 q->cntl, (ulong)le32_to_cpu(q->data_addr), (ulong)q->vdata_addr);
6278 printk(" data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n",
6279 (ulong)le32_to_cpu(q->data_cnt),
6280 (ulong)le32_to_cpu(q->sense_addr), q->sense_len);
6283 (" cdb_len %u, done_status 0x%x, host_status 0x%x, scsi_status 0x%x\n",
6284 q->cdb_len, q->done_status, q->host_status, q->scsi_status);
6286 printk(" sg_working_ix 0x%x, target_cmd %u\n",
6287 q->sg_working_ix, q->target_cmd);
6289 printk(" scsiq_rptr 0x%lx, sg_real_addr 0x%lx, sg_list_ptr 0x%lx\n",
6290 (ulong)le32_to_cpu(q->scsiq_rptr),
6291 (ulong)le32_to_cpu(q->sg_real_addr), (ulong)q->sg_list_ptr);
6293 /* Display the request's ADV_SG_BLOCK structures. */
6294 if (q->sg_list_ptr != NULL) {
6298 * 'sg_ptr' is a physical address. Convert it to a virtual
6299 * address by indexing 'sg_blk_cnt' into the virtual address
6300 * array 'sg_list_ptr'.
6302 * XXX - Assumes all SG physical blocks are virtually contiguous.
6305 &(((ADV_SG_BLOCK *)(q->sg_list_ptr))[sg_blk_cnt]);
6306 asc_prt_adv_sgblock(sg_blk_cnt, sg_ptr);
6307 if (sg_ptr->sg_ptr == 0) {
6316 * asc_prt_adv_sgblock()
6318 * Display an ADV_SG_BLOCK structure.
6320 static void asc_prt_adv_sgblock(int sgblockno, ADV_SG_BLOCK *b)
6324 printk(" ASC_SG_BLOCK at addr 0x%lx (sgblockno %d)\n",
6325 (ulong)b, sgblockno);
6326 printk(" sg_cnt %u, sg_ptr 0x%lx\n",
6327 b->sg_cnt, (ulong)le32_to_cpu(b->sg_ptr));
6328 ASC_ASSERT(b->sg_cnt <= NO_OF_SG_PER_BLOCK);
6329 if (b->sg_ptr != 0) {
6330 ASC_ASSERT(b->sg_cnt == NO_OF_SG_PER_BLOCK);
6332 for (i = 0; i < b->sg_cnt; i++) {
6333 printk(" [%u]: sg_addr 0x%lx, sg_count 0x%lx\n",
6334 i, (ulong)b->sg_list[i].sg_addr,
6335 (ulong)b->sg_list[i].sg_count);
6342 * Print hexadecimal output in 4 byte groupings 32 bytes
6343 * or 8 double-words per line.
6345 static void asc_prt_hex(char *f, uchar *s, int l)
6352 printk("%s: (%d bytes)\n", f, l);
6354 for (i = 0; i < l; i += 32) {
6356 /* Display a maximum of 8 double-words per line. */
6357 if ((k = (l - i) / 4) >= 8) {
6364 for (j = 0; j < k; j++) {
6365 printk(" %2.2X%2.2X%2.2X%2.2X",
6366 (unsigned)s[i + (j * 4)],
6367 (unsigned)s[i + (j * 4) + 1],
6368 (unsigned)s[i + (j * 4) + 2],
6369 (unsigned)s[i + (j * 4) + 3]);
6377 printk(" %2.2X", (unsigned)s[i + (j * 4)]);
6380 printk(" %2.2X%2.2X",
6381 (unsigned)s[i + (j * 4)],
6382 (unsigned)s[i + (j * 4) + 1]);
6385 printk(" %2.2X%2.2X%2.2X",
6386 (unsigned)s[i + (j * 4) + 1],
6387 (unsigned)s[i + (j * 4) + 2],
6388 (unsigned)s[i + (j * 4) + 3]);
6395 #endif /* ADVANSYS_DEBUG */
6398 * --- Asc Library Functions
6401 static ushort __devinit AscGetEisaChipCfg(PortAddr iop_base)
6403 PortAddr eisa_cfg_iop;
6405 eisa_cfg_iop = (PortAddr) ASC_GET_EISA_SLOT(iop_base) |
6406 (PortAddr) (ASC_EISA_CFG_IOP_MASK);
6407 return (inpw(eisa_cfg_iop));
6410 static uchar __devinit AscSetChipScsiID(PortAddr iop_base, uchar new_host_id)
6414 if (AscGetChipScsiID(iop_base) == new_host_id) {
6415 return (new_host_id);
6417 cfg_lsw = AscGetChipCfgLsw(iop_base);
6419 cfg_lsw |= (ushort)((new_host_id & ASC_MAX_TID) << 8);
6420 AscSetChipCfgLsw(iop_base, cfg_lsw);
6421 return (AscGetChipScsiID(iop_base));
6424 static unsigned char __devinit AscGetChipScsiCtrl(PortAddr iop_base)
6428 AscSetBank(iop_base, 1);
6429 sc = inp(iop_base + IOP_REG_SC);
6430 AscSetBank(iop_base, 0);
6434 static unsigned char __devinit
6435 AscGetChipVersion(PortAddr iop_base, unsigned short bus_type)
6437 if (bus_type & ASC_IS_EISA) {
6439 unsigned char revision;
6440 eisa_iop = (PortAddr) ASC_GET_EISA_SLOT(iop_base) |
6441 (PortAddr) ASC_EISA_REV_IOP_MASK;
6442 revision = inp(eisa_iop);
6443 return ASC_CHIP_MIN_VER_EISA - 1 + revision;
6445 return AscGetChipVerNo(iop_base);
6449 AscLoadMicroCode(PortAddr iop_base,
6450 ushort s_addr, uchar *mcode_buf, ushort mcode_size)
6453 ushort mcode_word_size;
6454 ushort mcode_chksum;
6456 /* Write the microcode buffer starting at LRAM address 0. */
6457 mcode_word_size = (ushort)(mcode_size >> 1);
6458 AscMemWordSetLram(iop_base, s_addr, 0, mcode_word_size);
6459 AscMemWordCopyPtrToLram(iop_base, s_addr, mcode_buf, mcode_word_size);
6461 chksum = AscMemSumLramWord(iop_base, s_addr, mcode_word_size);
6462 ASC_DBG1(1, "AscLoadMicroCode: chksum 0x%lx\n", (ulong)chksum);
6463 mcode_chksum = (ushort)AscMemSumLramWord(iop_base,
6464 (ushort)ASC_CODE_SEC_BEG,
6465 (ushort)((mcode_size -
6469 ASC_DBG1(1, "AscLoadMicroCode: mcode_chksum 0x%lx\n",
6470 (ulong)mcode_chksum);
6471 AscWriteLramWord(iop_base, ASCV_MCODE_CHKSUM_W, mcode_chksum);
6472 AscWriteLramWord(iop_base, ASCV_MCODE_SIZE_W, mcode_size);
6476 static int AscFindSignature(PortAddr iop_base)
6480 ASC_DBG2(1, "AscFindSignature: AscGetChipSignatureByte(0x%x) 0x%x\n",
6481 iop_base, AscGetChipSignatureByte(iop_base));
6482 if (AscGetChipSignatureByte(iop_base) == (uchar)ASC_1000_ID1B) {
6484 "AscFindSignature: AscGetChipSignatureWord(0x%x) 0x%x\n",
6485 iop_base, AscGetChipSignatureWord(iop_base));
6486 sig_word = AscGetChipSignatureWord(iop_base);
6487 if ((sig_word == (ushort)ASC_1000_ID0W) ||
6488 (sig_word == (ushort)ASC_1000_ID0W_FIX)) {
6495 static void __devinit AscToggleIRQAct(PortAddr iop_base)
6497 AscSetChipStatus(iop_base, CIW_IRQ_ACT);
6498 AscSetChipStatus(iop_base, 0);
6502 static uchar __devinit AscGetChipIRQ(PortAddr iop_base, ushort bus_type)
6507 if ((bus_type & ASC_IS_EISA) != 0) {
6508 cfg_lsw = AscGetEisaChipCfg(iop_base);
6509 chip_irq = (uchar)(((cfg_lsw >> 8) & 0x07) + 10);
6510 if ((chip_irq == 13) || (chip_irq > 15)) {
6515 if ((bus_type & ASC_IS_VL) != 0) {
6516 cfg_lsw = AscGetChipCfgLsw(iop_base);
6517 chip_irq = (uchar)(((cfg_lsw >> 2) & 0x07));
6518 if ((chip_irq == 0) || (chip_irq == 4) || (chip_irq == 7)) {
6521 return ((uchar)(chip_irq + (ASC_MIN_IRQ_NO - 1)));
6523 cfg_lsw = AscGetChipCfgLsw(iop_base);
6524 chip_irq = (uchar)(((cfg_lsw >> 2) & 0x03));
6526 chip_irq += (uchar)2;
6527 return ((uchar)(chip_irq + ASC_MIN_IRQ_NO));
6530 static uchar __devinit
6531 AscSetChipIRQ(PortAddr iop_base, uchar irq_no, ushort bus_type)
6535 if ((bus_type & ASC_IS_VL) != 0) {
6537 if ((irq_no < ASC_MIN_IRQ_NO)
6538 || (irq_no > ASC_MAX_IRQ_NO)) {
6541 irq_no -= (uchar)((ASC_MIN_IRQ_NO - 1));
6544 cfg_lsw = (ushort)(AscGetChipCfgLsw(iop_base) & 0xFFE3);
6545 cfg_lsw |= (ushort)0x0010;
6546 AscSetChipCfgLsw(iop_base, cfg_lsw);
6547 AscToggleIRQAct(iop_base);
6548 cfg_lsw = (ushort)(AscGetChipCfgLsw(iop_base) & 0xFFE0);
6549 cfg_lsw |= (ushort)((irq_no & 0x07) << 2);
6550 AscSetChipCfgLsw(iop_base, cfg_lsw);
6551 AscToggleIRQAct(iop_base);
6552 return (AscGetChipIRQ(iop_base, bus_type));
6554 if ((bus_type & (ASC_IS_ISA)) != 0) {
6557 irq_no -= (uchar)ASC_MIN_IRQ_NO;
6558 cfg_lsw = (ushort)(AscGetChipCfgLsw(iop_base) & 0xFFF3);
6559 cfg_lsw |= (ushort)((irq_no & 0x03) << 2);
6560 AscSetChipCfgLsw(iop_base, cfg_lsw);
6561 return (AscGetChipIRQ(iop_base, bus_type));
6567 static void __devinit AscEnableIsaDma(uchar dma_channel)
6569 if (dma_channel < 4) {
6570 outp(0x000B, (ushort)(0xC0 | dma_channel));
6571 outp(0x000A, dma_channel);
6572 } else if (dma_channel < 8) {
6573 outp(0x00D6, (ushort)(0xC0 | (dma_channel - 4)));
6574 outp(0x00D4, (ushort)(dma_channel - 4));
6578 #endif /* CONFIG_ISA */
6580 static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc)
6586 ushort int_halt_code;
6587 ASC_SCSI_BIT_ID_TYPE scsi_busy;
6588 ASC_SCSI_BIT_ID_TYPE target_id;
6595 uchar q_cntl, tid_no;
6599 asc_board_t *boardp;
6601 ASC_ASSERT(asc_dvc->drv_ptr != NULL);
6602 boardp = asc_dvc->drv_ptr;
6604 iop_base = asc_dvc->iop_base;
6605 int_halt_code = AscReadLramWord(iop_base, ASCV_HALTCODE_W);
6607 halt_qp = AscReadLramByte(iop_base, ASCV_CURCDB_B);
6608 halt_q_addr = ASC_QNO_TO_QADDR(halt_qp);
6609 target_ix = AscReadLramByte(iop_base,
6610 (ushort)(halt_q_addr +
6611 (ushort)ASC_SCSIQ_B_TARGET_IX));
6613 AscReadLramByte(iop_base,
6614 (ushort)(halt_q_addr + (ushort)ASC_SCSIQ_B_CNTL));
6615 tid_no = ASC_TIX_TO_TID(target_ix);
6616 target_id = (uchar)ASC_TID_TO_TARGET_ID(tid_no);
6617 if (asc_dvc->pci_fix_asyn_xfer & target_id) {
6618 asyn_sdtr = ASYN_SDTR_DATA_FIX_PCI_REV_AB;
6622 if (int_halt_code == ASC_HALT_DISABLE_ASYN_USE_SYN_FIX) {
6623 if (asc_dvc->pci_fix_asyn_xfer & target_id) {
6624 AscSetChipSDTR(iop_base, 0, tid_no);
6625 boardp->sdtr_data[tid_no] = 0;
6627 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
6629 } else if (int_halt_code == ASC_HALT_ENABLE_ASYN_USE_SYN_FIX) {
6630 if (asc_dvc->pci_fix_asyn_xfer & target_id) {
6631 AscSetChipSDTR(iop_base, asyn_sdtr, tid_no);
6632 boardp->sdtr_data[tid_no] = asyn_sdtr;
6634 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
6636 } else if (int_halt_code == ASC_HALT_EXTMSG_IN) {
6638 AscMemWordCopyPtrFromLram(iop_base,
6641 sizeof(EXT_MSG) >> 1);
6643 if (ext_msg.msg_type == EXTENDED_MESSAGE &&
6644 ext_msg.msg_req == EXTENDED_SDTR &&
6645 ext_msg.msg_len == MS_SDTR_LEN) {
6647 if ((ext_msg.req_ack_offset > ASC_SYN_MAX_OFFSET)) {
6649 sdtr_accept = FALSE;
6650 ext_msg.req_ack_offset = ASC_SYN_MAX_OFFSET;
6652 if ((ext_msg.xfer_period <
6653 asc_dvc->sdtr_period_tbl[asc_dvc->
6654 host_init_sdtr_index])
6655 || (ext_msg.xfer_period >
6656 asc_dvc->sdtr_period_tbl[asc_dvc->
6658 sdtr_accept = FALSE;
6659 ext_msg.xfer_period =
6660 asc_dvc->sdtr_period_tbl[asc_dvc->
6661 host_init_sdtr_index];
6665 AscCalSDTRData(asc_dvc, ext_msg.xfer_period,
6666 ext_msg.req_ack_offset);
6667 if ((sdtr_data == 0xFF)) {
6669 q_cntl |= QC_MSG_OUT;
6670 asc_dvc->init_sdtr &= ~target_id;
6671 asc_dvc->sdtr_done &= ~target_id;
6672 AscSetChipSDTR(iop_base, asyn_sdtr,
6674 boardp->sdtr_data[tid_no] = asyn_sdtr;
6677 if (ext_msg.req_ack_offset == 0) {
6679 q_cntl &= ~QC_MSG_OUT;
6680 asc_dvc->init_sdtr &= ~target_id;
6681 asc_dvc->sdtr_done &= ~target_id;
6682 AscSetChipSDTR(iop_base, asyn_sdtr, tid_no);
6684 if (sdtr_accept && (q_cntl & QC_MSG_OUT)) {
6686 q_cntl &= ~QC_MSG_OUT;
6687 asc_dvc->sdtr_done |= target_id;
6688 asc_dvc->init_sdtr |= target_id;
6689 asc_dvc->pci_fix_asyn_xfer &=
6692 AscCalSDTRData(asc_dvc,
6693 ext_msg.xfer_period,
6696 AscSetChipSDTR(iop_base, sdtr_data,
6698 boardp->sdtr_data[tid_no] = sdtr_data;
6701 q_cntl |= QC_MSG_OUT;
6702 AscMsgOutSDTR(asc_dvc,
6703 ext_msg.xfer_period,
6704 ext_msg.req_ack_offset);
6705 asc_dvc->pci_fix_asyn_xfer &=
6708 AscCalSDTRData(asc_dvc,
6709 ext_msg.xfer_period,
6712 AscSetChipSDTR(iop_base, sdtr_data,
6714 boardp->sdtr_data[tid_no] = sdtr_data;
6715 asc_dvc->sdtr_done |= target_id;
6716 asc_dvc->init_sdtr |= target_id;
6720 AscWriteLramByte(iop_base,
6721 (ushort)(halt_q_addr +
6722 (ushort)ASC_SCSIQ_B_CNTL),
6724 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
6726 } else if (ext_msg.msg_type == EXTENDED_MESSAGE &&
6727 ext_msg.msg_req == EXTENDED_WDTR &&
6728 ext_msg.msg_len == MS_WDTR_LEN) {
6730 ext_msg.wdtr_width = 0;
6731 AscMemWordCopyPtrToLram(iop_base,
6734 sizeof(EXT_MSG) >> 1);
6735 q_cntl |= QC_MSG_OUT;
6736 AscWriteLramByte(iop_base,
6737 (ushort)(halt_q_addr +
6738 (ushort)ASC_SCSIQ_B_CNTL),
6740 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
6744 ext_msg.msg_type = MESSAGE_REJECT;
6745 AscMemWordCopyPtrToLram(iop_base,
6748 sizeof(EXT_MSG) >> 1);
6749 q_cntl |= QC_MSG_OUT;
6750 AscWriteLramByte(iop_base,
6751 (ushort)(halt_q_addr +
6752 (ushort)ASC_SCSIQ_B_CNTL),
6754 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
6757 } else if (int_halt_code == ASC_HALT_CHK_CONDITION) {
6759 q_cntl |= QC_REQ_SENSE;
6761 if ((asc_dvc->init_sdtr & target_id) != 0) {
6763 asc_dvc->sdtr_done &= ~target_id;
6765 sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no);
6766 q_cntl |= QC_MSG_OUT;
6767 AscMsgOutSDTR(asc_dvc,
6769 sdtr_period_tbl[(sdtr_data >> 4) &
6773 (uchar)(sdtr_data & (uchar)
6774 ASC_SYN_MAX_OFFSET));
6777 AscWriteLramByte(iop_base,
6778 (ushort)(halt_q_addr +
6779 (ushort)ASC_SCSIQ_B_CNTL), q_cntl);
6781 tag_code = AscReadLramByte(iop_base,
6782 (ushort)(halt_q_addr + (ushort)
6783 ASC_SCSIQ_B_TAG_CODE));
6785 if ((asc_dvc->pci_fix_asyn_xfer & target_id)
6786 && !(asc_dvc->pci_fix_asyn_xfer_always & target_id)
6789 tag_code |= (ASC_TAG_FLAG_DISABLE_DISCONNECT
6790 | ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX);
6793 AscWriteLramByte(iop_base,
6794 (ushort)(halt_q_addr +
6795 (ushort)ASC_SCSIQ_B_TAG_CODE),
6798 q_status = AscReadLramByte(iop_base,
6799 (ushort)(halt_q_addr + (ushort)
6800 ASC_SCSIQ_B_STATUS));
6801 q_status |= (QS_READY | QS_BUSY);
6802 AscWriteLramByte(iop_base,
6803 (ushort)(halt_q_addr +
6804 (ushort)ASC_SCSIQ_B_STATUS),
6807 scsi_busy = AscReadLramByte(iop_base, (ushort)ASCV_SCSIBUSY_B);
6808 scsi_busy &= ~target_id;
6809 AscWriteLramByte(iop_base, (ushort)ASCV_SCSIBUSY_B, scsi_busy);
6811 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
6813 } else if (int_halt_code == ASC_HALT_SDTR_REJECTED) {
6815 AscMemWordCopyPtrFromLram(iop_base,
6818 sizeof(EXT_MSG) >> 1);
6820 if ((out_msg.msg_type == EXTENDED_MESSAGE) &&
6821 (out_msg.msg_len == MS_SDTR_LEN) &&
6822 (out_msg.msg_req == EXTENDED_SDTR)) {
6824 asc_dvc->init_sdtr &= ~target_id;
6825 asc_dvc->sdtr_done &= ~target_id;
6826 AscSetChipSDTR(iop_base, asyn_sdtr, tid_no);
6827 boardp->sdtr_data[tid_no] = asyn_sdtr;
6829 q_cntl &= ~QC_MSG_OUT;
6830 AscWriteLramByte(iop_base,
6831 (ushort)(halt_q_addr +
6832 (ushort)ASC_SCSIQ_B_CNTL), q_cntl);
6833 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
6835 } else if (int_halt_code == ASC_HALT_SS_QUEUE_FULL) {
6837 scsi_status = AscReadLramByte(iop_base,
6838 (ushort)((ushort)halt_q_addr +
6840 ASC_SCSIQ_SCSI_STATUS));
6842 AscReadLramByte(iop_base,
6843 (ushort)((ushort)ASC_QADR_BEG +
6844 (ushort)target_ix));
6845 if ((cur_dvc_qng > 0) && (asc_dvc->cur_dvc_qng[tid_no] > 0)) {
6847 scsi_busy = AscReadLramByte(iop_base,
6848 (ushort)ASCV_SCSIBUSY_B);
6849 scsi_busy |= target_id;
6850 AscWriteLramByte(iop_base,
6851 (ushort)ASCV_SCSIBUSY_B, scsi_busy);
6852 asc_dvc->queue_full_or_busy |= target_id;
6854 if (scsi_status == SAM_STAT_TASK_SET_FULL) {
6855 if (cur_dvc_qng > ASC_MIN_TAGGED_CMD) {
6857 asc_dvc->max_dvc_qng[tid_no] =
6860 AscWriteLramByte(iop_base,
6862 ASCV_MAX_DVC_QNG_BEG
6868 * Set the device queue depth to the number of
6869 * active requests when the QUEUE FULL condition
6872 boardp->queue_full |= target_id;
6873 boardp->queue_full_cnt[tid_no] =
6878 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
6881 #if CC_VERY_LONG_SG_LIST
6882 else if (int_halt_code == ASC_HALT_HOST_COPY_SG_LIST_TO_RISC) {
6886 uchar first_sg_wk_q_no;
6887 ASC_SCSI_Q *scsiq; /* Ptr to driver request. */
6888 ASC_SG_HEAD *sg_head; /* Ptr to driver SG request. */
6889 ASC_SG_LIST_Q scsi_sg_q; /* Structure written to queue. */
6890 ushort sg_list_dwords;
6891 ushort sg_entry_cnt;
6895 q_no = AscReadLramByte(iop_base, (ushort)ASCV_REQ_SG_LIST_QP);
6896 if (q_no == ASC_QLINK_END) {
6900 q_addr = ASC_QNO_TO_QADDR(q_no);
6903 * Convert the request's SRB pointer to a host ASC_SCSI_REQ
6904 * structure pointer using a macro provided by the driver.
6905 * The ASC_SCSI_REQ pointer provides a pointer to the
6906 * host ASC_SG_HEAD structure.
6908 /* Read request's SRB pointer. */
6909 scsiq = (ASC_SCSI_Q *)
6910 ASC_SRB2SCSIQ(ASC_U32_TO_VADDR(AscReadLramDWord(iop_base,
6913 ASC_SCSIQ_D_SRBPTR))));
6916 * Get request's first and working SG queue.
6918 sg_wk_q_no = AscReadLramByte(iop_base,
6920 ASC_SCSIQ_B_SG_WK_QP));
6922 first_sg_wk_q_no = AscReadLramByte(iop_base,
6924 ASC_SCSIQ_B_FIRST_SG_WK_QP));
6927 * Reset request's working SG queue back to the
6930 AscWriteLramByte(iop_base,
6932 (ushort)ASC_SCSIQ_B_SG_WK_QP),
6935 sg_head = scsiq->sg_head;
6938 * Set sg_entry_cnt to the number of SG elements
6939 * that will be completed on this interrupt.
6941 * Note: The allocated SG queues contain ASC_MAX_SG_LIST - 1
6942 * SG elements. The data_cnt and data_addr fields which
6943 * add 1 to the SG element capacity are not used when
6944 * restarting SG handling after a halt.
6946 if (scsiq->remain_sg_entry_cnt > (ASC_MAX_SG_LIST - 1)) {
6947 sg_entry_cnt = ASC_MAX_SG_LIST - 1;
6950 * Keep track of remaining number of SG elements that will
6951 * need to be handled on the next interrupt.
6953 scsiq->remain_sg_entry_cnt -= (ASC_MAX_SG_LIST - 1);
6955 sg_entry_cnt = scsiq->remain_sg_entry_cnt;
6956 scsiq->remain_sg_entry_cnt = 0;
6960 * Copy SG elements into the list of allocated SG queues.
6962 * Last index completed is saved in scsiq->next_sg_index.
6964 next_qp = first_sg_wk_q_no;
6965 q_addr = ASC_QNO_TO_QADDR(next_qp);
6966 scsi_sg_q.sg_head_qp = q_no;
6967 scsi_sg_q.cntl = QCSG_SG_XFER_LIST;
6968 for (i = 0; i < sg_head->queue_cnt; i++) {
6969 scsi_sg_q.seq_no = i + 1;
6970 if (sg_entry_cnt > ASC_SG_LIST_PER_Q) {
6971 sg_list_dwords = (uchar)(ASC_SG_LIST_PER_Q * 2);
6972 sg_entry_cnt -= ASC_SG_LIST_PER_Q;
6974 * After very first SG queue RISC FW uses next
6975 * SG queue first element then checks sg_list_cnt
6976 * against zero and then decrements, so set
6977 * sg_list_cnt 1 less than number of SG elements
6980 scsi_sg_q.sg_list_cnt = ASC_SG_LIST_PER_Q - 1;
6981 scsi_sg_q.sg_cur_list_cnt =
6982 ASC_SG_LIST_PER_Q - 1;
6985 * This is the last SG queue in the list of
6986 * allocated SG queues. If there are more
6987 * SG elements than will fit in the allocated
6988 * queues, then set the QCSG_SG_XFER_MORE flag.
6990 if (scsiq->remain_sg_entry_cnt != 0) {
6991 scsi_sg_q.cntl |= QCSG_SG_XFER_MORE;
6993 scsi_sg_q.cntl |= QCSG_SG_XFER_END;
6995 /* equals sg_entry_cnt * 2 */
6996 sg_list_dwords = sg_entry_cnt << 1;
6997 scsi_sg_q.sg_list_cnt = sg_entry_cnt - 1;
6998 scsi_sg_q.sg_cur_list_cnt = sg_entry_cnt - 1;
7002 scsi_sg_q.q_no = next_qp;
7003 AscMemWordCopyPtrToLram(iop_base,
7004 q_addr + ASC_SCSIQ_SGHD_CPY_BEG,
7005 (uchar *)&scsi_sg_q,
7006 sizeof(ASC_SG_LIST_Q) >> 1);
7008 AscMemDWordCopyPtrToLram(iop_base,
7009 q_addr + ASC_SGQ_LIST_BEG,
7011 sg_list[scsiq->next_sg_index],
7014 scsiq->next_sg_index += ASC_SG_LIST_PER_Q;
7017 * If the just completed SG queue contained the
7018 * last SG element, then no more SG queues need
7021 if (scsi_sg_q.cntl & QCSG_SG_XFER_END) {
7025 next_qp = AscReadLramByte(iop_base,
7028 q_addr = ASC_QNO_TO_QADDR(next_qp);
7032 * Clear the halt condition so the RISC will be restarted
7035 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
7038 #endif /* CC_VERY_LONG_SG_LIST */
7043 _AscCopyLramScsiDoneQ(PortAddr iop_base,
7045 ASC_QDONE_INFO *scsiq, ASC_DCNT max_dma_count)
7050 DvcGetQinfo(iop_base,
7051 q_addr + ASC_SCSIQ_DONE_INFO_BEG,
7053 (sizeof(ASC_SCSIQ_2) + sizeof(ASC_SCSIQ_3)) / 2);
7055 _val = AscReadLramWord(iop_base,
7056 (ushort)(q_addr + (ushort)ASC_SCSIQ_B_STATUS));
7057 scsiq->q_status = (uchar)_val;
7058 scsiq->q_no = (uchar)(_val >> 8);
7059 _val = AscReadLramWord(iop_base,
7060 (ushort)(q_addr + (ushort)ASC_SCSIQ_B_CNTL));
7061 scsiq->cntl = (uchar)_val;
7062 sg_queue_cnt = (uchar)(_val >> 8);
7063 _val = AscReadLramWord(iop_base,
7065 (ushort)ASC_SCSIQ_B_SENSE_LEN));
7066 scsiq->sense_len = (uchar)_val;
7067 scsiq->extra_bytes = (uchar)(_val >> 8);
7070 * Read high word of remain bytes from alternate location.
7072 scsiq->remain_bytes = (((ADV_DCNT)AscReadLramWord(iop_base,
7075 ASC_SCSIQ_W_ALT_DC1)))
7078 * Read low word of remain bytes from original location.
7080 scsiq->remain_bytes += AscReadLramWord(iop_base,
7081 (ushort)(q_addr + (ushort)
7082 ASC_SCSIQ_DW_REMAIN_XFER_CNT));
7084 scsiq->remain_bytes &= max_dma_count;
7085 return (sg_queue_cnt);
7088 static int AscIsrQDone(ASC_DVC_VAR *asc_dvc)
7097 ASC_SCSI_BIT_ID_TYPE scsi_busy;
7098 ASC_SCSI_BIT_ID_TYPE target_id;
7102 uchar cur_target_qng;
7103 ASC_QDONE_INFO scsiq_buf;
7104 ASC_QDONE_INFO *scsiq;
7107 iop_base = asc_dvc->iop_base;
7109 scsiq = (ASC_QDONE_INFO *)&scsiq_buf;
7110 done_q_tail = (uchar)AscGetVarDoneQTail(iop_base);
7111 q_addr = ASC_QNO_TO_QADDR(done_q_tail);
7112 next_qp = AscReadLramByte(iop_base,
7113 (ushort)(q_addr + (ushort)ASC_SCSIQ_B_FWD));
7114 if (next_qp != ASC_QLINK_END) {
7115 AscPutVarDoneQTail(iop_base, next_qp);
7116 q_addr = ASC_QNO_TO_QADDR(next_qp);
7117 sg_queue_cnt = _AscCopyLramScsiDoneQ(iop_base, q_addr, scsiq,
7118 asc_dvc->max_dma_count);
7119 AscWriteLramByte(iop_base,
7121 (ushort)ASC_SCSIQ_B_STATUS),
7123 q_status & (uchar)~(QS_READY |
7125 tid_no = ASC_TIX_TO_TID(scsiq->d2.target_ix);
7126 target_id = ASC_TIX_TO_TARGET_ID(scsiq->d2.target_ix);
7127 if ((scsiq->cntl & QC_SG_HEAD) != 0) {
7129 sg_list_qp = next_qp;
7130 for (q_cnt = 0; q_cnt < sg_queue_cnt; q_cnt++) {
7131 sg_list_qp = AscReadLramByte(iop_base,
7135 sg_q_addr = ASC_QNO_TO_QADDR(sg_list_qp);
7136 if (sg_list_qp == ASC_QLINK_END) {
7137 AscSetLibErrorCode(asc_dvc,
7138 ASCQ_ERR_SG_Q_LINKS);
7139 scsiq->d3.done_stat = QD_WITH_ERROR;
7140 scsiq->d3.host_stat =
7141 QHSTA_D_QDONE_SG_LIST_CORRUPTED;
7142 goto FATAL_ERR_QDONE;
7144 AscWriteLramByte(iop_base,
7145 (ushort)(sg_q_addr + (ushort)
7146 ASC_SCSIQ_B_STATUS),
7149 n_q_used = sg_queue_cnt + 1;
7150 AscPutVarDoneQTail(iop_base, sg_list_qp);
7152 if (asc_dvc->queue_full_or_busy & target_id) {
7153 cur_target_qng = AscReadLramByte(iop_base,
7159 if (cur_target_qng < asc_dvc->max_dvc_qng[tid_no]) {
7160 scsi_busy = AscReadLramByte(iop_base, (ushort)
7162 scsi_busy &= ~target_id;
7163 AscWriteLramByte(iop_base,
7164 (ushort)ASCV_SCSIBUSY_B,
7166 asc_dvc->queue_full_or_busy &= ~target_id;
7169 if (asc_dvc->cur_total_qng >= n_q_used) {
7170 asc_dvc->cur_total_qng -= n_q_used;
7171 if (asc_dvc->cur_dvc_qng[tid_no] != 0) {
7172 asc_dvc->cur_dvc_qng[tid_no]--;
7175 AscSetLibErrorCode(asc_dvc, ASCQ_ERR_CUR_QNG);
7176 scsiq->d3.done_stat = QD_WITH_ERROR;
7177 goto FATAL_ERR_QDONE;
7179 if ((scsiq->d2.srb_ptr == 0UL) ||
7180 ((scsiq->q_status & QS_ABORTED) != 0)) {
7182 } else if (scsiq->q_status == QS_DONE) {
7183 false_overrun = FALSE;
7184 if (scsiq->extra_bytes != 0) {
7185 scsiq->remain_bytes +=
7186 (ADV_DCNT)scsiq->extra_bytes;
7188 if (scsiq->d3.done_stat == QD_WITH_ERROR) {
7189 if (scsiq->d3.host_stat ==
7190 QHSTA_M_DATA_OVER_RUN) {
7192 cntl & (QC_DATA_IN | QC_DATA_OUT))
7194 scsiq->d3.done_stat =
7196 scsiq->d3.host_stat =
7198 } else if (false_overrun) {
7199 scsiq->d3.done_stat =
7201 scsiq->d3.host_stat =
7204 } else if (scsiq->d3.host_stat ==
7205 QHSTA_M_HUNG_REQ_SCSI_BUS_RESET) {
7206 AscStopChip(iop_base);
7207 AscSetChipControl(iop_base,
7208 (uchar)(CC_SCSI_RESET
7210 DvcDelayNanoSecond(asc_dvc, 60000);
7211 AscSetChipControl(iop_base, CC_HALT);
7212 AscSetChipStatus(iop_base,
7213 CIW_CLR_SCSI_RESET_INT);
7214 AscSetChipStatus(iop_base, 0);
7215 AscSetChipControl(iop_base, 0);
7218 if ((scsiq->cntl & QC_NO_CALLBACK) == 0) {
7219 asc_isr_callback(asc_dvc, scsiq);
7221 if ((AscReadLramByte(iop_base,
7222 (ushort)(q_addr + (ushort)
7225 asc_dvc->unit_not_ready &= ~target_id;
7226 if (scsiq->d3.done_stat != QD_NO_ERROR) {
7227 asc_dvc->start_motor &=
7234 AscSetLibErrorCode(asc_dvc, ASCQ_ERR_Q_STATUS);
7236 if ((scsiq->cntl & QC_NO_CALLBACK) == 0) {
7237 asc_isr_callback(asc_dvc, scsiq);
7245 static int AscISR(ASC_DVC_VAR *asc_dvc)
7247 ASC_CS_TYPE chipstat;
7249 ushort saved_ram_addr;
7251 uchar saved_ctrl_reg;
7256 iop_base = asc_dvc->iop_base;
7257 int_pending = FALSE;
7259 if (AscIsIntPending(iop_base) == 0) {
7263 if ((asc_dvc->init_state & ASC_INIT_STATE_END_LOAD_MC) == 0) {
7266 if (asc_dvc->in_critical_cnt != 0) {
7267 AscSetLibErrorCode(asc_dvc, ASCQ_ERR_ISR_ON_CRITICAL);
7270 if (asc_dvc->is_in_int) {
7271 AscSetLibErrorCode(asc_dvc, ASCQ_ERR_ISR_RE_ENTRY);
7274 asc_dvc->is_in_int = TRUE;
7275 ctrl_reg = AscGetChipControl(iop_base);
7276 saved_ctrl_reg = ctrl_reg & (~(CC_SCSI_RESET | CC_CHIP_RESET |
7277 CC_SINGLE_STEP | CC_DIAG | CC_TEST));
7278 chipstat = AscGetChipStatus(iop_base);
7279 if (chipstat & CSW_SCSI_RESET_LATCH) {
7280 if (!(asc_dvc->bus_type & (ASC_IS_VL | ASC_IS_EISA))) {
7283 asc_dvc->sdtr_done = 0;
7284 saved_ctrl_reg &= (uchar)(~CC_HALT);
7285 while ((AscGetChipStatus(iop_base) &
7286 CSW_SCSI_RESET_ACTIVE) && (i-- > 0)) {
7287 DvcSleepMilliSecond(100);
7289 AscSetChipControl(iop_base, (CC_CHIP_RESET | CC_HALT));
7290 AscSetChipControl(iop_base, CC_HALT);
7291 AscSetChipStatus(iop_base, CIW_CLR_SCSI_RESET_INT);
7292 AscSetChipStatus(iop_base, 0);
7293 chipstat = AscGetChipStatus(iop_base);
7296 saved_ram_addr = AscGetChipLramAddr(iop_base);
7297 host_flag = AscReadLramByte(iop_base,
7299 (uchar)(~ASC_HOST_FLAG_IN_ISR);
7300 AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B,
7301 (uchar)(host_flag | (uchar)ASC_HOST_FLAG_IN_ISR));
7302 if ((chipstat & CSW_INT_PENDING)
7305 AscAckInterrupt(iop_base);
7307 if ((chipstat & CSW_HALTED) && (ctrl_reg & CC_SINGLE_STEP)) {
7308 if (AscIsrChipHalted(asc_dvc) == ERR) {
7309 goto ISR_REPORT_QDONE_FATAL_ERROR;
7311 saved_ctrl_reg &= (uchar)(~CC_HALT);
7314 ISR_REPORT_QDONE_FATAL_ERROR:
7315 if ((asc_dvc->dvc_cntl & ASC_CNTL_INT_MULTI_Q) != 0) {
7317 AscIsrQDone(asc_dvc)) & 0x01) != 0) {
7322 AscIsrQDone(asc_dvc)) == 1) {
7325 } while (status == 0x11);
7327 if ((status & 0x80) != 0)
7331 AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, host_flag);
7332 AscSetChipLramAddr(iop_base, saved_ram_addr);
7333 AscSetChipControl(iop_base, saved_ctrl_reg);
7334 asc_dvc->is_in_int = FALSE;
7335 return (int_pending);
7338 /* Microcode buffer is kept after initialization for error recovery. */
7339 static uchar _asc_mcode_buf[] = {
7340 0x01, 0x03, 0x01, 0x19, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
7341 0x00, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F,
7342 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
7343 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
7344 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
7345 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC3, 0x12, 0x0D, 0x05,
7346 0x01, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
7347 0xFF, 0x80, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
7348 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0xFF,
7349 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
7350 0x00, 0x00, 0xE4, 0x88, 0x00, 0x00, 0x00, 0x00, 0x80, 0x73, 0x48, 0x04,
7351 0x36, 0x00, 0x00, 0xA2, 0xC2, 0x00, 0x80, 0x73, 0x03, 0x23, 0x36, 0x40,
7352 0xB6, 0x00, 0x36, 0x00, 0x05, 0xD6, 0x0C, 0xD2, 0x12, 0xDA, 0x00, 0xA2,
7353 0xC2, 0x00, 0x92, 0x80, 0x1E, 0x98, 0x50, 0x00, 0xF5, 0x00, 0x48, 0x98,
7354 0xDF, 0x23, 0x36, 0x60, 0xB6, 0x00, 0x92, 0x80, 0x4F, 0x00, 0xF5, 0x00,
7355 0x48, 0x98, 0xEF, 0x23, 0x36, 0x60, 0xB6, 0x00, 0x92, 0x80, 0x80, 0x62,
7356 0x92, 0x80, 0x00, 0x46, 0x15, 0xEE, 0x13, 0xEA, 0x02, 0x01, 0x09, 0xD8,
7357 0xCD, 0x04, 0x4D, 0x00, 0x00, 0xA3, 0xD6, 0x00, 0xA6, 0x97, 0x7F, 0x23,
7358 0x04, 0x61, 0x84, 0x01, 0xE6, 0x84, 0xD2, 0xC1, 0x80, 0x73, 0xCD, 0x04,
7359 0x4D, 0x00, 0x00, 0xA3, 0xDA, 0x01, 0xA6, 0x97, 0xC6, 0x81, 0xC2, 0x88,
7360 0x80, 0x73, 0x80, 0x77, 0x00, 0x01, 0x01, 0xA1, 0xFE, 0x00, 0x4F, 0x00,
7361 0x84, 0x97, 0x07, 0xA6, 0x08, 0x01, 0x00, 0x33, 0x03, 0x00, 0xC2, 0x88,
7362 0x03, 0x03, 0x01, 0xDE, 0xC2, 0x88, 0xCE, 0x00, 0x69, 0x60, 0xCE, 0x00,
7363 0x02, 0x03, 0x4A, 0x60, 0x00, 0xA2, 0x78, 0x01, 0x80, 0x63, 0x07, 0xA6,
7364 0x24, 0x01, 0x78, 0x81, 0x03, 0x03, 0x80, 0x63, 0xE2, 0x00, 0x07, 0xA6,
7365 0x34, 0x01, 0x00, 0x33, 0x04, 0x00, 0xC2, 0x88, 0x03, 0x07, 0x02, 0x01,
7366 0x04, 0xCA, 0x0D, 0x23, 0x68, 0x98, 0x4D, 0x04, 0x04, 0x85, 0x05, 0xD8,
7367 0x0D, 0x23, 0x68, 0x98, 0xCD, 0x04, 0x15, 0x23, 0xF8, 0x88, 0xFB, 0x23,
7368 0x02, 0x61, 0x82, 0x01, 0x80, 0x63, 0x02, 0x03, 0x06, 0xA3, 0x62, 0x01,
7369 0x00, 0x33, 0x0A, 0x00, 0xC2, 0x88, 0x4E, 0x00, 0x07, 0xA3, 0x6E, 0x01,
7370 0x00, 0x33, 0x0B, 0x00, 0xC2, 0x88, 0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33,
7371 0x1A, 0x00, 0xC2, 0x88, 0x50, 0x04, 0x88, 0x81, 0x06, 0xAB, 0x82, 0x01,
7372 0x88, 0x81, 0x4E, 0x00, 0x07, 0xA3, 0x92, 0x01, 0x50, 0x00, 0x00, 0xA3,
7373 0x3C, 0x01, 0x00, 0x05, 0x7C, 0x81, 0x46, 0x97, 0x02, 0x01, 0x05, 0xC6,
7374 0x04, 0x23, 0xA0, 0x01, 0x15, 0x23, 0xA1, 0x01, 0xBE, 0x81, 0xFD, 0x23,
7375 0x02, 0x61, 0x82, 0x01, 0x0A, 0xDA, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA0,
7376 0xB4, 0x01, 0x80, 0x63, 0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33, 0x1B, 0x00,
7377 0xC2, 0x88, 0x06, 0x23, 0x68, 0x98, 0xCD, 0x04, 0xE6, 0x84, 0x06, 0x01,
7378 0x00, 0xA2, 0xD4, 0x01, 0x57, 0x60, 0x00, 0xA0, 0xDA, 0x01, 0xE6, 0x84,
7379 0x80, 0x23, 0xA0, 0x01, 0xE6, 0x84, 0x80, 0x73, 0x4B, 0x00, 0x06, 0x61,
7380 0x00, 0xA2, 0x00, 0x02, 0x04, 0x01, 0x0C, 0xDE, 0x02, 0x01, 0x03, 0xCC,
7381 0x4F, 0x00, 0x84, 0x97, 0xFC, 0x81, 0x08, 0x23, 0x02, 0x41, 0x82, 0x01,
7382 0x4F, 0x00, 0x62, 0x97, 0x48, 0x04, 0x84, 0x80, 0xF0, 0x97, 0x00, 0x46,
7383 0x56, 0x00, 0x03, 0xC0, 0x01, 0x23, 0xE8, 0x00, 0x81, 0x73, 0x06, 0x29,
7384 0x03, 0x42, 0x06, 0xE2, 0x03, 0xEE, 0x6B, 0xEB, 0x11, 0x23, 0xF8, 0x88,
7385 0x04, 0x98, 0xF0, 0x80, 0x80, 0x73, 0x80, 0x77, 0x07, 0xA4, 0x2A, 0x02,
7386 0x7C, 0x95, 0x06, 0xA6, 0x34, 0x02, 0x03, 0xA6, 0x4C, 0x04, 0x46, 0x82,
7387 0x04, 0x01, 0x03, 0xD8, 0xB4, 0x98, 0x6A, 0x96, 0x46, 0x82, 0xFE, 0x95,
7388 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0xB6, 0x2D, 0x02, 0xA6, 0x6C, 0x02,
7389 0x07, 0xA6, 0x5A, 0x02, 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x62, 0x02,
7390 0xC2, 0x88, 0x7C, 0x95, 0x48, 0x82, 0x60, 0x96, 0x48, 0x82, 0x04, 0x23,
7391 0xA0, 0x01, 0x14, 0x23, 0xA1, 0x01, 0x3C, 0x84, 0x04, 0x01, 0x0C, 0xDC,
7392 0xE0, 0x23, 0x25, 0x61, 0xEF, 0x00, 0x14, 0x01, 0x4F, 0x04, 0xA8, 0x01,
7393 0x6F, 0x00, 0xA5, 0x01, 0x03, 0x23, 0xA4, 0x01, 0x06, 0x23, 0x9C, 0x01,
7394 0x24, 0x2B, 0x1C, 0x01, 0x02, 0xA6, 0xAA, 0x02, 0x07, 0xA6, 0x5A, 0x02,
7395 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x20, 0x04, 0x01, 0xA6, 0xB4, 0x02,
7396 0x00, 0xA6, 0xB4, 0x02, 0x00, 0x33, 0x12, 0x00, 0xC2, 0x88, 0x00, 0x0E,
7397 0x80, 0x63, 0x00, 0x43, 0x00, 0xA0, 0x8C, 0x02, 0x4D, 0x04, 0x04, 0x01,
7398 0x0B, 0xDC, 0xE7, 0x23, 0x04, 0x61, 0x84, 0x01, 0x10, 0x31, 0x12, 0x35,
7399 0x14, 0x01, 0xEC, 0x00, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00, 0xEA, 0x82,
7400 0x18, 0x23, 0x04, 0x61, 0x18, 0xA0, 0xE2, 0x02, 0x04, 0x01, 0xA2, 0xC8,
7401 0x00, 0x33, 0x1F, 0x00, 0xC2, 0x88, 0x08, 0x31, 0x0A, 0x35, 0x0C, 0x39,
7402 0x0E, 0x3D, 0x7E, 0x98, 0xB6, 0x2D, 0x01, 0xA6, 0x14, 0x03, 0x00, 0xA6,
7403 0x14, 0x03, 0x07, 0xA6, 0x0C, 0x03, 0x06, 0xA6, 0x10, 0x03, 0x03, 0xA6,
7404 0x20, 0x04, 0x02, 0xA6, 0x6C, 0x02, 0x00, 0x33, 0x33, 0x00, 0xC2, 0x88,
7405 0x7C, 0x95, 0xEE, 0x82, 0x60, 0x96, 0xEE, 0x82, 0x82, 0x98, 0x80, 0x42,
7406 0x7E, 0x98, 0x64, 0xE4, 0x04, 0x01, 0x2D, 0xC8, 0x31, 0x05, 0x07, 0x01,
7407 0x00, 0xA2, 0x54, 0x03, 0x00, 0x43, 0x87, 0x01, 0x05, 0x05, 0x86, 0x98,
7408 0x7E, 0x98, 0x00, 0xA6, 0x16, 0x03, 0x07, 0xA6, 0x4C, 0x03, 0x03, 0xA6,
7409 0x3C, 0x04, 0x06, 0xA6, 0x50, 0x03, 0x01, 0xA6, 0x16, 0x03, 0x00, 0x33,
7410 0x25, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0x32, 0x83, 0x60, 0x96, 0x32, 0x83,
7411 0x04, 0x01, 0x10, 0xCE, 0x07, 0xC8, 0x05, 0x05, 0xEB, 0x04, 0x00, 0x33,
7412 0x00, 0x20, 0xC0, 0x20, 0x81, 0x62, 0x72, 0x83, 0x00, 0x01, 0x05, 0x05,
7413 0xFF, 0xA2, 0x7A, 0x03, 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x2E, 0x83,
7414 0x05, 0x05, 0x15, 0x01, 0x00, 0xA2, 0x9A, 0x03, 0xEC, 0x00, 0x6E, 0x00,
7415 0x95, 0x01, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00, 0x01, 0xA6, 0x96, 0x03,
7416 0x00, 0xA6, 0x96, 0x03, 0x10, 0x84, 0x80, 0x42, 0x7E, 0x98, 0x01, 0xA6,
7417 0xA4, 0x03, 0x00, 0xA6, 0xBC, 0x03, 0x10, 0x84, 0xA8, 0x98, 0x80, 0x42,
7418 0x01, 0xA6, 0xA4, 0x03, 0x07, 0xA6, 0xB2, 0x03, 0xD4, 0x83, 0x7C, 0x95,
7419 0xA8, 0x83, 0x00, 0x33, 0x2F, 0x00, 0xC2, 0x88, 0xA8, 0x98, 0x80, 0x42,
7420 0x00, 0xA6, 0xBC, 0x03, 0x07, 0xA6, 0xCA, 0x03, 0xD4, 0x83, 0x7C, 0x95,
7421 0xC0, 0x83, 0x00, 0x33, 0x26, 0x00, 0xC2, 0x88, 0x38, 0x2B, 0x80, 0x32,
7422 0x80, 0x36, 0x04, 0x23, 0xA0, 0x01, 0x12, 0x23, 0xA1, 0x01, 0x10, 0x84,
7423 0x07, 0xF0, 0x06, 0xA4, 0xF4, 0x03, 0x80, 0x6B, 0x80, 0x67, 0x05, 0x23,
7424 0x83, 0x03, 0x80, 0x63, 0x03, 0xA6, 0x0E, 0x04, 0x07, 0xA6, 0x06, 0x04,
7425 0x06, 0xA6, 0x0A, 0x04, 0x00, 0x33, 0x17, 0x00, 0xC2, 0x88, 0x7C, 0x95,
7426 0xF4, 0x83, 0x60, 0x96, 0xF4, 0x83, 0x20, 0x84, 0x07, 0xF0, 0x06, 0xA4,
7427 0x20, 0x04, 0x80, 0x6B, 0x80, 0x67, 0x05, 0x23, 0x83, 0x03, 0x80, 0x63,
7428 0xB6, 0x2D, 0x03, 0xA6, 0x3C, 0x04, 0x07, 0xA6, 0x34, 0x04, 0x06, 0xA6,
7429 0x38, 0x04, 0x00, 0x33, 0x30, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0x20, 0x84,
7430 0x60, 0x96, 0x20, 0x84, 0x1D, 0x01, 0x06, 0xCC, 0x00, 0x33, 0x00, 0x84,
7431 0xC0, 0x20, 0x00, 0x23, 0xEA, 0x00, 0x81, 0x62, 0xA2, 0x0D, 0x80, 0x63,
7432 0x07, 0xA6, 0x5A, 0x04, 0x00, 0x33, 0x18, 0x00, 0xC2, 0x88, 0x03, 0x03,
7433 0x80, 0x63, 0xA3, 0x01, 0x07, 0xA4, 0x64, 0x04, 0x23, 0x01, 0x00, 0xA2,
7434 0x86, 0x04, 0x0A, 0xA0, 0x76, 0x04, 0xE0, 0x00, 0x00, 0x33, 0x1D, 0x00,
7435 0xC2, 0x88, 0x0B, 0xA0, 0x82, 0x04, 0xE0, 0x00, 0x00, 0x33, 0x1E, 0x00,
7436 0xC2, 0x88, 0x42, 0x23, 0xF8, 0x88, 0x00, 0x23, 0x22, 0xA3, 0xE6, 0x04,
7437 0x08, 0x23, 0x22, 0xA3, 0xA2, 0x04, 0x28, 0x23, 0x22, 0xA3, 0xAE, 0x04,
7438 0x02, 0x23, 0x22, 0xA3, 0xC4, 0x04, 0x42, 0x23, 0xF8, 0x88, 0x4A, 0x00,
7439 0x06, 0x61, 0x00, 0xA0, 0xAE, 0x04, 0x45, 0x23, 0xF8, 0x88, 0x04, 0x98,
7440 0x00, 0xA2, 0xC0, 0x04, 0xB4, 0x98, 0x00, 0x33, 0x00, 0x82, 0xC0, 0x20,
7441 0x81, 0x62, 0xE8, 0x81, 0x47, 0x23, 0xF8, 0x88, 0x04, 0x01, 0x0B, 0xDE,
7442 0x04, 0x98, 0xB4, 0x98, 0x00, 0x33, 0x00, 0x81, 0xC0, 0x20, 0x81, 0x62,
7443 0x14, 0x01, 0x00, 0xA0, 0x00, 0x02, 0x43, 0x23, 0xF8, 0x88, 0x04, 0x23,
7444 0xA0, 0x01, 0x44, 0x23, 0xA1, 0x01, 0x80, 0x73, 0x4D, 0x00, 0x03, 0xA3,
7445 0xF4, 0x04, 0x00, 0x33, 0x27, 0x00, 0xC2, 0x88, 0x04, 0x01, 0x04, 0xDC,
7446 0x02, 0x23, 0xA2, 0x01, 0x04, 0x23, 0xA0, 0x01, 0x04, 0x98, 0x26, 0x95,
7447 0x4B, 0x00, 0xF6, 0x00, 0x4F, 0x04, 0x4F, 0x00, 0x00, 0xA3, 0x22, 0x05,
7448 0x00, 0x05, 0x76, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x1C, 0x05, 0x0A, 0x85,
7449 0x46, 0x97, 0xCD, 0x04, 0x24, 0x85, 0x48, 0x04, 0x84, 0x80, 0x02, 0x01,
7450 0x03, 0xDA, 0x80, 0x23, 0x82, 0x01, 0x34, 0x85, 0x02, 0x23, 0xA0, 0x01,
7451 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x40, 0x05, 0x1D, 0x01, 0x04, 0xD6,
7452 0xFF, 0x23, 0x86, 0x41, 0x4B, 0x60, 0xCB, 0x00, 0xFF, 0x23, 0x80, 0x01,
7453 0x49, 0x00, 0x81, 0x01, 0x04, 0x01, 0x02, 0xC8, 0x30, 0x01, 0x80, 0x01,
7454 0xF7, 0x04, 0x03, 0x01, 0x49, 0x04, 0x80, 0x01, 0xC9, 0x00, 0x00, 0x05,
7455 0x00, 0x01, 0xFF, 0xA0, 0x60, 0x05, 0x77, 0x04, 0x01, 0x23, 0xEA, 0x00,
7456 0x5D, 0x00, 0xFE, 0xC7, 0x00, 0x62, 0x00, 0x23, 0xEA, 0x00, 0x00, 0x63,
7457 0x07, 0xA4, 0xF8, 0x05, 0x03, 0x03, 0x02, 0xA0, 0x8E, 0x05, 0xF4, 0x85,
7458 0x00, 0x33, 0x2D, 0x00, 0xC2, 0x88, 0x04, 0xA0, 0xB8, 0x05, 0x80, 0x63,
7459 0x00, 0x23, 0xDF, 0x00, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0xA4, 0x05,
7460 0x1D, 0x01, 0x06, 0xD6, 0x02, 0x23, 0x02, 0x41, 0x82, 0x01, 0x50, 0x00,
7461 0x62, 0x97, 0x04, 0x85, 0x04, 0x23, 0x02, 0x41, 0x82, 0x01, 0x04, 0x85,
7462 0x08, 0xA0, 0xBE, 0x05, 0xF4, 0x85, 0x03, 0xA0, 0xC4, 0x05, 0xF4, 0x85,
7463 0x01, 0xA0, 0xCE, 0x05, 0x88, 0x00, 0x80, 0x63, 0xCC, 0x86, 0x07, 0xA0,
7464 0xEE, 0x05, 0x5F, 0x00, 0x00, 0x2B, 0xDF, 0x08, 0x00, 0xA2, 0xE6, 0x05,
7465 0x80, 0x67, 0x80, 0x63, 0x01, 0xA2, 0x7A, 0x06, 0x7C, 0x85, 0x06, 0x23,
7466 0x68, 0x98, 0x48, 0x23, 0xF8, 0x88, 0x07, 0x23, 0x80, 0x00, 0x06, 0x87,
7467 0x80, 0x63, 0x7C, 0x85, 0x00, 0x23, 0xDF, 0x00, 0x00, 0x63, 0x4A, 0x00,
7468 0x06, 0x61, 0x00, 0xA2, 0x36, 0x06, 0x1D, 0x01, 0x16, 0xD4, 0xC0, 0x23,
7469 0x07, 0x41, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, 0x1C, 0x06, 0x00, 0x33,
7470 0x37, 0x00, 0xC2, 0x88, 0x1D, 0x01, 0x01, 0xD6, 0x20, 0x23, 0x63, 0x60,
7471 0x83, 0x03, 0x80, 0x63, 0x02, 0x23, 0xDF, 0x00, 0x07, 0xA6, 0x7C, 0x05,
7472 0xEF, 0x04, 0x6F, 0x00, 0x00, 0x63, 0x4B, 0x00, 0x06, 0x41, 0xCB, 0x00,
7473 0x52, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x4E, 0x06, 0x1D, 0x01, 0x03, 0xCA,
7474 0xC0, 0x23, 0x07, 0x41, 0x00, 0x63, 0x1D, 0x01, 0x04, 0xCC, 0x00, 0x33,
7475 0x00, 0x83, 0xC0, 0x20, 0x81, 0x62, 0x80, 0x23, 0x07, 0x41, 0x00, 0x63,
7476 0x80, 0x67, 0x08, 0x23, 0x83, 0x03, 0x80, 0x63, 0x00, 0x63, 0x01, 0x23,
7477 0xDF, 0x00, 0x06, 0xA6, 0x84, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x80, 0x67,
7478 0x80, 0x63, 0x00, 0x33, 0x00, 0x40, 0xC0, 0x20, 0x81, 0x62, 0x00, 0x63,
7479 0x00, 0x00, 0xFE, 0x95, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, 0x94, 0x06,
7480 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x00, 0x01, 0xA0, 0x14, 0x07, 0x00, 0x2B,
7481 0x40, 0x0E, 0x80, 0x63, 0x01, 0x00, 0x06, 0xA6, 0xAA, 0x06, 0x07, 0xA6,
7482 0x7C, 0x05, 0x40, 0x0E, 0x80, 0x63, 0x00, 0x43, 0x00, 0xA0, 0xA2, 0x06,
7483 0x06, 0xA6, 0xBC, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x80, 0x67, 0x40, 0x0E,
7484 0x80, 0x63, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x23, 0xDF, 0x00, 0x00, 0x63,
7485 0x07, 0xA6, 0xD6, 0x06, 0x00, 0x33, 0x2A, 0x00, 0xC2, 0x88, 0x03, 0x03,
7486 0x80, 0x63, 0x89, 0x00, 0x0A, 0x2B, 0x07, 0xA6, 0xE8, 0x06, 0x00, 0x33,
7487 0x29, 0x00, 0xC2, 0x88, 0x00, 0x43, 0x00, 0xA2, 0xF4, 0x06, 0xC0, 0x0E,
7488 0x80, 0x63, 0xDE, 0x86, 0xC0, 0x0E, 0x00, 0x33, 0x00, 0x80, 0xC0, 0x20,
7489 0x81, 0x62, 0x04, 0x01, 0x02, 0xDA, 0x80, 0x63, 0x7C, 0x85, 0x80, 0x7B,
7490 0x80, 0x63, 0x06, 0xA6, 0x8C, 0x06, 0x00, 0x33, 0x2C, 0x00, 0xC2, 0x88,
7491 0x0C, 0xA2, 0x2E, 0x07, 0xFE, 0x95, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6,
7492 0x2C, 0x07, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x33, 0x3D, 0x00, 0xC2, 0x88,
7493 0x00, 0x00, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0x0C, 0xA0, 0x44, 0x07,
7494 0x07, 0xA6, 0x7C, 0x05, 0xBF, 0x23, 0x04, 0x61, 0x84, 0x01, 0xE6, 0x84,
7495 0x00, 0x63, 0xF0, 0x04, 0x01, 0x01, 0xF1, 0x00, 0x00, 0x01, 0xF2, 0x00,
7496 0x01, 0x05, 0x80, 0x01, 0x72, 0x04, 0x71, 0x00, 0x81, 0x01, 0x70, 0x04,
7497 0x80, 0x05, 0x81, 0x05, 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04,
7498 0x01, 0x01, 0xF1, 0x00, 0x70, 0x00, 0x81, 0x01, 0x70, 0x04, 0x71, 0x00,
7499 0x81, 0x01, 0x72, 0x00, 0x80, 0x01, 0x71, 0x04, 0x70, 0x00, 0x80, 0x01,
7500 0x70, 0x04, 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x00, 0x01,
7501 0xF1, 0x00, 0x70, 0x00, 0x80, 0x01, 0x70, 0x04, 0x71, 0x00, 0x80, 0x01,
7502 0x72, 0x00, 0x81, 0x01, 0x71, 0x04, 0x70, 0x00, 0x81, 0x01, 0x70, 0x04,
7503 0x00, 0x63, 0x00, 0x23, 0xB3, 0x01, 0x83, 0x05, 0xA3, 0x01, 0xA2, 0x01,
7504 0xA1, 0x01, 0x01, 0x23, 0xA0, 0x01, 0x00, 0x01, 0xC8, 0x00, 0x03, 0xA1,
7505 0xC4, 0x07, 0x00, 0x33, 0x07, 0x00, 0xC2, 0x88, 0x80, 0x05, 0x81, 0x05,
7506 0x04, 0x01, 0x11, 0xC8, 0x48, 0x00, 0xB0, 0x01, 0xB1, 0x01, 0x08, 0x23,
7507 0xB2, 0x01, 0x05, 0x01, 0x48, 0x04, 0x00, 0x43, 0x00, 0xA2, 0xE4, 0x07,
7508 0x00, 0x05, 0xDA, 0x87, 0x00, 0x01, 0xC8, 0x00, 0xFF, 0x23, 0x80, 0x01,
7509 0x05, 0x05, 0x00, 0x63, 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04,
7510 0x00, 0x02, 0x80, 0x43, 0x76, 0x08, 0x80, 0x02, 0x77, 0x04, 0x00, 0x63,
7511 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, 0x00, 0x02, 0x00, 0xA0,
7512 0x14, 0x08, 0x16, 0x88, 0x00, 0x43, 0x76, 0x08, 0x80, 0x02, 0x77, 0x04,
7513 0x00, 0x63, 0xF3, 0x04, 0x00, 0x23, 0xF4, 0x00, 0x74, 0x00, 0x80, 0x43,
7514 0xF4, 0x00, 0xCF, 0x40, 0x00, 0xA2, 0x44, 0x08, 0x74, 0x04, 0x02, 0x01,
7515 0xF7, 0xC9, 0xF6, 0xD9, 0x00, 0x01, 0x01, 0xA1, 0x24, 0x08, 0x04, 0x98,
7516 0x26, 0x95, 0x24, 0x88, 0x73, 0x04, 0x00, 0x63, 0xF3, 0x04, 0x75, 0x04,
7517 0x5A, 0x88, 0x02, 0x01, 0x04, 0xD8, 0x46, 0x97, 0x04, 0x98, 0x26, 0x95,
7518 0x4A, 0x88, 0x75, 0x00, 0x00, 0xA3, 0x64, 0x08, 0x00, 0x05, 0x4E, 0x88,
7519 0x73, 0x04, 0x00, 0x63, 0x80, 0x7B, 0x80, 0x63, 0x06, 0xA6, 0x76, 0x08,
7520 0x00, 0x33, 0x3E, 0x00, 0xC2, 0x88, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63,
7521 0x00, 0x63, 0x38, 0x2B, 0x9C, 0x88, 0x38, 0x2B, 0x92, 0x88, 0x32, 0x09,
7522 0x31, 0x05, 0x92, 0x98, 0x05, 0x05, 0xB2, 0x09, 0x00, 0x63, 0x00, 0x32,
7523 0x00, 0x36, 0x00, 0x3A, 0x00, 0x3E, 0x00, 0x63, 0x80, 0x32, 0x80, 0x36,
7524 0x80, 0x3A, 0x80, 0x3E, 0xB4, 0x3D, 0x00, 0x63, 0x38, 0x2B, 0x40, 0x32,
7525 0x40, 0x36, 0x40, 0x3A, 0x40, 0x3E, 0x00, 0x63, 0x5A, 0x20, 0xC9, 0x40,
7526 0x00, 0xA0, 0xB4, 0x08, 0x5D, 0x00, 0xFE, 0xC3, 0x00, 0x63, 0x80, 0x73,
7527 0xE6, 0x20, 0x02, 0x23, 0xE8, 0x00, 0x82, 0x73, 0xFF, 0xFD, 0x80, 0x73,
7528 0x13, 0x23, 0xF8, 0x88, 0x66, 0x20, 0xC0, 0x20, 0x04, 0x23, 0xA0, 0x01,
7529 0xA1, 0x23, 0xA1, 0x01, 0x81, 0x62, 0xE2, 0x88, 0x80, 0x73, 0x80, 0x77,
7530 0x68, 0x00, 0x00, 0xA2, 0x80, 0x00, 0x03, 0xC2, 0xF1, 0xC7, 0x41, 0x23,
7531 0xF8, 0x88, 0x11, 0x23, 0xA1, 0x01, 0x04, 0x23, 0xA0, 0x01, 0xE6, 0x84,
7534 static ushort _asc_mcode_size = sizeof(_asc_mcode_buf);
7535 static ADV_DCNT _asc_mcode_chksum = 0x012C453FUL;
7537 #define ASC_SYN_OFFSET_ONE_DISABLE_LIST 16
7538 static uchar _syn_offset_one_disable_cmd[ASC_SYN_OFFSET_ONE_DISABLE_LIST] = {
7557 static int AscExeScsiQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq)
7560 ulong last_int_level;
7563 int disable_syn_offset_one_fix;
7566 ushort sg_entry_cnt = 0;
7567 ushort sg_entry_cnt_minus_one = 0;
7574 ASC_SG_HEAD *sg_head;
7577 iop_base = asc_dvc->iop_base;
7578 sg_head = scsiq->sg_head;
7579 if (asc_dvc->err_code != 0)
7581 if (scsiq == (ASC_SCSI_Q *)0L) {
7582 AscSetLibErrorCode(asc_dvc, ASCQ_ERR_SCSIQ_NULL_PTR);
7586 if ((scsiq->q2.tag_code & ASC_TAG_FLAG_EXTRA_BYTES) == 0) {
7587 scsiq->q1.extra_bytes = 0;
7590 target_ix = scsiq->q2.target_ix;
7591 tid_no = ASC_TIX_TO_TID(target_ix);
7593 if (scsiq->cdbptr[0] == REQUEST_SENSE) {
7594 if ((asc_dvc->init_sdtr & scsiq->q1.target_id) != 0) {
7595 asc_dvc->sdtr_done &= ~scsiq->q1.target_id;
7596 sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no);
7597 AscMsgOutSDTR(asc_dvc,
7599 sdtr_period_tbl[(sdtr_data >> 4) &
7603 (uchar)(sdtr_data & (uchar)
7604 ASC_SYN_MAX_OFFSET));
7605 scsiq->q1.cntl |= (QC_MSG_OUT | QC_URGENT);
7608 last_int_level = DvcEnterCritical();
7609 if (asc_dvc->in_critical_cnt != 0) {
7610 DvcLeaveCritical(last_int_level);
7611 AscSetLibErrorCode(asc_dvc, ASCQ_ERR_CRITICAL_RE_ENTRY);
7614 asc_dvc->in_critical_cnt++;
7615 if ((scsiq->q1.cntl & QC_SG_HEAD) != 0) {
7616 if ((sg_entry_cnt = sg_head->entry_cnt) == 0) {
7617 asc_dvc->in_critical_cnt--;
7618 DvcLeaveCritical(last_int_level);
7621 #if !CC_VERY_LONG_SG_LIST
7622 if (sg_entry_cnt > ASC_MAX_SG_LIST) {
7623 asc_dvc->in_critical_cnt--;
7624 DvcLeaveCritical(last_int_level);
7627 #endif /* !CC_VERY_LONG_SG_LIST */
7628 if (sg_entry_cnt == 1) {
7629 scsiq->q1.data_addr =
7630 (ADV_PADDR)sg_head->sg_list[0].addr;
7631 scsiq->q1.data_cnt =
7632 (ADV_DCNT)sg_head->sg_list[0].bytes;
7633 scsiq->q1.cntl &= ~(QC_SG_HEAD | QC_SG_SWAP_QUEUE);
7635 sg_entry_cnt_minus_one = sg_entry_cnt - 1;
7637 scsi_cmd = scsiq->cdbptr[0];
7638 disable_syn_offset_one_fix = FALSE;
7639 if ((asc_dvc->pci_fix_asyn_xfer & scsiq->q1.target_id) &&
7640 !(asc_dvc->pci_fix_asyn_xfer_always & scsiq->q1.target_id)) {
7641 if (scsiq->q1.cntl & QC_SG_HEAD) {
7643 for (i = 0; i < sg_entry_cnt; i++) {
7645 (ADV_DCNT)le32_to_cpu(sg_head->sg_list[i].
7649 data_cnt = le32_to_cpu(scsiq->q1.data_cnt);
7651 if (data_cnt != 0UL) {
7652 if (data_cnt < 512UL) {
7653 disable_syn_offset_one_fix = TRUE;
7655 for (i = 0; i < ASC_SYN_OFFSET_ONE_DISABLE_LIST;
7658 _syn_offset_one_disable_cmd[i];
7659 if (disable_cmd == 0xFF) {
7662 if (scsi_cmd == disable_cmd) {
7663 disable_syn_offset_one_fix =
7671 if (disable_syn_offset_one_fix) {
7672 scsiq->q2.tag_code &= ~MSG_SIMPLE_TAG;
7673 scsiq->q2.tag_code |= (ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX |
7674 ASC_TAG_FLAG_DISABLE_DISCONNECT);
7676 scsiq->q2.tag_code &= 0x27;
7678 if ((scsiq->q1.cntl & QC_SG_HEAD) != 0) {
7679 if (asc_dvc->bug_fix_cntl) {
7680 if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_IF_NOT_DWB) {
7681 if ((scsi_cmd == READ_6) ||
7682 (scsi_cmd == READ_10)) {
7684 (ADV_PADDR)le32_to_cpu(sg_head->
7686 [sg_entry_cnt_minus_one].
7688 (ADV_DCNT)le32_to_cpu(sg_head->
7690 [sg_entry_cnt_minus_one].
7693 (uchar)((ushort)addr & 0x0003);
7694 if ((extra_bytes != 0)
7698 ASC_TAG_FLAG_EXTRA_BYTES)
7700 scsiq->q2.tag_code |=
7701 ASC_TAG_FLAG_EXTRA_BYTES;
7702 scsiq->q1.extra_bytes =
7705 le32_to_cpu(sg_head->
7707 [sg_entry_cnt_minus_one].
7710 (ASC_DCNT) extra_bytes;
7713 [sg_entry_cnt_minus_one].
7715 cpu_to_le32(data_cnt);
7720 sg_head->entry_to_copy = sg_head->entry_cnt;
7721 #if CC_VERY_LONG_SG_LIST
7723 * Set the sg_entry_cnt to the maximum possible. The rest of
7724 * the SG elements will be copied when the RISC completes the
7725 * SG elements that fit and halts.
7727 if (sg_entry_cnt > ASC_MAX_SG_LIST) {
7728 sg_entry_cnt = ASC_MAX_SG_LIST;
7730 #endif /* CC_VERY_LONG_SG_LIST */
7731 n_q_required = AscSgListToQueue(sg_entry_cnt);
7732 if ((AscGetNumOfFreeQueue(asc_dvc, target_ix, n_q_required) >=
7733 (uint) n_q_required)
7734 || ((scsiq->q1.cntl & QC_URGENT) != 0)) {
7736 AscSendScsiQueue(asc_dvc, scsiq,
7737 n_q_required)) == 1) {
7738 asc_dvc->in_critical_cnt--;
7739 DvcLeaveCritical(last_int_level);
7744 if (asc_dvc->bug_fix_cntl) {
7745 if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_IF_NOT_DWB) {
7746 if ((scsi_cmd == READ_6) ||
7747 (scsi_cmd == READ_10)) {
7749 le32_to_cpu(scsiq->q1.data_addr) +
7750 le32_to_cpu(scsiq->q1.data_cnt);
7752 (uchar)((ushort)addr & 0x0003);
7753 if ((extra_bytes != 0)
7757 ASC_TAG_FLAG_EXTRA_BYTES)
7760 le32_to_cpu(scsiq->q1.
7762 if (((ushort)data_cnt & 0x01FF)
7764 scsiq->q2.tag_code |=
7765 ASC_TAG_FLAG_EXTRA_BYTES;
7766 data_cnt -= (ASC_DCNT)
7768 scsiq->q1.data_cnt =
7771 scsiq->q1.extra_bytes =
7779 if ((AscGetNumOfFreeQueue(asc_dvc, target_ix, 1) >= 1) ||
7780 ((scsiq->q1.cntl & QC_URGENT) != 0)) {
7781 if ((sta = AscSendScsiQueue(asc_dvc, scsiq,
7782 n_q_required)) == 1) {
7783 asc_dvc->in_critical_cnt--;
7784 DvcLeaveCritical(last_int_level);
7789 asc_dvc->in_critical_cnt--;
7790 DvcLeaveCritical(last_int_level);
7795 AscSendScsiQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar n_q_required)
7804 iop_base = asc_dvc->iop_base;
7805 target_ix = scsiq->q2.target_ix;
7806 tid_no = ASC_TIX_TO_TID(target_ix);
7808 free_q_head = (uchar)AscGetVarFreeQHead(iop_base);
7809 if (n_q_required > 1) {
7810 if ((next_qp = AscAllocMultipleFreeQueue(iop_base,
7811 free_q_head, (uchar)
7813 != (uchar)ASC_QLINK_END) {
7814 asc_dvc->last_q_shortage = 0;
7815 scsiq->sg_head->queue_cnt = n_q_required - 1;
7816 scsiq->q1.q_no = free_q_head;
7817 if ((sta = AscPutReadySgListQueue(asc_dvc, scsiq,
7818 free_q_head)) == 1) {
7819 AscPutVarFreeQHead(iop_base, next_qp);
7820 asc_dvc->cur_total_qng += (uchar)(n_q_required);
7821 asc_dvc->cur_dvc_qng[tid_no]++;
7825 } else if (n_q_required == 1) {
7826 if ((next_qp = AscAllocFreeQueue(iop_base,
7829 scsiq->q1.q_no = free_q_head;
7830 if ((sta = AscPutReadyQueue(asc_dvc, scsiq,
7831 free_q_head)) == 1) {
7832 AscPutVarFreeQHead(iop_base, next_qp);
7833 asc_dvc->cur_total_qng++;
7834 asc_dvc->cur_dvc_qng[tid_no]++;
7842 static int AscSgListToQueue(int sg_list)
7846 n_sg_list_qs = ((sg_list - 1) / ASC_SG_LIST_PER_Q);
7847 if (((sg_list - 1) % ASC_SG_LIST_PER_Q) != 0)
7849 return (n_sg_list_qs + 1);
7853 AscGetNumOfFreeQueue(ASC_DVC_VAR *asc_dvc, uchar target_ix, uchar n_qs)
7857 ASC_SCSI_BIT_ID_TYPE target_id;
7860 target_id = ASC_TIX_TO_TARGET_ID(target_ix);
7861 tid_no = ASC_TIX_TO_TID(target_ix);
7862 if ((asc_dvc->unit_not_ready & target_id) ||
7863 (asc_dvc->queue_full_or_busy & target_id)) {
7867 cur_used_qs = (uint) asc_dvc->cur_total_qng +
7868 (uint) asc_dvc->last_q_shortage + (uint) ASC_MIN_FREE_Q;
7870 cur_used_qs = (uint) asc_dvc->cur_total_qng +
7871 (uint) ASC_MIN_FREE_Q;
7873 if ((uint) (cur_used_qs + n_qs) <= (uint) asc_dvc->max_total_qng) {
7874 cur_free_qs = (uint) asc_dvc->max_total_qng - cur_used_qs;
7875 if (asc_dvc->cur_dvc_qng[tid_no] >=
7876 asc_dvc->max_dvc_qng[tid_no]) {
7879 return (cur_free_qs);
7882 if ((n_qs > asc_dvc->last_q_shortage)
7883 && (n_qs <= (asc_dvc->max_total_qng - ASC_MIN_FREE_Q))) {
7884 asc_dvc->last_q_shortage = n_qs;
7890 static int AscPutReadyQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar q_no)
7895 uchar syn_period_ix;
7899 iop_base = asc_dvc->iop_base;
7900 if (((asc_dvc->init_sdtr & scsiq->q1.target_id) != 0) &&
7901 ((asc_dvc->sdtr_done & scsiq->q1.target_id) == 0)) {
7902 tid_no = ASC_TIX_TO_TID(scsiq->q2.target_ix);
7903 sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no);
7905 (sdtr_data >> 4) & (asc_dvc->max_sdtr_index - 1);
7906 syn_offset = sdtr_data & ASC_SYN_MAX_OFFSET;
7907 AscMsgOutSDTR(asc_dvc,
7908 asc_dvc->sdtr_period_tbl[syn_period_ix],
7910 scsiq->q1.cntl |= QC_MSG_OUT;
7912 q_addr = ASC_QNO_TO_QADDR(q_no);
7913 if ((scsiq->q1.target_id & asc_dvc->use_tagged_qng) == 0) {
7914 scsiq->q2.tag_code &= ~MSG_SIMPLE_TAG;
7916 scsiq->q1.status = QS_FREE;
7917 AscMemWordCopyPtrToLram(iop_base,
7918 q_addr + ASC_SCSIQ_CDB_BEG,
7919 (uchar *)scsiq->cdbptr, scsiq->q2.cdb_len >> 1);
7921 DvcPutScsiQ(iop_base,
7922 q_addr + ASC_SCSIQ_CPY_BEG,
7923 (uchar *)&scsiq->q1.cntl,
7924 ((sizeof(ASC_SCSIQ_1) + sizeof(ASC_SCSIQ_2)) / 2) - 1);
7925 AscWriteLramWord(iop_base,
7926 (ushort)(q_addr + (ushort)ASC_SCSIQ_B_STATUS),
7927 (ushort)(((ushort)scsiq->q1.
7928 q_no << 8) | (ushort)QS_READY));
7933 AscPutReadySgListQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar q_no)
7937 ASC_SG_HEAD *sg_head;
7938 ASC_SG_LIST_Q scsi_sg_q;
7939 ASC_DCNT saved_data_addr;
7940 ASC_DCNT saved_data_cnt;
7942 ushort sg_list_dwords;
7944 ushort sg_entry_cnt;
7948 iop_base = asc_dvc->iop_base;
7949 sg_head = scsiq->sg_head;
7950 saved_data_addr = scsiq->q1.data_addr;
7951 saved_data_cnt = scsiq->q1.data_cnt;
7952 scsiq->q1.data_addr = (ASC_PADDR) sg_head->sg_list[0].addr;
7953 scsiq->q1.data_cnt = (ASC_DCNT) sg_head->sg_list[0].bytes;
7954 #if CC_VERY_LONG_SG_LIST
7956 * If sg_head->entry_cnt is greater than ASC_MAX_SG_LIST
7957 * then not all SG elements will fit in the allocated queues.
7958 * The rest of the SG elements will be copied when the RISC
7959 * completes the SG elements that fit and halts.
7961 if (sg_head->entry_cnt > ASC_MAX_SG_LIST) {
7963 * Set sg_entry_cnt to be the number of SG elements that
7964 * will fit in the allocated SG queues. It is minus 1, because
7965 * the first SG element is handled above. ASC_MAX_SG_LIST is
7966 * already inflated by 1 to account for this. For example it
7967 * may be 50 which is 1 + 7 queues * 7 SG elements.
7969 sg_entry_cnt = ASC_MAX_SG_LIST - 1;
7972 * Keep track of remaining number of SG elements that will
7973 * need to be handled from a_isr.c.
7975 scsiq->remain_sg_entry_cnt =
7976 sg_head->entry_cnt - ASC_MAX_SG_LIST;
7978 #endif /* CC_VERY_LONG_SG_LIST */
7980 * Set sg_entry_cnt to be the number of SG elements that
7981 * will fit in the allocated SG queues. It is minus 1, because
7982 * the first SG element is handled above.
7984 sg_entry_cnt = sg_head->entry_cnt - 1;
7985 #if CC_VERY_LONG_SG_LIST
7987 #endif /* CC_VERY_LONG_SG_LIST */
7988 if (sg_entry_cnt != 0) {
7989 scsiq->q1.cntl |= QC_SG_HEAD;
7990 q_addr = ASC_QNO_TO_QADDR(q_no);
7992 scsiq->q1.sg_queue_cnt = sg_head->queue_cnt;
7993 scsi_sg_q.sg_head_qp = q_no;
7994 scsi_sg_q.cntl = QCSG_SG_XFER_LIST;
7995 for (i = 0; i < sg_head->queue_cnt; i++) {
7996 scsi_sg_q.seq_no = i + 1;
7997 if (sg_entry_cnt > ASC_SG_LIST_PER_Q) {
7998 sg_list_dwords = (uchar)(ASC_SG_LIST_PER_Q * 2);
7999 sg_entry_cnt -= ASC_SG_LIST_PER_Q;
8001 scsi_sg_q.sg_list_cnt =
8003 scsi_sg_q.sg_cur_list_cnt =
8006 scsi_sg_q.sg_list_cnt =
8007 ASC_SG_LIST_PER_Q - 1;
8008 scsi_sg_q.sg_cur_list_cnt =
8009 ASC_SG_LIST_PER_Q - 1;
8012 #if CC_VERY_LONG_SG_LIST
8014 * This is the last SG queue in the list of
8015 * allocated SG queues. If there are more
8016 * SG elements than will fit in the allocated
8017 * queues, then set the QCSG_SG_XFER_MORE flag.
8019 if (sg_head->entry_cnt > ASC_MAX_SG_LIST) {
8020 scsi_sg_q.cntl |= QCSG_SG_XFER_MORE;
8022 #endif /* CC_VERY_LONG_SG_LIST */
8023 scsi_sg_q.cntl |= QCSG_SG_XFER_END;
8024 #if CC_VERY_LONG_SG_LIST
8026 #endif /* CC_VERY_LONG_SG_LIST */
8027 sg_list_dwords = sg_entry_cnt << 1;
8029 scsi_sg_q.sg_list_cnt = sg_entry_cnt;
8030 scsi_sg_q.sg_cur_list_cnt =
8033 scsi_sg_q.sg_list_cnt =
8035 scsi_sg_q.sg_cur_list_cnt =
8040 next_qp = AscReadLramByte(iop_base,
8043 scsi_sg_q.q_no = next_qp;
8044 q_addr = ASC_QNO_TO_QADDR(next_qp);
8045 AscMemWordCopyPtrToLram(iop_base,
8046 q_addr + ASC_SCSIQ_SGHD_CPY_BEG,
8047 (uchar *)&scsi_sg_q,
8048 sizeof(ASC_SG_LIST_Q) >> 1);
8049 AscMemDWordCopyPtrToLram(iop_base,
8050 q_addr + ASC_SGQ_LIST_BEG,
8054 sg_index += ASC_SG_LIST_PER_Q;
8055 scsiq->next_sg_index = sg_index;
8058 scsiq->q1.cntl &= ~QC_SG_HEAD;
8060 sta = AscPutReadyQueue(asc_dvc, scsiq, q_no);
8061 scsiq->q1.data_addr = saved_data_addr;
8062 scsiq->q1.data_cnt = saved_data_cnt;
8067 AscSetRunChipSynRegAtID(PortAddr iop_base, uchar tid_no, uchar sdtr_data)
8071 if (AscHostReqRiscHalt(iop_base)) {
8072 sta = AscSetChipSynRegAtID(iop_base, tid_no, sdtr_data);
8073 AscStartChip(iop_base);
8079 static int AscSetChipSynRegAtID(PortAddr iop_base, uchar id, uchar sdtr_data)
8081 ASC_SCSI_BIT_ID_TYPE org_id;
8085 AscSetBank(iop_base, 1);
8086 org_id = AscReadChipDvcID(iop_base);
8087 for (i = 0; i <= ASC_MAX_TID; i++) {
8088 if (org_id == (0x01 << i))
8091 org_id = (ASC_SCSI_BIT_ID_TYPE) i;
8092 AscWriteChipDvcID(iop_base, id);
8093 if (AscReadChipDvcID(iop_base) == (0x01 << id)) {
8094 AscSetBank(iop_base, 0);
8095 AscSetChipSyn(iop_base, sdtr_data);
8096 if (AscGetChipSyn(iop_base) != sdtr_data) {
8102 AscSetBank(iop_base, 1);
8103 AscWriteChipDvcID(iop_base, org_id);
8104 AscSetBank(iop_base, 0);
8108 static ushort AscInitLram(ASC_DVC_VAR *asc_dvc)
8115 iop_base = asc_dvc->iop_base;
8117 AscMemWordSetLram(iop_base, ASC_QADR_BEG, 0,
8118 (ushort)(((int)(asc_dvc->max_total_qng + 2 + 1) *
8121 i = ASC_MIN_ACTIVE_QNO;
8122 s_addr = ASC_QADR_BEG + ASC_QBLK_SIZE;
8123 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_FWD),
8125 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_BWD),
8126 (uchar)(asc_dvc->max_total_qng));
8127 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_QNO),
8130 s_addr += ASC_QBLK_SIZE;
8131 for (; i < asc_dvc->max_total_qng; i++, s_addr += ASC_QBLK_SIZE) {
8132 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_FWD),
8134 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_BWD),
8136 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_QNO),
8139 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_FWD),
8140 (uchar)ASC_QLINK_END);
8141 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_BWD),
8142 (uchar)(asc_dvc->max_total_qng - 1));
8143 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_QNO),
8144 (uchar)asc_dvc->max_total_qng);
8146 s_addr += ASC_QBLK_SIZE;
8147 for (; i <= (uchar)(asc_dvc->max_total_qng + 3);
8148 i++, s_addr += ASC_QBLK_SIZE) {
8149 AscWriteLramByte(iop_base,
8150 (ushort)(s_addr + (ushort)ASC_SCSIQ_B_FWD), i);
8151 AscWriteLramByte(iop_base,
8152 (ushort)(s_addr + (ushort)ASC_SCSIQ_B_BWD), i);
8153 AscWriteLramByte(iop_base,
8154 (ushort)(s_addr + (ushort)ASC_SCSIQ_B_QNO), i);
8159 static ushort AscInitQLinkVar(ASC_DVC_VAR *asc_dvc)
8165 iop_base = asc_dvc->iop_base;
8166 AscPutRiscVarFreeQHead(iop_base, 1);
8167 AscPutRiscVarDoneQTail(iop_base, asc_dvc->max_total_qng);
8168 AscPutVarFreeQHead(iop_base, 1);
8169 AscPutVarDoneQTail(iop_base, asc_dvc->max_total_qng);
8170 AscWriteLramByte(iop_base, ASCV_BUSY_QHEAD_B,
8171 (uchar)((int)asc_dvc->max_total_qng + 1));
8172 AscWriteLramByte(iop_base, ASCV_DISC1_QHEAD_B,
8173 (uchar)((int)asc_dvc->max_total_qng + 2));
8174 AscWriteLramByte(iop_base, (ushort)ASCV_TOTAL_READY_Q_B,
8175 asc_dvc->max_total_qng);
8176 AscWriteLramWord(iop_base, ASCV_ASCDVC_ERR_CODE_W, 0);
8177 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
8178 AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, 0);
8179 AscWriteLramByte(iop_base, ASCV_SCSIBUSY_B, 0);
8180 AscWriteLramByte(iop_base, ASCV_WTM_FLAG_B, 0);
8181 AscPutQDoneInProgress(iop_base, 0);
8182 lram_addr = ASC_QADR_BEG;
8183 for (i = 0; i < 32; i++, lram_addr += 2) {
8184 AscWriteLramWord(iop_base, lram_addr, 0);
8189 static int AscSetLibErrorCode(ASC_DVC_VAR *asc_dvc, ushort err_code)
8191 if (asc_dvc->err_code == 0) {
8192 asc_dvc->err_code = err_code;
8193 AscWriteLramWord(asc_dvc->iop_base, ASCV_ASCDVC_ERR_CODE_W,
8200 AscMsgOutSDTR(ASC_DVC_VAR *asc_dvc, uchar sdtr_period, uchar sdtr_offset)
8203 uchar sdtr_period_index;
8206 iop_base = asc_dvc->iop_base;
8207 sdtr_buf.msg_type = EXTENDED_MESSAGE;
8208 sdtr_buf.msg_len = MS_SDTR_LEN;
8209 sdtr_buf.msg_req = EXTENDED_SDTR;
8210 sdtr_buf.xfer_period = sdtr_period;
8211 sdtr_offset &= ASC_SYN_MAX_OFFSET;
8212 sdtr_buf.req_ack_offset = sdtr_offset;
8213 if ((sdtr_period_index =
8214 AscGetSynPeriodIndex(asc_dvc, sdtr_period)) <=
8215 asc_dvc->max_sdtr_index) {
8216 AscMemWordCopyPtrToLram(iop_base,
8219 sizeof(EXT_MSG) >> 1);
8220 return ((sdtr_period_index << 4) | sdtr_offset);
8223 sdtr_buf.req_ack_offset = 0;
8224 AscMemWordCopyPtrToLram(iop_base,
8227 sizeof(EXT_MSG) >> 1);
8233 AscCalSDTRData(ASC_DVC_VAR *asc_dvc, uchar sdtr_period, uchar syn_offset)
8236 uchar sdtr_period_ix;
8238 sdtr_period_ix = AscGetSynPeriodIndex(asc_dvc, sdtr_period);
8239 if ((sdtr_period_ix > asc_dvc->max_sdtr_index)
8243 byte = (sdtr_period_ix << 4) | (syn_offset & ASC_SYN_MAX_OFFSET);
8247 static void AscSetChipSDTR(PortAddr iop_base, uchar sdtr_data, uchar tid_no)
8249 AscSetChipSynRegAtID(iop_base, tid_no, sdtr_data);
8250 AscPutMCodeSDTRDoneAtID(iop_base, tid_no, sdtr_data);
8254 static uchar AscGetSynPeriodIndex(ASC_DVC_VAR *asc_dvc, uchar syn_time)
8256 uchar *period_table;
8261 period_table = asc_dvc->sdtr_period_tbl;
8262 max_index = (int)asc_dvc->max_sdtr_index;
8263 min_index = (int)asc_dvc->host_init_sdtr_index;
8264 if ((syn_time <= period_table[max_index])) {
8265 for (i = min_index; i < (max_index - 1); i++) {
8266 if (syn_time <= period_table[i]) {
8270 return ((uchar)max_index);
8272 return ((uchar)(max_index + 1));
8276 static uchar AscAllocFreeQueue(PortAddr iop_base, uchar free_q_head)
8282 q_addr = ASC_QNO_TO_QADDR(free_q_head);
8283 q_status = (uchar)AscReadLramByte(iop_base,
8285 ASC_SCSIQ_B_STATUS));
8286 next_qp = AscReadLramByte(iop_base, (ushort)(q_addr + ASC_SCSIQ_B_FWD));
8287 if (((q_status & QS_READY) == 0) && (next_qp != ASC_QLINK_END)) {
8290 return (ASC_QLINK_END);
8294 AscAllocMultipleFreeQueue(PortAddr iop_base, uchar free_q_head, uchar n_free_q)
8298 for (i = 0; i < n_free_q; i++) {
8299 if ((free_q_head = AscAllocFreeQueue(iop_base, free_q_head))
8301 return (ASC_QLINK_END);
8304 return (free_q_head);
8307 static int AscHostReqRiscHalt(PortAddr iop_base)
8311 uchar saved_stop_code;
8313 if (AscIsChipHalted(iop_base))
8315 saved_stop_code = AscReadLramByte(iop_base, ASCV_STOP_CODE_B);
8316 AscWriteLramByte(iop_base, ASCV_STOP_CODE_B,
8317 ASC_STOP_HOST_REQ_RISC_HALT | ASC_STOP_REQ_RISC_STOP);
8319 if (AscIsChipHalted(iop_base)) {
8323 DvcSleepMilliSecond(100);
8324 } while (count++ < 20);
8325 AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, saved_stop_code);
8329 static int AscStopQueueExe(PortAddr iop_base)
8333 if (AscReadLramByte(iop_base, ASCV_STOP_CODE_B) == 0) {
8334 AscWriteLramByte(iop_base, ASCV_STOP_CODE_B,
8335 ASC_STOP_REQ_RISC_STOP);
8337 if (AscReadLramByte(iop_base, ASCV_STOP_CODE_B) &
8338 ASC_STOP_ACK_RISC_STOP) {
8341 DvcSleepMilliSecond(100);
8342 } while (count++ < 20);
8347 static void DvcDelayMicroSecond(ADV_DVC_VAR *asc_dvc, ushort micro_sec)
8352 static void DvcDelayNanoSecond(ASC_DVC_VAR *asc_dvc, ASC_DCNT nano_sec)
8354 udelay((nano_sec + 999) / 1000);
8357 static int AscStartChip(PortAddr iop_base)
8359 AscSetChipControl(iop_base, 0);
8360 if ((AscGetChipStatus(iop_base) & CSW_HALTED) != 0) {
8366 static int AscStopChip(PortAddr iop_base)
8371 AscGetChipControl(iop_base) &
8372 (~(CC_SINGLE_STEP | CC_TEST | CC_DIAG));
8373 AscSetChipControl(iop_base, (uchar)(cc_val | CC_HALT));
8374 AscSetChipIH(iop_base, INS_HALT);
8375 AscSetChipIH(iop_base, INS_RFLAG_WTM);
8376 if ((AscGetChipStatus(iop_base) & CSW_HALTED) == 0) {
8382 static int AscIsChipHalted(PortAddr iop_base)
8384 if ((AscGetChipStatus(iop_base) & CSW_HALTED) != 0) {
8385 if ((AscGetChipControl(iop_base) & CC_HALT) != 0) {
8392 static void AscSetChipIH(PortAddr iop_base, ushort ins_code)
8394 AscSetBank(iop_base, 1);
8395 AscWriteChipIH(iop_base, ins_code);
8396 AscSetBank(iop_base, 0);
8400 static void AscAckInterrupt(PortAddr iop_base)
8408 risc_flag = AscReadLramByte(iop_base, ASCV_RISC_FLAG_B);
8409 if (loop++ > 0x7FFF) {
8412 } while ((risc_flag & ASC_RISC_FLAG_GEN_INT) != 0);
8414 AscReadLramByte(iop_base,
8415 ASCV_HOST_FLAG_B) & (~ASC_HOST_FLAG_ACK_INT);
8416 AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B,
8417 (uchar)(host_flag | ASC_HOST_FLAG_ACK_INT));
8418 AscSetChipStatus(iop_base, CIW_INT_ACK);
8420 while (AscGetChipStatus(iop_base) & CSW_INT_PENDING) {
8421 AscSetChipStatus(iop_base, CIW_INT_ACK);
8426 AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, host_flag);
8430 static void AscDisableInterrupt(PortAddr iop_base)
8434 cfg = AscGetChipCfgLsw(iop_base);
8435 AscSetChipCfgLsw(iop_base, cfg & (~ASC_CFG0_HOST_INT_ON));
8439 static void AscEnableInterrupt(PortAddr iop_base)
8443 cfg = AscGetChipCfgLsw(iop_base);
8444 AscSetChipCfgLsw(iop_base, cfg | ASC_CFG0_HOST_INT_ON);
8448 static void AscSetBank(PortAddr iop_base, uchar bank)
8452 val = AscGetChipControl(iop_base) &
8454 (CC_SINGLE_STEP | CC_TEST | CC_DIAG | CC_SCSI_RESET |
8458 } else if (bank == 2) {
8459 val |= CC_DIAG | CC_BANK_ONE;
8461 val &= ~CC_BANK_ONE;
8463 AscSetChipControl(iop_base, val);
8467 static int AscResetChipAndScsiBus(ASC_DVC_VAR *asc_dvc)
8472 iop_base = asc_dvc->iop_base;
8473 while ((AscGetChipStatus(iop_base) & CSW_SCSI_RESET_ACTIVE)
8475 DvcSleepMilliSecond(100);
8477 AscStopChip(iop_base);
8478 AscSetChipControl(iop_base, CC_CHIP_RESET | CC_SCSI_RESET | CC_HALT);
8479 DvcDelayNanoSecond(asc_dvc, 60000);
8480 AscSetChipIH(iop_base, INS_RFLAG_WTM);
8481 AscSetChipIH(iop_base, INS_HALT);
8482 AscSetChipControl(iop_base, CC_CHIP_RESET | CC_HALT);
8483 AscSetChipControl(iop_base, CC_HALT);
8484 DvcSleepMilliSecond(200);
8485 AscSetChipStatus(iop_base, CIW_CLR_SCSI_RESET_INT);
8486 AscSetChipStatus(iop_base, 0);
8487 return (AscIsChipHalted(iop_base));
8490 static ASC_DCNT __devinit AscGetMaxDmaCount(ushort bus_type)
8492 if (bus_type & ASC_IS_ISA)
8493 return (ASC_MAX_ISA_DMA_COUNT);
8494 else if (bus_type & (ASC_IS_EISA | ASC_IS_VL))
8495 return (ASC_MAX_VL_DMA_COUNT);
8496 return (ASC_MAX_PCI_DMA_COUNT);
8500 static ushort __devinit AscGetIsaDmaChannel(PortAddr iop_base)
8504 channel = AscGetChipCfgLsw(iop_base) & 0x0003;
8505 if (channel == 0x03)
8507 else if (channel == 0x00)
8509 return (channel + 4);
8512 static ushort __devinit AscSetIsaDmaChannel(PortAddr iop_base, ushort dma_channel)
8517 if ((dma_channel >= 5) && (dma_channel <= 7)) {
8518 if (dma_channel == 7)
8521 value = dma_channel - 4;
8522 cfg_lsw = AscGetChipCfgLsw(iop_base) & 0xFFFC;
8524 AscSetChipCfgLsw(iop_base, cfg_lsw);
8525 return (AscGetIsaDmaChannel(iop_base));
8530 static uchar __devinit AscSetIsaDmaSpeed(PortAddr iop_base, uchar speed_value)
8532 speed_value &= 0x07;
8533 AscSetBank(iop_base, 1);
8534 AscWriteChipDmaSpeed(iop_base, speed_value);
8535 AscSetBank(iop_base, 0);
8536 return (AscGetIsaDmaSpeed(iop_base));
8539 static uchar __devinit AscGetIsaDmaSpeed(PortAddr iop_base)
8543 AscSetBank(iop_base, 1);
8544 speed_value = AscReadChipDmaSpeed(iop_base);
8545 speed_value &= 0x07;
8546 AscSetBank(iop_base, 0);
8547 return (speed_value);
8549 #endif /* CONFIG_ISA */
8551 static int __devinit AscInitGetConfig(asc_board_t *boardp)
8553 ASC_DVC_VAR *asc_dvc = &boardp->dvc_var.asc_dvc_var;
8554 unsigned short warn_code = 0;
8556 asc_dvc->init_state = ASC_INIT_STATE_BEG_GET_CFG;
8557 if (asc_dvc->err_code != 0)
8558 return asc_dvc->err_code;
8560 if (AscFindSignature(asc_dvc->iop_base)) {
8561 warn_code |= AscInitAscDvcVar(asc_dvc);
8562 warn_code |= AscInitFromEEP(asc_dvc);
8563 asc_dvc->init_state |= ASC_INIT_STATE_END_GET_CFG;
8564 if (asc_dvc->scsi_reset_wait > ASC_MAX_SCSI_RESET_WAIT)
8565 asc_dvc->scsi_reset_wait = ASC_MAX_SCSI_RESET_WAIT;
8567 asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE;
8570 switch (warn_code) {
8571 case 0: /* No error */
8573 case ASC_WARN_IO_PORT_ROTATE:
8574 ASC_PRINT1("AscInitGetConfig: board %d: I/O port address "
8575 "modified\n", boardp->id);
8577 case ASC_WARN_AUTO_CONFIG:
8578 ASC_PRINT1("AscInitGetConfig: board %d: I/O port increment "
8579 "switch enabled\n", boardp->id);
8581 case ASC_WARN_EEPROM_CHKSUM:
8582 ASC_PRINT1("AscInitGetConfig: board %d: EEPROM checksum "
8583 "error\n", boardp->id);
8585 case ASC_WARN_IRQ_MODIFIED:
8586 ASC_PRINT1("AscInitGetConfig: board %d: IRQ modified\n",
8589 case ASC_WARN_CMD_QNG_CONFLICT:
8590 ASC_PRINT1("AscInitGetConfig: board %d: tag queuing enabled "
8591 "w/o disconnects\n", boardp->id);
8594 ASC_PRINT2("AscInitGetConfig: board %d: unknown warning: "
8595 "0x%x\n", boardp->id, warn_code);
8599 if (asc_dvc->err_code != 0) {
8600 ASC_PRINT3("AscInitGetConfig: board %d error: init_state 0x%x, "
8601 "err_code 0x%x\n", boardp->id, asc_dvc->init_state,
8605 return asc_dvc->err_code;
8608 static int __devinit AscInitSetConfig(struct pci_dev *pdev, asc_board_t *boardp)
8610 ASC_DVC_VAR *asc_dvc = &boardp->dvc_var.asc_dvc_var;
8611 PortAddr iop_base = asc_dvc->iop_base;
8612 unsigned short cfg_msw;
8613 unsigned short warn_code = 0;
8615 asc_dvc->init_state |= ASC_INIT_STATE_BEG_SET_CFG;
8616 if (asc_dvc->err_code != 0)
8617 return asc_dvc->err_code;
8618 if (!AscFindSignature(asc_dvc->iop_base)) {
8619 asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE;
8620 return asc_dvc->err_code;
8623 cfg_msw = AscGetChipCfgMsw(iop_base);
8624 if ((cfg_msw & ASC_CFG_MSW_CLR_MASK) != 0) {
8625 cfg_msw &= ~ASC_CFG_MSW_CLR_MASK;
8626 warn_code |= ASC_WARN_CFG_MSW_RECOVER;
8627 AscSetChipCfgMsw(iop_base, cfg_msw);
8629 if ((asc_dvc->cfg->cmd_qng_enabled & asc_dvc->cfg->disc_enable) !=
8630 asc_dvc->cfg->cmd_qng_enabled) {
8631 asc_dvc->cfg->disc_enable = asc_dvc->cfg->cmd_qng_enabled;
8632 warn_code |= ASC_WARN_CMD_QNG_CONFLICT;
8634 if (AscGetChipStatus(iop_base) & CSW_AUTO_CONFIG) {
8635 warn_code |= ASC_WARN_AUTO_CONFIG;
8637 if ((asc_dvc->bus_type & (ASC_IS_ISA | ASC_IS_VL)) != 0) {
8638 if (AscSetChipIRQ(iop_base, asc_dvc->irq_no, asc_dvc->bus_type)
8639 != asc_dvc->irq_no) {
8640 asc_dvc->err_code |= ASC_IERR_SET_IRQ_NO;
8644 if (asc_dvc->bus_type & ASC_IS_PCI) {
8646 AscSetChipCfgMsw(iop_base, cfg_msw);
8647 if ((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA) {
8649 if ((pdev->device == PCI_DEVICE_ID_ASP_1200A) ||
8650 (pdev->device == PCI_DEVICE_ID_ASP_ABP940)) {
8651 asc_dvc->bug_fix_cntl |= ASC_BUG_FIX_IF_NOT_DWB;
8652 asc_dvc->bug_fix_cntl |=
8653 ASC_BUG_FIX_ASYN_USE_SYN;
8657 #endif /* CONFIG_PCI */
8658 if (asc_dvc->bus_type == ASC_IS_ISAPNP) {
8659 if (AscGetChipVersion(iop_base, asc_dvc->bus_type)
8660 == ASC_CHIP_VER_ASYN_BUG) {
8661 asc_dvc->bug_fix_cntl |= ASC_BUG_FIX_ASYN_USE_SYN;
8664 if (AscSetChipScsiID(iop_base, asc_dvc->cfg->chip_scsi_id) !=
8665 asc_dvc->cfg->chip_scsi_id) {
8666 asc_dvc->err_code |= ASC_IERR_SET_SCSI_ID;
8669 if (asc_dvc->bus_type & ASC_IS_ISA) {
8670 AscSetIsaDmaChannel(iop_base, asc_dvc->cfg->isa_dma_channel);
8671 AscSetIsaDmaSpeed(iop_base, asc_dvc->cfg->isa_dma_speed);
8673 #endif /* CONFIG_ISA */
8675 asc_dvc->init_state |= ASC_INIT_STATE_END_SET_CFG;
8677 switch (warn_code) {
8678 case 0: /* No error. */
8680 case ASC_WARN_IO_PORT_ROTATE:
8681 ASC_PRINT1("AscInitSetConfig: board %d: I/O port address "
8682 "modified\n", boardp->id);
8684 case ASC_WARN_AUTO_CONFIG:
8685 ASC_PRINT1("AscInitSetConfig: board %d: I/O port increment "
8686 "switch enabled\n", boardp->id);
8688 case ASC_WARN_EEPROM_CHKSUM:
8689 ASC_PRINT1("AscInitSetConfig: board %d: EEPROM checksum "
8690 "error\n", boardp->id);
8692 case ASC_WARN_IRQ_MODIFIED:
8693 ASC_PRINT1("AscInitSetConfig: board %d: IRQ modified\n",
8696 case ASC_WARN_CMD_QNG_CONFLICT:
8697 ASC_PRINT1("AscInitSetConfig: board %d: tag queuing w/o "
8702 ASC_PRINT2("AscInitSetConfig: board %d: unknown warning: "
8703 "0x%x\n", boardp->id, warn_code);
8707 if (asc_dvc->err_code != 0) {
8708 ASC_PRINT3("AscInitSetConfig: board %d error: init_state 0x%x, "
8709 "err_code 0x%x\n", boardp->id, asc_dvc->init_state,
8713 return asc_dvc->err_code;
8716 static ushort AscInitAsc1000Driver(ASC_DVC_VAR *asc_dvc)
8721 iop_base = asc_dvc->iop_base;
8723 if ((asc_dvc->dvc_cntl & ASC_CNTL_RESET_SCSI) &&
8724 !(asc_dvc->init_state & ASC_INIT_RESET_SCSI_DONE)) {
8725 AscResetChipAndScsiBus(asc_dvc);
8726 DvcSleepMilliSecond((ASC_DCNT)
8727 ((ushort)asc_dvc->scsi_reset_wait * 1000));
8729 asc_dvc->init_state |= ASC_INIT_STATE_BEG_LOAD_MC;
8730 if (asc_dvc->err_code != 0)
8732 if (!AscFindSignature(asc_dvc->iop_base)) {
8733 asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE;
8736 AscDisableInterrupt(iop_base);
8737 warn_code |= AscInitLram(asc_dvc);
8738 if (asc_dvc->err_code != 0)
8740 ASC_DBG1(1, "AscInitAsc1000Driver: _asc_mcode_chksum 0x%lx\n",
8741 (ulong)_asc_mcode_chksum);
8742 if (AscLoadMicroCode(iop_base, 0, _asc_mcode_buf,
8743 _asc_mcode_size) != _asc_mcode_chksum) {
8744 asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM;
8747 warn_code |= AscInitMicroCodeVar(asc_dvc);
8748 asc_dvc->init_state |= ASC_INIT_STATE_END_LOAD_MC;
8749 AscEnableInterrupt(iop_base);
8753 static ushort __devinit AscInitAscDvcVar(ASC_DVC_VAR *asc_dvc)
8760 iop_base = asc_dvc->iop_base;
8762 asc_dvc->err_code = 0;
8763 if ((asc_dvc->bus_type &
8764 (ASC_IS_ISA | ASC_IS_PCI | ASC_IS_EISA | ASC_IS_VL)) == 0) {
8765 asc_dvc->err_code |= ASC_IERR_NO_BUS_TYPE;
8767 AscSetChipControl(iop_base, CC_HALT);
8768 AscSetChipStatus(iop_base, 0);
8769 asc_dvc->bug_fix_cntl = 0;
8770 asc_dvc->pci_fix_asyn_xfer = 0;
8771 asc_dvc->pci_fix_asyn_xfer_always = 0;
8772 /* asc_dvc->init_state initalized in AscInitGetConfig(). */
8773 asc_dvc->sdtr_done = 0;
8774 asc_dvc->cur_total_qng = 0;
8775 asc_dvc->is_in_int = 0;
8776 asc_dvc->in_critical_cnt = 0;
8777 asc_dvc->last_q_shortage = 0;
8778 asc_dvc->use_tagged_qng = 0;
8779 asc_dvc->no_scam = 0;
8780 asc_dvc->unit_not_ready = 0;
8781 asc_dvc->queue_full_or_busy = 0;
8782 asc_dvc->redo_scam = 0;
8784 asc_dvc->host_init_sdtr_index = 0;
8785 asc_dvc->cfg->can_tagged_qng = 0;
8786 asc_dvc->cfg->cmd_qng_enabled = 0;
8787 asc_dvc->dvc_cntl = ASC_DEF_DVC_CNTL;
8788 asc_dvc->init_sdtr = 0;
8789 asc_dvc->max_total_qng = ASC_DEF_MAX_TOTAL_QNG;
8790 asc_dvc->scsi_reset_wait = 3;
8791 asc_dvc->start_motor = ASC_SCSI_WIDTH_BIT_SET;
8792 asc_dvc->max_dma_count = AscGetMaxDmaCount(asc_dvc->bus_type);
8793 asc_dvc->cfg->sdtr_enable = ASC_SCSI_WIDTH_BIT_SET;
8794 asc_dvc->cfg->disc_enable = ASC_SCSI_WIDTH_BIT_SET;
8795 asc_dvc->cfg->chip_scsi_id = ASC_DEF_CHIP_SCSI_ID;
8796 asc_dvc->cfg->lib_serial_no = ASC_LIB_SERIAL_NUMBER;
8797 asc_dvc->cfg->lib_version = (ASC_LIB_VERSION_MAJOR << 8) |
8798 ASC_LIB_VERSION_MINOR;
8799 chip_version = AscGetChipVersion(iop_base, asc_dvc->bus_type);
8800 asc_dvc->cfg->chip_version = chip_version;
8801 asc_dvc->sdtr_period_tbl[0] = SYN_XFER_NS_0;
8802 asc_dvc->sdtr_period_tbl[1] = SYN_XFER_NS_1;
8803 asc_dvc->sdtr_period_tbl[2] = SYN_XFER_NS_2;
8804 asc_dvc->sdtr_period_tbl[3] = SYN_XFER_NS_3;
8805 asc_dvc->sdtr_period_tbl[4] = SYN_XFER_NS_4;
8806 asc_dvc->sdtr_period_tbl[5] = SYN_XFER_NS_5;
8807 asc_dvc->sdtr_period_tbl[6] = SYN_XFER_NS_6;
8808 asc_dvc->sdtr_period_tbl[7] = SYN_XFER_NS_7;
8809 asc_dvc->max_sdtr_index = 7;
8810 if ((asc_dvc->bus_type & ASC_IS_PCI) &&
8811 (chip_version >= ASC_CHIP_VER_PCI_ULTRA_3150)) {
8812 asc_dvc->bus_type = ASC_IS_PCI_ULTRA;
8813 asc_dvc->sdtr_period_tbl[0] = SYN_ULTRA_XFER_NS_0;
8814 asc_dvc->sdtr_period_tbl[1] = SYN_ULTRA_XFER_NS_1;
8815 asc_dvc->sdtr_period_tbl[2] = SYN_ULTRA_XFER_NS_2;
8816 asc_dvc->sdtr_period_tbl[3] = SYN_ULTRA_XFER_NS_3;
8817 asc_dvc->sdtr_period_tbl[4] = SYN_ULTRA_XFER_NS_4;
8818 asc_dvc->sdtr_period_tbl[5] = SYN_ULTRA_XFER_NS_5;
8819 asc_dvc->sdtr_period_tbl[6] = SYN_ULTRA_XFER_NS_6;
8820 asc_dvc->sdtr_period_tbl[7] = SYN_ULTRA_XFER_NS_7;
8821 asc_dvc->sdtr_period_tbl[8] = SYN_ULTRA_XFER_NS_8;
8822 asc_dvc->sdtr_period_tbl[9] = SYN_ULTRA_XFER_NS_9;
8823 asc_dvc->sdtr_period_tbl[10] = SYN_ULTRA_XFER_NS_10;
8824 asc_dvc->sdtr_period_tbl[11] = SYN_ULTRA_XFER_NS_11;
8825 asc_dvc->sdtr_period_tbl[12] = SYN_ULTRA_XFER_NS_12;
8826 asc_dvc->sdtr_period_tbl[13] = SYN_ULTRA_XFER_NS_13;
8827 asc_dvc->sdtr_period_tbl[14] = SYN_ULTRA_XFER_NS_14;
8828 asc_dvc->sdtr_period_tbl[15] = SYN_ULTRA_XFER_NS_15;
8829 asc_dvc->max_sdtr_index = 15;
8830 if (chip_version == ASC_CHIP_VER_PCI_ULTRA_3150) {
8831 AscSetExtraControl(iop_base,
8832 (SEC_ACTIVE_NEGATE | SEC_SLEW_RATE));
8833 } else if (chip_version >= ASC_CHIP_VER_PCI_ULTRA_3050) {
8834 AscSetExtraControl(iop_base,
8835 (SEC_ACTIVE_NEGATE |
8836 SEC_ENABLE_FILTER));
8839 if (asc_dvc->bus_type == ASC_IS_PCI) {
8840 AscSetExtraControl(iop_base,
8841 (SEC_ACTIVE_NEGATE | SEC_SLEW_RATE));
8844 asc_dvc->cfg->isa_dma_speed = ASC_DEF_ISA_DMA_SPEED;
8846 if ((asc_dvc->bus_type & ASC_IS_ISA) != 0) {
8847 if (chip_version >= ASC_CHIP_MIN_VER_ISA_PNP) {
8848 AscSetChipIFC(iop_base, IFC_INIT_DEFAULT);
8849 asc_dvc->bus_type = ASC_IS_ISAPNP;
8851 asc_dvc->cfg->isa_dma_channel =
8852 (uchar)AscGetIsaDmaChannel(iop_base);
8854 #endif /* CONFIG_ISA */
8855 for (i = 0; i <= ASC_MAX_TID; i++) {
8856 asc_dvc->cur_dvc_qng[i] = 0;
8857 asc_dvc->max_dvc_qng[i] = ASC_MAX_SCSI1_QNG;
8858 asc_dvc->scsiq_busy_head[i] = (ASC_SCSI_Q *)0L;
8859 asc_dvc->scsiq_busy_tail[i] = (ASC_SCSI_Q *)0L;
8860 asc_dvc->cfg->max_tag_qng[i] = ASC_MAX_INRAM_TAG_QNG;
8865 static ushort __devinit AscInitFromEEP(ASC_DVC_VAR *asc_dvc)
8867 ASCEEP_CONFIG eep_config_buf;
8868 ASCEEP_CONFIG *eep_config;
8872 ushort cfg_msw, cfg_lsw;
8876 iop_base = asc_dvc->iop_base;
8878 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0x00FE);
8879 AscStopQueueExe(iop_base);
8880 if ((AscStopChip(iop_base) == FALSE) ||
8881 (AscGetChipScsiCtrl(iop_base) != 0)) {
8882 asc_dvc->init_state |= ASC_INIT_RESET_SCSI_DONE;
8883 AscResetChipAndScsiBus(asc_dvc);
8884 DvcSleepMilliSecond((ASC_DCNT)
8885 ((ushort)asc_dvc->scsi_reset_wait * 1000));
8887 if (AscIsChipHalted(iop_base) == FALSE) {
8888 asc_dvc->err_code |= ASC_IERR_START_STOP_CHIP;
8891 AscSetPCAddr(iop_base, ASC_MCODE_START_ADDR);
8892 if (AscGetPCAddr(iop_base) != ASC_MCODE_START_ADDR) {
8893 asc_dvc->err_code |= ASC_IERR_SET_PC_ADDR;
8896 eep_config = (ASCEEP_CONFIG *)&eep_config_buf;
8897 cfg_msw = AscGetChipCfgMsw(iop_base);
8898 cfg_lsw = AscGetChipCfgLsw(iop_base);
8899 if ((cfg_msw & ASC_CFG_MSW_CLR_MASK) != 0) {
8900 cfg_msw &= ~ASC_CFG_MSW_CLR_MASK;
8901 warn_code |= ASC_WARN_CFG_MSW_RECOVER;
8902 AscSetChipCfgMsw(iop_base, cfg_msw);
8904 chksum = AscGetEEPConfig(iop_base, eep_config, asc_dvc->bus_type);
8905 ASC_DBG1(1, "AscInitFromEEP: chksum 0x%x\n", chksum);
8909 if (AscGetChipStatus(iop_base) & CSW_AUTO_CONFIG) {
8910 warn_code |= ASC_WARN_AUTO_CONFIG;
8911 if (asc_dvc->cfg->chip_version == 3) {
8912 if (eep_config->cfg_lsw != cfg_lsw) {
8913 warn_code |= ASC_WARN_EEPROM_RECOVER;
8914 eep_config->cfg_lsw =
8915 AscGetChipCfgLsw(iop_base);
8917 if (eep_config->cfg_msw != cfg_msw) {
8918 warn_code |= ASC_WARN_EEPROM_RECOVER;
8919 eep_config->cfg_msw =
8920 AscGetChipCfgMsw(iop_base);
8924 eep_config->cfg_msw &= ~ASC_CFG_MSW_CLR_MASK;
8925 eep_config->cfg_lsw |= ASC_CFG0_HOST_INT_ON;
8926 ASC_DBG1(1, "AscInitFromEEP: eep_config->chksum 0x%x\n",
8927 eep_config->chksum);
8928 if (chksum != eep_config->chksum) {
8929 if (AscGetChipVersion(iop_base, asc_dvc->bus_type) ==
8930 ASC_CHIP_VER_PCI_ULTRA_3050) {
8932 "AscInitFromEEP: chksum error ignored; EEPROM-less board\n");
8933 eep_config->init_sdtr = 0xFF;
8934 eep_config->disc_enable = 0xFF;
8935 eep_config->start_motor = 0xFF;
8936 eep_config->use_cmd_qng = 0;
8937 eep_config->max_total_qng = 0xF0;
8938 eep_config->max_tag_qng = 0x20;
8939 eep_config->cntl = 0xBFFF;
8940 ASC_EEP_SET_CHIP_ID(eep_config, 7);
8941 eep_config->no_scam = 0;
8942 eep_config->adapter_info[0] = 0;
8943 eep_config->adapter_info[1] = 0;
8944 eep_config->adapter_info[2] = 0;
8945 eep_config->adapter_info[3] = 0;
8946 eep_config->adapter_info[4] = 0;
8947 /* Indicate EEPROM-less board. */
8948 eep_config->adapter_info[5] = 0xBB;
8951 ("AscInitFromEEP: EEPROM checksum error; Will try to re-write EEPROM.\n");
8953 warn_code |= ASC_WARN_EEPROM_CHKSUM;
8956 asc_dvc->cfg->sdtr_enable = eep_config->init_sdtr;
8957 asc_dvc->cfg->disc_enable = eep_config->disc_enable;
8958 asc_dvc->cfg->cmd_qng_enabled = eep_config->use_cmd_qng;
8959 asc_dvc->cfg->isa_dma_speed = ASC_EEP_GET_DMA_SPD(eep_config);
8960 asc_dvc->start_motor = eep_config->start_motor;
8961 asc_dvc->dvc_cntl = eep_config->cntl;
8962 asc_dvc->no_scam = eep_config->no_scam;
8963 asc_dvc->cfg->adapter_info[0] = eep_config->adapter_info[0];
8964 asc_dvc->cfg->adapter_info[1] = eep_config->adapter_info[1];
8965 asc_dvc->cfg->adapter_info[2] = eep_config->adapter_info[2];
8966 asc_dvc->cfg->adapter_info[3] = eep_config->adapter_info[3];
8967 asc_dvc->cfg->adapter_info[4] = eep_config->adapter_info[4];
8968 asc_dvc->cfg->adapter_info[5] = eep_config->adapter_info[5];
8969 if (!AscTestExternalLram(asc_dvc)) {
8970 if (((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) ==
8971 ASC_IS_PCI_ULTRA)) {
8972 eep_config->max_total_qng =
8973 ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG;
8974 eep_config->max_tag_qng =
8975 ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG;
8977 eep_config->cfg_msw |= 0x0800;
8979 AscSetChipCfgMsw(iop_base, cfg_msw);
8980 eep_config->max_total_qng = ASC_MAX_PCI_INRAM_TOTAL_QNG;
8981 eep_config->max_tag_qng = ASC_MAX_INRAM_TAG_QNG;
8985 if (eep_config->max_total_qng < ASC_MIN_TOTAL_QNG) {
8986 eep_config->max_total_qng = ASC_MIN_TOTAL_QNG;
8988 if (eep_config->max_total_qng > ASC_MAX_TOTAL_QNG) {
8989 eep_config->max_total_qng = ASC_MAX_TOTAL_QNG;
8991 if (eep_config->max_tag_qng > eep_config->max_total_qng) {
8992 eep_config->max_tag_qng = eep_config->max_total_qng;
8994 if (eep_config->max_tag_qng < ASC_MIN_TAG_Q_PER_DVC) {
8995 eep_config->max_tag_qng = ASC_MIN_TAG_Q_PER_DVC;
8997 asc_dvc->max_total_qng = eep_config->max_total_qng;
8998 if ((eep_config->use_cmd_qng & eep_config->disc_enable) !=
8999 eep_config->use_cmd_qng) {
9000 eep_config->disc_enable = eep_config->use_cmd_qng;
9001 warn_code |= ASC_WARN_CMD_QNG_CONFLICT;
9003 if (asc_dvc->bus_type & (ASC_IS_ISA | ASC_IS_VL | ASC_IS_EISA)) {
9004 asc_dvc->irq_no = AscGetChipIRQ(iop_base, asc_dvc->bus_type);
9006 ASC_EEP_SET_CHIP_ID(eep_config,
9007 ASC_EEP_GET_CHIP_ID(eep_config) & ASC_MAX_TID);
9008 asc_dvc->cfg->chip_scsi_id = ASC_EEP_GET_CHIP_ID(eep_config);
9009 if (((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA) &&
9010 !(asc_dvc->dvc_cntl & ASC_CNTL_SDTR_ENABLE_ULTRA)) {
9011 asc_dvc->host_init_sdtr_index = ASC_SDTR_ULTRA_PCI_10MB_INDEX;
9014 for (i = 0; i <= ASC_MAX_TID; i++) {
9015 asc_dvc->dos_int13_table[i] = eep_config->dos_int13_table[i];
9016 asc_dvc->cfg->max_tag_qng[i] = eep_config->max_tag_qng;
9017 asc_dvc->cfg->sdtr_period_offset[i] =
9018 (uchar)(ASC_DEF_SDTR_OFFSET |
9019 (asc_dvc->host_init_sdtr_index << 4));
9021 eep_config->cfg_msw = AscGetChipCfgMsw(iop_base);
9024 AscSetEEPConfig(iop_base, eep_config,
9025 asc_dvc->bus_type)) != 0) {
9027 ("AscInitFromEEP: Failed to re-write EEPROM with %d errors.\n",
9031 ("AscInitFromEEP: Successfully re-wrote EEPROM.\n");
9037 static ushort AscInitMicroCodeVar(ASC_DVC_VAR *asc_dvc)
9045 iop_base = asc_dvc->iop_base;
9047 for (i = 0; i <= ASC_MAX_TID; i++) {
9048 AscPutMCodeInitSDTRAtID(iop_base, i,
9049 asc_dvc->cfg->sdtr_period_offset[i]
9053 AscInitQLinkVar(asc_dvc);
9054 AscWriteLramByte(iop_base, ASCV_DISC_ENABLE_B,
9055 asc_dvc->cfg->disc_enable);
9056 AscWriteLramByte(iop_base, ASCV_HOSTSCSI_ID_B,
9057 ASC_TID_TO_TARGET_ID(asc_dvc->cfg->chip_scsi_id));
9059 /* Align overrun buffer on an 8 byte boundary. */
9060 phy_addr = virt_to_bus(asc_dvc->cfg->overrun_buf);
9061 phy_addr = cpu_to_le32((phy_addr + 7) & ~0x7);
9062 AscMemDWordCopyPtrToLram(iop_base, ASCV_OVERRUN_PADDR_D,
9063 (uchar *)&phy_addr, 1);
9064 phy_size = cpu_to_le32(ASC_OVERRUN_BSIZE - 8);
9065 AscMemDWordCopyPtrToLram(iop_base, ASCV_OVERRUN_BSIZE_D,
9066 (uchar *)&phy_size, 1);
9068 asc_dvc->cfg->mcode_date =
9069 AscReadLramWord(iop_base, (ushort)ASCV_MC_DATE_W);
9070 asc_dvc->cfg->mcode_version =
9071 AscReadLramWord(iop_base, (ushort)ASCV_MC_VER_W);
9073 AscSetPCAddr(iop_base, ASC_MCODE_START_ADDR);
9074 if (AscGetPCAddr(iop_base) != ASC_MCODE_START_ADDR) {
9075 asc_dvc->err_code |= ASC_IERR_SET_PC_ADDR;
9078 if (AscStartChip(iop_base) != 1) {
9079 asc_dvc->err_code |= ASC_IERR_START_STOP_CHIP;
9086 static int __devinit AscTestExternalLram(ASC_DVC_VAR *asc_dvc)
9093 iop_base = asc_dvc->iop_base;
9095 q_addr = ASC_QNO_TO_QADDR(241);
9096 saved_word = AscReadLramWord(iop_base, q_addr);
9097 AscSetChipLramAddr(iop_base, q_addr);
9098 AscSetChipLramData(iop_base, 0x55AA);
9099 DvcSleepMilliSecond(10);
9100 AscSetChipLramAddr(iop_base, q_addr);
9101 if (AscGetChipLramData(iop_base) == 0x55AA) {
9103 AscWriteLramWord(iop_base, q_addr, saved_word);
9108 static int __devinit AscWriteEEPCmdReg(PortAddr iop_base, uchar cmd_reg)
9115 AscSetChipEEPCmd(iop_base, cmd_reg);
9116 DvcSleepMilliSecond(1);
9117 read_back = AscGetChipEEPCmd(iop_base);
9118 if (read_back == cmd_reg) {
9121 if (retry++ > ASC_EEP_MAX_RETRY) {
9127 static int __devinit AscWriteEEPDataReg(PortAddr iop_base, ushort data_reg)
9134 AscSetChipEEPData(iop_base, data_reg);
9135 DvcSleepMilliSecond(1);
9136 read_back = AscGetChipEEPData(iop_base);
9137 if (read_back == data_reg) {
9140 if (retry++ > ASC_EEP_MAX_RETRY) {
9146 static void __devinit AscWaitEEPRead(void)
9148 DvcSleepMilliSecond(1);
9152 static void __devinit AscWaitEEPWrite(void)
9154 DvcSleepMilliSecond(20);
9158 static ushort __devinit AscReadEEPWord(PortAddr iop_base, uchar addr)
9163 AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_DISABLE);
9165 cmd_reg = addr | ASC_EEP_CMD_READ;
9166 AscWriteEEPCmdReg(iop_base, cmd_reg);
9168 read_wval = AscGetChipEEPData(iop_base);
9173 static ushort __devinit
9174 AscWriteEEPWord(PortAddr iop_base, uchar addr, ushort word_val)
9178 read_wval = AscReadEEPWord(iop_base, addr);
9179 if (read_wval != word_val) {
9180 AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_ABLE);
9182 AscWriteEEPDataReg(iop_base, word_val);
9184 AscWriteEEPCmdReg(iop_base,
9185 (uchar)((uchar)ASC_EEP_CMD_WRITE | addr));
9187 AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_DISABLE);
9189 return (AscReadEEPWord(iop_base, addr));
9194 static ushort __devinit
9195 AscGetEEPConfig(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type)
9202 int uchar_end_in_config = ASC_EEP_MAX_DVC_ADDR - 2;
9205 wbuf = (ushort *)cfg_buf;
9207 /* Read two config words; Byte-swapping done by AscReadEEPWord(). */
9208 for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) {
9209 *wbuf = AscReadEEPWord(iop_base, (uchar)s_addr);
9212 if (bus_type & ASC_IS_VL) {
9213 cfg_beg = ASC_EEP_DVC_CFG_BEG_VL;
9214 cfg_end = ASC_EEP_MAX_DVC_ADDR_VL;
9216 cfg_beg = ASC_EEP_DVC_CFG_BEG;
9217 cfg_end = ASC_EEP_MAX_DVC_ADDR;
9219 for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) {
9220 wval = AscReadEEPWord(iop_base, (uchar)s_addr);
9221 if (s_addr <= uchar_end_in_config) {
9223 * Swap all char fields - must unswap bytes already swapped
9224 * by AscReadEEPWord().
9226 *wbuf = le16_to_cpu(wval);
9228 /* Don't swap word field at the end - cntl field. */
9231 sum += wval; /* Checksum treats all EEPROM data as words. */
9234 * Read the checksum word which will be compared against 'sum'
9235 * by the caller. Word field already swapped.
9237 *wbuf = AscReadEEPWord(iop_base, (uchar)s_addr);
9241 static int __devinit
9242 AscSetEEPConfigOnce(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type)
9251 int uchar_end_in_config = ASC_EEP_MAX_DVC_ADDR - 2;
9253 wbuf = (ushort *)cfg_buf;
9256 /* Write two config words; AscWriteEEPWord() will swap bytes. */
9257 for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) {
9259 if (*wbuf != AscWriteEEPWord(iop_base, (uchar)s_addr, *wbuf)) {
9263 if (bus_type & ASC_IS_VL) {
9264 cfg_beg = ASC_EEP_DVC_CFG_BEG_VL;
9265 cfg_end = ASC_EEP_MAX_DVC_ADDR_VL;
9267 cfg_beg = ASC_EEP_DVC_CFG_BEG;
9268 cfg_end = ASC_EEP_MAX_DVC_ADDR;
9270 for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) {
9271 if (s_addr <= uchar_end_in_config) {
9273 * This is a char field. Swap char fields before they are
9274 * swapped again by AscWriteEEPWord().
9276 word = cpu_to_le16(*wbuf);
9278 AscWriteEEPWord(iop_base, (uchar)s_addr, word)) {
9282 /* Don't swap word field at the end - cntl field. */
9284 AscWriteEEPWord(iop_base, (uchar)s_addr, *wbuf)) {
9288 sum += *wbuf; /* Checksum calculated from word values. */
9290 /* Write checksum word. It will be swapped by AscWriteEEPWord(). */
9292 if (sum != AscWriteEEPWord(iop_base, (uchar)s_addr, sum)) {
9296 /* Read EEPROM back again. */
9297 wbuf = (ushort *)cfg_buf;
9299 * Read two config words; Byte-swapping done by AscReadEEPWord().
9301 for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) {
9302 if (*wbuf != AscReadEEPWord(iop_base, (uchar)s_addr)) {
9306 if (bus_type & ASC_IS_VL) {
9307 cfg_beg = ASC_EEP_DVC_CFG_BEG_VL;
9308 cfg_end = ASC_EEP_MAX_DVC_ADDR_VL;
9310 cfg_beg = ASC_EEP_DVC_CFG_BEG;
9311 cfg_end = ASC_EEP_MAX_DVC_ADDR;
9313 for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) {
9314 if (s_addr <= uchar_end_in_config) {
9316 * Swap all char fields. Must unswap bytes already swapped
9317 * by AscReadEEPWord().
9320 le16_to_cpu(AscReadEEPWord
9321 (iop_base, (uchar)s_addr));
9323 /* Don't swap word field at the end - cntl field. */
9324 word = AscReadEEPWord(iop_base, (uchar)s_addr);
9326 if (*wbuf != word) {
9330 /* Read checksum; Byte swapping not needed. */
9331 if (AscReadEEPWord(iop_base, (uchar)s_addr) != sum) {
9337 static int __devinit
9338 AscSetEEPConfig(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type)
9345 if ((n_error = AscSetEEPConfigOnce(iop_base, cfg_buf,
9349 if (++retry > ASC_EEP_MAX_RETRY) {
9356 static void AscAsyncFix(ASC_DVC_VAR *asc_dvc, struct scsi_device *sdev)
9358 char type = sdev->type;
9359 ASC_SCSI_BIT_ID_TYPE tid_bits = 1 << sdev->id;
9361 if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_ASYN_USE_SYN) {
9362 if (!(asc_dvc->init_sdtr & tid_bits)) {
9363 if ((type == TYPE_ROM) &&
9364 (strncmp(sdev->vendor, "HP ", 3) == 0)) {
9365 asc_dvc->pci_fix_asyn_xfer_always |= tid_bits;
9367 asc_dvc->pci_fix_asyn_xfer |= tid_bits;
9368 if ((type == TYPE_PROCESSOR) ||
9369 (type == TYPE_SCANNER) || (type == TYPE_ROM) ||
9370 (type == TYPE_TAPE)) {
9371 asc_dvc->pci_fix_asyn_xfer &= ~tid_bits;
9374 if (asc_dvc->pci_fix_asyn_xfer & tid_bits) {
9375 AscSetRunChipSynRegAtID(asc_dvc->iop_base,
9377 ASYN_SDTR_DATA_FIX_PCI_REV_AB);
9383 static uchar AscReadLramByte(PortAddr iop_base, ushort addr)
9388 if (isodd_word(addr)) {
9389 AscSetChipLramAddr(iop_base, addr - 1);
9390 word_data = AscGetChipLramData(iop_base);
9391 byte_data = (uchar)((word_data >> 8) & 0xFF);
9393 AscSetChipLramAddr(iop_base, addr);
9394 word_data = AscGetChipLramData(iop_base);
9395 byte_data = (uchar)(word_data & 0xFF);
9400 static ushort AscReadLramWord(PortAddr iop_base, ushort addr)
9404 AscSetChipLramAddr(iop_base, addr);
9405 word_data = AscGetChipLramData(iop_base);
9409 #if CC_VERY_LONG_SG_LIST
9410 static ASC_DCNT AscReadLramDWord(PortAddr iop_base, ushort addr)
9412 ushort val_low, val_high;
9413 ASC_DCNT dword_data;
9415 AscSetChipLramAddr(iop_base, addr);
9416 val_low = AscGetChipLramData(iop_base);
9417 val_high = AscGetChipLramData(iop_base);
9418 dword_data = ((ASC_DCNT) val_high << 16) | (ASC_DCNT) val_low;
9419 return (dword_data);
9421 #endif /* CC_VERY_LONG_SG_LIST */
9423 static void AscWriteLramWord(PortAddr iop_base, ushort addr, ushort word_val)
9425 AscSetChipLramAddr(iop_base, addr);
9426 AscSetChipLramData(iop_base, word_val);
9430 static void AscWriteLramByte(PortAddr iop_base, ushort addr, uchar byte_val)
9434 if (isodd_word(addr)) {
9436 word_data = AscReadLramWord(iop_base, addr);
9437 word_data &= 0x00FF;
9438 word_data |= (((ushort)byte_val << 8) & 0xFF00);
9440 word_data = AscReadLramWord(iop_base, addr);
9441 word_data &= 0xFF00;
9442 word_data |= ((ushort)byte_val & 0x00FF);
9444 AscWriteLramWord(iop_base, addr, word_data);
9449 * Copy 2 bytes to LRAM.
9451 * The source data is assumed to be in little-endian order in memory
9452 * and is maintained in little-endian order when written to LRAM.
9455 AscMemWordCopyPtrToLram(PortAddr iop_base,
9456 ushort s_addr, uchar *s_buffer, int words)
9460 AscSetChipLramAddr(iop_base, s_addr);
9461 for (i = 0; i < 2 * words; i += 2) {
9463 * On a little-endian system the second argument below
9464 * produces a little-endian ushort which is written to
9465 * LRAM in little-endian order. On a big-endian system
9466 * the second argument produces a big-endian ushort which
9467 * is "transparently" byte-swapped by outpw() and written
9468 * in little-endian order to LRAM.
9470 outpw(iop_base + IOP_RAM_DATA,
9471 ((ushort)s_buffer[i + 1] << 8) | s_buffer[i]);
9477 * Copy 4 bytes to LRAM.
9479 * The source data is assumed to be in little-endian order in memory
9480 * and is maintained in little-endian order when writen to LRAM.
9483 AscMemDWordCopyPtrToLram(PortAddr iop_base,
9484 ushort s_addr, uchar *s_buffer, int dwords)
9488 AscSetChipLramAddr(iop_base, s_addr);
9489 for (i = 0; i < 4 * dwords; i += 4) {
9490 outpw(iop_base + IOP_RAM_DATA, ((ushort)s_buffer[i + 1] << 8) | s_buffer[i]); /* LSW */
9491 outpw(iop_base + IOP_RAM_DATA, ((ushort)s_buffer[i + 3] << 8) | s_buffer[i + 2]); /* MSW */
9497 * Copy 2 bytes from LRAM.
9499 * The source data is assumed to be in little-endian order in LRAM
9500 * and is maintained in little-endian order when written to memory.
9503 AscMemWordCopyPtrFromLram(PortAddr iop_base,
9504 ushort s_addr, uchar *d_buffer, int words)
9509 AscSetChipLramAddr(iop_base, s_addr);
9510 for (i = 0; i < 2 * words; i += 2) {
9511 word = inpw(iop_base + IOP_RAM_DATA);
9512 d_buffer[i] = word & 0xff;
9513 d_buffer[i + 1] = (word >> 8) & 0xff;
9518 static ASC_DCNT AscMemSumLramWord(PortAddr iop_base, ushort s_addr, int words)
9524 for (i = 0; i < words; i++, s_addr += 2) {
9525 sum += AscReadLramWord(iop_base, s_addr);
9531 AscMemWordSetLram(PortAddr iop_base, ushort s_addr, ushort set_wval, int words)
9535 AscSetChipLramAddr(iop_base, s_addr);
9536 for (i = 0; i < words; i++) {
9537 AscSetChipLramData(iop_base, set_wval);
9543 * --- Adv Library Functions
9548 /* Microcode buffer is kept after initialization for error recovery. */
9549 static unsigned char _adv_asc3550_buf[] = {
9550 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0x16, 0x18, 0xe4, 0x00, 0xfc,
9551 0x01, 0x00, 0x48, 0xe4, 0xbe, 0x18, 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00,
9552 0x00, 0xfa, 0xff, 0xff, 0x28, 0x0e, 0x9e, 0xe7, 0xff, 0x00, 0x82, 0xe7,
9553 0x00, 0xea, 0x00, 0xf6, 0x01, 0xe6, 0x09, 0xe7, 0x55, 0xf0, 0x01, 0xf6,
9554 0x01, 0xfa, 0x08, 0x00, 0x03, 0x00, 0x04, 0x00, 0x18, 0xf4, 0x10, 0x00,
9555 0x00, 0xec, 0x85, 0xf0, 0xbc, 0x00, 0xd5, 0xf0, 0x8e, 0x0c, 0x38, 0x54,
9556 0x00, 0xe6, 0x1e, 0xf0, 0x86, 0xf0, 0xb4, 0x00, 0x98, 0x57, 0xd0, 0x01,
9557 0x0c, 0x1c, 0x3e, 0x1c, 0x0c, 0x00, 0xbb, 0x00, 0xaa, 0x18, 0x02, 0x80,
9558 0x32, 0xf0, 0x01, 0xfc, 0x88, 0x0c, 0xc6, 0x12, 0x02, 0x13, 0x18, 0x40,
9559 0x00, 0x57, 0x01, 0xea, 0x3c, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12,
9560 0x3e, 0x57, 0x00, 0x80, 0x03, 0xe6, 0xb6, 0x00, 0xc0, 0x00, 0x01, 0x01,
9561 0x3e, 0x01, 0xda, 0x0f, 0x22, 0x10, 0x08, 0x12, 0x02, 0x4a, 0xb9, 0x54,
9562 0x03, 0x58, 0x1b, 0x80, 0x30, 0xe4, 0x4b, 0xe4, 0x20, 0x00, 0x32, 0x00,
9563 0x3e, 0x00, 0x80, 0x00, 0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01,
9564 0x70, 0x01, 0x72, 0x01, 0x74, 0x01, 0x76, 0x01, 0x78, 0x01, 0x62, 0x0a,
9565 0x92, 0x0c, 0x2c, 0x10, 0x2e, 0x10, 0x06, 0x13, 0x4c, 0x1c, 0xbb, 0x55,
9566 0x3c, 0x56, 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0, 0xb1, 0xf0,
9567 0x03, 0xf7, 0x06, 0xf7, 0x03, 0xfc, 0x0f, 0x00, 0x40, 0x00, 0xbe, 0x00,
9568 0x00, 0x01, 0xb0, 0x08, 0x30, 0x13, 0x64, 0x15, 0x32, 0x1c, 0x38, 0x1c,
9569 0x4e, 0x1c, 0x10, 0x44, 0x02, 0x48, 0x00, 0x4c, 0x04, 0xea, 0x5d, 0xf0,
9570 0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x34, 0x00, 0x36, 0x00, 0x98, 0x00,
9571 0xcc, 0x00, 0x20, 0x01, 0x4e, 0x01, 0x4e, 0x0b, 0x1e, 0x0e, 0x0c, 0x10,
9572 0x0a, 0x12, 0x04, 0x13, 0x40, 0x13, 0x30, 0x1c, 0x00, 0x4e, 0xbd, 0x56,
9573 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0, 0x59, 0xf0, 0xa7, 0xf0,
9574 0xb8, 0xf0, 0x0e, 0xf7, 0x06, 0x00, 0x19, 0x00, 0x33, 0x00, 0x9b, 0x00,
9575 0xa4, 0x00, 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00, 0xe7, 0x00,
9576 0xde, 0x03, 0x56, 0x0a, 0x14, 0x0e, 0x02, 0x10, 0x04, 0x10, 0x0a, 0x10,
9577 0x36, 0x10, 0x0a, 0x13, 0x12, 0x13, 0x52, 0x13, 0x10, 0x15, 0x14, 0x15,
9578 0xac, 0x16, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, 0x08, 0x44, 0x38, 0x44,
9579 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46, 0x01, 0x48, 0x68, 0x54, 0x83, 0x55,
9580 0xb0, 0x57, 0x01, 0x58, 0x83, 0x59, 0x05, 0xe6, 0x0b, 0xf0, 0x0c, 0xf0,
9581 0x5c, 0xf0, 0x4b, 0xf4, 0x04, 0xf8, 0x05, 0xf8, 0x02, 0xfa, 0x03, 0xfa,
9582 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00, 0x0a, 0x00, 0x0d, 0x00, 0x1c, 0x00,
9583 0x9e, 0x00, 0xa8, 0x00, 0xaa, 0x00, 0xb9, 0x00, 0xe0, 0x00, 0x22, 0x01,
9584 0x26, 0x01, 0x79, 0x01, 0x7a, 0x01, 0xc0, 0x01, 0xc2, 0x01, 0x7c, 0x02,
9585 0x5a, 0x03, 0xea, 0x04, 0xe8, 0x07, 0x68, 0x08, 0x69, 0x08, 0xba, 0x08,
9586 0xe9, 0x09, 0x06, 0x0b, 0x3a, 0x0e, 0x00, 0x10, 0x1a, 0x10, 0xed, 0x10,
9587 0xf1, 0x10, 0x06, 0x12, 0x0c, 0x13, 0x16, 0x13, 0x1e, 0x13, 0x82, 0x13,
9588 0x42, 0x14, 0xd6, 0x14, 0x8a, 0x15, 0xc6, 0x17, 0xd2, 0x17, 0x6b, 0x18,
9589 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40, 0x0e, 0x47, 0x48, 0x47,
9590 0x41, 0x48, 0x89, 0x48, 0x80, 0x4c, 0x00, 0x54, 0x44, 0x55, 0xe5, 0x55,
9591 0x14, 0x56, 0x77, 0x57, 0xbf, 0x57, 0x40, 0x5c, 0x06, 0x80, 0x08, 0x90,
9592 0x03, 0xa1, 0xfe, 0x9c, 0xf0, 0x29, 0x02, 0xfe, 0xb8, 0x0c, 0xff, 0x10,
9593 0x00, 0x00, 0xd0, 0xfe, 0xcc, 0x18, 0x00, 0xcf, 0xfe, 0x80, 0x01, 0xff,
9594 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00,
9595 0x00, 0xfe, 0x57, 0x24, 0x00, 0xfe, 0x48, 0x00, 0x4f, 0xff, 0x04, 0x00,
9596 0x00, 0x10, 0xff, 0x09, 0x00, 0x00, 0xff, 0x08, 0x01, 0x01, 0xff, 0x08,
9597 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, 0xff, 0xff, 0xff, 0x0f,
9598 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00,
9599 0xfe, 0x04, 0xf7, 0xcf, 0x2a, 0x67, 0x0b, 0x01, 0xfe, 0xce, 0x0e, 0xfe,
9600 0x04, 0xf7, 0xcf, 0x67, 0x0b, 0x3c, 0x2a, 0xfe, 0x3d, 0xf0, 0xfe, 0x02,
9601 0x02, 0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x91, 0xf0, 0xfe, 0xf0, 0x01, 0xfe,
9602 0x90, 0xf0, 0xfe, 0xf0, 0x01, 0xfe, 0x8f, 0xf0, 0x9c, 0x05, 0x51, 0x3b,
9603 0x02, 0xfe, 0xd4, 0x0c, 0x01, 0xfe, 0x44, 0x0d, 0xfe, 0xdd, 0x12, 0xfe,
9604 0xfc, 0x10, 0xfe, 0x28, 0x1c, 0x05, 0xfe, 0xa6, 0x00, 0xfe, 0xd3, 0x12,
9605 0x47, 0x18, 0xfe, 0xa6, 0x00, 0xb5, 0xfe, 0x48, 0xf0, 0xfe, 0x86, 0x02,
9606 0xfe, 0x49, 0xf0, 0xfe, 0xa0, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xbe, 0x02,
9607 0xfe, 0x46, 0xf0, 0xfe, 0x50, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x56, 0x02,
9608 0xfe, 0x43, 0xf0, 0xfe, 0x44, 0x02, 0xfe, 0x44, 0xf0, 0xfe, 0x48, 0x02,
9609 0xfe, 0x45, 0xf0, 0xfe, 0x4c, 0x02, 0x17, 0x0b, 0xa0, 0x17, 0x06, 0x18,
9610 0x96, 0x02, 0x29, 0xfe, 0x00, 0x1c, 0xde, 0xfe, 0x02, 0x1c, 0xdd, 0xfe,
9611 0x1e, 0x1c, 0xfe, 0xe9, 0x10, 0x01, 0xfe, 0x20, 0x17, 0xfe, 0xe7, 0x10,
9612 0xfe, 0x06, 0xfc, 0xc7, 0x0a, 0x6b, 0x01, 0x9e, 0x02, 0x29, 0x14, 0x4d,
9613 0x37, 0x97, 0x01, 0xfe, 0x64, 0x0f, 0x0a, 0x6b, 0x01, 0x82, 0xfe, 0xbd,
9614 0x10, 0x0a, 0x6b, 0x01, 0x82, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe,
9615 0x58, 0x1c, 0x17, 0x06, 0x18, 0x96, 0x2a, 0x25, 0x29, 0xfe, 0x3d, 0xf0,
9616 0xfe, 0x02, 0x02, 0x21, 0xfe, 0x94, 0x02, 0xfe, 0x5a, 0x1c, 0xea, 0xfe,
9617 0x14, 0x1c, 0x14, 0xfe, 0x30, 0x00, 0x37, 0x97, 0x01, 0xfe, 0x54, 0x0f,
9618 0x17, 0x06, 0x18, 0x96, 0x02, 0xd0, 0x1e, 0x20, 0x07, 0x10, 0x34, 0xfe,
9619 0x69, 0x10, 0x17, 0x06, 0x18, 0x96, 0xfe, 0x04, 0xec, 0x20, 0x46, 0x3d,
9620 0x12, 0x20, 0xfe, 0x05, 0xf6, 0xc7, 0x01, 0xfe, 0x52, 0x16, 0x09, 0x4a,
9621 0x4c, 0x35, 0x11, 0x2d, 0x3c, 0x8a, 0x01, 0xe6, 0x02, 0x29, 0x0a, 0x40,
9622 0x01, 0x0e, 0x07, 0x00, 0x5d, 0x01, 0x6f, 0xfe, 0x18, 0x10, 0xfe, 0x41,
9623 0x58, 0x0a, 0x99, 0x01, 0x0e, 0xfe, 0xc8, 0x54, 0x64, 0xfe, 0x0c, 0x03,
9624 0x01, 0xe6, 0x02, 0x29, 0x2a, 0x46, 0xfe, 0x02, 0xe8, 0x27, 0xf8, 0xfe,
9625 0x9e, 0x43, 0xf7, 0xfe, 0x27, 0xf0, 0xfe, 0xdc, 0x01, 0xfe, 0x07, 0x4b,
9626 0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x40, 0x1c, 0x25, 0xd2, 0xfe, 0x26, 0xf0,
9627 0xfe, 0x56, 0x03, 0xfe, 0xa0, 0xf0, 0xfe, 0x44, 0x03, 0xfe, 0x11, 0xf0,
9628 0x9c, 0xfe, 0xef, 0x10, 0xfe, 0x9f, 0xf0, 0xfe, 0x64, 0x03, 0xeb, 0x0f,
9629 0xfe, 0x11, 0x00, 0x02, 0x5a, 0x2a, 0xfe, 0x48, 0x1c, 0xeb, 0x09, 0x04,
9630 0x1d, 0xfe, 0x18, 0x13, 0x23, 0x1e, 0x98, 0xac, 0x12, 0x98, 0x0a, 0x40,
9631 0x01, 0x0e, 0xac, 0x75, 0x01, 0xfe, 0xbc, 0x15, 0x11, 0xca, 0x25, 0xd2,
9632 0xfe, 0x01, 0xf0, 0xd2, 0xfe, 0x82, 0xf0, 0xfe, 0x92, 0x03, 0xec, 0x11,
9633 0xfe, 0xe4, 0x00, 0x65, 0xfe, 0xa4, 0x03, 0x25, 0x32, 0x1f, 0xfe, 0xb4,
9634 0x03, 0x01, 0x43, 0xfe, 0x06, 0xf0, 0xfe, 0xc4, 0x03, 0x8d, 0x81, 0xfe,
9635 0x0a, 0xf0, 0xfe, 0x7a, 0x06, 0x02, 0x22, 0x05, 0x6b, 0x28, 0x16, 0xfe,
9636 0xf6, 0x04, 0x14, 0x2c, 0x01, 0x33, 0x8f, 0xfe, 0x66, 0x02, 0x02, 0xd1,
9637 0xeb, 0x2a, 0x67, 0x1a, 0xfe, 0x67, 0x1b, 0xf8, 0xf7, 0xfe, 0x48, 0x1c,
9638 0x70, 0x01, 0x6e, 0x87, 0x0a, 0x40, 0x01, 0x0e, 0x07, 0x00, 0x16, 0xd3,
9639 0x0a, 0xca, 0x01, 0x0e, 0x74, 0x60, 0x59, 0x76, 0x27, 0x05, 0x6b, 0x28,
9640 0xfe, 0x10, 0x12, 0x14, 0x2c, 0x01, 0x33, 0x8f, 0xfe, 0x66, 0x02, 0x02,
9641 0xd1, 0xbc, 0x7d, 0xbd, 0x7f, 0x25, 0x22, 0x65, 0xfe, 0x3c, 0x04, 0x1f,
9642 0xfe, 0x38, 0x04, 0x68, 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x4e,
9643 0x12, 0x2b, 0xff, 0x02, 0x00, 0x10, 0x01, 0x08, 0x1f, 0xfe, 0xe0, 0x04,
9644 0x2b, 0x01, 0x08, 0x1f, 0x22, 0x30, 0x2e, 0xd5, 0xfe, 0x4c, 0x44, 0xfe,
9645 0x4c, 0x12, 0x60, 0xfe, 0x44, 0x48, 0x13, 0x2c, 0xfe, 0x4c, 0x54, 0x64,
9646 0xd3, 0x46, 0x76, 0x27, 0xfa, 0xef, 0xfe, 0x62, 0x13, 0x09, 0x04, 0x1d,
9647 0xfe, 0x2a, 0x13, 0x2f, 0x07, 0x7e, 0xa5, 0xfe, 0x20, 0x10, 0x13, 0x2c,
9648 0xfe, 0x4c, 0x54, 0x64, 0xd3, 0xfa, 0xef, 0x86, 0x09, 0x04, 0x1d, 0xfe,
9649 0x08, 0x13, 0x2f, 0x07, 0x7e, 0x6e, 0x09, 0x04, 0x1d, 0xfe, 0x1c, 0x12,
9650 0x14, 0x92, 0x09, 0x04, 0x06, 0x3b, 0x14, 0xc4, 0x01, 0x33, 0x8f, 0xfe,
9651 0x70, 0x0c, 0x02, 0x22, 0x2b, 0x11, 0xfe, 0xe6, 0x00, 0xfe, 0x1c, 0x90,
9652 0xf9, 0x03, 0x14, 0x92, 0x01, 0x33, 0x02, 0x29, 0xfe, 0x42, 0x5b, 0x67,
9653 0x1a, 0xfe, 0x46, 0x59, 0xf8, 0xf7, 0xfe, 0x87, 0x80, 0xfe, 0x31, 0xe4,
9654 0x4f, 0x09, 0x04, 0x0b, 0xfe, 0x78, 0x13, 0xfe, 0x20, 0x80, 0x07, 0x1a,
9655 0xfe, 0x70, 0x12, 0x49, 0x04, 0x06, 0xfe, 0x60, 0x13, 0x05, 0xfe, 0xa2,
9656 0x00, 0x28, 0x16, 0xfe, 0x80, 0x05, 0xfe, 0x31, 0xe4, 0x6a, 0x49, 0x04,
9657 0x0b, 0xfe, 0x4a, 0x13, 0x05, 0xfe, 0xa0, 0x00, 0x28, 0xfe, 0x42, 0x12,
9658 0x5e, 0x01, 0x08, 0x25, 0x32, 0xf1, 0x01, 0x08, 0x26, 0xfe, 0x98, 0x05,
9659 0x11, 0xfe, 0xe3, 0x00, 0x23, 0x49, 0xfe, 0x4a, 0xf0, 0xfe, 0x6a, 0x05,
9660 0xfe, 0x49, 0xf0, 0xfe, 0x64, 0x05, 0x83, 0x24, 0xfe, 0x21, 0x00, 0xa1,
9661 0x24, 0xfe, 0x22, 0x00, 0xa0, 0x24, 0x4c, 0xfe, 0x09, 0x48, 0x01, 0x08,
9662 0x26, 0xfe, 0x98, 0x05, 0xfe, 0xe2, 0x08, 0x49, 0x04, 0xc5, 0x3b, 0x01,
9663 0x86, 0x24, 0x06, 0x12, 0xcc, 0x37, 0xfe, 0x27, 0x01, 0x09, 0x04, 0x1d,
9664 0xfe, 0x22, 0x12, 0x47, 0x01, 0xa7, 0x14, 0x92, 0x09, 0x04, 0x06, 0x3b,
9665 0x14, 0xc4, 0x01, 0x33, 0x8f, 0xfe, 0x70, 0x0c, 0x02, 0x22, 0x05, 0xfe,
9666 0x9c, 0x00, 0x28, 0xfe, 0x3e, 0x12, 0x05, 0x50, 0x28, 0xfe, 0x36, 0x13,
9667 0x47, 0x01, 0xa7, 0x26, 0xfe, 0x08, 0x06, 0x0a, 0x06, 0x49, 0x04, 0x19,
9668 0xfe, 0x02, 0x12, 0x5f, 0x01, 0xfe, 0xaa, 0x14, 0x1f, 0xfe, 0xfe, 0x05,
9669 0x11, 0x9a, 0x01, 0x43, 0x11, 0xfe, 0xe5, 0x00, 0x05, 0x50, 0xb4, 0x0c,
9670 0x50, 0x05, 0xc6, 0x28, 0xfe, 0x62, 0x12, 0x05, 0x3f, 0x28, 0xfe, 0x5a,
9671 0x13, 0x01, 0xfe, 0x14, 0x18, 0x01, 0xfe, 0x66, 0x18, 0xfe, 0x43, 0x48,
9672 0xb7, 0x19, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, 0x1c, 0x3d,
9673 0x85, 0xb7, 0x69, 0x47, 0x01, 0xa7, 0x26, 0xfe, 0x72, 0x06, 0x49, 0x04,
9674 0x1b, 0xdf, 0x89, 0x0a, 0x4d, 0x01, 0xfe, 0xd8, 0x14, 0x1f, 0xfe, 0x68,
9675 0x06, 0x11, 0x9a, 0x01, 0x43, 0x11, 0xfe, 0xe5, 0x00, 0x05, 0x3f, 0xb4,
9676 0x0c, 0x3f, 0x17, 0x06, 0x01, 0xa7, 0xec, 0x72, 0x70, 0x01, 0x6e, 0x87,
9677 0x11, 0xfe, 0xe2, 0x00, 0x01, 0x08, 0x25, 0x32, 0xfe, 0x0a, 0xf0, 0xfe,
9678 0xa6, 0x06, 0x8c, 0xfe, 0x5c, 0x07, 0xfe, 0x06, 0xf0, 0xfe, 0x64, 0x07,
9679 0x8d, 0x81, 0x02, 0x22, 0x09, 0x04, 0x0b, 0xfe, 0x2e, 0x12, 0x15, 0x1a,
9680 0x01, 0x08, 0x15, 0x00, 0x01, 0x08, 0x15, 0x00, 0x01, 0x08, 0x15, 0x00,
9681 0x01, 0x08, 0xfe, 0x99, 0xa4, 0x01, 0x08, 0x15, 0x00, 0x02, 0xfe, 0x32,
9682 0x08, 0x61, 0x04, 0x1b, 0xfe, 0x38, 0x12, 0x09, 0x04, 0x1b, 0x6e, 0x15,
9683 0xfe, 0x1b, 0x00, 0x01, 0x08, 0x15, 0x00, 0x01, 0x08, 0x15, 0x00, 0x01,
9684 0x08, 0x15, 0x00, 0x01, 0x08, 0x15, 0x06, 0x01, 0x08, 0x15, 0x00, 0x02,
9685 0xd9, 0x66, 0x4c, 0xfe, 0x3a, 0x55, 0x5f, 0xfe, 0x9a, 0x81, 0x4b, 0x1d,
9686 0xba, 0xfe, 0x32, 0x07, 0x0a, 0x1d, 0xfe, 0x09, 0x6f, 0xaf, 0xfe, 0xca,
9687 0x45, 0xfe, 0x32, 0x12, 0x62, 0x2c, 0x85, 0x66, 0x7b, 0x01, 0x08, 0x25,
9688 0x32, 0xfe, 0x0a, 0xf0, 0xfe, 0x32, 0x07, 0x8d, 0x81, 0x8c, 0xfe, 0x5c,
9689 0x07, 0x02, 0x22, 0x01, 0x43, 0x02, 0xfe, 0x8a, 0x06, 0x15, 0x19, 0x02,
9690 0xfe, 0x8a, 0x06, 0xfe, 0x9c, 0xf7, 0xd4, 0xfe, 0x2c, 0x90, 0xfe, 0xae,
9691 0x90, 0x77, 0xfe, 0xca, 0x07, 0x0c, 0x54, 0x18, 0x55, 0x09, 0x4a, 0x6a,
9692 0x35, 0x1e, 0x20, 0x07, 0x10, 0xfe, 0x0e, 0x12, 0x74, 0xfe, 0x80, 0x80,
9693 0x37, 0x20, 0x63, 0x27, 0xfe, 0x06, 0x10, 0xfe, 0x83, 0xe7, 0xc4, 0xa1,
9694 0xfe, 0x03, 0x40, 0x09, 0x4a, 0x4f, 0x35, 0x01, 0xa8, 0xad, 0xfe, 0x1f,
9695 0x40, 0x12, 0x58, 0x01, 0xa5, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0xfe,
9696 0x44, 0x51, 0xfe, 0xc6, 0x51, 0x83, 0xfb, 0xfe, 0x8a, 0x90, 0x0c, 0x52,
9697 0x18, 0x53, 0xfe, 0x0c, 0x90, 0xfe, 0x8e, 0x90, 0xfe, 0x40, 0x50, 0xfe,
9698 0xc2, 0x50, 0x0c, 0x39, 0x18, 0x3a, 0xfe, 0x4a, 0x10, 0x09, 0x04, 0x6a,
9699 0xfe, 0x2a, 0x12, 0xfe, 0x2c, 0x90, 0xfe, 0xae, 0x90, 0x0c, 0x54, 0x18,
9700 0x55, 0x09, 0x04, 0x4f, 0x85, 0x01, 0xa8, 0xfe, 0x1f, 0x80, 0x12, 0x58,
9701 0xfe, 0x44, 0x90, 0xfe, 0xc6, 0x90, 0x0c, 0x56, 0x18, 0x57, 0xfb, 0xfe,
9702 0x8a, 0x90, 0x0c, 0x52, 0x18, 0x53, 0xfe, 0x40, 0x90, 0xfe, 0xc2, 0x90,
9703 0x0c, 0x39, 0x18, 0x3a, 0x0c, 0x38, 0x18, 0x4e, 0x09, 0x4a, 0x19, 0x35,
9704 0x2a, 0x13, 0xfe, 0x4e, 0x11, 0x65, 0xfe, 0x48, 0x08, 0xfe, 0x9e, 0xf0,
9705 0xfe, 0x5c, 0x08, 0xb1, 0x16, 0x32, 0x2a, 0x73, 0xdd, 0xb8, 0xfe, 0x80,
9706 0x08, 0xb9, 0xfe, 0x9e, 0x08, 0x8c, 0xfe, 0x74, 0x08, 0xfe, 0x06, 0xf0,
9707 0xfe, 0x7a, 0x08, 0x8d, 0x81, 0x02, 0x22, 0x01, 0x43, 0xfe, 0xc9, 0x10,
9708 0x15, 0x19, 0xfe, 0xc9, 0x10, 0x61, 0x04, 0x06, 0xfe, 0x10, 0x12, 0x61,
9709 0x04, 0x0b, 0x45, 0x09, 0x04, 0x0b, 0xfe, 0x68, 0x12, 0xfe, 0x2e, 0x1c,
9710 0x02, 0xfe, 0x24, 0x0a, 0x61, 0x04, 0x06, 0x45, 0x61, 0x04, 0x0b, 0xfe,
9711 0x52, 0x12, 0xfe, 0x2c, 0x1c, 0xfe, 0xaa, 0xf0, 0xfe, 0x1e, 0x09, 0xfe,
9712 0xac, 0xf0, 0xfe, 0xbe, 0x08, 0xfe, 0x8a, 0x10, 0xaa, 0xfe, 0xf3, 0x10,
9713 0xfe, 0xad, 0xf0, 0xfe, 0xca, 0x08, 0x02, 0xfe, 0x24, 0x0a, 0xab, 0xfe,
9714 0xe7, 0x10, 0xfe, 0x2b, 0xf0, 0x9d, 0xe9, 0x1c, 0xfe, 0x00, 0xfe, 0xfe,
9715 0x1c, 0x12, 0xb5, 0xfe, 0xd2, 0xf0, 0x9d, 0xfe, 0x76, 0x18, 0x1c, 0x1a,
9716 0x16, 0x9d, 0x05, 0xcb, 0x1c, 0x06, 0x16, 0x9d, 0xb8, 0x6d, 0xb9, 0x6d,
9717 0xaa, 0xab, 0xfe, 0xb1, 0x10, 0x70, 0x5e, 0x2b, 0x14, 0x92, 0x01, 0x33,
9718 0x0f, 0xfe, 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x5a, 0x0f, 0x7c, 0x02, 0x5a,
9719 0xfe, 0x74, 0x18, 0x1c, 0xfe, 0x00, 0xf8, 0x16, 0x6d, 0x67, 0x1b, 0x01,
9720 0xfe, 0x44, 0x0d, 0x3b, 0x01, 0xe6, 0x1e, 0x27, 0x74, 0x67, 0x1a, 0x02,
9721 0x6d, 0x09, 0x04, 0x0b, 0x21, 0xfe, 0x06, 0x0a, 0x09, 0x04, 0x6a, 0xfe,
9722 0x82, 0x12, 0x09, 0x04, 0x19, 0xfe, 0x66, 0x13, 0x1e, 0x58, 0xac, 0xfc,
9723 0xfe, 0x83, 0x80, 0xfe, 0xc8, 0x44, 0xfe, 0x2e, 0x13, 0xfe, 0x04, 0x91,
9724 0xfe, 0x86, 0x91, 0x63, 0x27, 0xfe, 0x40, 0x59, 0xfe, 0xc1, 0x59, 0x77,
9725 0xd7, 0x05, 0x54, 0x31, 0x55, 0x0c, 0x7b, 0x18, 0x7c, 0xbe, 0x54, 0xbf,
9726 0x55, 0x01, 0xa8, 0xad, 0x63, 0x27, 0x12, 0x58, 0xc0, 0x38, 0xc1, 0x4e,
9727 0x79, 0x56, 0x68, 0x57, 0xf4, 0xf5, 0xfe, 0x04, 0xfa, 0x38, 0xfe, 0x05,
9728 0xfa, 0x4e, 0x01, 0xa5, 0xa2, 0x23, 0x0c, 0x7b, 0x0c, 0x7c, 0x79, 0x56,
9729 0x68, 0x57, 0xfe, 0x12, 0x10, 0x09, 0x04, 0x19, 0x16, 0xd7, 0x79, 0x39,
9730 0x68, 0x3a, 0x09, 0x04, 0xfe, 0xf7, 0x00, 0x35, 0x05, 0x52, 0x31, 0x53,
9731 0xfe, 0x10, 0x58, 0xfe, 0x91, 0x58, 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59,
9732 0x02, 0x6d, 0x09, 0x04, 0x19, 0x16, 0xd7, 0x09, 0x04, 0xfe, 0xf7, 0x00,
9733 0x35, 0xfe, 0x3a, 0x55, 0xfe, 0x19, 0x81, 0x5f, 0xfe, 0x10, 0x90, 0xfe,
9734 0x92, 0x90, 0xfe, 0xd7, 0x10, 0x2f, 0x07, 0x9b, 0x16, 0xfe, 0xc6, 0x08,
9735 0x11, 0x9b, 0x09, 0x04, 0x0b, 0xfe, 0x14, 0x13, 0x05, 0x39, 0x31, 0x3a,
9736 0x77, 0xfe, 0xc6, 0x08, 0xfe, 0x0c, 0x58, 0xfe, 0x8d, 0x58, 0x02, 0x6d,
9737 0x23, 0x47, 0xfe, 0x19, 0x80, 0xde, 0x09, 0x04, 0x0b, 0xfe, 0x1a, 0x12,
9738 0xfe, 0x6c, 0x19, 0xfe, 0x19, 0x41, 0xe9, 0xb5, 0xfe, 0xd1, 0xf0, 0xd9,
9739 0x14, 0x7a, 0x01, 0x33, 0x0f, 0xfe, 0x44, 0x00, 0xfe, 0x8e, 0x10, 0xfe,
9740 0x6c, 0x19, 0xbe, 0x39, 0xfe, 0xed, 0x19, 0xbf, 0x3a, 0xfe, 0x0c, 0x51,
9741 0xfe, 0x8e, 0x51, 0xe9, 0x1c, 0xfe, 0x00, 0xff, 0x34, 0xfe, 0x74, 0x10,
9742 0xb5, 0xfe, 0xd2, 0xf0, 0xfe, 0xb2, 0x0a, 0xfe, 0x76, 0x18, 0x1c, 0x1a,
9743 0x84, 0x05, 0xcb, 0x1c, 0x06, 0xfe, 0x08, 0x13, 0x0f, 0xfe, 0x16, 0x00,
9744 0x02, 0x5a, 0xfe, 0xd1, 0xf0, 0xfe, 0xc4, 0x0a, 0x14, 0x7a, 0x01, 0x33,
9745 0x0f, 0xfe, 0x17, 0x00, 0xfe, 0x42, 0x10, 0xfe, 0xce, 0xf0, 0xfe, 0xca,
9746 0x0a, 0xfe, 0x3c, 0x10, 0xfe, 0xcd, 0xf0, 0xfe, 0xd6, 0x0a, 0x0f, 0xfe,
9747 0x22, 0x00, 0x02, 0x5a, 0xfe, 0xcb, 0xf0, 0xfe, 0xe2, 0x0a, 0x0f, 0xfe,
9748 0x24, 0x00, 0x02, 0x5a, 0xfe, 0xd0, 0xf0, 0xfe, 0xec, 0x0a, 0x0f, 0x93,
9749 0xdc, 0xfe, 0xcf, 0xf0, 0xfe, 0xf6, 0x0a, 0x0f, 0x4c, 0xfe, 0x10, 0x10,
9750 0xfe, 0xcc, 0xf0, 0xd9, 0x61, 0x04, 0x19, 0x3b, 0x0f, 0xfe, 0x12, 0x00,
9751 0x2a, 0x13, 0xfe, 0x4e, 0x11, 0x65, 0xfe, 0x0c, 0x0b, 0xfe, 0x9e, 0xf0,
9752 0xfe, 0x20, 0x0b, 0xb1, 0x16, 0x32, 0x2a, 0x73, 0xdd, 0xb8, 0x22, 0xb9,
9753 0x22, 0x2a, 0xec, 0x65, 0xfe, 0x2c, 0x0b, 0x25, 0x32, 0x8c, 0xfe, 0x48,
9754 0x0b, 0x8d, 0x81, 0xb8, 0xd4, 0xb9, 0xd4, 0x02, 0x22, 0x01, 0x43, 0xfe,
9755 0xdb, 0x10, 0x11, 0xfe, 0xe8, 0x00, 0xaa, 0xab, 0x70, 0xbc, 0x7d, 0xbd,
9756 0x7f, 0xfe, 0x89, 0xf0, 0x22, 0x30, 0x2e, 0xd8, 0xbc, 0x7d, 0xbd, 0x7f,
9757 0x01, 0x08, 0x1f, 0x22, 0x30, 0x2e, 0xd6, 0xb1, 0x45, 0x0f, 0xfe, 0x42,
9758 0x00, 0x02, 0x5a, 0x78, 0x06, 0xfe, 0x81, 0x49, 0x16, 0xfe, 0x38, 0x0c,
9759 0x09, 0x04, 0x0b, 0xfe, 0x44, 0x13, 0x0f, 0x00, 0x4b, 0x0b, 0xfe, 0x54,
9760 0x12, 0x4b, 0xfe, 0x28, 0x00, 0x21, 0xfe, 0xa6, 0x0c, 0x0a, 0x40, 0x01,
9761 0x0e, 0x07, 0x00, 0x5d, 0x3e, 0xfe, 0x28, 0x00, 0xfe, 0xe2, 0x10, 0x01,
9762 0xe7, 0x01, 0xe8, 0x0a, 0x99, 0x01, 0xfe, 0x32, 0x0e, 0x59, 0x11, 0x2d,
9763 0x01, 0x6f, 0x02, 0x29, 0x0f, 0xfe, 0x44, 0x00, 0x4b, 0x0b, 0xdf, 0x3e,
9764 0x0b, 0xfe, 0xb4, 0x10, 0x01, 0x86, 0x3e, 0x0b, 0xfe, 0xaa, 0x10, 0x01,
9765 0x86, 0xfe, 0x19, 0x82, 0xfe, 0x34, 0x46, 0xa3, 0x3e, 0x0b, 0x0f, 0xfe,
9766 0x43, 0x00, 0xfe, 0x96, 0x10, 0x09, 0x4a, 0x0b, 0x35, 0x01, 0xe7, 0x01,
9767 0xe8, 0x59, 0x11, 0x2d, 0x01, 0x6f, 0x67, 0x0b, 0x59, 0x3c, 0x8a, 0x02,
9768 0xfe, 0x2a, 0x03, 0x09, 0x04, 0x0b, 0x84, 0x3e, 0x0b, 0x0f, 0x00, 0xfe,
9769 0x5c, 0x10, 0x61, 0x04, 0x1b, 0xfe, 0x58, 0x12, 0x09, 0x04, 0x1b, 0xfe,
9770 0x50, 0x13, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x5c, 0x0c, 0xfe,
9771 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x62, 0x0c, 0x09, 0x4a, 0x1b, 0x35,
9772 0xfe, 0xa9, 0x10, 0x0f, 0xfe, 0x15, 0x00, 0xfe, 0x04, 0xe6, 0x0b, 0x5f,
9773 0x5c, 0x0f, 0xfe, 0x13, 0x00, 0xfe, 0x10, 0x10, 0x0f, 0xfe, 0x47, 0x00,
9774 0xa1, 0x0f, 0xfe, 0x41, 0x00, 0xa0, 0x0f, 0xfe, 0x24, 0x00, 0x87, 0xaa,
9775 0xab, 0x70, 0x05, 0x6b, 0x28, 0x21, 0xd1, 0x5f, 0xfe, 0x04, 0xe6, 0x1b,
9776 0xfe, 0x9d, 0x41, 0xfe, 0x1c, 0x42, 0x59, 0x01, 0xda, 0x02, 0x29, 0xea,
9777 0x14, 0x0b, 0x37, 0x95, 0xa9, 0x14, 0xfe, 0x31, 0x00, 0x37, 0x97, 0x01,
9778 0xfe, 0x54, 0x0f, 0x02, 0xd0, 0x3c, 0xfe, 0x06, 0xec, 0xc9, 0xee, 0x3e,
9779 0x1d, 0xfe, 0xce, 0x45, 0x34, 0x3c, 0xfe, 0x06, 0xea, 0xc9, 0xfe, 0x47,
9780 0x4b, 0x89, 0xfe, 0x75, 0x57, 0x05, 0x51, 0xfe, 0x98, 0x56, 0xfe, 0x38,
9781 0x12, 0x0a, 0x42, 0x01, 0x0e, 0xfe, 0x44, 0x48, 0x46, 0x09, 0x04, 0x1d,
9782 0xfe, 0x1a, 0x13, 0x0a, 0x40, 0x01, 0x0e, 0x47, 0xfe, 0x41, 0x58, 0x0a,
9783 0x99, 0x01, 0x0e, 0xfe, 0x49, 0x54, 0x8e, 0xfe, 0x2a, 0x0d, 0x02, 0xfe,
9784 0x2a, 0x03, 0x0a, 0x51, 0xfe, 0xee, 0x14, 0xee, 0x3e, 0x1d, 0xfe, 0xce,
9785 0x45, 0x34, 0x3c, 0xfe, 0xce, 0x47, 0xfe, 0xad, 0x13, 0x02, 0x29, 0x1e,
9786 0x20, 0x07, 0x10, 0xfe, 0x9e, 0x12, 0x23, 0x12, 0x4d, 0x12, 0x94, 0x12,
9787 0xce, 0x1e, 0x2d, 0x47, 0x37, 0x2d, 0xb1, 0xe0, 0xfe, 0xbc, 0xf0, 0xfe,
9788 0xec, 0x0d, 0x13, 0x06, 0x12, 0x4d, 0x01, 0xfe, 0xe2, 0x15, 0x05, 0xfe,
9789 0x38, 0x01, 0x31, 0xfe, 0x3a, 0x01, 0x77, 0xfe, 0xf0, 0x0d, 0xfe, 0x02,
9790 0xec, 0xce, 0x62, 0x00, 0x5d, 0xfe, 0x04, 0xec, 0x20, 0x46, 0xfe, 0x05,
9791 0xf6, 0xfe, 0x34, 0x01, 0x01, 0xfe, 0x52, 0x16, 0xfb, 0xfe, 0x48, 0xf4,
9792 0x0d, 0xfe, 0x18, 0x13, 0xaf, 0xfe, 0x02, 0xea, 0xce, 0x62, 0x7a, 0xfe,
9793 0xc5, 0x13, 0x14, 0x1b, 0x37, 0x95, 0xa9, 0x5c, 0x05, 0xfe, 0x38, 0x01,
9794 0x1c, 0xfe, 0xf0, 0xff, 0x0c, 0xfe, 0x60, 0x01, 0x05, 0xfe, 0x3a, 0x01,
9795 0x0c, 0xfe, 0x62, 0x01, 0x3d, 0x12, 0x20, 0x24, 0x06, 0x12, 0x2d, 0x11,
9796 0x2d, 0x8a, 0x13, 0x06, 0x03, 0x23, 0x03, 0x1e, 0x4d, 0xfe, 0xf7, 0x12,
9797 0x1e, 0x94, 0xac, 0x12, 0x94, 0x07, 0x7a, 0xfe, 0x71, 0x13, 0xfe, 0x24,
9798 0x1c, 0x14, 0x1a, 0x37, 0x95, 0xa9, 0xfe, 0xd9, 0x10, 0xb6, 0xfe, 0x03,
9799 0xdc, 0xfe, 0x73, 0x57, 0xfe, 0x80, 0x5d, 0x03, 0xb6, 0xfe, 0x03, 0xdc,
9800 0xfe, 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x03, 0xfe, 0x03, 0x57, 0xb6, 0x23,
9801 0xfe, 0x00, 0xcc, 0x03, 0xfe, 0x03, 0x57, 0xb6, 0x75, 0x03, 0x09, 0x04,
9802 0x4c, 0xfe, 0x22, 0x13, 0xfe, 0x1c, 0x80, 0x07, 0x06, 0xfe, 0x1a, 0x13,
9803 0xfe, 0x1e, 0x80, 0xe1, 0xfe, 0x1d, 0x80, 0xa4, 0xfe, 0x0c, 0x90, 0xfe,
9804 0x0e, 0x13, 0xfe, 0x0e, 0x90, 0xa3, 0xfe, 0x3c, 0x90, 0xfe, 0x30, 0xf4,
9805 0x0b, 0xfe, 0x3c, 0x50, 0xa0, 0x01, 0xfe, 0x82, 0x16, 0x2f, 0x07, 0x2d,
9806 0xe0, 0x01, 0xfe, 0xbc, 0x15, 0x09, 0x04, 0x1d, 0x45, 0x01, 0xe7, 0x01,
9807 0xe8, 0x11, 0xfe, 0xe9, 0x00, 0x09, 0x04, 0x4c, 0xfe, 0x2c, 0x13, 0x01,
9808 0xfe, 0x14, 0x16, 0xfe, 0x1e, 0x1c, 0xfe, 0x14, 0x90, 0xfe, 0x96, 0x90,
9809 0x0c, 0xfe, 0x64, 0x01, 0x18, 0xfe, 0x66, 0x01, 0x09, 0x04, 0x4f, 0xfe,
9810 0x12, 0x12, 0xfe, 0x03, 0x80, 0x74, 0xfe, 0x01, 0xec, 0x20, 0xfe, 0x80,
9811 0x40, 0x12, 0x20, 0x63, 0x27, 0x11, 0xc8, 0x59, 0x1e, 0x20, 0xed, 0x76,
9812 0x20, 0x03, 0xfe, 0x08, 0x1c, 0x05, 0xfe, 0xac, 0x00, 0xfe, 0x06, 0x58,
9813 0x05, 0xfe, 0xae, 0x00, 0xfe, 0x07, 0x58, 0x05, 0xfe, 0xb0, 0x00, 0xfe,
9814 0x08, 0x58, 0x05, 0xfe, 0xb2, 0x00, 0xfe, 0x09, 0x58, 0xfe, 0x0a, 0x1c,
9815 0x24, 0x69, 0x12, 0xc9, 0x23, 0x0c, 0x50, 0x0c, 0x3f, 0x13, 0x40, 0x48,
9816 0x5f, 0x17, 0x1d, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x21, 0xfe, 0x08,
9817 0x0f, 0x3e, 0x10, 0x13, 0x42, 0x48, 0x17, 0x4c, 0xfe, 0x90, 0x4d, 0xfe,
9818 0x91, 0x54, 0x21, 0xfe, 0x1e, 0x0f, 0x24, 0x10, 0x12, 0x20, 0x78, 0x2c,
9819 0x46, 0x1e, 0x20, 0xed, 0x76, 0x20, 0x11, 0xc8, 0xf6, 0xfe, 0xd6, 0xf0,
9820 0xfe, 0x32, 0x0f, 0xea, 0x70, 0xfe, 0x14, 0x1c, 0xfe, 0x10, 0x1c, 0xfe,
9821 0x18, 0x1c, 0x03, 0x3c, 0xfe, 0x0c, 0x14, 0xee, 0xfe, 0x07, 0xe6, 0x1d,
9822 0xfe, 0xce, 0x47, 0xfe, 0xf5, 0x13, 0x03, 0x01, 0x86, 0x78, 0x2c, 0x46,
9823 0xfa, 0xef, 0xfe, 0x42, 0x13, 0x2f, 0x07, 0x2d, 0xfe, 0x34, 0x13, 0x0a,
9824 0x42, 0x01, 0x0e, 0xb0, 0xfe, 0x36, 0x12, 0xf0, 0xfe, 0x45, 0x48, 0x01,
9825 0xe3, 0xfe, 0x00, 0xcc, 0xb0, 0xfe, 0xf3, 0x13, 0x3d, 0x75, 0x07, 0x10,
9826 0xa3, 0x0a, 0x80, 0x01, 0x0e, 0xfe, 0x80, 0x5c, 0x01, 0x6f, 0xfe, 0x0e,
9827 0x10, 0x07, 0x7e, 0x45, 0xf6, 0xfe, 0xd6, 0xf0, 0xfe, 0x6c, 0x0f, 0x03,
9828 0xfe, 0x44, 0x58, 0x74, 0xfe, 0x01, 0xec, 0x97, 0xfe, 0x9e, 0x40, 0xfe,
9829 0x9d, 0xe7, 0x00, 0xfe, 0x9c, 0xe7, 0x1b, 0x76, 0x27, 0x01, 0xda, 0xfe,
9830 0xdd, 0x10, 0x2a, 0xbc, 0x7d, 0xbd, 0x7f, 0x30, 0x2e, 0xd5, 0x07, 0x1b,
9831 0xfe, 0x48, 0x12, 0x07, 0x0b, 0xfe, 0x56, 0x12, 0x07, 0x1a, 0xfe, 0x30,
9832 0x12, 0x07, 0xc2, 0x16, 0xfe, 0x3e, 0x11, 0x07, 0xfe, 0x23, 0x00, 0x16,
9833 0xfe, 0x4a, 0x11, 0x07, 0x06, 0x16, 0xfe, 0xa8, 0x11, 0x07, 0x19, 0xfe,
9834 0x12, 0x12, 0x07, 0x00, 0x16, 0x22, 0x14, 0xc2, 0x01, 0x33, 0x9f, 0x2b,
9835 0x01, 0x08, 0x8c, 0x43, 0x03, 0x2b, 0xfe, 0x62, 0x08, 0x0a, 0xca, 0x01,
9836 0xfe, 0x32, 0x0e, 0x11, 0x7e, 0x02, 0x29, 0x2b, 0x2f, 0x07, 0x9b, 0xfe,
9837 0xd9, 0x13, 0x79, 0x39, 0x68, 0x3a, 0x77, 0xfe, 0xfc, 0x10, 0x09, 0x04,
9838 0x6a, 0xfe, 0x72, 0x12, 0xc0, 0x38, 0xc1, 0x4e, 0xf4, 0xf5, 0x8e, 0xfe,
9839 0xc6, 0x10, 0x1e, 0x58, 0xfe, 0x26, 0x13, 0x05, 0x7b, 0x31, 0x7c, 0x77,
9840 0xfe, 0x82, 0x0c, 0x0c, 0x54, 0x18, 0x55, 0x23, 0x0c, 0x7b, 0x0c, 0x7c,
9841 0x01, 0xa8, 0x24, 0x69, 0x73, 0x12, 0x58, 0x01, 0xa5, 0xc0, 0x38, 0xc1,
9842 0x4e, 0xfe, 0x04, 0x55, 0xfe, 0xa5, 0x55, 0xfe, 0x04, 0xfa, 0x38, 0xfe,
9843 0x05, 0xfa, 0x4e, 0xfe, 0x91, 0x10, 0x05, 0x56, 0x31, 0x57, 0xfe, 0x40,
9844 0x56, 0xfe, 0xe1, 0x56, 0x0c, 0x56, 0x18, 0x57, 0x83, 0xc0, 0x38, 0xc1,
9845 0x4e, 0xf4, 0xf5, 0x05, 0x52, 0x31, 0x53, 0xfe, 0x00, 0x56, 0xfe, 0xa1,
9846 0x56, 0x0c, 0x52, 0x18, 0x53, 0x09, 0x04, 0x6a, 0xfe, 0x1e, 0x12, 0x1e,
9847 0x58, 0xfe, 0x1f, 0x40, 0x05, 0x54, 0x31, 0x55, 0xfe, 0x2c, 0x50, 0xfe,
9848 0xae, 0x50, 0x05, 0x56, 0x31, 0x57, 0xfe, 0x44, 0x50, 0xfe, 0xc6, 0x50,
9849 0x05, 0x52, 0x31, 0x53, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0x05, 0x39,
9850 0x31, 0x3a, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x02, 0x5c, 0x24, 0x06,
9851 0x12, 0xcd, 0x02, 0x5b, 0x2b, 0x01, 0x08, 0x1f, 0x44, 0x30, 0x2e, 0xd5,
9852 0x07, 0x06, 0x21, 0x44, 0x2f, 0x07, 0x9b, 0x21, 0x5b, 0x01, 0x6e, 0x1c,
9853 0x3d, 0x16, 0x44, 0x09, 0x04, 0x0b, 0xe2, 0x79, 0x39, 0x68, 0x3a, 0xfe,
9854 0x0a, 0x55, 0x34, 0xfe, 0x8b, 0x55, 0xbe, 0x39, 0xbf, 0x3a, 0xfe, 0x0c,
9855 0x51, 0xfe, 0x8e, 0x51, 0x02, 0x5b, 0xfe, 0x19, 0x81, 0xaf, 0xfe, 0x19,
9856 0x41, 0x02, 0x5b, 0x2b, 0x01, 0x08, 0x25, 0x32, 0x1f, 0xa2, 0x30, 0x2e,
9857 0xd8, 0x4b, 0x1a, 0xfe, 0xa6, 0x12, 0x4b, 0x0b, 0x3b, 0x02, 0x44, 0x01,
9858 0x08, 0x25, 0x32, 0x1f, 0xa2, 0x30, 0x2e, 0xd6, 0x07, 0x1a, 0x21, 0x44,
9859 0x01, 0x08, 0x1f, 0xa2, 0x30, 0x2e, 0xfe, 0xe8, 0x09, 0xfe, 0xc2, 0x49,
9860 0x60, 0x05, 0xfe, 0x9c, 0x00, 0x28, 0x84, 0x49, 0x04, 0x19, 0x34, 0x9f,
9861 0xfe, 0xbb, 0x45, 0x4b, 0x00, 0x45, 0x3e, 0x06, 0x78, 0x3d, 0xfe, 0xda,
9862 0x14, 0x01, 0x6e, 0x87, 0xfe, 0x4b, 0x45, 0xe2, 0x2f, 0x07, 0x9a, 0xe1,
9863 0x05, 0xc6, 0x28, 0x84, 0x05, 0x3f, 0x28, 0x34, 0x5e, 0x02, 0x5b, 0xfe,
9864 0xc0, 0x5d, 0xfe, 0xf8, 0x14, 0xfe, 0x03, 0x17, 0x05, 0x50, 0xb4, 0x0c,
9865 0x50, 0x5e, 0x2b, 0x01, 0x08, 0x26, 0x5c, 0x01, 0xfe, 0xaa, 0x14, 0x02,
9866 0x5c, 0x01, 0x08, 0x25, 0x32, 0x1f, 0x44, 0x30, 0x2e, 0xd6, 0x07, 0x06,
9867 0x21, 0x44, 0x01, 0xfe, 0x8e, 0x13, 0xfe, 0x42, 0x58, 0xfe, 0x82, 0x14,
9868 0xfe, 0xa4, 0x14, 0x87, 0xfe, 0x4a, 0xf4, 0x0b, 0x16, 0x44, 0xfe, 0x4a,
9869 0xf4, 0x06, 0xfe, 0x0c, 0x12, 0x2f, 0x07, 0x9a, 0x85, 0x02, 0x5b, 0x05,
9870 0x3f, 0xb4, 0x0c, 0x3f, 0x5e, 0x2b, 0x01, 0x08, 0x26, 0x5c, 0x01, 0xfe,
9871 0xd8, 0x14, 0x02, 0x5c, 0x13, 0x06, 0x65, 0xfe, 0xca, 0x12, 0x26, 0xfe,
9872 0xe0, 0x12, 0x72, 0xf1, 0x01, 0x08, 0x23, 0x72, 0x03, 0x8f, 0xfe, 0xdc,
9873 0x12, 0x25, 0xfe, 0xdc, 0x12, 0x1f, 0xfe, 0xca, 0x12, 0x5e, 0x2b, 0x01,
9874 0x08, 0xfe, 0xd5, 0x10, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b,
9875 0x1c, 0xfe, 0xff, 0x7f, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x03, 0x13,
9876 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, 0x1c, 0x3d, 0xfe, 0x30, 0x56,
9877 0xfe, 0x00, 0x5c, 0x03, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b,
9878 0x03, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, 0xfe, 0x0b, 0x58,
9879 0x03, 0x0a, 0x50, 0x01, 0x82, 0x0a, 0x3f, 0x01, 0x82, 0x03, 0xfc, 0x1c,
9880 0x10, 0xff, 0x03, 0x00, 0x54, 0xfe, 0x00, 0xf4, 0x19, 0x48, 0xfe, 0x00,
9881 0x7d, 0xfe, 0x01, 0x7d, 0xfe, 0x02, 0x7d, 0xfe, 0x03, 0x7c, 0x63, 0x27,
9882 0x0c, 0x52, 0x18, 0x53, 0xbe, 0x56, 0xbf, 0x57, 0x03, 0xfe, 0x62, 0x08,
9883 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x74, 0x03, 0x01,
9884 0xfe, 0x14, 0x18, 0xfe, 0x42, 0x48, 0x5f, 0x60, 0x89, 0x01, 0x08, 0x1f,
9885 0xfe, 0xa2, 0x14, 0x30, 0x2e, 0xd8, 0x01, 0x08, 0x1f, 0xfe, 0xa2, 0x14,
9886 0x30, 0x2e, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59, 0x05, 0xc6, 0x28, 0xfe,
9887 0xcc, 0x12, 0x49, 0x04, 0x1b, 0xfe, 0xc4, 0x13, 0x23, 0x62, 0x1b, 0xe2,
9888 0x4b, 0xc3, 0x64, 0xfe, 0xe8, 0x13, 0x3b, 0x13, 0x06, 0x17, 0xc3, 0x78,
9889 0xdb, 0xfe, 0x78, 0x10, 0xff, 0x02, 0x83, 0x55, 0xa1, 0xff, 0x02, 0x83,
9890 0x55, 0x62, 0x1a, 0xa4, 0xbb, 0xfe, 0x30, 0x00, 0x8e, 0xe4, 0x17, 0x2c,
9891 0x13, 0x06, 0xfe, 0x56, 0x10, 0x62, 0x0b, 0xe1, 0xbb, 0xfe, 0x64, 0x00,
9892 0x8e, 0xe4, 0x0a, 0xfe, 0x64, 0x00, 0x17, 0x93, 0x13, 0x06, 0xfe, 0x28,
9893 0x10, 0x62, 0x06, 0xfe, 0x60, 0x13, 0xbb, 0xfe, 0xc8, 0x00, 0x8e, 0xe4,
9894 0x0a, 0xfe, 0xc8, 0x00, 0x17, 0x4d, 0x13, 0x06, 0x83, 0xbb, 0xfe, 0x90,
9895 0x01, 0xba, 0xfe, 0x4e, 0x14, 0x89, 0xfe, 0x12, 0x10, 0xfe, 0x43, 0xf4,
9896 0x94, 0xfe, 0x56, 0xf0, 0xfe, 0x60, 0x14, 0xfe, 0x04, 0xf4, 0x6c, 0xfe,
9897 0x43, 0xf4, 0x93, 0xfe, 0xf3, 0x10, 0xf9, 0x01, 0xfe, 0x22, 0x13, 0x1c,
9898 0x3d, 0xfe, 0x10, 0x13, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4, 0x69, 0xba,
9899 0xfe, 0x9c, 0x14, 0xb7, 0x69, 0xfe, 0x1c, 0x10, 0xfe, 0x00, 0x17, 0xfe,
9900 0x4d, 0xe4, 0x19, 0xba, 0xfe, 0x9c, 0x14, 0xb7, 0x19, 0x83, 0x60, 0x23,
9901 0xfe, 0x4d, 0xf4, 0x00, 0xdf, 0x89, 0x13, 0x06, 0xfe, 0xb4, 0x56, 0xfe,
9902 0xc3, 0x58, 0x03, 0x60, 0x13, 0x0b, 0x03, 0x15, 0x06, 0x01, 0x08, 0x26,
9903 0xe5, 0x15, 0x0b, 0x01, 0x08, 0x26, 0xe5, 0x15, 0x1a, 0x01, 0x08, 0x26,
9904 0xe5, 0x72, 0xfe, 0x89, 0x49, 0x01, 0x08, 0x03, 0x15, 0x06, 0x01, 0x08,
9905 0x26, 0xa6, 0x15, 0x1a, 0x01, 0x08, 0x26, 0xa6, 0x15, 0x06, 0x01, 0x08,
9906 0x26, 0xa6, 0xfe, 0x89, 0x49, 0x01, 0x08, 0x26, 0xa6, 0x72, 0xfe, 0x89,
9907 0x4a, 0x01, 0x08, 0x03, 0x60, 0x03, 0x1e, 0xcc, 0x07, 0x06, 0xfe, 0x44,
9908 0x13, 0xad, 0x12, 0xcc, 0xfe, 0x49, 0xf4, 0x00, 0x3b, 0x72, 0x9f, 0x5e,
9909 0xfe, 0x01, 0xec, 0xfe, 0x27, 0x01, 0xf1, 0x01, 0x08, 0x2f, 0x07, 0xfe,
9910 0xe3, 0x00, 0xfe, 0x20, 0x13, 0x1f, 0xfe, 0x5a, 0x15, 0x23, 0x12, 0xcd,
9911 0x01, 0x43, 0x1e, 0xcd, 0x07, 0x06, 0x45, 0x09, 0x4a, 0x06, 0x35, 0x03,
9912 0x0a, 0x42, 0x01, 0x0e, 0xed, 0x88, 0x07, 0x10, 0xa4, 0x0a, 0x80, 0x01,
9913 0x0e, 0x88, 0x0a, 0x51, 0x01, 0x9e, 0x03, 0x0a, 0x80, 0x01, 0x0e, 0x88,
9914 0xfe, 0x80, 0xe7, 0x10, 0x07, 0x10, 0x84, 0xfe, 0x45, 0x58, 0x01, 0xe3,
9915 0x88, 0x03, 0x0a, 0x42, 0x01, 0x0e, 0x88, 0x0a, 0x51, 0x01, 0x9e, 0x03,
9916 0x0a, 0x42, 0x01, 0x0e, 0xfe, 0x80, 0x80, 0xf2, 0xfe, 0x49, 0xe4, 0x10,
9917 0xa4, 0x0a, 0x80, 0x01, 0x0e, 0xf2, 0x0a, 0x51, 0x01, 0x82, 0x03, 0x17,
9918 0x10, 0x71, 0x66, 0xfe, 0x60, 0x01, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde,
9919 0xfe, 0x24, 0x1c, 0xfe, 0x1d, 0xf7, 0x1d, 0x90, 0xfe, 0xf6, 0x15, 0x01,
9920 0xfe, 0xfc, 0x16, 0xe0, 0x91, 0x1d, 0x66, 0xfe, 0x2c, 0x01, 0xfe, 0x2f,
9921 0x19, 0x03, 0xae, 0x21, 0xfe, 0xe6, 0x15, 0xfe, 0xda, 0x10, 0x17, 0x10,
9922 0x71, 0x05, 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x19, 0xfe, 0x18, 0x58,
9923 0x05, 0xfe, 0x66, 0x01, 0xfe, 0x19, 0x58, 0x91, 0x19, 0xfe, 0x3c, 0x90,
9924 0xfe, 0x30, 0xf4, 0x06, 0xfe, 0x3c, 0x50, 0x66, 0xfe, 0x38, 0x00, 0xfe,
9925 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0x19, 0x90, 0xfe, 0x40, 0x16, 0xfe, 0xb6,
9926 0x14, 0x34, 0x03, 0xae, 0x21, 0xfe, 0x18, 0x16, 0xfe, 0x9c, 0x10, 0x17,
9927 0x10, 0x71, 0xfe, 0x83, 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe,
9928 0x1d, 0xf7, 0x38, 0x90, 0xfe, 0x62, 0x16, 0xfe, 0x94, 0x14, 0xfe, 0x10,
9929 0x13, 0x91, 0x38, 0x66, 0x1b, 0xfe, 0xaf, 0x19, 0xfe, 0x98, 0xe7, 0x00,
9930 0x03, 0xae, 0x21, 0xfe, 0x56, 0x16, 0xfe, 0x6c, 0x10, 0x17, 0x10, 0x71,
9931 0xfe, 0x30, 0xbc, 0xfe, 0xb2, 0xbc, 0x91, 0xc5, 0x66, 0x1b, 0xfe, 0x0f,
9932 0x79, 0xfe, 0x1c, 0xf7, 0xc5, 0x90, 0xfe, 0x9a, 0x16, 0xfe, 0x5c, 0x14,
9933 0x34, 0x03, 0xae, 0x21, 0xfe, 0x86, 0x16, 0xfe, 0x42, 0x10, 0xfe, 0x02,
9934 0xf6, 0x10, 0x71, 0xfe, 0x18, 0xfe, 0x54, 0xfe, 0x19, 0xfe, 0x55, 0xfc,
9935 0xfe, 0x1d, 0xf7, 0x4f, 0x90, 0xfe, 0xc0, 0x16, 0xfe, 0x36, 0x14, 0xfe,
9936 0x1c, 0x13, 0x91, 0x4f, 0x47, 0xfe, 0x83, 0x58, 0xfe, 0xaf, 0x19, 0xfe,
9937 0x80, 0xe7, 0x10, 0xfe, 0x81, 0xe7, 0x10, 0x11, 0xfe, 0xdd, 0x00, 0x63,
9938 0x27, 0x03, 0x63, 0x27, 0xfe, 0x12, 0x45, 0x21, 0xfe, 0xb0, 0x16, 0x14,
9939 0x06, 0x37, 0x95, 0xa9, 0x02, 0x29, 0xfe, 0x39, 0xf0, 0xfe, 0x04, 0x17,
9940 0x23, 0x03, 0xfe, 0x7e, 0x18, 0x1c, 0x1a, 0x5d, 0x13, 0x0d, 0x03, 0x71,
9941 0x05, 0xcb, 0x1c, 0x06, 0xfe, 0xef, 0x12, 0xfe, 0xe1, 0x10, 0x78, 0x2c,
9942 0x46, 0x2f, 0x07, 0x2d, 0xfe, 0x3c, 0x13, 0xfe, 0x82, 0x14, 0xfe, 0x42,
9943 0x13, 0x3c, 0x8a, 0x0a, 0x42, 0x01, 0x0e, 0xb0, 0xfe, 0x3e, 0x12, 0xf0,
9944 0xfe, 0x45, 0x48, 0x01, 0xe3, 0xfe, 0x00, 0xcc, 0xb0, 0xfe, 0xf3, 0x13,
9945 0x3d, 0x75, 0x07, 0x10, 0xa3, 0x0a, 0x80, 0x01, 0x0e, 0xf2, 0x01, 0x6f,
9946 0xfe, 0x16, 0x10, 0x07, 0x7e, 0x85, 0xfe, 0x40, 0x14, 0xfe, 0x24, 0x12,
9947 0xf6, 0xfe, 0xd6, 0xf0, 0xfe, 0x24, 0x17, 0x17, 0x0b, 0x03, 0xfe, 0x9c,
9948 0xe7, 0x0b, 0x0f, 0xfe, 0x15, 0x00, 0x59, 0x76, 0x27, 0x01, 0xda, 0x17,
9949 0x06, 0x03, 0x3c, 0x8a, 0x09, 0x4a, 0x1d, 0x35, 0x11, 0x2d, 0x01, 0x6f,
9950 0x17, 0x06, 0x03, 0xfe, 0x38, 0x90, 0xfe, 0xba, 0x90, 0x79, 0xc7, 0x68,
9951 0xc8, 0xfe, 0x48, 0x55, 0x34, 0xfe, 0xc9, 0x55, 0x03, 0x1e, 0x98, 0x73,
9952 0x12, 0x98, 0x03, 0x0a, 0x99, 0x01, 0x0e, 0xf0, 0x0a, 0x40, 0x01, 0x0e,
9953 0xfe, 0x49, 0x44, 0x16, 0xfe, 0xf0, 0x17, 0x73, 0x75, 0x03, 0x0a, 0x42,
9954 0x01, 0x0e, 0x07, 0x10, 0x45, 0x0a, 0x51, 0x01, 0x9e, 0x0a, 0x40, 0x01,
9955 0x0e, 0x73, 0x75, 0x03, 0xfe, 0x4e, 0xe4, 0x1a, 0x64, 0xfe, 0x24, 0x18,
9956 0x05, 0xfe, 0x90, 0x00, 0xfe, 0x3a, 0x45, 0x5b, 0xfe, 0x4e, 0xe4, 0xc2,
9957 0x64, 0xfe, 0x36, 0x18, 0x05, 0xfe, 0x92, 0x00, 0xfe, 0x02, 0xe6, 0x1b,
9958 0xdc, 0xfe, 0x4e, 0xe4, 0xfe, 0x0b, 0x00, 0x64, 0xfe, 0x48, 0x18, 0x05,
9959 0xfe, 0x94, 0x00, 0xfe, 0x02, 0xe6, 0x19, 0xfe, 0x08, 0x10, 0x05, 0xfe,
9960 0x96, 0x00, 0xfe, 0x02, 0xe6, 0x2c, 0xfe, 0x4e, 0x45, 0xfe, 0x0c, 0x12,
9961 0xaf, 0xff, 0x04, 0x68, 0x54, 0xde, 0x1c, 0x69, 0x03, 0x07, 0x7a, 0xfe,
9962 0x5a, 0xf0, 0xfe, 0x74, 0x18, 0x24, 0xfe, 0x09, 0x00, 0xfe, 0x34, 0x10,
9963 0x07, 0x1b, 0xfe, 0x5a, 0xf0, 0xfe, 0x82, 0x18, 0x24, 0xc3, 0xfe, 0x26,
9964 0x10, 0x07, 0x1a, 0x5d, 0x24, 0x2c, 0xdc, 0x07, 0x0b, 0x5d, 0x24, 0x93,
9965 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x5d, 0x24, 0x4d, 0x9f, 0xad, 0x03, 0x14,
9966 0xfe, 0x09, 0x00, 0x01, 0x33, 0xfe, 0x04, 0xfe, 0x7d, 0x05, 0x7f, 0xf9,
9967 0x03, 0x25, 0xfe, 0xca, 0x18, 0xfe, 0x14, 0xf0, 0x08, 0x65, 0xfe, 0xc6,
9968 0x18, 0x03, 0xff, 0x1a, 0x00, 0x00,
9971 static unsigned short _adv_asc3550_size = sizeof(_adv_asc3550_buf); /* 0x13AD */
9972 static ADV_DCNT _adv_asc3550_chksum = 0x04D52DDDUL; /* Expanded little-endian checksum. */
9974 /* Microcode buffer is kept after initialization for error recovery. */
9975 static unsigned char _adv_asc38C0800_buf[] = {
9976 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0xfc, 0x00, 0x16, 0x18, 0xe4,
9977 0x01, 0x00, 0x48, 0xe4, 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00, 0xce, 0x19,
9978 0x00, 0xfa, 0xff, 0xff, 0x1c, 0x0f, 0x00, 0xf6, 0x9e, 0xe7, 0xff, 0x00,
9979 0x82, 0xe7, 0x00, 0xea, 0x01, 0xfa, 0x01, 0xe6, 0x09, 0xe7, 0x55, 0xf0,
9980 0x01, 0xf6, 0x03, 0x00, 0x04, 0x00, 0x10, 0x00, 0x1e, 0xf0, 0x85, 0xf0,
9981 0x18, 0xf4, 0x08, 0x00, 0xbc, 0x00, 0x38, 0x54, 0x00, 0xec, 0xd5, 0xf0,
9982 0x82, 0x0d, 0x00, 0xe6, 0x86, 0xf0, 0xb1, 0xf0, 0x98, 0x57, 0x01, 0xfc,
9983 0xb4, 0x00, 0xd4, 0x01, 0x0c, 0x1c, 0x3e, 0x1c, 0x3c, 0x00, 0xbb, 0x00,
9984 0x00, 0x10, 0xba, 0x19, 0x02, 0x80, 0x32, 0xf0, 0x7c, 0x0d, 0x02, 0x13,
9985 0xba, 0x13, 0x18, 0x40, 0x00, 0x57, 0x01, 0xea, 0x02, 0xfc, 0x03, 0xfc,
9986 0x3e, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x74, 0x01, 0x76, 0x01, 0xb9, 0x54,
9987 0x3e, 0x57, 0x00, 0x80, 0x03, 0xe6, 0xb6, 0x00, 0xc0, 0x00, 0x01, 0x01,
9988 0x3e, 0x01, 0x7a, 0x01, 0xca, 0x08, 0xce, 0x10, 0x16, 0x11, 0x04, 0x12,
9989 0x08, 0x12, 0x02, 0x4a, 0xbb, 0x55, 0x3c, 0x56, 0x03, 0x58, 0x1b, 0x80,
9990 0x30, 0xe4, 0x4b, 0xe4, 0x5d, 0xf0, 0x02, 0xfa, 0x20, 0x00, 0x32, 0x00,
9991 0x40, 0x00, 0x80, 0x00, 0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01,
9992 0x70, 0x01, 0x72, 0x01, 0x78, 0x01, 0x7c, 0x01, 0x62, 0x0a, 0x86, 0x0d,
9993 0x06, 0x13, 0x4c, 0x1c, 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0,
9994 0x03, 0xf7, 0x0c, 0x00, 0x0f, 0x00, 0x47, 0x00, 0xbe, 0x00, 0x00, 0x01,
9995 0x20, 0x11, 0x5c, 0x16, 0x32, 0x1c, 0x38, 0x1c, 0x4e, 0x1c, 0x10, 0x44,
9996 0x00, 0x4c, 0x04, 0xea, 0x5c, 0xf0, 0xa7, 0xf0, 0x04, 0xf6, 0x03, 0xfa,
9997 0x05, 0x00, 0x34, 0x00, 0x36, 0x00, 0x98, 0x00, 0xcc, 0x00, 0x20, 0x01,
9998 0x4e, 0x01, 0x4a, 0x0b, 0x42, 0x0c, 0x12, 0x0f, 0x0c, 0x10, 0x22, 0x11,
9999 0x0a, 0x12, 0x04, 0x13, 0x30, 0x1c, 0x02, 0x48, 0x00, 0x4e, 0x42, 0x54,
10000 0x44, 0x55, 0xbd, 0x56, 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0,
10001 0x59, 0xf0, 0xb8, 0xf0, 0x4b, 0xf4, 0x06, 0xf7, 0x0e, 0xf7, 0x04, 0xfc,
10002 0x05, 0xfc, 0x06, 0x00, 0x19, 0x00, 0x33, 0x00, 0x9b, 0x00, 0xa4, 0x00,
10003 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00, 0xe7, 0x00, 0xe2, 0x03,
10004 0x08, 0x0f, 0x02, 0x10, 0x04, 0x10, 0x0a, 0x10, 0x0a, 0x13, 0x0c, 0x13,
10005 0x12, 0x13, 0x24, 0x14, 0x34, 0x14, 0x04, 0x16, 0x08, 0x16, 0xa4, 0x17,
10006 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, 0x08, 0x44, 0x38, 0x44, 0x91, 0x44,
10007 0x0a, 0x45, 0x48, 0x46, 0x01, 0x48, 0x68, 0x54, 0x3a, 0x55, 0x83, 0x55,
10008 0xe5, 0x55, 0xb0, 0x57, 0x01, 0x58, 0x83, 0x59, 0x05, 0xe6, 0x0b, 0xf0,
10009 0x0c, 0xf0, 0x04, 0xf8, 0x05, 0xf8, 0x07, 0x00, 0x0a, 0x00, 0x1c, 0x00,
10010 0x1e, 0x00, 0x9e, 0x00, 0xa8, 0x00, 0xaa, 0x00, 0xb9, 0x00, 0xe0, 0x00,
10011 0x22, 0x01, 0x26, 0x01, 0x79, 0x01, 0x7e, 0x01, 0xc4, 0x01, 0xc6, 0x01,
10012 0x80, 0x02, 0x5e, 0x03, 0xee, 0x04, 0x9a, 0x06, 0xf8, 0x07, 0x62, 0x08,
10013 0x68, 0x08, 0x69, 0x08, 0xd6, 0x08, 0xe9, 0x09, 0xfa, 0x0b, 0x2e, 0x0f,
10014 0x12, 0x10, 0x1a, 0x10, 0xed, 0x10, 0xf1, 0x10, 0x2a, 0x11, 0x06, 0x12,
10015 0x0c, 0x12, 0x3e, 0x12, 0x10, 0x13, 0x16, 0x13, 0x1e, 0x13, 0x46, 0x14,
10016 0x76, 0x14, 0x82, 0x14, 0x36, 0x15, 0xca, 0x15, 0x6b, 0x18, 0xbe, 0x18,
10017 0xca, 0x18, 0xe6, 0x19, 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40,
10018 0x0e, 0x47, 0xfe, 0x9c, 0xf0, 0x2b, 0x02, 0xfe, 0xac, 0x0d, 0xff, 0x10,
10019 0x00, 0x00, 0xd7, 0xfe, 0xe8, 0x19, 0x00, 0xd6, 0xfe, 0x84, 0x01, 0xff,
10020 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00,
10021 0x00, 0xfe, 0x57, 0x24, 0x00, 0xfe, 0x4c, 0x00, 0x5b, 0xff, 0x04, 0x00,
10022 0x00, 0x11, 0xff, 0x09, 0x00, 0x00, 0xff, 0x08, 0x01, 0x01, 0xff, 0x08,
10023 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, 0xff, 0xff, 0xff, 0x11,
10024 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00,
10025 0xfe, 0x04, 0xf7, 0xd6, 0x2c, 0x99, 0x0a, 0x01, 0xfe, 0xc2, 0x0f, 0xfe,
10026 0x04, 0xf7, 0xd6, 0x99, 0x0a, 0x42, 0x2c, 0xfe, 0x3d, 0xf0, 0xfe, 0x06,
10027 0x02, 0xfe, 0x20, 0xf0, 0xa7, 0xfe, 0x91, 0xf0, 0xfe, 0xf4, 0x01, 0xfe,
10028 0x90, 0xf0, 0xfe, 0xf4, 0x01, 0xfe, 0x8f, 0xf0, 0xa7, 0x03, 0x5d, 0x4d,
10029 0x02, 0xfe, 0xc8, 0x0d, 0x01, 0xfe, 0x38, 0x0e, 0xfe, 0xdd, 0x12, 0xfe,
10030 0xfc, 0x10, 0xfe, 0x28, 0x1c, 0x03, 0xfe, 0xa6, 0x00, 0xfe, 0xd3, 0x12,
10031 0x41, 0x14, 0xfe, 0xa6, 0x00, 0xc2, 0xfe, 0x48, 0xf0, 0xfe, 0x8a, 0x02,
10032 0xfe, 0x49, 0xf0, 0xfe, 0xa4, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc2, 0x02,
10033 0xfe, 0x46, 0xf0, 0xfe, 0x54, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x5a, 0x02,
10034 0xfe, 0x43, 0xf0, 0xfe, 0x48, 0x02, 0xfe, 0x44, 0xf0, 0xfe, 0x4c, 0x02,
10035 0xfe, 0x45, 0xf0, 0xfe, 0x50, 0x02, 0x18, 0x0a, 0xaa, 0x18, 0x06, 0x14,
10036 0xa1, 0x02, 0x2b, 0xfe, 0x00, 0x1c, 0xe7, 0xfe, 0x02, 0x1c, 0xe6, 0xfe,
10037 0x1e, 0x1c, 0xfe, 0xe9, 0x10, 0x01, 0xfe, 0x18, 0x18, 0xfe, 0xe7, 0x10,
10038 0xfe, 0x06, 0xfc, 0xce, 0x09, 0x70, 0x01, 0xa8, 0x02, 0x2b, 0x15, 0x59,
10039 0x39, 0xa2, 0x01, 0xfe, 0x58, 0x10, 0x09, 0x70, 0x01, 0x87, 0xfe, 0xbd,
10040 0x10, 0x09, 0x70, 0x01, 0x87, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe,
10041 0x58, 0x1c, 0x18, 0x06, 0x14, 0xa1, 0x2c, 0x1c, 0x2b, 0xfe, 0x3d, 0xf0,
10042 0xfe, 0x06, 0x02, 0x23, 0xfe, 0x98, 0x02, 0xfe, 0x5a, 0x1c, 0xf8, 0xfe,
10043 0x14, 0x1c, 0x15, 0xfe, 0x30, 0x00, 0x39, 0xa2, 0x01, 0xfe, 0x48, 0x10,
10044 0x18, 0x06, 0x14, 0xa1, 0x02, 0xd7, 0x22, 0x20, 0x07, 0x11, 0x35, 0xfe,
10045 0x69, 0x10, 0x18, 0x06, 0x14, 0xa1, 0xfe, 0x04, 0xec, 0x20, 0x4f, 0x43,
10046 0x13, 0x20, 0xfe, 0x05, 0xf6, 0xce, 0x01, 0xfe, 0x4a, 0x17, 0x08, 0x54,
10047 0x58, 0x37, 0x12, 0x2f, 0x42, 0x92, 0x01, 0xfe, 0x82, 0x16, 0x02, 0x2b,
10048 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x66, 0x01, 0x73, 0xfe, 0x18, 0x10,
10049 0xfe, 0x41, 0x58, 0x09, 0xa4, 0x01, 0x0e, 0xfe, 0xc8, 0x54, 0x6b, 0xfe,
10050 0x10, 0x03, 0x01, 0xfe, 0x82, 0x16, 0x02, 0x2b, 0x2c, 0x4f, 0xfe, 0x02,
10051 0xe8, 0x2a, 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43, 0xfe, 0x77, 0x57, 0xfe,
10052 0x27, 0xf0, 0xfe, 0xe0, 0x01, 0xfe, 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xa7,
10053 0xfe, 0x40, 0x1c, 0x1c, 0xd9, 0xfe, 0x26, 0xf0, 0xfe, 0x5a, 0x03, 0xfe,
10054 0xa0, 0xf0, 0xfe, 0x48, 0x03, 0xfe, 0x11, 0xf0, 0xa7, 0xfe, 0xef, 0x10,
10055 0xfe, 0x9f, 0xf0, 0xfe, 0x68, 0x03, 0xf9, 0x10, 0xfe, 0x11, 0x00, 0x02,
10056 0x65, 0x2c, 0xfe, 0x48, 0x1c, 0xf9, 0x08, 0x05, 0x1b, 0xfe, 0x18, 0x13,
10057 0x21, 0x22, 0xa3, 0xb7, 0x13, 0xa3, 0x09, 0x46, 0x01, 0x0e, 0xb7, 0x78,
10058 0x01, 0xfe, 0xb4, 0x16, 0x12, 0xd1, 0x1c, 0xd9, 0xfe, 0x01, 0xf0, 0xd9,
10059 0xfe, 0x82, 0xf0, 0xfe, 0x96, 0x03, 0xfa, 0x12, 0xfe, 0xe4, 0x00, 0x27,
10060 0xfe, 0xa8, 0x03, 0x1c, 0x34, 0x1d, 0xfe, 0xb8, 0x03, 0x01, 0x4b, 0xfe,
10061 0x06, 0xf0, 0xfe, 0xc8, 0x03, 0x95, 0x86, 0xfe, 0x0a, 0xf0, 0xfe, 0x8a,
10062 0x06, 0x02, 0x24, 0x03, 0x70, 0x28, 0x17, 0xfe, 0xfa, 0x04, 0x15, 0x6d,
10063 0x01, 0x36, 0x7b, 0xfe, 0x6a, 0x02, 0x02, 0xd8, 0xf9, 0x2c, 0x99, 0x19,
10064 0xfe, 0x67, 0x1b, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x48, 0x1c,
10065 0x74, 0x01, 0xaf, 0x8c, 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x17, 0xda,
10066 0x09, 0xd1, 0x01, 0x0e, 0x8d, 0x51, 0x64, 0x79, 0x2a, 0x03, 0x70, 0x28,
10067 0xfe, 0x10, 0x12, 0x15, 0x6d, 0x01, 0x36, 0x7b, 0xfe, 0x6a, 0x02, 0x02,
10068 0xd8, 0xc7, 0x81, 0xc8, 0x83, 0x1c, 0x24, 0x27, 0xfe, 0x40, 0x04, 0x1d,
10069 0xfe, 0x3c, 0x04, 0x3b, 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x4e,
10070 0x12, 0x2d, 0xff, 0x02, 0x00, 0x10, 0x01, 0x0b, 0x1d, 0xfe, 0xe4, 0x04,
10071 0x2d, 0x01, 0x0b, 0x1d, 0x24, 0x33, 0x31, 0xde, 0xfe, 0x4c, 0x44, 0xfe,
10072 0x4c, 0x12, 0x51, 0xfe, 0x44, 0x48, 0x0f, 0x6f, 0xfe, 0x4c, 0x54, 0x6b,
10073 0xda, 0x4f, 0x79, 0x2a, 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x62,
10074 0x13, 0x08, 0x05, 0x1b, 0xfe, 0x2a, 0x13, 0x32, 0x07, 0x82, 0xfe, 0x52,
10075 0x13, 0xfe, 0x20, 0x10, 0x0f, 0x6f, 0xfe, 0x4c, 0x54, 0x6b, 0xda, 0xfe,
10076 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x40, 0x13, 0x08, 0x05, 0x1b, 0xfe,
10077 0x08, 0x13, 0x32, 0x07, 0x82, 0xfe, 0x30, 0x13, 0x08, 0x05, 0x1b, 0xfe,
10078 0x1c, 0x12, 0x15, 0x9d, 0x08, 0x05, 0x06, 0x4d, 0x15, 0xfe, 0x0d, 0x00,
10079 0x01, 0x36, 0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24, 0x2d, 0x12, 0xfe, 0xe6,
10080 0x00, 0xfe, 0x1c, 0x90, 0xfe, 0x40, 0x5c, 0x04, 0x15, 0x9d, 0x01, 0x36,
10081 0x02, 0x2b, 0xfe, 0x42, 0x5b, 0x99, 0x19, 0xfe, 0x46, 0x59, 0xfe, 0xbf,
10082 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x87, 0x80, 0xfe, 0x31, 0xe4, 0x5b, 0x08,
10083 0x05, 0x0a, 0xfe, 0x84, 0x13, 0xfe, 0x20, 0x80, 0x07, 0x19, 0xfe, 0x7c,
10084 0x12, 0x53, 0x05, 0x06, 0xfe, 0x6c, 0x13, 0x03, 0xfe, 0xa2, 0x00, 0x28,
10085 0x17, 0xfe, 0x90, 0x05, 0xfe, 0x31, 0xe4, 0x5a, 0x53, 0x05, 0x0a, 0xfe,
10086 0x56, 0x13, 0x03, 0xfe, 0xa0, 0x00, 0x28, 0xfe, 0x4e, 0x12, 0x67, 0xff,
10087 0x02, 0x00, 0x10, 0x27, 0xfe, 0x48, 0x05, 0x1c, 0x34, 0xfe, 0x89, 0x48,
10088 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x56, 0x05, 0x26, 0xfe, 0xa8, 0x05,
10089 0x12, 0xfe, 0xe3, 0x00, 0x21, 0x53, 0xfe, 0x4a, 0xf0, 0xfe, 0x76, 0x05,
10090 0xfe, 0x49, 0xf0, 0xfe, 0x70, 0x05, 0x88, 0x25, 0xfe, 0x21, 0x00, 0xab,
10091 0x25, 0xfe, 0x22, 0x00, 0xaa, 0x25, 0x58, 0xfe, 0x09, 0x48, 0xff, 0x02,
10092 0x00, 0x10, 0x27, 0xfe, 0x86, 0x05, 0x26, 0xfe, 0xa8, 0x05, 0xfe, 0xe2,
10093 0x08, 0x53, 0x05, 0xcb, 0x4d, 0x01, 0xb0, 0x25, 0x06, 0x13, 0xd3, 0x39,
10094 0xfe, 0x27, 0x01, 0x08, 0x05, 0x1b, 0xfe, 0x22, 0x12, 0x41, 0x01, 0xb2,
10095 0x15, 0x9d, 0x08, 0x05, 0x06, 0x4d, 0x15, 0xfe, 0x0d, 0x00, 0x01, 0x36,
10096 0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24, 0x03, 0xfe, 0x9c, 0x00, 0x28, 0xeb,
10097 0x03, 0x5c, 0x28, 0xfe, 0x36, 0x13, 0x41, 0x01, 0xb2, 0x26, 0xfe, 0x18,
10098 0x06, 0x09, 0x06, 0x53, 0x05, 0x1f, 0xfe, 0x02, 0x12, 0x50, 0x01, 0xfe,
10099 0x9e, 0x15, 0x1d, 0xfe, 0x0e, 0x06, 0x12, 0xa5, 0x01, 0x4b, 0x12, 0xfe,
10100 0xe5, 0x00, 0x03, 0x5c, 0xc1, 0x0c, 0x5c, 0x03, 0xcd, 0x28, 0xfe, 0x62,
10101 0x12, 0x03, 0x45, 0x28, 0xfe, 0x5a, 0x13, 0x01, 0xfe, 0x0c, 0x19, 0x01,
10102 0xfe, 0x76, 0x19, 0xfe, 0x43, 0x48, 0xc4, 0xcc, 0x0f, 0x71, 0xff, 0x02,
10103 0x00, 0x57, 0x52, 0x93, 0x1e, 0x43, 0x8b, 0xc4, 0x6e, 0x41, 0x01, 0xb2,
10104 0x26, 0xfe, 0x82, 0x06, 0x53, 0x05, 0x1a, 0xe9, 0x91, 0x09, 0x59, 0x01,
10105 0xfe, 0xcc, 0x15, 0x1d, 0xfe, 0x78, 0x06, 0x12, 0xa5, 0x01, 0x4b, 0x12,
10106 0xfe, 0xe5, 0x00, 0x03, 0x45, 0xc1, 0x0c, 0x45, 0x18, 0x06, 0x01, 0xb2,
10107 0xfa, 0x76, 0x74, 0x01, 0xaf, 0x8c, 0x12, 0xfe, 0xe2, 0x00, 0x27, 0xdb,
10108 0x1c, 0x34, 0xfe, 0x0a, 0xf0, 0xfe, 0xb6, 0x06, 0x94, 0xfe, 0x6c, 0x07,
10109 0xfe, 0x06, 0xf0, 0xfe, 0x74, 0x07, 0x95, 0x86, 0x02, 0x24, 0x08, 0x05,
10110 0x0a, 0xfe, 0x2e, 0x12, 0x16, 0x19, 0x01, 0x0b, 0x16, 0x00, 0x01, 0x0b,
10111 0x16, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, 0x0b, 0xfe, 0x99, 0xa4, 0x01,
10112 0x0b, 0x16, 0x00, 0x02, 0xfe, 0x42, 0x08, 0x68, 0x05, 0x1a, 0xfe, 0x38,
10113 0x12, 0x08, 0x05, 0x1a, 0xfe, 0x30, 0x13, 0x16, 0xfe, 0x1b, 0x00, 0x01,
10114 0x0b, 0x16, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01,
10115 0x0b, 0x16, 0x06, 0x01, 0x0b, 0x16, 0x00, 0x02, 0xe2, 0x6c, 0x58, 0xbe,
10116 0x50, 0xfe, 0x9a, 0x81, 0x55, 0x1b, 0x7a, 0xfe, 0x42, 0x07, 0x09, 0x1b,
10117 0xfe, 0x09, 0x6f, 0xba, 0xfe, 0xca, 0x45, 0xfe, 0x32, 0x12, 0x69, 0x6d,
10118 0x8b, 0x6c, 0x7f, 0x27, 0xfe, 0x54, 0x07, 0x1c, 0x34, 0xfe, 0x0a, 0xf0,
10119 0xfe, 0x42, 0x07, 0x95, 0x86, 0x94, 0xfe, 0x6c, 0x07, 0x02, 0x24, 0x01,
10120 0x4b, 0x02, 0xdb, 0x16, 0x1f, 0x02, 0xdb, 0xfe, 0x9c, 0xf7, 0xdc, 0xfe,
10121 0x2c, 0x90, 0xfe, 0xae, 0x90, 0x56, 0xfe, 0xda, 0x07, 0x0c, 0x60, 0x14,
10122 0x61, 0x08, 0x54, 0x5a, 0x37, 0x22, 0x20, 0x07, 0x11, 0xfe, 0x0e, 0x12,
10123 0x8d, 0xfe, 0x80, 0x80, 0x39, 0x20, 0x6a, 0x2a, 0xfe, 0x06, 0x10, 0xfe,
10124 0x83, 0xe7, 0xfe, 0x48, 0x00, 0xab, 0xfe, 0x03, 0x40, 0x08, 0x54, 0x5b,
10125 0x37, 0x01, 0xb3, 0xb8, 0xfe, 0x1f, 0x40, 0x13, 0x62, 0x01, 0xef, 0xfe,
10126 0x08, 0x50, 0xfe, 0x8a, 0x50, 0xfe, 0x44, 0x51, 0xfe, 0xc6, 0x51, 0x88,
10127 0xfe, 0x08, 0x90, 0xfe, 0x8a, 0x90, 0x0c, 0x5e, 0x14, 0x5f, 0xfe, 0x0c,
10128 0x90, 0xfe, 0x8e, 0x90, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x0c, 0x3d,
10129 0x14, 0x3e, 0xfe, 0x4a, 0x10, 0x08, 0x05, 0x5a, 0xfe, 0x2a, 0x12, 0xfe,
10130 0x2c, 0x90, 0xfe, 0xae, 0x90, 0x0c, 0x60, 0x14, 0x61, 0x08, 0x05, 0x5b,
10131 0x8b, 0x01, 0xb3, 0xfe, 0x1f, 0x80, 0x13, 0x62, 0xfe, 0x44, 0x90, 0xfe,
10132 0xc6, 0x90, 0x0c, 0x3f, 0x14, 0x40, 0xfe, 0x08, 0x90, 0xfe, 0x8a, 0x90,
10133 0x0c, 0x5e, 0x14, 0x5f, 0xfe, 0x40, 0x90, 0xfe, 0xc2, 0x90, 0x0c, 0x3d,
10134 0x14, 0x3e, 0x0c, 0x2e, 0x14, 0x3c, 0x21, 0x0c, 0x49, 0x0c, 0x63, 0x08,
10135 0x54, 0x1f, 0x37, 0x2c, 0x0f, 0xfe, 0x4e, 0x11, 0x27, 0xdd, 0xfe, 0x9e,
10136 0xf0, 0xfe, 0x76, 0x08, 0xbc, 0x17, 0x34, 0x2c, 0x77, 0xe6, 0xc5, 0xfe,
10137 0x9a, 0x08, 0xc6, 0xfe, 0xb8, 0x08, 0x94, 0xfe, 0x8e, 0x08, 0xfe, 0x06,
10138 0xf0, 0xfe, 0x94, 0x08, 0x95, 0x86, 0x02, 0x24, 0x01, 0x4b, 0xfe, 0xc9,
10139 0x10, 0x16, 0x1f, 0xfe, 0xc9, 0x10, 0x68, 0x05, 0x06, 0xfe, 0x10, 0x12,
10140 0x68, 0x05, 0x0a, 0x4e, 0x08, 0x05, 0x0a, 0xfe, 0x90, 0x12, 0xfe, 0x2e,
10141 0x1c, 0x02, 0xfe, 0x18, 0x0b, 0x68, 0x05, 0x06, 0x4e, 0x68, 0x05, 0x0a,
10142 0xfe, 0x7a, 0x12, 0xfe, 0x2c, 0x1c, 0xfe, 0xaa, 0xf0, 0xfe, 0xd2, 0x09,
10143 0xfe, 0xac, 0xf0, 0xfe, 0x00, 0x09, 0x02, 0xfe, 0xde, 0x09, 0xfe, 0xb7,
10144 0xf0, 0xfe, 0xfc, 0x08, 0xfe, 0x02, 0xf6, 0x1a, 0x50, 0xfe, 0x70, 0x18,
10145 0xfe, 0xf1, 0x18, 0xfe, 0x40, 0x55, 0xfe, 0xe1, 0x55, 0xfe, 0x10, 0x58,
10146 0xfe, 0x91, 0x58, 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0x1c, 0x85, 0xfe,
10147 0x8c, 0xf0, 0xfe, 0xfc, 0x08, 0xfe, 0xac, 0xf0, 0xfe, 0xf0, 0x08, 0xb5,
10148 0xfe, 0xcb, 0x10, 0xfe, 0xad, 0xf0, 0xfe, 0x0c, 0x09, 0x02, 0xfe, 0x18,
10149 0x0b, 0xb6, 0xfe, 0xbf, 0x10, 0xfe, 0x2b, 0xf0, 0x85, 0xf4, 0x1e, 0xfe,
10150 0x00, 0xfe, 0xfe, 0x1c, 0x12, 0xc2, 0xfe, 0xd2, 0xf0, 0x85, 0xfe, 0x76,
10151 0x18, 0x1e, 0x19, 0x17, 0x85, 0x03, 0xd2, 0x1e, 0x06, 0x17, 0x85, 0xc5,
10152 0x4a, 0xc6, 0x4a, 0xb5, 0xb6, 0xfe, 0x89, 0x10, 0x74, 0x67, 0x2d, 0x15,
10153 0x9d, 0x01, 0x36, 0x10, 0xfe, 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x65, 0x10,
10154 0x80, 0x02, 0x65, 0xfe, 0x98, 0x80, 0xfe, 0x19, 0xe4, 0x0a, 0xfe, 0x1a,
10155 0x12, 0x51, 0xfe, 0x19, 0x82, 0xfe, 0x6c, 0x18, 0xfe, 0x44, 0x54, 0xbe,
10156 0xfe, 0x19, 0x81, 0xfe, 0x74, 0x18, 0x8f, 0x90, 0x17, 0xfe, 0xce, 0x08,
10157 0x02, 0x4a, 0x08, 0x05, 0x5a, 0xec, 0x03, 0x2e, 0x29, 0x3c, 0x0c, 0x3f,
10158 0x14, 0x40, 0x9b, 0x2e, 0x9c, 0x3c, 0xfe, 0x6c, 0x18, 0xfe, 0xed, 0x18,
10159 0xfe, 0x44, 0x54, 0xfe, 0xe5, 0x54, 0x3a, 0x3f, 0x3b, 0x40, 0x03, 0x49,
10160 0x29, 0x63, 0x8f, 0xfe, 0xe3, 0x54, 0xfe, 0x74, 0x18, 0xfe, 0xf5, 0x18,
10161 0x8f, 0xfe, 0xe3, 0x54, 0x90, 0xc0, 0x56, 0xfe, 0xce, 0x08, 0x02, 0x4a,
10162 0xfe, 0x37, 0xf0, 0xfe, 0xda, 0x09, 0xfe, 0x8b, 0xf0, 0xfe, 0x60, 0x09,
10163 0x02, 0x4a, 0x08, 0x05, 0x0a, 0x23, 0xfe, 0xfa, 0x0a, 0x3a, 0x49, 0x3b,
10164 0x63, 0x56, 0xfe, 0x3e, 0x0a, 0x0f, 0xfe, 0xc0, 0x07, 0x41, 0x98, 0x00,
10165 0xad, 0xfe, 0x01, 0x59, 0xfe, 0x52, 0xf0, 0xfe, 0x0c, 0x0a, 0x8f, 0x7a,
10166 0xfe, 0x24, 0x0a, 0x3a, 0x49, 0x8f, 0xfe, 0xe3, 0x54, 0x57, 0x49, 0x7d,
10167 0x63, 0xfe, 0x14, 0x58, 0xfe, 0x95, 0x58, 0x02, 0x4a, 0x3a, 0x49, 0x3b,
10168 0x63, 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0xbe, 0x57, 0x49, 0x57, 0x63,
10169 0x02, 0x4a, 0x08, 0x05, 0x5a, 0xfe, 0x82, 0x12, 0x08, 0x05, 0x1f, 0xfe,
10170 0x66, 0x13, 0x22, 0x62, 0xb7, 0xfe, 0x03, 0xa1, 0xfe, 0x83, 0x80, 0xfe,
10171 0xc8, 0x44, 0xfe, 0x2e, 0x13, 0xfe, 0x04, 0x91, 0xfe, 0x86, 0x91, 0x6a,
10172 0x2a, 0xfe, 0x40, 0x59, 0xfe, 0xc1, 0x59, 0x56, 0xe0, 0x03, 0x60, 0x29,
10173 0x61, 0x0c, 0x7f, 0x14, 0x80, 0x57, 0x60, 0x7d, 0x61, 0x01, 0xb3, 0xb8,
10174 0x6a, 0x2a, 0x13, 0x62, 0x9b, 0x2e, 0x9c, 0x3c, 0x3a, 0x3f, 0x3b, 0x40,
10175 0x90, 0xc0, 0xfe, 0x04, 0xfa, 0x2e, 0xfe, 0x05, 0xfa, 0x3c, 0x01, 0xef,
10176 0xfe, 0x36, 0x10, 0x21, 0x0c, 0x7f, 0x0c, 0x80, 0x3a, 0x3f, 0x3b, 0x40,
10177 0xe4, 0x08, 0x05, 0x1f, 0x17, 0xe0, 0x3a, 0x3d, 0x3b, 0x3e, 0x08, 0x05,
10178 0xfe, 0xf7, 0x00, 0x37, 0x03, 0x5e, 0x29, 0x5f, 0xfe, 0x10, 0x58, 0xfe,
10179 0x91, 0x58, 0x57, 0x49, 0x7d, 0x63, 0x02, 0xfe, 0xf4, 0x09, 0x08, 0x05,
10180 0x1f, 0x17, 0xe0, 0x08, 0x05, 0xfe, 0xf7, 0x00, 0x37, 0xbe, 0xfe, 0x19,
10181 0x81, 0x50, 0xfe, 0x10, 0x90, 0xfe, 0x92, 0x90, 0xfe, 0xd3, 0x10, 0x32,
10182 0x07, 0xa6, 0x17, 0xfe, 0x08, 0x09, 0x12, 0xa6, 0x08, 0x05, 0x0a, 0xfe,
10183 0x14, 0x13, 0x03, 0x3d, 0x29, 0x3e, 0x56, 0xfe, 0x08, 0x09, 0xfe, 0x0c,
10184 0x58, 0xfe, 0x8d, 0x58, 0x02, 0x4a, 0x21, 0x41, 0xfe, 0x19, 0x80, 0xe7,
10185 0x08, 0x05, 0x0a, 0xfe, 0x1a, 0x12, 0xfe, 0x6c, 0x19, 0xfe, 0x19, 0x41,
10186 0xf4, 0xc2, 0xfe, 0xd1, 0xf0, 0xe2, 0x15, 0x7e, 0x01, 0x36, 0x10, 0xfe,
10187 0x44, 0x00, 0xfe, 0x8e, 0x10, 0xfe, 0x6c, 0x19, 0x57, 0x3d, 0xfe, 0xed,
10188 0x19, 0x7d, 0x3e, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0xf4, 0x1e, 0xfe,
10189 0x00, 0xff, 0x35, 0xfe, 0x74, 0x10, 0xc2, 0xfe, 0xd2, 0xf0, 0xfe, 0xa6,
10190 0x0b, 0xfe, 0x76, 0x18, 0x1e, 0x19, 0x8a, 0x03, 0xd2, 0x1e, 0x06, 0xfe,
10191 0x08, 0x13, 0x10, 0xfe, 0x16, 0x00, 0x02, 0x65, 0xfe, 0xd1, 0xf0, 0xfe,
10192 0xb8, 0x0b, 0x15, 0x7e, 0x01, 0x36, 0x10, 0xfe, 0x17, 0x00, 0xfe, 0x42,
10193 0x10, 0xfe, 0xce, 0xf0, 0xfe, 0xbe, 0x0b, 0xfe, 0x3c, 0x10, 0xfe, 0xcd,
10194 0xf0, 0xfe, 0xca, 0x0b, 0x10, 0xfe, 0x22, 0x00, 0x02, 0x65, 0xfe, 0xcb,
10195 0xf0, 0xfe, 0xd6, 0x0b, 0x10, 0xfe, 0x24, 0x00, 0x02, 0x65, 0xfe, 0xd0,
10196 0xf0, 0xfe, 0xe0, 0x0b, 0x10, 0x9e, 0xe5, 0xfe, 0xcf, 0xf0, 0xfe, 0xea,
10197 0x0b, 0x10, 0x58, 0xfe, 0x10, 0x10, 0xfe, 0xcc, 0xf0, 0xe2, 0x68, 0x05,
10198 0x1f, 0x4d, 0x10, 0xfe, 0x12, 0x00, 0x2c, 0x0f, 0xfe, 0x4e, 0x11, 0x27,
10199 0xfe, 0x00, 0x0c, 0xfe, 0x9e, 0xf0, 0xfe, 0x14, 0x0c, 0xbc, 0x17, 0x34,
10200 0x2c, 0x77, 0xe6, 0xc5, 0x24, 0xc6, 0x24, 0x2c, 0xfa, 0x27, 0xfe, 0x20,
10201 0x0c, 0x1c, 0x34, 0x94, 0xfe, 0x3c, 0x0c, 0x95, 0x86, 0xc5, 0xdc, 0xc6,
10202 0xdc, 0x02, 0x24, 0x01, 0x4b, 0xfe, 0xdb, 0x10, 0x12, 0xfe, 0xe8, 0x00,
10203 0xb5, 0xb6, 0x74, 0xc7, 0x81, 0xc8, 0x83, 0xfe, 0x89, 0xf0, 0x24, 0x33,
10204 0x31, 0xe1, 0xc7, 0x81, 0xc8, 0x83, 0x27, 0xfe, 0x66, 0x0c, 0x1d, 0x24,
10205 0x33, 0x31, 0xdf, 0xbc, 0x4e, 0x10, 0xfe, 0x42, 0x00, 0x02, 0x65, 0x7c,
10206 0x06, 0xfe, 0x81, 0x49, 0x17, 0xfe, 0x2c, 0x0d, 0x08, 0x05, 0x0a, 0xfe,
10207 0x44, 0x13, 0x10, 0x00, 0x55, 0x0a, 0xfe, 0x54, 0x12, 0x55, 0xfe, 0x28,
10208 0x00, 0x23, 0xfe, 0x9a, 0x0d, 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x66,
10209 0x44, 0xfe, 0x28, 0x00, 0xfe, 0xe2, 0x10, 0x01, 0xf5, 0x01, 0xf6, 0x09,
10210 0xa4, 0x01, 0xfe, 0x26, 0x0f, 0x64, 0x12, 0x2f, 0x01, 0x73, 0x02, 0x2b,
10211 0x10, 0xfe, 0x44, 0x00, 0x55, 0x0a, 0xe9, 0x44, 0x0a, 0xfe, 0xb4, 0x10,
10212 0x01, 0xb0, 0x44, 0x0a, 0xfe, 0xaa, 0x10, 0x01, 0xb0, 0xfe, 0x19, 0x82,
10213 0xfe, 0x34, 0x46, 0xac, 0x44, 0x0a, 0x10, 0xfe, 0x43, 0x00, 0xfe, 0x96,
10214 0x10, 0x08, 0x54, 0x0a, 0x37, 0x01, 0xf5, 0x01, 0xf6, 0x64, 0x12, 0x2f,
10215 0x01, 0x73, 0x99, 0x0a, 0x64, 0x42, 0x92, 0x02, 0xfe, 0x2e, 0x03, 0x08,
10216 0x05, 0x0a, 0x8a, 0x44, 0x0a, 0x10, 0x00, 0xfe, 0x5c, 0x10, 0x68, 0x05,
10217 0x1a, 0xfe, 0x58, 0x12, 0x08, 0x05, 0x1a, 0xfe, 0x50, 0x13, 0xfe, 0x1c,
10218 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x50, 0x0d, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d,
10219 0xf0, 0xfe, 0x56, 0x0d, 0x08, 0x54, 0x1a, 0x37, 0xfe, 0xa9, 0x10, 0x10,
10220 0xfe, 0x15, 0x00, 0xfe, 0x04, 0xe6, 0x0a, 0x50, 0xfe, 0x2e, 0x10, 0x10,
10221 0xfe, 0x13, 0x00, 0xfe, 0x10, 0x10, 0x10, 0x6f, 0xab, 0x10, 0xfe, 0x41,
10222 0x00, 0xaa, 0x10, 0xfe, 0x24, 0x00, 0x8c, 0xb5, 0xb6, 0x74, 0x03, 0x70,
10223 0x28, 0x23, 0xd8, 0x50, 0xfe, 0x04, 0xe6, 0x1a, 0xfe, 0x9d, 0x41, 0xfe,
10224 0x1c, 0x42, 0x64, 0x01, 0xe3, 0x02, 0x2b, 0xf8, 0x15, 0x0a, 0x39, 0xa0,
10225 0xb4, 0x15, 0xfe, 0x31, 0x00, 0x39, 0xa2, 0x01, 0xfe, 0x48, 0x10, 0x02,
10226 0xd7, 0x42, 0xfe, 0x06, 0xec, 0xd0, 0xfc, 0x44, 0x1b, 0xfe, 0xce, 0x45,
10227 0x35, 0x42, 0xfe, 0x06, 0xea, 0xd0, 0xfe, 0x47, 0x4b, 0x91, 0xfe, 0x75,
10228 0x57, 0x03, 0x5d, 0xfe, 0x98, 0x56, 0xfe, 0x38, 0x12, 0x09, 0x48, 0x01,
10229 0x0e, 0xfe, 0x44, 0x48, 0x4f, 0x08, 0x05, 0x1b, 0xfe, 0x1a, 0x13, 0x09,
10230 0x46, 0x01, 0x0e, 0x41, 0xfe, 0x41, 0x58, 0x09, 0xa4, 0x01, 0x0e, 0xfe,
10231 0x49, 0x54, 0x96, 0xfe, 0x1e, 0x0e, 0x02, 0xfe, 0x2e, 0x03, 0x09, 0x5d,
10232 0xfe, 0xee, 0x14, 0xfc, 0x44, 0x1b, 0xfe, 0xce, 0x45, 0x35, 0x42, 0xfe,
10233 0xce, 0x47, 0xfe, 0xad, 0x13, 0x02, 0x2b, 0x22, 0x20, 0x07, 0x11, 0xfe,
10234 0x9e, 0x12, 0x21, 0x13, 0x59, 0x13, 0x9f, 0x13, 0xd5, 0x22, 0x2f, 0x41,
10235 0x39, 0x2f, 0xbc, 0xad, 0xfe, 0xbc, 0xf0, 0xfe, 0xe0, 0x0e, 0x0f, 0x06,
10236 0x13, 0x59, 0x01, 0xfe, 0xda, 0x16, 0x03, 0xfe, 0x38, 0x01, 0x29, 0xfe,
10237 0x3a, 0x01, 0x56, 0xfe, 0xe4, 0x0e, 0xfe, 0x02, 0xec, 0xd5, 0x69, 0x00,
10238 0x66, 0xfe, 0x04, 0xec, 0x20, 0x4f, 0xfe, 0x05, 0xf6, 0xfe, 0x34, 0x01,
10239 0x01, 0xfe, 0x4a, 0x17, 0xfe, 0x08, 0x90, 0xfe, 0x48, 0xf4, 0x0d, 0xfe,
10240 0x18, 0x13, 0xba, 0xfe, 0x02, 0xea, 0xd5, 0x69, 0x7e, 0xfe, 0xc5, 0x13,
10241 0x15, 0x1a, 0x39, 0xa0, 0xb4, 0xfe, 0x2e, 0x10, 0x03, 0xfe, 0x38, 0x01,
10242 0x1e, 0xfe, 0xf0, 0xff, 0x0c, 0xfe, 0x60, 0x01, 0x03, 0xfe, 0x3a, 0x01,
10243 0x0c, 0xfe, 0x62, 0x01, 0x43, 0x13, 0x20, 0x25, 0x06, 0x13, 0x2f, 0x12,
10244 0x2f, 0x92, 0x0f, 0x06, 0x04, 0x21, 0x04, 0x22, 0x59, 0xfe, 0xf7, 0x12,
10245 0x22, 0x9f, 0xb7, 0x13, 0x9f, 0x07, 0x7e, 0xfe, 0x71, 0x13, 0xfe, 0x24,
10246 0x1c, 0x15, 0x19, 0x39, 0xa0, 0xb4, 0xfe, 0xd9, 0x10, 0xc3, 0xfe, 0x03,
10247 0xdc, 0xfe, 0x73, 0x57, 0xfe, 0x80, 0x5d, 0x04, 0xc3, 0xfe, 0x03, 0xdc,
10248 0xfe, 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x04, 0xfe, 0x03, 0x57, 0xc3, 0x21,
10249 0xfe, 0x00, 0xcc, 0x04, 0xfe, 0x03, 0x57, 0xc3, 0x78, 0x04, 0x08, 0x05,
10250 0x58, 0xfe, 0x22, 0x13, 0xfe, 0x1c, 0x80, 0x07, 0x06, 0xfe, 0x1a, 0x13,
10251 0xfe, 0x1e, 0x80, 0xed, 0xfe, 0x1d, 0x80, 0xae, 0xfe, 0x0c, 0x90, 0xfe,
10252 0x0e, 0x13, 0xfe, 0x0e, 0x90, 0xac, 0xfe, 0x3c, 0x90, 0xfe, 0x30, 0xf4,
10253 0x0a, 0xfe, 0x3c, 0x50, 0xaa, 0x01, 0xfe, 0x7a, 0x17, 0x32, 0x07, 0x2f,
10254 0xad, 0x01, 0xfe, 0xb4, 0x16, 0x08, 0x05, 0x1b, 0x4e, 0x01, 0xf5, 0x01,
10255 0xf6, 0x12, 0xfe, 0xe9, 0x00, 0x08, 0x05, 0x58, 0xfe, 0x2c, 0x13, 0x01,
10256 0xfe, 0x0c, 0x17, 0xfe, 0x1e, 0x1c, 0xfe, 0x14, 0x90, 0xfe, 0x96, 0x90,
10257 0x0c, 0xfe, 0x64, 0x01, 0x14, 0xfe, 0x66, 0x01, 0x08, 0x05, 0x5b, 0xfe,
10258 0x12, 0x12, 0xfe, 0x03, 0x80, 0x8d, 0xfe, 0x01, 0xec, 0x20, 0xfe, 0x80,
10259 0x40, 0x13, 0x20, 0x6a, 0x2a, 0x12, 0xcf, 0x64, 0x22, 0x20, 0xfb, 0x79,
10260 0x20, 0x04, 0xfe, 0x08, 0x1c, 0x03, 0xfe, 0xac, 0x00, 0xfe, 0x06, 0x58,
10261 0x03, 0xfe, 0xae, 0x00, 0xfe, 0x07, 0x58, 0x03, 0xfe, 0xb0, 0x00, 0xfe,
10262 0x08, 0x58, 0x03, 0xfe, 0xb2, 0x00, 0xfe, 0x09, 0x58, 0xfe, 0x0a, 0x1c,
10263 0x25, 0x6e, 0x13, 0xd0, 0x21, 0x0c, 0x5c, 0x0c, 0x45, 0x0f, 0x46, 0x52,
10264 0x50, 0x18, 0x1b, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x23, 0xfe, 0xfc,
10265 0x0f, 0x44, 0x11, 0x0f, 0x48, 0x52, 0x18, 0x58, 0xfe, 0x90, 0x4d, 0xfe,
10266 0x91, 0x54, 0x23, 0xe4, 0x25, 0x11, 0x13, 0x20, 0x7c, 0x6f, 0x4f, 0x22,
10267 0x20, 0xfb, 0x79, 0x20, 0x12, 0xcf, 0xfe, 0x14, 0x56, 0xfe, 0xd6, 0xf0,
10268 0xfe, 0x26, 0x10, 0xf8, 0x74, 0xfe, 0x14, 0x1c, 0xfe, 0x10, 0x1c, 0xfe,
10269 0x18, 0x1c, 0x04, 0x42, 0xfe, 0x0c, 0x14, 0xfc, 0xfe, 0x07, 0xe6, 0x1b,
10270 0xfe, 0xce, 0x47, 0xfe, 0xf5, 0x13, 0x04, 0x01, 0xb0, 0x7c, 0x6f, 0x4f,
10271 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x42, 0x13, 0x32, 0x07, 0x2f,
10272 0xfe, 0x34, 0x13, 0x09, 0x48, 0x01, 0x0e, 0xbb, 0xfe, 0x36, 0x12, 0xfe,
10273 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01, 0xf0, 0xfe, 0x00, 0xcc, 0xbb, 0xfe,
10274 0xf3, 0x13, 0x43, 0x78, 0x07, 0x11, 0xac, 0x09, 0x84, 0x01, 0x0e, 0xfe,
10275 0x80, 0x5c, 0x01, 0x73, 0xfe, 0x0e, 0x10, 0x07, 0x82, 0x4e, 0xfe, 0x14,
10276 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x60, 0x10, 0x04, 0xfe, 0x44, 0x58, 0x8d,
10277 0xfe, 0x01, 0xec, 0xa2, 0xfe, 0x9e, 0x40, 0xfe, 0x9d, 0xe7, 0x00, 0xfe,
10278 0x9c, 0xe7, 0x1a, 0x79, 0x2a, 0x01, 0xe3, 0xfe, 0xdd, 0x10, 0x2c, 0xc7,
10279 0x81, 0xc8, 0x83, 0x33, 0x31, 0xde, 0x07, 0x1a, 0xfe, 0x48, 0x12, 0x07,
10280 0x0a, 0xfe, 0x56, 0x12, 0x07, 0x19, 0xfe, 0x30, 0x12, 0x07, 0xc9, 0x17,
10281 0xfe, 0x32, 0x12, 0x07, 0xfe, 0x23, 0x00, 0x17, 0xeb, 0x07, 0x06, 0x17,
10282 0xfe, 0x9c, 0x12, 0x07, 0x1f, 0xfe, 0x12, 0x12, 0x07, 0x00, 0x17, 0x24,
10283 0x15, 0xc9, 0x01, 0x36, 0xa9, 0x2d, 0x01, 0x0b, 0x94, 0x4b, 0x04, 0x2d,
10284 0xdd, 0x09, 0xd1, 0x01, 0xfe, 0x26, 0x0f, 0x12, 0x82, 0x02, 0x2b, 0x2d,
10285 0x32, 0x07, 0xa6, 0xfe, 0xd9, 0x13, 0x3a, 0x3d, 0x3b, 0x3e, 0x56, 0xfe,
10286 0xf0, 0x11, 0x08, 0x05, 0x5a, 0xfe, 0x72, 0x12, 0x9b, 0x2e, 0x9c, 0x3c,
10287 0x90, 0xc0, 0x96, 0xfe, 0xba, 0x11, 0x22, 0x62, 0xfe, 0x26, 0x13, 0x03,
10288 0x7f, 0x29, 0x80, 0x56, 0xfe, 0x76, 0x0d, 0x0c, 0x60, 0x14, 0x61, 0x21,
10289 0x0c, 0x7f, 0x0c, 0x80, 0x01, 0xb3, 0x25, 0x6e, 0x77, 0x13, 0x62, 0x01,
10290 0xef, 0x9b, 0x2e, 0x9c, 0x3c, 0xfe, 0x04, 0x55, 0xfe, 0xa5, 0x55, 0xfe,
10291 0x04, 0xfa, 0x2e, 0xfe, 0x05, 0xfa, 0x3c, 0xfe, 0x91, 0x10, 0x03, 0x3f,
10292 0x29, 0x40, 0xfe, 0x40, 0x56, 0xfe, 0xe1, 0x56, 0x0c, 0x3f, 0x14, 0x40,
10293 0x88, 0x9b, 0x2e, 0x9c, 0x3c, 0x90, 0xc0, 0x03, 0x5e, 0x29, 0x5f, 0xfe,
10294 0x00, 0x56, 0xfe, 0xa1, 0x56, 0x0c, 0x5e, 0x14, 0x5f, 0x08, 0x05, 0x5a,
10295 0xfe, 0x1e, 0x12, 0x22, 0x62, 0xfe, 0x1f, 0x40, 0x03, 0x60, 0x29, 0x61,
10296 0xfe, 0x2c, 0x50, 0xfe, 0xae, 0x50, 0x03, 0x3f, 0x29, 0x40, 0xfe, 0x44,
10297 0x50, 0xfe, 0xc6, 0x50, 0x03, 0x5e, 0x29, 0x5f, 0xfe, 0x08, 0x50, 0xfe,
10298 0x8a, 0x50, 0x03, 0x3d, 0x29, 0x3e, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50,
10299 0x02, 0x89, 0x25, 0x06, 0x13, 0xd4, 0x02, 0x72, 0x2d, 0x01, 0x0b, 0x1d,
10300 0x4c, 0x33, 0x31, 0xde, 0x07, 0x06, 0x23, 0x4c, 0x32, 0x07, 0xa6, 0x23,
10301 0x72, 0x01, 0xaf, 0x1e, 0x43, 0x17, 0x4c, 0x08, 0x05, 0x0a, 0xee, 0x3a,
10302 0x3d, 0x3b, 0x3e, 0xfe, 0x0a, 0x55, 0x35, 0xfe, 0x8b, 0x55, 0x57, 0x3d,
10303 0x7d, 0x3e, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0x02, 0x72, 0xfe, 0x19,
10304 0x81, 0xba, 0xfe, 0x19, 0x41, 0x02, 0x72, 0x2d, 0x01, 0x0b, 0x1c, 0x34,
10305 0x1d, 0xe8, 0x33, 0x31, 0xe1, 0x55, 0x19, 0xfe, 0xa6, 0x12, 0x55, 0x0a,
10306 0x4d, 0x02, 0x4c, 0x01, 0x0b, 0x1c, 0x34, 0x1d, 0xe8, 0x33, 0x31, 0xdf,
10307 0x07, 0x19, 0x23, 0x4c, 0x01, 0x0b, 0x1d, 0xe8, 0x33, 0x31, 0xfe, 0xe8,
10308 0x09, 0xfe, 0xc2, 0x49, 0x51, 0x03, 0xfe, 0x9c, 0x00, 0x28, 0x8a, 0x53,
10309 0x05, 0x1f, 0x35, 0xa9, 0xfe, 0xbb, 0x45, 0x55, 0x00, 0x4e, 0x44, 0x06,
10310 0x7c, 0x43, 0xfe, 0xda, 0x14, 0x01, 0xaf, 0x8c, 0xfe, 0x4b, 0x45, 0xee,
10311 0x32, 0x07, 0xa5, 0xed, 0x03, 0xcd, 0x28, 0x8a, 0x03, 0x45, 0x28, 0x35,
10312 0x67, 0x02, 0x72, 0xfe, 0xc0, 0x5d, 0xfe, 0xf8, 0x14, 0xfe, 0x03, 0x17,
10313 0x03, 0x5c, 0xc1, 0x0c, 0x5c, 0x67, 0x2d, 0x01, 0x0b, 0x26, 0x89, 0x01,
10314 0xfe, 0x9e, 0x15, 0x02, 0x89, 0x01, 0x0b, 0x1c, 0x34, 0x1d, 0x4c, 0x33,
10315 0x31, 0xdf, 0x07, 0x06, 0x23, 0x4c, 0x01, 0xf1, 0xfe, 0x42, 0x58, 0xf1,
10316 0xfe, 0xa4, 0x14, 0x8c, 0xfe, 0x4a, 0xf4, 0x0a, 0x17, 0x4c, 0xfe, 0x4a,
10317 0xf4, 0x06, 0xea, 0x32, 0x07, 0xa5, 0x8b, 0x02, 0x72, 0x03, 0x45, 0xc1,
10318 0x0c, 0x45, 0x67, 0x2d, 0x01, 0x0b, 0x26, 0x89, 0x01, 0xfe, 0xcc, 0x15,
10319 0x02, 0x89, 0x0f, 0x06, 0x27, 0xfe, 0xbe, 0x13, 0x26, 0xfe, 0xd4, 0x13,
10320 0x76, 0xfe, 0x89, 0x48, 0x01, 0x0b, 0x21, 0x76, 0x04, 0x7b, 0xfe, 0xd0,
10321 0x13, 0x1c, 0xfe, 0xd0, 0x13, 0x1d, 0xfe, 0xbe, 0x13, 0x67, 0x2d, 0x01,
10322 0x0b, 0xfe, 0xd5, 0x10, 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93,
10323 0x1e, 0xfe, 0xff, 0x7f, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x04, 0x0f,
10324 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0x1e, 0x43, 0xfe, 0x30, 0x56,
10325 0xfe, 0x00, 0x5c, 0x04, 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93,
10326 0x04, 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0xfe, 0x0b, 0x58,
10327 0x04, 0x09, 0x5c, 0x01, 0x87, 0x09, 0x45, 0x01, 0x87, 0x04, 0xfe, 0x03,
10328 0xa1, 0x1e, 0x11, 0xff, 0x03, 0x00, 0x54, 0xfe, 0x00, 0xf4, 0x1f, 0x52,
10329 0xfe, 0x00, 0x7d, 0xfe, 0x01, 0x7d, 0xfe, 0x02, 0x7d, 0xfe, 0x03, 0x7c,
10330 0x6a, 0x2a, 0x0c, 0x5e, 0x14, 0x5f, 0x57, 0x3f, 0x7d, 0x40, 0x04, 0xdd,
10331 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x8d, 0x04, 0x01,
10332 0xfe, 0x0c, 0x19, 0xfe, 0x42, 0x48, 0x50, 0x51, 0x91, 0x01, 0x0b, 0x1d,
10333 0xfe, 0x96, 0x15, 0x33, 0x31, 0xe1, 0x01, 0x0b, 0x1d, 0xfe, 0x96, 0x15,
10334 0x33, 0x31, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59, 0x03, 0xcd, 0x28, 0xfe,
10335 0xcc, 0x12, 0x53, 0x05, 0x1a, 0xfe, 0xc4, 0x13, 0x21, 0x69, 0x1a, 0xee,
10336 0x55, 0xca, 0x6b, 0xfe, 0xdc, 0x14, 0x4d, 0x0f, 0x06, 0x18, 0xca, 0x7c,
10337 0x30, 0xfe, 0x78, 0x10, 0xff, 0x02, 0x83, 0x55, 0xab, 0xff, 0x02, 0x83,
10338 0x55, 0x69, 0x19, 0xae, 0x98, 0xfe, 0x30, 0x00, 0x96, 0xf2, 0x18, 0x6d,
10339 0x0f, 0x06, 0xfe, 0x56, 0x10, 0x69, 0x0a, 0xed, 0x98, 0xfe, 0x64, 0x00,
10340 0x96, 0xf2, 0x09, 0xfe, 0x64, 0x00, 0x18, 0x9e, 0x0f, 0x06, 0xfe, 0x28,
10341 0x10, 0x69, 0x06, 0xfe, 0x60, 0x13, 0x98, 0xfe, 0xc8, 0x00, 0x96, 0xf2,
10342 0x09, 0xfe, 0xc8, 0x00, 0x18, 0x59, 0x0f, 0x06, 0x88, 0x98, 0xfe, 0x90,
10343 0x01, 0x7a, 0xfe, 0x42, 0x15, 0x91, 0xe4, 0xfe, 0x43, 0xf4, 0x9f, 0xfe,
10344 0x56, 0xf0, 0xfe, 0x54, 0x15, 0xfe, 0x04, 0xf4, 0x71, 0xfe, 0x43, 0xf4,
10345 0x9e, 0xfe, 0xf3, 0x10, 0xfe, 0x40, 0x5c, 0x01, 0xfe, 0x16, 0x14, 0x1e,
10346 0x43, 0xec, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4, 0x6e, 0x7a, 0xfe, 0x90,
10347 0x15, 0xc4, 0x6e, 0xfe, 0x1c, 0x10, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4,
10348 0xcc, 0x7a, 0xfe, 0x90, 0x15, 0xc4, 0xcc, 0x88, 0x51, 0x21, 0xfe, 0x4d,
10349 0xf4, 0x00, 0xe9, 0x91, 0x0f, 0x06, 0xfe, 0xb4, 0x56, 0xfe, 0xc3, 0x58,
10350 0x04, 0x51, 0x0f, 0x0a, 0x04, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xf3, 0x16,
10351 0x0a, 0x01, 0x0b, 0x26, 0xf3, 0x16, 0x19, 0x01, 0x0b, 0x26, 0xf3, 0x76,
10352 0xfe, 0x89, 0x49, 0x01, 0x0b, 0x04, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xb1,
10353 0x16, 0x19, 0x01, 0x0b, 0x26, 0xb1, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xb1,
10354 0xfe, 0x89, 0x49, 0x01, 0x0b, 0x26, 0xb1, 0x76, 0xfe, 0x89, 0x4a, 0x01,
10355 0x0b, 0x04, 0x51, 0x04, 0x22, 0xd3, 0x07, 0x06, 0xfe, 0x48, 0x13, 0xb8,
10356 0x13, 0xd3, 0xfe, 0x49, 0xf4, 0x00, 0x4d, 0x76, 0xa9, 0x67, 0xfe, 0x01,
10357 0xec, 0xfe, 0x27, 0x01, 0xfe, 0x89, 0x48, 0xff, 0x02, 0x00, 0x10, 0x27,
10358 0xfe, 0x2e, 0x16, 0x32, 0x07, 0xfe, 0xe3, 0x00, 0xfe, 0x20, 0x13, 0x1d,
10359 0xfe, 0x52, 0x16, 0x21, 0x13, 0xd4, 0x01, 0x4b, 0x22, 0xd4, 0x07, 0x06,
10360 0x4e, 0x08, 0x54, 0x06, 0x37, 0x04, 0x09, 0x48, 0x01, 0x0e, 0xfb, 0x8e,
10361 0x07, 0x11, 0xae, 0x09, 0x84, 0x01, 0x0e, 0x8e, 0x09, 0x5d, 0x01, 0xa8,
10362 0x04, 0x09, 0x84, 0x01, 0x0e, 0x8e, 0xfe, 0x80, 0xe7, 0x11, 0x07, 0x11,
10363 0x8a, 0xfe, 0x45, 0x58, 0x01, 0xf0, 0x8e, 0x04, 0x09, 0x48, 0x01, 0x0e,
10364 0x8e, 0x09, 0x5d, 0x01, 0xa8, 0x04, 0x09, 0x48, 0x01, 0x0e, 0xfe, 0x80,
10365 0x80, 0xfe, 0x80, 0x4c, 0xfe, 0x49, 0xe4, 0x11, 0xae, 0x09, 0x84, 0x01,
10366 0x0e, 0xfe, 0x80, 0x4c, 0x09, 0x5d, 0x01, 0x87, 0x04, 0x18, 0x11, 0x75,
10367 0x6c, 0xfe, 0x60, 0x01, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x24,
10368 0x1c, 0xfe, 0x1d, 0xf7, 0x1b, 0x97, 0xfe, 0xee, 0x16, 0x01, 0xfe, 0xf4,
10369 0x17, 0xad, 0x9a, 0x1b, 0x6c, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x04,
10370 0xb9, 0x23, 0xfe, 0xde, 0x16, 0xfe, 0xda, 0x10, 0x18, 0x11, 0x75, 0x03,
10371 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x1f, 0xfe, 0x18, 0x58, 0x03, 0xfe,
10372 0x66, 0x01, 0xfe, 0x19, 0x58, 0x9a, 0x1f, 0xfe, 0x3c, 0x90, 0xfe, 0x30,
10373 0xf4, 0x06, 0xfe, 0x3c, 0x50, 0x6c, 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79,
10374 0xfe, 0x1c, 0xf7, 0x1f, 0x97, 0xfe, 0x38, 0x17, 0xfe, 0xb6, 0x14, 0x35,
10375 0x04, 0xb9, 0x23, 0xfe, 0x10, 0x17, 0xfe, 0x9c, 0x10, 0x18, 0x11, 0x75,
10376 0xfe, 0x83, 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x1d, 0xf7,
10377 0x2e, 0x97, 0xfe, 0x5a, 0x17, 0xfe, 0x94, 0x14, 0xec, 0x9a, 0x2e, 0x6c,
10378 0x1a, 0xfe, 0xaf, 0x19, 0xfe, 0x98, 0xe7, 0x00, 0x04, 0xb9, 0x23, 0xfe,
10379 0x4e, 0x17, 0xfe, 0x6c, 0x10, 0x18, 0x11, 0x75, 0xfe, 0x30, 0xbc, 0xfe,
10380 0xb2, 0xbc, 0x9a, 0xcb, 0x6c, 0x1a, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7,
10381 0xcb, 0x97, 0xfe, 0x92, 0x17, 0xfe, 0x5c, 0x14, 0x35, 0x04, 0xb9, 0x23,
10382 0xfe, 0x7e, 0x17, 0xfe, 0x42, 0x10, 0xfe, 0x02, 0xf6, 0x11, 0x75, 0xfe,
10383 0x18, 0xfe, 0x60, 0xfe, 0x19, 0xfe, 0x61, 0xfe, 0x03, 0xa1, 0xfe, 0x1d,
10384 0xf7, 0x5b, 0x97, 0xfe, 0xb8, 0x17, 0xfe, 0x36, 0x14, 0xfe, 0x1c, 0x13,
10385 0x9a, 0x5b, 0x41, 0xfe, 0x83, 0x58, 0xfe, 0xaf, 0x19, 0xfe, 0x80, 0xe7,
10386 0x11, 0xfe, 0x81, 0xe7, 0x11, 0x12, 0xfe, 0xdd, 0x00, 0x6a, 0x2a, 0x04,
10387 0x6a, 0x2a, 0xfe, 0x12, 0x45, 0x23, 0xfe, 0xa8, 0x17, 0x15, 0x06, 0x39,
10388 0xa0, 0xb4, 0x02, 0x2b, 0xfe, 0x39, 0xf0, 0xfe, 0xfc, 0x17, 0x21, 0x04,
10389 0xfe, 0x7e, 0x18, 0x1e, 0x19, 0x66, 0x0f, 0x0d, 0x04, 0x75, 0x03, 0xd2,
10390 0x1e, 0x06, 0xfe, 0xef, 0x12, 0xfe, 0xe1, 0x10, 0x7c, 0x6f, 0x4f, 0x32,
10391 0x07, 0x2f, 0xfe, 0x3c, 0x13, 0xf1, 0xfe, 0x42, 0x13, 0x42, 0x92, 0x09,
10392 0x48, 0x01, 0x0e, 0xbb, 0xeb, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01,
10393 0xf0, 0xfe, 0x00, 0xcc, 0xbb, 0xfe, 0xf3, 0x13, 0x43, 0x78, 0x07, 0x11,
10394 0xac, 0x09, 0x84, 0x01, 0x0e, 0xfe, 0x80, 0x4c, 0x01, 0x73, 0xfe, 0x16,
10395 0x10, 0x07, 0x82, 0x8b, 0xfe, 0x40, 0x14, 0xfe, 0x24, 0x12, 0xfe, 0x14,
10396 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x1c, 0x18, 0x18, 0x0a, 0x04, 0xfe, 0x9c,
10397 0xe7, 0x0a, 0x10, 0xfe, 0x15, 0x00, 0x64, 0x79, 0x2a, 0x01, 0xe3, 0x18,
10398 0x06, 0x04, 0x42, 0x92, 0x08, 0x54, 0x1b, 0x37, 0x12, 0x2f, 0x01, 0x73,
10399 0x18, 0x06, 0x04, 0xfe, 0x38, 0x90, 0xfe, 0xba, 0x90, 0x3a, 0xce, 0x3b,
10400 0xcf, 0xfe, 0x48, 0x55, 0x35, 0xfe, 0xc9, 0x55, 0x04, 0x22, 0xa3, 0x77,
10401 0x13, 0xa3, 0x04, 0x09, 0xa4, 0x01, 0x0e, 0xfe, 0x41, 0x48, 0x09, 0x46,
10402 0x01, 0x0e, 0xfe, 0x49, 0x44, 0x17, 0xfe, 0xe8, 0x18, 0x77, 0x78, 0x04,
10403 0x09, 0x48, 0x01, 0x0e, 0x07, 0x11, 0x4e, 0x09, 0x5d, 0x01, 0xa8, 0x09,
10404 0x46, 0x01, 0x0e, 0x77, 0x78, 0x04, 0xfe, 0x4e, 0xe4, 0x19, 0x6b, 0xfe,
10405 0x1c, 0x19, 0x03, 0xfe, 0x90, 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10,
10406 0xfe, 0x4e, 0xe4, 0xc9, 0x6b, 0xfe, 0x2e, 0x19, 0x03, 0xfe, 0x92, 0x00,
10407 0xfe, 0x02, 0xe6, 0x1a, 0xe5, 0xfe, 0x4e, 0xe4, 0xfe, 0x0b, 0x00, 0x6b,
10408 0xfe, 0x40, 0x19, 0x03, 0xfe, 0x94, 0x00, 0xfe, 0x02, 0xe6, 0x1f, 0xfe,
10409 0x08, 0x10, 0x03, 0xfe, 0x96, 0x00, 0xfe, 0x02, 0xe6, 0x6d, 0xfe, 0x4e,
10410 0x45, 0xea, 0xba, 0xff, 0x04, 0x68, 0x54, 0xe7, 0x1e, 0x6e, 0xfe, 0x08,
10411 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c, 0xfe, 0x1a, 0xf4, 0xfe, 0x00,
10412 0x04, 0xea, 0xfe, 0x48, 0xf4, 0x19, 0x7a, 0xfe, 0x74, 0x19, 0x0f, 0x19,
10413 0x04, 0x07, 0x7e, 0xfe, 0x5a, 0xf0, 0xfe, 0x84, 0x19, 0x25, 0xfe, 0x09,
10414 0x00, 0xfe, 0x34, 0x10, 0x07, 0x1a, 0xfe, 0x5a, 0xf0, 0xfe, 0x92, 0x19,
10415 0x25, 0xca, 0xfe, 0x26, 0x10, 0x07, 0x19, 0x66, 0x25, 0x6d, 0xe5, 0x07,
10416 0x0a, 0x66, 0x25, 0x9e, 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x66, 0x25, 0x59,
10417 0xa9, 0xb8, 0x04, 0x15, 0xfe, 0x09, 0x00, 0x01, 0x36, 0xfe, 0x04, 0xfe,
10418 0x81, 0x03, 0x83, 0xfe, 0x40, 0x5c, 0x04, 0x1c, 0xf7, 0xfe, 0x14, 0xf0,
10419 0x0b, 0x27, 0xfe, 0xd6, 0x19, 0x1c, 0xf7, 0x7b, 0xf7, 0xfe, 0x82, 0xf0,
10420 0xfe, 0xda, 0x19, 0x04, 0xff, 0xcc, 0x00, 0x00,
10423 static unsigned short _adv_asc38C0800_size = sizeof(_adv_asc38C0800_buf); /* 0x14E1 */
10424 static ADV_DCNT _adv_asc38C0800_chksum = 0x050D3FD8UL; /* Expanded little-endian checksum. */
10426 /* Microcode buffer is kept after initialization for error recovery. */
10427 static unsigned char _adv_asc38C1600_buf[] = {
10428 0x00, 0x00, 0x00, 0xf2, 0x00, 0x16, 0x00, 0xfc, 0x00, 0x10, 0x00, 0xf0,
10429 0x18, 0xe4, 0x01, 0x00, 0x04, 0x1e, 0x48, 0xe4, 0x03, 0xf6, 0xf7, 0x13,
10430 0x2e, 0x1e, 0x02, 0x00, 0x07, 0x17, 0xc0, 0x5f, 0x00, 0xfa, 0xff, 0xff,
10431 0x04, 0x00, 0x00, 0xf6, 0x09, 0xe7, 0x82, 0xe7, 0x85, 0xf0, 0x86, 0xf0,
10432 0x4e, 0x10, 0x9e, 0xe7, 0xff, 0x00, 0x55, 0xf0, 0x01, 0xf6, 0x03, 0x00,
10433 0x98, 0x57, 0x01, 0xe6, 0x00, 0xea, 0x00, 0xec, 0x01, 0xfa, 0x18, 0xf4,
10434 0x08, 0x00, 0xf0, 0x1d, 0x38, 0x54, 0x32, 0xf0, 0x10, 0x00, 0xc2, 0x0e,
10435 0x1e, 0xf0, 0xd5, 0xf0, 0xbc, 0x00, 0x4b, 0xe4, 0x00, 0xe6, 0xb1, 0xf0,
10436 0xb4, 0x00, 0x02, 0x13, 0x3e, 0x1c, 0xc8, 0x47, 0x3e, 0x00, 0xd8, 0x01,
10437 0x06, 0x13, 0x0c, 0x1c, 0x5e, 0x1e, 0x00, 0x57, 0xc8, 0x57, 0x01, 0xfc,
10438 0xbc, 0x0e, 0xa2, 0x12, 0xb9, 0x54, 0x00, 0x80, 0x62, 0x0a, 0x5a, 0x12,
10439 0xc8, 0x15, 0x3e, 0x1e, 0x18, 0x40, 0xbd, 0x56, 0x03, 0xe6, 0x01, 0xea,
10440 0x5c, 0xf0, 0x0f, 0x00, 0x20, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12,
10441 0x04, 0x13, 0xbb, 0x55, 0x3c, 0x56, 0x3e, 0x57, 0x03, 0x58, 0x4a, 0xe4,
10442 0x40, 0x00, 0xb6, 0x00, 0xbb, 0x00, 0xc0, 0x00, 0x00, 0x01, 0x01, 0x01,
10443 0x3e, 0x01, 0x58, 0x0a, 0x44, 0x10, 0x0a, 0x12, 0x4c, 0x1c, 0x4e, 0x1c,
10444 0x02, 0x4a, 0x30, 0xe4, 0x05, 0xe6, 0x0c, 0x00, 0x3c, 0x00, 0x80, 0x00,
10445 0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01, 0x70, 0x01, 0x72, 0x01,
10446 0x74, 0x01, 0x76, 0x01, 0x78, 0x01, 0x7c, 0x01, 0xc6, 0x0e, 0x0c, 0x10,
10447 0xac, 0x12, 0xae, 0x12, 0x16, 0x1a, 0x32, 0x1c, 0x6e, 0x1e, 0x02, 0x48,
10448 0x3a, 0x55, 0xc9, 0x57, 0x02, 0xee, 0x5b, 0xf0, 0x03, 0xf7, 0x06, 0xf7,
10449 0x03, 0xfc, 0x06, 0x00, 0x1e, 0x00, 0xbe, 0x00, 0xe1, 0x00, 0x0c, 0x12,
10450 0x18, 0x1a, 0x70, 0x1a, 0x30, 0x1c, 0x38, 0x1c, 0x10, 0x44, 0x00, 0x4c,
10451 0xb0, 0x57, 0x40, 0x5c, 0x4d, 0xe4, 0x04, 0xea, 0x5d, 0xf0, 0xa7, 0xf0,
10452 0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x09, 0x00, 0x19, 0x00, 0x32, 0x00,
10453 0x33, 0x00, 0x34, 0x00, 0x36, 0x00, 0x98, 0x00, 0x9e, 0x00, 0xcc, 0x00,
10454 0x20, 0x01, 0x4e, 0x01, 0x79, 0x01, 0x3c, 0x09, 0x68, 0x0d, 0x02, 0x10,
10455 0x04, 0x10, 0x3a, 0x10, 0x08, 0x12, 0x0a, 0x13, 0x40, 0x16, 0x50, 0x16,
10456 0x00, 0x17, 0x4a, 0x19, 0x00, 0x4e, 0x00, 0x54, 0x01, 0x58, 0x00, 0xdc,
10457 0x05, 0xf0, 0x09, 0xf0, 0x59, 0xf0, 0xb8, 0xf0, 0x48, 0xf4, 0x0e, 0xf7,
10458 0x0a, 0x00, 0x9b, 0x00, 0x9c, 0x00, 0xa4, 0x00, 0xb5, 0x00, 0xba, 0x00,
10459 0xd0, 0x00, 0xe7, 0x00, 0xf0, 0x03, 0x69, 0x08, 0xe9, 0x09, 0x5c, 0x0c,
10460 0xb6, 0x12, 0xbc, 0x19, 0xd8, 0x1b, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c,
10461 0x42, 0x1d, 0x08, 0x44, 0x38, 0x44, 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46,
10462 0x89, 0x48, 0x68, 0x54, 0x83, 0x55, 0x83, 0x59, 0x31, 0xe4, 0x02, 0xe6,
10463 0x07, 0xf0, 0x08, 0xf0, 0x0b, 0xf0, 0x0c, 0xf0, 0x4b, 0xf4, 0x04, 0xf8,
10464 0x05, 0xf8, 0x02, 0xfa, 0x03, 0xfa, 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00,
10465 0xa8, 0x00, 0xaa, 0x00, 0xb9, 0x00, 0xe0, 0x00, 0xe5, 0x00, 0x22, 0x01,
10466 0x26, 0x01, 0x60, 0x01, 0x7a, 0x01, 0x82, 0x01, 0xc8, 0x01, 0xca, 0x01,
10467 0x86, 0x02, 0x6a, 0x03, 0x18, 0x05, 0xb2, 0x07, 0x68, 0x08, 0x10, 0x0d,
10468 0x06, 0x10, 0x0a, 0x10, 0x0e, 0x10, 0x12, 0x10, 0x60, 0x10, 0xed, 0x10,
10469 0xf3, 0x10, 0x06, 0x12, 0x10, 0x12, 0x1e, 0x12, 0x0c, 0x13, 0x0e, 0x13,
10470 0x10, 0x13, 0xfe, 0x9c, 0xf0, 0x35, 0x05, 0xfe, 0xec, 0x0e, 0xff, 0x10,
10471 0x00, 0x00, 0xe9, 0xfe, 0x34, 0x1f, 0x00, 0xe8, 0xfe, 0x88, 0x01, 0xff,
10472 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00,
10473 0x00, 0xfe, 0x57, 0x24, 0x00, 0xfe, 0x4c, 0x00, 0x65, 0xff, 0x04, 0x00,
10474 0x00, 0x1a, 0xff, 0x09, 0x00, 0x00, 0xff, 0x08, 0x01, 0x01, 0xff, 0x08,
10475 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, 0xff, 0xff, 0xff, 0x13,
10476 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00,
10477 0xfe, 0x04, 0xf7, 0xe8, 0x37, 0x7d, 0x0d, 0x01, 0xfe, 0x4a, 0x11, 0xfe,
10478 0x04, 0xf7, 0xe8, 0x7d, 0x0d, 0x51, 0x37, 0xfe, 0x3d, 0xf0, 0xfe, 0x0c,
10479 0x02, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x91, 0xf0, 0xfe, 0xf8, 0x01, 0xfe,
10480 0x90, 0xf0, 0xfe, 0xf8, 0x01, 0xfe, 0x8f, 0xf0, 0xbc, 0x03, 0x67, 0x4d,
10481 0x05, 0xfe, 0x08, 0x0f, 0x01, 0xfe, 0x78, 0x0f, 0xfe, 0xdd, 0x12, 0x05,
10482 0xfe, 0x0e, 0x03, 0xfe, 0x28, 0x1c, 0x03, 0xfe, 0xa6, 0x00, 0xfe, 0xd1,
10483 0x12, 0x3e, 0x22, 0xfe, 0xa6, 0x00, 0xac, 0xfe, 0x48, 0xf0, 0xfe, 0x90,
10484 0x02, 0xfe, 0x49, 0xf0, 0xfe, 0xaa, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc8,
10485 0x02, 0xfe, 0x46, 0xf0, 0xfe, 0x5a, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x60,
10486 0x02, 0xfe, 0x43, 0xf0, 0xfe, 0x4e, 0x02, 0xfe, 0x44, 0xf0, 0xfe, 0x52,
10487 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x56, 0x02, 0x1c, 0x0d, 0xa2, 0x1c, 0x07,
10488 0x22, 0xb7, 0x05, 0x35, 0xfe, 0x00, 0x1c, 0xfe, 0xf1, 0x10, 0xfe, 0x02,
10489 0x1c, 0xf5, 0xfe, 0x1e, 0x1c, 0xfe, 0xe9, 0x10, 0x01, 0x5f, 0xfe, 0xe7,
10490 0x10, 0xfe, 0x06, 0xfc, 0xde, 0x0a, 0x81, 0x01, 0xa3, 0x05, 0x35, 0x1f,
10491 0x95, 0x47, 0xb8, 0x01, 0xfe, 0xe4, 0x11, 0x0a, 0x81, 0x01, 0x5c, 0xfe,
10492 0xbd, 0x10, 0x0a, 0x81, 0x01, 0x5c, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c,
10493 0xfe, 0x58, 0x1c, 0x1c, 0x07, 0x22, 0xb7, 0x37, 0x2a, 0x35, 0xfe, 0x3d,
10494 0xf0, 0xfe, 0x0c, 0x02, 0x2b, 0xfe, 0x9e, 0x02, 0xfe, 0x5a, 0x1c, 0xfe,
10495 0x12, 0x1c, 0xfe, 0x14, 0x1c, 0x1f, 0xfe, 0x30, 0x00, 0x47, 0xb8, 0x01,
10496 0xfe, 0xd4, 0x11, 0x1c, 0x07, 0x22, 0xb7, 0x05, 0xe9, 0x21, 0x2c, 0x09,
10497 0x1a, 0x31, 0xfe, 0x69, 0x10, 0x1c, 0x07, 0x22, 0xb7, 0xfe, 0x04, 0xec,
10498 0x2c, 0x60, 0x01, 0xfe, 0x1e, 0x1e, 0x20, 0x2c, 0xfe, 0x05, 0xf6, 0xde,
10499 0x01, 0xfe, 0x62, 0x1b, 0x01, 0x0c, 0x61, 0x4a, 0x44, 0x15, 0x56, 0x51,
10500 0x01, 0xfe, 0x9e, 0x1e, 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x0a, 0x57,
10501 0x01, 0x18, 0x09, 0x00, 0x36, 0x01, 0x85, 0xfe, 0x18, 0x10, 0xfe, 0x41,
10502 0x58, 0x0a, 0xba, 0x01, 0x18, 0xfe, 0xc8, 0x54, 0x7b, 0xfe, 0x1c, 0x03,
10503 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x37, 0x60, 0xfe, 0x02, 0xe8, 0x30,
10504 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43, 0xfe, 0x77, 0x57, 0xfe, 0x27, 0xf0,
10505 0xfe, 0xe4, 0x01, 0xfe, 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x40,
10506 0x1c, 0x2a, 0xeb, 0xfe, 0x26, 0xf0, 0xfe, 0x66, 0x03, 0xfe, 0xa0, 0xf0,
10507 0xfe, 0x54, 0x03, 0xfe, 0x11, 0xf0, 0xbc, 0xfe, 0xef, 0x10, 0xfe, 0x9f,
10508 0xf0, 0xfe, 0x74, 0x03, 0xfe, 0x46, 0x1c, 0x19, 0xfe, 0x11, 0x00, 0x05,
10509 0x70, 0x37, 0xfe, 0x48, 0x1c, 0xfe, 0x46, 0x1c, 0x01, 0x0c, 0x06, 0x28,
10510 0xfe, 0x18, 0x13, 0x26, 0x21, 0xb9, 0xc7, 0x20, 0xb9, 0x0a, 0x57, 0x01,
10511 0x18, 0xc7, 0x89, 0x01, 0xfe, 0xc8, 0x1a, 0x15, 0xe1, 0x2a, 0xeb, 0xfe,
10512 0x01, 0xf0, 0xeb, 0xfe, 0x82, 0xf0, 0xfe, 0xa4, 0x03, 0xfe, 0x9c, 0x32,
10513 0x15, 0xfe, 0xe4, 0x00, 0x2f, 0xfe, 0xb6, 0x03, 0x2a, 0x3c, 0x16, 0xfe,
10514 0xc6, 0x03, 0x01, 0x41, 0xfe, 0x06, 0xf0, 0xfe, 0xd6, 0x03, 0xaf, 0xa0,
10515 0xfe, 0x0a, 0xf0, 0xfe, 0xa2, 0x07, 0x05, 0x29, 0x03, 0x81, 0x1e, 0x1b,
10516 0xfe, 0x24, 0x05, 0x1f, 0x63, 0x01, 0x42, 0x8f, 0xfe, 0x70, 0x02, 0x05,
10517 0xea, 0xfe, 0x46, 0x1c, 0x37, 0x7d, 0x1d, 0xfe, 0x67, 0x1b, 0xfe, 0xbf,
10518 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x48, 0x1c, 0x75, 0x01, 0xa6, 0x86, 0x0a,
10519 0x57, 0x01, 0x18, 0x09, 0x00, 0x1b, 0xec, 0x0a, 0xe1, 0x01, 0x18, 0x77,
10520 0x50, 0x40, 0x8d, 0x30, 0x03, 0x81, 0x1e, 0xf8, 0x1f, 0x63, 0x01, 0x42,
10521 0x8f, 0xfe, 0x70, 0x02, 0x05, 0xea, 0xd7, 0x99, 0xd8, 0x9c, 0x2a, 0x29,
10522 0x2f, 0xfe, 0x4e, 0x04, 0x16, 0xfe, 0x4a, 0x04, 0x7e, 0xfe, 0xa0, 0x00,
10523 0xfe, 0x9b, 0x57, 0xfe, 0x54, 0x12, 0x32, 0xff, 0x02, 0x00, 0x10, 0x01,
10524 0x08, 0x16, 0xfe, 0x02, 0x05, 0x32, 0x01, 0x08, 0x16, 0x29, 0x27, 0x25,
10525 0xee, 0xfe, 0x4c, 0x44, 0xfe, 0x58, 0x12, 0x50, 0xfe, 0x44, 0x48, 0x13,
10526 0x34, 0xfe, 0x4c, 0x54, 0x7b, 0xec, 0x60, 0x8d, 0x30, 0x01, 0xfe, 0x4e,
10527 0x1e, 0xfe, 0x48, 0x47, 0xfe, 0x7c, 0x13, 0x01, 0x0c, 0x06, 0x28, 0xfe,
10528 0x32, 0x13, 0x01, 0x43, 0x09, 0x9b, 0xfe, 0x68, 0x13, 0xfe, 0x26, 0x10,
10529 0x13, 0x34, 0xfe, 0x4c, 0x54, 0x7b, 0xec, 0x01, 0xfe, 0x4e, 0x1e, 0xfe,
10530 0x48, 0x47, 0xfe, 0x54, 0x13, 0x01, 0x0c, 0x06, 0x28, 0xa5, 0x01, 0x43,
10531 0x09, 0x9b, 0xfe, 0x40, 0x13, 0x01, 0x0c, 0x06, 0x28, 0xf9, 0x1f, 0x7f,
10532 0x01, 0x0c, 0x06, 0x07, 0x4d, 0x1f, 0xfe, 0x0d, 0x00, 0x01, 0x42, 0x8f,
10533 0xfe, 0xa4, 0x0e, 0x05, 0x29, 0x32, 0x15, 0xfe, 0xe6, 0x00, 0x0f, 0xfe,
10534 0x1c, 0x90, 0x04, 0xfe, 0x9c, 0x93, 0x3a, 0x0b, 0x0e, 0x8b, 0x02, 0x1f,
10535 0x7f, 0x01, 0x42, 0x05, 0x35, 0xfe, 0x42, 0x5b, 0x7d, 0x1d, 0xfe, 0x46,
10536 0x59, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0x0f, 0xfe, 0x87, 0x80, 0x04,
10537 0xfe, 0x87, 0x83, 0xfe, 0xc9, 0x47, 0x0b, 0x0e, 0xd0, 0x65, 0x01, 0x0c,
10538 0x06, 0x0d, 0xfe, 0x98, 0x13, 0x0f, 0xfe, 0x20, 0x80, 0x04, 0xfe, 0xa0,
10539 0x83, 0x33, 0x0b, 0x0e, 0x09, 0x1d, 0xfe, 0x84, 0x12, 0x01, 0x38, 0x06,
10540 0x07, 0xfe, 0x70, 0x13, 0x03, 0xfe, 0xa2, 0x00, 0x1e, 0x1b, 0xfe, 0xda,
10541 0x05, 0xd0, 0x54, 0x01, 0x38, 0x06, 0x0d, 0xfe, 0x58, 0x13, 0x03, 0xfe,
10542 0xa0, 0x00, 0x1e, 0xfe, 0x50, 0x12, 0x5e, 0xff, 0x02, 0x00, 0x10, 0x2f,
10543 0xfe, 0x90, 0x05, 0x2a, 0x3c, 0xcc, 0xff, 0x02, 0x00, 0x10, 0x2f, 0xfe,
10544 0x9e, 0x05, 0x17, 0xfe, 0xf4, 0x05, 0x15, 0xfe, 0xe3, 0x00, 0x26, 0x01,
10545 0x38, 0xfe, 0x4a, 0xf0, 0xfe, 0xc0, 0x05, 0xfe, 0x49, 0xf0, 0xfe, 0xba,
10546 0x05, 0x71, 0x2e, 0xfe, 0x21, 0x00, 0xf1, 0x2e, 0xfe, 0x22, 0x00, 0xa2,
10547 0x2e, 0x4a, 0xfe, 0x09, 0x48, 0xff, 0x02, 0x00, 0x10, 0x2f, 0xfe, 0xd0,
10548 0x05, 0x17, 0xfe, 0xf4, 0x05, 0xfe, 0xe2, 0x08, 0x01, 0x38, 0x06, 0xfe,
10549 0x1c, 0x00, 0x4d, 0x01, 0xa7, 0x2e, 0x07, 0x20, 0xe4, 0x47, 0xfe, 0x27,
10550 0x01, 0x01, 0x0c, 0x06, 0x28, 0xfe, 0x24, 0x12, 0x3e, 0x01, 0x84, 0x1f,
10551 0x7f, 0x01, 0x0c, 0x06, 0x07, 0x4d, 0x1f, 0xfe, 0x0d, 0x00, 0x01, 0x42,
10552 0x8f, 0xfe, 0xa4, 0x0e, 0x05, 0x29, 0x03, 0xe6, 0x1e, 0xfe, 0xca, 0x13,
10553 0x03, 0xb6, 0x1e, 0xfe, 0x40, 0x12, 0x03, 0x66, 0x1e, 0xfe, 0x38, 0x13,
10554 0x3e, 0x01, 0x84, 0x17, 0xfe, 0x72, 0x06, 0x0a, 0x07, 0x01, 0x38, 0x06,
10555 0x24, 0xfe, 0x02, 0x12, 0x4f, 0x01, 0xfe, 0x56, 0x19, 0x16, 0xfe, 0x68,
10556 0x06, 0x15, 0x82, 0x01, 0x41, 0x15, 0xe2, 0x03, 0x66, 0x8a, 0x10, 0x66,
10557 0x03, 0x9a, 0x1e, 0xfe, 0x70, 0x12, 0x03, 0x55, 0x1e, 0xfe, 0x68, 0x13,
10558 0x01, 0xc6, 0x09, 0x12, 0x48, 0xfe, 0x92, 0x06, 0x2e, 0x12, 0x01, 0xfe,
10559 0xac, 0x1d, 0xfe, 0x43, 0x48, 0x62, 0x80, 0x13, 0x58, 0xff, 0x02, 0x00,
10560 0x57, 0x52, 0xad, 0x23, 0x3f, 0x4e, 0x62, 0x49, 0x3e, 0x01, 0x84, 0x17,
10561 0xfe, 0xea, 0x06, 0x01, 0x38, 0x06, 0x12, 0xf7, 0x45, 0x0a, 0x95, 0x01,
10562 0xfe, 0x84, 0x19, 0x16, 0xfe, 0xe0, 0x06, 0x15, 0x82, 0x01, 0x41, 0x15,
10563 0xe2, 0x03, 0x55, 0x8a, 0x10, 0x55, 0x1c, 0x07, 0x01, 0x84, 0xfe, 0xae,
10564 0x10, 0x03, 0x6f, 0x1e, 0xfe, 0x9e, 0x13, 0x3e, 0x01, 0x84, 0x03, 0x9a,
10565 0x1e, 0xfe, 0x1a, 0x12, 0x01, 0x38, 0x06, 0x12, 0xfc, 0x01, 0xc6, 0x01,
10566 0xfe, 0xac, 0x1d, 0xfe, 0x43, 0x48, 0x62, 0x80, 0xf0, 0x45, 0x0a, 0x95,
10567 0x03, 0xb6, 0x1e, 0xf8, 0x01, 0x38, 0x06, 0x24, 0x36, 0xfe, 0x02, 0xf6,
10568 0x07, 0x71, 0x78, 0x8c, 0x00, 0x4d, 0x62, 0x49, 0x3e, 0x2d, 0x93, 0x4e,
10569 0xd0, 0x0d, 0x17, 0xfe, 0x9a, 0x07, 0x01, 0xfe, 0xc0, 0x19, 0x16, 0xfe,
10570 0x90, 0x07, 0x26, 0x20, 0x9e, 0x15, 0x82, 0x01, 0x41, 0x15, 0xe2, 0x21,
10571 0x9e, 0x09, 0x07, 0xfb, 0x03, 0xe6, 0xfe, 0x58, 0x57, 0x10, 0xe6, 0x05,
10572 0xfe, 0x2a, 0x06, 0x03, 0x6f, 0x8a, 0x10, 0x6f, 0x1c, 0x07, 0x01, 0x84,
10573 0xfe, 0x9c, 0x32, 0x5f, 0x75, 0x01, 0xa6, 0x86, 0x15, 0xfe, 0xe2, 0x00,
10574 0x2f, 0xed, 0x2a, 0x3c, 0xfe, 0x0a, 0xf0, 0xfe, 0xce, 0x07, 0xae, 0xfe,
10575 0x96, 0x08, 0xfe, 0x06, 0xf0, 0xfe, 0x9e, 0x08, 0xaf, 0xa0, 0x05, 0x29,
10576 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x2e, 0x12, 0x14, 0x1d, 0x01, 0x08, 0x14,
10577 0x00, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0xfe,
10578 0x99, 0xa4, 0x01, 0x08, 0x14, 0x00, 0x05, 0xfe, 0xc6, 0x09, 0x01, 0x76,
10579 0x06, 0x12, 0xfe, 0x3a, 0x12, 0x01, 0x0c, 0x06, 0x12, 0xfe, 0x30, 0x13,
10580 0x14, 0xfe, 0x1b, 0x00, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0x14, 0x00,
10581 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0x14, 0x07, 0x01, 0x08, 0x14, 0x00,
10582 0x05, 0xef, 0x7c, 0x4a, 0x78, 0x4f, 0x0f, 0xfe, 0x9a, 0x81, 0x04, 0xfe,
10583 0x9a, 0x83, 0xfe, 0xcb, 0x47, 0x0b, 0x0e, 0x2d, 0x28, 0x48, 0xfe, 0x6c,
10584 0x08, 0x0a, 0x28, 0xfe, 0x09, 0x6f, 0xca, 0xfe, 0xca, 0x45, 0xfe, 0x32,
10585 0x12, 0x53, 0x63, 0x4e, 0x7c, 0x97, 0x2f, 0xfe, 0x7e, 0x08, 0x2a, 0x3c,
10586 0xfe, 0x0a, 0xf0, 0xfe, 0x6c, 0x08, 0xaf, 0xa0, 0xae, 0xfe, 0x96, 0x08,
10587 0x05, 0x29, 0x01, 0x41, 0x05, 0xed, 0x14, 0x24, 0x05, 0xed, 0xfe, 0x9c,
10588 0xf7, 0x9f, 0x01, 0xfe, 0xae, 0x1e, 0xfe, 0x18, 0x58, 0x01, 0xfe, 0xbe,
10589 0x1e, 0xfe, 0x99, 0x58, 0xfe, 0x78, 0x18, 0xfe, 0xf9, 0x18, 0x8e, 0xfe,
10590 0x16, 0x09, 0x10, 0x6a, 0x22, 0x6b, 0x01, 0x0c, 0x61, 0x54, 0x44, 0x21,
10591 0x2c, 0x09, 0x1a, 0xf8, 0x77, 0x01, 0xfe, 0x7e, 0x1e, 0x47, 0x2c, 0x7a,
10592 0x30, 0xf0, 0xfe, 0x83, 0xe7, 0xfe, 0x3f, 0x00, 0x71, 0xfe, 0x03, 0x40,
10593 0x01, 0x0c, 0x61, 0x65, 0x44, 0x01, 0xc2, 0xc8, 0xfe, 0x1f, 0x40, 0x20,
10594 0x6e, 0x01, 0xfe, 0x6a, 0x16, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0xfe,
10595 0x44, 0x51, 0xfe, 0xc6, 0x51, 0xfe, 0x10, 0x10, 0x01, 0xfe, 0xce, 0x1e,
10596 0x01, 0xfe, 0xde, 0x1e, 0x10, 0x68, 0x22, 0x69, 0x01, 0xfe, 0xee, 0x1e,
10597 0x01, 0xfe, 0xfe, 0x1e, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x10, 0x4b,
10598 0x22, 0x4c, 0xfe, 0x8a, 0x10, 0x01, 0x0c, 0x06, 0x54, 0xfe, 0x50, 0x12,
10599 0x01, 0xfe, 0xae, 0x1e, 0x01, 0xfe, 0xbe, 0x1e, 0x10, 0x6a, 0x22, 0x6b,
10600 0x01, 0x0c, 0x06, 0x65, 0x4e, 0x01, 0xc2, 0x0f, 0xfe, 0x1f, 0x80, 0x04,
10601 0xfe, 0x9f, 0x83, 0x33, 0x0b, 0x0e, 0x20, 0x6e, 0x0f, 0xfe, 0x44, 0x90,
10602 0x04, 0xfe, 0xc4, 0x93, 0x3a, 0x0b, 0xfe, 0xc6, 0x90, 0x04, 0xfe, 0xc6,
10603 0x93, 0x79, 0x0b, 0x0e, 0x10, 0x6c, 0x22, 0x6d, 0x01, 0xfe, 0xce, 0x1e,
10604 0x01, 0xfe, 0xde, 0x1e, 0x10, 0x68, 0x22, 0x69, 0x0f, 0xfe, 0x40, 0x90,
10605 0x04, 0xfe, 0xc0, 0x93, 0x3a, 0x0b, 0xfe, 0xc2, 0x90, 0x04, 0xfe, 0xc2,
10606 0x93, 0x79, 0x0b, 0x0e, 0x10, 0x4b, 0x22, 0x4c, 0x10, 0x64, 0x22, 0x34,
10607 0x01, 0x0c, 0x61, 0x24, 0x44, 0x37, 0x13, 0xfe, 0x4e, 0x11, 0x2f, 0xfe,
10608 0xde, 0x09, 0xfe, 0x9e, 0xf0, 0xfe, 0xf2, 0x09, 0xfe, 0x01, 0x48, 0x1b,
10609 0x3c, 0x37, 0x88, 0xf5, 0xd4, 0xfe, 0x1e, 0x0a, 0xd5, 0xfe, 0x42, 0x0a,
10610 0xd2, 0xfe, 0x1e, 0x0a, 0xd3, 0xfe, 0x42, 0x0a, 0xae, 0xfe, 0x12, 0x0a,
10611 0xfe, 0x06, 0xf0, 0xfe, 0x18, 0x0a, 0xaf, 0xa0, 0x05, 0x29, 0x01, 0x41,
10612 0xfe, 0xc1, 0x10, 0x14, 0x24, 0xfe, 0xc1, 0x10, 0x01, 0x76, 0x06, 0x07,
10613 0xfe, 0x14, 0x12, 0x01, 0x76, 0x06, 0x0d, 0x5d, 0x01, 0x0c, 0x06, 0x0d,
10614 0xfe, 0x74, 0x12, 0xfe, 0x2e, 0x1c, 0x05, 0xfe, 0x1a, 0x0c, 0x01, 0x76,
10615 0x06, 0x07, 0x5d, 0x01, 0x76, 0x06, 0x0d, 0x41, 0xfe, 0x2c, 0x1c, 0xfe,
10616 0xaa, 0xf0, 0xfe, 0xce, 0x0a, 0xfe, 0xac, 0xf0, 0xfe, 0x66, 0x0a, 0xfe,
10617 0x92, 0x10, 0xc4, 0xf6, 0xfe, 0xad, 0xf0, 0xfe, 0x72, 0x0a, 0x05, 0xfe,
10618 0x1a, 0x0c, 0xc5, 0xfe, 0xe7, 0x10, 0xfe, 0x2b, 0xf0, 0xbf, 0xfe, 0x6b,
10619 0x18, 0x23, 0xfe, 0x00, 0xfe, 0xfe, 0x1c, 0x12, 0xac, 0xfe, 0xd2, 0xf0,
10620 0xbf, 0xfe, 0x76, 0x18, 0x23, 0x1d, 0x1b, 0xbf, 0x03, 0xe3, 0x23, 0x07,
10621 0x1b, 0xbf, 0xd4, 0x5b, 0xd5, 0x5b, 0xd2, 0x5b, 0xd3, 0x5b, 0xc4, 0xc5,
10622 0xfe, 0xa9, 0x10, 0x75, 0x5e, 0x32, 0x1f, 0x7f, 0x01, 0x42, 0x19, 0xfe,
10623 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x70, 0x19, 0x98, 0x05, 0x70, 0xfe, 0x74,
10624 0x18, 0x23, 0xfe, 0x00, 0xf8, 0x1b, 0x5b, 0x7d, 0x12, 0x01, 0xfe, 0x78,
10625 0x0f, 0x4d, 0x01, 0xfe, 0x96, 0x1a, 0x21, 0x30, 0x77, 0x7d, 0x1d, 0x05,
10626 0x5b, 0x01, 0x0c, 0x06, 0x0d, 0x2b, 0xfe, 0xe2, 0x0b, 0x01, 0x0c, 0x06,
10627 0x54, 0xfe, 0xa6, 0x12, 0x01, 0x0c, 0x06, 0x24, 0xfe, 0x88, 0x13, 0x21,
10628 0x6e, 0xc7, 0x01, 0xfe, 0x1e, 0x1f, 0x0f, 0xfe, 0x83, 0x80, 0x04, 0xfe,
10629 0x83, 0x83, 0xfe, 0xc9, 0x47, 0x0b, 0x0e, 0xfe, 0xc8, 0x44, 0xfe, 0x42,
10630 0x13, 0x0f, 0xfe, 0x04, 0x91, 0x04, 0xfe, 0x84, 0x93, 0xfe, 0xca, 0x57,
10631 0x0b, 0xfe, 0x86, 0x91, 0x04, 0xfe, 0x86, 0x93, 0xfe, 0xcb, 0x57, 0x0b,
10632 0x0e, 0x7a, 0x30, 0xfe, 0x40, 0x59, 0xfe, 0xc1, 0x59, 0x8e, 0x40, 0x03,
10633 0x6a, 0x3b, 0x6b, 0x10, 0x97, 0x22, 0x98, 0xd9, 0x6a, 0xda, 0x6b, 0x01,
10634 0xc2, 0xc8, 0x7a, 0x30, 0x20, 0x6e, 0xdb, 0x64, 0xdc, 0x34, 0x91, 0x6c,
10635 0x7e, 0x6d, 0xfe, 0x44, 0x55, 0xfe, 0xe5, 0x55, 0xfe, 0x04, 0xfa, 0x64,
10636 0xfe, 0x05, 0xfa, 0x34, 0x01, 0xfe, 0x6a, 0x16, 0xa3, 0x26, 0x10, 0x97,
10637 0x10, 0x98, 0x91, 0x6c, 0x7e, 0x6d, 0xfe, 0x14, 0x10, 0x01, 0x0c, 0x06,
10638 0x24, 0x1b, 0x40, 0x91, 0x4b, 0x7e, 0x4c, 0x01, 0x0c, 0x06, 0xfe, 0xf7,
10639 0x00, 0x44, 0x03, 0x68, 0x3b, 0x69, 0xfe, 0x10, 0x58, 0xfe, 0x91, 0x58,
10640 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0x05, 0x5b, 0x01, 0x0c, 0x06, 0x24,
10641 0x1b, 0x40, 0x01, 0x0c, 0x06, 0xfe, 0xf7, 0x00, 0x44, 0x78, 0x01, 0xfe,
10642 0x8e, 0x1e, 0x4f, 0x0f, 0xfe, 0x10, 0x90, 0x04, 0xfe, 0x90, 0x93, 0x3a,
10643 0x0b, 0xfe, 0x92, 0x90, 0x04, 0xfe, 0x92, 0x93, 0x79, 0x0b, 0x0e, 0xfe,
10644 0xbd, 0x10, 0x01, 0x43, 0x09, 0xbb, 0x1b, 0xfe, 0x6e, 0x0a, 0x15, 0xbb,
10645 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x14, 0x13, 0x03, 0x4b, 0x3b, 0x4c, 0x8e,
10646 0xfe, 0x6e, 0x0a, 0xfe, 0x0c, 0x58, 0xfe, 0x8d, 0x58, 0x05, 0x5b, 0x26,
10647 0x3e, 0x0f, 0xfe, 0x19, 0x80, 0x04, 0xfe, 0x99, 0x83, 0x33, 0x0b, 0x0e,
10648 0xfe, 0xe5, 0x10, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x1a, 0x12, 0xfe, 0x6c,
10649 0x19, 0xfe, 0x19, 0x41, 0xfe, 0x6b, 0x18, 0xac, 0xfe, 0xd1, 0xf0, 0xef,
10650 0x1f, 0x92, 0x01, 0x42, 0x19, 0xfe, 0x44, 0x00, 0xfe, 0x90, 0x10, 0xfe,
10651 0x6c, 0x19, 0xd9, 0x4b, 0xfe, 0xed, 0x19, 0xda, 0x4c, 0xfe, 0x0c, 0x51,
10652 0xfe, 0x8e, 0x51, 0xfe, 0x6b, 0x18, 0x23, 0xfe, 0x00, 0xff, 0x31, 0xfe,
10653 0x76, 0x10, 0xac, 0xfe, 0xd2, 0xf0, 0xfe, 0xba, 0x0c, 0xfe, 0x76, 0x18,
10654 0x23, 0x1d, 0x5d, 0x03, 0xe3, 0x23, 0x07, 0xfe, 0x08, 0x13, 0x19, 0xfe,
10655 0x16, 0x00, 0x05, 0x70, 0xfe, 0xd1, 0xf0, 0xfe, 0xcc, 0x0c, 0x1f, 0x92,
10656 0x01, 0x42, 0x19, 0xfe, 0x17, 0x00, 0x5c, 0xfe, 0xce, 0xf0, 0xfe, 0xd2,
10657 0x0c, 0xfe, 0x3e, 0x10, 0xfe, 0xcd, 0xf0, 0xfe, 0xde, 0x0c, 0x19, 0xfe,
10658 0x22, 0x00, 0x05, 0x70, 0xfe, 0xcb, 0xf0, 0xfe, 0xea, 0x0c, 0x19, 0xfe,
10659 0x24, 0x00, 0x05, 0x70, 0xfe, 0xd0, 0xf0, 0xfe, 0xf4, 0x0c, 0x19, 0x94,
10660 0xfe, 0x1c, 0x10, 0xfe, 0xcf, 0xf0, 0xfe, 0xfe, 0x0c, 0x19, 0x4a, 0xf3,
10661 0xfe, 0xcc, 0xf0, 0xef, 0x01, 0x76, 0x06, 0x24, 0x4d, 0x19, 0xfe, 0x12,
10662 0x00, 0x37, 0x13, 0xfe, 0x4e, 0x11, 0x2f, 0xfe, 0x16, 0x0d, 0xfe, 0x9e,
10663 0xf0, 0xfe, 0x2a, 0x0d, 0xfe, 0x01, 0x48, 0x1b, 0x3c, 0x37, 0x88, 0xf5,
10664 0xd4, 0x29, 0xd5, 0x29, 0xd2, 0x29, 0xd3, 0x29, 0x37, 0xfe, 0x9c, 0x32,
10665 0x2f, 0xfe, 0x3e, 0x0d, 0x2a, 0x3c, 0xae, 0xfe, 0x62, 0x0d, 0xaf, 0xa0,
10666 0xd4, 0x9f, 0xd5, 0x9f, 0xd2, 0x9f, 0xd3, 0x9f, 0x05, 0x29, 0x01, 0x41,
10667 0xfe, 0xd3, 0x10, 0x15, 0xfe, 0xe8, 0x00, 0xc4, 0xc5, 0x75, 0xd7, 0x99,
10668 0xd8, 0x9c, 0xfe, 0x89, 0xf0, 0x29, 0x27, 0x25, 0xbe, 0xd7, 0x99, 0xd8,
10669 0x9c, 0x2f, 0xfe, 0x8c, 0x0d, 0x16, 0x29, 0x27, 0x25, 0xbd, 0xfe, 0x01,
10670 0x48, 0xa4, 0x19, 0xfe, 0x42, 0x00, 0x05, 0x70, 0x90, 0x07, 0xfe, 0x81,
10671 0x49, 0x1b, 0xfe, 0x64, 0x0e, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x44, 0x13,
10672 0x19, 0x00, 0x2d, 0x0d, 0xfe, 0x54, 0x12, 0x2d, 0xfe, 0x28, 0x00, 0x2b,
10673 0xfe, 0xda, 0x0e, 0x0a, 0x57, 0x01, 0x18, 0x09, 0x00, 0x36, 0x46, 0xfe,
10674 0x28, 0x00, 0xfe, 0xfa, 0x10, 0x01, 0xfe, 0xf4, 0x1c, 0x01, 0xfe, 0x00,
10675 0x1d, 0x0a, 0xba, 0x01, 0xfe, 0x58, 0x10, 0x40, 0x15, 0x56, 0x01, 0x85,
10676 0x05, 0x35, 0x19, 0xfe, 0x44, 0x00, 0x2d, 0x0d, 0xf7, 0x46, 0x0d, 0xfe,
10677 0xcc, 0x10, 0x01, 0xa7, 0x46, 0x0d, 0xfe, 0xc2, 0x10, 0x01, 0xa7, 0x0f,
10678 0xfe, 0x19, 0x82, 0x04, 0xfe, 0x99, 0x83, 0xfe, 0xcc, 0x47, 0x0b, 0x0e,
10679 0xfe, 0x34, 0x46, 0xa5, 0x46, 0x0d, 0x19, 0xfe, 0x43, 0x00, 0xfe, 0xa2,
10680 0x10, 0x01, 0x0c, 0x61, 0x0d, 0x44, 0x01, 0xfe, 0xf4, 0x1c, 0x01, 0xfe,
10681 0x00, 0x1d, 0x40, 0x15, 0x56, 0x01, 0x85, 0x7d, 0x0d, 0x40, 0x51, 0x01,
10682 0xfe, 0x9e, 0x1e, 0x05, 0xfe, 0x3a, 0x03, 0x01, 0x0c, 0x06, 0x0d, 0x5d,
10683 0x46, 0x0d, 0x19, 0x00, 0xfe, 0x62, 0x10, 0x01, 0x76, 0x06, 0x12, 0xfe,
10684 0x5c, 0x12, 0x01, 0x0c, 0x06, 0x12, 0xfe, 0x52, 0x13, 0xfe, 0x1c, 0x1c,
10685 0xfe, 0x9d, 0xf0, 0xfe, 0x8e, 0x0e, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, 0xf0,
10686 0xfe, 0x94, 0x0e, 0x01, 0x0c, 0x61, 0x12, 0x44, 0xfe, 0x9f, 0x10, 0x19,
10687 0xfe, 0x15, 0x00, 0xfe, 0x04, 0xe6, 0x0d, 0x4f, 0xfe, 0x2e, 0x10, 0x19,
10688 0xfe, 0x13, 0x00, 0xfe, 0x10, 0x10, 0x19, 0xfe, 0x47, 0x00, 0xf1, 0x19,
10689 0xfe, 0x41, 0x00, 0xa2, 0x19, 0xfe, 0x24, 0x00, 0x86, 0xc4, 0xc5, 0x75,
10690 0x03, 0x81, 0x1e, 0x2b, 0xea, 0x4f, 0xfe, 0x04, 0xe6, 0x12, 0xfe, 0x9d,
10691 0x41, 0xfe, 0x1c, 0x42, 0x40, 0x01, 0xf4, 0x05, 0x35, 0xfe, 0x12, 0x1c,
10692 0x1f, 0x0d, 0x47, 0xb5, 0xc3, 0x1f, 0xfe, 0x31, 0x00, 0x47, 0xb8, 0x01,
10693 0xfe, 0xd4, 0x11, 0x05, 0xe9, 0x51, 0xfe, 0x06, 0xec, 0xe0, 0xfe, 0x0e,
10694 0x47, 0x46, 0x28, 0xfe, 0xce, 0x45, 0x31, 0x51, 0xfe, 0x06, 0xea, 0xe0,
10695 0xfe, 0x47, 0x4b, 0x45, 0xfe, 0x75, 0x57, 0x03, 0x67, 0xfe, 0x98, 0x56,
10696 0xfe, 0x38, 0x12, 0x0a, 0x5a, 0x01, 0x18, 0xfe, 0x44, 0x48, 0x60, 0x01,
10697 0x0c, 0x06, 0x28, 0xfe, 0x18, 0x13, 0x0a, 0x57, 0x01, 0x18, 0x3e, 0xfe,
10698 0x41, 0x58, 0x0a, 0xba, 0xfe, 0xfa, 0x14, 0xfe, 0x49, 0x54, 0xb0, 0xfe,
10699 0x5e, 0x0f, 0x05, 0xfe, 0x3a, 0x03, 0x0a, 0x67, 0xfe, 0xe0, 0x14, 0xfe,
10700 0x0e, 0x47, 0x46, 0x28, 0xfe, 0xce, 0x45, 0x31, 0x51, 0xfe, 0xce, 0x47,
10701 0xfe, 0xad, 0x13, 0x05, 0x35, 0x21, 0x2c, 0x09, 0x1a, 0xfe, 0x98, 0x12,
10702 0x26, 0x20, 0x96, 0x20, 0xe7, 0xfe, 0x08, 0x1c, 0xfe, 0x7c, 0x19, 0xfe,
10703 0xfd, 0x19, 0xfe, 0x0a, 0x1c, 0x03, 0xe5, 0xfe, 0x48, 0x55, 0xa5, 0x3b,
10704 0xfe, 0x62, 0x01, 0xfe, 0xc9, 0x55, 0x31, 0xfe, 0x74, 0x10, 0x01, 0xfe,
10705 0xf0, 0x1a, 0x03, 0xfe, 0x38, 0x01, 0x3b, 0xfe, 0x3a, 0x01, 0x8e, 0xfe,
10706 0x1e, 0x10, 0xfe, 0x02, 0xec, 0xe7, 0x53, 0x00, 0x36, 0xfe, 0x04, 0xec,
10707 0x2c, 0x60, 0xfe, 0x05, 0xf6, 0xfe, 0x34, 0x01, 0x01, 0xfe, 0x62, 0x1b,
10708 0x01, 0xfe, 0xce, 0x1e, 0xb2, 0x11, 0xfe, 0x18, 0x13, 0xca, 0xfe, 0x02,
10709 0xea, 0xe7, 0x53, 0x92, 0xfe, 0xc3, 0x13, 0x1f, 0x12, 0x47, 0xb5, 0xc3,
10710 0xfe, 0x2a, 0x10, 0x03, 0xfe, 0x38, 0x01, 0x23, 0xfe, 0xf0, 0xff, 0x10,
10711 0xe5, 0x03, 0xfe, 0x3a, 0x01, 0x10, 0xfe, 0x62, 0x01, 0x01, 0xfe, 0x1e,
10712 0x1e, 0x20, 0x2c, 0x15, 0x56, 0x01, 0xfe, 0x9e, 0x1e, 0x13, 0x07, 0x02,
10713 0x26, 0x02, 0x21, 0x96, 0xc7, 0x20, 0x96, 0x09, 0x92, 0xfe, 0x79, 0x13,
10714 0x1f, 0x1d, 0x47, 0xb5, 0xc3, 0xfe, 0xe1, 0x10, 0xcf, 0xfe, 0x03, 0xdc,
10715 0xfe, 0x73, 0x57, 0xfe, 0x80, 0x5d, 0x02, 0xcf, 0xfe, 0x03, 0xdc, 0xfe,
10716 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x02, 0xfe, 0x03, 0x57, 0xcf, 0x26, 0xfe,
10717 0x00, 0xcc, 0x02, 0xfe, 0x03, 0x57, 0xcf, 0x89, 0x02, 0x01, 0x0c, 0x06,
10718 0x4a, 0xfe, 0x4e, 0x13, 0x0f, 0xfe, 0x1c, 0x80, 0x04, 0xfe, 0x9c, 0x83,
10719 0x33, 0x0b, 0x0e, 0x09, 0x07, 0xfe, 0x3a, 0x13, 0x0f, 0xfe, 0x1e, 0x80,
10720 0x04, 0xfe, 0x9e, 0x83, 0x33, 0x0b, 0x0e, 0xfe, 0x2a, 0x13, 0x0f, 0xfe,
10721 0x1d, 0x80, 0x04, 0xfe, 0x9d, 0x83, 0xfe, 0xf9, 0x13, 0x0e, 0xfe, 0x1c,
10722 0x13, 0x01, 0xfe, 0xee, 0x1e, 0xac, 0xfe, 0x14, 0x13, 0x01, 0xfe, 0xfe,
10723 0x1e, 0xfe, 0x81, 0x58, 0xfa, 0x01, 0xfe, 0x0e, 0x1f, 0xfe, 0x30, 0xf4,
10724 0x0d, 0xfe, 0x3c, 0x50, 0xa2, 0x01, 0xfe, 0x92, 0x1b, 0x01, 0x43, 0x09,
10725 0x56, 0xfb, 0x01, 0xfe, 0xc8, 0x1a, 0x01, 0x0c, 0x06, 0x28, 0xa4, 0x01,
10726 0xfe, 0xf4, 0x1c, 0x01, 0xfe, 0x00, 0x1d, 0x15, 0xfe, 0xe9, 0x00, 0x01,
10727 0x0c, 0x06, 0x4a, 0xfe, 0x4e, 0x13, 0x01, 0xfe, 0x22, 0x1b, 0xfe, 0x1e,
10728 0x1c, 0x0f, 0xfe, 0x14, 0x90, 0x04, 0xfe, 0x94, 0x93, 0x3a, 0x0b, 0xfe,
10729 0x96, 0x90, 0x04, 0xfe, 0x96, 0x93, 0x79, 0x0b, 0x0e, 0x10, 0xfe, 0x64,
10730 0x01, 0x22, 0xfe, 0x66, 0x01, 0x01, 0x0c, 0x06, 0x65, 0xf9, 0x0f, 0xfe,
10731 0x03, 0x80, 0x04, 0xfe, 0x83, 0x83, 0x33, 0x0b, 0x0e, 0x77, 0xfe, 0x01,
10732 0xec, 0x2c, 0xfe, 0x80, 0x40, 0x20, 0x2c, 0x7a, 0x30, 0x15, 0xdf, 0x40,
10733 0x21, 0x2c, 0xfe, 0x00, 0x40, 0x8d, 0x2c, 0x02, 0xfe, 0x08, 0x1c, 0x03,
10734 0xfe, 0xac, 0x00, 0xfe, 0x06, 0x58, 0x03, 0xfe, 0xae, 0x00, 0xfe, 0x07,
10735 0x58, 0x03, 0xfe, 0xb0, 0x00, 0xfe, 0x08, 0x58, 0x03, 0xfe, 0xb2, 0x00,
10736 0xfe, 0x09, 0x58, 0xfe, 0x0a, 0x1c, 0x2e, 0x49, 0x20, 0xe0, 0x26, 0x10,
10737 0x66, 0x10, 0x55, 0x10, 0x6f, 0x13, 0x57, 0x52, 0x4f, 0x1c, 0x28, 0xfe,
10738 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x2b, 0xfe, 0x88, 0x11, 0x46, 0x1a, 0x13,
10739 0x5a, 0x52, 0x1c, 0x4a, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x2b, 0xfe,
10740 0x9e, 0x11, 0x2e, 0x1a, 0x20, 0x2c, 0x90, 0x34, 0x60, 0x21, 0x2c, 0xfe,
10741 0x00, 0x40, 0x8d, 0x2c, 0x15, 0xdf, 0xfe, 0x14, 0x56, 0xfe, 0xd6, 0xf0,
10742 0xfe, 0xb2, 0x11, 0xfe, 0x12, 0x1c, 0x75, 0xfe, 0x14, 0x1c, 0xfe, 0x10,
10743 0x1c, 0xfe, 0x18, 0x1c, 0x02, 0x51, 0xfe, 0x0c, 0x14, 0xfe, 0x0e, 0x47,
10744 0xfe, 0x07, 0xe6, 0x28, 0xfe, 0xce, 0x47, 0xfe, 0xf5, 0x13, 0x02, 0x01,
10745 0xa7, 0x90, 0x34, 0x60, 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x42,
10746 0x13, 0xfe, 0x02, 0x80, 0x09, 0x56, 0xfe, 0x34, 0x13, 0x0a, 0x5a, 0x01,
10747 0x18, 0xcb, 0xfe, 0x36, 0x12, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01,
10748 0xfe, 0xb2, 0x16, 0xfe, 0x00, 0xcc, 0xcb, 0xfe, 0xf3, 0x13, 0x3f, 0x89,
10749 0x09, 0x1a, 0xa5, 0x0a, 0x9d, 0x01, 0x18, 0xfe, 0x80, 0x5c, 0x01, 0x85,
10750 0xf2, 0x09, 0x9b, 0xa4, 0xfe, 0x14, 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0xec,
10751 0x11, 0x02, 0xfe, 0x44, 0x58, 0x77, 0xfe, 0x01, 0xec, 0xb8, 0xfe, 0x9e,
10752 0x40, 0xfe, 0x9d, 0xe7, 0x00, 0xfe, 0x9c, 0xe7, 0x12, 0x8d, 0x30, 0x01,
10753 0xf4, 0xfe, 0xdd, 0x10, 0x37, 0xd7, 0x99, 0xd8, 0x9c, 0x27, 0x25, 0xee,
10754 0x09, 0x12, 0xfe, 0x48, 0x12, 0x09, 0x0d, 0xfe, 0x56, 0x12, 0x09, 0x1d,
10755 0xfe, 0x30, 0x12, 0x09, 0xdd, 0x1b, 0xfe, 0xc4, 0x13, 0x09, 0xfe, 0x23,
10756 0x00, 0x1b, 0xfe, 0xd0, 0x13, 0x09, 0x07, 0x1b, 0xfe, 0x34, 0x14, 0x09,
10757 0x24, 0xfe, 0x12, 0x12, 0x09, 0x00, 0x1b, 0x29, 0x1f, 0xdd, 0x01, 0x42,
10758 0xa1, 0x32, 0x01, 0x08, 0xae, 0x41, 0x02, 0x32, 0xfe, 0x62, 0x08, 0x0a,
10759 0xe1, 0x01, 0xfe, 0x58, 0x10, 0x15, 0x9b, 0x05, 0x35, 0x32, 0x01, 0x43,
10760 0x09, 0xbb, 0xfe, 0xd7, 0x13, 0x91, 0x4b, 0x7e, 0x4c, 0x8e, 0xfe, 0x80,
10761 0x13, 0x01, 0x0c, 0x06, 0x54, 0xfe, 0x72, 0x12, 0xdb, 0x64, 0xdc, 0x34,
10762 0xfe, 0x44, 0x55, 0xfe, 0xe5, 0x55, 0xb0, 0xfe, 0x4a, 0x13, 0x21, 0x6e,
10763 0xfe, 0x26, 0x13, 0x03, 0x97, 0x3b, 0x98, 0x8e, 0xfe, 0xb6, 0x0e, 0x10,
10764 0x6a, 0x22, 0x6b, 0x26, 0x10, 0x97, 0x10, 0x98, 0x01, 0xc2, 0x2e, 0x49,
10765 0x88, 0x20, 0x6e, 0x01, 0xfe, 0x6a, 0x16, 0xdb, 0x64, 0xdc, 0x34, 0xfe,
10766 0x04, 0x55, 0xfe, 0xa5, 0x55, 0xfe, 0x04, 0xfa, 0x64, 0xfe, 0x05, 0xfa,
10767 0x34, 0xfe, 0x8f, 0x10, 0x03, 0x6c, 0x3b, 0x6d, 0xfe, 0x40, 0x56, 0xfe,
10768 0xe1, 0x56, 0x10, 0x6c, 0x22, 0x6d, 0x71, 0xdb, 0x64, 0xdc, 0x34, 0xfe,
10769 0x44, 0x55, 0xfe, 0xe5, 0x55, 0x03, 0x68, 0x3b, 0x69, 0xfe, 0x00, 0x56,
10770 0xfe, 0xa1, 0x56, 0x10, 0x68, 0x22, 0x69, 0x01, 0x0c, 0x06, 0x54, 0xf9,
10771 0x21, 0x6e, 0xfe, 0x1f, 0x40, 0x03, 0x6a, 0x3b, 0x6b, 0xfe, 0x2c, 0x50,
10772 0xfe, 0xae, 0x50, 0x03, 0x6c, 0x3b, 0x6d, 0xfe, 0x44, 0x50, 0xfe, 0xc6,
10773 0x50, 0x03, 0x68, 0x3b, 0x69, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0x03,
10774 0x4b, 0x3b, 0x4c, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x05, 0x73, 0x2e,
10775 0x07, 0x20, 0x9e, 0x05, 0x72, 0x32, 0x01, 0x08, 0x16, 0x3d, 0x27, 0x25,
10776 0xee, 0x09, 0x07, 0x2b, 0x3d, 0x01, 0x43, 0x09, 0xbb, 0x2b, 0x72, 0x01,
10777 0xa6, 0x23, 0x3f, 0x1b, 0x3d, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x1e, 0x13,
10778 0x91, 0x4b, 0x7e, 0x4c, 0xfe, 0x0a, 0x55, 0x31, 0xfe, 0x8b, 0x55, 0xd9,
10779 0x4b, 0xda, 0x4c, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0x05, 0x72, 0x01,
10780 0xfe, 0x8e, 0x1e, 0xca, 0xfe, 0x19, 0x41, 0x05, 0x72, 0x32, 0x01, 0x08,
10781 0x2a, 0x3c, 0x16, 0xc0, 0x27, 0x25, 0xbe, 0x2d, 0x1d, 0xc0, 0x2d, 0x0d,
10782 0x83, 0x2d, 0x7f, 0x1b, 0xfe, 0x66, 0x15, 0x05, 0x3d, 0x01, 0x08, 0x2a,
10783 0x3c, 0x16, 0xc0, 0x27, 0x25, 0xbd, 0x09, 0x1d, 0x2b, 0x3d, 0x01, 0x08,
10784 0x16, 0xc0, 0x27, 0x25, 0xfe, 0xe8, 0x09, 0xfe, 0xc2, 0x49, 0x50, 0x03,
10785 0xb6, 0x1e, 0x83, 0x01, 0x38, 0x06, 0x24, 0x31, 0xa1, 0xfe, 0xbb, 0x45,
10786 0x2d, 0x00, 0xa4, 0x46, 0x07, 0x90, 0x3f, 0x01, 0xfe, 0xf8, 0x15, 0x01,
10787 0xa6, 0x86, 0xfe, 0x4b, 0x45, 0xfe, 0x20, 0x13, 0x01, 0x43, 0x09, 0x82,
10788 0xfe, 0x16, 0x13, 0x03, 0x9a, 0x1e, 0x5d, 0x03, 0x55, 0x1e, 0x31, 0x5e,
10789 0x05, 0x72, 0xfe, 0xc0, 0x5d, 0x01, 0xa7, 0xfe, 0x03, 0x17, 0x03, 0x66,
10790 0x8a, 0x10, 0x66, 0x5e, 0x32, 0x01, 0x08, 0x17, 0x73, 0x01, 0xfe, 0x56,
10791 0x19, 0x05, 0x73, 0x01, 0x08, 0x2a, 0x3c, 0x16, 0x3d, 0x27, 0x25, 0xbd,
10792 0x09, 0x07, 0x2b, 0x3d, 0x01, 0xfe, 0xbe, 0x16, 0xfe, 0x42, 0x58, 0xfe,
10793 0xe8, 0x14, 0x01, 0xa6, 0x86, 0xfe, 0x4a, 0xf4, 0x0d, 0x1b, 0x3d, 0xfe,
10794 0x4a, 0xf4, 0x07, 0xfe, 0x0e, 0x12, 0x01, 0x43, 0x09, 0x82, 0x4e, 0x05,
10795 0x72, 0x03, 0x55, 0x8a, 0x10, 0x55, 0x5e, 0x32, 0x01, 0x08, 0x17, 0x73,
10796 0x01, 0xfe, 0x84, 0x19, 0x05, 0x73, 0x01, 0x08, 0x2a, 0x3c, 0x16, 0x3d,
10797 0x27, 0x25, 0xbd, 0x09, 0x12, 0x2b, 0x3d, 0x01, 0xfe, 0xe8, 0x17, 0x8b,
10798 0xfe, 0xaa, 0x14, 0xfe, 0xb6, 0x14, 0x86, 0xa8, 0xb2, 0x0d, 0x1b, 0x3d,
10799 0xb2, 0x07, 0xfe, 0x0e, 0x12, 0x01, 0x43, 0x09, 0x82, 0x4e, 0x05, 0x72,
10800 0x03, 0x6f, 0x8a, 0x10, 0x6f, 0x5e, 0x32, 0x01, 0x08, 0x17, 0x73, 0x01,
10801 0xfe, 0xc0, 0x19, 0x05, 0x73, 0x13, 0x07, 0x2f, 0xfe, 0xcc, 0x15, 0x17,
10802 0xfe, 0xe2, 0x15, 0x5f, 0xcc, 0x01, 0x08, 0x26, 0x5f, 0x02, 0x8f, 0xfe,
10803 0xde, 0x15, 0x2a, 0xfe, 0xde, 0x15, 0x16, 0xfe, 0xcc, 0x15, 0x5e, 0x32,
10804 0x01, 0x08, 0xfe, 0xd5, 0x10, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52,
10805 0xad, 0x23, 0xfe, 0xff, 0x7f, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x02,
10806 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, 0xad, 0x23, 0x3f, 0xfe, 0x30,
10807 0x56, 0xfe, 0x00, 0x5c, 0x02, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52,
10808 0xad, 0x02, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, 0xfe, 0x00, 0x5e,
10809 0x02, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, 0xad, 0xfe, 0x0b, 0x58,
10810 0x02, 0x0a, 0x66, 0x01, 0x5c, 0x0a, 0x55, 0x01, 0x5c, 0x0a, 0x6f, 0x01,
10811 0x5c, 0x02, 0x01, 0xfe, 0x1e, 0x1f, 0x23, 0x1a, 0xff, 0x03, 0x00, 0x54,
10812 0xfe, 0x00, 0xf4, 0x24, 0x52, 0x0f, 0xfe, 0x00, 0x7c, 0x04, 0xfe, 0x07,
10813 0x7c, 0x3a, 0x0b, 0x0e, 0xfe, 0x00, 0x71, 0xfe, 0xf9, 0x18, 0xfe, 0x7a,
10814 0x19, 0xfe, 0xfb, 0x19, 0xfe, 0x1a, 0xf7, 0x00, 0xfe, 0x1b, 0xf7, 0x00,
10815 0x7a, 0x30, 0x10, 0x68, 0x22, 0x69, 0xd9, 0x6c, 0xda, 0x6d, 0x02, 0xfe,
10816 0x62, 0x08, 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x77,
10817 0x02, 0x01, 0xc6, 0xfe, 0x42, 0x48, 0x4f, 0x50, 0x45, 0x01, 0x08, 0x16,
10818 0xfe, 0xe0, 0x17, 0x27, 0x25, 0xbe, 0x01, 0x08, 0x16, 0xfe, 0xe0, 0x17,
10819 0x27, 0x25, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59, 0x03, 0x9a, 0x1e, 0xfe,
10820 0xda, 0x12, 0x01, 0x38, 0x06, 0x12, 0xfe, 0xd0, 0x13, 0x26, 0x53, 0x12,
10821 0x48, 0xfe, 0x08, 0x17, 0xd1, 0x12, 0x53, 0x12, 0xfe, 0x1e, 0x13, 0x2d,
10822 0xb4, 0x7b, 0xfe, 0x26, 0x17, 0x4d, 0x13, 0x07, 0x1c, 0xb4, 0x90, 0x04,
10823 0xfe, 0x78, 0x10, 0xff, 0x02, 0x83, 0x55, 0xf1, 0xff, 0x02, 0x83, 0x55,
10824 0x53, 0x1d, 0xfe, 0x12, 0x13, 0xd6, 0xfe, 0x30, 0x00, 0xb0, 0xfe, 0x80,
10825 0x17, 0x1c, 0x63, 0x13, 0x07, 0xfe, 0x56, 0x10, 0x53, 0x0d, 0xfe, 0x16,
10826 0x13, 0xd6, 0xfe, 0x64, 0x00, 0xb0, 0xfe, 0x80, 0x17, 0x0a, 0xfe, 0x64,
10827 0x00, 0x1c, 0x94, 0x13, 0x07, 0xfe, 0x28, 0x10, 0x53, 0x07, 0xfe, 0x60,
10828 0x13, 0xd6, 0xfe, 0xc8, 0x00, 0xb0, 0xfe, 0x80, 0x17, 0x0a, 0xfe, 0xc8,
10829 0x00, 0x1c, 0x95, 0x13, 0x07, 0x71, 0xd6, 0xfe, 0x90, 0x01, 0x48, 0xfe,
10830 0x8c, 0x17, 0x45, 0xf3, 0xfe, 0x43, 0xf4, 0x96, 0xfe, 0x56, 0xf0, 0xfe,
10831 0x9e, 0x17, 0xfe, 0x04, 0xf4, 0x58, 0xfe, 0x43, 0xf4, 0x94, 0xf6, 0x8b,
10832 0x01, 0xfe, 0x24, 0x16, 0x23, 0x3f, 0xfc, 0xa8, 0x8c, 0x49, 0x48, 0xfe,
10833 0xda, 0x17, 0x62, 0x49, 0xfe, 0x1c, 0x10, 0xa8, 0x8c, 0x80, 0x48, 0xfe,
10834 0xda, 0x17, 0x62, 0x80, 0x71, 0x50, 0x26, 0xfe, 0x4d, 0xf4, 0x00, 0xf7,
10835 0x45, 0x13, 0x07, 0xfe, 0xb4, 0x56, 0xfe, 0xc3, 0x58, 0x02, 0x50, 0x13,
10836 0x0d, 0x02, 0x50, 0x3e, 0x78, 0x4f, 0x45, 0x01, 0x08, 0x16, 0xa9, 0x27,
10837 0x25, 0xbe, 0xfe, 0x03, 0xea, 0xfe, 0x7e, 0x01, 0x01, 0x08, 0x16, 0xa9,
10838 0x27, 0x25, 0xfe, 0xe9, 0x0a, 0x01, 0x08, 0x16, 0xa9, 0x27, 0x25, 0xfe,
10839 0xe9, 0x0a, 0xfe, 0x05, 0xea, 0xfe, 0x7f, 0x01, 0x01, 0x08, 0x16, 0xa9,
10840 0x27, 0x25, 0xfe, 0x69, 0x09, 0xfe, 0x02, 0xea, 0xfe, 0x80, 0x01, 0x01,
10841 0x08, 0x16, 0xa9, 0x27, 0x25, 0xfe, 0xe8, 0x08, 0x47, 0xfe, 0x81, 0x01,
10842 0x03, 0xb6, 0x1e, 0x83, 0x01, 0x38, 0x06, 0x24, 0x31, 0xa2, 0x78, 0xf2,
10843 0x53, 0x07, 0x36, 0xfe, 0x34, 0xf4, 0x3f, 0xa1, 0x78, 0x03, 0x9a, 0x1e,
10844 0x83, 0x01, 0x38, 0x06, 0x12, 0x31, 0xf0, 0x4f, 0x45, 0xfe, 0x90, 0x10,
10845 0xfe, 0x40, 0x5a, 0x23, 0x3f, 0xfb, 0x8c, 0x49, 0x48, 0xfe, 0xaa, 0x18,
10846 0x62, 0x49, 0x71, 0x8c, 0x80, 0x48, 0xfe, 0xaa, 0x18, 0x62, 0x80, 0xfe,
10847 0xb4, 0x56, 0xfe, 0x40, 0x5d, 0x01, 0xc6, 0x01, 0xfe, 0xac, 0x1d, 0xfe,
10848 0x02, 0x17, 0xfe, 0xc8, 0x45, 0xfe, 0x5a, 0xf0, 0xfe, 0xc0, 0x18, 0xfe,
10849 0x43, 0x48, 0x2d, 0x93, 0x36, 0xfe, 0x34, 0xf4, 0xfe, 0x00, 0x11, 0xfe,
10850 0x40, 0x10, 0x2d, 0xb4, 0x36, 0xfe, 0x34, 0xf4, 0x04, 0xfe, 0x34, 0x10,
10851 0x2d, 0xfe, 0x0b, 0x00, 0x36, 0x46, 0x63, 0xfe, 0x28, 0x10, 0xfe, 0xc0,
10852 0x49, 0xff, 0x02, 0x00, 0x54, 0xb2, 0xfe, 0x90, 0x01, 0x48, 0xfe, 0xfa,
10853 0x18, 0x45, 0xfe, 0x1c, 0xf4, 0x3f, 0xf3, 0xfe, 0x40, 0xf4, 0x96, 0xfe,
10854 0x56, 0xf0, 0xfe, 0x0c, 0x19, 0xfe, 0x04, 0xf4, 0x58, 0xfe, 0x40, 0xf4,
10855 0x94, 0xf6, 0x3e, 0x2d, 0x93, 0x4e, 0xd0, 0x0d, 0x21, 0xfe, 0x7f, 0x01,
10856 0xfe, 0xc8, 0x46, 0xfe, 0x24, 0x13, 0x8c, 0x00, 0x5d, 0x26, 0x21, 0xfe,
10857 0x7e, 0x01, 0xfe, 0xc8, 0x45, 0xfe, 0x14, 0x13, 0x21, 0xfe, 0x80, 0x01,
10858 0xfe, 0x48, 0x45, 0xfa, 0x21, 0xfe, 0x81, 0x01, 0xfe, 0xc8, 0x44, 0x4e,
10859 0x26, 0x02, 0x13, 0x07, 0x02, 0x78, 0x45, 0x50, 0x13, 0x0d, 0x02, 0x14,
10860 0x07, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x14, 0x0d, 0x01, 0x08, 0x17,
10861 0xfe, 0x82, 0x19, 0x14, 0x1d, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x5f,
10862 0xfe, 0x89, 0x49, 0x01, 0x08, 0x02, 0x14, 0x07, 0x01, 0x08, 0x17, 0xc1,
10863 0x14, 0x1d, 0x01, 0x08, 0x17, 0xc1, 0x14, 0x07, 0x01, 0x08, 0x17, 0xc1,
10864 0xfe, 0x89, 0x49, 0x01, 0x08, 0x17, 0xc1, 0x5f, 0xfe, 0x89, 0x4a, 0x01,
10865 0x08, 0x02, 0x50, 0x02, 0x14, 0x07, 0x01, 0x08, 0x17, 0x74, 0x14, 0x7f,
10866 0x01, 0x08, 0x17, 0x74, 0x14, 0x12, 0x01, 0x08, 0x17, 0x74, 0xfe, 0x89,
10867 0x49, 0x01, 0x08, 0x17, 0x74, 0x14, 0x00, 0x01, 0x08, 0x17, 0x74, 0xfe,
10868 0x89, 0x4a, 0x01, 0x08, 0x17, 0x74, 0xfe, 0x09, 0x49, 0x01, 0x08, 0x17,
10869 0x74, 0x5f, 0xcc, 0x01, 0x08, 0x02, 0x21, 0xe4, 0x09, 0x07, 0xfe, 0x4c,
10870 0x13, 0xc8, 0x20, 0xe4, 0xfe, 0x49, 0xf4, 0x00, 0x4d, 0x5f, 0xa1, 0x5e,
10871 0xfe, 0x01, 0xec, 0xfe, 0x27, 0x01, 0xcc, 0xff, 0x02, 0x00, 0x10, 0x2f,
10872 0xfe, 0x3e, 0x1a, 0x01, 0x43, 0x09, 0xfe, 0xe3, 0x00, 0xfe, 0x22, 0x13,
10873 0x16, 0xfe, 0x64, 0x1a, 0x26, 0x20, 0x9e, 0x01, 0x41, 0x21, 0x9e, 0x09,
10874 0x07, 0x5d, 0x01, 0x0c, 0x61, 0x07, 0x44, 0x02, 0x0a, 0x5a, 0x01, 0x18,
10875 0xfe, 0x00, 0x40, 0xaa, 0x09, 0x1a, 0xfe, 0x12, 0x13, 0x0a, 0x9d, 0x01,
10876 0x18, 0xaa, 0x0a, 0x67, 0x01, 0xa3, 0x02, 0x0a, 0x9d, 0x01, 0x18, 0xaa,
10877 0xfe, 0x80, 0xe7, 0x1a, 0x09, 0x1a, 0x5d, 0xfe, 0x45, 0x58, 0x01, 0xfe,
10878 0xb2, 0x16, 0xaa, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0xaa, 0x0a, 0x67, 0x01,
10879 0xa3, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x01, 0xfe, 0x7e, 0x1e, 0xfe, 0x80,
10880 0x4c, 0xfe, 0x49, 0xe4, 0x1a, 0xfe, 0x12, 0x13, 0x0a, 0x9d, 0x01, 0x18,
10881 0xfe, 0x80, 0x4c, 0x0a, 0x67, 0x01, 0x5c, 0x02, 0x1c, 0x1a, 0x87, 0x7c,
10882 0xe5, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x24, 0x1c, 0xfe, 0x1d,
10883 0xf7, 0x28, 0xb1, 0xfe, 0x04, 0x1b, 0x01, 0xfe, 0x2a, 0x1c, 0xfa, 0xb3,
10884 0x28, 0x7c, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x02, 0xc9, 0x2b, 0xfe,
10885 0xf4, 0x1a, 0xfe, 0xfa, 0x10, 0x1c, 0x1a, 0x87, 0x03, 0xfe, 0x64, 0x01,
10886 0xfe, 0x00, 0xf4, 0x24, 0xfe, 0x18, 0x58, 0x03, 0xfe, 0x66, 0x01, 0xfe,
10887 0x19, 0x58, 0xb3, 0x24, 0x01, 0xfe, 0x0e, 0x1f, 0xfe, 0x30, 0xf4, 0x07,
10888 0xfe, 0x3c, 0x50, 0x7c, 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, 0xfe, 0x1c,
10889 0xf7, 0x24, 0xb1, 0xfe, 0x50, 0x1b, 0xfe, 0xd4, 0x14, 0x31, 0x02, 0xc9,
10890 0x2b, 0xfe, 0x26, 0x1b, 0xfe, 0xba, 0x10, 0x1c, 0x1a, 0x87, 0xfe, 0x83,
10891 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x1d, 0xf7, 0x54, 0xb1,
10892 0xfe, 0x72, 0x1b, 0xfe, 0xb2, 0x14, 0xfc, 0xb3, 0x54, 0x7c, 0x12, 0xfe,
10893 0xaf, 0x19, 0xfe, 0x98, 0xe7, 0x00, 0x02, 0xc9, 0x2b, 0xfe, 0x66, 0x1b,
10894 0xfe, 0x8a, 0x10, 0x1c, 0x1a, 0x87, 0x8b, 0x0f, 0xfe, 0x30, 0x90, 0x04,
10895 0xfe, 0xb0, 0x93, 0x3a, 0x0b, 0xfe, 0x18, 0x58, 0xfe, 0x32, 0x90, 0x04,
10896 0xfe, 0xb2, 0x93, 0x3a, 0x0b, 0xfe, 0x19, 0x58, 0x0e, 0xa8, 0xb3, 0x4a,
10897 0x7c, 0x12, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0x4a, 0xb1, 0xfe, 0xc6,
10898 0x1b, 0xfe, 0x5e, 0x14, 0x31, 0x02, 0xc9, 0x2b, 0xfe, 0x96, 0x1b, 0x5c,
10899 0xfe, 0x02, 0xf6, 0x1a, 0x87, 0xfe, 0x18, 0xfe, 0x6a, 0xfe, 0x19, 0xfe,
10900 0x6b, 0x01, 0xfe, 0x1e, 0x1f, 0xfe, 0x1d, 0xf7, 0x65, 0xb1, 0xfe, 0xee,
10901 0x1b, 0xfe, 0x36, 0x14, 0xfe, 0x1c, 0x13, 0xb3, 0x65, 0x3e, 0xfe, 0x83,
10902 0x58, 0xfe, 0xaf, 0x19, 0xfe, 0x80, 0xe7, 0x1a, 0xfe, 0x81, 0xe7, 0x1a,
10903 0x15, 0xfe, 0xdd, 0x00, 0x7a, 0x30, 0x02, 0x7a, 0x30, 0xfe, 0x12, 0x45,
10904 0x2b, 0xfe, 0xdc, 0x1b, 0x1f, 0x07, 0x47, 0xb5, 0xc3, 0x05, 0x35, 0xfe,
10905 0x39, 0xf0, 0x75, 0x26, 0x02, 0xfe, 0x7e, 0x18, 0x23, 0x1d, 0x36, 0x13,
10906 0x11, 0x02, 0x87, 0x03, 0xe3, 0x23, 0x07, 0xfe, 0xef, 0x12, 0xfe, 0xe1,
10907 0x10, 0x90, 0x34, 0x60, 0xfe, 0x02, 0x80, 0x09, 0x56, 0xfe, 0x3c, 0x13,
10908 0xfe, 0x82, 0x14, 0xfe, 0x42, 0x13, 0x51, 0xfe, 0x06, 0x83, 0x0a, 0x5a,
10909 0x01, 0x18, 0xcb, 0xfe, 0x3e, 0x12, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48,
10910 0x01, 0xfe, 0xb2, 0x16, 0xfe, 0x00, 0xcc, 0xcb, 0xfe, 0xf3, 0x13, 0x3f,
10911 0x89, 0x09, 0x1a, 0xa5, 0x0a, 0x9d, 0x01, 0x18, 0xfe, 0x80, 0x4c, 0x01,
10912 0x85, 0xfe, 0x16, 0x10, 0x09, 0x9b, 0x4e, 0xfe, 0x40, 0x14, 0xfe, 0x24,
10913 0x12, 0xfe, 0x14, 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x52, 0x1c, 0x1c, 0x0d,
10914 0x02, 0xfe, 0x9c, 0xe7, 0x0d, 0x19, 0xfe, 0x15, 0x00, 0x40, 0x8d, 0x30,
10915 0x01, 0xf4, 0x1c, 0x07, 0x02, 0x51, 0xfe, 0x06, 0x83, 0xfe, 0x18, 0x80,
10916 0x61, 0x28, 0x44, 0x15, 0x56, 0x01, 0x85, 0x1c, 0x07, 0x02, 0xfe, 0x38,
10917 0x90, 0xfe, 0xba, 0x90, 0x91, 0xde, 0x7e, 0xdf, 0xfe, 0x48, 0x55, 0x31,
10918 0xfe, 0xc9, 0x55, 0x02, 0x21, 0xb9, 0x88, 0x20, 0xb9, 0x02, 0x0a, 0xba,
10919 0x01, 0x18, 0xfe, 0x41, 0x48, 0x0a, 0x57, 0x01, 0x18, 0xfe, 0x49, 0x44,
10920 0x1b, 0xfe, 0x1e, 0x1d, 0x88, 0x89, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x09,
10921 0x1a, 0xa4, 0x0a, 0x67, 0x01, 0xa3, 0x0a, 0x57, 0x01, 0x18, 0x88, 0x89,
10922 0x02, 0xfe, 0x4e, 0xe4, 0x1d, 0x7b, 0xfe, 0x52, 0x1d, 0x03, 0xfe, 0x90,
10923 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10, 0xfe, 0x4e, 0xe4, 0xdd, 0x7b,
10924 0xfe, 0x64, 0x1d, 0x03, 0xfe, 0x92, 0x00, 0xd1, 0x12, 0xfe, 0x1a, 0x10,
10925 0xfe, 0x4e, 0xe4, 0xfe, 0x0b, 0x00, 0x7b, 0xfe, 0x76, 0x1d, 0x03, 0xfe,
10926 0x94, 0x00, 0xd1, 0x24, 0xfe, 0x08, 0x10, 0x03, 0xfe, 0x96, 0x00, 0xd1,
10927 0x63, 0xfe, 0x4e, 0x45, 0x83, 0xca, 0xff, 0x04, 0x68, 0x54, 0xfe, 0xf1,
10928 0x10, 0x23, 0x49, 0xfe, 0x08, 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c,
10929 0xfe, 0x1a, 0xf4, 0xfe, 0x00, 0x04, 0x83, 0xb2, 0x1d, 0x48, 0xfe, 0xaa,
10930 0x1d, 0x13, 0x1d, 0x02, 0x09, 0x92, 0xfe, 0x5a, 0xf0, 0xfe, 0xba, 0x1d,
10931 0x2e, 0x93, 0xfe, 0x34, 0x10, 0x09, 0x12, 0xfe, 0x5a, 0xf0, 0xfe, 0xc8,
10932 0x1d, 0x2e, 0xb4, 0xfe, 0x26, 0x10, 0x09, 0x1d, 0x36, 0x2e, 0x63, 0xfe,
10933 0x1a, 0x10, 0x09, 0x0d, 0x36, 0x2e, 0x94, 0xf2, 0x09, 0x07, 0x36, 0x2e,
10934 0x95, 0xa1, 0xc8, 0x02, 0x1f, 0x93, 0x01, 0x42, 0xfe, 0x04, 0xfe, 0x99,
10935 0x03, 0x9c, 0x8b, 0x02, 0x2a, 0xfe, 0x1c, 0x1e, 0xfe, 0x14, 0xf0, 0x08,
10936 0x2f, 0xfe, 0x0c, 0x1e, 0x2a, 0xfe, 0x1c, 0x1e, 0x8f, 0xfe, 0x1c, 0x1e,
10937 0xfe, 0x82, 0xf0, 0xfe, 0x10, 0x1e, 0x02, 0x0f, 0x3f, 0x04, 0xfe, 0x80,
10938 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x18, 0x80, 0x04, 0xfe, 0x98,
10939 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x02, 0x80, 0x04, 0xfe, 0x82,
10940 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06, 0x80, 0x04, 0xfe, 0x86,
10941 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x1b, 0x80, 0x04, 0xfe, 0x9b,
10942 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x04, 0x80, 0x04, 0xfe, 0x84,
10943 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x80, 0x80, 0x04, 0xfe, 0x80,
10944 0x83, 0xfe, 0xc9, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x19, 0x81, 0x04,
10945 0xfe, 0x99, 0x83, 0xfe, 0xca, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06,
10946 0x83, 0x04, 0xfe, 0x86, 0x83, 0xfe, 0xce, 0x47, 0x0b, 0x0e, 0x02, 0x0f,
10947 0xfe, 0x2c, 0x90, 0x04, 0xfe, 0xac, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f,
10948 0xfe, 0xae, 0x90, 0x04, 0xfe, 0xae, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f,
10949 0xfe, 0x08, 0x90, 0x04, 0xfe, 0x88, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f,
10950 0xfe, 0x8a, 0x90, 0x04, 0xfe, 0x8a, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f,
10951 0xfe, 0x0c, 0x90, 0x04, 0xfe, 0x8c, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f,
10952 0xfe, 0x8e, 0x90, 0x04, 0xfe, 0x8e, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f,
10953 0xfe, 0x3c, 0x90, 0x04, 0xfe, 0xbc, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x8b,
10954 0x0f, 0xfe, 0x03, 0x80, 0x04, 0xfe, 0x83, 0x83, 0x33, 0x0b, 0x77, 0x0e,
10955 0xa8, 0x02, 0xff, 0x66, 0x00, 0x00,
10958 static unsigned short _adv_asc38C1600_size = sizeof(_adv_asc38C1600_buf); /* 0x1673 */
10959 static ADV_DCNT _adv_asc38C1600_chksum = 0x0604EF77UL; /* Expanded little-endian checksum. */
10962 * EEPROM Configuration.
10964 * All drivers should use this structure to set the default EEPROM
10965 * configuration. The BIOS now uses this structure when it is built.
10966 * Additional structure information can be found in a_condor.h where
10967 * the structure is defined.
10969 * The *_Field_IsChar structs are needed to correct for endianness.
10970 * These values are read from the board 16 bits at a time directly
10971 * into the structs. Because some fields are char, the values will be
10972 * in the wrong order. The *_Field_IsChar tells when to flip the
10973 * bytes. Data read and written to PCI memory is automatically swapped
10974 * on big-endian platforms so char fields read as words are actually being
10975 * unswapped on big-endian platforms.
10977 static ADVEEP_3550_CONFIG Default_3550_EEPROM_Config __devinitdata = {
10978 ADV_EEPROM_BIOS_ENABLE, /* cfg_lsw */
10979 0x0000, /* cfg_msw */
10980 0xFFFF, /* disc_enable */
10981 0xFFFF, /* wdtr_able */
10982 0xFFFF, /* sdtr_able */
10983 0xFFFF, /* start_motor */
10984 0xFFFF, /* tagqng_able */
10985 0xFFFF, /* bios_scan */
10986 0, /* scam_tolerant */
10987 7, /* adapter_scsi_id */
10988 0, /* bios_boot_delay */
10989 3, /* scsi_reset_delay */
10990 0, /* bios_id_lun */
10991 0, /* termination */
10993 0xFFE7, /* bios_ctrl */
10994 0xFFFF, /* ultra_able */
10996 ASC_DEF_MAX_HOST_QNG, /* max_host_qng */
10997 ASC_DEF_MAX_DVC_QNG, /* max_dvc_qng */
11000 0, /* serial_number_word1 */
11001 0, /* serial_number_word2 */
11002 0, /* serial_number_word3 */
11004 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
11005 , /* oem_name[16] */
11006 0, /* dvc_err_code */
11007 0, /* adv_err_code */
11008 0, /* adv_err_addr */
11009 0, /* saved_dvc_err_code */
11010 0, /* saved_adv_err_code */
11011 0, /* saved_adv_err_addr */
11015 static ADVEEP_3550_CONFIG ADVEEP_3550_Config_Field_IsChar __devinitdata = {
11018 0, /* -disc_enable */
11021 0, /* start_motor */
11022 0, /* tagqng_able */
11024 0, /* scam_tolerant */
11025 1, /* adapter_scsi_id */
11026 1, /* bios_boot_delay */
11027 1, /* scsi_reset_delay */
11028 1, /* bios_id_lun */
11029 1, /* termination */
11032 0, /* ultra_able */
11034 1, /* max_host_qng */
11035 1, /* max_dvc_qng */
11038 0, /* serial_number_word1 */
11039 0, /* serial_number_word2 */
11040 0, /* serial_number_word3 */
11042 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
11043 , /* oem_name[16] */
11044 0, /* dvc_err_code */
11045 0, /* adv_err_code */
11046 0, /* adv_err_addr */
11047 0, /* saved_dvc_err_code */
11048 0, /* saved_adv_err_code */
11049 0, /* saved_adv_err_addr */
11053 static ADVEEP_38C0800_CONFIG Default_38C0800_EEPROM_Config __devinitdata = {
11054 ADV_EEPROM_BIOS_ENABLE, /* 00 cfg_lsw */
11055 0x0000, /* 01 cfg_msw */
11056 0xFFFF, /* 02 disc_enable */
11057 0xFFFF, /* 03 wdtr_able */
11058 0x4444, /* 04 sdtr_speed1 */
11059 0xFFFF, /* 05 start_motor */
11060 0xFFFF, /* 06 tagqng_able */
11061 0xFFFF, /* 07 bios_scan */
11062 0, /* 08 scam_tolerant */
11063 7, /* 09 adapter_scsi_id */
11064 0, /* bios_boot_delay */
11065 3, /* 10 scsi_reset_delay */
11066 0, /* bios_id_lun */
11067 0, /* 11 termination_se */
11068 0, /* termination_lvd */
11069 0xFFE7, /* 12 bios_ctrl */
11070 0x4444, /* 13 sdtr_speed2 */
11071 0x4444, /* 14 sdtr_speed3 */
11072 ASC_DEF_MAX_HOST_QNG, /* 15 max_host_qng */
11073 ASC_DEF_MAX_DVC_QNG, /* max_dvc_qng */
11074 0, /* 16 dvc_cntl */
11075 0x4444, /* 17 sdtr_speed4 */
11076 0, /* 18 serial_number_word1 */
11077 0, /* 19 serial_number_word2 */
11078 0, /* 20 serial_number_word3 */
11079 0, /* 21 check_sum */
11080 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
11081 , /* 22-29 oem_name[16] */
11082 0, /* 30 dvc_err_code */
11083 0, /* 31 adv_err_code */
11084 0, /* 32 adv_err_addr */
11085 0, /* 33 saved_dvc_err_code */
11086 0, /* 34 saved_adv_err_code */
11087 0, /* 35 saved_adv_err_addr */
11088 0, /* 36 reserved */
11089 0, /* 37 reserved */
11090 0, /* 38 reserved */
11091 0, /* 39 reserved */
11092 0, /* 40 reserved */
11093 0, /* 41 reserved */
11094 0, /* 42 reserved */
11095 0, /* 43 reserved */
11096 0, /* 44 reserved */
11097 0, /* 45 reserved */
11098 0, /* 46 reserved */
11099 0, /* 47 reserved */
11100 0, /* 48 reserved */
11101 0, /* 49 reserved */
11102 0, /* 50 reserved */
11103 0, /* 51 reserved */
11104 0, /* 52 reserved */
11105 0, /* 53 reserved */
11106 0, /* 54 reserved */
11107 0, /* 55 reserved */
11108 0, /* 56 cisptr_lsw */
11109 0, /* 57 cisprt_msw */
11110 PCI_VENDOR_ID_ASP, /* 58 subsysvid */
11111 PCI_DEVICE_ID_38C0800_REV1, /* 59 subsysid */
11112 0, /* 60 reserved */
11113 0, /* 61 reserved */
11114 0, /* 62 reserved */
11115 0 /* 63 reserved */
11118 static ADVEEP_38C0800_CONFIG ADVEEP_38C0800_Config_Field_IsChar __devinitdata = {
11119 0, /* 00 cfg_lsw */
11120 0, /* 01 cfg_msw */
11121 0, /* 02 disc_enable */
11122 0, /* 03 wdtr_able */
11123 0, /* 04 sdtr_speed1 */
11124 0, /* 05 start_motor */
11125 0, /* 06 tagqng_able */
11126 0, /* 07 bios_scan */
11127 0, /* 08 scam_tolerant */
11128 1, /* 09 adapter_scsi_id */
11129 1, /* bios_boot_delay */
11130 1, /* 10 scsi_reset_delay */
11131 1, /* bios_id_lun */
11132 1, /* 11 termination_se */
11133 1, /* termination_lvd */
11134 0, /* 12 bios_ctrl */
11135 0, /* 13 sdtr_speed2 */
11136 0, /* 14 sdtr_speed3 */
11137 1, /* 15 max_host_qng */
11138 1, /* max_dvc_qng */
11139 0, /* 16 dvc_cntl */
11140 0, /* 17 sdtr_speed4 */
11141 0, /* 18 serial_number_word1 */
11142 0, /* 19 serial_number_word2 */
11143 0, /* 20 serial_number_word3 */
11144 0, /* 21 check_sum */
11145 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
11146 , /* 22-29 oem_name[16] */
11147 0, /* 30 dvc_err_code */
11148 0, /* 31 adv_err_code */
11149 0, /* 32 adv_err_addr */
11150 0, /* 33 saved_dvc_err_code */
11151 0, /* 34 saved_adv_err_code */
11152 0, /* 35 saved_adv_err_addr */
11153 0, /* 36 reserved */
11154 0, /* 37 reserved */
11155 0, /* 38 reserved */
11156 0, /* 39 reserved */
11157 0, /* 40 reserved */
11158 0, /* 41 reserved */
11159 0, /* 42 reserved */
11160 0, /* 43 reserved */
11161 0, /* 44 reserved */
11162 0, /* 45 reserved */
11163 0, /* 46 reserved */
11164 0, /* 47 reserved */
11165 0, /* 48 reserved */
11166 0, /* 49 reserved */
11167 0, /* 50 reserved */
11168 0, /* 51 reserved */
11169 0, /* 52 reserved */
11170 0, /* 53 reserved */
11171 0, /* 54 reserved */
11172 0, /* 55 reserved */
11173 0, /* 56 cisptr_lsw */
11174 0, /* 57 cisprt_msw */
11175 0, /* 58 subsysvid */
11176 0, /* 59 subsysid */
11177 0, /* 60 reserved */
11178 0, /* 61 reserved */
11179 0, /* 62 reserved */
11180 0 /* 63 reserved */
11183 static ADVEEP_38C1600_CONFIG Default_38C1600_EEPROM_Config __devinitdata = {
11184 ADV_EEPROM_BIOS_ENABLE, /* 00 cfg_lsw */
11185 0x0000, /* 01 cfg_msw */
11186 0xFFFF, /* 02 disc_enable */
11187 0xFFFF, /* 03 wdtr_able */
11188 0x5555, /* 04 sdtr_speed1 */
11189 0xFFFF, /* 05 start_motor */
11190 0xFFFF, /* 06 tagqng_able */
11191 0xFFFF, /* 07 bios_scan */
11192 0, /* 08 scam_tolerant */
11193 7, /* 09 adapter_scsi_id */
11194 0, /* bios_boot_delay */
11195 3, /* 10 scsi_reset_delay */
11196 0, /* bios_id_lun */
11197 0, /* 11 termination_se */
11198 0, /* termination_lvd */
11199 0xFFE7, /* 12 bios_ctrl */
11200 0x5555, /* 13 sdtr_speed2 */
11201 0x5555, /* 14 sdtr_speed3 */
11202 ASC_DEF_MAX_HOST_QNG, /* 15 max_host_qng */
11203 ASC_DEF_MAX_DVC_QNG, /* max_dvc_qng */
11204 0, /* 16 dvc_cntl */
11205 0x5555, /* 17 sdtr_speed4 */
11206 0, /* 18 serial_number_word1 */
11207 0, /* 19 serial_number_word2 */
11208 0, /* 20 serial_number_word3 */
11209 0, /* 21 check_sum */
11210 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
11211 , /* 22-29 oem_name[16] */
11212 0, /* 30 dvc_err_code */
11213 0, /* 31 adv_err_code */
11214 0, /* 32 adv_err_addr */
11215 0, /* 33 saved_dvc_err_code */
11216 0, /* 34 saved_adv_err_code */
11217 0, /* 35 saved_adv_err_addr */
11218 0, /* 36 reserved */
11219 0, /* 37 reserved */
11220 0, /* 38 reserved */
11221 0, /* 39 reserved */
11222 0, /* 40 reserved */
11223 0, /* 41 reserved */
11224 0, /* 42 reserved */
11225 0, /* 43 reserved */
11226 0, /* 44 reserved */
11227 0, /* 45 reserved */
11228 0, /* 46 reserved */
11229 0, /* 47 reserved */
11230 0, /* 48 reserved */
11231 0, /* 49 reserved */
11232 0, /* 50 reserved */
11233 0, /* 51 reserved */
11234 0, /* 52 reserved */
11235 0, /* 53 reserved */
11236 0, /* 54 reserved */
11237 0, /* 55 reserved */
11238 0, /* 56 cisptr_lsw */
11239 0, /* 57 cisprt_msw */
11240 PCI_VENDOR_ID_ASP, /* 58 subsysvid */
11241 PCI_DEVICE_ID_38C1600_REV1, /* 59 subsysid */
11242 0, /* 60 reserved */
11243 0, /* 61 reserved */
11244 0, /* 62 reserved */
11245 0 /* 63 reserved */
11248 static ADVEEP_38C1600_CONFIG ADVEEP_38C1600_Config_Field_IsChar __devinitdata = {
11249 0, /* 00 cfg_lsw */
11250 0, /* 01 cfg_msw */
11251 0, /* 02 disc_enable */
11252 0, /* 03 wdtr_able */
11253 0, /* 04 sdtr_speed1 */
11254 0, /* 05 start_motor */
11255 0, /* 06 tagqng_able */
11256 0, /* 07 bios_scan */
11257 0, /* 08 scam_tolerant */
11258 1, /* 09 adapter_scsi_id */
11259 1, /* bios_boot_delay */
11260 1, /* 10 scsi_reset_delay */
11261 1, /* bios_id_lun */
11262 1, /* 11 termination_se */
11263 1, /* termination_lvd */
11264 0, /* 12 bios_ctrl */
11265 0, /* 13 sdtr_speed2 */
11266 0, /* 14 sdtr_speed3 */
11267 1, /* 15 max_host_qng */
11268 1, /* max_dvc_qng */
11269 0, /* 16 dvc_cntl */
11270 0, /* 17 sdtr_speed4 */
11271 0, /* 18 serial_number_word1 */
11272 0, /* 19 serial_number_word2 */
11273 0, /* 20 serial_number_word3 */
11274 0, /* 21 check_sum */
11275 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
11276 , /* 22-29 oem_name[16] */
11277 0, /* 30 dvc_err_code */
11278 0, /* 31 adv_err_code */
11279 0, /* 32 adv_err_addr */
11280 0, /* 33 saved_dvc_err_code */
11281 0, /* 34 saved_adv_err_code */
11282 0, /* 35 saved_adv_err_addr */
11283 0, /* 36 reserved */
11284 0, /* 37 reserved */
11285 0, /* 38 reserved */
11286 0, /* 39 reserved */
11287 0, /* 40 reserved */
11288 0, /* 41 reserved */
11289 0, /* 42 reserved */
11290 0, /* 43 reserved */
11291 0, /* 44 reserved */
11292 0, /* 45 reserved */
11293 0, /* 46 reserved */
11294 0, /* 47 reserved */
11295 0, /* 48 reserved */
11296 0, /* 49 reserved */
11297 0, /* 50 reserved */
11298 0, /* 51 reserved */
11299 0, /* 52 reserved */
11300 0, /* 53 reserved */
11301 0, /* 54 reserved */
11302 0, /* 55 reserved */
11303 0, /* 56 cisptr_lsw */
11304 0, /* 57 cisprt_msw */
11305 0, /* 58 subsysvid */
11306 0, /* 59 subsysid */
11307 0, /* 60 reserved */
11308 0, /* 61 reserved */
11309 0, /* 62 reserved */
11310 0 /* 63 reserved */
11315 * Initialize the ADV_DVC_VAR structure.
11317 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
11319 * For a non-fatal error return a warning code. If there are no warnings
11320 * then 0 is returned.
11322 static int __devinit
11323 AdvInitGetConfig(struct pci_dev *pdev, asc_board_t *boardp)
11325 ADV_DVC_VAR *asc_dvc = &boardp->dvc_var.adv_dvc_var;
11326 unsigned short warn_code = 0;
11327 AdvPortAddr iop_base = asc_dvc->iop_base;
11331 asc_dvc->err_code = 0;
11334 * Save the state of the PCI Configuration Command Register
11335 * "Parity Error Response Control" Bit. If the bit is clear (0),
11336 * in AdvInitAsc3550/38C0800Driver() tell the microcode to ignore
11337 * DMA parity errors.
11339 asc_dvc->cfg->control_flag = 0;
11340 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
11341 if ((cmd & PCI_COMMAND_PARITY) == 0)
11342 asc_dvc->cfg->control_flag |= CONTROL_FLAG_IGNORE_PERR;
11344 asc_dvc->cfg->lib_version = (ADV_LIB_VERSION_MAJOR << 8) |
11345 ADV_LIB_VERSION_MINOR;
11346 asc_dvc->cfg->chip_version =
11347 AdvGetChipVersion(iop_base, asc_dvc->bus_type);
11349 ASC_DBG2(1, "AdvInitGetConfig: iopb_chip_id_1: 0x%x 0x%x\n",
11350 (ushort)AdvReadByteRegister(iop_base, IOPB_CHIP_ID_1),
11351 (ushort)ADV_CHIP_ID_BYTE);
11353 ASC_DBG2(1, "AdvInitGetConfig: iopw_chip_id_0: 0x%x 0x%x\n",
11354 (ushort)AdvReadWordRegister(iop_base, IOPW_CHIP_ID_0),
11355 (ushort)ADV_CHIP_ID_WORD);
11358 * Reset the chip to start and allow register writes.
11360 if (AdvFindSignature(iop_base) == 0) {
11361 asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE;
11365 * The caller must set 'chip_type' to a valid setting.
11367 if (asc_dvc->chip_type != ADV_CHIP_ASC3550 &&
11368 asc_dvc->chip_type != ADV_CHIP_ASC38C0800 &&
11369 asc_dvc->chip_type != ADV_CHIP_ASC38C1600) {
11370 asc_dvc->err_code |= ASC_IERR_BAD_CHIPTYPE;
11377 AdvWriteWordRegister(iop_base, IOPW_CTRL_REG,
11378 ADV_CTRL_REG_CMD_RESET);
11379 DvcSleepMilliSecond(100);
11380 AdvWriteWordRegister(iop_base, IOPW_CTRL_REG,
11381 ADV_CTRL_REG_CMD_WR_IO_REG);
11383 if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) {
11384 status = AdvInitFrom38C1600EEP(asc_dvc);
11385 } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800) {
11386 status = AdvInitFrom38C0800EEP(asc_dvc);
11388 status = AdvInitFrom3550EEP(asc_dvc);
11390 warn_code |= status;
11393 if (warn_code != 0) {
11394 ASC_PRINT2("AdvInitGetConfig: board %d: warning: 0x%x\n",
11395 boardp->id, warn_code);
11398 if (asc_dvc->err_code) {
11399 ASC_PRINT2("AdvInitGetConfig: board %d error: err_code 0x%x\n",
11400 boardp->id, asc_dvc->err_code);
11403 return asc_dvc->err_code;
11407 static void AdvBuildCarrierFreelist(struct adv_dvc_var *asc_dvc)
11410 ADV_SDCNT buf_size;
11411 ADV_PADDR carr_paddr;
11413 BUG_ON(!asc_dvc->carrier_buf);
11415 carrp = (ADV_CARR_T *) ADV_16BALIGN(asc_dvc->carrier_buf);
11416 asc_dvc->carr_freelist = NULL;
11417 if (carrp == asc_dvc->carrier_buf) {
11418 buf_size = ADV_CARRIER_BUFSIZE;
11420 buf_size = ADV_CARRIER_BUFSIZE - sizeof(ADV_CARR_T);
11424 /* Get physical address of the carrier 'carrp'. */
11425 ADV_DCNT contig_len = sizeof(ADV_CARR_T);
11426 carr_paddr = cpu_to_le32(DvcGetPhyAddr(asc_dvc, NULL,
11428 (ADV_SDCNT *)&contig_len,
11429 ADV_IS_CARRIER_FLAG));
11431 buf_size -= sizeof(ADV_CARR_T);
11434 * If the current carrier is not physically contiguous, then
11435 * maybe there was a page crossing. Try the next carrier
11436 * aligned start address.
11438 if (contig_len < sizeof(ADV_CARR_T)) {
11443 carrp->carr_pa = carr_paddr;
11444 carrp->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(carrp));
11447 * Insert the carrier at the beginning of the freelist.
11450 cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist));
11451 asc_dvc->carr_freelist = carrp;
11454 } while (buf_size > 0);
11458 * Load the Microcode
11460 * Write the microcode image to RISC memory starting at address 0.
11462 * The microcode is stored compressed in the following format:
11464 * 254 word (508 byte) table indexed by byte code followed
11465 * by the following byte codes:
11468 * 00: Emit word 0 in table.
11469 * 01: Emit word 1 in table.
11471 * FD: Emit word 253 in table.
11474 * FE WW WW: (3 byte code) Word to emit is the next word WW WW.
11475 * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW.
11477 * Returns 0 or an error if the checksum doesn't match
11479 static int AdvLoadMicrocode(AdvPortAddr iop_base, unsigned char *buf, int size,
11480 int memsize, int chksum)
11482 int i, j, end, len = 0;
11485 AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0);
11487 for (i = 253 * 2; i < size; i++) {
11488 if (buf[i] == 0xff) {
11489 unsigned short word = (buf[i + 3] << 8) | buf[i + 2];
11490 for (j = 0; j < buf[i + 1]; j++) {
11491 AdvWriteWordAutoIncLram(iop_base, word);
11495 } else if (buf[i] == 0xfe) {
11496 unsigned short word = (buf[i + 2] << 8) | buf[i + 1];
11497 AdvWriteWordAutoIncLram(iop_base, word);
11501 unsigned char off = buf[i] * 2;
11502 unsigned short word = (buf[off + 1] << 8) | buf[off];
11503 AdvWriteWordAutoIncLram(iop_base, word);
11510 while (len < memsize) {
11511 AdvWriteWordAutoIncLram(iop_base, 0);
11515 /* Verify the microcode checksum. */
11517 AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0);
11519 for (len = 0; len < end; len += 2) {
11520 sum += AdvReadWordAutoIncLram(iop_base);
11524 return ASC_IERR_MCODE_CHKSUM;
11530 * Initialize the ASC-3550.
11532 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
11534 * For a non-fatal error return a warning code. If there are no warnings
11535 * then 0 is returned.
11537 * Needed after initialization for error recovery.
11539 static int AdvInitAsc3550Driver(ADV_DVC_VAR *asc_dvc)
11541 AdvPortAddr iop_base;
11550 ushort bios_mem[ASC_MC_BIOSLEN / 2]; /* BIOS RISC Memory 0x40-0x8F. */
11551 ushort wdtr_able = 0, sdtr_able, tagqng_able;
11552 uchar max_cmd[ADV_MAX_TID + 1];
11554 /* If there is already an error, don't continue. */
11555 if (asc_dvc->err_code != 0)
11559 * The caller must set 'chip_type' to ADV_CHIP_ASC3550.
11561 if (asc_dvc->chip_type != ADV_CHIP_ASC3550) {
11562 asc_dvc->err_code = ASC_IERR_BAD_CHIPTYPE;
11567 iop_base = asc_dvc->iop_base;
11570 * Save the RISC memory BIOS region before writing the microcode.
11571 * The BIOS may already be loaded and using its RISC LRAM region
11572 * so its region must be saved and restored.
11574 * Note: This code makes the assumption, which is currently true,
11575 * that a chip reset does not clear RISC LRAM.
11577 for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) {
11578 AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i),
11583 * Save current per TID negotiated values.
11585 if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] == 0x55AA) {
11586 ushort bios_version, major, minor;
11589 bios_mem[(ASC_MC_BIOS_VERSION - ASC_MC_BIOSMEM) / 2];
11590 major = (bios_version >> 12) & 0xF;
11591 minor = (bios_version >> 8) & 0xF;
11592 if (major < 3 || (major == 3 && minor == 1)) {
11593 /* BIOS 3.1 and earlier location of 'wdtr_able' variable. */
11594 AdvReadWordLram(iop_base, 0x120, wdtr_able);
11596 AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
11599 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
11600 AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
11601 for (tid = 0; tid <= ADV_MAX_TID; tid++) {
11602 AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid,
11606 asc_dvc->err_code = AdvLoadMicrocode(iop_base, _adv_asc3550_buf,
11607 _adv_asc3550_size, ADV_3550_MEMSIZE,
11608 _adv_asc3550_chksum);
11609 if (asc_dvc->err_code)
11613 * Restore the RISC memory BIOS region.
11615 for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) {
11616 AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i),
11621 * Calculate and write the microcode code checksum to the microcode
11622 * code checksum location ASC_MC_CODE_CHK_SUM (0x2C).
11624 AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr);
11625 AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr);
11627 AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr);
11628 for (word = begin_addr; word < end_addr; word += 2) {
11629 code_sum += AdvReadWordAutoIncLram(iop_base);
11631 AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum);
11634 * Read and save microcode version and date.
11636 AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE,
11637 asc_dvc->cfg->mcode_date);
11638 AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM,
11639 asc_dvc->cfg->mcode_version);
11642 * Set the chip type to indicate the ASC3550.
11644 AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC3550);
11647 * If the PCI Configuration Command Register "Parity Error Response
11648 * Control" Bit was clear (0), then set the microcode variable
11649 * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
11650 * to ignore DMA parity errors.
11652 if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) {
11653 AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
11654 word |= CONTROL_FLAG_IGNORE_PERR;
11655 AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
11659 * For ASC-3550, setting the START_CTL_EMFU [3:2] bits sets a FIFO
11660 * threshold of 128 bytes. This register is only accessible to the host.
11662 AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0,
11663 START_CTL_EMFU | READ_CMD_MRM);
11666 * Microcode operating variables for WDTR, SDTR, and command tag
11667 * queuing will be set in slave_configure() based on what a
11668 * device reports it is capable of in Inquiry byte 7.
11670 * If SCSI Bus Resets have been disabled, then directly set
11671 * SDTR and WDTR from the EEPROM configuration. This will allow
11672 * the BIOS and warm boot to work without a SCSI bus hang on
11673 * the Inquiry caused by host and target mismatched DTR values.
11674 * Without the SCSI Bus Reset, before an Inquiry a device can't
11675 * be assumed to be in Asynchronous, Narrow mode.
11677 if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) {
11678 AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE,
11679 asc_dvc->wdtr_able);
11680 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE,
11681 asc_dvc->sdtr_able);
11685 * Set microcode operating variables for SDTR_SPEED1, SDTR_SPEED2,
11686 * SDTR_SPEED3, and SDTR_SPEED4 based on the ULTRA EEPROM per TID
11687 * bitmask. These values determine the maximum SDTR speed negotiated
11690 * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2,
11691 * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them
11692 * without determining here whether the device supports SDTR.
11694 * 4-bit speed SDTR speed name
11695 * =========== ===============
11696 * 0000b (0x0) SDTR disabled
11697 * 0001b (0x1) 5 Mhz
11698 * 0010b (0x2) 10 Mhz
11699 * 0011b (0x3) 20 Mhz (Ultra)
11700 * 0100b (0x4) 40 Mhz (LVD/Ultra2)
11701 * 0101b (0x5) 80 Mhz (LVD2/Ultra3)
11702 * 0110b (0x6) Undefined
11704 * 1111b (0xF) Undefined
11707 for (tid = 0; tid <= ADV_MAX_TID; tid++) {
11708 if (ADV_TID_TO_TIDMASK(tid) & asc_dvc->ultra_able) {
11709 /* Set Ultra speed for TID 'tid'. */
11710 word |= (0x3 << (4 * (tid % 4)));
11712 /* Set Fast speed for TID 'tid'. */
11713 word |= (0x2 << (4 * (tid % 4)));
11715 if (tid == 3) { /* Check if done with sdtr_speed1. */
11716 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, word);
11718 } else if (tid == 7) { /* Check if done with sdtr_speed2. */
11719 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, word);
11721 } else if (tid == 11) { /* Check if done with sdtr_speed3. */
11722 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, word);
11724 } else if (tid == 15) { /* Check if done with sdtr_speed4. */
11725 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, word);
11731 * Set microcode operating variable for the disconnect per TID bitmask.
11733 AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE,
11734 asc_dvc->cfg->disc_enable);
11737 * Set SCSI_CFG0 Microcode Default Value.
11739 * The microcode will set the SCSI_CFG0 register using this value
11740 * after it is started below.
11742 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0,
11743 PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN |
11744 asc_dvc->chip_scsi_id);
11747 * Determine SCSI_CFG1 Microcode Default Value.
11749 * The microcode will set the SCSI_CFG1 register using this value
11750 * after it is started below.
11753 /* Read current SCSI_CFG1 Register value. */
11754 scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1);
11757 * If all three connectors are in use, return an error.
11759 if ((scsi_cfg1 & CABLE_ILLEGAL_A) == 0 ||
11760 (scsi_cfg1 & CABLE_ILLEGAL_B) == 0) {
11761 asc_dvc->err_code |= ASC_IERR_ILLEGAL_CONNECTION;
11766 * If the internal narrow cable is reversed all of the SCSI_CTRL
11767 * register signals will be set. Check for and return an error if
11768 * this condition is found.
11770 if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) {
11771 asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE;
11776 * If this is a differential board and a single-ended device
11777 * is attached to one of the connectors, return an error.
11779 if ((scsi_cfg1 & DIFF_MODE) && (scsi_cfg1 & DIFF_SENSE) == 0) {
11780 asc_dvc->err_code |= ASC_IERR_SINGLE_END_DEVICE;
11785 * If automatic termination control is enabled, then set the
11786 * termination value based on a table listed in a_condor.h.
11788 * If manual termination was specified with an EEPROM setting
11789 * then 'termination' was set-up in AdvInitFrom3550EEPROM() and
11790 * is ready to be 'ored' into SCSI_CFG1.
11792 if (asc_dvc->cfg->termination == 0) {
11794 * The software always controls termination by setting TERM_CTL_SEL.
11795 * If TERM_CTL_SEL were set to 0, the hardware would set termination.
11797 asc_dvc->cfg->termination |= TERM_CTL_SEL;
11799 switch (scsi_cfg1 & CABLE_DETECT) {
11800 /* TERM_CTL_H: on, TERM_CTL_L: on */
11807 asc_dvc->cfg->termination |= (TERM_CTL_H | TERM_CTL_L);
11810 /* TERM_CTL_H: on, TERM_CTL_L: off */
11816 asc_dvc->cfg->termination |= TERM_CTL_H;
11819 /* TERM_CTL_H: off, TERM_CTL_L: off */
11827 * Clear any set TERM_CTL_H and TERM_CTL_L bits.
11829 scsi_cfg1 &= ~TERM_CTL;
11832 * Invert the TERM_CTL_H and TERM_CTL_L bits and then
11833 * set 'scsi_cfg1'. The TERM_POL bit does not need to be
11834 * referenced, because the hardware internally inverts
11835 * the Termination High and Low bits if TERM_POL is set.
11837 scsi_cfg1 |= (TERM_CTL_SEL | (~asc_dvc->cfg->termination & TERM_CTL));
11840 * Set SCSI_CFG1 Microcode Default Value
11842 * Set filter value and possibly modified termination control
11843 * bits in the Microcode SCSI_CFG1 Register Value.
11845 * The microcode will set the SCSI_CFG1 register using this value
11846 * after it is started below.
11848 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1,
11849 FLTR_DISABLE | scsi_cfg1);
11852 * Set MEM_CFG Microcode Default Value
11854 * The microcode will set the MEM_CFG register using this value
11855 * after it is started below.
11857 * MEM_CFG may be accessed as a word or byte, but only bits 0-7
11860 * ASC-3550 has 8KB internal memory.
11862 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG,
11863 BIOS_EN | RAM_SZ_8KB);
11866 * Set SEL_MASK Microcode Default Value
11868 * The microcode will set the SEL_MASK register using this value
11869 * after it is started below.
11871 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK,
11872 ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id));
11874 AdvBuildCarrierFreelist(asc_dvc);
11877 * Set-up the Host->RISC Initiator Command Queue (ICQ).
11880 if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) {
11881 asc_dvc->err_code |= ASC_IERR_NO_CARRIER;
11884 asc_dvc->carr_freelist = (ADV_CARR_T *)
11885 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa));
11888 * The first command issued will be placed in the stopper carrier.
11890 asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
11893 * Set RISC ICQ physical address start value.
11895 AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa);
11898 * Set-up the RISC->Host Initiator Response Queue (IRQ).
11900 if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) {
11901 asc_dvc->err_code |= ASC_IERR_NO_CARRIER;
11904 asc_dvc->carr_freelist = (ADV_CARR_T *)
11905 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa));
11908 * The first command completed by the RISC will be placed in
11911 * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is
11912 * completed the RISC will set the ASC_RQ_STOPPER bit.
11914 asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
11917 * Set RISC IRQ physical address start value.
11919 AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa);
11920 asc_dvc->carr_pending_cnt = 0;
11922 AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES,
11923 (ADV_INTR_ENABLE_HOST_INTR |
11924 ADV_INTR_ENABLE_GLOBAL_INTR));
11926 AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word);
11927 AdvWriteWordRegister(iop_base, IOPW_PC, word);
11929 /* finally, finally, gentlemen, start your engine */
11930 AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN);
11933 * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus
11934 * Resets should be performed. The RISC has to be running
11935 * to issue a SCSI Bus Reset.
11937 if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) {
11939 * If the BIOS Signature is present in memory, restore the
11940 * BIOS Handshake Configuration Table and do not perform
11941 * a SCSI Bus Reset.
11943 if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] ==
11946 * Restore per TID negotiated values.
11948 AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
11949 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
11950 AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE,
11952 for (tid = 0; tid <= ADV_MAX_TID; tid++) {
11953 AdvWriteByteLram(iop_base,
11954 ASC_MC_NUMBER_OF_MAX_CMD + tid,
11958 if (AdvResetSB(asc_dvc) != ADV_TRUE) {
11959 warn_code = ASC_WARN_BUSRESET_ERROR;
11968 * Initialize the ASC-38C0800.
11970 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
11972 * For a non-fatal error return a warning code. If there are no warnings
11973 * then 0 is returned.
11975 * Needed after initialization for error recovery.
11977 static int AdvInitAsc38C0800Driver(ADV_DVC_VAR *asc_dvc)
11979 AdvPortAddr iop_base;
11989 ushort bios_mem[ASC_MC_BIOSLEN / 2]; /* BIOS RISC Memory 0x40-0x8F. */
11990 ushort wdtr_able, sdtr_able, tagqng_able;
11991 uchar max_cmd[ADV_MAX_TID + 1];
11993 /* If there is already an error, don't continue. */
11994 if (asc_dvc->err_code != 0)
11998 * The caller must set 'chip_type' to ADV_CHIP_ASC38C0800.
12000 if (asc_dvc->chip_type != ADV_CHIP_ASC38C0800) {
12001 asc_dvc->err_code = ASC_IERR_BAD_CHIPTYPE;
12006 iop_base = asc_dvc->iop_base;
12009 * Save the RISC memory BIOS region before writing the microcode.
12010 * The BIOS may already be loaded and using its RISC LRAM region
12011 * so its region must be saved and restored.
12013 * Note: This code makes the assumption, which is currently true,
12014 * that a chip reset does not clear RISC LRAM.
12016 for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) {
12017 AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i),
12022 * Save current per TID negotiated values.
12024 AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
12025 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
12026 AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
12027 for (tid = 0; tid <= ADV_MAX_TID; tid++) {
12028 AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid,
12033 * RAM BIST (RAM Built-In Self Test)
12035 * Address : I/O base + offset 0x38h register (byte).
12036 * Function: Bit 7-6(RW) : RAM mode
12037 * Normal Mode : 0x00
12038 * Pre-test Mode : 0x40
12039 * RAM Test Mode : 0x80
12041 * Bit 4(RO) : Done bit
12042 * Bit 3-0(RO) : Status
12043 * Host Error : 0x08
12044 * Int_RAM Error : 0x04
12045 * RISC Error : 0x02
12046 * SCSI Error : 0x01
12049 * Note: RAM BIST code should be put right here, before loading the
12050 * microcode and after saving the RISC memory BIOS region.
12056 * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds.
12057 * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return
12058 * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset
12059 * to NORMAL_MODE, return an error too.
12061 for (i = 0; i < 2; i++) {
12062 AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, PRE_TEST_MODE);
12063 DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */
12064 byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST);
12065 if ((byte & RAM_TEST_DONE) == 0
12066 || (byte & 0x0F) != PRE_TEST_VALUE) {
12067 asc_dvc->err_code = ASC_IERR_BIST_PRE_TEST;
12071 AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE);
12072 DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */
12073 if (AdvReadByteRegister(iop_base, IOPB_RAM_BIST)
12075 asc_dvc->err_code = ASC_IERR_BIST_PRE_TEST;
12081 * LRAM Test - It takes about 1.5 ms to run through the test.
12083 * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds.
12084 * If Done bit not set or Status not 0, save register byte, set the
12085 * err_code, and return an error.
12087 AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, RAM_TEST_MODE);
12088 DvcSleepMilliSecond(10); /* Wait for 10ms before checking status. */
12090 byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST);
12091 if ((byte & RAM_TEST_DONE) == 0 || (byte & RAM_TEST_STATUS) != 0) {
12092 /* Get here if Done bit not set or Status not 0. */
12093 asc_dvc->bist_err_code = byte; /* for BIOS display message */
12094 asc_dvc->err_code = ASC_IERR_BIST_RAM_TEST;
12098 /* We need to reset back to normal mode after LRAM test passes. */
12099 AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE);
12101 asc_dvc->err_code = AdvLoadMicrocode(iop_base, _adv_asc38C0800_buf,
12102 _adv_asc38C0800_size, ADV_38C0800_MEMSIZE,
12103 _adv_asc38C0800_chksum);
12104 if (asc_dvc->err_code)
12108 * Restore the RISC memory BIOS region.
12110 for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) {
12111 AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i),
12116 * Calculate and write the microcode code checksum to the microcode
12117 * code checksum location ASC_MC_CODE_CHK_SUM (0x2C).
12119 AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr);
12120 AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr);
12122 AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr);
12123 for (word = begin_addr; word < end_addr; word += 2) {
12124 code_sum += AdvReadWordAutoIncLram(iop_base);
12126 AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum);
12129 * Read microcode version and date.
12131 AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE,
12132 asc_dvc->cfg->mcode_date);
12133 AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM,
12134 asc_dvc->cfg->mcode_version);
12137 * Set the chip type to indicate the ASC38C0800.
12139 AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC38C0800);
12142 * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register.
12143 * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current
12144 * cable detection and then we are able to read C_DET[3:0].
12146 * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1
12147 * Microcode Default Value' section below.
12149 scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1);
12150 AdvWriteWordRegister(iop_base, IOPW_SCSI_CFG1,
12151 scsi_cfg1 | DIS_TERM_DRV);
12154 * If the PCI Configuration Command Register "Parity Error Response
12155 * Control" Bit was clear (0), then set the microcode variable
12156 * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
12157 * to ignore DMA parity errors.
12159 if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) {
12160 AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
12161 word |= CONTROL_FLAG_IGNORE_PERR;
12162 AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
12166 * For ASC-38C0800, set FIFO_THRESH_80B [6:4] bits and START_CTL_TH [3:2]
12167 * bits for the default FIFO threshold.
12169 * Note: ASC-38C0800 FIFO threshold has been changed to 256 bytes.
12171 * For DMA Errata #4 set the BC_THRESH_ENB bit.
12173 AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0,
12174 BC_THRESH_ENB | FIFO_THRESH_80B | START_CTL_TH |
12178 * Microcode operating variables for WDTR, SDTR, and command tag
12179 * queuing will be set in slave_configure() based on what a
12180 * device reports it is capable of in Inquiry byte 7.
12182 * If SCSI Bus Resets have been disabled, then directly set
12183 * SDTR and WDTR from the EEPROM configuration. This will allow
12184 * the BIOS and warm boot to work without a SCSI bus hang on
12185 * the Inquiry caused by host and target mismatched DTR values.
12186 * Without the SCSI Bus Reset, before an Inquiry a device can't
12187 * be assumed to be in Asynchronous, Narrow mode.
12189 if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) {
12190 AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE,
12191 asc_dvc->wdtr_able);
12192 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE,
12193 asc_dvc->sdtr_able);
12197 * Set microcode operating variables for DISC and SDTR_SPEED1,
12198 * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM
12199 * configuration values.
12201 * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2,
12202 * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them
12203 * without determining here whether the device supports SDTR.
12205 AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE,
12206 asc_dvc->cfg->disc_enable);
12207 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, asc_dvc->sdtr_speed1);
12208 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, asc_dvc->sdtr_speed2);
12209 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, asc_dvc->sdtr_speed3);
12210 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, asc_dvc->sdtr_speed4);
12213 * Set SCSI_CFG0 Microcode Default Value.
12215 * The microcode will set the SCSI_CFG0 register using this value
12216 * after it is started below.
12218 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0,
12219 PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN |
12220 asc_dvc->chip_scsi_id);
12223 * Determine SCSI_CFG1 Microcode Default Value.
12225 * The microcode will set the SCSI_CFG1 register using this value
12226 * after it is started below.
12229 /* Read current SCSI_CFG1 Register value. */
12230 scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1);
12233 * If the internal narrow cable is reversed all of the SCSI_CTRL
12234 * register signals will be set. Check for and return an error if
12235 * this condition is found.
12237 if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) {
12238 asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE;
12243 * All kind of combinations of devices attached to one of four
12244 * connectors are acceptable except HVD device attached. For example,
12245 * LVD device can be attached to SE connector while SE device attached
12246 * to LVD connector. If LVD device attached to SE connector, it only
12247 * runs up to Ultra speed.
12249 * If an HVD device is attached to one of LVD connectors, return an
12250 * error. However, there is no way to detect HVD device attached to
12253 if (scsi_cfg1 & HVD) {
12254 asc_dvc->err_code = ASC_IERR_HVD_DEVICE;
12259 * If either SE or LVD automatic termination control is enabled, then
12260 * set the termination value based on a table listed in a_condor.h.
12262 * If manual termination was specified with an EEPROM setting then
12263 * 'termination' was set-up in AdvInitFrom38C0800EEPROM() and is ready
12264 * to be 'ored' into SCSI_CFG1.
12266 if ((asc_dvc->cfg->termination & TERM_SE) == 0) {
12267 /* SE automatic termination control is enabled. */
12268 switch (scsi_cfg1 & C_DET_SE) {
12269 /* TERM_SE_HI: on, TERM_SE_LO: on */
12273 asc_dvc->cfg->termination |= TERM_SE;
12276 /* TERM_SE_HI: on, TERM_SE_LO: off */
12278 asc_dvc->cfg->termination |= TERM_SE_HI;
12283 if ((asc_dvc->cfg->termination & TERM_LVD) == 0) {
12284 /* LVD automatic termination control is enabled. */
12285 switch (scsi_cfg1 & C_DET_LVD) {
12286 /* TERM_LVD_HI: on, TERM_LVD_LO: on */
12290 asc_dvc->cfg->termination |= TERM_LVD;
12293 /* TERM_LVD_HI: off, TERM_LVD_LO: off */
12300 * Clear any set TERM_SE and TERM_LVD bits.
12302 scsi_cfg1 &= (~TERM_SE & ~TERM_LVD);
12305 * Invert the TERM_SE and TERM_LVD bits and then set 'scsi_cfg1'.
12307 scsi_cfg1 |= (~asc_dvc->cfg->termination & 0xF0);
12310 * Clear BIG_ENDIAN, DIS_TERM_DRV, Terminator Polarity and HVD/LVD/SE
12311 * bits and set possibly modified termination control bits in the
12312 * Microcode SCSI_CFG1 Register Value.
12314 scsi_cfg1 &= (~BIG_ENDIAN & ~DIS_TERM_DRV & ~TERM_POL & ~HVD_LVD_SE);
12317 * Set SCSI_CFG1 Microcode Default Value
12319 * Set possibly modified termination control and reset DIS_TERM_DRV
12320 * bits in the Microcode SCSI_CFG1 Register Value.
12322 * The microcode will set the SCSI_CFG1 register using this value
12323 * after it is started below.
12325 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, scsi_cfg1);
12328 * Set MEM_CFG Microcode Default Value
12330 * The microcode will set the MEM_CFG register using this value
12331 * after it is started below.
12333 * MEM_CFG may be accessed as a word or byte, but only bits 0-7
12336 * ASC-38C0800 has 16KB internal memory.
12338 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG,
12339 BIOS_EN | RAM_SZ_16KB);
12342 * Set SEL_MASK Microcode Default Value
12344 * The microcode will set the SEL_MASK register using this value
12345 * after it is started below.
12347 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK,
12348 ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id));
12350 AdvBuildCarrierFreelist(asc_dvc);
12353 * Set-up the Host->RISC Initiator Command Queue (ICQ).
12356 if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) {
12357 asc_dvc->err_code |= ASC_IERR_NO_CARRIER;
12360 asc_dvc->carr_freelist = (ADV_CARR_T *)
12361 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa));
12364 * The first command issued will be placed in the stopper carrier.
12366 asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
12369 * Set RISC ICQ physical address start value.
12370 * carr_pa is LE, must be native before write
12372 AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa);
12375 * Set-up the RISC->Host Initiator Response Queue (IRQ).
12377 if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) {
12378 asc_dvc->err_code |= ASC_IERR_NO_CARRIER;
12381 asc_dvc->carr_freelist = (ADV_CARR_T *)
12382 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa));
12385 * The first command completed by the RISC will be placed in
12388 * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is
12389 * completed the RISC will set the ASC_RQ_STOPPER bit.
12391 asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
12394 * Set RISC IRQ physical address start value.
12396 * carr_pa is LE, must be native before write *
12398 AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa);
12399 asc_dvc->carr_pending_cnt = 0;
12401 AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES,
12402 (ADV_INTR_ENABLE_HOST_INTR |
12403 ADV_INTR_ENABLE_GLOBAL_INTR));
12405 AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word);
12406 AdvWriteWordRegister(iop_base, IOPW_PC, word);
12408 /* finally, finally, gentlemen, start your engine */
12409 AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN);
12412 * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus
12413 * Resets should be performed. The RISC has to be running
12414 * to issue a SCSI Bus Reset.
12416 if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) {
12418 * If the BIOS Signature is present in memory, restore the
12419 * BIOS Handshake Configuration Table and do not perform
12420 * a SCSI Bus Reset.
12422 if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] ==
12425 * Restore per TID negotiated values.
12427 AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
12428 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
12429 AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE,
12431 for (tid = 0; tid <= ADV_MAX_TID; tid++) {
12432 AdvWriteByteLram(iop_base,
12433 ASC_MC_NUMBER_OF_MAX_CMD + tid,
12437 if (AdvResetSB(asc_dvc) != ADV_TRUE) {
12438 warn_code = ASC_WARN_BUSRESET_ERROR;
12447 * Initialize the ASC-38C1600.
12449 * On failure set the ASC_DVC_VAR field 'err_code' and return ADV_ERROR.
12451 * For a non-fatal error return a warning code. If there are no warnings
12452 * then 0 is returned.
12454 * Needed after initialization for error recovery.
12456 static int AdvInitAsc38C1600Driver(ADV_DVC_VAR *asc_dvc)
12458 AdvPortAddr iop_base;
12468 ushort bios_mem[ASC_MC_BIOSLEN / 2]; /* BIOS RISC Memory 0x40-0x8F. */
12469 ushort wdtr_able, sdtr_able, ppr_able, tagqng_able;
12470 uchar max_cmd[ASC_MAX_TID + 1];
12472 /* If there is already an error, don't continue. */
12473 if (asc_dvc->err_code != 0) {
12478 * The caller must set 'chip_type' to ADV_CHIP_ASC38C1600.
12480 if (asc_dvc->chip_type != ADV_CHIP_ASC38C1600) {
12481 asc_dvc->err_code = ASC_IERR_BAD_CHIPTYPE;
12486 iop_base = asc_dvc->iop_base;
12489 * Save the RISC memory BIOS region before writing the microcode.
12490 * The BIOS may already be loaded and using its RISC LRAM region
12491 * so its region must be saved and restored.
12493 * Note: This code makes the assumption, which is currently true,
12494 * that a chip reset does not clear RISC LRAM.
12496 for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) {
12497 AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i),
12502 * Save current per TID negotiated values.
12504 AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
12505 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
12506 AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able);
12507 AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
12508 for (tid = 0; tid <= ASC_MAX_TID; tid++) {
12509 AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid,
12514 * RAM BIST (Built-In Self Test)
12516 * Address : I/O base + offset 0x38h register (byte).
12517 * Function: Bit 7-6(RW) : RAM mode
12518 * Normal Mode : 0x00
12519 * Pre-test Mode : 0x40
12520 * RAM Test Mode : 0x80
12522 * Bit 4(RO) : Done bit
12523 * Bit 3-0(RO) : Status
12524 * Host Error : 0x08
12525 * Int_RAM Error : 0x04
12526 * RISC Error : 0x02
12527 * SCSI Error : 0x01
12530 * Note: RAM BIST code should be put right here, before loading the
12531 * microcode and after saving the RISC memory BIOS region.
12537 * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds.
12538 * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return
12539 * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset
12540 * to NORMAL_MODE, return an error too.
12542 for (i = 0; i < 2; i++) {
12543 AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, PRE_TEST_MODE);
12544 DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */
12545 byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST);
12546 if ((byte & RAM_TEST_DONE) == 0
12547 || (byte & 0x0F) != PRE_TEST_VALUE) {
12548 asc_dvc->err_code = ASC_IERR_BIST_PRE_TEST;
12552 AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE);
12553 DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */
12554 if (AdvReadByteRegister(iop_base, IOPB_RAM_BIST)
12556 asc_dvc->err_code = ASC_IERR_BIST_PRE_TEST;
12562 * LRAM Test - It takes about 1.5 ms to run through the test.
12564 * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds.
12565 * If Done bit not set or Status not 0, save register byte, set the
12566 * err_code, and return an error.
12568 AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, RAM_TEST_MODE);
12569 DvcSleepMilliSecond(10); /* Wait for 10ms before checking status. */
12571 byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST);
12572 if ((byte & RAM_TEST_DONE) == 0 || (byte & RAM_TEST_STATUS) != 0) {
12573 /* Get here if Done bit not set or Status not 0. */
12574 asc_dvc->bist_err_code = byte; /* for BIOS display message */
12575 asc_dvc->err_code = ASC_IERR_BIST_RAM_TEST;
12579 /* We need to reset back to normal mode after LRAM test passes. */
12580 AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE);
12582 asc_dvc->err_code = AdvLoadMicrocode(iop_base, _adv_asc38C1600_buf,
12583 _adv_asc38C1600_size, ADV_38C1600_MEMSIZE,
12584 _adv_asc38C1600_chksum);
12585 if (asc_dvc->err_code)
12589 * Restore the RISC memory BIOS region.
12591 for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) {
12592 AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i),
12597 * Calculate and write the microcode code checksum to the microcode
12598 * code checksum location ASC_MC_CODE_CHK_SUM (0x2C).
12600 AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr);
12601 AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr);
12603 AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr);
12604 for (word = begin_addr; word < end_addr; word += 2) {
12605 code_sum += AdvReadWordAutoIncLram(iop_base);
12607 AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum);
12610 * Read microcode version and date.
12612 AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE,
12613 asc_dvc->cfg->mcode_date);
12614 AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM,
12615 asc_dvc->cfg->mcode_version);
12618 * Set the chip type to indicate the ASC38C1600.
12620 AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC38C1600);
12623 * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register.
12624 * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current
12625 * cable detection and then we are able to read C_DET[3:0].
12627 * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1
12628 * Microcode Default Value' section below.
12630 scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1);
12631 AdvWriteWordRegister(iop_base, IOPW_SCSI_CFG1,
12632 scsi_cfg1 | DIS_TERM_DRV);
12635 * If the PCI Configuration Command Register "Parity Error Response
12636 * Control" Bit was clear (0), then set the microcode variable
12637 * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
12638 * to ignore DMA parity errors.
12640 if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) {
12641 AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
12642 word |= CONTROL_FLAG_IGNORE_PERR;
12643 AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
12647 * If the BIOS control flag AIPP (Asynchronous Information
12648 * Phase Protection) disable bit is not set, then set the firmware
12649 * 'control_flag' CONTROL_FLAG_ENABLE_AIPP bit to enable
12650 * AIPP checking and encoding.
12652 if ((asc_dvc->bios_ctrl & BIOS_CTRL_AIPP_DIS) == 0) {
12653 AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
12654 word |= CONTROL_FLAG_ENABLE_AIPP;
12655 AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
12659 * For ASC-38C1600 use DMA_CFG0 default values: FIFO_THRESH_80B [6:4],
12660 * and START_CTL_TH [3:2].
12662 AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0,
12663 FIFO_THRESH_80B | START_CTL_TH | READ_CMD_MRM);
12666 * Microcode operating variables for WDTR, SDTR, and command tag
12667 * queuing will be set in slave_configure() based on what a
12668 * device reports it is capable of in Inquiry byte 7.
12670 * If SCSI Bus Resets have been disabled, then directly set
12671 * SDTR and WDTR from the EEPROM configuration. This will allow
12672 * the BIOS and warm boot to work without a SCSI bus hang on
12673 * the Inquiry caused by host and target mismatched DTR values.
12674 * Without the SCSI Bus Reset, before an Inquiry a device can't
12675 * be assumed to be in Asynchronous, Narrow mode.
12677 if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) {
12678 AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE,
12679 asc_dvc->wdtr_able);
12680 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE,
12681 asc_dvc->sdtr_able);
12685 * Set microcode operating variables for DISC and SDTR_SPEED1,
12686 * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM
12687 * configuration values.
12689 * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2,
12690 * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them
12691 * without determining here whether the device supports SDTR.
12693 AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE,
12694 asc_dvc->cfg->disc_enable);
12695 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, asc_dvc->sdtr_speed1);
12696 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, asc_dvc->sdtr_speed2);
12697 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, asc_dvc->sdtr_speed3);
12698 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, asc_dvc->sdtr_speed4);
12701 * Set SCSI_CFG0 Microcode Default Value.
12703 * The microcode will set the SCSI_CFG0 register using this value
12704 * after it is started below.
12706 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0,
12707 PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN |
12708 asc_dvc->chip_scsi_id);
12711 * Calculate SCSI_CFG1 Microcode Default Value.
12713 * The microcode will set the SCSI_CFG1 register using this value
12714 * after it is started below.
12716 * Each ASC-38C1600 function has only two cable detect bits.
12717 * The bus mode override bits are in IOPB_SOFT_OVER_WR.
12719 scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1);
12722 * If the cable is reversed all of the SCSI_CTRL register signals
12723 * will be set. Check for and return an error if this condition is
12726 if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) {
12727 asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE;
12732 * Each ASC-38C1600 function has two connectors. Only an HVD device
12733 * can not be connected to either connector. An LVD device or SE device
12734 * may be connected to either connecor. If an SE device is connected,
12735 * then at most Ultra speed (20 Mhz) can be used on both connectors.
12737 * If an HVD device is attached, return an error.
12739 if (scsi_cfg1 & HVD) {
12740 asc_dvc->err_code |= ASC_IERR_HVD_DEVICE;
12745 * Each function in the ASC-38C1600 uses only the SE cable detect and
12746 * termination because there are two connectors for each function. Each
12747 * function may use either LVD or SE mode. Corresponding the SE automatic
12748 * termination control EEPROM bits are used for each function. Each
12749 * function has its own EEPROM. If SE automatic control is enabled for
12750 * the function, then set the termination value based on a table listed
12753 * If manual termination is specified in the EEPROM for the function,
12754 * then 'termination' was set-up in AscInitFrom38C1600EEPROM() and is
12755 * ready to be 'ored' into SCSI_CFG1.
12757 if ((asc_dvc->cfg->termination & TERM_SE) == 0) {
12758 struct pci_dev *pdev = adv_dvc_to_pdev(asc_dvc);
12759 /* SE automatic termination control is enabled. */
12760 switch (scsi_cfg1 & C_DET_SE) {
12761 /* TERM_SE_HI: on, TERM_SE_LO: on */
12765 asc_dvc->cfg->termination |= TERM_SE;
12769 if (PCI_FUNC(pdev->devfn) == 0) {
12770 /* Function 0 - TERM_SE_HI: off, TERM_SE_LO: off */
12772 /* Function 1 - TERM_SE_HI: on, TERM_SE_LO: off */
12773 asc_dvc->cfg->termination |= TERM_SE_HI;
12780 * Clear any set TERM_SE bits.
12782 scsi_cfg1 &= ~TERM_SE;
12785 * Invert the TERM_SE bits and then set 'scsi_cfg1'.
12787 scsi_cfg1 |= (~asc_dvc->cfg->termination & TERM_SE);
12790 * Clear Big Endian and Terminator Polarity bits and set possibly
12791 * modified termination control bits in the Microcode SCSI_CFG1
12794 * Big Endian bit is not used even on big endian machines.
12796 scsi_cfg1 &= (~BIG_ENDIAN & ~DIS_TERM_DRV & ~TERM_POL);
12799 * Set SCSI_CFG1 Microcode Default Value
12801 * Set possibly modified termination control bits in the Microcode
12802 * SCSI_CFG1 Register Value.
12804 * The microcode will set the SCSI_CFG1 register using this value
12805 * after it is started below.
12807 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, scsi_cfg1);
12810 * Set MEM_CFG Microcode Default Value
12812 * The microcode will set the MEM_CFG register using this value
12813 * after it is started below.
12815 * MEM_CFG may be accessed as a word or byte, but only bits 0-7
12818 * ASC-38C1600 has 32KB internal memory.
12820 * XXX - Since ASC38C1600 Rev.3 has a Local RAM failure issue, we come
12821 * out a special 16K Adv Library and Microcode version. After the issue
12822 * resolved, we should turn back to the 32K support. Both a_condor.h and
12823 * mcode.sas files also need to be updated.
12825 * AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG,
12826 * BIOS_EN | RAM_SZ_32KB);
12828 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG,
12829 BIOS_EN | RAM_SZ_16KB);
12832 * Set SEL_MASK Microcode Default Value
12834 * The microcode will set the SEL_MASK register using this value
12835 * after it is started below.
12837 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK,
12838 ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id));
12840 AdvBuildCarrierFreelist(asc_dvc);
12843 * Set-up the Host->RISC Initiator Command Queue (ICQ).
12845 if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) {
12846 asc_dvc->err_code |= ASC_IERR_NO_CARRIER;
12849 asc_dvc->carr_freelist = (ADV_CARR_T *)
12850 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa));
12853 * The first command issued will be placed in the stopper carrier.
12855 asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
12858 * Set RISC ICQ physical address start value. Initialize the
12859 * COMMA register to the same value otherwise the RISC will
12860 * prematurely detect a command is available.
12862 AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa);
12863 AdvWriteDWordRegister(iop_base, IOPDW_COMMA,
12864 le32_to_cpu(asc_dvc->icq_sp->carr_pa));
12867 * Set-up the RISC->Host Initiator Response Queue (IRQ).
12869 if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) {
12870 asc_dvc->err_code |= ASC_IERR_NO_CARRIER;
12873 asc_dvc->carr_freelist = (ADV_CARR_T *)
12874 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa));
12877 * The first command completed by the RISC will be placed in
12880 * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is
12881 * completed the RISC will set the ASC_RQ_STOPPER bit.
12883 asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
12886 * Set RISC IRQ physical address start value.
12888 AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa);
12889 asc_dvc->carr_pending_cnt = 0;
12891 AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES,
12892 (ADV_INTR_ENABLE_HOST_INTR |
12893 ADV_INTR_ENABLE_GLOBAL_INTR));
12894 AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word);
12895 AdvWriteWordRegister(iop_base, IOPW_PC, word);
12897 /* finally, finally, gentlemen, start your engine */
12898 AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN);
12901 * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus
12902 * Resets should be performed. The RISC has to be running
12903 * to issue a SCSI Bus Reset.
12905 if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) {
12907 * If the BIOS Signature is present in memory, restore the
12908 * per TID microcode operating variables.
12910 if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] ==
12913 * Restore per TID negotiated values.
12915 AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
12916 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
12917 AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able);
12918 AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE,
12920 for (tid = 0; tid <= ASC_MAX_TID; tid++) {
12921 AdvWriteByteLram(iop_base,
12922 ASC_MC_NUMBER_OF_MAX_CMD + tid,
12926 if (AdvResetSB(asc_dvc) != ADV_TRUE) {
12927 warn_code = ASC_WARN_BUSRESET_ERROR;
12936 * Read the board's EEPROM configuration. Set fields in ADV_DVC_VAR and
12937 * ADV_DVC_CFG based on the EEPROM settings. The chip is stopped while
12938 * all of this is done.
12940 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
12942 * For a non-fatal error return a warning code. If there are no warnings
12943 * then 0 is returned.
12945 * Note: Chip is stopped on entry.
12947 static int __devinit AdvInitFrom3550EEP(ADV_DVC_VAR *asc_dvc)
12949 AdvPortAddr iop_base;
12951 ADVEEP_3550_CONFIG eep_config;
12953 iop_base = asc_dvc->iop_base;
12958 * Read the board's EEPROM configuration.
12960 * Set default values if a bad checksum is found.
12962 if (AdvGet3550EEPConfig(iop_base, &eep_config) != eep_config.check_sum) {
12963 warn_code |= ASC_WARN_EEPROM_CHKSUM;
12966 * Set EEPROM default values.
12968 memcpy(&eep_config, &Default_3550_EEPROM_Config,
12969 sizeof(ADVEEP_3550_CONFIG));
12972 * Assume the 6 byte board serial number that was read from
12973 * EEPROM is correct even if the EEPROM checksum failed.
12975 eep_config.serial_number_word3 =
12976 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1);
12978 eep_config.serial_number_word2 =
12979 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 2);
12981 eep_config.serial_number_word1 =
12982 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 3);
12984 AdvSet3550EEPConfig(iop_base, &eep_config);
12987 * Set ASC_DVC_VAR and ASC_DVC_CFG variables from the
12988 * EEPROM configuration that was read.
12990 * This is the mapping of EEPROM fields to Adv Library fields.
12992 asc_dvc->wdtr_able = eep_config.wdtr_able;
12993 asc_dvc->sdtr_able = eep_config.sdtr_able;
12994 asc_dvc->ultra_able = eep_config.ultra_able;
12995 asc_dvc->tagqng_able = eep_config.tagqng_able;
12996 asc_dvc->cfg->disc_enable = eep_config.disc_enable;
12997 asc_dvc->max_host_qng = eep_config.max_host_qng;
12998 asc_dvc->max_dvc_qng = eep_config.max_dvc_qng;
12999 asc_dvc->chip_scsi_id = (eep_config.adapter_scsi_id & ADV_MAX_TID);
13000 asc_dvc->start_motor = eep_config.start_motor;
13001 asc_dvc->scsi_reset_wait = eep_config.scsi_reset_delay;
13002 asc_dvc->bios_ctrl = eep_config.bios_ctrl;
13003 asc_dvc->no_scam = eep_config.scam_tolerant;
13004 asc_dvc->cfg->serial1 = eep_config.serial_number_word1;
13005 asc_dvc->cfg->serial2 = eep_config.serial_number_word2;
13006 asc_dvc->cfg->serial3 = eep_config.serial_number_word3;
13009 * Set the host maximum queuing (max. 253, min. 16) and the per device
13010 * maximum queuing (max. 63, min. 4).
13012 if (eep_config.max_host_qng > ASC_DEF_MAX_HOST_QNG) {
13013 eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG;
13014 } else if (eep_config.max_host_qng < ASC_DEF_MIN_HOST_QNG) {
13015 /* If the value is zero, assume it is uninitialized. */
13016 if (eep_config.max_host_qng == 0) {
13017 eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG;
13019 eep_config.max_host_qng = ASC_DEF_MIN_HOST_QNG;
13023 if (eep_config.max_dvc_qng > ASC_DEF_MAX_DVC_QNG) {
13024 eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG;
13025 } else if (eep_config.max_dvc_qng < ASC_DEF_MIN_DVC_QNG) {
13026 /* If the value is zero, assume it is uninitialized. */
13027 if (eep_config.max_dvc_qng == 0) {
13028 eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG;
13030 eep_config.max_dvc_qng = ASC_DEF_MIN_DVC_QNG;
13035 * If 'max_dvc_qng' is greater than 'max_host_qng', then
13036 * set 'max_dvc_qng' to 'max_host_qng'.
13038 if (eep_config.max_dvc_qng > eep_config.max_host_qng) {
13039 eep_config.max_dvc_qng = eep_config.max_host_qng;
13043 * Set ADV_DVC_VAR 'max_host_qng' and ADV_DVC_VAR 'max_dvc_qng'
13044 * values based on possibly adjusted EEPROM values.
13046 asc_dvc->max_host_qng = eep_config.max_host_qng;
13047 asc_dvc->max_dvc_qng = eep_config.max_dvc_qng;
13050 * If the EEPROM 'termination' field is set to automatic (0), then set
13051 * the ADV_DVC_CFG 'termination' field to automatic also.
13053 * If the termination is specified with a non-zero 'termination'
13054 * value check that a legal value is set and set the ADV_DVC_CFG
13055 * 'termination' field appropriately.
13057 if (eep_config.termination == 0) {
13058 asc_dvc->cfg->termination = 0; /* auto termination */
13060 /* Enable manual control with low off / high off. */
13061 if (eep_config.termination == 1) {
13062 asc_dvc->cfg->termination = TERM_CTL_SEL;
13064 /* Enable manual control with low off / high on. */
13065 } else if (eep_config.termination == 2) {
13066 asc_dvc->cfg->termination = TERM_CTL_SEL | TERM_CTL_H;
13068 /* Enable manual control with low on / high on. */
13069 } else if (eep_config.termination == 3) {
13070 asc_dvc->cfg->termination =
13071 TERM_CTL_SEL | TERM_CTL_H | TERM_CTL_L;
13074 * The EEPROM 'termination' field contains a bad value. Use
13075 * automatic termination instead.
13077 asc_dvc->cfg->termination = 0;
13078 warn_code |= ASC_WARN_EEPROM_TERMINATION;
13086 * Read the board's EEPROM configuration. Set fields in ADV_DVC_VAR and
13087 * ADV_DVC_CFG based on the EEPROM settings. The chip is stopped while
13088 * all of this is done.
13090 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
13092 * For a non-fatal error return a warning code. If there are no warnings
13093 * then 0 is returned.
13095 * Note: Chip is stopped on entry.
13097 static int __devinit AdvInitFrom38C0800EEP(ADV_DVC_VAR *asc_dvc)
13099 AdvPortAddr iop_base;
13101 ADVEEP_38C0800_CONFIG eep_config;
13102 uchar tid, termination;
13103 ushort sdtr_speed = 0;
13105 iop_base = asc_dvc->iop_base;
13110 * Read the board's EEPROM configuration.
13112 * Set default values if a bad checksum is found.
13114 if (AdvGet38C0800EEPConfig(iop_base, &eep_config) !=
13115 eep_config.check_sum) {
13116 warn_code |= ASC_WARN_EEPROM_CHKSUM;
13119 * Set EEPROM default values.
13121 memcpy(&eep_config, &Default_38C0800_EEPROM_Config,
13122 sizeof(ADVEEP_38C0800_CONFIG));
13125 * Assume the 6 byte board serial number that was read from
13126 * EEPROM is correct even if the EEPROM checksum failed.
13128 eep_config.serial_number_word3 =
13129 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1);
13131 eep_config.serial_number_word2 =
13132 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 2);
13134 eep_config.serial_number_word1 =
13135 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 3);
13137 AdvSet38C0800EEPConfig(iop_base, &eep_config);
13140 * Set ADV_DVC_VAR and ADV_DVC_CFG variables from the
13141 * EEPROM configuration that was read.
13143 * This is the mapping of EEPROM fields to Adv Library fields.
13145 asc_dvc->wdtr_able = eep_config.wdtr_able;
13146 asc_dvc->sdtr_speed1 = eep_config.sdtr_speed1;
13147 asc_dvc->sdtr_speed2 = eep_config.sdtr_speed2;
13148 asc_dvc->sdtr_speed3 = eep_config.sdtr_speed3;
13149 asc_dvc->sdtr_speed4 = eep_config.sdtr_speed4;
13150 asc_dvc->tagqng_able = eep_config.tagqng_able;
13151 asc_dvc->cfg->disc_enable = eep_config.disc_enable;
13152 asc_dvc->max_host_qng = eep_config.max_host_qng;
13153 asc_dvc->max_dvc_qng = eep_config.max_dvc_qng;
13154 asc_dvc->chip_scsi_id = (eep_config.adapter_scsi_id & ADV_MAX_TID);
13155 asc_dvc->start_motor = eep_config.start_motor;
13156 asc_dvc->scsi_reset_wait = eep_config.scsi_reset_delay;
13157 asc_dvc->bios_ctrl = eep_config.bios_ctrl;
13158 asc_dvc->no_scam = eep_config.scam_tolerant;
13159 asc_dvc->cfg->serial1 = eep_config.serial_number_word1;
13160 asc_dvc->cfg->serial2 = eep_config.serial_number_word2;
13161 asc_dvc->cfg->serial3 = eep_config.serial_number_word3;
13164 * For every Target ID if any of its 'sdtr_speed[1234]' bits
13165 * are set, then set an 'sdtr_able' bit for it.
13167 asc_dvc->sdtr_able = 0;
13168 for (tid = 0; tid <= ADV_MAX_TID; tid++) {
13170 sdtr_speed = asc_dvc->sdtr_speed1;
13171 } else if (tid == 4) {
13172 sdtr_speed = asc_dvc->sdtr_speed2;
13173 } else if (tid == 8) {
13174 sdtr_speed = asc_dvc->sdtr_speed3;
13175 } else if (tid == 12) {
13176 sdtr_speed = asc_dvc->sdtr_speed4;
13178 if (sdtr_speed & ADV_MAX_TID) {
13179 asc_dvc->sdtr_able |= (1 << tid);
13185 * Set the host maximum queuing (max. 253, min. 16) and the per device
13186 * maximum queuing (max. 63, min. 4).
13188 if (eep_config.max_host_qng > ASC_DEF_MAX_HOST_QNG) {
13189 eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG;
13190 } else if (eep_config.max_host_qng < ASC_DEF_MIN_HOST_QNG) {
13191 /* If the value is zero, assume it is uninitialized. */
13192 if (eep_config.max_host_qng == 0) {
13193 eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG;
13195 eep_config.max_host_qng = ASC_DEF_MIN_HOST_QNG;
13199 if (eep_config.max_dvc_qng > ASC_DEF_MAX_DVC_QNG) {
13200 eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG;
13201 } else if (eep_config.max_dvc_qng < ASC_DEF_MIN_DVC_QNG) {
13202 /* If the value is zero, assume it is uninitialized. */
13203 if (eep_config.max_dvc_qng == 0) {
13204 eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG;
13206 eep_config.max_dvc_qng = ASC_DEF_MIN_DVC_QNG;
13211 * If 'max_dvc_qng' is greater than 'max_host_qng', then
13212 * set 'max_dvc_qng' to 'max_host_qng'.
13214 if (eep_config.max_dvc_qng > eep_config.max_host_qng) {
13215 eep_config.max_dvc_qng = eep_config.max_host_qng;
13219 * Set ADV_DVC_VAR 'max_host_qng' and ADV_DVC_VAR 'max_dvc_qng'
13220 * values based on possibly adjusted EEPROM values.
13222 asc_dvc->max_host_qng = eep_config.max_host_qng;
13223 asc_dvc->max_dvc_qng = eep_config.max_dvc_qng;
13226 * If the EEPROM 'termination' field is set to automatic (0), then set
13227 * the ADV_DVC_CFG 'termination' field to automatic also.
13229 * If the termination is specified with a non-zero 'termination'
13230 * value check that a legal value is set and set the ADV_DVC_CFG
13231 * 'termination' field appropriately.
13233 if (eep_config.termination_se == 0) {
13234 termination = 0; /* auto termination for SE */
13236 /* Enable manual control with low off / high off. */
13237 if (eep_config.termination_se == 1) {
13240 /* Enable manual control with low off / high on. */
13241 } else if (eep_config.termination_se == 2) {
13242 termination = TERM_SE_HI;
13244 /* Enable manual control with low on / high on. */
13245 } else if (eep_config.termination_se == 3) {
13246 termination = TERM_SE;
13249 * The EEPROM 'termination_se' field contains a bad value.
13250 * Use automatic termination instead.
13253 warn_code |= ASC_WARN_EEPROM_TERMINATION;
13257 if (eep_config.termination_lvd == 0) {
13258 asc_dvc->cfg->termination = termination; /* auto termination for LVD */
13260 /* Enable manual control with low off / high off. */
13261 if (eep_config.termination_lvd == 1) {
13262 asc_dvc->cfg->termination = termination;
13264 /* Enable manual control with low off / high on. */
13265 } else if (eep_config.termination_lvd == 2) {
13266 asc_dvc->cfg->termination = termination | TERM_LVD_HI;
13268 /* Enable manual control with low on / high on. */
13269 } else if (eep_config.termination_lvd == 3) {
13270 asc_dvc->cfg->termination = termination | TERM_LVD;
13273 * The EEPROM 'termination_lvd' field contains a bad value.
13274 * Use automatic termination instead.
13276 asc_dvc->cfg->termination = termination;
13277 warn_code |= ASC_WARN_EEPROM_TERMINATION;
13285 * Read the board's EEPROM configuration. Set fields in ASC_DVC_VAR and
13286 * ASC_DVC_CFG based on the EEPROM settings. The chip is stopped while
13287 * all of this is done.
13289 * On failure set the ASC_DVC_VAR field 'err_code' and return ADV_ERROR.
13291 * For a non-fatal error return a warning code. If there are no warnings
13292 * then 0 is returned.
13294 * Note: Chip is stopped on entry.
13296 static int __devinit AdvInitFrom38C1600EEP(ADV_DVC_VAR *asc_dvc)
13298 AdvPortAddr iop_base;
13300 ADVEEP_38C1600_CONFIG eep_config;
13301 uchar tid, termination;
13302 ushort sdtr_speed = 0;
13304 iop_base = asc_dvc->iop_base;
13309 * Read the board's EEPROM configuration.
13311 * Set default values if a bad checksum is found.
13313 if (AdvGet38C1600EEPConfig(iop_base, &eep_config) !=
13314 eep_config.check_sum) {
13315 struct pci_dev *pdev = adv_dvc_to_pdev(asc_dvc);
13316 warn_code |= ASC_WARN_EEPROM_CHKSUM;
13319 * Set EEPROM default values.
13321 memcpy(&eep_config, &Default_38C1600_EEPROM_Config,
13322 sizeof(ADVEEP_38C1600_CONFIG));
13324 if (PCI_FUNC(pdev->devfn) != 0) {
13327 * Disable Bit 14 (BIOS_ENABLE) to fix SPARC Ultra 60
13328 * and old Mac system booting problem. The Expansion
13329 * ROM must be disabled in Function 1 for these systems
13331 eep_config.cfg_lsw &= ~ADV_EEPROM_BIOS_ENABLE;
13333 * Clear the INTAB (bit 11) if the GPIO 0 input
13334 * indicates the Function 1 interrupt line is wired
13337 * Set/Clear Bit 11 (INTAB) from the GPIO bit 0 input:
13338 * 1 - Function 1 interrupt line wired to INT A.
13339 * 0 - Function 1 interrupt line wired to INT B.
13341 * Note: Function 0 is always wired to INTA.
13342 * Put all 5 GPIO bits in input mode and then read
13343 * their input values.
13345 AdvWriteByteRegister(iop_base, IOPB_GPIO_CNTL, 0);
13346 ints = AdvReadByteRegister(iop_base, IOPB_GPIO_DATA);
13347 if ((ints & 0x01) == 0)
13348 eep_config.cfg_lsw &= ~ADV_EEPROM_INTAB;
13352 * Assume the 6 byte board serial number that was read from
13353 * EEPROM is correct even if the EEPROM checksum failed.
13355 eep_config.serial_number_word3 =
13356 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1);
13357 eep_config.serial_number_word2 =
13358 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 2);
13359 eep_config.serial_number_word1 =
13360 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 3);
13362 AdvSet38C1600EEPConfig(iop_base, &eep_config);
13366 * Set ASC_DVC_VAR and ASC_DVC_CFG variables from the
13367 * EEPROM configuration that was read.
13369 * This is the mapping of EEPROM fields to Adv Library fields.
13371 asc_dvc->wdtr_able = eep_config.wdtr_able;
13372 asc_dvc->sdtr_speed1 = eep_config.sdtr_speed1;
13373 asc_dvc->sdtr_speed2 = eep_config.sdtr_speed2;
13374 asc_dvc->sdtr_speed3 = eep_config.sdtr_speed3;
13375 asc_dvc->sdtr_speed4 = eep_config.sdtr_speed4;
13376 asc_dvc->ppr_able = 0;
13377 asc_dvc->tagqng_able = eep_config.tagqng_able;
13378 asc_dvc->cfg->disc_enable = eep_config.disc_enable;
13379 asc_dvc->max_host_qng = eep_config.max_host_qng;
13380 asc_dvc->max_dvc_qng = eep_config.max_dvc_qng;
13381 asc_dvc->chip_scsi_id = (eep_config.adapter_scsi_id & ASC_MAX_TID);
13382 asc_dvc->start_motor = eep_config.start_motor;
13383 asc_dvc->scsi_reset_wait = eep_config.scsi_reset_delay;
13384 asc_dvc->bios_ctrl = eep_config.bios_ctrl;
13385 asc_dvc->no_scam = eep_config.scam_tolerant;
13388 * For every Target ID if any of its 'sdtr_speed[1234]' bits
13389 * are set, then set an 'sdtr_able' bit for it.
13391 asc_dvc->sdtr_able = 0;
13392 for (tid = 0; tid <= ASC_MAX_TID; tid++) {
13394 sdtr_speed = asc_dvc->sdtr_speed1;
13395 } else if (tid == 4) {
13396 sdtr_speed = asc_dvc->sdtr_speed2;
13397 } else if (tid == 8) {
13398 sdtr_speed = asc_dvc->sdtr_speed3;
13399 } else if (tid == 12) {
13400 sdtr_speed = asc_dvc->sdtr_speed4;
13402 if (sdtr_speed & ASC_MAX_TID) {
13403 asc_dvc->sdtr_able |= (1 << tid);
13409 * Set the host maximum queuing (max. 253, min. 16) and the per device
13410 * maximum queuing (max. 63, min. 4).
13412 if (eep_config.max_host_qng > ASC_DEF_MAX_HOST_QNG) {
13413 eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG;
13414 } else if (eep_config.max_host_qng < ASC_DEF_MIN_HOST_QNG) {
13415 /* If the value is zero, assume it is uninitialized. */
13416 if (eep_config.max_host_qng == 0) {
13417 eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG;
13419 eep_config.max_host_qng = ASC_DEF_MIN_HOST_QNG;
13423 if (eep_config.max_dvc_qng > ASC_DEF_MAX_DVC_QNG) {
13424 eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG;
13425 } else if (eep_config.max_dvc_qng < ASC_DEF_MIN_DVC_QNG) {
13426 /* If the value is zero, assume it is uninitialized. */
13427 if (eep_config.max_dvc_qng == 0) {
13428 eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG;
13430 eep_config.max_dvc_qng = ASC_DEF_MIN_DVC_QNG;
13435 * If 'max_dvc_qng' is greater than 'max_host_qng', then
13436 * set 'max_dvc_qng' to 'max_host_qng'.
13438 if (eep_config.max_dvc_qng > eep_config.max_host_qng) {
13439 eep_config.max_dvc_qng = eep_config.max_host_qng;
13443 * Set ASC_DVC_VAR 'max_host_qng' and ASC_DVC_VAR 'max_dvc_qng'
13444 * values based on possibly adjusted EEPROM values.
13446 asc_dvc->max_host_qng = eep_config.max_host_qng;
13447 asc_dvc->max_dvc_qng = eep_config.max_dvc_qng;
13450 * If the EEPROM 'termination' field is set to automatic (0), then set
13451 * the ASC_DVC_CFG 'termination' field to automatic also.
13453 * If the termination is specified with a non-zero 'termination'
13454 * value check that a legal value is set and set the ASC_DVC_CFG
13455 * 'termination' field appropriately.
13457 if (eep_config.termination_se == 0) {
13458 termination = 0; /* auto termination for SE */
13460 /* Enable manual control with low off / high off. */
13461 if (eep_config.termination_se == 1) {
13464 /* Enable manual control with low off / high on. */
13465 } else if (eep_config.termination_se == 2) {
13466 termination = TERM_SE_HI;
13468 /* Enable manual control with low on / high on. */
13469 } else if (eep_config.termination_se == 3) {
13470 termination = TERM_SE;
13473 * The EEPROM 'termination_se' field contains a bad value.
13474 * Use automatic termination instead.
13477 warn_code |= ASC_WARN_EEPROM_TERMINATION;
13481 if (eep_config.termination_lvd == 0) {
13482 asc_dvc->cfg->termination = termination; /* auto termination for LVD */
13484 /* Enable manual control with low off / high off. */
13485 if (eep_config.termination_lvd == 1) {
13486 asc_dvc->cfg->termination = termination;
13488 /* Enable manual control with low off / high on. */
13489 } else if (eep_config.termination_lvd == 2) {
13490 asc_dvc->cfg->termination = termination | TERM_LVD_HI;
13492 /* Enable manual control with low on / high on. */
13493 } else if (eep_config.termination_lvd == 3) {
13494 asc_dvc->cfg->termination = termination | TERM_LVD;
13497 * The EEPROM 'termination_lvd' field contains a bad value.
13498 * Use automatic termination instead.
13500 asc_dvc->cfg->termination = termination;
13501 warn_code |= ASC_WARN_EEPROM_TERMINATION;
13509 * Read EEPROM configuration into the specified buffer.
13511 * Return a checksum based on the EEPROM configuration read.
13513 static ushort __devinit
13514 AdvGet3550EEPConfig(AdvPortAddr iop_base, ADVEEP_3550_CONFIG *cfg_buf)
13516 ushort wval, chksum;
13519 ushort *charfields;
13521 charfields = (ushort *)&ADVEEP_3550_Config_Field_IsChar;
13522 wbuf = (ushort *)cfg_buf;
13525 for (eep_addr = ADV_EEP_DVC_CFG_BEGIN;
13526 eep_addr < ADV_EEP_DVC_CFG_END; eep_addr++, wbuf++) {
13527 wval = AdvReadEEPWord(iop_base, eep_addr);
13528 chksum += wval; /* Checksum is calculated from word values. */
13529 if (*charfields++) {
13530 *wbuf = le16_to_cpu(wval);
13535 /* Read checksum word. */
13536 *wbuf = AdvReadEEPWord(iop_base, eep_addr);
13540 /* Read rest of EEPROM not covered by the checksum. */
13541 for (eep_addr = ADV_EEP_DVC_CTL_BEGIN;
13542 eep_addr < ADV_EEP_MAX_WORD_ADDR; eep_addr++, wbuf++) {
13543 *wbuf = AdvReadEEPWord(iop_base, eep_addr);
13544 if (*charfields++) {
13545 *wbuf = le16_to_cpu(*wbuf);
13552 * Read EEPROM configuration into the specified buffer.
13554 * Return a checksum based on the EEPROM configuration read.
13556 static ushort __devinit
13557 AdvGet38C0800EEPConfig(AdvPortAddr iop_base, ADVEEP_38C0800_CONFIG *cfg_buf)
13559 ushort wval, chksum;
13562 ushort *charfields;
13564 charfields = (ushort *)&ADVEEP_38C0800_Config_Field_IsChar;
13565 wbuf = (ushort *)cfg_buf;
13568 for (eep_addr = ADV_EEP_DVC_CFG_BEGIN;
13569 eep_addr < ADV_EEP_DVC_CFG_END; eep_addr++, wbuf++) {
13570 wval = AdvReadEEPWord(iop_base, eep_addr);
13571 chksum += wval; /* Checksum is calculated from word values. */
13572 if (*charfields++) {
13573 *wbuf = le16_to_cpu(wval);
13578 /* Read checksum word. */
13579 *wbuf = AdvReadEEPWord(iop_base, eep_addr);
13583 /* Read rest of EEPROM not covered by the checksum. */
13584 for (eep_addr = ADV_EEP_DVC_CTL_BEGIN;
13585 eep_addr < ADV_EEP_MAX_WORD_ADDR; eep_addr++, wbuf++) {
13586 *wbuf = AdvReadEEPWord(iop_base, eep_addr);
13587 if (*charfields++) {
13588 *wbuf = le16_to_cpu(*wbuf);
13595 * Read EEPROM configuration into the specified buffer.
13597 * Return a checksum based on the EEPROM configuration read.
13599 static ushort __devinit
13600 AdvGet38C1600EEPConfig(AdvPortAddr iop_base, ADVEEP_38C1600_CONFIG *cfg_buf)
13602 ushort wval, chksum;
13605 ushort *charfields;
13607 charfields = (ushort *)&ADVEEP_38C1600_Config_Field_IsChar;
13608 wbuf = (ushort *)cfg_buf;
13611 for (eep_addr = ADV_EEP_DVC_CFG_BEGIN;
13612 eep_addr < ADV_EEP_DVC_CFG_END; eep_addr++, wbuf++) {
13613 wval = AdvReadEEPWord(iop_base, eep_addr);
13614 chksum += wval; /* Checksum is calculated from word values. */
13615 if (*charfields++) {
13616 *wbuf = le16_to_cpu(wval);
13621 /* Read checksum word. */
13622 *wbuf = AdvReadEEPWord(iop_base, eep_addr);
13626 /* Read rest of EEPROM not covered by the checksum. */
13627 for (eep_addr = ADV_EEP_DVC_CTL_BEGIN;
13628 eep_addr < ADV_EEP_MAX_WORD_ADDR; eep_addr++, wbuf++) {
13629 *wbuf = AdvReadEEPWord(iop_base, eep_addr);
13630 if (*charfields++) {
13631 *wbuf = le16_to_cpu(*wbuf);
13638 * Read the EEPROM from specified location
13640 static ushort __devinit AdvReadEEPWord(AdvPortAddr iop_base, int eep_word_addr)
13642 AdvWriteWordRegister(iop_base, IOPW_EE_CMD,
13643 ASC_EEP_CMD_READ | eep_word_addr);
13644 AdvWaitEEPCmd(iop_base);
13645 return AdvReadWordRegister(iop_base, IOPW_EE_DATA);
13649 * Wait for EEPROM command to complete
13651 static void __devinit AdvWaitEEPCmd(AdvPortAddr iop_base)
13655 for (eep_delay_ms = 0; eep_delay_ms < ADV_EEP_DELAY_MS; eep_delay_ms++) {
13656 if (AdvReadWordRegister(iop_base, IOPW_EE_CMD) &
13657 ASC_EEP_CMD_DONE) {
13660 DvcSleepMilliSecond(1);
13662 if ((AdvReadWordRegister(iop_base, IOPW_EE_CMD) & ASC_EEP_CMD_DONE) ==
13670 * Write the EEPROM from 'cfg_buf'.
13673 AdvSet3550EEPConfig(AdvPortAddr iop_base, ADVEEP_3550_CONFIG *cfg_buf)
13676 ushort addr, chksum;
13677 ushort *charfields;
13679 wbuf = (ushort *)cfg_buf;
13680 charfields = (ushort *)&ADVEEP_3550_Config_Field_IsChar;
13683 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE);
13684 AdvWaitEEPCmd(iop_base);
13687 * Write EEPROM from word 0 to word 20.
13689 for (addr = ADV_EEP_DVC_CFG_BEGIN;
13690 addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) {
13693 if (*charfields++) {
13694 word = cpu_to_le16(*wbuf);
13698 chksum += *wbuf; /* Checksum is calculated from word values. */
13699 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word);
13700 AdvWriteWordRegister(iop_base, IOPW_EE_CMD,
13701 ASC_EEP_CMD_WRITE | addr);
13702 AdvWaitEEPCmd(iop_base);
13703 DvcSleepMilliSecond(ADV_EEP_DELAY_MS);
13707 * Write EEPROM checksum at word 21.
13709 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum);
13710 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr);
13711 AdvWaitEEPCmd(iop_base);
13716 * Write EEPROM OEM name at words 22 to 29.
13718 for (addr = ADV_EEP_DVC_CTL_BEGIN;
13719 addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) {
13722 if (*charfields++) {
13723 word = cpu_to_le16(*wbuf);
13727 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word);
13728 AdvWriteWordRegister(iop_base, IOPW_EE_CMD,
13729 ASC_EEP_CMD_WRITE | addr);
13730 AdvWaitEEPCmd(iop_base);
13732 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE);
13733 AdvWaitEEPCmd(iop_base);
13738 * Write the EEPROM from 'cfg_buf'.
13741 AdvSet38C0800EEPConfig(AdvPortAddr iop_base, ADVEEP_38C0800_CONFIG *cfg_buf)
13744 ushort *charfields;
13745 ushort addr, chksum;
13747 wbuf = (ushort *)cfg_buf;
13748 charfields = (ushort *)&ADVEEP_38C0800_Config_Field_IsChar;
13751 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE);
13752 AdvWaitEEPCmd(iop_base);
13755 * Write EEPROM from word 0 to word 20.
13757 for (addr = ADV_EEP_DVC_CFG_BEGIN;
13758 addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) {
13761 if (*charfields++) {
13762 word = cpu_to_le16(*wbuf);
13766 chksum += *wbuf; /* Checksum is calculated from word values. */
13767 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word);
13768 AdvWriteWordRegister(iop_base, IOPW_EE_CMD,
13769 ASC_EEP_CMD_WRITE | addr);
13770 AdvWaitEEPCmd(iop_base);
13771 DvcSleepMilliSecond(ADV_EEP_DELAY_MS);
13775 * Write EEPROM checksum at word 21.
13777 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum);
13778 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr);
13779 AdvWaitEEPCmd(iop_base);
13784 * Write EEPROM OEM name at words 22 to 29.
13786 for (addr = ADV_EEP_DVC_CTL_BEGIN;
13787 addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) {
13790 if (*charfields++) {
13791 word = cpu_to_le16(*wbuf);
13795 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word);
13796 AdvWriteWordRegister(iop_base, IOPW_EE_CMD,
13797 ASC_EEP_CMD_WRITE | addr);
13798 AdvWaitEEPCmd(iop_base);
13800 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE);
13801 AdvWaitEEPCmd(iop_base);
13806 * Write the EEPROM from 'cfg_buf'.
13809 AdvSet38C1600EEPConfig(AdvPortAddr iop_base, ADVEEP_38C1600_CONFIG *cfg_buf)
13812 ushort *charfields;
13813 ushort addr, chksum;
13815 wbuf = (ushort *)cfg_buf;
13816 charfields = (ushort *)&ADVEEP_38C1600_Config_Field_IsChar;
13819 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE);
13820 AdvWaitEEPCmd(iop_base);
13823 * Write EEPROM from word 0 to word 20.
13825 for (addr = ADV_EEP_DVC_CFG_BEGIN;
13826 addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) {
13829 if (*charfields++) {
13830 word = cpu_to_le16(*wbuf);
13834 chksum += *wbuf; /* Checksum is calculated from word values. */
13835 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word);
13836 AdvWriteWordRegister(iop_base, IOPW_EE_CMD,
13837 ASC_EEP_CMD_WRITE | addr);
13838 AdvWaitEEPCmd(iop_base);
13839 DvcSleepMilliSecond(ADV_EEP_DELAY_MS);
13843 * Write EEPROM checksum at word 21.
13845 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum);
13846 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr);
13847 AdvWaitEEPCmd(iop_base);
13852 * Write EEPROM OEM name at words 22 to 29.
13854 for (addr = ADV_EEP_DVC_CTL_BEGIN;
13855 addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) {
13858 if (*charfields++) {
13859 word = cpu_to_le16(*wbuf);
13863 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word);
13864 AdvWriteWordRegister(iop_base, IOPW_EE_CMD,
13865 ASC_EEP_CMD_WRITE | addr);
13866 AdvWaitEEPCmd(iop_base);
13868 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE);
13869 AdvWaitEEPCmd(iop_base);
13875 * AdvExeScsiQueue() - Send a request to the RISC microcode program.
13877 * Allocate a carrier structure, point the carrier to the ADV_SCSI_REQ_Q,
13878 * add the carrier to the ICQ (Initiator Command Queue), and tickle the
13879 * RISC to notify it a new command is ready to be executed.
13881 * If 'done_status' is not set to QD_DO_RETRY, then 'error_retry' will be
13882 * set to SCSI_MAX_RETRY.
13884 * Multi-byte fields in the ASC_SCSI_REQ_Q that are used by the microcode
13885 * for DMA addresses or math operations are byte swapped to little-endian
13889 * ADV_SUCCESS(1) - The request was successfully queued.
13890 * ADV_BUSY(0) - Resource unavailable; Retry again after pending
13891 * request completes.
13892 * ADV_ERROR(-1) - Invalid ADV_SCSI_REQ_Q request structure
13895 static int AdvExeScsiQueue(ADV_DVC_VAR *asc_dvc, ADV_SCSI_REQ_Q *scsiq)
13897 ulong last_int_level;
13898 AdvPortAddr iop_base;
13900 ADV_PADDR req_paddr;
13901 ADV_CARR_T *new_carrp;
13903 ASC_ASSERT(scsiq != NULL); /* 'scsiq' should never be NULL. */
13906 * The ADV_SCSI_REQ_Q 'target_id' field should never exceed ADV_MAX_TID.
13908 if (scsiq->target_id > ADV_MAX_TID) {
13909 scsiq->host_status = QHSTA_M_INVALID_DEVICE;
13910 scsiq->done_status = QD_WITH_ERROR;
13914 iop_base = asc_dvc->iop_base;
13916 last_int_level = DvcEnterCritical();
13919 * Allocate a carrier ensuring at least one carrier always
13920 * remains on the freelist and initialize fields.
13922 if ((new_carrp = asc_dvc->carr_freelist) == NULL) {
13923 DvcLeaveCritical(last_int_level);
13926 asc_dvc->carr_freelist = (ADV_CARR_T *)
13927 ADV_U32_TO_VADDR(le32_to_cpu(new_carrp->next_vpa));
13928 asc_dvc->carr_pending_cnt++;
13931 * Set the carrier to be a stopper by setting 'next_vpa'
13932 * to the stopper value. The current stopper will be changed
13933 * below to point to the new stopper.
13935 new_carrp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
13938 * Clear the ADV_SCSI_REQ_Q done flag.
13940 scsiq->a_flag &= ~ADV_SCSIQ_DONE;
13942 req_size = sizeof(ADV_SCSI_REQ_Q);
13943 req_paddr = DvcGetPhyAddr(asc_dvc, scsiq, (uchar *)scsiq,
13944 (ADV_SDCNT *)&req_size, ADV_IS_SCSIQ_FLAG);
13946 ASC_ASSERT(ADV_32BALIGN(req_paddr) == req_paddr);
13947 ASC_ASSERT(req_size >= sizeof(ADV_SCSI_REQ_Q));
13949 /* Wait for assertion before making little-endian */
13950 req_paddr = cpu_to_le32(req_paddr);
13952 /* Save virtual and physical address of ADV_SCSI_REQ_Q and carrier. */
13953 scsiq->scsiq_ptr = cpu_to_le32(ADV_VADDR_TO_U32(scsiq));
13954 scsiq->scsiq_rptr = req_paddr;
13956 scsiq->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->icq_sp));
13958 * Every ADV_CARR_T.carr_pa is byte swapped to little-endian
13959 * order during initialization.
13961 scsiq->carr_pa = asc_dvc->icq_sp->carr_pa;
13964 * Use the current stopper to send the ADV_SCSI_REQ_Q command to
13965 * the microcode. The newly allocated stopper will become the new
13968 asc_dvc->icq_sp->areq_vpa = req_paddr;
13971 * Set the 'next_vpa' pointer for the old stopper to be the
13972 * physical address of the new stopper. The RISC can only
13973 * follow physical addresses.
13975 asc_dvc->icq_sp->next_vpa = new_carrp->carr_pa;
13978 * Set the host adapter stopper pointer to point to the new carrier.
13980 asc_dvc->icq_sp = new_carrp;
13982 if (asc_dvc->chip_type == ADV_CHIP_ASC3550 ||
13983 asc_dvc->chip_type == ADV_CHIP_ASC38C0800) {
13985 * Tickle the RISC to tell it to read its Command Queue Head pointer.
13987 AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_A);
13988 if (asc_dvc->chip_type == ADV_CHIP_ASC3550) {
13990 * Clear the tickle value. In the ASC-3550 the RISC flag
13991 * command 'clr_tickle_a' does not work unless the host
13992 * value is cleared.
13994 AdvWriteByteRegister(iop_base, IOPB_TICKLE,
13997 } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) {
13999 * Notify the RISC a carrier is ready by writing the physical
14000 * address of the new carrier stopper to the COMMA register.
14002 AdvWriteDWordRegister(iop_base, IOPDW_COMMA,
14003 le32_to_cpu(new_carrp->carr_pa));
14006 DvcLeaveCritical(last_int_level);
14008 return ADV_SUCCESS;
14012 * Reset SCSI Bus and purge all outstanding requests.
14015 * ADV_TRUE(1) - All requests are purged and SCSI Bus is reset.
14016 * ADV_FALSE(0) - Microcode command failed.
14017 * ADV_ERROR(-1) - Microcode command timed-out. Microcode or IC
14018 * may be hung which requires driver recovery.
14020 static int AdvResetSB(ADV_DVC_VAR *asc_dvc)
14025 * Send the SCSI Bus Reset idle start idle command which asserts
14026 * the SCSI Bus Reset signal.
14028 status = AdvSendIdleCmd(asc_dvc, (ushort)IDLE_CMD_SCSI_RESET_START, 0L);
14029 if (status != ADV_TRUE) {
14034 * Delay for the specified SCSI Bus Reset hold time.
14036 * The hold time delay is done on the host because the RISC has no
14037 * microsecond accurate timer.
14039 DvcDelayMicroSecond(asc_dvc, (ushort)ASC_SCSI_RESET_HOLD_TIME_US);
14042 * Send the SCSI Bus Reset end idle command which de-asserts
14043 * the SCSI Bus Reset signal and purges any pending requests.
14045 status = AdvSendIdleCmd(asc_dvc, (ushort)IDLE_CMD_SCSI_RESET_END, 0L);
14046 if (status != ADV_TRUE) {
14050 DvcSleepMilliSecond((ADV_DCNT)asc_dvc->scsi_reset_wait * 1000);
14056 * Reset chip and SCSI Bus.
14059 * ADV_TRUE(1) - Chip re-initialization and SCSI Bus Reset successful.
14060 * ADV_FALSE(0) - Chip re-initialization and SCSI Bus Reset failure.
14062 static int AdvResetChipAndSB(ADV_DVC_VAR *asc_dvc)
14065 ushort wdtr_able, sdtr_able, tagqng_able;
14066 ushort ppr_able = 0;
14067 uchar tid, max_cmd[ADV_MAX_TID + 1];
14068 AdvPortAddr iop_base;
14071 iop_base = asc_dvc->iop_base;
14074 * Save current per TID negotiated values.
14076 AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
14077 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
14078 if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) {
14079 AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able);
14081 AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
14082 for (tid = 0; tid <= ADV_MAX_TID; tid++) {
14083 AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid,
14088 * Force the AdvInitAsc3550/38C0800Driver() function to
14089 * perform a SCSI Bus Reset by clearing the BIOS signature word.
14090 * The initialization functions assumes a SCSI Bus Reset is not
14091 * needed if the BIOS signature word is present.
14093 AdvReadWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, bios_sig);
14094 AdvWriteWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, 0);
14097 * Stop chip and reset it.
14099 AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_STOP);
14100 AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, ADV_CTRL_REG_CMD_RESET);
14101 DvcSleepMilliSecond(100);
14102 AdvWriteWordRegister(iop_base, IOPW_CTRL_REG,
14103 ADV_CTRL_REG_CMD_WR_IO_REG);
14106 * Reset Adv Library error code, if any, and try
14107 * re-initializing the chip.
14109 asc_dvc->err_code = 0;
14110 if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) {
14111 status = AdvInitAsc38C1600Driver(asc_dvc);
14112 } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800) {
14113 status = AdvInitAsc38C0800Driver(asc_dvc);
14115 status = AdvInitAsc3550Driver(asc_dvc);
14118 /* Translate initialization return value to status value. */
14122 status = ADV_FALSE;
14126 * Restore the BIOS signature word.
14128 AdvWriteWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, bios_sig);
14131 * Restore per TID negotiated values.
14133 AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
14134 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
14135 if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) {
14136 AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able);
14138 AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
14139 for (tid = 0; tid <= ADV_MAX_TID; tid++) {
14140 AdvWriteByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid,
14148 * Adv Library Interrupt Service Routine
14150 * This function is called by a driver's interrupt service routine.
14151 * The function disables and re-enables interrupts.
14153 * When a microcode idle command is completed, the ADV_DVC_VAR
14154 * 'idle_cmd_done' field is set to ADV_TRUE.
14156 * Note: AdvISR() can be called when interrupts are disabled or even
14157 * when there is no hardware interrupt condition present. It will
14158 * always check for completed idle commands and microcode requests.
14159 * This is an important feature that shouldn't be changed because it
14160 * allows commands to be completed from polling mode loops.
14163 * ADV_TRUE(1) - interrupt was pending
14164 * ADV_FALSE(0) - no interrupt was pending
14166 static int AdvISR(ADV_DVC_VAR *asc_dvc)
14168 AdvPortAddr iop_base;
14171 ADV_CARR_T *free_carrp;
14172 ADV_VADDR irq_next_vpa;
14174 ADV_SCSI_REQ_Q *scsiq;
14176 flags = DvcEnterCritical();
14178 iop_base = asc_dvc->iop_base;
14180 /* Reading the register clears the interrupt. */
14181 int_stat = AdvReadByteRegister(iop_base, IOPB_INTR_STATUS_REG);
14183 if ((int_stat & (ADV_INTR_STATUS_INTRA | ADV_INTR_STATUS_INTRB |
14184 ADV_INTR_STATUS_INTRC)) == 0) {
14185 DvcLeaveCritical(flags);
14190 * Notify the driver of an asynchronous microcode condition by
14191 * calling the adv_async_callback function. The function
14192 * is passed the microcode ASC_MC_INTRB_CODE byte value.
14194 if (int_stat & ADV_INTR_STATUS_INTRB) {
14197 AdvReadByteLram(iop_base, ASC_MC_INTRB_CODE, intrb_code);
14199 if (asc_dvc->chip_type == ADV_CHIP_ASC3550 ||
14200 asc_dvc->chip_type == ADV_CHIP_ASC38C0800) {
14201 if (intrb_code == ADV_ASYNC_CARRIER_READY_FAILURE &&
14202 asc_dvc->carr_pending_cnt != 0) {
14203 AdvWriteByteRegister(iop_base, IOPB_TICKLE,
14205 if (asc_dvc->chip_type == ADV_CHIP_ASC3550) {
14206 AdvWriteByteRegister(iop_base,
14213 adv_async_callback(asc_dvc, intrb_code);
14217 * Check if the IRQ stopper carrier contains a completed request.
14219 while (((irq_next_vpa =
14220 le32_to_cpu(asc_dvc->irq_sp->next_vpa)) & ASC_RQ_DONE) != 0) {
14222 * Get a pointer to the newly completed ADV_SCSI_REQ_Q structure.
14223 * The RISC will have set 'areq_vpa' to a virtual address.
14225 * The firmware will have copied the ASC_SCSI_REQ_Q.scsiq_ptr
14226 * field to the carrier ADV_CARR_T.areq_vpa field. The conversion
14227 * below complements the conversion of ASC_SCSI_REQ_Q.scsiq_ptr'
14228 * in AdvExeScsiQueue().
14230 scsiq = (ADV_SCSI_REQ_Q *)
14231 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->areq_vpa));
14234 * Request finished with good status and the queue was not
14235 * DMAed to host memory by the firmware. Set all status fields
14236 * to indicate good status.
14238 if ((irq_next_vpa & ASC_RQ_GOOD) != 0) {
14239 scsiq->done_status = QD_NO_ERROR;
14240 scsiq->host_status = scsiq->scsi_status = 0;
14241 scsiq->data_cnt = 0L;
14245 * Advance the stopper pointer to the next carrier
14246 * ignoring the lower four bits. Free the previous
14249 free_carrp = asc_dvc->irq_sp;
14250 asc_dvc->irq_sp = (ADV_CARR_T *)
14251 ADV_U32_TO_VADDR(ASC_GET_CARRP(irq_next_vpa));
14253 free_carrp->next_vpa =
14254 cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist));
14255 asc_dvc->carr_freelist = free_carrp;
14256 asc_dvc->carr_pending_cnt--;
14258 ASC_ASSERT(scsiq != NULL);
14259 target_bit = ADV_TID_TO_TIDMASK(scsiq->target_id);
14262 * Clear request microcode control flag.
14267 * Notify the driver of the completed request by passing
14268 * the ADV_SCSI_REQ_Q pointer to its callback function.
14270 scsiq->a_flag |= ADV_SCSIQ_DONE;
14271 adv_isr_callback(asc_dvc, scsiq);
14273 * Note: After the driver callback function is called, 'scsiq'
14274 * can no longer be referenced.
14276 * Fall through and continue processing other completed
14281 * Disable interrupts again in case the driver inadvertently
14282 * enabled interrupts in its callback function.
14284 * The DvcEnterCritical() return value is ignored, because
14285 * the 'flags' saved when AdvISR() was first entered will be
14286 * used to restore the interrupt flag on exit.
14288 (void)DvcEnterCritical();
14290 DvcLeaveCritical(flags);
14295 * Send an idle command to the chip and wait for completion.
14297 * Command completion is polled for once per microsecond.
14299 * The function can be called from anywhere including an interrupt handler.
14300 * But the function is not re-entrant, so it uses the DvcEnter/LeaveCritical()
14301 * functions to prevent reentrancy.
14304 * ADV_TRUE - command completed successfully
14305 * ADV_FALSE - command failed
14306 * ADV_ERROR - command timed out
14309 AdvSendIdleCmd(ADV_DVC_VAR *asc_dvc,
14310 ushort idle_cmd, ADV_DCNT idle_cmd_parameter)
14312 ulong last_int_level;
14315 AdvPortAddr iop_base;
14317 last_int_level = DvcEnterCritical();
14319 iop_base = asc_dvc->iop_base;
14322 * Clear the idle command status which is set by the microcode
14323 * to a non-zero value to indicate when the command is completed.
14324 * The non-zero result is one of the IDLE_CMD_STATUS_* values
14325 * defined in a_advlib.h.
14327 AdvWriteWordLram(iop_base, ASC_MC_IDLE_CMD_STATUS, (ushort)0);
14330 * Write the idle command value after the idle command parameter
14331 * has been written to avoid a race condition. If the order is not
14332 * followed, the microcode may process the idle command before the
14333 * parameters have been written to LRAM.
14335 AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IDLE_CMD_PARAMETER,
14336 cpu_to_le32(idle_cmd_parameter));
14337 AdvWriteWordLram(iop_base, ASC_MC_IDLE_CMD, idle_cmd);
14340 * Tickle the RISC to tell it to process the idle command.
14342 AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_B);
14343 if (asc_dvc->chip_type == ADV_CHIP_ASC3550) {
14345 * Clear the tickle value. In the ASC-3550 the RISC flag
14346 * command 'clr_tickle_b' does not work unless the host
14347 * value is cleared.
14349 AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_NOP);
14352 /* Wait for up to 100 millisecond for the idle command to timeout. */
14353 for (i = 0; i < SCSI_WAIT_100_MSEC; i++) {
14354 /* Poll once each microsecond for command completion. */
14355 for (j = 0; j < SCSI_US_PER_MSEC; j++) {
14356 AdvReadWordLram(iop_base, ASC_MC_IDLE_CMD_STATUS,
14359 DvcLeaveCritical(last_int_level);
14362 DvcDelayMicroSecond(asc_dvc, (ushort)1);
14366 ASC_ASSERT(0); /* The idle command should never timeout. */
14367 DvcLeaveCritical(last_int_level);
14371 static int __devinit
14372 advansys_wide_init_chip(asc_board_t *boardp, ADV_DVC_VAR *adv_dvc_varp)
14375 adv_req_t *reqp = NULL;
14378 int warn_code, err_code;
14381 * Allocate buffer carrier structures. The total size
14382 * is about 4 KB, so allocate all at once.
14384 boardp->carrp = kmalloc(ADV_CARRIER_BUFSIZE, GFP_KERNEL);
14385 ASC_DBG1(1, "advansys_wide_init_chip: carrp 0x%p\n", boardp->carrp);
14387 if (!boardp->carrp)
14388 goto kmalloc_failed;
14391 * Allocate up to 'max_host_qng' request structures for the Wide
14392 * board. The total size is about 16 KB, so allocate all at once.
14393 * If the allocation fails decrement and try again.
14395 for (req_cnt = adv_dvc_varp->max_host_qng; req_cnt > 0; req_cnt--) {
14396 reqp = kmalloc(sizeof(adv_req_t) * req_cnt, GFP_KERNEL);
14398 ASC_DBG3(1, "advansys_wide_init_chip: reqp 0x%p, req_cnt %d, "
14399 "bytes %lu\n", reqp, req_cnt,
14400 (ulong)sizeof(adv_req_t) * req_cnt);
14407 goto kmalloc_failed;
14409 boardp->orig_reqp = reqp;
14412 * Allocate up to ADV_TOT_SG_BLOCK request structures for
14413 * the Wide board. Each structure is about 136 bytes.
14415 boardp->adv_sgblkp = NULL;
14416 for (sg_cnt = 0; sg_cnt < ADV_TOT_SG_BLOCK; sg_cnt++) {
14417 sgp = kmalloc(sizeof(adv_sgblk_t), GFP_KERNEL);
14422 sgp->next_sgblkp = boardp->adv_sgblkp;
14423 boardp->adv_sgblkp = sgp;
14427 ASC_DBG3(1, "advansys_wide_init_chip: sg_cnt %d * %u = %u bytes\n",
14428 sg_cnt, sizeof(adv_sgblk_t),
14429 (unsigned)(sizeof(adv_sgblk_t) * sg_cnt));
14431 if (!boardp->adv_sgblkp)
14432 goto kmalloc_failed;
14434 adv_dvc_varp->carrier_buf = boardp->carrp;
14437 * Point 'adv_reqp' to the request structures and
14438 * link them together.
14441 reqp[req_cnt].next_reqp = NULL;
14442 for (; req_cnt > 0; req_cnt--) {
14443 reqp[req_cnt - 1].next_reqp = &reqp[req_cnt];
14445 boardp->adv_reqp = &reqp[0];
14447 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
14448 ASC_DBG(2, "advansys_wide_init_chip: AdvInitAsc3550Driver()\n");
14449 warn_code = AdvInitAsc3550Driver(adv_dvc_varp);
14450 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
14451 ASC_DBG(2, "advansys_wide_init_chip: AdvInitAsc38C0800Driver()"
14453 warn_code = AdvInitAsc38C0800Driver(adv_dvc_varp);
14455 ASC_DBG(2, "advansys_wide_init_chip: AdvInitAsc38C1600Driver()"
14457 warn_code = AdvInitAsc38C1600Driver(adv_dvc_varp);
14459 err_code = adv_dvc_varp->err_code;
14461 if (warn_code || err_code) {
14462 ASC_PRINT3("advansys_wide_init_chip: board %d error: warn 0x%x,"
14463 " error 0x%x\n", boardp->id, warn_code, err_code);
14469 ASC_PRINT1("advansys_wide_init_chip: board %d error: kmalloc() "
14470 "failed\n", boardp->id);
14471 err_code = ADV_ERROR;
14476 static void advansys_wide_free_mem(asc_board_t *boardp)
14478 kfree(boardp->carrp);
14479 boardp->carrp = NULL;
14480 kfree(boardp->orig_reqp);
14481 boardp->orig_reqp = boardp->adv_reqp = NULL;
14482 while (boardp->adv_sgblkp) {
14483 adv_sgblk_t *sgp = boardp->adv_sgblkp;
14484 boardp->adv_sgblkp = sgp->next_sgblkp;
14489 static struct Scsi_Host *__devinit
14490 advansys_board_found(int iop, struct device *dev, int bus_type)
14492 struct Scsi_Host *shost;
14493 struct pci_dev *pdev = bus_type == ASC_IS_PCI ? to_pci_dev(dev) : NULL;
14494 asc_board_t *boardp;
14495 ASC_DVC_VAR *asc_dvc_varp = NULL;
14496 ADV_DVC_VAR *adv_dvc_varp = NULL;
14498 int warn_code, err_code;
14502 * Register the adapter, get its configuration, and
14505 ASC_DBG(2, "advansys_board_found: scsi_host_alloc()\n");
14506 shost = scsi_host_alloc(&advansys_template, sizeof(asc_board_t));
14510 /* Initialize private per board data */
14511 boardp = ASC_BOARDP(shost);
14512 memset(boardp, 0, sizeof(asc_board_t));
14513 boardp->id = asc_board_count++;
14514 spin_lock_init(&boardp->lock);
14518 * Handle both narrow and wide boards.
14520 * If a Wide board was detected, set the board structure
14521 * wide board flag. Set-up the board structure based on
14525 if (bus_type == ASC_IS_PCI &&
14526 (pdev->device == PCI_DEVICE_ID_ASP_ABP940UW ||
14527 pdev->device == PCI_DEVICE_ID_38C0800_REV1 ||
14528 pdev->device == PCI_DEVICE_ID_38C1600_REV1)) {
14529 boardp->flags |= ASC_IS_WIDE_BOARD;
14531 #endif /* CONFIG_PCI */
14533 if (ASC_NARROW_BOARD(boardp)) {
14534 ASC_DBG(1, "advansys_board_found: narrow board\n");
14535 asc_dvc_varp = &boardp->dvc_var.asc_dvc_var;
14536 asc_dvc_varp->bus_type = bus_type;
14537 asc_dvc_varp->drv_ptr = boardp;
14538 asc_dvc_varp->cfg = &boardp->dvc_cfg.asc_dvc_cfg;
14539 asc_dvc_varp->cfg->overrun_buf = &overrun_buf[0];
14540 asc_dvc_varp->iop_base = iop;
14543 ASC_DBG(1, "advansys_board_found: wide board\n");
14544 adv_dvc_varp = &boardp->dvc_var.adv_dvc_var;
14545 adv_dvc_varp->drv_ptr = boardp;
14546 adv_dvc_varp->cfg = &boardp->dvc_cfg.adv_dvc_cfg;
14547 if (pdev->device == PCI_DEVICE_ID_ASP_ABP940UW) {
14548 ASC_DBG(1, "advansys_board_found: ASC-3550\n");
14549 adv_dvc_varp->chip_type = ADV_CHIP_ASC3550;
14550 } else if (pdev->device == PCI_DEVICE_ID_38C0800_REV1) {
14551 ASC_DBG(1, "advansys_board_found: ASC-38C0800\n");
14552 adv_dvc_varp->chip_type = ADV_CHIP_ASC38C0800;
14554 ASC_DBG(1, "advansys_board_found: ASC-38C1600\n");
14555 adv_dvc_varp->chip_type = ADV_CHIP_ASC38C1600;
14558 boardp->asc_n_io_port = pci_resource_len(pdev, 1);
14559 boardp->ioremap_addr = ioremap(pci_resource_start(pdev, 1),
14560 boardp->asc_n_io_port);
14561 if (!boardp->ioremap_addr) {
14563 ("advansys_board_found: board %d: ioremap(%x, %d) returned NULL\n",
14564 boardp->id, pci_resource_start(pdev, 1),
14565 boardp->asc_n_io_port);
14568 adv_dvc_varp->iop_base = (AdvPortAddr)boardp->ioremap_addr
14569 ASC_DBG1(1, "advansys_board_found: iop_base: 0x%lx\n",
14570 adv_dvc_varp->iop_base);
14573 * Even though it isn't used to access wide boards, other
14574 * than for the debug line below, save I/O Port address so
14575 * that it can be reported.
14577 boardp->ioport = iop;
14579 ASC_DBG2(1, "advansys_board_found: iopb_chip_id_1 0x%x, "
14580 "iopw_chip_id_0 0x%x\n", (ushort)inp(iop + 1),
14581 (ushort)inpw(iop));
14582 #endif /* CONFIG_PCI */
14585 #ifdef CONFIG_PROC_FS
14587 * Allocate buffer for printing information from
14588 * /proc/scsi/advansys/[0...].
14590 boardp->prtbuf = kmalloc(ASC_PRTBUF_SIZE, GFP_KERNEL);
14591 if (!boardp->prtbuf) {
14592 ASC_PRINT2("advansys_board_found: board %d: kmalloc(%d) "
14593 "returned NULL\n", boardp->id, ASC_PRTBUF_SIZE);
14596 #endif /* CONFIG_PROC_FS */
14598 if (ASC_NARROW_BOARD(boardp)) {
14600 * Set the board bus type and PCI IRQ before
14601 * calling AscInitGetConfig().
14603 switch (asc_dvc_varp->bus_type) {
14606 shost->unchecked_isa_dma = TRUE;
14610 shost->unchecked_isa_dma = FALSE;
14614 shost->unchecked_isa_dma = FALSE;
14615 share_irq = IRQF_SHARED;
14617 #endif /* CONFIG_ISA */
14620 shost->irq = asc_dvc_varp->irq_no = pdev->irq;
14621 shost->unchecked_isa_dma = FALSE;
14622 share_irq = IRQF_SHARED;
14624 #endif /* CONFIG_PCI */
14627 ("advansys_board_found: board %d: unknown adapter type: %d\n",
14628 boardp->id, asc_dvc_varp->bus_type);
14629 shost->unchecked_isa_dma = TRUE;
14635 * NOTE: AscInitGetConfig() may change the board's
14636 * bus_type value. The bus_type value should no
14637 * longer be used. If the bus_type field must be
14638 * referenced only use the bit-wise AND operator "&".
14640 ASC_DBG(2, "advansys_board_found: AscInitGetConfig()\n");
14641 err_code = AscInitGetConfig(boardp);
14645 * For Wide boards set PCI information before calling
14646 * AdvInitGetConfig().
14648 shost->irq = adv_dvc_varp->irq_no = pdev->irq;
14649 shost->unchecked_isa_dma = FALSE;
14650 share_irq = IRQF_SHARED;
14651 ASC_DBG(2, "advansys_board_found: AdvInitGetConfig()\n");
14653 err_code = AdvInitGetConfig(pdev, boardp);
14654 #endif /* CONFIG_PCI */
14658 goto err_free_proc;
14661 * Save the EEPROM configuration so that it can be displayed
14662 * from /proc/scsi/advansys/[0...].
14664 if (ASC_NARROW_BOARD(boardp)) {
14669 * Set the adapter's target id bit in the 'init_tidmask' field.
14671 boardp->init_tidmask |=
14672 ADV_TID_TO_TIDMASK(asc_dvc_varp->cfg->chip_scsi_id);
14675 * Save EEPROM settings for the board.
14677 ep = &boardp->eep_config.asc_eep;
14679 ep->init_sdtr = asc_dvc_varp->cfg->sdtr_enable;
14680 ep->disc_enable = asc_dvc_varp->cfg->disc_enable;
14681 ep->use_cmd_qng = asc_dvc_varp->cfg->cmd_qng_enabled;
14682 ASC_EEP_SET_DMA_SPD(ep, asc_dvc_varp->cfg->isa_dma_speed);
14683 ep->start_motor = asc_dvc_varp->start_motor;
14684 ep->cntl = asc_dvc_varp->dvc_cntl;
14685 ep->no_scam = asc_dvc_varp->no_scam;
14686 ep->max_total_qng = asc_dvc_varp->max_total_qng;
14687 ASC_EEP_SET_CHIP_ID(ep, asc_dvc_varp->cfg->chip_scsi_id);
14688 /* 'max_tag_qng' is set to the same value for every device. */
14689 ep->max_tag_qng = asc_dvc_varp->cfg->max_tag_qng[0];
14690 ep->adapter_info[0] = asc_dvc_varp->cfg->adapter_info[0];
14691 ep->adapter_info[1] = asc_dvc_varp->cfg->adapter_info[1];
14692 ep->adapter_info[2] = asc_dvc_varp->cfg->adapter_info[2];
14693 ep->adapter_info[3] = asc_dvc_varp->cfg->adapter_info[3];
14694 ep->adapter_info[4] = asc_dvc_varp->cfg->adapter_info[4];
14695 ep->adapter_info[5] = asc_dvc_varp->cfg->adapter_info[5];
14698 * Modify board configuration.
14700 ASC_DBG(2, "advansys_board_found: AscInitSetConfig()\n");
14701 err_code = AscInitSetConfig(pdev, boardp);
14703 goto err_free_proc;
14706 * Finish initializing the 'Scsi_Host' structure.
14708 /* AscInitSetConfig() will set the IRQ for non-PCI boards. */
14709 if ((asc_dvc_varp->bus_type & ASC_IS_PCI) == 0) {
14710 shost->irq = asc_dvc_varp->irq_no;
14713 ADVEEP_3550_CONFIG *ep_3550;
14714 ADVEEP_38C0800_CONFIG *ep_38C0800;
14715 ADVEEP_38C1600_CONFIG *ep_38C1600;
14718 * Save Wide EEP Configuration Information.
14720 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
14721 ep_3550 = &boardp->eep_config.adv_3550_eep;
14723 ep_3550->adapter_scsi_id = adv_dvc_varp->chip_scsi_id;
14724 ep_3550->max_host_qng = adv_dvc_varp->max_host_qng;
14725 ep_3550->max_dvc_qng = adv_dvc_varp->max_dvc_qng;
14726 ep_3550->termination = adv_dvc_varp->cfg->termination;
14727 ep_3550->disc_enable = adv_dvc_varp->cfg->disc_enable;
14728 ep_3550->bios_ctrl = adv_dvc_varp->bios_ctrl;
14729 ep_3550->wdtr_able = adv_dvc_varp->wdtr_able;
14730 ep_3550->sdtr_able = adv_dvc_varp->sdtr_able;
14731 ep_3550->ultra_able = adv_dvc_varp->ultra_able;
14732 ep_3550->tagqng_able = adv_dvc_varp->tagqng_able;
14733 ep_3550->start_motor = adv_dvc_varp->start_motor;
14734 ep_3550->scsi_reset_delay =
14735 adv_dvc_varp->scsi_reset_wait;
14736 ep_3550->serial_number_word1 =
14737 adv_dvc_varp->cfg->serial1;
14738 ep_3550->serial_number_word2 =
14739 adv_dvc_varp->cfg->serial2;
14740 ep_3550->serial_number_word3 =
14741 adv_dvc_varp->cfg->serial3;
14742 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
14743 ep_38C0800 = &boardp->eep_config.adv_38C0800_eep;
14745 ep_38C0800->adapter_scsi_id =
14746 adv_dvc_varp->chip_scsi_id;
14747 ep_38C0800->max_host_qng = adv_dvc_varp->max_host_qng;
14748 ep_38C0800->max_dvc_qng = adv_dvc_varp->max_dvc_qng;
14749 ep_38C0800->termination_lvd =
14750 adv_dvc_varp->cfg->termination;
14751 ep_38C0800->disc_enable =
14752 adv_dvc_varp->cfg->disc_enable;
14753 ep_38C0800->bios_ctrl = adv_dvc_varp->bios_ctrl;
14754 ep_38C0800->wdtr_able = adv_dvc_varp->wdtr_able;
14755 ep_38C0800->tagqng_able = adv_dvc_varp->tagqng_able;
14756 ep_38C0800->sdtr_speed1 = adv_dvc_varp->sdtr_speed1;
14757 ep_38C0800->sdtr_speed2 = adv_dvc_varp->sdtr_speed2;
14758 ep_38C0800->sdtr_speed3 = adv_dvc_varp->sdtr_speed3;
14759 ep_38C0800->sdtr_speed4 = adv_dvc_varp->sdtr_speed4;
14760 ep_38C0800->tagqng_able = adv_dvc_varp->tagqng_able;
14761 ep_38C0800->start_motor = adv_dvc_varp->start_motor;
14762 ep_38C0800->scsi_reset_delay =
14763 adv_dvc_varp->scsi_reset_wait;
14764 ep_38C0800->serial_number_word1 =
14765 adv_dvc_varp->cfg->serial1;
14766 ep_38C0800->serial_number_word2 =
14767 adv_dvc_varp->cfg->serial2;
14768 ep_38C0800->serial_number_word3 =
14769 adv_dvc_varp->cfg->serial3;
14771 ep_38C1600 = &boardp->eep_config.adv_38C1600_eep;
14773 ep_38C1600->adapter_scsi_id =
14774 adv_dvc_varp->chip_scsi_id;
14775 ep_38C1600->max_host_qng = adv_dvc_varp->max_host_qng;
14776 ep_38C1600->max_dvc_qng = adv_dvc_varp->max_dvc_qng;
14777 ep_38C1600->termination_lvd =
14778 adv_dvc_varp->cfg->termination;
14779 ep_38C1600->disc_enable =
14780 adv_dvc_varp->cfg->disc_enable;
14781 ep_38C1600->bios_ctrl = adv_dvc_varp->bios_ctrl;
14782 ep_38C1600->wdtr_able = adv_dvc_varp->wdtr_able;
14783 ep_38C1600->tagqng_able = adv_dvc_varp->tagqng_able;
14784 ep_38C1600->sdtr_speed1 = adv_dvc_varp->sdtr_speed1;
14785 ep_38C1600->sdtr_speed2 = adv_dvc_varp->sdtr_speed2;
14786 ep_38C1600->sdtr_speed3 = adv_dvc_varp->sdtr_speed3;
14787 ep_38C1600->sdtr_speed4 = adv_dvc_varp->sdtr_speed4;
14788 ep_38C1600->tagqng_able = adv_dvc_varp->tagqng_able;
14789 ep_38C1600->start_motor = adv_dvc_varp->start_motor;
14790 ep_38C1600->scsi_reset_delay =
14791 adv_dvc_varp->scsi_reset_wait;
14792 ep_38C1600->serial_number_word1 =
14793 adv_dvc_varp->cfg->serial1;
14794 ep_38C1600->serial_number_word2 =
14795 adv_dvc_varp->cfg->serial2;
14796 ep_38C1600->serial_number_word3 =
14797 adv_dvc_varp->cfg->serial3;
14801 * Set the adapter's target id bit in the 'init_tidmask' field.
14803 boardp->init_tidmask |=
14804 ADV_TID_TO_TIDMASK(adv_dvc_varp->chip_scsi_id);
14808 * Channels are numbered beginning with 0. For AdvanSys one host
14809 * structure supports one channel. Multi-channel boards have a
14810 * separate host structure for each channel.
14812 shost->max_channel = 0;
14813 if (ASC_NARROW_BOARD(boardp)) {
14814 shost->max_id = ASC_MAX_TID + 1;
14815 shost->max_lun = ASC_MAX_LUN + 1;
14816 shost->max_cmd_len = ASC_MAX_CDB_LEN;
14818 shost->io_port = asc_dvc_varp->iop_base;
14819 boardp->asc_n_io_port = ASC_IOADR_GAP;
14820 shost->this_id = asc_dvc_varp->cfg->chip_scsi_id;
14822 /* Set maximum number of queues the adapter can handle. */
14823 shost->can_queue = asc_dvc_varp->max_total_qng;
14825 shost->max_id = ADV_MAX_TID + 1;
14826 shost->max_lun = ADV_MAX_LUN + 1;
14827 shost->max_cmd_len = ADV_MAX_CDB_LEN;
14830 * Save the I/O Port address and length even though
14831 * I/O ports are not used to access Wide boards.
14832 * Instead the Wide boards are accessed with
14833 * PCI Memory Mapped I/O.
14835 shost->io_port = iop;
14837 shost->this_id = adv_dvc_varp->chip_scsi_id;
14839 /* Set maximum number of queues the adapter can handle. */
14840 shost->can_queue = adv_dvc_varp->max_host_qng;
14844 * Following v1.3.89, 'cmd_per_lun' is no longer needed
14845 * and should be set to zero.
14847 * But because of a bug introduced in v1.3.89 if the driver is
14848 * compiled as a module and 'cmd_per_lun' is zero, the Mid-Level
14849 * SCSI function 'allocate_device' will panic. To allow the driver
14850 * to work as a module in these kernels set 'cmd_per_lun' to 1.
14852 * Note: This is wrong. cmd_per_lun should be set to the depth
14853 * you want on untagged devices always.
14856 shost->cmd_per_lun = 1;
14858 shost->cmd_per_lun = 0;
14862 * Set the maximum number of scatter-gather elements the
14863 * adapter can handle.
14865 if (ASC_NARROW_BOARD(boardp)) {
14867 * Allow two commands with 'sg_tablesize' scatter-gather
14868 * elements to be executed simultaneously. This value is
14869 * the theoretical hardware limit. It may be decreased
14872 shost->sg_tablesize =
14873 (((asc_dvc_varp->max_total_qng - 2) / 2) *
14874 ASC_SG_LIST_PER_Q) + 1;
14876 shost->sg_tablesize = ADV_MAX_SG_LIST;
14880 * The value of 'sg_tablesize' can not exceed the SCSI
14881 * mid-level driver definition of SG_ALL. SG_ALL also
14882 * must not be exceeded, because it is used to define the
14883 * size of the scatter-gather table in 'struct asc_sg_head'.
14885 if (shost->sg_tablesize > SG_ALL) {
14886 shost->sg_tablesize = SG_ALL;
14889 ASC_DBG1(1, "advansys_board_found: sg_tablesize: %d\n", shost->sg_tablesize);
14891 /* BIOS start address. */
14892 if (ASC_NARROW_BOARD(boardp)) {
14893 shost->base = AscGetChipBiosAddress(asc_dvc_varp->iop_base,
14894 asc_dvc_varp->bus_type);
14897 * Fill-in BIOS board variables. The Wide BIOS saves
14898 * information in LRAM that is used by the driver.
14900 AdvReadWordLram(adv_dvc_varp->iop_base,
14901 BIOS_SIGNATURE, boardp->bios_signature);
14902 AdvReadWordLram(adv_dvc_varp->iop_base,
14903 BIOS_VERSION, boardp->bios_version);
14904 AdvReadWordLram(adv_dvc_varp->iop_base,
14905 BIOS_CODESEG, boardp->bios_codeseg);
14906 AdvReadWordLram(adv_dvc_varp->iop_base,
14907 BIOS_CODELEN, boardp->bios_codelen);
14910 "advansys_board_found: bios_signature 0x%x, bios_version 0x%x\n",
14911 boardp->bios_signature, boardp->bios_version);
14914 "advansys_board_found: bios_codeseg 0x%x, bios_codelen 0x%x\n",
14915 boardp->bios_codeseg, boardp->bios_codelen);
14918 * If the BIOS saved a valid signature, then fill in
14919 * the BIOS code segment base address.
14921 if (boardp->bios_signature == 0x55AA) {
14923 * Convert x86 realmode code segment to a linear
14924 * address by shifting left 4.
14926 shost->base = ((ulong)boardp->bios_codeseg << 4);
14933 * Register Board Resources - I/O Port, DMA, IRQ
14936 /* Register DMA Channel for Narrow boards. */
14937 shost->dma_channel = NO_ISA_DMA; /* Default to no ISA DMA. */
14939 if (ASC_NARROW_BOARD(boardp)) {
14940 /* Register DMA channel for ISA bus. */
14941 if (asc_dvc_varp->bus_type & ASC_IS_ISA) {
14942 shost->dma_channel = asc_dvc_varp->cfg->isa_dma_channel;
14943 ret = request_dma(shost->dma_channel, "advansys");
14946 ("advansys_board_found: board %d: request_dma() %d failed %d\n",
14947 boardp->id, shost->dma_channel, ret);
14948 goto err_free_proc;
14950 AscEnableIsaDma(shost->dma_channel);
14953 #endif /* CONFIG_ISA */
14955 /* Register IRQ Number. */
14956 ASC_DBG1(2, "advansys_board_found: request_irq() %d\n", shost->irq);
14958 ret = request_irq(shost->irq, advansys_interrupt, share_irq,
14959 "advansys", shost);
14962 if (ret == -EBUSY) {
14964 ("advansys_board_found: board %d: request_irq(): IRQ 0x%x already in use.\n",
14965 boardp->id, shost->irq);
14966 } else if (ret == -EINVAL) {
14968 ("advansys_board_found: board %d: request_irq(): IRQ 0x%x not valid.\n",
14969 boardp->id, shost->irq);
14972 ("advansys_board_found: board %d: request_irq(): IRQ 0x%x failed with %d\n",
14973 boardp->id, shost->irq, ret);
14979 * Initialize board RISC chip and enable interrupts.
14981 if (ASC_NARROW_BOARD(boardp)) {
14982 ASC_DBG(2, "advansys_board_found: AscInitAsc1000Driver()\n");
14983 warn_code = AscInitAsc1000Driver(asc_dvc_varp);
14984 err_code = asc_dvc_varp->err_code;
14986 if (warn_code || err_code) {
14988 ("advansys_board_found: board %d error: init_state 0x%x, warn 0x%x, error 0x%x\n",
14990 asc_dvc_varp->init_state, warn_code, err_code);
14993 err_code = advansys_wide_init_chip(boardp, adv_dvc_varp);
14997 goto err_free_wide_mem;
14999 ASC_DBG_PRT_SCSI_HOST(2, shost);
15001 ret = scsi_add_host(shost, dev);
15003 goto err_free_wide_mem;
15005 scsi_scan_host(shost);
15009 advansys_wide_free_mem(boardp);
15010 free_irq(shost->irq, shost);
15012 if (shost->dma_channel != NO_ISA_DMA)
15013 free_dma(shost->dma_channel);
15015 kfree(boardp->prtbuf);
15017 if (boardp->ioremap_addr)
15018 iounmap(boardp->ioremap_addr);
15020 scsi_host_put(shost);
15025 * advansys_release()
15027 * Release resources allocated for a single AdvanSys adapter.
15029 static int advansys_release(struct Scsi_Host *shost)
15031 asc_board_t *boardp;
15033 ASC_DBG(1, "advansys_release: begin\n");
15034 scsi_remove_host(shost);
15035 boardp = ASC_BOARDP(shost);
15036 free_irq(shost->irq, shost);
15037 if (shost->dma_channel != NO_ISA_DMA) {
15038 ASC_DBG(1, "advansys_release: free_dma()\n");
15039 free_dma(shost->dma_channel);
15041 if (ASC_WIDE_BOARD(boardp)) {
15042 iounmap(boardp->ioremap_addr);
15043 advansys_wide_free_mem(boardp);
15045 kfree(boardp->prtbuf);
15046 scsi_host_put(shost);
15047 ASC_DBG(1, "advansys_release: end\n");
15051 static PortAddr _asc_def_iop_base[ASC_IOADR_TABLE_MAX_IX] __devinitdata = {
15052 0x100, 0x0110, 0x120, 0x0130, 0x140, 0x0150, 0x0190,
15053 0x0210, 0x0230, 0x0250, 0x0330
15056 static int __devinit advansys_isa_probe(struct device *dev, unsigned int id)
15058 PortAddr iop_base = _asc_def_iop_base[id];
15059 struct Scsi_Host *shost;
15061 if (!request_region(iop_base, ASC_IOADR_GAP, "advansys")) {
15062 ASC_DBG1(1, "advansys_isa_match: I/O port 0x%x busy\n",
15066 ASC_DBG1(1, "advansys_isa_match: probing I/O port 0x%x\n", iop_base);
15067 if (!AscFindSignature(iop_base))
15069 if (!(AscGetChipVersion(iop_base, ASC_IS_ISA) & ASC_CHIP_VER_ISA_BIT))
15072 shost = advansys_board_found(iop_base, dev, ASC_IS_ISA);
15076 dev_set_drvdata(dev, shost);
15080 release_region(iop_base, ASC_IOADR_GAP);
15084 static int __devexit advansys_isa_remove(struct device *dev, unsigned int id)
15086 int ioport = _asc_def_iop_base[id];
15087 advansys_release(dev_get_drvdata(dev));
15088 release_region(ioport, ASC_IOADR_GAP);
15092 static struct isa_driver advansys_isa_driver = {
15093 .probe = advansys_isa_probe,
15094 .remove = __devexit_p(advansys_isa_remove),
15096 .owner = THIS_MODULE,
15097 .name = "advansys",
15101 static int __devinit advansys_vlb_probe(struct device *dev, unsigned int id)
15103 PortAddr iop_base = _asc_def_iop_base[id];
15104 struct Scsi_Host *shost;
15106 if (!request_region(iop_base, ASC_IOADR_GAP, "advansys")) {
15107 ASC_DBG1(1, "advansys_vlb_match: I/O port 0x%x busy\n",
15111 ASC_DBG1(1, "advansys_vlb_match: probing I/O port 0x%x\n", iop_base);
15112 if (!AscFindSignature(iop_base))
15115 * I don't think this condition can actually happen, but the old
15116 * driver did it, and the chances of finding a VLB setup in 2007
15117 * to do testing with is slight to none.
15119 if (AscGetChipVersion(iop_base, ASC_IS_VL) > ASC_CHIP_MAX_VER_VL)
15122 shost = advansys_board_found(iop_base, dev, ASC_IS_VL);
15126 dev_set_drvdata(dev, shost);
15130 release_region(iop_base, ASC_IOADR_GAP);
15134 static struct isa_driver advansys_vlb_driver = {
15135 .probe = advansys_vlb_probe,
15136 .remove = __devexit_p(advansys_isa_remove),
15138 .owner = THIS_MODULE,
15139 .name = "advansys_vlb",
15143 static struct eisa_device_id advansys_eisa_table[] __devinitdata = {
15149 MODULE_DEVICE_TABLE(eisa, advansys_eisa_table);
15152 * EISA is a little more tricky than PCI; each EISA device may have two
15153 * channels, and this driver is written to make each channel its own Scsi_Host
15155 struct eisa_scsi_data {
15156 struct Scsi_Host *host[2];
15159 static int __devinit advansys_eisa_probe(struct device *dev)
15163 struct eisa_device *edev = to_eisa_device(dev);
15164 struct eisa_scsi_data *data;
15167 data = kzalloc(sizeof(*data), GFP_KERNEL);
15170 ioport = edev->base_addr + 0xc30;
15173 for (i = 0; i < 2; i++, ioport += 0x20) {
15174 if (!request_region(ioport, ASC_IOADR_GAP, "advansys")) {
15175 printk(KERN_WARNING "Region %x-%x busy\n", ioport,
15176 ioport + ASC_IOADR_GAP - 1);
15179 if (!AscFindSignature(ioport)) {
15180 release_region(ioport, ASC_IOADR_GAP);
15185 * I don't know why we need to do this for EISA chips, but
15186 * not for any others. It looks to be equivalent to
15187 * AscGetChipCfgMsw, but I may have overlooked something,
15188 * so I'm not converting it until I get an EISA board to
15192 data->host[i] = advansys_board_found(ioport, dev, ASC_IS_EISA);
15193 if (data->host[i]) {
15196 release_region(ioport, ASC_IOADR_GAP);
15203 dev_set_drvdata(dev, data);
15210 static __devexit int advansys_eisa_remove(struct device *dev)
15213 struct eisa_scsi_data *data = dev_get_drvdata(dev);
15215 for (i = 0; i < 2; i++) {
15217 struct Scsi_Host *shost = data->host[i];
15220 ioport = shost->io_port;
15221 advansys_release(shost);
15222 release_region(ioport, ASC_IOADR_GAP);
15229 static struct eisa_driver advansys_eisa_driver = {
15230 .id_table = advansys_eisa_table,
15232 .name = "advansys",
15233 .probe = advansys_eisa_probe,
15234 .remove = __devexit_p(advansys_eisa_remove),
15238 /* PCI Devices supported by this driver */
15239 static struct pci_device_id advansys_pci_tbl[] __devinitdata = {
15240 {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_1200A,
15241 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
15242 {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_ABP940,
15243 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
15244 {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_ABP940U,
15245 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
15246 {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_ABP940UW,
15247 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
15248 {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_38C0800_REV1,
15249 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
15250 {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_38C1600_REV1,
15251 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
15255 MODULE_DEVICE_TABLE(pci, advansys_pci_tbl);
15257 static void __devinit advansys_set_latency(struct pci_dev *pdev)
15259 if ((pdev->device == PCI_DEVICE_ID_ASP_1200A) ||
15260 (pdev->device == PCI_DEVICE_ID_ASP_ABP940)) {
15261 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0);
15264 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency);
15265 if (latency < 0x20)
15266 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x20);
15270 static int __devinit
15271 advansys_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
15274 struct Scsi_Host *shost;
15276 err = pci_enable_device(pdev);
15279 err = pci_request_regions(pdev, "advansys");
15281 goto disable_device;
15282 pci_set_master(pdev);
15283 advansys_set_latency(pdev);
15285 if (pci_resource_len(pdev, 0) == 0)
15288 ioport = pci_resource_start(pdev, 0);
15289 shost = advansys_board_found(ioport, &pdev->dev, ASC_IS_PCI);
15294 pci_set_drvdata(pdev, shost);
15299 pci_release_regions(pdev);
15301 pci_disable_device(pdev);
15306 static void __devexit advansys_pci_remove(struct pci_dev *pdev)
15308 advansys_release(pci_get_drvdata(pdev));
15309 pci_release_regions(pdev);
15310 pci_disable_device(pdev);
15313 static struct pci_driver advansys_pci_driver = {
15314 .name = "advansys",
15315 .id_table = advansys_pci_tbl,
15316 .probe = advansys_pci_probe,
15317 .remove = __devexit_p(advansys_pci_remove),
15320 static int __init advansys_init(void)
15324 error = isa_register_driver(&advansys_isa_driver,
15325 ASC_IOADR_TABLE_MAX_IX);
15329 error = isa_register_driver(&advansys_vlb_driver,
15330 ASC_IOADR_TABLE_MAX_IX);
15332 goto unregister_isa;
15334 error = eisa_driver_register(&advansys_eisa_driver);
15336 goto unregister_vlb;
15338 error = pci_register_driver(&advansys_pci_driver);
15340 goto unregister_eisa;
15345 eisa_driver_unregister(&advansys_eisa_driver);
15347 isa_unregister_driver(&advansys_vlb_driver);
15349 isa_unregister_driver(&advansys_isa_driver);
15354 static void __exit advansys_exit(void)
15356 pci_unregister_driver(&advansys_pci_driver);
15357 eisa_driver_unregister(&advansys_eisa_driver);
15358 isa_unregister_driver(&advansys_vlb_driver);
15359 isa_unregister_driver(&advansys_isa_driver);
15362 module_init(advansys_init);
15363 module_exit(advansys_exit);
15365 MODULE_LICENSE("GPL");