1 #define DRV_NAME "advansys"
2 #define ASC_VERSION "3.4" /* AdvanSys Driver Version */
5 * advansys.c - Linux Host Driver for AdvanSys SCSI Adapters
7 * Copyright (c) 1995-2000 Advanced System Products, Inc.
8 * Copyright (c) 2000-2001 ConnectCom Solutions, Inc.
9 * Copyright (c) 2007 Matthew Wilcox <matthew@wil.cx>
10 * All Rights Reserved.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
19 * As of March 8, 2000 Advanced System Products, Inc. (AdvanSys)
20 * changed its name to ConnectCom Solutions, Inc.
21 * On June 18, 2001 Initio Corp. acquired ConnectCom's SCSI assets
24 #include <linux/module.h>
25 #include <linux/string.h>
26 #include <linux/kernel.h>
27 #include <linux/types.h>
28 #include <linux/ioport.h>
29 #include <linux/interrupt.h>
30 #include <linux/delay.h>
31 #include <linux/slab.h>
33 #include <linux/proc_fs.h>
34 #include <linux/init.h>
35 #include <linux/blkdev.h>
36 #include <linux/isa.h>
37 #include <linux/eisa.h>
38 #include <linux/pci.h>
39 #include <linux/spinlock.h>
40 #include <linux/dma-mapping.h>
43 #include <asm/system.h>
46 #include <scsi/scsi_cmnd.h>
47 #include <scsi/scsi_device.h>
48 #include <scsi/scsi_tcq.h>
49 #include <scsi/scsi.h>
50 #include <scsi/scsi_host.h>
54 * 1. Although all of the necessary command mapping places have the
55 * appropriate dma_map.. APIs, the driver still processes its internal
56 * queue using bus_to_virt() and virt_to_bus() which are illegal under
57 * the API. The entire queue processing structure will need to be
58 * altered to fix this.
59 * 2. Need to add memory mapping workaround. Test the memory mapping.
60 * If it doesn't work revert to I/O port access. Can a test be done
62 * 3. Handle an interrupt not working. Keep an interrupt counter in
63 * the interrupt handler. In the timeout function if the interrupt
64 * has not occurred then print a message and run in polled mode.
65 * 4. Need to add support for target mode commands, cf. CAM XPT.
66 * 5. check DMA mapping functions for failure
67 * 6. Use scsi_transport_spi
68 * 7. advansys_info is not safe against multiple simultaneous callers
70 * 9. Add module_param to override ISA/VLB ioport array
72 #warning this driver is still not properly converted to the DMA API
74 /* Enable driver /proc statistics. */
75 #define ADVANSYS_STATS
77 /* Enable driver tracing. */
78 /* #define ADVANSYS_DEBUG */
80 #define ASC_LIB_VERSION_MAJOR 1
81 #define ASC_LIB_VERSION_MINOR 24
82 #define ASC_LIB_SERIAL_NUMBER 123
87 * Any instance where a 32-bit long or pointer type is assumed
88 * for precision or HW defined structures, the following define
89 * types must be used. In Linux the char, short, and int types
90 * are all consistent at 8, 16, and 32 bits respectively. Pointers
91 * and long types are 64 bits on Alpha and UltraSPARC.
93 #define ASC_PADDR __u32 /* Physical/Bus address data type. */
94 #define ASC_VADDR __u32 /* Virtual address data type. */
95 #define ASC_DCNT __u32 /* Unsigned Data count type. */
96 #define ASC_SDCNT __s32 /* Signed Data count type. */
99 * These macros are used to convert a virtual address to a
100 * 32-bit value. This currently can be used on Linux Alpha
101 * which uses 64-bit virtual address but a 32-bit bus address.
102 * This is likely to break in the future, but doing this now
103 * will give us time to change the HW and FW to handle 64-bit
106 #define ASC_VADDR_TO_U32 virt_to_bus
107 #define ASC_U32_TO_VADDR bus_to_virt
109 typedef unsigned char uchar;
119 #define UW_ERR (uint)(0xFFFF)
120 #define isodd_word(val) ((((uint)val) & (uint)0x0001) != 0)
122 #define PCI_VENDOR_ID_ASP 0x10cd
123 #define PCI_DEVICE_ID_ASP_1200A 0x1100
124 #define PCI_DEVICE_ID_ASP_ABP940 0x1200
125 #define PCI_DEVICE_ID_ASP_ABP940U 0x1300
126 #define PCI_DEVICE_ID_ASP_ABP940UW 0x2300
127 #define PCI_DEVICE_ID_38C0800_REV1 0x2500
128 #define PCI_DEVICE_ID_38C1600_REV1 0x2700
131 * Enable CC_VERY_LONG_SG_LIST to support up to 64K element SG lists.
132 * The SRB structure will have to be changed and the ASC_SRB2SCSIQ()
133 * macro re-defined to be able to obtain a ASC_SCSI_Q pointer from the
136 #define CC_VERY_LONG_SG_LIST 0
137 #define ASC_SRB2SCSIQ(srb_ptr) (srb_ptr)
139 #define PortAddr unsigned short /* port address size */
140 #define inp(port) inb(port)
141 #define outp(port, byte) outb((byte), (port))
143 #define inpw(port) inw(port)
144 #define outpw(port, word) outw((word), (port))
146 #define ASC_MAX_SG_QUEUE 7
147 #define ASC_MAX_SG_LIST 255
149 #define ASC_CS_TYPE unsigned short
151 #define ASC_IS_ISA (0x0001)
152 #define ASC_IS_ISAPNP (0x0081)
153 #define ASC_IS_EISA (0x0002)
154 #define ASC_IS_PCI (0x0004)
155 #define ASC_IS_PCI_ULTRA (0x0104)
156 #define ASC_IS_PCMCIA (0x0008)
157 #define ASC_IS_MCA (0x0020)
158 #define ASC_IS_VL (0x0040)
159 #define ASC_IS_WIDESCSI_16 (0x0100)
160 #define ASC_IS_WIDESCSI_32 (0x0200)
161 #define ASC_IS_BIG_ENDIAN (0x8000)
163 #define ASC_CHIP_MIN_VER_VL (0x01)
164 #define ASC_CHIP_MAX_VER_VL (0x07)
165 #define ASC_CHIP_MIN_VER_PCI (0x09)
166 #define ASC_CHIP_MAX_VER_PCI (0x0F)
167 #define ASC_CHIP_VER_PCI_BIT (0x08)
168 #define ASC_CHIP_MIN_VER_ISA (0x11)
169 #define ASC_CHIP_MIN_VER_ISA_PNP (0x21)
170 #define ASC_CHIP_MAX_VER_ISA (0x27)
171 #define ASC_CHIP_VER_ISA_BIT (0x30)
172 #define ASC_CHIP_VER_ISAPNP_BIT (0x20)
173 #define ASC_CHIP_VER_ASYN_BUG (0x21)
174 #define ASC_CHIP_VER_PCI 0x08
175 #define ASC_CHIP_VER_PCI_ULTRA_3150 (ASC_CHIP_VER_PCI | 0x02)
176 #define ASC_CHIP_VER_PCI_ULTRA_3050 (ASC_CHIP_VER_PCI | 0x03)
177 #define ASC_CHIP_MIN_VER_EISA (0x41)
178 #define ASC_CHIP_MAX_VER_EISA (0x47)
179 #define ASC_CHIP_VER_EISA_BIT (0x40)
180 #define ASC_CHIP_LATEST_VER_EISA ((ASC_CHIP_MIN_VER_EISA - 1) + 3)
181 #define ASC_MAX_VL_DMA_COUNT (0x07FFFFFFL)
182 #define ASC_MAX_PCI_DMA_COUNT (0xFFFFFFFFL)
183 #define ASC_MAX_ISA_DMA_COUNT (0x00FFFFFFL)
185 #define ASC_SCSI_ID_BITS 3
186 #define ASC_SCSI_TIX_TYPE uchar
187 #define ASC_ALL_DEVICE_BIT_SET 0xFF
188 #define ASC_SCSI_BIT_ID_TYPE uchar
189 #define ASC_MAX_TID 7
190 #define ASC_MAX_LUN 7
191 #define ASC_SCSI_WIDTH_BIT_SET 0xFF
192 #define ASC_MAX_SENSE_LEN 32
193 #define ASC_MIN_SENSE_LEN 14
194 #define ASC_SCSI_RESET_HOLD_TIME_US 60
197 * Narrow boards only support 12-byte commands, while wide boards
198 * extend to 16-byte commands.
200 #define ASC_MAX_CDB_LEN 12
201 #define ADV_MAX_CDB_LEN 16
203 #define MS_SDTR_LEN 0x03
204 #define MS_WDTR_LEN 0x02
206 #define ASC_SG_LIST_PER_Q 7
208 #define QS_READY 0x01
209 #define QS_DISC1 0x02
210 #define QS_DISC2 0x04
212 #define QS_ABORTED 0x40
214 #define QC_NO_CALLBACK 0x01
215 #define QC_SG_SWAP_QUEUE 0x02
216 #define QC_SG_HEAD 0x04
217 #define QC_DATA_IN 0x08
218 #define QC_DATA_OUT 0x10
219 #define QC_URGENT 0x20
220 #define QC_MSG_OUT 0x40
221 #define QC_REQ_SENSE 0x80
222 #define QCSG_SG_XFER_LIST 0x02
223 #define QCSG_SG_XFER_MORE 0x04
224 #define QCSG_SG_XFER_END 0x08
225 #define QD_IN_PROGRESS 0x00
226 #define QD_NO_ERROR 0x01
227 #define QD_ABORTED_BY_HOST 0x02
228 #define QD_WITH_ERROR 0x04
229 #define QD_INVALID_REQUEST 0x80
230 #define QD_INVALID_HOST_NUM 0x81
231 #define QD_INVALID_DEVICE 0x82
232 #define QD_ERR_INTERNAL 0xFF
233 #define QHSTA_NO_ERROR 0x00
234 #define QHSTA_M_SEL_TIMEOUT 0x11
235 #define QHSTA_M_DATA_OVER_RUN 0x12
236 #define QHSTA_M_DATA_UNDER_RUN 0x12
237 #define QHSTA_M_UNEXPECTED_BUS_FREE 0x13
238 #define QHSTA_M_BAD_BUS_PHASE_SEQ 0x14
239 #define QHSTA_D_QDONE_SG_LIST_CORRUPTED 0x21
240 #define QHSTA_D_ASC_DVC_ERROR_CODE_SET 0x22
241 #define QHSTA_D_HOST_ABORT_FAILED 0x23
242 #define QHSTA_D_EXE_SCSI_Q_FAILED 0x24
243 #define QHSTA_D_EXE_SCSI_Q_BUSY_TIMEOUT 0x25
244 #define QHSTA_D_ASPI_NO_BUF_POOL 0x26
245 #define QHSTA_M_WTM_TIMEOUT 0x41
246 #define QHSTA_M_BAD_CMPL_STATUS_IN 0x42
247 #define QHSTA_M_NO_AUTO_REQ_SENSE 0x43
248 #define QHSTA_M_AUTO_REQ_SENSE_FAIL 0x44
249 #define QHSTA_M_TARGET_STATUS_BUSY 0x45
250 #define QHSTA_M_BAD_TAG_CODE 0x46
251 #define QHSTA_M_BAD_QUEUE_FULL_OR_BUSY 0x47
252 #define QHSTA_M_HUNG_REQ_SCSI_BUS_RESET 0x48
253 #define QHSTA_D_LRAM_CMP_ERROR 0x81
254 #define QHSTA_M_MICRO_CODE_ERROR_HALT 0xA1
255 #define ASC_FLAG_SCSIQ_REQ 0x01
256 #define ASC_FLAG_BIOS_SCSIQ_REQ 0x02
257 #define ASC_FLAG_BIOS_ASYNC_IO 0x04
258 #define ASC_FLAG_SRB_LINEAR_ADDR 0x08
259 #define ASC_FLAG_WIN16 0x10
260 #define ASC_FLAG_WIN32 0x20
261 #define ASC_FLAG_ISA_OVER_16MB 0x40
262 #define ASC_FLAG_DOS_VM_CALLBACK 0x80
263 #define ASC_TAG_FLAG_EXTRA_BYTES 0x10
264 #define ASC_TAG_FLAG_DISABLE_DISCONNECT 0x04
265 #define ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX 0x08
266 #define ASC_TAG_FLAG_DISABLE_CHK_COND_INT_HOST 0x40
267 #define ASC_SCSIQ_CPY_BEG 4
268 #define ASC_SCSIQ_SGHD_CPY_BEG 2
269 #define ASC_SCSIQ_B_FWD 0
270 #define ASC_SCSIQ_B_BWD 1
271 #define ASC_SCSIQ_B_STATUS 2
272 #define ASC_SCSIQ_B_QNO 3
273 #define ASC_SCSIQ_B_CNTL 4
274 #define ASC_SCSIQ_B_SG_QUEUE_CNT 5
275 #define ASC_SCSIQ_D_DATA_ADDR 8
276 #define ASC_SCSIQ_D_DATA_CNT 12
277 #define ASC_SCSIQ_B_SENSE_LEN 20
278 #define ASC_SCSIQ_DONE_INFO_BEG 22
279 #define ASC_SCSIQ_D_SRBPTR 22
280 #define ASC_SCSIQ_B_TARGET_IX 26
281 #define ASC_SCSIQ_B_CDB_LEN 28
282 #define ASC_SCSIQ_B_TAG_CODE 29
283 #define ASC_SCSIQ_W_VM_ID 30
284 #define ASC_SCSIQ_DONE_STATUS 32
285 #define ASC_SCSIQ_HOST_STATUS 33
286 #define ASC_SCSIQ_SCSI_STATUS 34
287 #define ASC_SCSIQ_CDB_BEG 36
288 #define ASC_SCSIQ_DW_REMAIN_XFER_ADDR 56
289 #define ASC_SCSIQ_DW_REMAIN_XFER_CNT 60
290 #define ASC_SCSIQ_B_FIRST_SG_WK_QP 48
291 #define ASC_SCSIQ_B_SG_WK_QP 49
292 #define ASC_SCSIQ_B_SG_WK_IX 50
293 #define ASC_SCSIQ_W_ALT_DC1 52
294 #define ASC_SCSIQ_B_LIST_CNT 6
295 #define ASC_SCSIQ_B_CUR_LIST_CNT 7
296 #define ASC_SGQ_B_SG_CNTL 4
297 #define ASC_SGQ_B_SG_HEAD_QP 5
298 #define ASC_SGQ_B_SG_LIST_CNT 6
299 #define ASC_SGQ_B_SG_CUR_LIST_CNT 7
300 #define ASC_SGQ_LIST_BEG 8
301 #define ASC_DEF_SCSI1_QNG 4
302 #define ASC_MAX_SCSI1_QNG 4
303 #define ASC_DEF_SCSI2_QNG 16
304 #define ASC_MAX_SCSI2_QNG 32
305 #define ASC_TAG_CODE_MASK 0x23
306 #define ASC_STOP_REQ_RISC_STOP 0x01
307 #define ASC_STOP_ACK_RISC_STOP 0x03
308 #define ASC_STOP_CLEAN_UP_BUSY_Q 0x10
309 #define ASC_STOP_CLEAN_UP_DISC_Q 0x20
310 #define ASC_STOP_HOST_REQ_RISC_HALT 0x40
311 #define ASC_TIDLUN_TO_IX(tid, lun) (ASC_SCSI_TIX_TYPE)((tid) + ((lun)<<ASC_SCSI_ID_BITS))
312 #define ASC_TID_TO_TARGET_ID(tid) (ASC_SCSI_BIT_ID_TYPE)(0x01 << (tid))
313 #define ASC_TIX_TO_TARGET_ID(tix) (0x01 << ((tix) & ASC_MAX_TID))
314 #define ASC_TIX_TO_TID(tix) ((tix) & ASC_MAX_TID)
315 #define ASC_TID_TO_TIX(tid) ((tid) & ASC_MAX_TID)
316 #define ASC_TIX_TO_LUN(tix) (((tix) >> ASC_SCSI_ID_BITS) & ASC_MAX_LUN)
317 #define ASC_QNO_TO_QADDR(q_no) ((ASC_QADR_BEG)+((int)(q_no) << 6))
319 typedef struct asc_scsiq_1 {
328 ASC_PADDR sense_addr;
333 typedef struct asc_scsiq_2 {
342 typedef struct asc_scsiq_3 {
349 typedef struct asc_scsiq_4 {
350 uchar cdb[ASC_MAX_CDB_LEN];
351 uchar y_first_sg_list_qp;
352 uchar y_working_sg_qp;
353 uchar y_working_sg_ix;
356 ushort x_reconnect_rtn;
357 ASC_PADDR x_saved_data_addr;
358 ASC_DCNT x_saved_data_cnt;
361 typedef struct asc_q_done_info {
370 ASC_DCNT remain_bytes;
373 typedef struct asc_sg_list {
378 typedef struct asc_sg_head {
381 ushort entry_to_copy;
383 ASC_SG_LIST sg_list[0];
386 typedef struct asc_scsi_q {
390 ASC_SG_HEAD *sg_head;
391 ushort remain_sg_entry_cnt;
392 ushort next_sg_index;
395 typedef struct asc_scsi_req_q {
399 ASC_SG_HEAD *sg_head;
402 uchar cdb[ASC_MAX_CDB_LEN];
403 uchar sense[ASC_MIN_SENSE_LEN];
406 typedef struct asc_scsi_bios_req_q {
410 ASC_SG_HEAD *sg_head;
413 uchar cdb[ASC_MAX_CDB_LEN];
414 uchar sense[ASC_MIN_SENSE_LEN];
415 } ASC_SCSI_BIOS_REQ_Q;
417 typedef struct asc_risc_q {
426 typedef struct asc_sg_list_q {
432 uchar sg_cur_list_cnt;
435 typedef struct asc_risc_sg_list_q {
439 ASC_SG_LIST sg_list[7];
440 } ASC_RISC_SG_LIST_Q;
442 #define ASCQ_ERR_Q_STATUS 0x0D
443 #define ASCQ_ERR_CUR_QNG 0x17
444 #define ASCQ_ERR_SG_Q_LINKS 0x18
445 #define ASCQ_ERR_ISR_RE_ENTRY 0x1A
446 #define ASCQ_ERR_CRITICAL_RE_ENTRY 0x1B
447 #define ASCQ_ERR_ISR_ON_CRITICAL 0x1C
450 * Warning code values are set in ASC_DVC_VAR 'warn_code'.
452 #define ASC_WARN_NO_ERROR 0x0000
453 #define ASC_WARN_IO_PORT_ROTATE 0x0001
454 #define ASC_WARN_EEPROM_CHKSUM 0x0002
455 #define ASC_WARN_IRQ_MODIFIED 0x0004
456 #define ASC_WARN_AUTO_CONFIG 0x0008
457 #define ASC_WARN_CMD_QNG_CONFLICT 0x0010
458 #define ASC_WARN_EEPROM_RECOVER 0x0020
459 #define ASC_WARN_CFG_MSW_RECOVER 0x0040
462 * Error code values are set in {ASC/ADV}_DVC_VAR 'err_code'.
464 #define ASC_IERR_NO_CARRIER 0x0001 /* No more carrier memory */
465 #define ASC_IERR_MCODE_CHKSUM 0x0002 /* micro code check sum error */
466 #define ASC_IERR_SET_PC_ADDR 0x0004
467 #define ASC_IERR_START_STOP_CHIP 0x0008 /* start/stop chip failed */
468 #define ASC_IERR_ILLEGAL_CONNECTION 0x0010 /* Illegal cable connection */
469 #define ASC_IERR_SINGLE_END_DEVICE 0x0020 /* SE device on DIFF bus */
470 #define ASC_IERR_REVERSED_CABLE 0x0040 /* Narrow flat cable reversed */
471 #define ASC_IERR_SET_SCSI_ID 0x0080 /* set SCSI ID failed */
472 #define ASC_IERR_HVD_DEVICE 0x0100 /* HVD device on LVD port */
473 #define ASC_IERR_BAD_SIGNATURE 0x0200 /* signature not found */
474 #define ASC_IERR_NO_BUS_TYPE 0x0400
475 #define ASC_IERR_BIST_PRE_TEST 0x0800 /* BIST pre-test error */
476 #define ASC_IERR_BIST_RAM_TEST 0x1000 /* BIST RAM test error */
477 #define ASC_IERR_BAD_CHIPTYPE 0x2000 /* Invalid chip_type setting */
479 #define ASC_DEF_MAX_TOTAL_QNG (0xF0)
480 #define ASC_MIN_TAG_Q_PER_DVC (0x04)
481 #define ASC_MIN_FREE_Q (0x02)
482 #define ASC_MIN_TOTAL_QNG ((ASC_MAX_SG_QUEUE)+(ASC_MIN_FREE_Q))
483 #define ASC_MAX_TOTAL_QNG 240
484 #define ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG 16
485 #define ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG 8
486 #define ASC_MAX_PCI_INRAM_TOTAL_QNG 20
487 #define ASC_MAX_INRAM_TAG_QNG 16
488 #define ASC_IOADR_GAP 0x10
489 #define ASC_MAX_SYN_XFER_NO 16
490 #define ASC_SYN_MAX_OFFSET 0x0F
491 #define ASC_DEF_SDTR_OFFSET 0x0F
492 #define ASC_SDTR_ULTRA_PCI_10MB_INDEX 0x02
493 #define SYN_XFER_NS_0 25
494 #define SYN_XFER_NS_1 30
495 #define SYN_XFER_NS_2 35
496 #define SYN_XFER_NS_3 40
497 #define SYN_XFER_NS_4 50
498 #define SYN_XFER_NS_5 60
499 #define SYN_XFER_NS_6 70
500 #define SYN_XFER_NS_7 85
501 #define SYN_ULTRA_XFER_NS_0 12
502 #define SYN_ULTRA_XFER_NS_1 19
503 #define SYN_ULTRA_XFER_NS_2 25
504 #define SYN_ULTRA_XFER_NS_3 32
505 #define SYN_ULTRA_XFER_NS_4 38
506 #define SYN_ULTRA_XFER_NS_5 44
507 #define SYN_ULTRA_XFER_NS_6 50
508 #define SYN_ULTRA_XFER_NS_7 57
509 #define SYN_ULTRA_XFER_NS_8 63
510 #define SYN_ULTRA_XFER_NS_9 69
511 #define SYN_ULTRA_XFER_NS_10 75
512 #define SYN_ULTRA_XFER_NS_11 82
513 #define SYN_ULTRA_XFER_NS_12 88
514 #define SYN_ULTRA_XFER_NS_13 94
515 #define SYN_ULTRA_XFER_NS_14 100
516 #define SYN_ULTRA_XFER_NS_15 107
518 typedef struct ext_msg {
524 uchar sdtr_xfer_period;
525 uchar sdtr_req_ack_offset;
540 #define xfer_period u_ext_msg.sdtr.sdtr_xfer_period
541 #define req_ack_offset u_ext_msg.sdtr.sdtr_req_ack_offset
542 #define wdtr_width u_ext_msg.wdtr.wdtr_width
543 #define mdp_b3 u_ext_msg.mdp_b3
544 #define mdp_b2 u_ext_msg.mdp_b2
545 #define mdp_b1 u_ext_msg.mdp_b1
546 #define mdp_b0 u_ext_msg.mdp_b0
548 typedef struct asc_dvc_cfg {
549 ASC_SCSI_BIT_ID_TYPE can_tagged_qng;
550 ASC_SCSI_BIT_ID_TYPE cmd_qng_enabled;
551 ASC_SCSI_BIT_ID_TYPE disc_enable;
552 ASC_SCSI_BIT_ID_TYPE sdtr_enable;
555 uchar isa_dma_channel;
557 ushort lib_serial_no;
560 ushort mcode_version;
561 uchar max_tag_qng[ASC_MAX_TID + 1];
563 uchar sdtr_period_offset[ASC_MAX_TID + 1];
564 uchar adapter_info[6];
567 #define ASC_DEF_DVC_CNTL 0xFFFF
568 #define ASC_DEF_CHIP_SCSI_ID 7
569 #define ASC_DEF_ISA_DMA_SPEED 4
570 #define ASC_INIT_STATE_BEG_GET_CFG 0x0001
571 #define ASC_INIT_STATE_END_GET_CFG 0x0002
572 #define ASC_INIT_STATE_BEG_SET_CFG 0x0004
573 #define ASC_INIT_STATE_END_SET_CFG 0x0008
574 #define ASC_INIT_STATE_BEG_LOAD_MC 0x0010
575 #define ASC_INIT_STATE_END_LOAD_MC 0x0020
576 #define ASC_INIT_STATE_BEG_INQUIRY 0x0040
577 #define ASC_INIT_STATE_END_INQUIRY 0x0080
578 #define ASC_INIT_RESET_SCSI_DONE 0x0100
579 #define ASC_INIT_STATE_WITHOUT_EEP 0x8000
580 #define ASC_BUG_FIX_IF_NOT_DWB 0x0001
581 #define ASC_BUG_FIX_ASYN_USE_SYN 0x0002
582 #define ASYN_SDTR_DATA_FIX_PCI_REV_AB 0x41
583 #define ASC_MIN_TAGGED_CMD 7
584 #define ASC_MAX_SCSI_RESET_WAIT 30
586 struct asc_dvc_var; /* Forward Declaration. */
588 typedef struct asc_dvc_var {
594 ASC_SCSI_BIT_ID_TYPE init_sdtr;
595 ASC_SCSI_BIT_ID_TYPE sdtr_done;
596 ASC_SCSI_BIT_ID_TYPE use_tagged_qng;
597 ASC_SCSI_BIT_ID_TYPE unit_not_ready;
598 ASC_SCSI_BIT_ID_TYPE queue_full_or_busy;
599 ASC_SCSI_BIT_ID_TYPE start_motor;
600 uchar scsi_reset_wait;
605 uchar in_critical_cnt;
606 uchar last_q_shortage;
608 uchar cur_dvc_qng[ASC_MAX_TID + 1];
609 uchar max_dvc_qng[ASC_MAX_TID + 1];
610 ASC_SCSI_Q *scsiq_busy_head[ASC_MAX_TID + 1];
611 ASC_SCSI_Q *scsiq_busy_tail[ASC_MAX_TID + 1];
612 uchar sdtr_period_tbl[ASC_MAX_SYN_XFER_NO];
614 ASC_SCSI_BIT_ID_TYPE pci_fix_asyn_xfer_always;
617 uchar dos_int13_table[ASC_MAX_TID + 1];
618 ASC_DCNT max_dma_count;
619 ASC_SCSI_BIT_ID_TYPE no_scam;
620 ASC_SCSI_BIT_ID_TYPE pci_fix_asyn_xfer;
621 uchar max_sdtr_index;
622 uchar host_init_sdtr_index;
623 struct asc_board *drv_ptr;
627 typedef struct asc_dvc_inq_info {
628 uchar type[ASC_MAX_TID + 1][ASC_MAX_LUN + 1];
631 typedef struct asc_cap_info {
636 typedef struct asc_cap_info_array {
637 ASC_CAP_INFO cap_info[ASC_MAX_TID + 1][ASC_MAX_LUN + 1];
638 } ASC_CAP_INFO_ARRAY;
640 #define ASC_MCNTL_NO_SEL_TIMEOUT (ushort)0x0001
641 #define ASC_MCNTL_NULL_TARGET (ushort)0x0002
642 #define ASC_CNTL_INITIATOR (ushort)0x0001
643 #define ASC_CNTL_BIOS_GT_1GB (ushort)0x0002
644 #define ASC_CNTL_BIOS_GT_2_DISK (ushort)0x0004
645 #define ASC_CNTL_BIOS_REMOVABLE (ushort)0x0008
646 #define ASC_CNTL_NO_SCAM (ushort)0x0010
647 #define ASC_CNTL_INT_MULTI_Q (ushort)0x0080
648 #define ASC_CNTL_NO_LUN_SUPPORT (ushort)0x0040
649 #define ASC_CNTL_NO_VERIFY_COPY (ushort)0x0100
650 #define ASC_CNTL_RESET_SCSI (ushort)0x0200
651 #define ASC_CNTL_INIT_INQUIRY (ushort)0x0400
652 #define ASC_CNTL_INIT_VERBOSE (ushort)0x0800
653 #define ASC_CNTL_SCSI_PARITY (ushort)0x1000
654 #define ASC_CNTL_BURST_MODE (ushort)0x2000
655 #define ASC_CNTL_SDTR_ENABLE_ULTRA (ushort)0x4000
656 #define ASC_EEP_DVC_CFG_BEG_VL 2
657 #define ASC_EEP_MAX_DVC_ADDR_VL 15
658 #define ASC_EEP_DVC_CFG_BEG 32
659 #define ASC_EEP_MAX_DVC_ADDR 45
660 #define ASC_EEP_MAX_RETRY 20
663 * These macros keep the chip SCSI id and ISA DMA speed
664 * bitfields in board order. C bitfields aren't portable
665 * between big and little-endian platforms so they are
669 #define ASC_EEP_GET_CHIP_ID(cfg) ((cfg)->id_speed & 0x0f)
670 #define ASC_EEP_GET_DMA_SPD(cfg) (((cfg)->id_speed & 0xf0) >> 4)
671 #define ASC_EEP_SET_CHIP_ID(cfg, sid) \
672 ((cfg)->id_speed = ((cfg)->id_speed & 0xf0) | ((sid) & ASC_MAX_TID))
673 #define ASC_EEP_SET_DMA_SPD(cfg, spd) \
674 ((cfg)->id_speed = ((cfg)->id_speed & 0x0f) | ((spd) & 0x0f) << 4)
676 typedef struct asceep_config {
688 uchar id_speed; /* low order 4 bits is chip scsi id */
689 /* high order 4 bits is isa dma speed */
690 uchar dos_int13_table[ASC_MAX_TID + 1];
691 uchar adapter_info[6];
696 #define ASC_EEP_CMD_READ 0x80
697 #define ASC_EEP_CMD_WRITE 0x40
698 #define ASC_EEP_CMD_WRITE_ABLE 0x30
699 #define ASC_EEP_CMD_WRITE_DISABLE 0x00
700 #define ASC_OVERRUN_BSIZE 0x00000048UL
701 #define ASCV_MSGOUT_BEG 0x0000
702 #define ASCV_MSGOUT_SDTR_PERIOD (ASCV_MSGOUT_BEG+3)
703 #define ASCV_MSGOUT_SDTR_OFFSET (ASCV_MSGOUT_BEG+4)
704 #define ASCV_BREAK_SAVED_CODE (ushort)0x0006
705 #define ASCV_MSGIN_BEG (ASCV_MSGOUT_BEG+8)
706 #define ASCV_MSGIN_SDTR_PERIOD (ASCV_MSGIN_BEG+3)
707 #define ASCV_MSGIN_SDTR_OFFSET (ASCV_MSGIN_BEG+4)
708 #define ASCV_SDTR_DATA_BEG (ASCV_MSGIN_BEG+8)
709 #define ASCV_SDTR_DONE_BEG (ASCV_SDTR_DATA_BEG+8)
710 #define ASCV_MAX_DVC_QNG_BEG (ushort)0x0020
711 #define ASCV_BREAK_ADDR (ushort)0x0028
712 #define ASCV_BREAK_NOTIFY_COUNT (ushort)0x002A
713 #define ASCV_BREAK_CONTROL (ushort)0x002C
714 #define ASCV_BREAK_HIT_COUNT (ushort)0x002E
716 #define ASCV_ASCDVC_ERR_CODE_W (ushort)0x0030
717 #define ASCV_MCODE_CHKSUM_W (ushort)0x0032
718 #define ASCV_MCODE_SIZE_W (ushort)0x0034
719 #define ASCV_STOP_CODE_B (ushort)0x0036
720 #define ASCV_DVC_ERR_CODE_B (ushort)0x0037
721 #define ASCV_OVERRUN_PADDR_D (ushort)0x0038
722 #define ASCV_OVERRUN_BSIZE_D (ushort)0x003C
723 #define ASCV_HALTCODE_W (ushort)0x0040
724 #define ASCV_CHKSUM_W (ushort)0x0042
725 #define ASCV_MC_DATE_W (ushort)0x0044
726 #define ASCV_MC_VER_W (ushort)0x0046
727 #define ASCV_NEXTRDY_B (ushort)0x0048
728 #define ASCV_DONENEXT_B (ushort)0x0049
729 #define ASCV_USE_TAGGED_QNG_B (ushort)0x004A
730 #define ASCV_SCSIBUSY_B (ushort)0x004B
731 #define ASCV_Q_DONE_IN_PROGRESS_B (ushort)0x004C
732 #define ASCV_CURCDB_B (ushort)0x004D
733 #define ASCV_RCLUN_B (ushort)0x004E
734 #define ASCV_BUSY_QHEAD_B (ushort)0x004F
735 #define ASCV_DISC1_QHEAD_B (ushort)0x0050
736 #define ASCV_DISC_ENABLE_B (ushort)0x0052
737 #define ASCV_CAN_TAGGED_QNG_B (ushort)0x0053
738 #define ASCV_HOSTSCSI_ID_B (ushort)0x0055
739 #define ASCV_MCODE_CNTL_B (ushort)0x0056
740 #define ASCV_NULL_TARGET_B (ushort)0x0057
741 #define ASCV_FREE_Q_HEAD_W (ushort)0x0058
742 #define ASCV_DONE_Q_TAIL_W (ushort)0x005A
743 #define ASCV_FREE_Q_HEAD_B (ushort)(ASCV_FREE_Q_HEAD_W+1)
744 #define ASCV_DONE_Q_TAIL_B (ushort)(ASCV_DONE_Q_TAIL_W+1)
745 #define ASCV_HOST_FLAG_B (ushort)0x005D
746 #define ASCV_TOTAL_READY_Q_B (ushort)0x0064
747 #define ASCV_VER_SERIAL_B (ushort)0x0065
748 #define ASCV_HALTCODE_SAVED_W (ushort)0x0066
749 #define ASCV_WTM_FLAG_B (ushort)0x0068
750 #define ASCV_RISC_FLAG_B (ushort)0x006A
751 #define ASCV_REQ_SG_LIST_QP (ushort)0x006B
752 #define ASC_HOST_FLAG_IN_ISR 0x01
753 #define ASC_HOST_FLAG_ACK_INT 0x02
754 #define ASC_RISC_FLAG_GEN_INT 0x01
755 #define ASC_RISC_FLAG_REQ_SG_LIST 0x02
756 #define IOP_CTRL (0x0F)
757 #define IOP_STATUS (0x0E)
758 #define IOP_INT_ACK IOP_STATUS
759 #define IOP_REG_IFC (0x0D)
760 #define IOP_SYN_OFFSET (0x0B)
761 #define IOP_EXTRA_CONTROL (0x0D)
762 #define IOP_REG_PC (0x0C)
763 #define IOP_RAM_ADDR (0x0A)
764 #define IOP_RAM_DATA (0x08)
765 #define IOP_EEP_DATA (0x06)
766 #define IOP_EEP_CMD (0x07)
767 #define IOP_VERSION (0x03)
768 #define IOP_CONFIG_HIGH (0x04)
769 #define IOP_CONFIG_LOW (0x02)
770 #define IOP_SIG_BYTE (0x01)
771 #define IOP_SIG_WORD (0x00)
772 #define IOP_REG_DC1 (0x0E)
773 #define IOP_REG_DC0 (0x0C)
774 #define IOP_REG_SB (0x0B)
775 #define IOP_REG_DA1 (0x0A)
776 #define IOP_REG_DA0 (0x08)
777 #define IOP_REG_SC (0x09)
778 #define IOP_DMA_SPEED (0x07)
779 #define IOP_REG_FLAG (0x07)
780 #define IOP_FIFO_H (0x06)
781 #define IOP_FIFO_L (0x04)
782 #define IOP_REG_ID (0x05)
783 #define IOP_REG_QP (0x03)
784 #define IOP_REG_IH (0x02)
785 #define IOP_REG_IX (0x01)
786 #define IOP_REG_AX (0x00)
787 #define IFC_REG_LOCK (0x00)
788 #define IFC_REG_UNLOCK (0x09)
789 #define IFC_WR_EN_FILTER (0x10)
790 #define IFC_RD_NO_EEPROM (0x10)
791 #define IFC_SLEW_RATE (0x20)
792 #define IFC_ACT_NEG (0x40)
793 #define IFC_INP_FILTER (0x80)
794 #define IFC_INIT_DEFAULT (IFC_ACT_NEG | IFC_REG_UNLOCK)
795 #define SC_SEL (uchar)(0x80)
796 #define SC_BSY (uchar)(0x40)
797 #define SC_ACK (uchar)(0x20)
798 #define SC_REQ (uchar)(0x10)
799 #define SC_ATN (uchar)(0x08)
800 #define SC_IO (uchar)(0x04)
801 #define SC_CD (uchar)(0x02)
802 #define SC_MSG (uchar)(0x01)
803 #define SEC_SCSI_CTL (uchar)(0x80)
804 #define SEC_ACTIVE_NEGATE (uchar)(0x40)
805 #define SEC_SLEW_RATE (uchar)(0x20)
806 #define SEC_ENABLE_FILTER (uchar)(0x10)
807 #define ASC_HALT_EXTMSG_IN (ushort)0x8000
808 #define ASC_HALT_CHK_CONDITION (ushort)0x8100
809 #define ASC_HALT_SS_QUEUE_FULL (ushort)0x8200
810 #define ASC_HALT_DISABLE_ASYN_USE_SYN_FIX (ushort)0x8300
811 #define ASC_HALT_ENABLE_ASYN_USE_SYN_FIX (ushort)0x8400
812 #define ASC_HALT_SDTR_REJECTED (ushort)0x4000
813 #define ASC_HALT_HOST_COPY_SG_LIST_TO_RISC ( ushort )0x2000
814 #define ASC_MAX_QNO 0xF8
815 #define ASC_DATA_SEC_BEG (ushort)0x0080
816 #define ASC_DATA_SEC_END (ushort)0x0080
817 #define ASC_CODE_SEC_BEG (ushort)0x0080
818 #define ASC_CODE_SEC_END (ushort)0x0080
819 #define ASC_QADR_BEG (0x4000)
820 #define ASC_QADR_USED (ushort)(ASC_MAX_QNO * 64)
821 #define ASC_QADR_END (ushort)0x7FFF
822 #define ASC_QLAST_ADR (ushort)0x7FC0
823 #define ASC_QBLK_SIZE 0x40
824 #define ASC_BIOS_DATA_QBEG 0xF8
825 #define ASC_MIN_ACTIVE_QNO 0x01
826 #define ASC_QLINK_END 0xFF
827 #define ASC_EEPROM_WORDS 0x10
828 #define ASC_MAX_MGS_LEN 0x10
829 #define ASC_BIOS_ADDR_DEF 0xDC00
830 #define ASC_BIOS_SIZE 0x3800
831 #define ASC_BIOS_RAM_OFF 0x3800
832 #define ASC_BIOS_RAM_SIZE 0x800
833 #define ASC_BIOS_MIN_ADDR 0xC000
834 #define ASC_BIOS_MAX_ADDR 0xEC00
835 #define ASC_BIOS_BANK_SIZE 0x0400
836 #define ASC_MCODE_START_ADDR 0x0080
837 #define ASC_CFG0_HOST_INT_ON 0x0020
838 #define ASC_CFG0_BIOS_ON 0x0040
839 #define ASC_CFG0_VERA_BURST_ON 0x0080
840 #define ASC_CFG0_SCSI_PARITY_ON 0x0800
841 #define ASC_CFG1_SCSI_TARGET_ON 0x0080
842 #define ASC_CFG1_LRAM_8BITS_ON 0x0800
843 #define ASC_CFG_MSW_CLR_MASK 0x3080
844 #define CSW_TEST1 (ASC_CS_TYPE)0x8000
845 #define CSW_AUTO_CONFIG (ASC_CS_TYPE)0x4000
846 #define CSW_RESERVED1 (ASC_CS_TYPE)0x2000
847 #define CSW_IRQ_WRITTEN (ASC_CS_TYPE)0x1000
848 #define CSW_33MHZ_SELECTED (ASC_CS_TYPE)0x0800
849 #define CSW_TEST2 (ASC_CS_TYPE)0x0400
850 #define CSW_TEST3 (ASC_CS_TYPE)0x0200
851 #define CSW_RESERVED2 (ASC_CS_TYPE)0x0100
852 #define CSW_DMA_DONE (ASC_CS_TYPE)0x0080
853 #define CSW_FIFO_RDY (ASC_CS_TYPE)0x0040
854 #define CSW_EEP_READ_DONE (ASC_CS_TYPE)0x0020
855 #define CSW_HALTED (ASC_CS_TYPE)0x0010
856 #define CSW_SCSI_RESET_ACTIVE (ASC_CS_TYPE)0x0008
857 #define CSW_PARITY_ERR (ASC_CS_TYPE)0x0004
858 #define CSW_SCSI_RESET_LATCH (ASC_CS_TYPE)0x0002
859 #define CSW_INT_PENDING (ASC_CS_TYPE)0x0001
860 #define CIW_CLR_SCSI_RESET_INT (ASC_CS_TYPE)0x1000
861 #define CIW_INT_ACK (ASC_CS_TYPE)0x0100
862 #define CIW_TEST1 (ASC_CS_TYPE)0x0200
863 #define CIW_TEST2 (ASC_CS_TYPE)0x0400
864 #define CIW_SEL_33MHZ (ASC_CS_TYPE)0x0800
865 #define CIW_IRQ_ACT (ASC_CS_TYPE)0x1000
866 #define CC_CHIP_RESET (uchar)0x80
867 #define CC_SCSI_RESET (uchar)0x40
868 #define CC_HALT (uchar)0x20
869 #define CC_SINGLE_STEP (uchar)0x10
870 #define CC_DMA_ABLE (uchar)0x08
871 #define CC_TEST (uchar)0x04
872 #define CC_BANK_ONE (uchar)0x02
873 #define CC_DIAG (uchar)0x01
874 #define ASC_1000_ID0W 0x04C1
875 #define ASC_1000_ID0W_FIX 0x00C1
876 #define ASC_1000_ID1B 0x25
877 #define ASC_EISA_REV_IOP_MASK (0x0C83)
878 #define ASC_EISA_CFG_IOP_MASK (0x0C86)
879 #define ASC_GET_EISA_SLOT(iop) (PortAddr)((iop) & 0xF000)
880 #define INS_HALTINT (ushort)0x6281
881 #define INS_HALT (ushort)0x6280
882 #define INS_SINT (ushort)0x6200
883 #define INS_RFLAG_WTM (ushort)0x7380
884 #define ASC_MC_SAVE_CODE_WSIZE 0x500
885 #define ASC_MC_SAVE_DATA_WSIZE 0x40
887 typedef struct asc_mc_saved {
888 ushort data[ASC_MC_SAVE_DATA_WSIZE];
889 ushort code[ASC_MC_SAVE_CODE_WSIZE];
892 #define AscGetQDoneInProgress(port) AscReadLramByte((port), ASCV_Q_DONE_IN_PROGRESS_B)
893 #define AscPutQDoneInProgress(port, val) AscWriteLramByte((port), ASCV_Q_DONE_IN_PROGRESS_B, val)
894 #define AscGetVarFreeQHead(port) AscReadLramWord((port), ASCV_FREE_Q_HEAD_W)
895 #define AscGetVarDoneQTail(port) AscReadLramWord((port), ASCV_DONE_Q_TAIL_W)
896 #define AscPutVarFreeQHead(port, val) AscWriteLramWord((port), ASCV_FREE_Q_HEAD_W, val)
897 #define AscPutVarDoneQTail(port, val) AscWriteLramWord((port), ASCV_DONE_Q_TAIL_W, val)
898 #define AscGetRiscVarFreeQHead(port) AscReadLramByte((port), ASCV_NEXTRDY_B)
899 #define AscGetRiscVarDoneQTail(port) AscReadLramByte((port), ASCV_DONENEXT_B)
900 #define AscPutRiscVarFreeQHead(port, val) AscWriteLramByte((port), ASCV_NEXTRDY_B, val)
901 #define AscPutRiscVarDoneQTail(port, val) AscWriteLramByte((port), ASCV_DONENEXT_B, val)
902 #define AscPutMCodeSDTRDoneAtID(port, id, data) AscWriteLramByte((port), (ushort)((ushort)ASCV_SDTR_DONE_BEG+(ushort)id), (data))
903 #define AscGetMCodeSDTRDoneAtID(port, id) AscReadLramByte((port), (ushort)((ushort)ASCV_SDTR_DONE_BEG+(ushort)id))
904 #define AscPutMCodeInitSDTRAtID(port, id, data) AscWriteLramByte((port), (ushort)((ushort)ASCV_SDTR_DATA_BEG+(ushort)id), data)
905 #define AscGetMCodeInitSDTRAtID(port, id) AscReadLramByte((port), (ushort)((ushort)ASCV_SDTR_DATA_BEG+(ushort)id))
906 #define AscSynIndexToPeriod(index) (uchar)(asc_dvc->sdtr_period_tbl[ (index) ])
907 #define AscGetChipSignatureByte(port) (uchar)inp((port)+IOP_SIG_BYTE)
908 #define AscGetChipSignatureWord(port) (ushort)inpw((port)+IOP_SIG_WORD)
909 #define AscGetChipVerNo(port) (uchar)inp((port)+IOP_VERSION)
910 #define AscGetChipCfgLsw(port) (ushort)inpw((port)+IOP_CONFIG_LOW)
911 #define AscGetChipCfgMsw(port) (ushort)inpw((port)+IOP_CONFIG_HIGH)
912 #define AscSetChipCfgLsw(port, data) outpw((port)+IOP_CONFIG_LOW, data)
913 #define AscSetChipCfgMsw(port, data) outpw((port)+IOP_CONFIG_HIGH, data)
914 #define AscGetChipEEPCmd(port) (uchar)inp((port)+IOP_EEP_CMD)
915 #define AscSetChipEEPCmd(port, data) outp((port)+IOP_EEP_CMD, data)
916 #define AscGetChipEEPData(port) (ushort)inpw((port)+IOP_EEP_DATA)
917 #define AscSetChipEEPData(port, data) outpw((port)+IOP_EEP_DATA, data)
918 #define AscGetChipLramAddr(port) (ushort)inpw((PortAddr)((port)+IOP_RAM_ADDR))
919 #define AscSetChipLramAddr(port, addr) outpw((PortAddr)((port)+IOP_RAM_ADDR), addr)
920 #define AscGetChipLramData(port) (ushort)inpw((port)+IOP_RAM_DATA)
921 #define AscSetChipLramData(port, data) outpw((port)+IOP_RAM_DATA, data)
922 #define AscGetChipIFC(port) (uchar)inp((port)+IOP_REG_IFC)
923 #define AscSetChipIFC(port, data) outp((port)+IOP_REG_IFC, data)
924 #define AscGetChipStatus(port) (ASC_CS_TYPE)inpw((port)+IOP_STATUS)
925 #define AscSetChipStatus(port, cs_val) outpw((port)+IOP_STATUS, cs_val)
926 #define AscGetChipControl(port) (uchar)inp((port)+IOP_CTRL)
927 #define AscSetChipControl(port, cc_val) outp((port)+IOP_CTRL, cc_val)
928 #define AscGetChipSyn(port) (uchar)inp((port)+IOP_SYN_OFFSET)
929 #define AscSetChipSyn(port, data) outp((port)+IOP_SYN_OFFSET, data)
930 #define AscSetPCAddr(port, data) outpw((port)+IOP_REG_PC, data)
931 #define AscGetPCAddr(port) (ushort)inpw((port)+IOP_REG_PC)
932 #define AscIsIntPending(port) (AscGetChipStatus(port) & (CSW_INT_PENDING | CSW_SCSI_RESET_LATCH))
933 #define AscGetChipScsiID(port) ((AscGetChipCfgLsw(port) >> 8) & ASC_MAX_TID)
934 #define AscGetExtraControl(port) (uchar)inp((port)+IOP_EXTRA_CONTROL)
935 #define AscSetExtraControl(port, data) outp((port)+IOP_EXTRA_CONTROL, data)
936 #define AscReadChipAX(port) (ushort)inpw((port)+IOP_REG_AX)
937 #define AscWriteChipAX(port, data) outpw((port)+IOP_REG_AX, data)
938 #define AscReadChipIX(port) (uchar)inp((port)+IOP_REG_IX)
939 #define AscWriteChipIX(port, data) outp((port)+IOP_REG_IX, data)
940 #define AscReadChipIH(port) (ushort)inpw((port)+IOP_REG_IH)
941 #define AscWriteChipIH(port, data) outpw((port)+IOP_REG_IH, data)
942 #define AscReadChipQP(port) (uchar)inp((port)+IOP_REG_QP)
943 #define AscWriteChipQP(port, data) outp((port)+IOP_REG_QP, data)
944 #define AscReadChipFIFO_L(port) (ushort)inpw((port)+IOP_REG_FIFO_L)
945 #define AscWriteChipFIFO_L(port, data) outpw((port)+IOP_REG_FIFO_L, data)
946 #define AscReadChipFIFO_H(port) (ushort)inpw((port)+IOP_REG_FIFO_H)
947 #define AscWriteChipFIFO_H(port, data) outpw((port)+IOP_REG_FIFO_H, data)
948 #define AscReadChipDmaSpeed(port) (uchar)inp((port)+IOP_DMA_SPEED)
949 #define AscWriteChipDmaSpeed(port, data) outp((port)+IOP_DMA_SPEED, data)
950 #define AscReadChipDA0(port) (ushort)inpw((port)+IOP_REG_DA0)
951 #define AscWriteChipDA0(port) outpw((port)+IOP_REG_DA0, data)
952 #define AscReadChipDA1(port) (ushort)inpw((port)+IOP_REG_DA1)
953 #define AscWriteChipDA1(port) outpw((port)+IOP_REG_DA1, data)
954 #define AscReadChipDC0(port) (ushort)inpw((port)+IOP_REG_DC0)
955 #define AscWriteChipDC0(port) outpw((port)+IOP_REG_DC0, data)
956 #define AscReadChipDC1(port) (ushort)inpw((port)+IOP_REG_DC1)
957 #define AscWriteChipDC1(port) outpw((port)+IOP_REG_DC1, data)
958 #define AscReadChipDvcID(port) (uchar)inp((port)+IOP_REG_ID)
959 #define AscWriteChipDvcID(port, data) outp((port)+IOP_REG_ID, data)
961 #define ADV_LIB_VERSION_MAJOR 5
962 #define ADV_LIB_VERSION_MINOR 14
965 * Define Adv Library required special types.
969 * Portable Data Types
971 * Any instance where a 32-bit long or pointer type is assumed
972 * for precision or HW defined structures, the following define
973 * types must be used. In Linux the char, short, and int types
974 * are all consistent at 8, 16, and 32 bits respectively. Pointers
975 * and long types are 64 bits on Alpha and UltraSPARC.
977 #define ADV_PADDR __u32 /* Physical address data type. */
978 #define ADV_VADDR __u32 /* Virtual address data type. */
979 #define ADV_DCNT __u32 /* Unsigned Data count type. */
980 #define ADV_SDCNT __s32 /* Signed Data count type. */
983 * These macros are used to convert a virtual address to a
984 * 32-bit value. This currently can be used on Linux Alpha
985 * which uses 64-bit virtual address but a 32-bit bus address.
986 * This is likely to break in the future, but doing this now
987 * will give us time to change the HW and FW to handle 64-bit
990 #define ADV_VADDR_TO_U32 virt_to_bus
991 #define ADV_U32_TO_VADDR bus_to_virt
993 #define AdvPortAddr void __iomem * /* Virtual memory address size */
996 * Define Adv Library required memory access macros.
998 #define ADV_MEM_READB(addr) readb(addr)
999 #define ADV_MEM_READW(addr) readw(addr)
1000 #define ADV_MEM_WRITEB(addr, byte) writeb(byte, addr)
1001 #define ADV_MEM_WRITEW(addr, word) writew(word, addr)
1002 #define ADV_MEM_WRITEDW(addr, dword) writel(dword, addr)
1004 #define ADV_CARRIER_COUNT (ASC_DEF_MAX_HOST_QNG + 15)
1007 * Define total number of simultaneous maximum element scatter-gather
1008 * request blocks per wide adapter. ASC_DEF_MAX_HOST_QNG (253) is the
1009 * maximum number of outstanding commands per wide host adapter. Each
1010 * command uses one or more ADV_SG_BLOCK each with 15 scatter-gather
1011 * elements. Allow each command to have at least one ADV_SG_BLOCK structure.
1012 * This allows about 15 commands to have the maximum 17 ADV_SG_BLOCK
1013 * structures or 255 scatter-gather elements.
1016 #define ADV_TOT_SG_BLOCK ASC_DEF_MAX_HOST_QNG
1019 * Define Adv Library required maximum number of scatter-gather
1020 * elements per request.
1022 #define ADV_MAX_SG_LIST 255
1024 /* Number of SG blocks needed. */
1025 #define ADV_NUM_SG_BLOCK \
1026 ((ADV_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK)
1028 /* Total contiguous memory needed for SG blocks. */
1029 #define ADV_SG_TOTAL_MEM_SIZE \
1030 (sizeof(ADV_SG_BLOCK) * ADV_NUM_SG_BLOCK)
1032 #define ADV_PAGE_SIZE PAGE_SIZE
1034 #define ADV_NUM_PAGE_CROSSING \
1035 ((ADV_SG_TOTAL_MEM_SIZE + (ADV_PAGE_SIZE - 1))/ADV_PAGE_SIZE)
1037 #define ADV_EEP_DVC_CFG_BEGIN (0x00)
1038 #define ADV_EEP_DVC_CFG_END (0x15)
1039 #define ADV_EEP_DVC_CTL_BEGIN (0x16) /* location of OEM name */
1040 #define ADV_EEP_MAX_WORD_ADDR (0x1E)
1042 #define ADV_EEP_DELAY_MS 100
1044 #define ADV_EEPROM_BIG_ENDIAN 0x8000 /* EEPROM Bit 15 */
1045 #define ADV_EEPROM_BIOS_ENABLE 0x4000 /* EEPROM Bit 14 */
1047 * For the ASC3550 Bit 13 is Termination Polarity control bit.
1048 * For later ICs Bit 13 controls whether the CIS (Card Information
1049 * Service Section) is loaded from EEPROM.
1051 #define ADV_EEPROM_TERM_POL 0x2000 /* EEPROM Bit 13 */
1052 #define ADV_EEPROM_CIS_LD 0x2000 /* EEPROM Bit 13 */
1056 * If EEPROM Bit 11 is 0 for Function 0, then Function 0 will specify
1057 * INT A in the PCI Configuration Space Int Pin field. If it is 1, then
1058 * Function 0 will specify INT B.
1060 * If EEPROM Bit 11 is 0 for Function 1, then Function 1 will specify
1061 * INT B in the PCI Configuration Space Int Pin field. If it is 1, then
1062 * Function 1 will specify INT A.
1064 #define ADV_EEPROM_INTAB 0x0800 /* EEPROM Bit 11 */
1066 typedef struct adveep_3550_config {
1067 /* Word Offset, Description */
1069 ushort cfg_lsw; /* 00 power up initialization */
1070 /* bit 13 set - Term Polarity Control */
1071 /* bit 14 set - BIOS Enable */
1072 /* bit 15 set - Big Endian Mode */
1073 ushort cfg_msw; /* 01 unused */
1074 ushort disc_enable; /* 02 disconnect enable */
1075 ushort wdtr_able; /* 03 Wide DTR able */
1076 ushort sdtr_able; /* 04 Synchronous DTR able */
1077 ushort start_motor; /* 05 send start up motor */
1078 ushort tagqng_able; /* 06 tag queuing able */
1079 ushort bios_scan; /* 07 BIOS device control */
1080 ushort scam_tolerant; /* 08 no scam */
1082 uchar adapter_scsi_id; /* 09 Host Adapter ID */
1083 uchar bios_boot_delay; /* power up wait */
1085 uchar scsi_reset_delay; /* 10 reset delay */
1086 uchar bios_id_lun; /* first boot device scsi id & lun */
1087 /* high nibble is lun */
1088 /* low nibble is scsi id */
1090 uchar termination; /* 11 0 - automatic */
1091 /* 1 - low off / high off */
1092 /* 2 - low off / high on */
1093 /* 3 - low on / high on */
1094 /* There is no low on / high off */
1096 uchar reserved1; /* reserved byte (not used) */
1098 ushort bios_ctrl; /* 12 BIOS control bits */
1099 /* bit 0 BIOS don't act as initiator. */
1100 /* bit 1 BIOS > 1 GB support */
1101 /* bit 2 BIOS > 2 Disk Support */
1102 /* bit 3 BIOS don't support removables */
1103 /* bit 4 BIOS support bootable CD */
1104 /* bit 5 BIOS scan enabled */
1105 /* bit 6 BIOS support multiple LUNs */
1106 /* bit 7 BIOS display of message */
1107 /* bit 8 SCAM disabled */
1108 /* bit 9 Reset SCSI bus during init. */
1110 /* bit 11 No verbose initialization. */
1111 /* bit 12 SCSI parity enabled */
1115 ushort ultra_able; /* 13 ULTRA speed able */
1116 ushort reserved2; /* 14 reserved */
1117 uchar max_host_qng; /* 15 maximum host queuing */
1118 uchar max_dvc_qng; /* maximum per device queuing */
1119 ushort dvc_cntl; /* 16 control bit for driver */
1120 ushort bug_fix; /* 17 control bit for bug fix */
1121 ushort serial_number_word1; /* 18 Board serial number word 1 */
1122 ushort serial_number_word2; /* 19 Board serial number word 2 */
1123 ushort serial_number_word3; /* 20 Board serial number word 3 */
1124 ushort check_sum; /* 21 EEP check sum */
1125 uchar oem_name[16]; /* 22 OEM name */
1126 ushort dvc_err_code; /* 30 last device driver error code */
1127 ushort adv_err_code; /* 31 last uc and Adv Lib error code */
1128 ushort adv_err_addr; /* 32 last uc error address */
1129 ushort saved_dvc_err_code; /* 33 saved last dev. driver error code */
1130 ushort saved_adv_err_code; /* 34 saved last uc and Adv Lib error code */
1131 ushort saved_adv_err_addr; /* 35 saved last uc error address */
1132 ushort num_of_err; /* 36 number of error */
1133 } ADVEEP_3550_CONFIG;
1135 typedef struct adveep_38C0800_config {
1136 /* Word Offset, Description */
1138 ushort cfg_lsw; /* 00 power up initialization */
1139 /* bit 13 set - Load CIS */
1140 /* bit 14 set - BIOS Enable */
1141 /* bit 15 set - Big Endian Mode */
1142 ushort cfg_msw; /* 01 unused */
1143 ushort disc_enable; /* 02 disconnect enable */
1144 ushort wdtr_able; /* 03 Wide DTR able */
1145 ushort sdtr_speed1; /* 04 SDTR Speed TID 0-3 */
1146 ushort start_motor; /* 05 send start up motor */
1147 ushort tagqng_able; /* 06 tag queuing able */
1148 ushort bios_scan; /* 07 BIOS device control */
1149 ushort scam_tolerant; /* 08 no scam */
1151 uchar adapter_scsi_id; /* 09 Host Adapter ID */
1152 uchar bios_boot_delay; /* power up wait */
1154 uchar scsi_reset_delay; /* 10 reset delay */
1155 uchar bios_id_lun; /* first boot device scsi id & lun */
1156 /* high nibble is lun */
1157 /* low nibble is scsi id */
1159 uchar termination_se; /* 11 0 - automatic */
1160 /* 1 - low off / high off */
1161 /* 2 - low off / high on */
1162 /* 3 - low on / high on */
1163 /* There is no low on / high off */
1165 uchar termination_lvd; /* 11 0 - automatic */
1166 /* 1 - low off / high off */
1167 /* 2 - low off / high on */
1168 /* 3 - low on / high on */
1169 /* There is no low on / high off */
1171 ushort bios_ctrl; /* 12 BIOS control bits */
1172 /* bit 0 BIOS don't act as initiator. */
1173 /* bit 1 BIOS > 1 GB support */
1174 /* bit 2 BIOS > 2 Disk Support */
1175 /* bit 3 BIOS don't support removables */
1176 /* bit 4 BIOS support bootable CD */
1177 /* bit 5 BIOS scan enabled */
1178 /* bit 6 BIOS support multiple LUNs */
1179 /* bit 7 BIOS display of message */
1180 /* bit 8 SCAM disabled */
1181 /* bit 9 Reset SCSI bus during init. */
1183 /* bit 11 No verbose initialization. */
1184 /* bit 12 SCSI parity enabled */
1188 ushort sdtr_speed2; /* 13 SDTR speed TID 4-7 */
1189 ushort sdtr_speed3; /* 14 SDTR speed TID 8-11 */
1190 uchar max_host_qng; /* 15 maximum host queueing */
1191 uchar max_dvc_qng; /* maximum per device queuing */
1192 ushort dvc_cntl; /* 16 control bit for driver */
1193 ushort sdtr_speed4; /* 17 SDTR speed 4 TID 12-15 */
1194 ushort serial_number_word1; /* 18 Board serial number word 1 */
1195 ushort serial_number_word2; /* 19 Board serial number word 2 */
1196 ushort serial_number_word3; /* 20 Board serial number word 3 */
1197 ushort check_sum; /* 21 EEP check sum */
1198 uchar oem_name[16]; /* 22 OEM name */
1199 ushort dvc_err_code; /* 30 last device driver error code */
1200 ushort adv_err_code; /* 31 last uc and Adv Lib error code */
1201 ushort adv_err_addr; /* 32 last uc error address */
1202 ushort saved_dvc_err_code; /* 33 saved last dev. driver error code */
1203 ushort saved_adv_err_code; /* 34 saved last uc and Adv Lib error code */
1204 ushort saved_adv_err_addr; /* 35 saved last uc error address */
1205 ushort reserved36; /* 36 reserved */
1206 ushort reserved37; /* 37 reserved */
1207 ushort reserved38; /* 38 reserved */
1208 ushort reserved39; /* 39 reserved */
1209 ushort reserved40; /* 40 reserved */
1210 ushort reserved41; /* 41 reserved */
1211 ushort reserved42; /* 42 reserved */
1212 ushort reserved43; /* 43 reserved */
1213 ushort reserved44; /* 44 reserved */
1214 ushort reserved45; /* 45 reserved */
1215 ushort reserved46; /* 46 reserved */
1216 ushort reserved47; /* 47 reserved */
1217 ushort reserved48; /* 48 reserved */
1218 ushort reserved49; /* 49 reserved */
1219 ushort reserved50; /* 50 reserved */
1220 ushort reserved51; /* 51 reserved */
1221 ushort reserved52; /* 52 reserved */
1222 ushort reserved53; /* 53 reserved */
1223 ushort reserved54; /* 54 reserved */
1224 ushort reserved55; /* 55 reserved */
1225 ushort cisptr_lsw; /* 56 CIS PTR LSW */
1226 ushort cisprt_msw; /* 57 CIS PTR MSW */
1227 ushort subsysvid; /* 58 SubSystem Vendor ID */
1228 ushort subsysid; /* 59 SubSystem ID */
1229 ushort reserved60; /* 60 reserved */
1230 ushort reserved61; /* 61 reserved */
1231 ushort reserved62; /* 62 reserved */
1232 ushort reserved63; /* 63 reserved */
1233 } ADVEEP_38C0800_CONFIG;
1235 typedef struct adveep_38C1600_config {
1236 /* Word Offset, Description */
1238 ushort cfg_lsw; /* 00 power up initialization */
1239 /* bit 11 set - Func. 0 INTB, Func. 1 INTA */
1240 /* clear - Func. 0 INTA, Func. 1 INTB */
1241 /* bit 13 set - Load CIS */
1242 /* bit 14 set - BIOS Enable */
1243 /* bit 15 set - Big Endian Mode */
1244 ushort cfg_msw; /* 01 unused */
1245 ushort disc_enable; /* 02 disconnect enable */
1246 ushort wdtr_able; /* 03 Wide DTR able */
1247 ushort sdtr_speed1; /* 04 SDTR Speed TID 0-3 */
1248 ushort start_motor; /* 05 send start up motor */
1249 ushort tagqng_able; /* 06 tag queuing able */
1250 ushort bios_scan; /* 07 BIOS device control */
1251 ushort scam_tolerant; /* 08 no scam */
1253 uchar adapter_scsi_id; /* 09 Host Adapter ID */
1254 uchar bios_boot_delay; /* power up wait */
1256 uchar scsi_reset_delay; /* 10 reset delay */
1257 uchar bios_id_lun; /* first boot device scsi id & lun */
1258 /* high nibble is lun */
1259 /* low nibble is scsi id */
1261 uchar termination_se; /* 11 0 - automatic */
1262 /* 1 - low off / high off */
1263 /* 2 - low off / high on */
1264 /* 3 - low on / high on */
1265 /* There is no low on / high off */
1267 uchar termination_lvd; /* 11 0 - automatic */
1268 /* 1 - low off / high off */
1269 /* 2 - low off / high on */
1270 /* 3 - low on / high on */
1271 /* There is no low on / high off */
1273 ushort bios_ctrl; /* 12 BIOS control bits */
1274 /* bit 0 BIOS don't act as initiator. */
1275 /* bit 1 BIOS > 1 GB support */
1276 /* bit 2 BIOS > 2 Disk Support */
1277 /* bit 3 BIOS don't support removables */
1278 /* bit 4 BIOS support bootable CD */
1279 /* bit 5 BIOS scan enabled */
1280 /* bit 6 BIOS support multiple LUNs */
1281 /* bit 7 BIOS display of message */
1282 /* bit 8 SCAM disabled */
1283 /* bit 9 Reset SCSI bus during init. */
1284 /* bit 10 Basic Integrity Checking disabled */
1285 /* bit 11 No verbose initialization. */
1286 /* bit 12 SCSI parity enabled */
1287 /* bit 13 AIPP (Asyn. Info. Ph. Prot.) dis. */
1290 ushort sdtr_speed2; /* 13 SDTR speed TID 4-7 */
1291 ushort sdtr_speed3; /* 14 SDTR speed TID 8-11 */
1292 uchar max_host_qng; /* 15 maximum host queueing */
1293 uchar max_dvc_qng; /* maximum per device queuing */
1294 ushort dvc_cntl; /* 16 control bit for driver */
1295 ushort sdtr_speed4; /* 17 SDTR speed 4 TID 12-15 */
1296 ushort serial_number_word1; /* 18 Board serial number word 1 */
1297 ushort serial_number_word2; /* 19 Board serial number word 2 */
1298 ushort serial_number_word3; /* 20 Board serial number word 3 */
1299 ushort check_sum; /* 21 EEP check sum */
1300 uchar oem_name[16]; /* 22 OEM name */
1301 ushort dvc_err_code; /* 30 last device driver error code */
1302 ushort adv_err_code; /* 31 last uc and Adv Lib error code */
1303 ushort adv_err_addr; /* 32 last uc error address */
1304 ushort saved_dvc_err_code; /* 33 saved last dev. driver error code */
1305 ushort saved_adv_err_code; /* 34 saved last uc and Adv Lib error code */
1306 ushort saved_adv_err_addr; /* 35 saved last uc error address */
1307 ushort reserved36; /* 36 reserved */
1308 ushort reserved37; /* 37 reserved */
1309 ushort reserved38; /* 38 reserved */
1310 ushort reserved39; /* 39 reserved */
1311 ushort reserved40; /* 40 reserved */
1312 ushort reserved41; /* 41 reserved */
1313 ushort reserved42; /* 42 reserved */
1314 ushort reserved43; /* 43 reserved */
1315 ushort reserved44; /* 44 reserved */
1316 ushort reserved45; /* 45 reserved */
1317 ushort reserved46; /* 46 reserved */
1318 ushort reserved47; /* 47 reserved */
1319 ushort reserved48; /* 48 reserved */
1320 ushort reserved49; /* 49 reserved */
1321 ushort reserved50; /* 50 reserved */
1322 ushort reserved51; /* 51 reserved */
1323 ushort reserved52; /* 52 reserved */
1324 ushort reserved53; /* 53 reserved */
1325 ushort reserved54; /* 54 reserved */
1326 ushort reserved55; /* 55 reserved */
1327 ushort cisptr_lsw; /* 56 CIS PTR LSW */
1328 ushort cisprt_msw; /* 57 CIS PTR MSW */
1329 ushort subsysvid; /* 58 SubSystem Vendor ID */
1330 ushort subsysid; /* 59 SubSystem ID */
1331 ushort reserved60; /* 60 reserved */
1332 ushort reserved61; /* 61 reserved */
1333 ushort reserved62; /* 62 reserved */
1334 ushort reserved63; /* 63 reserved */
1335 } ADVEEP_38C1600_CONFIG;
1340 #define ASC_EEP_CMD_DONE 0x0200
1343 #define BIOS_CTRL_BIOS 0x0001
1344 #define BIOS_CTRL_EXTENDED_XLAT 0x0002
1345 #define BIOS_CTRL_GT_2_DISK 0x0004
1346 #define BIOS_CTRL_BIOS_REMOVABLE 0x0008
1347 #define BIOS_CTRL_BOOTABLE_CD 0x0010
1348 #define BIOS_CTRL_MULTIPLE_LUN 0x0040
1349 #define BIOS_CTRL_DISPLAY_MSG 0x0080
1350 #define BIOS_CTRL_NO_SCAM 0x0100
1351 #define BIOS_CTRL_RESET_SCSI_BUS 0x0200
1352 #define BIOS_CTRL_INIT_VERBOSE 0x0800
1353 #define BIOS_CTRL_SCSI_PARITY 0x1000
1354 #define BIOS_CTRL_AIPP_DIS 0x2000
1356 #define ADV_3550_MEMSIZE 0x2000 /* 8 KB Internal Memory */
1358 #define ADV_38C0800_MEMSIZE 0x4000 /* 16 KB Internal Memory */
1361 * XXX - Since ASC38C1600 Rev.3 has a local RAM failure issue, there is
1362 * a special 16K Adv Library and Microcode version. After the issue is
1363 * resolved, should restore 32K support.
1365 * #define ADV_38C1600_MEMSIZE 0x8000L * 32 KB Internal Memory *
1367 #define ADV_38C1600_MEMSIZE 0x4000 /* 16 KB Internal Memory */
1370 * Byte I/O register address from base of 'iop_base'.
1372 #define IOPB_INTR_STATUS_REG 0x00
1373 #define IOPB_CHIP_ID_1 0x01
1374 #define IOPB_INTR_ENABLES 0x02
1375 #define IOPB_CHIP_TYPE_REV 0x03
1376 #define IOPB_RES_ADDR_4 0x04
1377 #define IOPB_RES_ADDR_5 0x05
1378 #define IOPB_RAM_DATA 0x06
1379 #define IOPB_RES_ADDR_7 0x07
1380 #define IOPB_FLAG_REG 0x08
1381 #define IOPB_RES_ADDR_9 0x09
1382 #define IOPB_RISC_CSR 0x0A
1383 #define IOPB_RES_ADDR_B 0x0B
1384 #define IOPB_RES_ADDR_C 0x0C
1385 #define IOPB_RES_ADDR_D 0x0D
1386 #define IOPB_SOFT_OVER_WR 0x0E
1387 #define IOPB_RES_ADDR_F 0x0F
1388 #define IOPB_MEM_CFG 0x10
1389 #define IOPB_RES_ADDR_11 0x11
1390 #define IOPB_GPIO_DATA 0x12
1391 #define IOPB_RES_ADDR_13 0x13
1392 #define IOPB_FLASH_PAGE 0x14
1393 #define IOPB_RES_ADDR_15 0x15
1394 #define IOPB_GPIO_CNTL 0x16
1395 #define IOPB_RES_ADDR_17 0x17
1396 #define IOPB_FLASH_DATA 0x18
1397 #define IOPB_RES_ADDR_19 0x19
1398 #define IOPB_RES_ADDR_1A 0x1A
1399 #define IOPB_RES_ADDR_1B 0x1B
1400 #define IOPB_RES_ADDR_1C 0x1C
1401 #define IOPB_RES_ADDR_1D 0x1D
1402 #define IOPB_RES_ADDR_1E 0x1E
1403 #define IOPB_RES_ADDR_1F 0x1F
1404 #define IOPB_DMA_CFG0 0x20
1405 #define IOPB_DMA_CFG1 0x21
1406 #define IOPB_TICKLE 0x22
1407 #define IOPB_DMA_REG_WR 0x23
1408 #define IOPB_SDMA_STATUS 0x24
1409 #define IOPB_SCSI_BYTE_CNT 0x25
1410 #define IOPB_HOST_BYTE_CNT 0x26
1411 #define IOPB_BYTE_LEFT_TO_XFER 0x27
1412 #define IOPB_BYTE_TO_XFER_0 0x28
1413 #define IOPB_BYTE_TO_XFER_1 0x29
1414 #define IOPB_BYTE_TO_XFER_2 0x2A
1415 #define IOPB_BYTE_TO_XFER_3 0x2B
1416 #define IOPB_ACC_GRP 0x2C
1417 #define IOPB_RES_ADDR_2D 0x2D
1418 #define IOPB_DEV_ID 0x2E
1419 #define IOPB_RES_ADDR_2F 0x2F
1420 #define IOPB_SCSI_DATA 0x30
1421 #define IOPB_RES_ADDR_31 0x31
1422 #define IOPB_RES_ADDR_32 0x32
1423 #define IOPB_SCSI_DATA_HSHK 0x33
1424 #define IOPB_SCSI_CTRL 0x34
1425 #define IOPB_RES_ADDR_35 0x35
1426 #define IOPB_RES_ADDR_36 0x36
1427 #define IOPB_RES_ADDR_37 0x37
1428 #define IOPB_RAM_BIST 0x38
1429 #define IOPB_PLL_TEST 0x39
1430 #define IOPB_PCI_INT_CFG 0x3A
1431 #define IOPB_RES_ADDR_3B 0x3B
1432 #define IOPB_RFIFO_CNT 0x3C
1433 #define IOPB_RES_ADDR_3D 0x3D
1434 #define IOPB_RES_ADDR_3E 0x3E
1435 #define IOPB_RES_ADDR_3F 0x3F
1438 * Word I/O register address from base of 'iop_base'.
1440 #define IOPW_CHIP_ID_0 0x00 /* CID0 */
1441 #define IOPW_CTRL_REG 0x02 /* CC */
1442 #define IOPW_RAM_ADDR 0x04 /* LA */
1443 #define IOPW_RAM_DATA 0x06 /* LD */
1444 #define IOPW_RES_ADDR_08 0x08
1445 #define IOPW_RISC_CSR 0x0A /* CSR */
1446 #define IOPW_SCSI_CFG0 0x0C /* CFG0 */
1447 #define IOPW_SCSI_CFG1 0x0E /* CFG1 */
1448 #define IOPW_RES_ADDR_10 0x10
1449 #define IOPW_SEL_MASK 0x12 /* SM */
1450 #define IOPW_RES_ADDR_14 0x14
1451 #define IOPW_FLASH_ADDR 0x16 /* FA */
1452 #define IOPW_RES_ADDR_18 0x18
1453 #define IOPW_EE_CMD 0x1A /* EC */
1454 #define IOPW_EE_DATA 0x1C /* ED */
1455 #define IOPW_SFIFO_CNT 0x1E /* SFC */
1456 #define IOPW_RES_ADDR_20 0x20
1457 #define IOPW_Q_BASE 0x22 /* QB */
1458 #define IOPW_QP 0x24 /* QP */
1459 #define IOPW_IX 0x26 /* IX */
1460 #define IOPW_SP 0x28 /* SP */
1461 #define IOPW_PC 0x2A /* PC */
1462 #define IOPW_RES_ADDR_2C 0x2C
1463 #define IOPW_RES_ADDR_2E 0x2E
1464 #define IOPW_SCSI_DATA 0x30 /* SD */
1465 #define IOPW_SCSI_DATA_HSHK 0x32 /* SDH */
1466 #define IOPW_SCSI_CTRL 0x34 /* SC */
1467 #define IOPW_HSHK_CFG 0x36 /* HCFG */
1468 #define IOPW_SXFR_STATUS 0x36 /* SXS */
1469 #define IOPW_SXFR_CNTL 0x38 /* SXL */
1470 #define IOPW_SXFR_CNTH 0x3A /* SXH */
1471 #define IOPW_RES_ADDR_3C 0x3C
1472 #define IOPW_RFIFO_DATA 0x3E /* RFD */
1475 * Doubleword I/O register address from base of 'iop_base'.
1477 #define IOPDW_RES_ADDR_0 0x00
1478 #define IOPDW_RAM_DATA 0x04
1479 #define IOPDW_RES_ADDR_8 0x08
1480 #define IOPDW_RES_ADDR_C 0x0C
1481 #define IOPDW_RES_ADDR_10 0x10
1482 #define IOPDW_COMMA 0x14
1483 #define IOPDW_COMMB 0x18
1484 #define IOPDW_RES_ADDR_1C 0x1C
1485 #define IOPDW_SDMA_ADDR0 0x20
1486 #define IOPDW_SDMA_ADDR1 0x24
1487 #define IOPDW_SDMA_COUNT 0x28
1488 #define IOPDW_SDMA_ERROR 0x2C
1489 #define IOPDW_RDMA_ADDR0 0x30
1490 #define IOPDW_RDMA_ADDR1 0x34
1491 #define IOPDW_RDMA_COUNT 0x38
1492 #define IOPDW_RDMA_ERROR 0x3C
1494 #define ADV_CHIP_ID_BYTE 0x25
1495 #define ADV_CHIP_ID_WORD 0x04C1
1497 #define ADV_INTR_ENABLE_HOST_INTR 0x01
1498 #define ADV_INTR_ENABLE_SEL_INTR 0x02
1499 #define ADV_INTR_ENABLE_DPR_INTR 0x04
1500 #define ADV_INTR_ENABLE_RTA_INTR 0x08
1501 #define ADV_INTR_ENABLE_RMA_INTR 0x10
1502 #define ADV_INTR_ENABLE_RST_INTR 0x20
1503 #define ADV_INTR_ENABLE_DPE_INTR 0x40
1504 #define ADV_INTR_ENABLE_GLOBAL_INTR 0x80
1506 #define ADV_INTR_STATUS_INTRA 0x01
1507 #define ADV_INTR_STATUS_INTRB 0x02
1508 #define ADV_INTR_STATUS_INTRC 0x04
1510 #define ADV_RISC_CSR_STOP (0x0000)
1511 #define ADV_RISC_TEST_COND (0x2000)
1512 #define ADV_RISC_CSR_RUN (0x4000)
1513 #define ADV_RISC_CSR_SINGLE_STEP (0x8000)
1515 #define ADV_CTRL_REG_HOST_INTR 0x0100
1516 #define ADV_CTRL_REG_SEL_INTR 0x0200
1517 #define ADV_CTRL_REG_DPR_INTR 0x0400
1518 #define ADV_CTRL_REG_RTA_INTR 0x0800
1519 #define ADV_CTRL_REG_RMA_INTR 0x1000
1520 #define ADV_CTRL_REG_RES_BIT14 0x2000
1521 #define ADV_CTRL_REG_DPE_INTR 0x4000
1522 #define ADV_CTRL_REG_POWER_DONE 0x8000
1523 #define ADV_CTRL_REG_ANY_INTR 0xFF00
1525 #define ADV_CTRL_REG_CMD_RESET 0x00C6
1526 #define ADV_CTRL_REG_CMD_WR_IO_REG 0x00C5
1527 #define ADV_CTRL_REG_CMD_RD_IO_REG 0x00C4
1528 #define ADV_CTRL_REG_CMD_WR_PCI_CFG_SPACE 0x00C3
1529 #define ADV_CTRL_REG_CMD_RD_PCI_CFG_SPACE 0x00C2
1531 #define ADV_TICKLE_NOP 0x00
1532 #define ADV_TICKLE_A 0x01
1533 #define ADV_TICKLE_B 0x02
1534 #define ADV_TICKLE_C 0x03
1536 #define AdvIsIntPending(port) \
1537 (AdvReadWordRegister(port, IOPW_CTRL_REG) & ADV_CTRL_REG_HOST_INTR)
1540 * SCSI_CFG0 Register bit definitions
1542 #define TIMER_MODEAB 0xC000 /* Watchdog, Second, and Select. Timer Ctrl. */
1543 #define PARITY_EN 0x2000 /* Enable SCSI Parity Error detection */
1544 #define EVEN_PARITY 0x1000 /* Select Even Parity */
1545 #define WD_LONG 0x0800 /* Watchdog Interval, 1: 57 min, 0: 13 sec */
1546 #define QUEUE_128 0x0400 /* Queue Size, 1: 128 byte, 0: 64 byte */
1547 #define PRIM_MODE 0x0100 /* Primitive SCSI mode */
1548 #define SCAM_EN 0x0080 /* Enable SCAM selection */
1549 #define SEL_TMO_LONG 0x0040 /* Sel/Resel Timeout, 1: 400 ms, 0: 1.6 ms */
1550 #define CFRM_ID 0x0020 /* SCAM id sel. confirm., 1: fast, 0: 6.4 ms */
1551 #define OUR_ID_EN 0x0010 /* Enable OUR_ID bits */
1552 #define OUR_ID 0x000F /* SCSI ID */
1555 * SCSI_CFG1 Register bit definitions
1557 #define BIG_ENDIAN 0x8000 /* Enable Big Endian Mode MIO:15, EEP:15 */
1558 #define TERM_POL 0x2000 /* Terminator Polarity Ctrl. MIO:13, EEP:13 */
1559 #define SLEW_RATE 0x1000 /* SCSI output buffer slew rate */
1560 #define FILTER_SEL 0x0C00 /* Filter Period Selection */
1561 #define FLTR_DISABLE 0x0000 /* Input Filtering Disabled */
1562 #define FLTR_11_TO_20NS 0x0800 /* Input Filtering 11ns to 20ns */
1563 #define FLTR_21_TO_39NS 0x0C00 /* Input Filtering 21ns to 39ns */
1564 #define ACTIVE_DBL 0x0200 /* Disable Active Negation */
1565 #define DIFF_MODE 0x0100 /* SCSI differential Mode (Read-Only) */
1566 #define DIFF_SENSE 0x0080 /* 1: No SE cables, 0: SE cable (Read-Only) */
1567 #define TERM_CTL_SEL 0x0040 /* Enable TERM_CTL_H and TERM_CTL_L */
1568 #define TERM_CTL 0x0030 /* External SCSI Termination Bits */
1569 #define TERM_CTL_H 0x0020 /* Enable External SCSI Upper Termination */
1570 #define TERM_CTL_L 0x0010 /* Enable External SCSI Lower Termination */
1571 #define CABLE_DETECT 0x000F /* External SCSI Cable Connection Status */
1574 * Addendum for ASC-38C0800 Chip
1576 * The ASC-38C1600 Chip uses the same definitions except that the
1577 * bus mode override bits [12:10] have been moved to byte register
1578 * offset 0xE (IOPB_SOFT_OVER_WR) bits [12:10]. The [12:10] bits in
1579 * SCSI_CFG1 are read-only and always available. Bit 14 (DIS_TERM_DRV)
1580 * is not needed. The [12:10] bits in IOPB_SOFT_OVER_WR are write-only.
1581 * Also each ASC-38C1600 function or channel uses only cable bits [5:4]
1582 * and [1:0]. Bits [14], [7:6], [3:2] are unused.
1584 #define DIS_TERM_DRV 0x4000 /* 1: Read c_det[3:0], 0: cannot read */
1585 #define HVD_LVD_SE 0x1C00 /* Device Detect Bits */
1586 #define HVD 0x1000 /* HVD Device Detect */
1587 #define LVD 0x0800 /* LVD Device Detect */
1588 #define SE 0x0400 /* SE Device Detect */
1589 #define TERM_LVD 0x00C0 /* LVD Termination Bits */
1590 #define TERM_LVD_HI 0x0080 /* Enable LVD Upper Termination */
1591 #define TERM_LVD_LO 0x0040 /* Enable LVD Lower Termination */
1592 #define TERM_SE 0x0030 /* SE Termination Bits */
1593 #define TERM_SE_HI 0x0020 /* Enable SE Upper Termination */
1594 #define TERM_SE_LO 0x0010 /* Enable SE Lower Termination */
1595 #define C_DET_LVD 0x000C /* LVD Cable Detect Bits */
1596 #define C_DET3 0x0008 /* Cable Detect for LVD External Wide */
1597 #define C_DET2 0x0004 /* Cable Detect for LVD Internal Wide */
1598 #define C_DET_SE 0x0003 /* SE Cable Detect Bits */
1599 #define C_DET1 0x0002 /* Cable Detect for SE Internal Wide */
1600 #define C_DET0 0x0001 /* Cable Detect for SE Internal Narrow */
1602 #define CABLE_ILLEGAL_A 0x7
1603 /* x 0 0 0 | on on | Illegal (all 3 connectors are used) */
1605 #define CABLE_ILLEGAL_B 0xB
1606 /* 0 x 0 0 | on on | Illegal (all 3 connectors are used) */
1609 * MEM_CFG Register bit definitions
1611 #define BIOS_EN 0x40 /* BIOS Enable MIO:14,EEP:14 */
1612 #define FAST_EE_CLK 0x20 /* Diagnostic Bit */
1613 #define RAM_SZ 0x1C /* Specify size of RAM to RISC */
1614 #define RAM_SZ_2KB 0x00 /* 2 KB */
1615 #define RAM_SZ_4KB 0x04 /* 4 KB */
1616 #define RAM_SZ_8KB 0x08 /* 8 KB */
1617 #define RAM_SZ_16KB 0x0C /* 16 KB */
1618 #define RAM_SZ_32KB 0x10 /* 32 KB */
1619 #define RAM_SZ_64KB 0x14 /* 64 KB */
1622 * DMA_CFG0 Register bit definitions
1624 * This register is only accessible to the host.
1626 #define BC_THRESH_ENB 0x80 /* PCI DMA Start Conditions */
1627 #define FIFO_THRESH 0x70 /* PCI DMA FIFO Threshold */
1628 #define FIFO_THRESH_16B 0x00 /* 16 bytes */
1629 #define FIFO_THRESH_32B 0x20 /* 32 bytes */
1630 #define FIFO_THRESH_48B 0x30 /* 48 bytes */
1631 #define FIFO_THRESH_64B 0x40 /* 64 bytes */
1632 #define FIFO_THRESH_80B 0x50 /* 80 bytes (default) */
1633 #define FIFO_THRESH_96B 0x60 /* 96 bytes */
1634 #define FIFO_THRESH_112B 0x70 /* 112 bytes */
1635 #define START_CTL 0x0C /* DMA start conditions */
1636 #define START_CTL_TH 0x00 /* Wait threshold level (default) */
1637 #define START_CTL_ID 0x04 /* Wait SDMA/SBUS idle */
1638 #define START_CTL_THID 0x08 /* Wait threshold and SDMA/SBUS idle */
1639 #define START_CTL_EMFU 0x0C /* Wait SDMA FIFO empty/full */
1640 #define READ_CMD 0x03 /* Memory Read Method */
1641 #define READ_CMD_MR 0x00 /* Memory Read */
1642 #define READ_CMD_MRL 0x02 /* Memory Read Long */
1643 #define READ_CMD_MRM 0x03 /* Memory Read Multiple (default) */
1646 * ASC-38C0800 RAM BIST Register bit definitions
1648 #define RAM_TEST_MODE 0x80
1649 #define PRE_TEST_MODE 0x40
1650 #define NORMAL_MODE 0x00
1651 #define RAM_TEST_DONE 0x10
1652 #define RAM_TEST_STATUS 0x0F
1653 #define RAM_TEST_HOST_ERROR 0x08
1654 #define RAM_TEST_INTRAM_ERROR 0x04
1655 #define RAM_TEST_RISC_ERROR 0x02
1656 #define RAM_TEST_SCSI_ERROR 0x01
1657 #define RAM_TEST_SUCCESS 0x00
1658 #define PRE_TEST_VALUE 0x05
1659 #define NORMAL_VALUE 0x00
1662 * ASC38C1600 Definitions
1664 * IOPB_PCI_INT_CFG Bit Field Definitions
1667 #define INTAB_LD 0x80 /* Value loaded from EEPROM Bit 11. */
1670 * Bit 1 can be set to change the interrupt for the Function to operate in
1671 * Totem Pole mode. By default Bit 1 is 0 and the interrupt operates in
1672 * Open Drain mode. Both functions of the ASC38C1600 must be set to the same
1673 * mode, otherwise the operating mode is undefined.
1675 #define TOTEMPOLE 0x02
1678 * Bit 0 can be used to change the Int Pin for the Function. The value is
1679 * 0 by default for both Functions with Function 0 using INT A and Function
1680 * B using INT B. For Function 0 if set, INT B is used. For Function 1 if set,
1683 * EEPROM Word 0 Bit 11 for each Function may change the initial Int Pin
1684 * value specified in the PCI Configuration Space.
1689 * Adv Library Status Definitions
1693 #define ADV_SUCCESS 1
1695 #define ADV_ERROR (-1)
1698 * ADV_DVC_VAR 'warn_code' values
1700 #define ASC_WARN_BUSRESET_ERROR 0x0001 /* SCSI Bus Reset error */
1701 #define ASC_WARN_EEPROM_CHKSUM 0x0002 /* EEP check sum error */
1702 #define ASC_WARN_EEPROM_TERMINATION 0x0004 /* EEP termination bad field */
1703 #define ASC_WARN_ERROR 0xFFFF /* ADV_ERROR return */
1705 #define ADV_MAX_TID 15 /* max. target identifier */
1706 #define ADV_MAX_LUN 7 /* max. logical unit number */
1709 * Fixed locations of microcode operating variables.
1711 #define ASC_MC_CODE_BEGIN_ADDR 0x0028 /* microcode start address */
1712 #define ASC_MC_CODE_END_ADDR 0x002A /* microcode end address */
1713 #define ASC_MC_CODE_CHK_SUM 0x002C /* microcode code checksum */
1714 #define ASC_MC_VERSION_DATE 0x0038 /* microcode version */
1715 #define ASC_MC_VERSION_NUM 0x003A /* microcode number */
1716 #define ASC_MC_BIOSMEM 0x0040 /* BIOS RISC Memory Start */
1717 #define ASC_MC_BIOSLEN 0x0050 /* BIOS RISC Memory Length */
1718 #define ASC_MC_BIOS_SIGNATURE 0x0058 /* BIOS Signature 0x55AA */
1719 #define ASC_MC_BIOS_VERSION 0x005A /* BIOS Version (2 bytes) */
1720 #define ASC_MC_SDTR_SPEED1 0x0090 /* SDTR Speed for TID 0-3 */
1721 #define ASC_MC_SDTR_SPEED2 0x0092 /* SDTR Speed for TID 4-7 */
1722 #define ASC_MC_SDTR_SPEED3 0x0094 /* SDTR Speed for TID 8-11 */
1723 #define ASC_MC_SDTR_SPEED4 0x0096 /* SDTR Speed for TID 12-15 */
1724 #define ASC_MC_CHIP_TYPE 0x009A
1725 #define ASC_MC_INTRB_CODE 0x009B
1726 #define ASC_MC_WDTR_ABLE 0x009C
1727 #define ASC_MC_SDTR_ABLE 0x009E
1728 #define ASC_MC_TAGQNG_ABLE 0x00A0
1729 #define ASC_MC_DISC_ENABLE 0x00A2
1730 #define ASC_MC_IDLE_CMD_STATUS 0x00A4
1731 #define ASC_MC_IDLE_CMD 0x00A6
1732 #define ASC_MC_IDLE_CMD_PARAMETER 0x00A8
1733 #define ASC_MC_DEFAULT_SCSI_CFG0 0x00AC
1734 #define ASC_MC_DEFAULT_SCSI_CFG1 0x00AE
1735 #define ASC_MC_DEFAULT_MEM_CFG 0x00B0
1736 #define ASC_MC_DEFAULT_SEL_MASK 0x00B2
1737 #define ASC_MC_SDTR_DONE 0x00B6
1738 #define ASC_MC_NUMBER_OF_QUEUED_CMD 0x00C0
1739 #define ASC_MC_NUMBER_OF_MAX_CMD 0x00D0
1740 #define ASC_MC_DEVICE_HSHK_CFG_TABLE 0x0100
1741 #define ASC_MC_CONTROL_FLAG 0x0122 /* Microcode control flag. */
1742 #define ASC_MC_WDTR_DONE 0x0124
1743 #define ASC_MC_CAM_MODE_MASK 0x015E /* CAM mode TID bitmask. */
1744 #define ASC_MC_ICQ 0x0160
1745 #define ASC_MC_IRQ 0x0164
1746 #define ASC_MC_PPR_ABLE 0x017A
1749 * BIOS LRAM variable absolute offsets.
1751 #define BIOS_CODESEG 0x54
1752 #define BIOS_CODELEN 0x56
1753 #define BIOS_SIGNATURE 0x58
1754 #define BIOS_VERSION 0x5A
1757 * Microcode Control Flags
1759 * Flags set by the Adv Library in RISC variable 'control_flag' (0x122)
1760 * and handled by the microcode.
1762 #define CONTROL_FLAG_IGNORE_PERR 0x0001 /* Ignore DMA Parity Errors */
1763 #define CONTROL_FLAG_ENABLE_AIPP 0x0002 /* Enabled AIPP checking. */
1766 * ASC_MC_DEVICE_HSHK_CFG_TABLE microcode table or HSHK_CFG register format
1768 #define HSHK_CFG_WIDE_XFR 0x8000
1769 #define HSHK_CFG_RATE 0x0F00
1770 #define HSHK_CFG_OFFSET 0x001F
1772 #define ASC_DEF_MAX_HOST_QNG 0xFD /* Max. number of host commands (253) */
1773 #define ASC_DEF_MIN_HOST_QNG 0x10 /* Min. number of host commands (16) */
1774 #define ASC_DEF_MAX_DVC_QNG 0x3F /* Max. number commands per device (63) */
1775 #define ASC_DEF_MIN_DVC_QNG 0x04 /* Min. number commands per device (4) */
1777 #define ASC_QC_DATA_CHECK 0x01 /* Require ASC_QC_DATA_OUT set or clear. */
1778 #define ASC_QC_DATA_OUT 0x02 /* Data out DMA transfer. */
1779 #define ASC_QC_START_MOTOR 0x04 /* Send auto-start motor before request. */
1780 #define ASC_QC_NO_OVERRUN 0x08 /* Don't report overrun. */
1781 #define ASC_QC_FREEZE_TIDQ 0x10 /* Freeze TID queue after request. XXX TBD */
1783 #define ASC_QSC_NO_DISC 0x01 /* Don't allow disconnect for request. */
1784 #define ASC_QSC_NO_TAGMSG 0x02 /* Don't allow tag queuing for request. */
1785 #define ASC_QSC_NO_SYNC 0x04 /* Don't use Synch. transfer on request. */
1786 #define ASC_QSC_NO_WIDE 0x08 /* Don't use Wide transfer on request. */
1787 #define ASC_QSC_REDO_DTR 0x10 /* Renegotiate WDTR/SDTR before request. */
1789 * Note: If a Tag Message is to be sent and neither ASC_QSC_HEAD_TAG or
1790 * ASC_QSC_ORDERED_TAG is set, then a Simple Tag Message (0x20) is used.
1792 #define ASC_QSC_HEAD_TAG 0x40 /* Use Head Tag Message (0x21). */
1793 #define ASC_QSC_ORDERED_TAG 0x80 /* Use Ordered Tag Message (0x22). */
1796 * All fields here are accessed by the board microcode and need to be
1799 typedef struct adv_carr_t {
1800 ADV_VADDR carr_va; /* Carrier Virtual Address */
1801 ADV_PADDR carr_pa; /* Carrier Physical Address */
1802 ADV_VADDR areq_vpa; /* ASC_SCSI_REQ_Q Virtual or Physical Address */
1804 * next_vpa [31:4] Carrier Virtual or Physical Next Pointer
1806 * next_vpa [3:1] Reserved Bits
1807 * next_vpa [0] Done Flag set in Response Queue.
1813 * Mask used to eliminate low 4 bits of carrier 'next_vpa' field.
1815 #define ASC_NEXT_VPA_MASK 0xFFFFFFF0
1817 #define ASC_RQ_DONE 0x00000001
1818 #define ASC_RQ_GOOD 0x00000002
1819 #define ASC_CQ_STOPPER 0x00000000
1821 #define ASC_GET_CARRP(carrp) ((carrp) & ASC_NEXT_VPA_MASK)
1823 #define ADV_CARRIER_NUM_PAGE_CROSSING \
1824 (((ADV_CARRIER_COUNT * sizeof(ADV_CARR_T)) + \
1825 (ADV_PAGE_SIZE - 1))/ADV_PAGE_SIZE)
1827 #define ADV_CARRIER_BUFSIZE \
1828 ((ADV_CARRIER_COUNT + ADV_CARRIER_NUM_PAGE_CROSSING) * sizeof(ADV_CARR_T))
1831 * ASC_SCSI_REQ_Q 'a_flag' definitions
1833 * The Adv Library should limit use to the lower nibble (4 bits) of
1834 * a_flag. Drivers are free to use the upper nibble (4 bits) of a_flag.
1836 #define ADV_POLL_REQUEST 0x01 /* poll for request completion */
1837 #define ADV_SCSIQ_DONE 0x02 /* request done */
1838 #define ADV_DONT_RETRY 0x08 /* don't do retry */
1840 #define ADV_CHIP_ASC3550 0x01 /* Ultra-Wide IC */
1841 #define ADV_CHIP_ASC38C0800 0x02 /* Ultra2-Wide/LVD IC */
1842 #define ADV_CHIP_ASC38C1600 0x03 /* Ultra3-Wide/LVD2 IC */
1845 * Adapter temporary configuration structure
1847 * This structure can be discarded after initialization. Don't add
1848 * fields here needed after initialization.
1850 * Field naming convention:
1852 * *_enable indicates the field enables or disables a feature. The
1853 * value of the field is never reset.
1855 typedef struct adv_dvc_cfg {
1856 ushort disc_enable; /* enable disconnection */
1857 uchar chip_version; /* chip version */
1858 uchar termination; /* Term. Ctrl. bits 6-5 of SCSI_CFG1 register */
1859 ushort lib_version; /* Adv Library version number */
1860 ushort control_flag; /* Microcode Control Flag */
1861 ushort mcode_date; /* Microcode date */
1862 ushort mcode_version; /* Microcode version */
1863 ushort serial1; /* EEPROM serial number word 1 */
1864 ushort serial2; /* EEPROM serial number word 2 */
1865 ushort serial3; /* EEPROM serial number word 3 */
1869 struct adv_scsi_req_q;
1872 * Adapter operation variable structure.
1874 * One structure is required per host adapter.
1876 * Field naming convention:
1878 * *_able indicates both whether a feature should be enabled or disabled
1879 * and whether a device isi capable of the feature. At initialization
1880 * this field may be set, but later if a device is found to be incapable
1881 * of the feature, the field is cleared.
1883 typedef struct adv_dvc_var {
1884 AdvPortAddr iop_base; /* I/O port address */
1885 ushort err_code; /* fatal error code */
1886 ushort bios_ctrl; /* BIOS control word, EEPROM word 12 */
1887 ushort wdtr_able; /* try WDTR for a device */
1888 ushort sdtr_able; /* try SDTR for a device */
1889 ushort ultra_able; /* try SDTR Ultra speed for a device */
1890 ushort sdtr_speed1; /* EEPROM SDTR Speed for TID 0-3 */
1891 ushort sdtr_speed2; /* EEPROM SDTR Speed for TID 4-7 */
1892 ushort sdtr_speed3; /* EEPROM SDTR Speed for TID 8-11 */
1893 ushort sdtr_speed4; /* EEPROM SDTR Speed for TID 12-15 */
1894 ushort tagqng_able; /* try tagged queuing with a device */
1895 ushort ppr_able; /* PPR message capable per TID bitmask. */
1896 uchar max_dvc_qng; /* maximum number of tagged commands per device */
1897 ushort start_motor; /* start motor command allowed */
1898 uchar scsi_reset_wait; /* delay in seconds after scsi bus reset */
1899 uchar chip_no; /* should be assigned by caller */
1900 uchar max_host_qng; /* maximum number of Q'ed command allowed */
1901 ushort no_scam; /* scam_tolerant of EEPROM */
1902 struct asc_board *drv_ptr; /* driver pointer to private structure */
1903 uchar chip_scsi_id; /* chip SCSI target ID */
1905 uchar bist_err_code;
1906 ADV_CARR_T *carrier_buf;
1907 ADV_CARR_T *carr_freelist; /* Carrier free list. */
1908 ADV_CARR_T *icq_sp; /* Initiator command queue stopper pointer. */
1909 ADV_CARR_T *irq_sp; /* Initiator response queue stopper pointer. */
1910 ushort carr_pending_cnt; /* Count of pending carriers. */
1912 * Note: The following fields will not be used after initialization. The
1913 * driver may discard the buffer after initialization is done.
1915 ADV_DVC_CFG *cfg; /* temporary configuration structure */
1918 #define NO_OF_SG_PER_BLOCK 15
1920 typedef struct asc_sg_block {
1924 uchar sg_cnt; /* Valid entries in block. */
1925 ADV_PADDR sg_ptr; /* Pointer to next sg block. */
1927 ADV_PADDR sg_addr; /* SG element address. */
1928 ADV_DCNT sg_count; /* SG element count. */
1929 } sg_list[NO_OF_SG_PER_BLOCK];
1933 * ADV_SCSI_REQ_Q - microcode request structure
1935 * All fields in this structure up to byte 60 are used by the microcode.
1936 * The microcode makes assumptions about the size and ordering of fields
1937 * in this structure. Do not change the structure definition here without
1938 * coordinating the change with the microcode.
1940 * All fields accessed by microcode must be maintained in little_endian
1943 typedef struct adv_scsi_req_q {
1944 uchar cntl; /* Ucode flags and state (ASC_MC_QC_*). */
1946 uchar target_id; /* Device target identifier. */
1947 uchar target_lun; /* Device target logical unit number. */
1948 ADV_PADDR data_addr; /* Data buffer physical address. */
1949 ADV_DCNT data_cnt; /* Data count. Ucode sets to residual. */
1950 ADV_PADDR sense_addr;
1954 uchar cdb_len; /* SCSI CDB length. Must <= 16 bytes. */
1956 uchar done_status; /* Completion status. */
1957 uchar scsi_status; /* SCSI status byte. */
1958 uchar host_status; /* Ucode host status. */
1959 uchar sg_working_ix;
1960 uchar cdb[12]; /* SCSI CDB bytes 0-11. */
1961 ADV_PADDR sg_real_addr; /* SG list physical address. */
1962 ADV_PADDR scsiq_rptr;
1963 uchar cdb16[4]; /* SCSI CDB bytes 12-15. */
1964 ADV_VADDR scsiq_ptr;
1967 * End of microcode structure - 60 bytes. The rest of the structure
1968 * is used by the Adv Library and ignored by the microcode.
1971 ADV_SG_BLOCK *sg_list_ptr; /* SG list virtual address. */
1972 char *vdata_addr; /* Data buffer virtual address. */
1974 uchar pad[2]; /* Pad out to a word boundary. */
1978 * Microcode idle loop commands
1980 #define IDLE_CMD_COMPLETED 0
1981 #define IDLE_CMD_STOP_CHIP 0x0001
1982 #define IDLE_CMD_STOP_CHIP_SEND_INT 0x0002
1983 #define IDLE_CMD_SEND_INT 0x0004
1984 #define IDLE_CMD_ABORT 0x0008
1985 #define IDLE_CMD_DEVICE_RESET 0x0010
1986 #define IDLE_CMD_SCSI_RESET_START 0x0020 /* Assert SCSI Bus Reset */
1987 #define IDLE_CMD_SCSI_RESET_END 0x0040 /* Deassert SCSI Bus Reset */
1988 #define IDLE_CMD_SCSIREQ 0x0080
1990 #define IDLE_CMD_STATUS_SUCCESS 0x0001
1991 #define IDLE_CMD_STATUS_FAILURE 0x0002
1994 * AdvSendIdleCmd() flag definitions.
1996 #define ADV_NOWAIT 0x01
1999 * Wait loop time out values.
2001 #define SCSI_WAIT_100_MSEC 100UL /* 100 milliseconds */
2002 #define SCSI_US_PER_MSEC 1000 /* microseconds per millisecond */
2003 #define SCSI_MAX_RETRY 10 /* retry count */
2005 #define ADV_ASYNC_RDMA_FAILURE 0x01 /* Fatal RDMA failure. */
2006 #define ADV_ASYNC_SCSI_BUS_RESET_DET 0x02 /* Detected SCSI Bus Reset. */
2007 #define ADV_ASYNC_CARRIER_READY_FAILURE 0x03 /* Carrier Ready failure. */
2008 #define ADV_RDMA_IN_CARR_AND_Q_INVALID 0x04 /* RDMAed-in data invalid. */
2010 #define ADV_HOST_SCSI_BUS_RESET 0x80 /* Host Initiated SCSI Bus Reset. */
2012 /* Read byte from a register. */
2013 #define AdvReadByteRegister(iop_base, reg_off) \
2014 (ADV_MEM_READB((iop_base) + (reg_off)))
2016 /* Write byte to a register. */
2017 #define AdvWriteByteRegister(iop_base, reg_off, byte) \
2018 (ADV_MEM_WRITEB((iop_base) + (reg_off), (byte)))
2020 /* Read word (2 bytes) from a register. */
2021 #define AdvReadWordRegister(iop_base, reg_off) \
2022 (ADV_MEM_READW((iop_base) + (reg_off)))
2024 /* Write word (2 bytes) to a register. */
2025 #define AdvWriteWordRegister(iop_base, reg_off, word) \
2026 (ADV_MEM_WRITEW((iop_base) + (reg_off), (word)))
2028 /* Write dword (4 bytes) to a register. */
2029 #define AdvWriteDWordRegister(iop_base, reg_off, dword) \
2030 (ADV_MEM_WRITEDW((iop_base) + (reg_off), (dword)))
2032 /* Read byte from LRAM. */
2033 #define AdvReadByteLram(iop_base, addr, byte) \
2035 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)); \
2036 (byte) = ADV_MEM_READB((iop_base) + IOPB_RAM_DATA); \
2039 /* Write byte to LRAM. */
2040 #define AdvWriteByteLram(iop_base, addr, byte) \
2041 (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)), \
2042 ADV_MEM_WRITEB((iop_base) + IOPB_RAM_DATA, (byte)))
2044 /* Read word (2 bytes) from LRAM. */
2045 #define AdvReadWordLram(iop_base, addr, word) \
2047 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)); \
2048 (word) = (ADV_MEM_READW((iop_base) + IOPW_RAM_DATA)); \
2051 /* Write word (2 bytes) to LRAM. */
2052 #define AdvWriteWordLram(iop_base, addr, word) \
2053 (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)), \
2054 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, (word)))
2056 /* Write little-endian double word (4 bytes) to LRAM */
2057 /* Because of unspecified C language ordering don't use auto-increment. */
2058 #define AdvWriteDWordLramNoSwap(iop_base, addr, dword) \
2059 ((ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr)), \
2060 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, \
2061 cpu_to_le16((ushort) ((dword) & 0xFFFF)))), \
2062 (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_ADDR, (addr) + 2), \
2063 ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, \
2064 cpu_to_le16((ushort) ((dword >> 16) & 0xFFFF)))))
2066 /* Read word (2 bytes) from LRAM assuming that the address is already set. */
2067 #define AdvReadWordAutoIncLram(iop_base) \
2068 (ADV_MEM_READW((iop_base) + IOPW_RAM_DATA))
2070 /* Write word (2 bytes) to LRAM assuming that the address is already set. */
2071 #define AdvWriteWordAutoIncLram(iop_base, word) \
2072 (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, (word)))
2075 * Define macro to check for Condor signature.
2077 * Evaluate to ADV_TRUE if a Condor chip is found the specified port
2078 * address 'iop_base'. Otherwise evalue to ADV_FALSE.
2080 #define AdvFindSignature(iop_base) \
2081 (((AdvReadByteRegister((iop_base), IOPB_CHIP_ID_1) == \
2082 ADV_CHIP_ID_BYTE) && \
2083 (AdvReadWordRegister((iop_base), IOPW_CHIP_ID_0) == \
2084 ADV_CHIP_ID_WORD)) ? ADV_TRUE : ADV_FALSE)
2087 * Define macro to Return the version number of the chip at 'iop_base'.
2089 * The second parameter 'bus_type' is currently unused.
2091 #define AdvGetChipVersion(iop_base, bus_type) \
2092 AdvReadByteRegister((iop_base), IOPB_CHIP_TYPE_REV)
2095 * Abort an SRB in the chip's RISC Memory. The 'srb_ptr' argument must
2096 * match the ASC_SCSI_REQ_Q 'srb_ptr' field.
2098 * If the request has not yet been sent to the device it will simply be
2099 * aborted from RISC memory. If the request is disconnected it will be
2100 * aborted on reselection by sending an Abort Message to the target ID.
2103 * ADV_TRUE(1) - Queue was successfully aborted.
2104 * ADV_FALSE(0) - Queue was not found on the active queue list.
2106 #define AdvAbortQueue(asc_dvc, scsiq) \
2107 AdvSendIdleCmd((asc_dvc), (ushort) IDLE_CMD_ABORT, \
2111 * Send a Bus Device Reset Message to the specified target ID.
2113 * All outstanding commands will be purged if sending the
2114 * Bus Device Reset Message is successful.
2117 * ADV_TRUE(1) - All requests on the target are purged.
2118 * ADV_FALSE(0) - Couldn't issue Bus Device Reset Message; Requests
2121 #define AdvResetDevice(asc_dvc, target_id) \
2122 AdvSendIdleCmd((asc_dvc), (ushort) IDLE_CMD_DEVICE_RESET, \
2123 (ADV_DCNT) (target_id))
2126 * SCSI Wide Type definition.
2128 #define ADV_SCSI_BIT_ID_TYPE ushort
2131 * AdvInitScsiTarget() 'cntl_flag' options.
2133 #define ADV_SCAN_LUN 0x01
2134 #define ADV_CAPINFO_NOLUN 0x02
2137 * Convert target id to target id bit mask.
2139 #define ADV_TID_TO_TIDMASK(tid) (0x01 << ((tid) & ADV_MAX_TID))
2142 * ASC_SCSI_REQ_Q 'done_status' and 'host_status' return values.
2145 #define QD_NO_STATUS 0x00 /* Request not completed yet. */
2146 #define QD_NO_ERROR 0x01
2147 #define QD_ABORTED_BY_HOST 0x02
2148 #define QD_WITH_ERROR 0x04
2150 #define QHSTA_NO_ERROR 0x00
2151 #define QHSTA_M_SEL_TIMEOUT 0x11
2152 #define QHSTA_M_DATA_OVER_RUN 0x12
2153 #define QHSTA_M_UNEXPECTED_BUS_FREE 0x13
2154 #define QHSTA_M_QUEUE_ABORTED 0x15
2155 #define QHSTA_M_SXFR_SDMA_ERR 0x16 /* SXFR_STATUS SCSI DMA Error */
2156 #define QHSTA_M_SXFR_SXFR_PERR 0x17 /* SXFR_STATUS SCSI Bus Parity Error */
2157 #define QHSTA_M_RDMA_PERR 0x18 /* RISC PCI DMA parity error */
2158 #define QHSTA_M_SXFR_OFF_UFLW 0x19 /* SXFR_STATUS Offset Underflow */
2159 #define QHSTA_M_SXFR_OFF_OFLW 0x20 /* SXFR_STATUS Offset Overflow */
2160 #define QHSTA_M_SXFR_WD_TMO 0x21 /* SXFR_STATUS Watchdog Timeout */
2161 #define QHSTA_M_SXFR_DESELECTED 0x22 /* SXFR_STATUS Deselected */
2162 /* Note: QHSTA_M_SXFR_XFR_OFLW is identical to QHSTA_M_DATA_OVER_RUN. */
2163 #define QHSTA_M_SXFR_XFR_OFLW 0x12 /* SXFR_STATUS Transfer Overflow */
2164 #define QHSTA_M_SXFR_XFR_PH_ERR 0x24 /* SXFR_STATUS Transfer Phase Error */
2165 #define QHSTA_M_SXFR_UNKNOWN_ERROR 0x25 /* SXFR_STATUS Unknown Error */
2166 #define QHSTA_M_SCSI_BUS_RESET 0x30 /* Request aborted from SBR */
2167 #define QHSTA_M_SCSI_BUS_RESET_UNSOL 0x31 /* Request aborted from unsol. SBR */
2168 #define QHSTA_M_BUS_DEVICE_RESET 0x32 /* Request aborted from BDR */
2169 #define QHSTA_M_DIRECTION_ERR 0x35 /* Data Phase mismatch */
2170 #define QHSTA_M_DIRECTION_ERR_HUNG 0x36 /* Data Phase mismatch and bus hang */
2171 #define QHSTA_M_WTM_TIMEOUT 0x41
2172 #define QHSTA_M_BAD_CMPL_STATUS_IN 0x42
2173 #define QHSTA_M_NO_AUTO_REQ_SENSE 0x43
2174 #define QHSTA_M_AUTO_REQ_SENSE_FAIL 0x44
2175 #define QHSTA_M_INVALID_DEVICE 0x45 /* Bad target ID */
2176 #define QHSTA_M_FROZEN_TIDQ 0x46 /* TID Queue frozen. */
2177 #define QHSTA_M_SGBACKUP_ERROR 0x47 /* Scatter-Gather backup error */
2180 * DvcGetPhyAddr() flag arguments
2182 #define ADV_IS_SCSIQ_FLAG 0x01 /* 'addr' is ASC_SCSI_REQ_Q pointer */
2183 #define ADV_ASCGETSGLIST_VADDR 0x02 /* 'addr' is AscGetSGList() virtual addr */
2184 #define ADV_IS_SENSE_FLAG 0x04 /* 'addr' is sense virtual pointer */
2185 #define ADV_IS_DATA_FLAG 0x08 /* 'addr' is data virtual pointer */
2186 #define ADV_IS_SGLIST_FLAG 0x10 /* 'addr' is sglist virtual pointer */
2187 #define ADV_IS_CARRIER_FLAG 0x20 /* 'addr' is ADV_CARR_T pointer */
2189 /* Return the address that is aligned at the next doubleword >= to 'addr'. */
2190 #define ADV_8BALIGN(addr) (((ulong) (addr) + 0x7) & ~0x7)
2191 #define ADV_16BALIGN(addr) (((ulong) (addr) + 0xF) & ~0xF)
2192 #define ADV_32BALIGN(addr) (((ulong) (addr) + 0x1F) & ~0x1F)
2195 * Total contiguous memory needed for driver SG blocks.
2197 * ADV_MAX_SG_LIST must be defined by a driver. It is the maximum
2198 * number of scatter-gather elements the driver supports in a
2202 #define ADV_SG_LIST_MAX_BYTE_SIZE \
2203 (sizeof(ADV_SG_BLOCK) * \
2204 ((ADV_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK))
2206 /* struct asc_board flags */
2207 #define ASC_IS_WIDE_BOARD 0x04 /* AdvanSys Wide Board */
2209 #define ASC_NARROW_BOARD(boardp) (((boardp)->flags & ASC_IS_WIDE_BOARD) == 0)
2211 #define NO_ISA_DMA 0xff /* No ISA DMA Channel Used */
2213 #define ASC_INFO_SIZE 128 /* advansys_info() line size */
2215 #ifdef CONFIG_PROC_FS
2216 /* /proc/scsi/advansys/[0...] related definitions */
2217 #define ASC_PRTBUF_SIZE 2048
2218 #define ASC_PRTLINE_SIZE 160
2220 #define ASC_PRT_NEXT() \
2224 if (leftlen == 0) { \
2229 #endif /* CONFIG_PROC_FS */
2231 /* Asc Library return codes */
2234 #define ASC_NOERROR 1
2236 #define ASC_ERROR (-1)
2238 /* struct scsi_cmnd function return codes */
2239 #define STATUS_BYTE(byte) (byte)
2240 #define MSG_BYTE(byte) ((byte) << 8)
2241 #define HOST_BYTE(byte) ((byte) << 16)
2242 #define DRIVER_BYTE(byte) ((byte) << 24)
2244 #define ASC_STATS(shost, counter) ASC_STATS_ADD(shost, counter, 1)
2245 #ifndef ADVANSYS_STATS
2246 #define ASC_STATS_ADD(shost, counter, count)
2247 #else /* ADVANSYS_STATS */
2248 #define ASC_STATS_ADD(shost, counter, count) \
2249 (((struct asc_board *) shost_priv(shost))->asc_stats.counter += (count))
2250 #endif /* ADVANSYS_STATS */
2252 #define ASC_CEILING(val, unit) (((val) + ((unit) - 1))/(unit))
2254 /* If the result wraps when calculating tenths, return 0. */
2255 #define ASC_TENTHS(num, den) \
2256 (((10 * ((num)/(den))) > (((num) * 10)/(den))) ? \
2257 0 : ((((num) * 10)/(den)) - (10 * ((num)/(den)))))
2260 * Display a message to the console.
2262 #define ASC_PRINT(s) \
2264 printk("advansys: "); \
2268 #define ASC_PRINT1(s, a1) \
2270 printk("advansys: "); \
2271 printk((s), (a1)); \
2274 #define ASC_PRINT2(s, a1, a2) \
2276 printk("advansys: "); \
2277 printk((s), (a1), (a2)); \
2280 #define ASC_PRINT3(s, a1, a2, a3) \
2282 printk("advansys: "); \
2283 printk((s), (a1), (a2), (a3)); \
2286 #define ASC_PRINT4(s, a1, a2, a3, a4) \
2288 printk("advansys: "); \
2289 printk((s), (a1), (a2), (a3), (a4)); \
2292 #ifndef ADVANSYS_DEBUG
2294 #define ASC_DBG(lvl, s)
2295 #define ASC_DBG1(lvl, s, a1)
2296 #define ASC_DBG2(lvl, s, a1, a2)
2297 #define ASC_DBG3(lvl, s, a1, a2, a3)
2298 #define ASC_DBG4(lvl, s, a1, a2, a3, a4)
2299 #define ASC_DBG_PRT_SCSI_HOST(lvl, s)
2300 #define ASC_DBG_PRT_SCSI_CMND(lvl, s)
2301 #define ASC_DBG_PRT_ASC_SCSI_Q(lvl, scsiqp)
2302 #define ASC_DBG_PRT_ADV_SCSI_REQ_Q(lvl, scsiqp)
2303 #define ASC_DBG_PRT_ASC_QDONE_INFO(lvl, qdone)
2304 #define ADV_DBG_PRT_ADV_SCSI_REQ_Q(lvl, scsiqp)
2305 #define ASC_DBG_PRT_HEX(lvl, name, start, length)
2306 #define ASC_DBG_PRT_CDB(lvl, cdb, len)
2307 #define ASC_DBG_PRT_SENSE(lvl, sense, len)
2308 #define ASC_DBG_PRT_INQUIRY(lvl, inq, len)
2310 #else /* ADVANSYS_DEBUG */
2313 * Debugging Message Levels:
2315 * 1: High-Level Tracing
2316 * 2-N: Verbose Tracing
2319 #define ASC_DBG(lvl, s) \
2321 if (asc_dbglvl >= (lvl)) { \
2326 #define ASC_DBG1(lvl, s, a1) \
2328 if (asc_dbglvl >= (lvl)) { \
2329 printk((s), (a1)); \
2333 #define ASC_DBG2(lvl, s, a1, a2) \
2335 if (asc_dbglvl >= (lvl)) { \
2336 printk((s), (a1), (a2)); \
2340 #define ASC_DBG3(lvl, s, a1, a2, a3) \
2342 if (asc_dbglvl >= (lvl)) { \
2343 printk((s), (a1), (a2), (a3)); \
2347 #define ASC_DBG4(lvl, s, a1, a2, a3, a4) \
2349 if (asc_dbglvl >= (lvl)) { \
2350 printk((s), (a1), (a2), (a3), (a4)); \
2354 #define ASC_DBG_PRT_SCSI_HOST(lvl, s) \
2356 if (asc_dbglvl >= (lvl)) { \
2357 asc_prt_scsi_host(s); \
2361 #define ASC_DBG_PRT_SCSI_CMND(lvl, s) \
2363 if (asc_dbglvl >= (lvl)) { \
2364 asc_prt_scsi_cmnd(s); \
2368 #define ASC_DBG_PRT_ASC_SCSI_Q(lvl, scsiqp) \
2370 if (asc_dbglvl >= (lvl)) { \
2371 asc_prt_asc_scsi_q(scsiqp); \
2375 #define ASC_DBG_PRT_ASC_QDONE_INFO(lvl, qdone) \
2377 if (asc_dbglvl >= (lvl)) { \
2378 asc_prt_asc_qdone_info(qdone); \
2382 #define ASC_DBG_PRT_ADV_SCSI_REQ_Q(lvl, scsiqp) \
2384 if (asc_dbglvl >= (lvl)) { \
2385 asc_prt_adv_scsi_req_q(scsiqp); \
2389 #define ASC_DBG_PRT_HEX(lvl, name, start, length) \
2391 if (asc_dbglvl >= (lvl)) { \
2392 asc_prt_hex((name), (start), (length)); \
2396 #define ASC_DBG_PRT_CDB(lvl, cdb, len) \
2397 ASC_DBG_PRT_HEX((lvl), "CDB", (uchar *) (cdb), (len));
2399 #define ASC_DBG_PRT_SENSE(lvl, sense, len) \
2400 ASC_DBG_PRT_HEX((lvl), "SENSE", (uchar *) (sense), (len));
2402 #define ASC_DBG_PRT_INQUIRY(lvl, inq, len) \
2403 ASC_DBG_PRT_HEX((lvl), "INQUIRY", (uchar *) (inq), (len));
2404 #endif /* ADVANSYS_DEBUG */
2406 #ifdef ADVANSYS_STATS
2408 /* Per board statistics structure */
2410 /* Driver Entrypoint Statistics */
2411 ADV_DCNT queuecommand; /* # calls to advansys_queuecommand() */
2412 ADV_DCNT reset; /* # calls to advansys_eh_bus_reset() */
2413 ADV_DCNT biosparam; /* # calls to advansys_biosparam() */
2414 ADV_DCNT interrupt; /* # advansys_interrupt() calls */
2415 ADV_DCNT callback; /* # calls to asc/adv_isr_callback() */
2416 ADV_DCNT done; /* # calls to request's scsi_done function */
2417 ADV_DCNT build_error; /* # asc/adv_build_req() ASC_ERROR returns. */
2418 ADV_DCNT adv_build_noreq; /* # adv_build_req() adv_req_t alloc. fail. */
2419 ADV_DCNT adv_build_nosg; /* # adv_build_req() adv_sgblk_t alloc. fail. */
2420 /* AscExeScsiQueue()/AdvExeScsiQueue() Statistics */
2421 ADV_DCNT exe_noerror; /* # ASC_NOERROR returns. */
2422 ADV_DCNT exe_busy; /* # ASC_BUSY returns. */
2423 ADV_DCNT exe_error; /* # ASC_ERROR returns. */
2424 ADV_DCNT exe_unknown; /* # unknown returns. */
2425 /* Data Transfer Statistics */
2426 ADV_DCNT cont_cnt; /* # non-scatter-gather I/O requests received */
2427 ADV_DCNT cont_xfer; /* # contiguous transfer 512-bytes */
2428 ADV_DCNT sg_cnt; /* # scatter-gather I/O requests received */
2429 ADV_DCNT sg_elem; /* # scatter-gather elements */
2430 ADV_DCNT sg_xfer; /* # scatter-gather transfer 512-bytes */
2432 #endif /* ADVANSYS_STATS */
2435 * Adv Library Request Structures
2437 * The following two structures are used to process Wide Board requests.
2439 * The ADV_SCSI_REQ_Q structure in adv_req_t is passed to the Adv Library
2440 * and microcode with the ADV_SCSI_REQ_Q field 'srb_ptr' pointing to the
2441 * adv_req_t. The adv_req_t structure 'cmndp' field in turn points to the
2442 * Mid-Level SCSI request structure.
2444 * Zero or more ADV_SG_BLOCK are used with each ADV_SCSI_REQ_Q. Each
2445 * ADV_SG_BLOCK structure holds 15 scatter-gather elements. Under Linux
2446 * up to 255 scatter-gather elements may be used per request or
2449 * Both structures must be 32 byte aligned.
2451 typedef struct adv_sgblk {
2452 ADV_SG_BLOCK sg_block; /* Sgblock structure. */
2453 uchar align[32]; /* Sgblock structure padding. */
2454 struct adv_sgblk *next_sgblkp; /* Next scatter-gather structure. */
2457 typedef struct adv_req {
2458 ADV_SCSI_REQ_Q scsi_req_q; /* Adv Library request structure. */
2459 uchar align[32]; /* Request structure padding. */
2460 struct scsi_cmnd *cmndp; /* Mid-Level SCSI command pointer. */
2461 adv_sgblk_t *sgblkp; /* Adv Library scatter-gather pointer. */
2462 struct adv_req *next_reqp; /* Next Request Structure. */
2466 * Structure allocated for each board.
2468 * This structure is allocated by scsi_host_alloc() at the end
2469 * of the 'Scsi_Host' structure starting at the 'hostdata'
2470 * field. It is guaranteed to be allocated from DMA-able memory.
2474 int id; /* Board Id */
2475 uint flags; /* Board flags */
2478 ASC_DVC_VAR asc_dvc_var; /* Narrow board */
2479 ADV_DVC_VAR adv_dvc_var; /* Wide board */
2482 ASC_DVC_CFG asc_dvc_cfg; /* Narrow board */
2483 ADV_DVC_CFG adv_dvc_cfg; /* Wide board */
2485 ushort asc_n_io_port; /* Number I/O ports. */
2486 ADV_SCSI_BIT_ID_TYPE init_tidmask; /* Target init./valid mask */
2487 ushort reqcnt[ADV_MAX_TID + 1]; /* Starvation request count */
2488 ADV_SCSI_BIT_ID_TYPE queue_full; /* Queue full mask */
2489 ushort queue_full_cnt[ADV_MAX_TID + 1]; /* Queue full count */
2491 ASCEEP_CONFIG asc_eep; /* Narrow EEPROM config. */
2492 ADVEEP_3550_CONFIG adv_3550_eep; /* 3550 EEPROM config. */
2493 ADVEEP_38C0800_CONFIG adv_38C0800_eep; /* 38C0800 EEPROM config. */
2494 ADVEEP_38C1600_CONFIG adv_38C1600_eep; /* 38C1600 EEPROM config. */
2496 ulong last_reset; /* Saved last reset time */
2497 spinlock_t lock; /* Board spinlock */
2498 /* /proc/scsi/advansys/[0...] */
2499 char *prtbuf; /* /proc print buffer */
2500 #ifdef ADVANSYS_STATS
2501 struct asc_stats asc_stats; /* Board statistics */
2502 #endif /* ADVANSYS_STATS */
2504 * The following fields are used only for Narrow Boards.
2506 uchar sdtr_data[ASC_MAX_TID + 1]; /* SDTR information */
2508 * The following fields are used only for Wide Boards.
2510 void __iomem *ioremap_addr; /* I/O Memory remap address. */
2511 ushort ioport; /* I/O Port address. */
2512 ADV_CARR_T *carrp; /* ADV_CARR_T memory block. */
2513 adv_req_t *orig_reqp; /* adv_req_t memory block. */
2514 adv_req_t *adv_reqp; /* Request structures. */
2515 adv_sgblk_t *adv_sgblkp; /* Scatter-gather structures. */
2516 ushort bios_signature; /* BIOS Signature. */
2517 ushort bios_version; /* BIOS Version. */
2518 ushort bios_codeseg; /* BIOS Code Segment. */
2519 ushort bios_codelen; /* BIOS Code Segment Length. */
2522 #define adv_dvc_to_board(adv_dvc) container_of(adv_dvc, struct asc_board, \
2523 dvc_var.adv_dvc_var)
2524 #define adv_dvc_to_pdev(adv_dvc) to_pci_dev(adv_dvc_to_board(adv_dvc)->dev)
2526 /* Number of boards detected in system. */
2527 static int asc_board_count;
2529 /* Overrun buffer used by all narrow boards. */
2530 static uchar overrun_buf[ASC_OVERRUN_BSIZE] = { 0 };
2532 #ifdef ADVANSYS_DEBUG
2533 static int asc_dbglvl = 3;
2536 * asc_prt_scsi_host()
2538 static void asc_prt_scsi_host(struct Scsi_Host *s)
2540 struct asc_board *boardp = shost_priv(s);
2542 printk("Scsi_Host at addr 0x%lx\n", (ulong)s);
2543 printk(" host_busy %u, host_no %d, last_reset %d,\n",
2544 s->host_busy, s->host_no, (unsigned)s->last_reset);
2546 printk(" base 0x%lx, io_port 0x%lx, irq 0x%x,\n",
2547 (ulong)s->base, (ulong)s->io_port, boardp->irq);
2549 printk(" dma_channel %d, this_id %d, can_queue %d,\n",
2550 s->dma_channel, s->this_id, s->can_queue);
2552 printk(" cmd_per_lun %d, sg_tablesize %d, unchecked_isa_dma %d\n",
2553 s->cmd_per_lun, s->sg_tablesize, s->unchecked_isa_dma);
2555 if (ASC_NARROW_BOARD(boardp)) {
2556 asc_prt_asc_dvc_var(boardp->dvc_var.asc_dvc_var);
2557 asc_prt_asc_dvc_cfg(boardp->dvc_cfg.asc_dvc_cfg);
2559 asc_prt_adv_dvc_var(boardp->dvc_var.adv_dvc_var);
2560 asc_prt_adv_dvc_cfg(boardp->dvc_cfg.adv_dvc_cfg);
2565 * asc_prt_scsi_cmnd()
2567 static void asc_prt_scsi_cmnd(struct scsi_cmnd *s)
2569 printk("struct scsi_cmnd at addr 0x%lx\n", (ulong)s);
2571 printk(" host 0x%lx, device 0x%lx, target %u, lun %u, channel %u,\n",
2572 (ulong)s->device->host, (ulong)s->device, s->device->id,
2573 s->device->lun, s->device->channel);
2575 asc_prt_hex(" CDB", s->cmnd, s->cmd_len);
2577 printk("sc_data_direction %u, resid %d\n",
2578 s->sc_data_direction, s->resid);
2580 printk(" use_sg %u, sglist_len %u\n", s->use_sg, s->sglist_len);
2582 printk(" serial_number 0x%x, retries %d, allowed %d\n",
2583 (unsigned)s->serial_number, s->retries, s->allowed);
2585 printk(" timeout_per_command %d\n", s->timeout_per_command);
2587 printk(" scsi_done 0x%p, done 0x%p, host_scribble 0x%p, result 0x%x\n",
2588 s->scsi_done, s->done, s->host_scribble, s->result);
2590 printk(" tag %u, pid %u\n", (unsigned)s->tag, (unsigned)s->pid);
2594 * asc_prt_asc_dvc_var()
2596 static void asc_prt_asc_dvc_var(ASC_DVC_VAR *h)
2598 printk("ASC_DVC_VAR at addr 0x%lx\n", (ulong)h);
2600 printk(" iop_base 0x%x, err_code 0x%x, dvc_cntl 0x%x, bug_fix_cntl "
2601 "%d,\n", h->iop_base, h->err_code, h->dvc_cntl, h->bug_fix_cntl);
2603 printk(" bus_type %d, init_sdtr 0x%x,\n", h->bus_type,
2604 (unsigned)h->init_sdtr);
2606 printk(" sdtr_done 0x%x, use_tagged_qng 0x%x, unit_not_ready 0x%x, "
2607 "chip_no 0x%x,\n", (unsigned)h->sdtr_done,
2608 (unsigned)h->use_tagged_qng, (unsigned)h->unit_not_ready,
2609 (unsigned)h->chip_no);
2611 printk(" queue_full_or_busy 0x%x, start_motor 0x%x, scsi_reset_wait "
2612 "%u,\n", (unsigned)h->queue_full_or_busy,
2613 (unsigned)h->start_motor, (unsigned)h->scsi_reset_wait);
2615 printk(" is_in_int %u, max_total_qng %u, cur_total_qng %u, "
2616 "in_critical_cnt %u,\n", (unsigned)h->is_in_int,
2617 (unsigned)h->max_total_qng, (unsigned)h->cur_total_qng,
2618 (unsigned)h->in_critical_cnt);
2620 printk(" last_q_shortage %u, init_state 0x%x, no_scam 0x%x, "
2621 "pci_fix_asyn_xfer 0x%x,\n", (unsigned)h->last_q_shortage,
2622 (unsigned)h->init_state, (unsigned)h->no_scam,
2623 (unsigned)h->pci_fix_asyn_xfer);
2625 printk(" cfg 0x%lx\n", (ulong)h->cfg);
2629 * asc_prt_asc_dvc_cfg()
2631 static void asc_prt_asc_dvc_cfg(ASC_DVC_CFG *h)
2633 printk("ASC_DVC_CFG at addr 0x%lx\n", (ulong)h);
2635 printk(" can_tagged_qng 0x%x, cmd_qng_enabled 0x%x,\n",
2636 h->can_tagged_qng, h->cmd_qng_enabled);
2637 printk(" disc_enable 0x%x, sdtr_enable 0x%x,\n",
2638 h->disc_enable, h->sdtr_enable);
2641 (" chip_scsi_id %d, isa_dma_speed %d, isa_dma_channel %d, chip_version %d,\n",
2642 h->chip_scsi_id, h->isa_dma_speed, h->isa_dma_channel,
2646 (" pci_device_id %d, lib_serial_no %u, lib_version %u, mcode_date 0x%x,\n",
2647 to_pci_dev(h->dev)->device, h->lib_serial_no, h->lib_version,
2650 printk(" mcode_version %d, overrun_buf 0x%lx\n",
2651 h->mcode_version, (ulong)h->overrun_buf);
2655 * asc_prt_asc_scsi_q()
2657 static void asc_prt_asc_scsi_q(ASC_SCSI_Q *q)
2662 printk("ASC_SCSI_Q at addr 0x%lx\n", (ulong)q);
2665 (" target_ix 0x%x, target_lun %u, srb_ptr 0x%lx, tag_code 0x%x,\n",
2666 q->q2.target_ix, q->q1.target_lun, (ulong)q->q2.srb_ptr,
2670 (" data_addr 0x%lx, data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n",
2671 (ulong)le32_to_cpu(q->q1.data_addr),
2672 (ulong)le32_to_cpu(q->q1.data_cnt),
2673 (ulong)le32_to_cpu(q->q1.sense_addr), q->q1.sense_len);
2675 printk(" cdbptr 0x%lx, cdb_len %u, sg_head 0x%lx, sg_queue_cnt %u\n",
2676 (ulong)q->cdbptr, q->q2.cdb_len,
2677 (ulong)q->sg_head, q->q1.sg_queue_cnt);
2681 printk("ASC_SG_HEAD at addr 0x%lx\n", (ulong)sgp);
2682 printk(" entry_cnt %u, queue_cnt %u\n", sgp->entry_cnt,
2684 for (i = 0; i < sgp->entry_cnt; i++) {
2685 printk(" [%u]: addr 0x%lx, bytes %lu\n",
2686 i, (ulong)le32_to_cpu(sgp->sg_list[i].addr),
2687 (ulong)le32_to_cpu(sgp->sg_list[i].bytes));
2694 * asc_prt_asc_qdone_info()
2696 static void asc_prt_asc_qdone_info(ASC_QDONE_INFO *q)
2698 printk("ASC_QDONE_INFO at addr 0x%lx\n", (ulong)q);
2699 printk(" srb_ptr 0x%lx, target_ix %u, cdb_len %u, tag_code %u,\n",
2700 (ulong)q->d2.srb_ptr, q->d2.target_ix, q->d2.cdb_len,
2703 (" done_stat 0x%x, host_stat 0x%x, scsi_stat 0x%x, scsi_msg 0x%x\n",
2704 q->d3.done_stat, q->d3.host_stat, q->d3.scsi_stat, q->d3.scsi_msg);
2708 * asc_prt_adv_dvc_var()
2710 * Display an ADV_DVC_VAR structure.
2712 static void asc_prt_adv_dvc_var(ADV_DVC_VAR *h)
2714 printk(" ADV_DVC_VAR at addr 0x%lx\n", (ulong)h);
2716 printk(" iop_base 0x%lx, err_code 0x%x, ultra_able 0x%x\n",
2717 (ulong)h->iop_base, h->err_code, (unsigned)h->ultra_able);
2719 printk(" isr_callback 0x%lx, sdtr_able 0x%x, wdtr_able 0x%x\n",
2720 (ulong)h->isr_callback, (unsigned)h->sdtr_able,
2721 (unsigned)h->wdtr_able);
2723 printk(" start_motor 0x%x, scsi_reset_wait 0x%x\n",
2724 (unsigned)h->start_motor, (unsigned)h->scsi_reset_wait);
2726 printk(" max_host_qng %u, max_dvc_qng %u, carr_freelist 0x%lxn\n",
2727 (unsigned)h->max_host_qng, (unsigned)h->max_dvc_qng,
2728 (ulong)h->carr_freelist);
2730 printk(" icq_sp 0x%lx, irq_sp 0x%lx\n",
2731 (ulong)h->icq_sp, (ulong)h->irq_sp);
2733 printk(" no_scam 0x%x, tagqng_able 0x%x\n",
2734 (unsigned)h->no_scam, (unsigned)h->tagqng_able);
2736 printk(" chip_scsi_id 0x%x, cfg 0x%lx\n",
2737 (unsigned)h->chip_scsi_id, (ulong)h->cfg);
2741 * asc_prt_adv_dvc_cfg()
2743 * Display an ADV_DVC_CFG structure.
2745 static void asc_prt_adv_dvc_cfg(ADV_DVC_CFG *h)
2747 printk(" ADV_DVC_CFG at addr 0x%lx\n", (ulong)h);
2749 printk(" disc_enable 0x%x, termination 0x%x\n",
2750 h->disc_enable, h->termination);
2752 printk(" chip_version 0x%x, mcode_date 0x%x\n",
2753 h->chip_version, h->mcode_date);
2755 printk(" mcode_version 0x%x, pci_device_id 0x%x, lib_version %u\n",
2756 h->mcode_version, to_pci_dev(h->dev)->device, h->lib_version);
2758 printk(" control_flag 0x%x\n", h->control_flag);
2762 * asc_prt_adv_scsi_req_q()
2764 * Display an ADV_SCSI_REQ_Q structure.
2766 static void asc_prt_adv_scsi_req_q(ADV_SCSI_REQ_Q *q)
2769 struct asc_sg_block *sg_ptr;
2771 printk("ADV_SCSI_REQ_Q at addr 0x%lx\n", (ulong)q);
2773 printk(" target_id %u, target_lun %u, srb_ptr 0x%lx, a_flag 0x%x\n",
2774 q->target_id, q->target_lun, (ulong)q->srb_ptr, q->a_flag);
2776 printk(" cntl 0x%x, data_addr 0x%lx, vdata_addr 0x%lx\n",
2777 q->cntl, (ulong)le32_to_cpu(q->data_addr), (ulong)q->vdata_addr);
2779 printk(" data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n",
2780 (ulong)le32_to_cpu(q->data_cnt),
2781 (ulong)le32_to_cpu(q->sense_addr), q->sense_len);
2784 (" cdb_len %u, done_status 0x%x, host_status 0x%x, scsi_status 0x%x\n",
2785 q->cdb_len, q->done_status, q->host_status, q->scsi_status);
2787 printk(" sg_working_ix 0x%x, target_cmd %u\n",
2788 q->sg_working_ix, q->target_cmd);
2790 printk(" scsiq_rptr 0x%lx, sg_real_addr 0x%lx, sg_list_ptr 0x%lx\n",
2791 (ulong)le32_to_cpu(q->scsiq_rptr),
2792 (ulong)le32_to_cpu(q->sg_real_addr), (ulong)q->sg_list_ptr);
2794 /* Display the request's ADV_SG_BLOCK structures. */
2795 if (q->sg_list_ptr != NULL) {
2799 * 'sg_ptr' is a physical address. Convert it to a virtual
2800 * address by indexing 'sg_blk_cnt' into the virtual address
2801 * array 'sg_list_ptr'.
2803 * XXX - Assumes all SG physical blocks are virtually contiguous.
2806 &(((ADV_SG_BLOCK *)(q->sg_list_ptr))[sg_blk_cnt]);
2807 asc_prt_adv_sgblock(sg_blk_cnt, sg_ptr);
2808 if (sg_ptr->sg_ptr == 0) {
2817 * asc_prt_adv_sgblock()
2819 * Display an ADV_SG_BLOCK structure.
2821 static void asc_prt_adv_sgblock(int sgblockno, ADV_SG_BLOCK *b)
2825 printk(" ASC_SG_BLOCK at addr 0x%lx (sgblockno %d)\n",
2826 (ulong)b, sgblockno);
2827 printk(" sg_cnt %u, sg_ptr 0x%lx\n",
2828 b->sg_cnt, (ulong)le32_to_cpu(b->sg_ptr));
2829 BUG_ON(b->sg_cnt > NO_OF_SG_PER_BLOCK);
2831 BUG_ON(b->sg_cnt != NO_OF_SG_PER_BLOCK);
2832 for (i = 0; i < b->sg_cnt; i++) {
2833 printk(" [%u]: sg_addr 0x%lx, sg_count 0x%lx\n",
2834 i, (ulong)b->sg_list[i].sg_addr,
2835 (ulong)b->sg_list[i].sg_count);
2842 * Print hexadecimal output in 4 byte groupings 32 bytes
2843 * or 8 double-words per line.
2845 static void asc_prt_hex(char *f, uchar *s, int l)
2852 printk("%s: (%d bytes)\n", f, l);
2854 for (i = 0; i < l; i += 32) {
2856 /* Display a maximum of 8 double-words per line. */
2857 if ((k = (l - i) / 4) >= 8) {
2864 for (j = 0; j < k; j++) {
2865 printk(" %2.2X%2.2X%2.2X%2.2X",
2866 (unsigned)s[i + (j * 4)],
2867 (unsigned)s[i + (j * 4) + 1],
2868 (unsigned)s[i + (j * 4) + 2],
2869 (unsigned)s[i + (j * 4) + 3]);
2877 printk(" %2.2X", (unsigned)s[i + (j * 4)]);
2880 printk(" %2.2X%2.2X",
2881 (unsigned)s[i + (j * 4)],
2882 (unsigned)s[i + (j * 4) + 1]);
2885 printk(" %2.2X%2.2X%2.2X",
2886 (unsigned)s[i + (j * 4) + 1],
2887 (unsigned)s[i + (j * 4) + 2],
2888 (unsigned)s[i + (j * 4) + 3]);
2895 #endif /* ADVANSYS_DEBUG */
2900 * Return suitable for printing on the console with the argument
2901 * adapter's configuration information.
2903 * Note: The information line should not exceed ASC_INFO_SIZE bytes,
2904 * otherwise the static 'info' array will be overrun.
2906 static const char *advansys_info(struct Scsi_Host *shost)
2908 static char info[ASC_INFO_SIZE];
2909 struct asc_board *boardp = shost_priv(shost);
2910 ASC_DVC_VAR *asc_dvc_varp;
2911 ADV_DVC_VAR *adv_dvc_varp;
2913 char *widename = NULL;
2915 if (ASC_NARROW_BOARD(boardp)) {
2916 asc_dvc_varp = &boardp->dvc_var.asc_dvc_var;
2917 ASC_DBG(1, "advansys_info: begin\n");
2918 if (asc_dvc_varp->bus_type & ASC_IS_ISA) {
2919 if ((asc_dvc_varp->bus_type & ASC_IS_ISAPNP) ==
2921 busname = "ISA PnP";
2926 "AdvanSys SCSI %s: %s: IO 0x%lX-0x%lX, IRQ 0x%X, DMA 0x%X",
2927 ASC_VERSION, busname,
2928 (ulong)shost->io_port,
2929 (ulong)shost->io_port + ASC_IOADR_GAP - 1,
2930 boardp->irq, shost->dma_channel);
2932 if (asc_dvc_varp->bus_type & ASC_IS_VL) {
2934 } else if (asc_dvc_varp->bus_type & ASC_IS_EISA) {
2936 } else if (asc_dvc_varp->bus_type & ASC_IS_PCI) {
2937 if ((asc_dvc_varp->bus_type & ASC_IS_PCI_ULTRA)
2938 == ASC_IS_PCI_ULTRA) {
2939 busname = "PCI Ultra";
2945 ASC_PRINT2("advansys_info: board %d: unknown "
2946 "bus type %d\n", boardp->id,
2947 asc_dvc_varp->bus_type);
2950 "AdvanSys SCSI %s: %s: IO 0x%lX-0x%lX, IRQ 0x%X",
2951 ASC_VERSION, busname, (ulong)shost->io_port,
2952 (ulong)shost->io_port + ASC_IOADR_GAP - 1,
2957 * Wide Adapter Information
2959 * Memory-mapped I/O is used instead of I/O space to access
2960 * the adapter, but display the I/O Port range. The Memory
2961 * I/O address is displayed through the driver /proc file.
2963 adv_dvc_varp = &boardp->dvc_var.adv_dvc_var;
2964 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
2965 widename = "Ultra-Wide";
2966 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
2967 widename = "Ultra2-Wide";
2969 widename = "Ultra3-Wide";
2972 "AdvanSys SCSI %s: PCI %s: PCIMEM 0x%lX-0x%lX, IRQ 0x%X",
2973 ASC_VERSION, widename, (ulong)adv_dvc_varp->iop_base,
2974 (ulong)adv_dvc_varp->iop_base + boardp->asc_n_io_port - 1, boardp->irq);
2976 BUG_ON(strlen(info) >= ASC_INFO_SIZE);
2977 ASC_DBG(1, "advansys_info: end\n");
2981 #ifdef CONFIG_PROC_FS
2985 * If 'cp' is NULL print to the console, otherwise print to a buffer.
2987 * Return 0 if printing to the console, otherwise return the number of
2988 * bytes written to the buffer.
2990 * Note: If any single line is greater than ASC_PRTLINE_SIZE bytes the stack
2991 * will be corrupted. 's[]' is defined to be ASC_PRTLINE_SIZE bytes.
2993 static int asc_prt_line(char *buf, int buflen, char *fmt, ...)
2997 char s[ASC_PRTLINE_SIZE];
2999 va_start(args, fmt);
3000 ret = vsprintf(s, fmt, args);
3001 BUG_ON(ret >= ASC_PRTLINE_SIZE);
3006 ret = min(buflen, ret);
3007 memcpy(buf, s, ret);
3014 * asc_prt_board_devices()
3016 * Print driver information for devices attached to the board.
3018 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
3019 * cf. asc_prt_line().
3021 * Return the number of characters copied into 'cp'. No more than
3022 * 'cplen' characters will be copied to 'cp'.
3024 static int asc_prt_board_devices(struct Scsi_Host *shost, char *cp, int cplen)
3026 struct asc_board *boardp = shost_priv(shost);
3036 len = asc_prt_line(cp, leftlen,
3037 "\nDevice Information for AdvanSys SCSI Host %d:\n",
3041 if (ASC_NARROW_BOARD(boardp)) {
3042 chip_scsi_id = boardp->dvc_cfg.asc_dvc_cfg.chip_scsi_id;
3044 chip_scsi_id = boardp->dvc_var.adv_dvc_var.chip_scsi_id;
3047 len = asc_prt_line(cp, leftlen, "Target IDs Detected:");
3049 for (i = 0; i <= ADV_MAX_TID; i++) {
3050 if (boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) {
3051 len = asc_prt_line(cp, leftlen, " %X,", i);
3055 len = asc_prt_line(cp, leftlen, " (%X=Host Adapter)\n", chip_scsi_id);
3062 * Display Wide Board BIOS Information.
3064 static int asc_prt_adv_bios(struct Scsi_Host *shost, char *cp, int cplen)
3066 struct asc_board *boardp = shost_priv(shost);
3070 ushort major, minor, letter;
3075 len = asc_prt_line(cp, leftlen, "\nROM BIOS Version: ");
3079 * If the BIOS saved a valid signature, then fill in
3080 * the BIOS code segment base address.
3082 if (boardp->bios_signature != 0x55AA) {
3083 len = asc_prt_line(cp, leftlen, "Disabled or Pre-3.1\n");
3085 len = asc_prt_line(cp, leftlen,
3086 "BIOS either disabled or Pre-3.1. If it is pre-3.1, then a newer version\n");
3088 len = asc_prt_line(cp, leftlen,
3089 "can be found at the ConnectCom FTP site: ftp://ftp.connectcom.net/pub\n");
3092 major = (boardp->bios_version >> 12) & 0xF;
3093 minor = (boardp->bios_version >> 8) & 0xF;
3094 letter = (boardp->bios_version & 0xFF);
3096 len = asc_prt_line(cp, leftlen, "%d.%d%c\n",
3098 letter >= 26 ? '?' : letter + 'A');
3102 * Current available ROM BIOS release is 3.1I for UW
3103 * and 3.2I for U2W. This code doesn't differentiate
3104 * UW and U2W boards.
3106 if (major < 3 || (major <= 3 && minor < 1) ||
3107 (major <= 3 && minor <= 1 && letter < ('I' - 'A'))) {
3108 len = asc_prt_line(cp, leftlen,
3109 "Newer version of ROM BIOS is available at the ConnectCom FTP site:\n");
3111 len = asc_prt_line(cp, leftlen,
3112 "ftp://ftp.connectcom.net/pub\n");
3121 * Add serial number to information bar if signature AAh
3122 * is found in at bit 15-9 (7 bits) of word 1.
3124 * Serial Number consists fo 12 alpha-numeric digits.
3126 * 1 - Product type (A,B,C,D..) Word0: 15-13 (3 bits)
3127 * 2 - MFG Location (A,B,C,D..) Word0: 12-10 (3 bits)
3128 * 3-4 - Product ID (0-99) Word0: 9-0 (10 bits)
3129 * 5 - Product revision (A-J) Word0: " "
3131 * Signature Word1: 15-9 (7 bits)
3132 * 6 - Year (0-9) Word1: 8-6 (3 bits) & Word2: 15 (1 bit)
3133 * 7-8 - Week of the year (1-52) Word1: 5-0 (6 bits)
3135 * 9-12 - Serial Number (A001-Z999) Word2: 14-0 (15 bits)
3137 * Note 1: Only production cards will have a serial number.
3139 * Note 2: Signature is most significant 7 bits (0xFE).
3141 * Returns ASC_TRUE if serial number found, otherwise returns ASC_FALSE.
3143 static int asc_get_eeprom_string(ushort *serialnum, uchar *cp)
3147 if ((serialnum[1] & 0xFE00) != ((ushort)0xAA << 8)) {
3151 * First word - 6 digits.
3155 /* Product type - 1st digit. */
3156 if ((*cp = 'A' + ((w & 0xE000) >> 13)) == 'H') {
3157 /* Product type is P=Prototype */
3162 /* Manufacturing location - 2nd digit. */
3163 *cp++ = 'A' + ((w & 0x1C00) >> 10);
3165 /* Product ID - 3rd, 4th digits. */
3167 *cp++ = '0' + (num / 100);
3169 *cp++ = '0' + (num / 10);
3171 /* Product revision - 5th digit. */
3172 *cp++ = 'A' + (num % 10);
3182 * If bit 15 of third word is set, then the
3183 * last digit of the year is greater than 7.
3185 if (serialnum[2] & 0x8000) {
3186 *cp++ = '8' + ((w & 0x1C0) >> 6);
3188 *cp++ = '0' + ((w & 0x1C0) >> 6);
3191 /* Week of year - 7th, 8th digits. */
3193 *cp++ = '0' + num / 10;
3200 w = serialnum[2] & 0x7FFF;
3202 /* Serial number - 9th digit. */
3203 *cp++ = 'A' + (w / 1000);
3205 /* 10th, 11th, 12th digits. */
3207 *cp++ = '0' + num / 100;
3209 *cp++ = '0' + num / 10;
3213 *cp = '\0'; /* Null Terminate the string. */
3219 * asc_prt_asc_board_eeprom()
3221 * Print board EEPROM configuration.
3223 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
3224 * cf. asc_prt_line().
3226 * Return the number of characters copied into 'cp'. No more than
3227 * 'cplen' characters will be copied to 'cp'.
3229 static int asc_prt_asc_board_eeprom(struct Scsi_Host *shost, char *cp, int cplen)
3231 struct asc_board *boardp = shost_priv(shost);
3232 ASC_DVC_VAR *asc_dvc_varp;
3239 int isa_dma_speed[] = { 10, 8, 7, 6, 5, 4, 3, 2 };
3240 #endif /* CONFIG_ISA */
3241 uchar serialstr[13];
3243 asc_dvc_varp = &boardp->dvc_var.asc_dvc_var;
3244 ep = &boardp->eep_config.asc_eep;
3249 len = asc_prt_line(cp, leftlen,
3250 "\nEEPROM Settings for AdvanSys SCSI Host %d:\n",
3254 if (asc_get_eeprom_string((ushort *)&ep->adapter_info[0], serialstr)
3257 asc_prt_line(cp, leftlen, " Serial Number: %s\n",
3261 if (ep->adapter_info[5] == 0xBB) {
3262 len = asc_prt_line(cp, leftlen,
3263 " Default Settings Used for EEPROM-less Adapter.\n");
3266 len = asc_prt_line(cp, leftlen,
3267 " Serial Number Signature Not Present.\n");
3272 len = asc_prt_line(cp, leftlen,
3273 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
3274 ASC_EEP_GET_CHIP_ID(ep), ep->max_total_qng,
3278 len = asc_prt_line(cp, leftlen,
3279 " cntl 0x%x, no_scam 0x%x\n", ep->cntl, ep->no_scam);
3282 len = asc_prt_line(cp, leftlen, " Target ID: ");
3284 for (i = 0; i <= ASC_MAX_TID; i++) {
3285 len = asc_prt_line(cp, leftlen, " %d", i);
3288 len = asc_prt_line(cp, leftlen, "\n");
3291 len = asc_prt_line(cp, leftlen, " Disconnects: ");
3293 for (i = 0; i <= ASC_MAX_TID; i++) {
3294 len = asc_prt_line(cp, leftlen, " %c",
3296 disc_enable & ADV_TID_TO_TIDMASK(i)) ? 'Y' :
3300 len = asc_prt_line(cp, leftlen, "\n");
3303 len = asc_prt_line(cp, leftlen, " Command Queuing: ");
3305 for (i = 0; i <= ASC_MAX_TID; i++) {
3306 len = asc_prt_line(cp, leftlen, " %c",
3308 use_cmd_qng & ADV_TID_TO_TIDMASK(i)) ? 'Y' :
3312 len = asc_prt_line(cp, leftlen, "\n");
3315 len = asc_prt_line(cp, leftlen, " Start Motor: ");
3317 for (i = 0; i <= ASC_MAX_TID; i++) {
3318 len = asc_prt_line(cp, leftlen, " %c",
3320 start_motor & ADV_TID_TO_TIDMASK(i)) ? 'Y' :
3324 len = asc_prt_line(cp, leftlen, "\n");
3327 len = asc_prt_line(cp, leftlen, " Synchronous Transfer:");
3329 for (i = 0; i <= ASC_MAX_TID; i++) {
3330 len = asc_prt_line(cp, leftlen, " %c",
3332 init_sdtr & ADV_TID_TO_TIDMASK(i)) ? 'Y' :
3336 len = asc_prt_line(cp, leftlen, "\n");
3340 if (asc_dvc_varp->bus_type & ASC_IS_ISA) {
3341 len = asc_prt_line(cp, leftlen,
3342 " Host ISA DMA speed: %d MB/S\n",
3343 isa_dma_speed[ASC_EEP_GET_DMA_SPD(ep)]);
3346 #endif /* CONFIG_ISA */
3352 * asc_prt_adv_board_eeprom()
3354 * Print board EEPROM configuration.
3356 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
3357 * cf. asc_prt_line().
3359 * Return the number of characters copied into 'cp'. No more than
3360 * 'cplen' characters will be copied to 'cp'.
3362 static int asc_prt_adv_board_eeprom(struct Scsi_Host *shost, char *cp, int cplen)
3364 struct asc_board *boardp = shost_priv(shost);
3365 ADV_DVC_VAR *adv_dvc_varp;
3371 uchar serialstr[13];
3372 ADVEEP_3550_CONFIG *ep_3550 = NULL;
3373 ADVEEP_38C0800_CONFIG *ep_38C0800 = NULL;
3374 ADVEEP_38C1600_CONFIG *ep_38C1600 = NULL;
3377 ushort sdtr_speed = 0;
3379 adv_dvc_varp = &boardp->dvc_var.adv_dvc_var;
3380 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
3381 ep_3550 = &boardp->eep_config.adv_3550_eep;
3382 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
3383 ep_38C0800 = &boardp->eep_config.adv_38C0800_eep;
3385 ep_38C1600 = &boardp->eep_config.adv_38C1600_eep;
3391 len = asc_prt_line(cp, leftlen,
3392 "\nEEPROM Settings for AdvanSys SCSI Host %d:\n",
3396 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
3397 wordp = &ep_3550->serial_number_word1;
3398 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
3399 wordp = &ep_38C0800->serial_number_word1;
3401 wordp = &ep_38C1600->serial_number_word1;
3404 if (asc_get_eeprom_string(wordp, serialstr) == ASC_TRUE) {
3406 asc_prt_line(cp, leftlen, " Serial Number: %s\n",
3410 len = asc_prt_line(cp, leftlen,
3411 " Serial Number Signature Not Present.\n");
3415 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
3416 len = asc_prt_line(cp, leftlen,
3417 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
3418 ep_3550->adapter_scsi_id,
3419 ep_3550->max_host_qng, ep_3550->max_dvc_qng);
3421 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
3422 len = asc_prt_line(cp, leftlen,
3423 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
3424 ep_38C0800->adapter_scsi_id,
3425 ep_38C0800->max_host_qng,
3426 ep_38C0800->max_dvc_qng);
3429 len = asc_prt_line(cp, leftlen,
3430 " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n",
3431 ep_38C1600->adapter_scsi_id,
3432 ep_38C1600->max_host_qng,
3433 ep_38C1600->max_dvc_qng);
3436 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
3437 word = ep_3550->termination;
3438 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
3439 word = ep_38C0800->termination_lvd;
3441 word = ep_38C1600->termination_lvd;
3445 termstr = "Low Off/High Off";
3448 termstr = "Low Off/High On";
3451 termstr = "Low On/High On";
3455 termstr = "Automatic";
3459 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
3460 len = asc_prt_line(cp, leftlen,
3461 " termination: %u (%s), bios_ctrl: 0x%x\n",
3462 ep_3550->termination, termstr,
3463 ep_3550->bios_ctrl);
3465 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
3466 len = asc_prt_line(cp, leftlen,
3467 " termination: %u (%s), bios_ctrl: 0x%x\n",
3468 ep_38C0800->termination_lvd, termstr,
3469 ep_38C0800->bios_ctrl);
3472 len = asc_prt_line(cp, leftlen,
3473 " termination: %u (%s), bios_ctrl: 0x%x\n",
3474 ep_38C1600->termination_lvd, termstr,
3475 ep_38C1600->bios_ctrl);
3479 len = asc_prt_line(cp, leftlen, " Target ID: ");
3481 for (i = 0; i <= ADV_MAX_TID; i++) {
3482 len = asc_prt_line(cp, leftlen, " %X", i);
3485 len = asc_prt_line(cp, leftlen, "\n");
3488 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
3489 word = ep_3550->disc_enable;
3490 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
3491 word = ep_38C0800->disc_enable;
3493 word = ep_38C1600->disc_enable;
3495 len = asc_prt_line(cp, leftlen, " Disconnects: ");
3497 for (i = 0; i <= ADV_MAX_TID; i++) {
3498 len = asc_prt_line(cp, leftlen, " %c",
3499 (word & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N');
3502 len = asc_prt_line(cp, leftlen, "\n");
3505 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
3506 word = ep_3550->tagqng_able;
3507 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
3508 word = ep_38C0800->tagqng_able;
3510 word = ep_38C1600->tagqng_able;
3512 len = asc_prt_line(cp, leftlen, " Command Queuing: ");
3514 for (i = 0; i <= ADV_MAX_TID; i++) {
3515 len = asc_prt_line(cp, leftlen, " %c",
3516 (word & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N');
3519 len = asc_prt_line(cp, leftlen, "\n");
3522 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
3523 word = ep_3550->start_motor;
3524 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
3525 word = ep_38C0800->start_motor;
3527 word = ep_38C1600->start_motor;
3529 len = asc_prt_line(cp, leftlen, " Start Motor: ");
3531 for (i = 0; i <= ADV_MAX_TID; i++) {
3532 len = asc_prt_line(cp, leftlen, " %c",
3533 (word & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N');
3536 len = asc_prt_line(cp, leftlen, "\n");
3539 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
3540 len = asc_prt_line(cp, leftlen, " Synchronous Transfer:");
3542 for (i = 0; i <= ADV_MAX_TID; i++) {
3543 len = asc_prt_line(cp, leftlen, " %c",
3545 sdtr_able & ADV_TID_TO_TIDMASK(i)) ?
3549 len = asc_prt_line(cp, leftlen, "\n");
3553 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
3554 len = asc_prt_line(cp, leftlen, " Ultra Transfer: ");
3556 for (i = 0; i <= ADV_MAX_TID; i++) {
3557 len = asc_prt_line(cp, leftlen, " %c",
3559 ultra_able & ADV_TID_TO_TIDMASK(i))
3563 len = asc_prt_line(cp, leftlen, "\n");
3567 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
3568 word = ep_3550->wdtr_able;
3569 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
3570 word = ep_38C0800->wdtr_able;
3572 word = ep_38C1600->wdtr_able;
3574 len = asc_prt_line(cp, leftlen, " Wide Transfer: ");
3576 for (i = 0; i <= ADV_MAX_TID; i++) {
3577 len = asc_prt_line(cp, leftlen, " %c",
3578 (word & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N');
3581 len = asc_prt_line(cp, leftlen, "\n");
3584 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800 ||
3585 adv_dvc_varp->chip_type == ADV_CHIP_ASC38C1600) {
3586 len = asc_prt_line(cp, leftlen,
3587 " Synchronous Transfer Speed (Mhz):\n ");
3589 for (i = 0; i <= ADV_MAX_TID; i++) {
3593 sdtr_speed = adv_dvc_varp->sdtr_speed1;
3594 } else if (i == 4) {
3595 sdtr_speed = adv_dvc_varp->sdtr_speed2;
3596 } else if (i == 8) {
3597 sdtr_speed = adv_dvc_varp->sdtr_speed3;
3598 } else if (i == 12) {
3599 sdtr_speed = adv_dvc_varp->sdtr_speed4;
3601 switch (sdtr_speed & ADV_MAX_TID) {
3624 len = asc_prt_line(cp, leftlen, "%X:%s ", i, speed_str);
3627 len = asc_prt_line(cp, leftlen, "\n ");
3632 len = asc_prt_line(cp, leftlen, "\n");
3640 * asc_prt_driver_conf()
3642 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
3643 * cf. asc_prt_line().
3645 * Return the number of characters copied into 'cp'. No more than
3646 * 'cplen' characters will be copied to 'cp'.
3648 static int asc_prt_driver_conf(struct Scsi_Host *shost, char *cp, int cplen)
3650 struct asc_board *boardp = shost_priv(shost);
3659 len = asc_prt_line(cp, leftlen,
3660 "\nLinux Driver Configuration and Information for AdvanSys SCSI Host %d:\n",
3664 len = asc_prt_line(cp, leftlen,
3665 " host_busy %u, last_reset %u, max_id %u, max_lun %u, max_channel %u\n",
3666 shost->host_busy, shost->last_reset, shost->max_id,
3667 shost->max_lun, shost->max_channel);
3670 len = asc_prt_line(cp, leftlen,
3671 " unique_id %d, can_queue %d, this_id %d, sg_tablesize %u, cmd_per_lun %u\n",
3672 shost->unique_id, shost->can_queue, shost->this_id,
3673 shost->sg_tablesize, shost->cmd_per_lun);
3676 len = asc_prt_line(cp, leftlen,
3677 " unchecked_isa_dma %d, use_clustering %d\n",
3678 shost->unchecked_isa_dma, shost->use_clustering);
3681 len = asc_prt_line(cp, leftlen,
3682 " flags 0x%x, last_reset 0x%x, jiffies 0x%x, asc_n_io_port 0x%x\n",
3683 boardp->flags, boardp->last_reset, jiffies,
3684 boardp->asc_n_io_port);
3687 len = asc_prt_line(cp, leftlen, " io_port 0x%x\n", shost->io_port);
3690 if (ASC_NARROW_BOARD(boardp)) {
3691 chip_scsi_id = boardp->dvc_cfg.asc_dvc_cfg.chip_scsi_id;
3693 chip_scsi_id = boardp->dvc_var.adv_dvc_var.chip_scsi_id;
3700 * asc_prt_asc_board_info()
3702 * Print dynamic board configuration information.
3704 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
3705 * cf. asc_prt_line().
3707 * Return the number of characters copied into 'cp'. No more than
3708 * 'cplen' characters will be copied to 'cp'.
3710 static int asc_prt_asc_board_info(struct Scsi_Host *shost, char *cp, int cplen)
3712 struct asc_board *boardp = shost_priv(shost);
3720 int renegotiate = 0;
3722 v = &boardp->dvc_var.asc_dvc_var;
3723 c = &boardp->dvc_cfg.asc_dvc_cfg;
3724 chip_scsi_id = c->chip_scsi_id;
3729 len = asc_prt_line(cp, leftlen,
3730 "\nAsc Library Configuration and Statistics for AdvanSys SCSI Host %d:\n",
3734 len = asc_prt_line(cp, leftlen,
3735 " chip_version %u, lib_version 0x%x, lib_serial_no %u, mcode_date 0x%x\n",
3736 c->chip_version, c->lib_version, c->lib_serial_no,
3740 len = asc_prt_line(cp, leftlen,
3741 " mcode_version 0x%x, err_code %u\n",
3742 c->mcode_version, v->err_code);
3745 /* Current number of commands waiting for the host. */
3746 len = asc_prt_line(cp, leftlen,
3747 " Total Command Pending: %d\n", v->cur_total_qng);
3750 len = asc_prt_line(cp, leftlen, " Command Queuing:");
3752 for (i = 0; i <= ASC_MAX_TID; i++) {
3753 if ((chip_scsi_id == i) ||
3754 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
3757 len = asc_prt_line(cp, leftlen, " %X:%c",
3760 use_tagged_qng & ADV_TID_TO_TIDMASK(i)) ?
3764 len = asc_prt_line(cp, leftlen, "\n");
3767 /* Current number of commands waiting for a device. */
3768 len = asc_prt_line(cp, leftlen, " Command Queue Pending:");
3770 for (i = 0; i <= ASC_MAX_TID; i++) {
3771 if ((chip_scsi_id == i) ||
3772 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
3775 len = asc_prt_line(cp, leftlen, " %X:%u", i, v->cur_dvc_qng[i]);
3778 len = asc_prt_line(cp, leftlen, "\n");
3781 /* Current limit on number of commands that can be sent to a device. */
3782 len = asc_prt_line(cp, leftlen, " Command Queue Limit:");
3784 for (i = 0; i <= ASC_MAX_TID; i++) {
3785 if ((chip_scsi_id == i) ||
3786 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
3789 len = asc_prt_line(cp, leftlen, " %X:%u", i, v->max_dvc_qng[i]);
3792 len = asc_prt_line(cp, leftlen, "\n");
3795 /* Indicate whether the device has returned queue full status. */
3796 len = asc_prt_line(cp, leftlen, " Command Queue Full:");
3798 for (i = 0; i <= ASC_MAX_TID; i++) {
3799 if ((chip_scsi_id == i) ||
3800 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
3803 if (boardp->queue_full & ADV_TID_TO_TIDMASK(i)) {
3804 len = asc_prt_line(cp, leftlen, " %X:Y-%d",
3805 i, boardp->queue_full_cnt[i]);
3807 len = asc_prt_line(cp, leftlen, " %X:N", i);
3811 len = asc_prt_line(cp, leftlen, "\n");
3814 len = asc_prt_line(cp, leftlen, " Synchronous Transfer:");
3816 for (i = 0; i <= ASC_MAX_TID; i++) {
3817 if ((chip_scsi_id == i) ||
3818 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
3821 len = asc_prt_line(cp, leftlen, " %X:%c",
3824 sdtr_done & ADV_TID_TO_TIDMASK(i)) ? 'Y' :
3828 len = asc_prt_line(cp, leftlen, "\n");
3831 for (i = 0; i <= ASC_MAX_TID; i++) {
3832 uchar syn_period_ix;
3834 if ((chip_scsi_id == i) ||
3835 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0) ||
3836 ((v->init_sdtr & ADV_TID_TO_TIDMASK(i)) == 0)) {
3840 len = asc_prt_line(cp, leftlen, " %X:", i);
3843 if ((boardp->sdtr_data[i] & ASC_SYN_MAX_OFFSET) == 0) {
3844 len = asc_prt_line(cp, leftlen, " Asynchronous");
3848 (boardp->sdtr_data[i] >> 4) & (v->max_sdtr_index -
3851 len = asc_prt_line(cp, leftlen,
3852 " Transfer Period Factor: %d (%d.%d Mhz),",
3853 v->sdtr_period_tbl[syn_period_ix],
3855 v->sdtr_period_tbl[syn_period_ix],
3862 len = asc_prt_line(cp, leftlen, " REQ/ACK Offset: %d",
3864 sdtr_data[i] & ASC_SYN_MAX_OFFSET);
3868 if ((v->sdtr_done & ADV_TID_TO_TIDMASK(i)) == 0) {
3869 len = asc_prt_line(cp, leftlen, "*\n");
3872 len = asc_prt_line(cp, leftlen, "\n");
3878 len = asc_prt_line(cp, leftlen,
3879 " * = Re-negotiation pending before next command.\n");
3887 * asc_prt_adv_board_info()
3889 * Print dynamic board configuration information.
3891 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
3892 * cf. asc_prt_line().
3894 * Return the number of characters copied into 'cp'. No more than
3895 * 'cplen' characters will be copied to 'cp'.
3897 static int asc_prt_adv_board_info(struct Scsi_Host *shost, char *cp, int cplen)
3899 struct asc_board *boardp = shost_priv(shost);
3906 AdvPortAddr iop_base;
3907 ushort chip_scsi_id;
3911 ushort sdtr_able, wdtr_able;
3912 ushort wdtr_done, sdtr_done;
3914 int renegotiate = 0;
3916 v = &boardp->dvc_var.adv_dvc_var;
3917 c = &boardp->dvc_cfg.adv_dvc_cfg;
3918 iop_base = v->iop_base;
3919 chip_scsi_id = v->chip_scsi_id;
3924 len = asc_prt_line(cp, leftlen,
3925 "\nAdv Library Configuration and Statistics for AdvanSys SCSI Host %d:\n",
3929 len = asc_prt_line(cp, leftlen,
3930 " iop_base 0x%lx, cable_detect: %X, err_code %u\n",
3932 AdvReadWordRegister(iop_base,
3933 IOPW_SCSI_CFG1) & CABLE_DETECT,
3937 len = asc_prt_line(cp, leftlen,
3938 " chip_version %u, lib_version 0x%x, mcode_date 0x%x, mcode_version 0x%x\n",
3939 c->chip_version, c->lib_version, c->mcode_date,
3943 AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
3944 len = asc_prt_line(cp, leftlen, " Queuing Enabled:");
3946 for (i = 0; i <= ADV_MAX_TID; i++) {
3947 if ((chip_scsi_id == i) ||
3948 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
3952 len = asc_prt_line(cp, leftlen, " %X:%c",
3954 (tagqng_able & ADV_TID_TO_TIDMASK(i)) ? 'Y' :
3958 len = asc_prt_line(cp, leftlen, "\n");
3961 len = asc_prt_line(cp, leftlen, " Queue Limit:");
3963 for (i = 0; i <= ADV_MAX_TID; i++) {
3964 if ((chip_scsi_id == i) ||
3965 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
3969 AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + i,
3972 len = asc_prt_line(cp, leftlen, " %X:%d", i, lrambyte);
3975 len = asc_prt_line(cp, leftlen, "\n");
3978 len = asc_prt_line(cp, leftlen, " Command Pending:");
3980 for (i = 0; i <= ADV_MAX_TID; i++) {
3981 if ((chip_scsi_id == i) ||
3982 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
3986 AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_QUEUED_CMD + i,
3989 len = asc_prt_line(cp, leftlen, " %X:%d", i, lrambyte);
3992 len = asc_prt_line(cp, leftlen, "\n");
3995 AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
3996 len = asc_prt_line(cp, leftlen, " Wide Enabled:");
3998 for (i = 0; i <= ADV_MAX_TID; i++) {
3999 if ((chip_scsi_id == i) ||
4000 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
4004 len = asc_prt_line(cp, leftlen, " %X:%c",
4006 (wdtr_able & ADV_TID_TO_TIDMASK(i)) ? 'Y' :
4010 len = asc_prt_line(cp, leftlen, "\n");
4013 AdvReadWordLram(iop_base, ASC_MC_WDTR_DONE, wdtr_done);
4014 len = asc_prt_line(cp, leftlen, " Transfer Bit Width:");
4016 for (i = 0; i <= ADV_MAX_TID; i++) {
4017 if ((chip_scsi_id == i) ||
4018 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
4022 AdvReadWordLram(iop_base,
4023 ASC_MC_DEVICE_HSHK_CFG_TABLE + (2 * i),
4026 len = asc_prt_line(cp, leftlen, " %X:%d",
4027 i, (lramword & 0x8000) ? 16 : 8);
4030 if ((wdtr_able & ADV_TID_TO_TIDMASK(i)) &&
4031 (wdtr_done & ADV_TID_TO_TIDMASK(i)) == 0) {
4032 len = asc_prt_line(cp, leftlen, "*");
4037 len = asc_prt_line(cp, leftlen, "\n");
4040 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
4041 len = asc_prt_line(cp, leftlen, " Synchronous Enabled:");
4043 for (i = 0; i <= ADV_MAX_TID; i++) {
4044 if ((chip_scsi_id == i) ||
4045 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) {
4049 len = asc_prt_line(cp, leftlen, " %X:%c",
4051 (sdtr_able & ADV_TID_TO_TIDMASK(i)) ? 'Y' :
4055 len = asc_prt_line(cp, leftlen, "\n");
4058 AdvReadWordLram(iop_base, ASC_MC_SDTR_DONE, sdtr_done);
4059 for (i = 0; i <= ADV_MAX_TID; i++) {
4061 AdvReadWordLram(iop_base,
4062 ASC_MC_DEVICE_HSHK_CFG_TABLE + (2 * i),
4064 lramword &= ~0x8000;
4066 if ((chip_scsi_id == i) ||
4067 ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0) ||
4068 ((sdtr_able & ADV_TID_TO_TIDMASK(i)) == 0)) {
4072 len = asc_prt_line(cp, leftlen, " %X:", i);
4075 if ((lramword & 0x1F) == 0) { /* Check for REQ/ACK Offset 0. */
4076 len = asc_prt_line(cp, leftlen, " Asynchronous");
4080 asc_prt_line(cp, leftlen,
4081 " Transfer Period Factor: ");
4084 if ((lramword & 0x1F00) == 0x1100) { /* 80 Mhz */
4086 asc_prt_line(cp, leftlen, "9 (80.0 Mhz),");
4088 } else if ((lramword & 0x1F00) == 0x1000) { /* 40 Mhz */
4090 asc_prt_line(cp, leftlen, "10 (40.0 Mhz),");
4092 } else { /* 20 Mhz or below. */
4094 period = (((lramword >> 8) * 25) + 50) / 4;
4096 if (period == 0) { /* Should never happen. */
4098 asc_prt_line(cp, leftlen,
4102 len = asc_prt_line(cp, leftlen,
4104 period, 250 / period,
4111 len = asc_prt_line(cp, leftlen, " REQ/ACK Offset: %d",
4116 if ((sdtr_done & ADV_TID_TO_TIDMASK(i)) == 0) {
4117 len = asc_prt_line(cp, leftlen, "*\n");
4120 len = asc_prt_line(cp, leftlen, "\n");
4126 len = asc_prt_line(cp, leftlen,
4127 " * = Re-negotiation pending before next command.\n");
4137 * Copy proc information to a read buffer taking into account the current
4138 * read offset in the file and the remaining space in the read buffer.
4141 asc_proc_copy(off_t advoffset, off_t offset, char *curbuf, int leftlen,
4142 char *cp, int cplen)
4146 ASC_DBG3(2, "asc_proc_copy: offset %d, advoffset %d, cplen %d\n",
4147 (unsigned)offset, (unsigned)advoffset, cplen);
4148 if (offset <= advoffset) {
4149 /* Read offset below current offset, copy everything. */
4150 cnt = min(cplen, leftlen);
4151 ASC_DBG3(2, "asc_proc_copy: curbuf 0x%lx, cp 0x%lx, cnt %d\n",
4152 (ulong)curbuf, (ulong)cp, cnt);
4153 memcpy(curbuf, cp, cnt);
4154 } else if (offset < advoffset + cplen) {
4155 /* Read offset within current range, partial copy. */
4156 cnt = (advoffset + cplen) - offset;
4157 cp = (cp + cplen) - cnt;
4158 cnt = min(cnt, leftlen);
4159 ASC_DBG3(2, "asc_proc_copy: curbuf 0x%lx, cp 0x%lx, cnt %d\n",
4160 (ulong)curbuf, (ulong)cp, cnt);
4161 memcpy(curbuf, cp, cnt);
4166 #ifdef ADVANSYS_STATS
4168 * asc_prt_board_stats()
4170 * Note: no single line should be greater than ASC_PRTLINE_SIZE,
4171 * cf. asc_prt_line().
4173 * Return the number of characters copied into 'cp'. No more than
4174 * 'cplen' characters will be copied to 'cp'.
4176 static int asc_prt_board_stats(struct Scsi_Host *shost, char *cp, int cplen)
4178 struct asc_board *boardp = shost_priv(shost);
4179 struct asc_stats *s = &boardp->asc_stats;
4181 int leftlen = cplen;
4182 int len, totlen = 0;
4184 len = asc_prt_line(cp, leftlen,
4185 "\nLinux Driver Statistics for AdvanSys SCSI Host %d:\n",
4189 len = asc_prt_line(cp, leftlen,
4190 " queuecommand %lu, reset %lu, biosparam %lu, interrupt %lu\n",
4191 s->queuecommand, s->reset, s->biosparam,
4195 len = asc_prt_line(cp, leftlen,
4196 " callback %lu, done %lu, build_error %lu, build_noreq %lu, build_nosg %lu\n",
4197 s->callback, s->done, s->build_error,
4198 s->adv_build_noreq, s->adv_build_nosg);
4201 len = asc_prt_line(cp, leftlen,
4202 " exe_noerror %lu, exe_busy %lu, exe_error %lu, exe_unknown %lu\n",
4203 s->exe_noerror, s->exe_busy, s->exe_error,
4208 * Display data transfer statistics.
4210 if (s->cont_cnt > 0) {
4211 len = asc_prt_line(cp, leftlen, " cont_cnt %lu, ", s->cont_cnt);
4214 len = asc_prt_line(cp, leftlen, "cont_xfer %lu.%01lu kb ",
4216 ASC_TENTHS(s->cont_xfer, 2));
4219 /* Contiguous transfer average size */
4220 len = asc_prt_line(cp, leftlen, "avg_xfer %lu.%01lu kb\n",
4221 (s->cont_xfer / 2) / s->cont_cnt,
4222 ASC_TENTHS((s->cont_xfer / 2), s->cont_cnt));
4226 if (s->sg_cnt > 0) {
4228 len = asc_prt_line(cp, leftlen, " sg_cnt %lu, sg_elem %lu, ",
4229 s->sg_cnt, s->sg_elem);
4232 len = asc_prt_line(cp, leftlen, "sg_xfer %lu.%01lu kb\n",
4233 s->sg_xfer / 2, ASC_TENTHS(s->sg_xfer, 2));
4236 /* Scatter gather transfer statistics */
4237 len = asc_prt_line(cp, leftlen, " avg_num_elem %lu.%01lu, ",
4238 s->sg_elem / s->sg_cnt,
4239 ASC_TENTHS(s->sg_elem, s->sg_cnt));
4242 len = asc_prt_line(cp, leftlen, "avg_elem_size %lu.%01lu kb, ",
4243 (s->sg_xfer / 2) / s->sg_elem,
4244 ASC_TENTHS((s->sg_xfer / 2), s->sg_elem));
4247 len = asc_prt_line(cp, leftlen, "avg_xfer_size %lu.%01lu kb\n",
4248 (s->sg_xfer / 2) / s->sg_cnt,
4249 ASC_TENTHS((s->sg_xfer / 2), s->sg_cnt));
4254 * Display request queuing statistics.
4256 len = asc_prt_line(cp, leftlen,
4257 " Active and Waiting Request Queues (Time Unit: %d HZ):\n",
4263 #endif /* ADVANSYS_STATS */
4266 * advansys_proc_info() - /proc/scsi/advansys/{0,1,2,3,...}
4268 * *buffer: I/O buffer
4269 * **start: if inout == FALSE pointer into buffer where user read should start
4270 * offset: current offset into a /proc/scsi/advansys/[0...] file
4271 * length: length of buffer
4272 * hostno: Scsi_Host host_no
4273 * inout: TRUE - user is writing; FALSE - user is reading
4275 * Return the number of bytes read from or written to a
4276 * /proc/scsi/advansys/[0...] file.
4278 * Note: This function uses the per board buffer 'prtbuf' which is
4279 * allocated when the board is initialized in advansys_detect(). The
4280 * buffer is ASC_PRTBUF_SIZE bytes. The function asc_proc_copy() is
4281 * used to write to the buffer. The way asc_proc_copy() is written
4282 * if 'prtbuf' is too small it will not be overwritten. Instead the
4283 * user just won't get all the available statistics.
4286 advansys_proc_info(struct Scsi_Host *shost, char *buffer, char **start,
4287 off_t offset, int length, int inout)
4289 struct asc_board *boardp = shost_priv(shost);
4298 ASC_DBG(1, "advansys_proc_info: begin\n");
4301 * User write not supported.
4307 * User read of /proc/scsi/advansys/[0...] file.
4310 /* Copy read data starting at the beginning of the buffer. */
4318 * Get board configuration information.
4320 * advansys_info() returns the board string from its own static buffer.
4322 cp = (char *)advansys_info(shost);
4325 /* Copy board information. */
4326 cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen);
4330 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
4337 * Display Wide Board BIOS Information.
4339 if (!ASC_NARROW_BOARD(boardp)) {
4340 cp = boardp->prtbuf;
4341 cplen = asc_prt_adv_bios(shost, cp, ASC_PRTBUF_SIZE);
4342 BUG_ON(cplen >= ASC_PRTBUF_SIZE);
4343 cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp,
4348 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
4356 * Display driver information for each device attached to the board.
4358 cp = boardp->prtbuf;
4359 cplen = asc_prt_board_devices(shost, cp, ASC_PRTBUF_SIZE);
4360 BUG_ON(cplen >= ASC_PRTBUF_SIZE);
4361 cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen);
4365 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
4372 * Display EEPROM configuration for the board.
4374 cp = boardp->prtbuf;
4375 if (ASC_NARROW_BOARD(boardp)) {
4376 cplen = asc_prt_asc_board_eeprom(shost, cp, ASC_PRTBUF_SIZE);
4378 cplen = asc_prt_adv_board_eeprom(shost, cp, ASC_PRTBUF_SIZE);
4380 BUG_ON(cplen >= ASC_PRTBUF_SIZE);
4381 cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen);
4385 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
4392 * Display driver configuration and information for the board.
4394 cp = boardp->prtbuf;
4395 cplen = asc_prt_driver_conf(shost, cp, ASC_PRTBUF_SIZE);
4396 BUG_ON(cplen >= ASC_PRTBUF_SIZE);
4397 cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen);
4401 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
4407 #ifdef ADVANSYS_STATS
4409 * Display driver statistics for the board.
4411 cp = boardp->prtbuf;
4412 cplen = asc_prt_board_stats(shost, cp, ASC_PRTBUF_SIZE);
4413 BUG_ON(cplen >= ASC_PRTBUF_SIZE);
4414 cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen);
4418 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
4423 #endif /* ADVANSYS_STATS */
4426 * Display Asc Library dynamic configuration information
4429 cp = boardp->prtbuf;
4430 if (ASC_NARROW_BOARD(boardp)) {
4431 cplen = asc_prt_asc_board_info(shost, cp, ASC_PRTBUF_SIZE);
4433 cplen = asc_prt_adv_board_info(shost, cp, ASC_PRTBUF_SIZE);
4435 BUG_ON(cplen >= ASC_PRTBUF_SIZE);
4436 cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen);
4440 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
4446 ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt);
4450 #endif /* CONFIG_PROC_FS */
4452 static void asc_scsi_done(struct scsi_cmnd *scp)
4454 struct asc_board *boardp = shost_priv(scp->device->host);
4457 dma_unmap_sg(boardp->dev,
4458 (struct scatterlist *)scp->request_buffer,
4459 scp->use_sg, scp->sc_data_direction);
4460 else if (scp->request_bufflen)
4461 dma_unmap_single(boardp->dev, scp->SCp.dma_handle,
4462 scp->request_bufflen, scp->sc_data_direction);
4464 ASC_STATS(scp->device->host, done);
4466 scp->scsi_done(scp);
4469 static void AscSetBank(PortAddr iop_base, uchar bank)
4473 val = AscGetChipControl(iop_base) &
4475 (CC_SINGLE_STEP | CC_TEST | CC_DIAG | CC_SCSI_RESET |
4479 } else if (bank == 2) {
4480 val |= CC_DIAG | CC_BANK_ONE;
4482 val &= ~CC_BANK_ONE;
4484 AscSetChipControl(iop_base, val);
4488 static void AscSetChipIH(PortAddr iop_base, ushort ins_code)
4490 AscSetBank(iop_base, 1);
4491 AscWriteChipIH(iop_base, ins_code);
4492 AscSetBank(iop_base, 0);
4496 static int AscStartChip(PortAddr iop_base)
4498 AscSetChipControl(iop_base, 0);
4499 if ((AscGetChipStatus(iop_base) & CSW_HALTED) != 0) {
4505 static int AscStopChip(PortAddr iop_base)
4510 AscGetChipControl(iop_base) &
4511 (~(CC_SINGLE_STEP | CC_TEST | CC_DIAG));
4512 AscSetChipControl(iop_base, (uchar)(cc_val | CC_HALT));
4513 AscSetChipIH(iop_base, INS_HALT);
4514 AscSetChipIH(iop_base, INS_RFLAG_WTM);
4515 if ((AscGetChipStatus(iop_base) & CSW_HALTED) == 0) {
4521 static int AscIsChipHalted(PortAddr iop_base)
4523 if ((AscGetChipStatus(iop_base) & CSW_HALTED) != 0) {
4524 if ((AscGetChipControl(iop_base) & CC_HALT) != 0) {
4531 static int AscResetChipAndScsiBus(ASC_DVC_VAR *asc_dvc)
4536 iop_base = asc_dvc->iop_base;
4537 while ((AscGetChipStatus(iop_base) & CSW_SCSI_RESET_ACTIVE)
4541 AscStopChip(iop_base);
4542 AscSetChipControl(iop_base, CC_CHIP_RESET | CC_SCSI_RESET | CC_HALT);
4544 AscSetChipIH(iop_base, INS_RFLAG_WTM);
4545 AscSetChipIH(iop_base, INS_HALT);
4546 AscSetChipControl(iop_base, CC_CHIP_RESET | CC_HALT);
4547 AscSetChipControl(iop_base, CC_HALT);
4549 AscSetChipStatus(iop_base, CIW_CLR_SCSI_RESET_INT);
4550 AscSetChipStatus(iop_base, 0);
4551 return (AscIsChipHalted(iop_base));
4554 static int AscFindSignature(PortAddr iop_base)
4558 ASC_DBG2(1, "AscFindSignature: AscGetChipSignatureByte(0x%x) 0x%x\n",
4559 iop_base, AscGetChipSignatureByte(iop_base));
4560 if (AscGetChipSignatureByte(iop_base) == (uchar)ASC_1000_ID1B) {
4562 "AscFindSignature: AscGetChipSignatureWord(0x%x) 0x%x\n",
4563 iop_base, AscGetChipSignatureWord(iop_base));
4564 sig_word = AscGetChipSignatureWord(iop_base);
4565 if ((sig_word == (ushort)ASC_1000_ID0W) ||
4566 (sig_word == (ushort)ASC_1000_ID0W_FIX)) {
4573 static void AscEnableInterrupt(PortAddr iop_base)
4577 cfg = AscGetChipCfgLsw(iop_base);
4578 AscSetChipCfgLsw(iop_base, cfg | ASC_CFG0_HOST_INT_ON);
4582 static void AscDisableInterrupt(PortAddr iop_base)
4586 cfg = AscGetChipCfgLsw(iop_base);
4587 AscSetChipCfgLsw(iop_base, cfg & (~ASC_CFG0_HOST_INT_ON));
4591 static uchar AscReadLramByte(PortAddr iop_base, ushort addr)
4593 unsigned char byte_data;
4594 unsigned short word_data;
4596 if (isodd_word(addr)) {
4597 AscSetChipLramAddr(iop_base, addr - 1);
4598 word_data = AscGetChipLramData(iop_base);
4599 byte_data = (word_data >> 8) & 0xFF;
4601 AscSetChipLramAddr(iop_base, addr);
4602 word_data = AscGetChipLramData(iop_base);
4603 byte_data = word_data & 0xFF;
4608 static ushort AscReadLramWord(PortAddr iop_base, ushort addr)
4612 AscSetChipLramAddr(iop_base, addr);
4613 word_data = AscGetChipLramData(iop_base);
4617 #if CC_VERY_LONG_SG_LIST
4618 static ASC_DCNT AscReadLramDWord(PortAddr iop_base, ushort addr)
4620 ushort val_low, val_high;
4621 ASC_DCNT dword_data;
4623 AscSetChipLramAddr(iop_base, addr);
4624 val_low = AscGetChipLramData(iop_base);
4625 val_high = AscGetChipLramData(iop_base);
4626 dword_data = ((ASC_DCNT) val_high << 16) | (ASC_DCNT) val_low;
4627 return (dword_data);
4629 #endif /* CC_VERY_LONG_SG_LIST */
4632 AscMemWordSetLram(PortAddr iop_base, ushort s_addr, ushort set_wval, int words)
4636 AscSetChipLramAddr(iop_base, s_addr);
4637 for (i = 0; i < words; i++) {
4638 AscSetChipLramData(iop_base, set_wval);
4642 static void AscWriteLramWord(PortAddr iop_base, ushort addr, ushort word_val)
4644 AscSetChipLramAddr(iop_base, addr);
4645 AscSetChipLramData(iop_base, word_val);
4649 static void AscWriteLramByte(PortAddr iop_base, ushort addr, uchar byte_val)
4653 if (isodd_word(addr)) {
4655 word_data = AscReadLramWord(iop_base, addr);
4656 word_data &= 0x00FF;
4657 word_data |= (((ushort)byte_val << 8) & 0xFF00);
4659 word_data = AscReadLramWord(iop_base, addr);
4660 word_data &= 0xFF00;
4661 word_data |= ((ushort)byte_val & 0x00FF);
4663 AscWriteLramWord(iop_base, addr, word_data);
4668 * Copy 2 bytes to LRAM.
4670 * The source data is assumed to be in little-endian order in memory
4671 * and is maintained in little-endian order when written to LRAM.
4674 AscMemWordCopyPtrToLram(PortAddr iop_base,
4675 ushort s_addr, uchar *s_buffer, int words)
4679 AscSetChipLramAddr(iop_base, s_addr);
4680 for (i = 0; i < 2 * words; i += 2) {
4682 * On a little-endian system the second argument below
4683 * produces a little-endian ushort which is written to
4684 * LRAM in little-endian order. On a big-endian system
4685 * the second argument produces a big-endian ushort which
4686 * is "transparently" byte-swapped by outpw() and written
4687 * in little-endian order to LRAM.
4689 outpw(iop_base + IOP_RAM_DATA,
4690 ((ushort)s_buffer[i + 1] << 8) | s_buffer[i]);
4696 * Copy 4 bytes to LRAM.
4698 * The source data is assumed to be in little-endian order in memory
4699 * and is maintained in little-endian order when writen to LRAM.
4702 AscMemDWordCopyPtrToLram(PortAddr iop_base,
4703 ushort s_addr, uchar *s_buffer, int dwords)
4707 AscSetChipLramAddr(iop_base, s_addr);
4708 for (i = 0; i < 4 * dwords; i += 4) {
4709 outpw(iop_base + IOP_RAM_DATA, ((ushort)s_buffer[i + 1] << 8) | s_buffer[i]); /* LSW */
4710 outpw(iop_base + IOP_RAM_DATA, ((ushort)s_buffer[i + 3] << 8) | s_buffer[i + 2]); /* MSW */
4716 * Copy 2 bytes from LRAM.
4718 * The source data is assumed to be in little-endian order in LRAM
4719 * and is maintained in little-endian order when written to memory.
4722 AscMemWordCopyPtrFromLram(PortAddr iop_base,
4723 ushort s_addr, uchar *d_buffer, int words)
4728 AscSetChipLramAddr(iop_base, s_addr);
4729 for (i = 0; i < 2 * words; i += 2) {
4730 word = inpw(iop_base + IOP_RAM_DATA);
4731 d_buffer[i] = word & 0xff;
4732 d_buffer[i + 1] = (word >> 8) & 0xff;
4737 static ASC_DCNT AscMemSumLramWord(PortAddr iop_base, ushort s_addr, int words)
4743 for (i = 0; i < words; i++, s_addr += 2) {
4744 sum += AscReadLramWord(iop_base, s_addr);
4749 static ushort AscInitLram(ASC_DVC_VAR *asc_dvc)
4756 iop_base = asc_dvc->iop_base;
4758 AscMemWordSetLram(iop_base, ASC_QADR_BEG, 0,
4759 (ushort)(((int)(asc_dvc->max_total_qng + 2 + 1) *
4761 i = ASC_MIN_ACTIVE_QNO;
4762 s_addr = ASC_QADR_BEG + ASC_QBLK_SIZE;
4763 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_FWD),
4765 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_BWD),
4766 (uchar)(asc_dvc->max_total_qng));
4767 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_QNO),
4770 s_addr += ASC_QBLK_SIZE;
4771 for (; i < asc_dvc->max_total_qng; i++, s_addr += ASC_QBLK_SIZE) {
4772 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_FWD),
4774 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_BWD),
4776 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_QNO),
4779 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_FWD),
4780 (uchar)ASC_QLINK_END);
4781 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_BWD),
4782 (uchar)(asc_dvc->max_total_qng - 1));
4783 AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_QNO),
4784 (uchar)asc_dvc->max_total_qng);
4786 s_addr += ASC_QBLK_SIZE;
4787 for (; i <= (uchar)(asc_dvc->max_total_qng + 3);
4788 i++, s_addr += ASC_QBLK_SIZE) {
4789 AscWriteLramByte(iop_base,
4790 (ushort)(s_addr + (ushort)ASC_SCSIQ_B_FWD), i);
4791 AscWriteLramByte(iop_base,
4792 (ushort)(s_addr + (ushort)ASC_SCSIQ_B_BWD), i);
4793 AscWriteLramByte(iop_base,
4794 (ushort)(s_addr + (ushort)ASC_SCSIQ_B_QNO), i);
4800 AscLoadMicroCode(PortAddr iop_base,
4801 ushort s_addr, uchar *mcode_buf, ushort mcode_size)
4804 ushort mcode_word_size;
4805 ushort mcode_chksum;
4807 /* Write the microcode buffer starting at LRAM address 0. */
4808 mcode_word_size = (ushort)(mcode_size >> 1);
4809 AscMemWordSetLram(iop_base, s_addr, 0, mcode_word_size);
4810 AscMemWordCopyPtrToLram(iop_base, s_addr, mcode_buf, mcode_word_size);
4812 chksum = AscMemSumLramWord(iop_base, s_addr, mcode_word_size);
4813 ASC_DBG1(1, "AscLoadMicroCode: chksum 0x%lx\n", (ulong)chksum);
4814 mcode_chksum = (ushort)AscMemSumLramWord(iop_base,
4815 (ushort)ASC_CODE_SEC_BEG,
4816 (ushort)((mcode_size -
4820 ASC_DBG1(1, "AscLoadMicroCode: mcode_chksum 0x%lx\n",
4821 (ulong)mcode_chksum);
4822 AscWriteLramWord(iop_base, ASCV_MCODE_CHKSUM_W, mcode_chksum);
4823 AscWriteLramWord(iop_base, ASCV_MCODE_SIZE_W, mcode_size);
4827 /* Microcode buffer is kept after initialization for error recovery. */
4828 static uchar _asc_mcode_buf[] = {
4829 0x01, 0x03, 0x01, 0x19, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
4830 0x00, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F,
4831 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
4832 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
4833 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
4834 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC3, 0x12, 0x0D, 0x05,
4835 0x01, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
4836 0xFF, 0x80, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
4837 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0xFF,
4838 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
4839 0x00, 0x00, 0xE4, 0x88, 0x00, 0x00, 0x00, 0x00, 0x80, 0x73, 0x48, 0x04,
4840 0x36, 0x00, 0x00, 0xA2, 0xC2, 0x00, 0x80, 0x73, 0x03, 0x23, 0x36, 0x40,
4841 0xB6, 0x00, 0x36, 0x00, 0x05, 0xD6, 0x0C, 0xD2, 0x12, 0xDA, 0x00, 0xA2,
4842 0xC2, 0x00, 0x92, 0x80, 0x1E, 0x98, 0x50, 0x00, 0xF5, 0x00, 0x48, 0x98,
4843 0xDF, 0x23, 0x36, 0x60, 0xB6, 0x00, 0x92, 0x80, 0x4F, 0x00, 0xF5, 0x00,
4844 0x48, 0x98, 0xEF, 0x23, 0x36, 0x60, 0xB6, 0x00, 0x92, 0x80, 0x80, 0x62,
4845 0x92, 0x80, 0x00, 0x46, 0x15, 0xEE, 0x13, 0xEA, 0x02, 0x01, 0x09, 0xD8,
4846 0xCD, 0x04, 0x4D, 0x00, 0x00, 0xA3, 0xD6, 0x00, 0xA6, 0x97, 0x7F, 0x23,
4847 0x04, 0x61, 0x84, 0x01, 0xE6, 0x84, 0xD2, 0xC1, 0x80, 0x73, 0xCD, 0x04,
4848 0x4D, 0x00, 0x00, 0xA3, 0xDA, 0x01, 0xA6, 0x97, 0xC6, 0x81, 0xC2, 0x88,
4849 0x80, 0x73, 0x80, 0x77, 0x00, 0x01, 0x01, 0xA1, 0xFE, 0x00, 0x4F, 0x00,
4850 0x84, 0x97, 0x07, 0xA6, 0x08, 0x01, 0x00, 0x33, 0x03, 0x00, 0xC2, 0x88,
4851 0x03, 0x03, 0x01, 0xDE, 0xC2, 0x88, 0xCE, 0x00, 0x69, 0x60, 0xCE, 0x00,
4852 0x02, 0x03, 0x4A, 0x60, 0x00, 0xA2, 0x78, 0x01, 0x80, 0x63, 0x07, 0xA6,
4853 0x24, 0x01, 0x78, 0x81, 0x03, 0x03, 0x80, 0x63, 0xE2, 0x00, 0x07, 0xA6,
4854 0x34, 0x01, 0x00, 0x33, 0x04, 0x00, 0xC2, 0x88, 0x03, 0x07, 0x02, 0x01,
4855 0x04, 0xCA, 0x0D, 0x23, 0x68, 0x98, 0x4D, 0x04, 0x04, 0x85, 0x05, 0xD8,
4856 0x0D, 0x23, 0x68, 0x98, 0xCD, 0x04, 0x15, 0x23, 0xF8, 0x88, 0xFB, 0x23,
4857 0x02, 0x61, 0x82, 0x01, 0x80, 0x63, 0x02, 0x03, 0x06, 0xA3, 0x62, 0x01,
4858 0x00, 0x33, 0x0A, 0x00, 0xC2, 0x88, 0x4E, 0x00, 0x07, 0xA3, 0x6E, 0x01,
4859 0x00, 0x33, 0x0B, 0x00, 0xC2, 0x88, 0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33,
4860 0x1A, 0x00, 0xC2, 0x88, 0x50, 0x04, 0x88, 0x81, 0x06, 0xAB, 0x82, 0x01,
4861 0x88, 0x81, 0x4E, 0x00, 0x07, 0xA3, 0x92, 0x01, 0x50, 0x00, 0x00, 0xA3,
4862 0x3C, 0x01, 0x00, 0x05, 0x7C, 0x81, 0x46, 0x97, 0x02, 0x01, 0x05, 0xC6,
4863 0x04, 0x23, 0xA0, 0x01, 0x15, 0x23, 0xA1, 0x01, 0xBE, 0x81, 0xFD, 0x23,
4864 0x02, 0x61, 0x82, 0x01, 0x0A, 0xDA, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA0,
4865 0xB4, 0x01, 0x80, 0x63, 0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33, 0x1B, 0x00,
4866 0xC2, 0x88, 0x06, 0x23, 0x68, 0x98, 0xCD, 0x04, 0xE6, 0x84, 0x06, 0x01,
4867 0x00, 0xA2, 0xD4, 0x01, 0x57, 0x60, 0x00, 0xA0, 0xDA, 0x01, 0xE6, 0x84,
4868 0x80, 0x23, 0xA0, 0x01, 0xE6, 0x84, 0x80, 0x73, 0x4B, 0x00, 0x06, 0x61,
4869 0x00, 0xA2, 0x00, 0x02, 0x04, 0x01, 0x0C, 0xDE, 0x02, 0x01, 0x03, 0xCC,
4870 0x4F, 0x00, 0x84, 0x97, 0xFC, 0x81, 0x08, 0x23, 0x02, 0x41, 0x82, 0x01,
4871 0x4F, 0x00, 0x62, 0x97, 0x48, 0x04, 0x84, 0x80, 0xF0, 0x97, 0x00, 0x46,
4872 0x56, 0x00, 0x03, 0xC0, 0x01, 0x23, 0xE8, 0x00, 0x81, 0x73, 0x06, 0x29,
4873 0x03, 0x42, 0x06, 0xE2, 0x03, 0xEE, 0x6B, 0xEB, 0x11, 0x23, 0xF8, 0x88,
4874 0x04, 0x98, 0xF0, 0x80, 0x80, 0x73, 0x80, 0x77, 0x07, 0xA4, 0x2A, 0x02,
4875 0x7C, 0x95, 0x06, 0xA6, 0x34, 0x02, 0x03, 0xA6, 0x4C, 0x04, 0x46, 0x82,
4876 0x04, 0x01, 0x03, 0xD8, 0xB4, 0x98, 0x6A, 0x96, 0x46, 0x82, 0xFE, 0x95,
4877 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0xB6, 0x2D, 0x02, 0xA6, 0x6C, 0x02,
4878 0x07, 0xA6, 0x5A, 0x02, 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x62, 0x02,
4879 0xC2, 0x88, 0x7C, 0x95, 0x48, 0x82, 0x60, 0x96, 0x48, 0x82, 0x04, 0x23,
4880 0xA0, 0x01, 0x14, 0x23, 0xA1, 0x01, 0x3C, 0x84, 0x04, 0x01, 0x0C, 0xDC,
4881 0xE0, 0x23, 0x25, 0x61, 0xEF, 0x00, 0x14, 0x01, 0x4F, 0x04, 0xA8, 0x01,
4882 0x6F, 0x00, 0xA5, 0x01, 0x03, 0x23, 0xA4, 0x01, 0x06, 0x23, 0x9C, 0x01,
4883 0x24, 0x2B, 0x1C, 0x01, 0x02, 0xA6, 0xAA, 0x02, 0x07, 0xA6, 0x5A, 0x02,
4884 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x20, 0x04, 0x01, 0xA6, 0xB4, 0x02,
4885 0x00, 0xA6, 0xB4, 0x02, 0x00, 0x33, 0x12, 0x00, 0xC2, 0x88, 0x00, 0x0E,
4886 0x80, 0x63, 0x00, 0x43, 0x00, 0xA0, 0x8C, 0x02, 0x4D, 0x04, 0x04, 0x01,
4887 0x0B, 0xDC, 0xE7, 0x23, 0x04, 0x61, 0x84, 0x01, 0x10, 0x31, 0x12, 0x35,
4888 0x14, 0x01, 0xEC, 0x00, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00, 0xEA, 0x82,
4889 0x18, 0x23, 0x04, 0x61, 0x18, 0xA0, 0xE2, 0x02, 0x04, 0x01, 0xA2, 0xC8,
4890 0x00, 0x33, 0x1F, 0x00, 0xC2, 0x88, 0x08, 0x31, 0x0A, 0x35, 0x0C, 0x39,
4891 0x0E, 0x3D, 0x7E, 0x98, 0xB6, 0x2D, 0x01, 0xA6, 0x14, 0x03, 0x00, 0xA6,
4892 0x14, 0x03, 0x07, 0xA6, 0x0C, 0x03, 0x06, 0xA6, 0x10, 0x03, 0x03, 0xA6,
4893 0x20, 0x04, 0x02, 0xA6, 0x6C, 0x02, 0x00, 0x33, 0x33, 0x00, 0xC2, 0x88,
4894 0x7C, 0x95, 0xEE, 0x82, 0x60, 0x96, 0xEE, 0x82, 0x82, 0x98, 0x80, 0x42,
4895 0x7E, 0x98, 0x64, 0xE4, 0x04, 0x01, 0x2D, 0xC8, 0x31, 0x05, 0x07, 0x01,
4896 0x00, 0xA2, 0x54, 0x03, 0x00, 0x43, 0x87, 0x01, 0x05, 0x05, 0x86, 0x98,
4897 0x7E, 0x98, 0x00, 0xA6, 0x16, 0x03, 0x07, 0xA6, 0x4C, 0x03, 0x03, 0xA6,
4898 0x3C, 0x04, 0x06, 0xA6, 0x50, 0x03, 0x01, 0xA6, 0x16, 0x03, 0x00, 0x33,
4899 0x25, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0x32, 0x83, 0x60, 0x96, 0x32, 0x83,
4900 0x04, 0x01, 0x10, 0xCE, 0x07, 0xC8, 0x05, 0x05, 0xEB, 0x04, 0x00, 0x33,
4901 0x00, 0x20, 0xC0, 0x20, 0x81, 0x62, 0x72, 0x83, 0x00, 0x01, 0x05, 0x05,
4902 0xFF, 0xA2, 0x7A, 0x03, 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x2E, 0x83,
4903 0x05, 0x05, 0x15, 0x01, 0x00, 0xA2, 0x9A, 0x03, 0xEC, 0x00, 0x6E, 0x00,
4904 0x95, 0x01, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00, 0x01, 0xA6, 0x96, 0x03,
4905 0x00, 0xA6, 0x96, 0x03, 0x10, 0x84, 0x80, 0x42, 0x7E, 0x98, 0x01, 0xA6,
4906 0xA4, 0x03, 0x00, 0xA6, 0xBC, 0x03, 0x10, 0x84, 0xA8, 0x98, 0x80, 0x42,
4907 0x01, 0xA6, 0xA4, 0x03, 0x07, 0xA6, 0xB2, 0x03, 0xD4, 0x83, 0x7C, 0x95,
4908 0xA8, 0x83, 0x00, 0x33, 0x2F, 0x00, 0xC2, 0x88, 0xA8, 0x98, 0x80, 0x42,
4909 0x00, 0xA6, 0xBC, 0x03, 0x07, 0xA6, 0xCA, 0x03, 0xD4, 0x83, 0x7C, 0x95,
4910 0xC0, 0x83, 0x00, 0x33, 0x26, 0x00, 0xC2, 0x88, 0x38, 0x2B, 0x80, 0x32,
4911 0x80, 0x36, 0x04, 0x23, 0xA0, 0x01, 0x12, 0x23, 0xA1, 0x01, 0x10, 0x84,
4912 0x07, 0xF0, 0x06, 0xA4, 0xF4, 0x03, 0x80, 0x6B, 0x80, 0x67, 0x05, 0x23,
4913 0x83, 0x03, 0x80, 0x63, 0x03, 0xA6, 0x0E, 0x04, 0x07, 0xA6, 0x06, 0x04,
4914 0x06, 0xA6, 0x0A, 0x04, 0x00, 0x33, 0x17, 0x00, 0xC2, 0x88, 0x7C, 0x95,
4915 0xF4, 0x83, 0x60, 0x96, 0xF4, 0x83, 0x20, 0x84, 0x07, 0xF0, 0x06, 0xA4,
4916 0x20, 0x04, 0x80, 0x6B, 0x80, 0x67, 0x05, 0x23, 0x83, 0x03, 0x80, 0x63,
4917 0xB6, 0x2D, 0x03, 0xA6, 0x3C, 0x04, 0x07, 0xA6, 0x34, 0x04, 0x06, 0xA6,
4918 0x38, 0x04, 0x00, 0x33, 0x30, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0x20, 0x84,
4919 0x60, 0x96, 0x20, 0x84, 0x1D, 0x01, 0x06, 0xCC, 0x00, 0x33, 0x00, 0x84,
4920 0xC0, 0x20, 0x00, 0x23, 0xEA, 0x00, 0x81, 0x62, 0xA2, 0x0D, 0x80, 0x63,
4921 0x07, 0xA6, 0x5A, 0x04, 0x00, 0x33, 0x18, 0x00, 0xC2, 0x88, 0x03, 0x03,
4922 0x80, 0x63, 0xA3, 0x01, 0x07, 0xA4, 0x64, 0x04, 0x23, 0x01, 0x00, 0xA2,
4923 0x86, 0x04, 0x0A, 0xA0, 0x76, 0x04, 0xE0, 0x00, 0x00, 0x33, 0x1D, 0x00,
4924 0xC2, 0x88, 0x0B, 0xA0, 0x82, 0x04, 0xE0, 0x00, 0x00, 0x33, 0x1E, 0x00,
4925 0xC2, 0x88, 0x42, 0x23, 0xF8, 0x88, 0x00, 0x23, 0x22, 0xA3, 0xE6, 0x04,
4926 0x08, 0x23, 0x22, 0xA3, 0xA2, 0x04, 0x28, 0x23, 0x22, 0xA3, 0xAE, 0x04,
4927 0x02, 0x23, 0x22, 0xA3, 0xC4, 0x04, 0x42, 0x23, 0xF8, 0x88, 0x4A, 0x00,
4928 0x06, 0x61, 0x00, 0xA0, 0xAE, 0x04, 0x45, 0x23, 0xF8, 0x88, 0x04, 0x98,
4929 0x00, 0xA2, 0xC0, 0x04, 0xB4, 0x98, 0x00, 0x33, 0x00, 0x82, 0xC0, 0x20,
4930 0x81, 0x62, 0xE8, 0x81, 0x47, 0x23, 0xF8, 0x88, 0x04, 0x01, 0x0B, 0xDE,
4931 0x04, 0x98, 0xB4, 0x98, 0x00, 0x33, 0x00, 0x81, 0xC0, 0x20, 0x81, 0x62,
4932 0x14, 0x01, 0x00, 0xA0, 0x00, 0x02, 0x43, 0x23, 0xF8, 0x88, 0x04, 0x23,
4933 0xA0, 0x01, 0x44, 0x23, 0xA1, 0x01, 0x80, 0x73, 0x4D, 0x00, 0x03, 0xA3,
4934 0xF4, 0x04, 0x00, 0x33, 0x27, 0x00, 0xC2, 0x88, 0x04, 0x01, 0x04, 0xDC,
4935 0x02, 0x23, 0xA2, 0x01, 0x04, 0x23, 0xA0, 0x01, 0x04, 0x98, 0x26, 0x95,
4936 0x4B, 0x00, 0xF6, 0x00, 0x4F, 0x04, 0x4F, 0x00, 0x00, 0xA3, 0x22, 0x05,
4937 0x00, 0x05, 0x76, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x1C, 0x05, 0x0A, 0x85,
4938 0x46, 0x97, 0xCD, 0x04, 0x24, 0x85, 0x48, 0x04, 0x84, 0x80, 0x02, 0x01,
4939 0x03, 0xDA, 0x80, 0x23, 0x82, 0x01, 0x34, 0x85, 0x02, 0x23, 0xA0, 0x01,
4940 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x40, 0x05, 0x1D, 0x01, 0x04, 0xD6,
4941 0xFF, 0x23, 0x86, 0x41, 0x4B, 0x60, 0xCB, 0x00, 0xFF, 0x23, 0x80, 0x01,
4942 0x49, 0x00, 0x81, 0x01, 0x04, 0x01, 0x02, 0xC8, 0x30, 0x01, 0x80, 0x01,
4943 0xF7, 0x04, 0x03, 0x01, 0x49, 0x04, 0x80, 0x01, 0xC9, 0x00, 0x00, 0x05,
4944 0x00, 0x01, 0xFF, 0xA0, 0x60, 0x05, 0x77, 0x04, 0x01, 0x23, 0xEA, 0x00,
4945 0x5D, 0x00, 0xFE, 0xC7, 0x00, 0x62, 0x00, 0x23, 0xEA, 0x00, 0x00, 0x63,
4946 0x07, 0xA4, 0xF8, 0x05, 0x03, 0x03, 0x02, 0xA0, 0x8E, 0x05, 0xF4, 0x85,
4947 0x00, 0x33, 0x2D, 0x00, 0xC2, 0x88, 0x04, 0xA0, 0xB8, 0x05, 0x80, 0x63,
4948 0x00, 0x23, 0xDF, 0x00, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0xA4, 0x05,
4949 0x1D, 0x01, 0x06, 0xD6, 0x02, 0x23, 0x02, 0x41, 0x82, 0x01, 0x50, 0x00,
4950 0x62, 0x97, 0x04, 0x85, 0x04, 0x23, 0x02, 0x41, 0x82, 0x01, 0x04, 0x85,
4951 0x08, 0xA0, 0xBE, 0x05, 0xF4, 0x85, 0x03, 0xA0, 0xC4, 0x05, 0xF4, 0x85,
4952 0x01, 0xA0, 0xCE, 0x05, 0x88, 0x00, 0x80, 0x63, 0xCC, 0x86, 0x07, 0xA0,
4953 0xEE, 0x05, 0x5F, 0x00, 0x00, 0x2B, 0xDF, 0x08, 0x00, 0xA2, 0xE6, 0x05,
4954 0x80, 0x67, 0x80, 0x63, 0x01, 0xA2, 0x7A, 0x06, 0x7C, 0x85, 0x06, 0x23,
4955 0x68, 0x98, 0x48, 0x23, 0xF8, 0x88, 0x07, 0x23, 0x80, 0x00, 0x06, 0x87,
4956 0x80, 0x63, 0x7C, 0x85, 0x00, 0x23, 0xDF, 0x00, 0x00, 0x63, 0x4A, 0x00,
4957 0x06, 0x61, 0x00, 0xA2, 0x36, 0x06, 0x1D, 0x01, 0x16, 0xD4, 0xC0, 0x23,
4958 0x07, 0x41, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, 0x1C, 0x06, 0x00, 0x33,
4959 0x37, 0x00, 0xC2, 0x88, 0x1D, 0x01, 0x01, 0xD6, 0x20, 0x23, 0x63, 0x60,
4960 0x83, 0x03, 0x80, 0x63, 0x02, 0x23, 0xDF, 0x00, 0x07, 0xA6, 0x7C, 0x05,
4961 0xEF, 0x04, 0x6F, 0x00, 0x00, 0x63, 0x4B, 0x00, 0x06, 0x41, 0xCB, 0x00,
4962 0x52, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x4E, 0x06, 0x1D, 0x01, 0x03, 0xCA,
4963 0xC0, 0x23, 0x07, 0x41, 0x00, 0x63, 0x1D, 0x01, 0x04, 0xCC, 0x00, 0x33,
4964 0x00, 0x83, 0xC0, 0x20, 0x81, 0x62, 0x80, 0x23, 0x07, 0x41, 0x00, 0x63,
4965 0x80, 0x67, 0x08, 0x23, 0x83, 0x03, 0x80, 0x63, 0x00, 0x63, 0x01, 0x23,
4966 0xDF, 0x00, 0x06, 0xA6, 0x84, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x80, 0x67,
4967 0x80, 0x63, 0x00, 0x33, 0x00, 0x40, 0xC0, 0x20, 0x81, 0x62, 0x00, 0x63,
4968 0x00, 0x00, 0xFE, 0x95, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, 0x94, 0x06,
4969 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x00, 0x01, 0xA0, 0x14, 0x07, 0x00, 0x2B,
4970 0x40, 0x0E, 0x80, 0x63, 0x01, 0x00, 0x06, 0xA6, 0xAA, 0x06, 0x07, 0xA6,
4971 0x7C, 0x05, 0x40, 0x0E, 0x80, 0x63, 0x00, 0x43, 0x00, 0xA0, 0xA2, 0x06,
4972 0x06, 0xA6, 0xBC, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x80, 0x67, 0x40, 0x0E,
4973 0x80, 0x63, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x23, 0xDF, 0x00, 0x00, 0x63,
4974 0x07, 0xA6, 0xD6, 0x06, 0x00, 0x33, 0x2A, 0x00, 0xC2, 0x88, 0x03, 0x03,
4975 0x80, 0x63, 0x89, 0x00, 0x0A, 0x2B, 0x07, 0xA6, 0xE8, 0x06, 0x00, 0x33,
4976 0x29, 0x00, 0xC2, 0x88, 0x00, 0x43, 0x00, 0xA2, 0xF4, 0x06, 0xC0, 0x0E,
4977 0x80, 0x63, 0xDE, 0x86, 0xC0, 0x0E, 0x00, 0x33, 0x00, 0x80, 0xC0, 0x20,
4978 0x81, 0x62, 0x04, 0x01, 0x02, 0xDA, 0x80, 0x63, 0x7C, 0x85, 0x80, 0x7B,
4979 0x80, 0x63, 0x06, 0xA6, 0x8C, 0x06, 0x00, 0x33, 0x2C, 0x00, 0xC2, 0x88,
4980 0x0C, 0xA2, 0x2E, 0x07, 0xFE, 0x95, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6,
4981 0x2C, 0x07, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x33, 0x3D, 0x00, 0xC2, 0x88,
4982 0x00, 0x00, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0x0C, 0xA0, 0x44, 0x07,
4983 0x07, 0xA6, 0x7C, 0x05, 0xBF, 0x23, 0x04, 0x61, 0x84, 0x01, 0xE6, 0x84,
4984 0x00, 0x63, 0xF0, 0x04, 0x01, 0x01, 0xF1, 0x00, 0x00, 0x01, 0xF2, 0x00,
4985 0x01, 0x05, 0x80, 0x01, 0x72, 0x04, 0x71, 0x00, 0x81, 0x01, 0x70, 0x04,
4986 0x80, 0x05, 0x81, 0x05, 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04,
4987 0x01, 0x01, 0xF1, 0x00, 0x70, 0x00, 0x81, 0x01, 0x70, 0x04, 0x71, 0x00,
4988 0x81, 0x01, 0x72, 0x00, 0x80, 0x01, 0x71, 0x04, 0x70, 0x00, 0x80, 0x01,
4989 0x70, 0x04, 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x00, 0x01,
4990 0xF1, 0x00, 0x70, 0x00, 0x80, 0x01, 0x70, 0x04, 0x71, 0x00, 0x80, 0x01,
4991 0x72, 0x00, 0x81, 0x01, 0x71, 0x04, 0x70, 0x00, 0x81, 0x01, 0x70, 0x04,
4992 0x00, 0x63, 0x00, 0x23, 0xB3, 0x01, 0x83, 0x05, 0xA3, 0x01, 0xA2, 0x01,
4993 0xA1, 0x01, 0x01, 0x23, 0xA0, 0x01, 0x00, 0x01, 0xC8, 0x00, 0x03, 0xA1,
4994 0xC4, 0x07, 0x00, 0x33, 0x07, 0x00, 0xC2, 0x88, 0x80, 0x05, 0x81, 0x05,
4995 0x04, 0x01, 0x11, 0xC8, 0x48, 0x00, 0xB0, 0x01, 0xB1, 0x01, 0x08, 0x23,
4996 0xB2, 0x01, 0x05, 0x01, 0x48, 0x04, 0x00, 0x43, 0x00, 0xA2, 0xE4, 0x07,
4997 0x00, 0x05, 0xDA, 0x87, 0x00, 0x01, 0xC8, 0x00, 0xFF, 0x23, 0x80, 0x01,
4998 0x05, 0x05, 0x00, 0x63, 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04,
4999 0x00, 0x02, 0x80, 0x43, 0x76, 0x08, 0x80, 0x02, 0x77, 0x04, 0x00, 0x63,
5000 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, 0x00, 0x02, 0x00, 0xA0,
5001 0x14, 0x08, 0x16, 0x88, 0x00, 0x43, 0x76, 0x08, 0x80, 0x02, 0x77, 0x04,
5002 0x00, 0x63, 0xF3, 0x04, 0x00, 0x23, 0xF4, 0x00, 0x74, 0x00, 0x80, 0x43,
5003 0xF4, 0x00, 0xCF, 0x40, 0x00, 0xA2, 0x44, 0x08, 0x74, 0x04, 0x02, 0x01,
5004 0xF7, 0xC9, 0xF6, 0xD9, 0x00, 0x01, 0x01, 0xA1, 0x24, 0x08, 0x04, 0x98,
5005 0x26, 0x95, 0x24, 0x88, 0x73, 0x04, 0x00, 0x63, 0xF3, 0x04, 0x75, 0x04,
5006 0x5A, 0x88, 0x02, 0x01, 0x04, 0xD8, 0x46, 0x97, 0x04, 0x98, 0x26, 0x95,
5007 0x4A, 0x88, 0x75, 0x00, 0x00, 0xA3, 0x64, 0x08, 0x00, 0x05, 0x4E, 0x88,
5008 0x73, 0x04, 0x00, 0x63, 0x80, 0x7B, 0x80, 0x63, 0x06, 0xA6, 0x76, 0x08,
5009 0x00, 0x33, 0x3E, 0x00, 0xC2, 0x88, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63,
5010 0x00, 0x63, 0x38, 0x2B, 0x9C, 0x88, 0x38, 0x2B, 0x92, 0x88, 0x32, 0x09,
5011 0x31, 0x05, 0x92, 0x98, 0x05, 0x05, 0xB2, 0x09, 0x00, 0x63, 0x00, 0x32,
5012 0x00, 0x36, 0x00, 0x3A, 0x00, 0x3E, 0x00, 0x63, 0x80, 0x32, 0x80, 0x36,
5013 0x80, 0x3A, 0x80, 0x3E, 0xB4, 0x3D, 0x00, 0x63, 0x38, 0x2B, 0x40, 0x32,
5014 0x40, 0x36, 0x40, 0x3A, 0x40, 0x3E, 0x00, 0x63, 0x5A, 0x20, 0xC9, 0x40,
5015 0x00, 0xA0, 0xB4, 0x08, 0x5D, 0x00, 0xFE, 0xC3, 0x00, 0x63, 0x80, 0x73,
5016 0xE6, 0x20, 0x02, 0x23, 0xE8, 0x00, 0x82, 0x73, 0xFF, 0xFD, 0x80, 0x73,
5017 0x13, 0x23, 0xF8, 0x88, 0x66, 0x20, 0xC0, 0x20, 0x04, 0x23, 0xA0, 0x01,
5018 0xA1, 0x23, 0xA1, 0x01, 0x81, 0x62, 0xE2, 0x88, 0x80, 0x73, 0x80, 0x77,
5019 0x68, 0x00, 0x00, 0xA2, 0x80, 0x00, 0x03, 0xC2, 0xF1, 0xC7, 0x41, 0x23,
5020 0xF8, 0x88, 0x11, 0x23, 0xA1, 0x01, 0x04, 0x23, 0xA0, 0x01, 0xE6, 0x84,
5023 static unsigned short _asc_mcode_size = sizeof(_asc_mcode_buf);
5024 static ADV_DCNT _asc_mcode_chksum = 0x012C453FUL;
5026 /* Microcode buffer is kept after initialization for error recovery. */
5027 static unsigned char _adv_asc3550_buf[] = {
5028 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0x16, 0x18, 0xe4, 0x00, 0xfc,
5029 0x01, 0x00, 0x48, 0xe4, 0xbe, 0x18, 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00,
5030 0x00, 0xfa, 0xff, 0xff, 0x28, 0x0e, 0x9e, 0xe7, 0xff, 0x00, 0x82, 0xe7,
5031 0x00, 0xea, 0x00, 0xf6, 0x01, 0xe6, 0x09, 0xe7, 0x55, 0xf0, 0x01, 0xf6,
5032 0x01, 0xfa, 0x08, 0x00, 0x03, 0x00, 0x04, 0x00, 0x18, 0xf4, 0x10, 0x00,
5033 0x00, 0xec, 0x85, 0xf0, 0xbc, 0x00, 0xd5, 0xf0, 0x8e, 0x0c, 0x38, 0x54,
5034 0x00, 0xe6, 0x1e, 0xf0, 0x86, 0xf0, 0xb4, 0x00, 0x98, 0x57, 0xd0, 0x01,
5035 0x0c, 0x1c, 0x3e, 0x1c, 0x0c, 0x00, 0xbb, 0x00, 0xaa, 0x18, 0x02, 0x80,
5036 0x32, 0xf0, 0x01, 0xfc, 0x88, 0x0c, 0xc6, 0x12, 0x02, 0x13, 0x18, 0x40,
5037 0x00, 0x57, 0x01, 0xea, 0x3c, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12,
5038 0x3e, 0x57, 0x00, 0x80, 0x03, 0xe6, 0xb6, 0x00, 0xc0, 0x00, 0x01, 0x01,
5039 0x3e, 0x01, 0xda, 0x0f, 0x22, 0x10, 0x08, 0x12, 0x02, 0x4a, 0xb9, 0x54,
5040 0x03, 0x58, 0x1b, 0x80, 0x30, 0xe4, 0x4b, 0xe4, 0x20, 0x00, 0x32, 0x00,
5041 0x3e, 0x00, 0x80, 0x00, 0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01,
5042 0x70, 0x01, 0x72, 0x01, 0x74, 0x01, 0x76, 0x01, 0x78, 0x01, 0x62, 0x0a,
5043 0x92, 0x0c, 0x2c, 0x10, 0x2e, 0x10, 0x06, 0x13, 0x4c, 0x1c, 0xbb, 0x55,
5044 0x3c, 0x56, 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0, 0xb1, 0xf0,
5045 0x03, 0xf7, 0x06, 0xf7, 0x03, 0xfc, 0x0f, 0x00, 0x40, 0x00, 0xbe, 0x00,
5046 0x00, 0x01, 0xb0, 0x08, 0x30, 0x13, 0x64, 0x15, 0x32, 0x1c, 0x38, 0x1c,
5047 0x4e, 0x1c, 0x10, 0x44, 0x02, 0x48, 0x00, 0x4c, 0x04, 0xea, 0x5d, 0xf0,
5048 0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x34, 0x00, 0x36, 0x00, 0x98, 0x00,
5049 0xcc, 0x00, 0x20, 0x01, 0x4e, 0x01, 0x4e, 0x0b, 0x1e, 0x0e, 0x0c, 0x10,
5050 0x0a, 0x12, 0x04, 0x13, 0x40, 0x13, 0x30, 0x1c, 0x00, 0x4e, 0xbd, 0x56,
5051 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0, 0x59, 0xf0, 0xa7, 0xf0,
5052 0xb8, 0xf0, 0x0e, 0xf7, 0x06, 0x00, 0x19, 0x00, 0x33, 0x00, 0x9b, 0x00,
5053 0xa4, 0x00, 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00, 0xe7, 0x00,
5054 0xde, 0x03, 0x56, 0x0a, 0x14, 0x0e, 0x02, 0x10, 0x04, 0x10, 0x0a, 0x10,
5055 0x36, 0x10, 0x0a, 0x13, 0x12, 0x13, 0x52, 0x13, 0x10, 0x15, 0x14, 0x15,
5056 0xac, 0x16, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, 0x08, 0x44, 0x38, 0x44,
5057 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46, 0x01, 0x48, 0x68, 0x54, 0x83, 0x55,
5058 0xb0, 0x57, 0x01, 0x58, 0x83, 0x59, 0x05, 0xe6, 0x0b, 0xf0, 0x0c, 0xf0,
5059 0x5c, 0xf0, 0x4b, 0xf4, 0x04, 0xf8, 0x05, 0xf8, 0x02, 0xfa, 0x03, 0xfa,
5060 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00, 0x0a, 0x00, 0x0d, 0x00, 0x1c, 0x00,
5061 0x9e, 0x00, 0xa8, 0x00, 0xaa, 0x00, 0xb9, 0x00, 0xe0, 0x00, 0x22, 0x01,
5062 0x26, 0x01, 0x79, 0x01, 0x7a, 0x01, 0xc0, 0x01, 0xc2, 0x01, 0x7c, 0x02,
5063 0x5a, 0x03, 0xea, 0x04, 0xe8, 0x07, 0x68, 0x08, 0x69, 0x08, 0xba, 0x08,
5064 0xe9, 0x09, 0x06, 0x0b, 0x3a, 0x0e, 0x00, 0x10, 0x1a, 0x10, 0xed, 0x10,
5065 0xf1, 0x10, 0x06, 0x12, 0x0c, 0x13, 0x16, 0x13, 0x1e, 0x13, 0x82, 0x13,
5066 0x42, 0x14, 0xd6, 0x14, 0x8a, 0x15, 0xc6, 0x17, 0xd2, 0x17, 0x6b, 0x18,
5067 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40, 0x0e, 0x47, 0x48, 0x47,
5068 0x41, 0x48, 0x89, 0x48, 0x80, 0x4c, 0x00, 0x54, 0x44, 0x55, 0xe5, 0x55,
5069 0x14, 0x56, 0x77, 0x57, 0xbf, 0x57, 0x40, 0x5c, 0x06, 0x80, 0x08, 0x90,
5070 0x03, 0xa1, 0xfe, 0x9c, 0xf0, 0x29, 0x02, 0xfe, 0xb8, 0x0c, 0xff, 0x10,
5071 0x00, 0x00, 0xd0, 0xfe, 0xcc, 0x18, 0x00, 0xcf, 0xfe, 0x80, 0x01, 0xff,
5072 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00,
5073 0x00, 0xfe, 0x57, 0x24, 0x00, 0xfe, 0x48, 0x00, 0x4f, 0xff, 0x04, 0x00,
5074 0x00, 0x10, 0xff, 0x09, 0x00, 0x00, 0xff, 0x08, 0x01, 0x01, 0xff, 0x08,
5075 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, 0xff, 0xff, 0xff, 0x0f,
5076 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00,
5077 0xfe, 0x04, 0xf7, 0xcf, 0x2a, 0x67, 0x0b, 0x01, 0xfe, 0xce, 0x0e, 0xfe,
5078 0x04, 0xf7, 0xcf, 0x67, 0x0b, 0x3c, 0x2a, 0xfe, 0x3d, 0xf0, 0xfe, 0x02,
5079 0x02, 0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x91, 0xf0, 0xfe, 0xf0, 0x01, 0xfe,
5080 0x90, 0xf0, 0xfe, 0xf0, 0x01, 0xfe, 0x8f, 0xf0, 0x9c, 0x05, 0x51, 0x3b,
5081 0x02, 0xfe, 0xd4, 0x0c, 0x01, 0xfe, 0x44, 0x0d, 0xfe, 0xdd, 0x12, 0xfe,
5082 0xfc, 0x10, 0xfe, 0x28, 0x1c, 0x05, 0xfe, 0xa6, 0x00, 0xfe, 0xd3, 0x12,
5083 0x47, 0x18, 0xfe, 0xa6, 0x00, 0xb5, 0xfe, 0x48, 0xf0, 0xfe, 0x86, 0x02,
5084 0xfe, 0x49, 0xf0, 0xfe, 0xa0, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xbe, 0x02,
5085 0xfe, 0x46, 0xf0, 0xfe, 0x50, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x56, 0x02,
5086 0xfe, 0x43, 0xf0, 0xfe, 0x44, 0x02, 0xfe, 0x44, 0xf0, 0xfe, 0x48, 0x02,
5087 0xfe, 0x45, 0xf0, 0xfe, 0x4c, 0x02, 0x17, 0x0b, 0xa0, 0x17, 0x06, 0x18,
5088 0x96, 0x02, 0x29, 0xfe, 0x00, 0x1c, 0xde, 0xfe, 0x02, 0x1c, 0xdd, 0xfe,
5089 0x1e, 0x1c, 0xfe, 0xe9, 0x10, 0x01, 0xfe, 0x20, 0x17, 0xfe, 0xe7, 0x10,
5090 0xfe, 0x06, 0xfc, 0xc7, 0x0a, 0x6b, 0x01, 0x9e, 0x02, 0x29, 0x14, 0x4d,
5091 0x37, 0x97, 0x01, 0xfe, 0x64, 0x0f, 0x0a, 0x6b, 0x01, 0x82, 0xfe, 0xbd,
5092 0x10, 0x0a, 0x6b, 0x01, 0x82, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe,
5093 0x58, 0x1c, 0x17, 0x06, 0x18, 0x96, 0x2a, 0x25, 0x29, 0xfe, 0x3d, 0xf0,
5094 0xfe, 0x02, 0x02, 0x21, 0xfe, 0x94, 0x02, 0xfe, 0x5a, 0x1c, 0xea, 0xfe,
5095 0x14, 0x1c, 0x14, 0xfe, 0x30, 0x00, 0x37, 0x97, 0x01, 0xfe, 0x54, 0x0f,
5096 0x17, 0x06, 0x18, 0x96, 0x02, 0xd0, 0x1e, 0x20, 0x07, 0x10, 0x34, 0xfe,
5097 0x69, 0x10, 0x17, 0x06, 0x18, 0x96, 0xfe, 0x04, 0xec, 0x20, 0x46, 0x3d,
5098 0x12, 0x20, 0xfe, 0x05, 0xf6, 0xc7, 0x01, 0xfe, 0x52, 0x16, 0x09, 0x4a,
5099 0x4c, 0x35, 0x11, 0x2d, 0x3c, 0x8a, 0x01, 0xe6, 0x02, 0x29, 0x0a, 0x40,
5100 0x01, 0x0e, 0x07, 0x00, 0x5d, 0x01, 0x6f, 0xfe, 0x18, 0x10, 0xfe, 0x41,
5101 0x58, 0x0a, 0x99, 0x01, 0x0e, 0xfe, 0xc8, 0x54, 0x64, 0xfe, 0x0c, 0x03,
5102 0x01, 0xe6, 0x02, 0x29, 0x2a, 0x46, 0xfe, 0x02, 0xe8, 0x27, 0xf8, 0xfe,
5103 0x9e, 0x43, 0xf7, 0xfe, 0x27, 0xf0, 0xfe, 0xdc, 0x01, 0xfe, 0x07, 0x4b,
5104 0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x40, 0x1c, 0x25, 0xd2, 0xfe, 0x26, 0xf0,
5105 0xfe, 0x56, 0x03, 0xfe, 0xa0, 0xf0, 0xfe, 0x44, 0x03, 0xfe, 0x11, 0xf0,
5106 0x9c, 0xfe, 0xef, 0x10, 0xfe, 0x9f, 0xf0, 0xfe, 0x64, 0x03, 0xeb, 0x0f,
5107 0xfe, 0x11, 0x00, 0x02, 0x5a, 0x2a, 0xfe, 0x48, 0x1c, 0xeb, 0x09, 0x04,
5108 0x1d, 0xfe, 0x18, 0x13, 0x23, 0x1e, 0x98, 0xac, 0x12, 0x98, 0x0a, 0x40,
5109 0x01, 0x0e, 0xac, 0x75, 0x01, 0xfe, 0xbc, 0x15, 0x11, 0xca, 0x25, 0xd2,
5110 0xfe, 0x01, 0xf0, 0xd2, 0xfe, 0x82, 0xf0, 0xfe, 0x92, 0x03, 0xec, 0x11,
5111 0xfe, 0xe4, 0x00, 0x65, 0xfe, 0xa4, 0x03, 0x25, 0x32, 0x1f, 0xfe, 0xb4,
5112 0x03, 0x01, 0x43, 0xfe, 0x06, 0xf0, 0xfe, 0xc4, 0x03, 0x8d, 0x81, 0xfe,
5113 0x0a, 0xf0, 0xfe, 0x7a, 0x06, 0x02, 0x22, 0x05, 0x6b, 0x28, 0x16, 0xfe,
5114 0xf6, 0x04, 0x14, 0x2c, 0x01, 0x33, 0x8f, 0xfe, 0x66, 0x02, 0x02, 0xd1,
5115 0xeb, 0x2a, 0x67, 0x1a, 0xfe, 0x67, 0x1b, 0xf8, 0xf7, 0xfe, 0x48, 0x1c,
5116 0x70, 0x01, 0x6e, 0x87, 0x0a, 0x40, 0x01, 0x0e, 0x07, 0x00, 0x16, 0xd3,
5117 0x0a, 0xca, 0x01, 0x0e, 0x74, 0x60, 0x59, 0x76, 0x27, 0x05, 0x6b, 0x28,
5118 0xfe, 0x10, 0x12, 0x14, 0x2c, 0x01, 0x33, 0x8f, 0xfe, 0x66, 0x02, 0x02,
5119 0xd1, 0xbc, 0x7d, 0xbd, 0x7f, 0x25, 0x22, 0x65, 0xfe, 0x3c, 0x04, 0x1f,
5120 0xfe, 0x38, 0x04, 0x68, 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x4e,
5121 0x12, 0x2b, 0xff, 0x02, 0x00, 0x10, 0x01, 0x08, 0x1f, 0xfe, 0xe0, 0x04,
5122 0x2b, 0x01, 0x08, 0x1f, 0x22, 0x30, 0x2e, 0xd5, 0xfe, 0x4c, 0x44, 0xfe,
5123 0x4c, 0x12, 0x60, 0xfe, 0x44, 0x48, 0x13, 0x2c, 0xfe, 0x4c, 0x54, 0x64,
5124 0xd3, 0x46, 0x76, 0x27, 0xfa, 0xef, 0xfe, 0x62, 0x13, 0x09, 0x04, 0x1d,
5125 0xfe, 0x2a, 0x13, 0x2f, 0x07, 0x7e, 0xa5, 0xfe, 0x20, 0x10, 0x13, 0x2c,
5126 0xfe, 0x4c, 0x54, 0x64, 0xd3, 0xfa, 0xef, 0x86, 0x09, 0x04, 0x1d, 0xfe,
5127 0x08, 0x13, 0x2f, 0x07, 0x7e, 0x6e, 0x09, 0x04, 0x1d, 0xfe, 0x1c, 0x12,
5128 0x14, 0x92, 0x09, 0x04, 0x06, 0x3b, 0x14, 0xc4, 0x01, 0x33, 0x8f, 0xfe,
5129 0x70, 0x0c, 0x02, 0x22, 0x2b, 0x11, 0xfe, 0xe6, 0x00, 0xfe, 0x1c, 0x90,
5130 0xf9, 0x03, 0x14, 0x92, 0x01, 0x33, 0x02, 0x29, 0xfe, 0x42, 0x5b, 0x67,
5131 0x1a, 0xfe, 0x46, 0x59, 0xf8, 0xf7, 0xfe, 0x87, 0x80, 0xfe, 0x31, 0xe4,
5132 0x4f, 0x09, 0x04, 0x0b, 0xfe, 0x78, 0x13, 0xfe, 0x20, 0x80, 0x07, 0x1a,
5133 0xfe, 0x70, 0x12, 0x49, 0x04, 0x06, 0xfe, 0x60, 0x13, 0x05, 0xfe, 0xa2,
5134 0x00, 0x28, 0x16, 0xfe, 0x80, 0x05, 0xfe, 0x31, 0xe4, 0x6a, 0x49, 0x04,
5135 0x0b, 0xfe, 0x4a, 0x13, 0x05, 0xfe, 0xa0, 0x00, 0x28, 0xfe, 0x42, 0x12,
5136 0x5e, 0x01, 0x08, 0x25, 0x32, 0xf1, 0x01, 0x08, 0x26, 0xfe, 0x98, 0x05,
5137 0x11, 0xfe, 0xe3, 0x00, 0x23, 0x49, 0xfe, 0x4a, 0xf0, 0xfe, 0x6a, 0x05,
5138 0xfe, 0x49, 0xf0, 0xfe, 0x64, 0x05, 0x83, 0x24, 0xfe, 0x21, 0x00, 0xa1,
5139 0x24, 0xfe, 0x22, 0x00, 0xa0, 0x24, 0x4c, 0xfe, 0x09, 0x48, 0x01, 0x08,
5140 0x26, 0xfe, 0x98, 0x05, 0xfe, 0xe2, 0x08, 0x49, 0x04, 0xc5, 0x3b, 0x01,
5141 0x86, 0x24, 0x06, 0x12, 0xcc, 0x37, 0xfe, 0x27, 0x01, 0x09, 0x04, 0x1d,
5142 0xfe, 0x22, 0x12, 0x47, 0x01, 0xa7, 0x14, 0x92, 0x09, 0x04, 0x06, 0x3b,
5143 0x14, 0xc4, 0x01, 0x33, 0x8f, 0xfe, 0x70, 0x0c, 0x02, 0x22, 0x05, 0xfe,
5144 0x9c, 0x00, 0x28, 0xfe, 0x3e, 0x12, 0x05, 0x50, 0x28, 0xfe, 0x36, 0x13,
5145 0x47, 0x01, 0xa7, 0x26, 0xfe, 0x08, 0x06, 0x0a, 0x06, 0x49, 0x04, 0x19,
5146 0xfe, 0x02, 0x12, 0x5f, 0x01, 0xfe, 0xaa, 0x14, 0x1f, 0xfe, 0xfe, 0x05,
5147 0x11, 0x9a, 0x01, 0x43, 0x11, 0xfe, 0xe5, 0x00, 0x05, 0x50, 0xb4, 0x0c,
5148 0x50, 0x05, 0xc6, 0x28, 0xfe, 0x62, 0x12, 0x05, 0x3f, 0x28, 0xfe, 0x5a,
5149 0x13, 0x01, 0xfe, 0x14, 0x18, 0x01, 0xfe, 0x66, 0x18, 0xfe, 0x43, 0x48,
5150 0xb7, 0x19, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, 0x1c, 0x3d,
5151 0x85, 0xb7, 0x69, 0x47, 0x01, 0xa7, 0x26, 0xfe, 0x72, 0x06, 0x49, 0x04,
5152 0x1b, 0xdf, 0x89, 0x0a, 0x4d, 0x01, 0xfe, 0xd8, 0x14, 0x1f, 0xfe, 0x68,
5153 0x06, 0x11, 0x9a, 0x01, 0x43, 0x11, 0xfe, 0xe5, 0x00, 0x05, 0x3f, 0xb4,
5154 0x0c, 0x3f, 0x17, 0x06, 0x01, 0xa7, 0xec, 0x72, 0x70, 0x01, 0x6e, 0x87,
5155 0x11, 0xfe, 0xe2, 0x00, 0x01, 0x08, 0x25, 0x32, 0xfe, 0x0a, 0xf0, 0xfe,
5156 0xa6, 0x06, 0x8c, 0xfe, 0x5c, 0x07, 0xfe, 0x06, 0xf0, 0xfe, 0x64, 0x07,
5157 0x8d, 0x81, 0x02, 0x22, 0x09, 0x04, 0x0b, 0xfe, 0x2e, 0x12, 0x15, 0x1a,
5158 0x01, 0x08, 0x15, 0x00, 0x01, 0x08, 0x15, 0x00, 0x01, 0x08, 0x15, 0x00,
5159 0x01, 0x08, 0xfe, 0x99, 0xa4, 0x01, 0x08, 0x15, 0x00, 0x02, 0xfe, 0x32,
5160 0x08, 0x61, 0x04, 0x1b, 0xfe, 0x38, 0x12, 0x09, 0x04, 0x1b, 0x6e, 0x15,
5161 0xfe, 0x1b, 0x00, 0x01, 0x08, 0x15, 0x00, 0x01, 0x08, 0x15, 0x00, 0x01,
5162 0x08, 0x15, 0x00, 0x01, 0x08, 0x15, 0x06, 0x01, 0x08, 0x15, 0x00, 0x02,
5163 0xd9, 0x66, 0x4c, 0xfe, 0x3a, 0x55, 0x5f, 0xfe, 0x9a, 0x81, 0x4b, 0x1d,
5164 0xba, 0xfe, 0x32, 0x07, 0x0a, 0x1d, 0xfe, 0x09, 0x6f, 0xaf, 0xfe, 0xca,
5165 0x45, 0xfe, 0x32, 0x12, 0x62, 0x2c, 0x85, 0x66, 0x7b, 0x01, 0x08, 0x25,
5166 0x32, 0xfe, 0x0a, 0xf0, 0xfe, 0x32, 0x07, 0x8d, 0x81, 0x8c, 0xfe, 0x5c,
5167 0x07, 0x02, 0x22, 0x01, 0x43, 0x02, 0xfe, 0x8a, 0x06, 0x15, 0x19, 0x02,
5168 0xfe, 0x8a, 0x06, 0xfe, 0x9c, 0xf7, 0xd4, 0xfe, 0x2c, 0x90, 0xfe, 0xae,
5169 0x90, 0x77, 0xfe, 0xca, 0x07, 0x0c, 0x54, 0x18, 0x55, 0x09, 0x4a, 0x6a,
5170 0x35, 0x1e, 0x20, 0x07, 0x10, 0xfe, 0x0e, 0x12, 0x74, 0xfe, 0x80, 0x80,
5171 0x37, 0x20, 0x63, 0x27, 0xfe, 0x06, 0x10, 0xfe, 0x83, 0xe7, 0xc4, 0xa1,
5172 0xfe, 0x03, 0x40, 0x09, 0x4a, 0x4f, 0x35, 0x01, 0xa8, 0xad, 0xfe, 0x1f,
5173 0x40, 0x12, 0x58, 0x01, 0xa5, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0xfe,
5174 0x44, 0x51, 0xfe, 0xc6, 0x51, 0x83, 0xfb, 0xfe, 0x8a, 0x90, 0x0c, 0x52,
5175 0x18, 0x53, 0xfe, 0x0c, 0x90, 0xfe, 0x8e, 0x90, 0xfe, 0x40, 0x50, 0xfe,
5176 0xc2, 0x50, 0x0c, 0x39, 0x18, 0x3a, 0xfe, 0x4a, 0x10, 0x09, 0x04, 0x6a,
5177 0xfe, 0x2a, 0x12, 0xfe, 0x2c, 0x90, 0xfe, 0xae, 0x90, 0x0c, 0x54, 0x18,
5178 0x55, 0x09, 0x04, 0x4f, 0x85, 0x01, 0xa8, 0xfe, 0x1f, 0x80, 0x12, 0x58,
5179 0xfe, 0x44, 0x90, 0xfe, 0xc6, 0x90, 0x0c, 0x56, 0x18, 0x57, 0xfb, 0xfe,
5180 0x8a, 0x90, 0x0c, 0x52, 0x18, 0x53, 0xfe, 0x40, 0x90, 0xfe, 0xc2, 0x90,
5181 0x0c, 0x39, 0x18, 0x3a, 0x0c, 0x38, 0x18, 0x4e, 0x09, 0x4a, 0x19, 0x35,
5182 0x2a, 0x13, 0xfe, 0x4e, 0x11, 0x65, 0xfe, 0x48, 0x08, 0xfe, 0x9e, 0xf0,
5183 0xfe, 0x5c, 0x08, 0xb1, 0x16, 0x32, 0x2a, 0x73, 0xdd, 0xb8, 0xfe, 0x80,
5184 0x08, 0xb9, 0xfe, 0x9e, 0x08, 0x8c, 0xfe, 0x74, 0x08, 0xfe, 0x06, 0xf0,
5185 0xfe, 0x7a, 0x08, 0x8d, 0x81, 0x02, 0x22, 0x01, 0x43, 0xfe, 0xc9, 0x10,
5186 0x15, 0x19, 0xfe, 0xc9, 0x10, 0x61, 0x04, 0x06, 0xfe, 0x10, 0x12, 0x61,
5187 0x04, 0x0b, 0x45, 0x09, 0x04, 0x0b, 0xfe, 0x68, 0x12, 0xfe, 0x2e, 0x1c,
5188 0x02, 0xfe, 0x24, 0x0a, 0x61, 0x04, 0x06, 0x45, 0x61, 0x04, 0x0b, 0xfe,
5189 0x52, 0x12, 0xfe, 0x2c, 0x1c, 0xfe, 0xaa, 0xf0, 0xfe, 0x1e, 0x09, 0xfe,
5190 0xac, 0xf0, 0xfe, 0xbe, 0x08, 0xfe, 0x8a, 0x10, 0xaa, 0xfe, 0xf3, 0x10,
5191 0xfe, 0xad, 0xf0, 0xfe, 0xca, 0x08, 0x02, 0xfe, 0x24, 0x0a, 0xab, 0xfe,
5192 0xe7, 0x10, 0xfe, 0x2b, 0xf0, 0x9d, 0xe9, 0x1c, 0xfe, 0x00, 0xfe, 0xfe,
5193 0x1c, 0x12, 0xb5, 0xfe, 0xd2, 0xf0, 0x9d, 0xfe, 0x76, 0x18, 0x1c, 0x1a,
5194 0x16, 0x9d, 0x05, 0xcb, 0x1c, 0x06, 0x16, 0x9d, 0xb8, 0x6d, 0xb9, 0x6d,
5195 0xaa, 0xab, 0xfe, 0xb1, 0x10, 0x70, 0x5e, 0x2b, 0x14, 0x92, 0x01, 0x33,
5196 0x0f, 0xfe, 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x5a, 0x0f, 0x7c, 0x02, 0x5a,
5197 0xfe, 0x74, 0x18, 0x1c, 0xfe, 0x00, 0xf8, 0x16, 0x6d, 0x67, 0x1b, 0x01,
5198 0xfe, 0x44, 0x0d, 0x3b, 0x01, 0xe6, 0x1e, 0x27, 0x74, 0x67, 0x1a, 0x02,
5199 0x6d, 0x09, 0x04, 0x0b, 0x21, 0xfe, 0x06, 0x0a, 0x09, 0x04, 0x6a, 0xfe,
5200 0x82, 0x12, 0x09, 0x04, 0x19, 0xfe, 0x66, 0x13, 0x1e, 0x58, 0xac, 0xfc,
5201 0xfe, 0x83, 0x80, 0xfe, 0xc8, 0x44, 0xfe, 0x2e, 0x13, 0xfe, 0x04, 0x91,
5202 0xfe, 0x86, 0x91, 0x63, 0x27, 0xfe, 0x40, 0x59, 0xfe, 0xc1, 0x59, 0x77,
5203 0xd7, 0x05, 0x54, 0x31, 0x55, 0x0c, 0x7b, 0x18, 0x7c, 0xbe, 0x54, 0xbf,
5204 0x55, 0x01, 0xa8, 0xad, 0x63, 0x27, 0x12, 0x58, 0xc0, 0x38, 0xc1, 0x4e,
5205 0x79, 0x56, 0x68, 0x57, 0xf4, 0xf5, 0xfe, 0x04, 0xfa, 0x38, 0xfe, 0x05,
5206 0xfa, 0x4e, 0x01, 0xa5, 0xa2, 0x23, 0x0c, 0x7b, 0x0c, 0x7c, 0x79, 0x56,
5207 0x68, 0x57, 0xfe, 0x12, 0x10, 0x09, 0x04, 0x19, 0x16, 0xd7, 0x79, 0x39,
5208 0x68, 0x3a, 0x09, 0x04, 0xfe, 0xf7, 0x00, 0x35, 0x05, 0x52, 0x31, 0x53,
5209 0xfe, 0x10, 0x58, 0xfe, 0x91, 0x58, 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59,
5210 0x02, 0x6d, 0x09, 0x04, 0x19, 0x16, 0xd7, 0x09, 0x04, 0xfe, 0xf7, 0x00,
5211 0x35, 0xfe, 0x3a, 0x55, 0xfe, 0x19, 0x81, 0x5f, 0xfe, 0x10, 0x90, 0xfe,
5212 0x92, 0x90, 0xfe, 0xd7, 0x10, 0x2f, 0x07, 0x9b, 0x16, 0xfe, 0xc6, 0x08,
5213 0x11, 0x9b, 0x09, 0x04, 0x0b, 0xfe, 0x14, 0x13, 0x05, 0x39, 0x31, 0x3a,
5214 0x77, 0xfe, 0xc6, 0x08, 0xfe, 0x0c, 0x58, 0xfe, 0x8d, 0x58, 0x02, 0x6d,
5215 0x23, 0x47, 0xfe, 0x19, 0x80, 0xde, 0x09, 0x04, 0x0b, 0xfe, 0x1a, 0x12,
5216 0xfe, 0x6c, 0x19, 0xfe, 0x19, 0x41, 0xe9, 0xb5, 0xfe, 0xd1, 0xf0, 0xd9,
5217 0x14, 0x7a, 0x01, 0x33, 0x0f, 0xfe, 0x44, 0x00, 0xfe, 0x8e, 0x10, 0xfe,
5218 0x6c, 0x19, 0xbe, 0x39, 0xfe, 0xed, 0x19, 0xbf, 0x3a, 0xfe, 0x0c, 0x51,
5219 0xfe, 0x8e, 0x51, 0xe9, 0x1c, 0xfe, 0x00, 0xff, 0x34, 0xfe, 0x74, 0x10,
5220 0xb5, 0xfe, 0xd2, 0xf0, 0xfe, 0xb2, 0x0a, 0xfe, 0x76, 0x18, 0x1c, 0x1a,
5221 0x84, 0x05, 0xcb, 0x1c, 0x06, 0xfe, 0x08, 0x13, 0x0f, 0xfe, 0x16, 0x00,
5222 0x02, 0x5a, 0xfe, 0xd1, 0xf0, 0xfe, 0xc4, 0x0a, 0x14, 0x7a, 0x01, 0x33,
5223 0x0f, 0xfe, 0x17, 0x00, 0xfe, 0x42, 0x10, 0xfe, 0xce, 0xf0, 0xfe, 0xca,
5224 0x0a, 0xfe, 0x3c, 0x10, 0xfe, 0xcd, 0xf0, 0xfe, 0xd6, 0x0a, 0x0f, 0xfe,
5225 0x22, 0x00, 0x02, 0x5a, 0xfe, 0xcb, 0xf0, 0xfe, 0xe2, 0x0a, 0x0f, 0xfe,
5226 0x24, 0x00, 0x02, 0x5a, 0xfe, 0xd0, 0xf0, 0xfe, 0xec, 0x0a, 0x0f, 0x93,
5227 0xdc, 0xfe, 0xcf, 0xf0, 0xfe, 0xf6, 0x0a, 0x0f, 0x4c, 0xfe, 0x10, 0x10,
5228 0xfe, 0xcc, 0xf0, 0xd9, 0x61, 0x04, 0x19, 0x3b, 0x0f, 0xfe, 0x12, 0x00,
5229 0x2a, 0x13, 0xfe, 0x4e, 0x11, 0x65, 0xfe, 0x0c, 0x0b, 0xfe, 0x9e, 0xf0,
5230 0xfe, 0x20, 0x0b, 0xb1, 0x16, 0x32, 0x2a, 0x73, 0xdd, 0xb8, 0x22, 0xb9,
5231 0x22, 0x2a, 0xec, 0x65, 0xfe, 0x2c, 0x0b, 0x25, 0x32, 0x8c, 0xfe, 0x48,
5232 0x0b, 0x8d, 0x81, 0xb8, 0xd4, 0xb9, 0xd4, 0x02, 0x22, 0x01, 0x43, 0xfe,
5233 0xdb, 0x10, 0x11, 0xfe, 0xe8, 0x00, 0xaa, 0xab, 0x70, 0xbc, 0x7d, 0xbd,
5234 0x7f, 0xfe, 0x89, 0xf0, 0x22, 0x30, 0x2e, 0xd8, 0xbc, 0x7d, 0xbd, 0x7f,
5235 0x01, 0x08, 0x1f, 0x22, 0x30, 0x2e, 0xd6, 0xb1, 0x45, 0x0f, 0xfe, 0x42,
5236 0x00, 0x02, 0x5a, 0x78, 0x06, 0xfe, 0x81, 0x49, 0x16, 0xfe, 0x38, 0x0c,
5237 0x09, 0x04, 0x0b, 0xfe, 0x44, 0x13, 0x0f, 0x00, 0x4b, 0x0b, 0xfe, 0x54,
5238 0x12, 0x4b, 0xfe, 0x28, 0x00, 0x21, 0xfe, 0xa6, 0x0c, 0x0a, 0x40, 0x01,
5239 0x0e, 0x07, 0x00, 0x5d, 0x3e, 0xfe, 0x28, 0x00, 0xfe, 0xe2, 0x10, 0x01,
5240 0xe7, 0x01, 0xe8, 0x0a, 0x99, 0x01, 0xfe, 0x32, 0x0e, 0x59, 0x11, 0x2d,
5241 0x01, 0x6f, 0x02, 0x29, 0x0f, 0xfe, 0x44, 0x00, 0x4b, 0x0b, 0xdf, 0x3e,
5242 0x0b, 0xfe, 0xb4, 0x10, 0x01, 0x86, 0x3e, 0x0b, 0xfe, 0xaa, 0x10, 0x01,
5243 0x86, 0xfe, 0x19, 0x82, 0xfe, 0x34, 0x46, 0xa3, 0x3e, 0x0b, 0x0f, 0xfe,
5244 0x43, 0x00, 0xfe, 0x96, 0x10, 0x09, 0x4a, 0x0b, 0x35, 0x01, 0xe7, 0x01,
5245 0xe8, 0x59, 0x11, 0x2d, 0x01, 0x6f, 0x67, 0x0b, 0x59, 0x3c, 0x8a, 0x02,
5246 0xfe, 0x2a, 0x03, 0x09, 0x04, 0x0b, 0x84, 0x3e, 0x0b, 0x0f, 0x00, 0xfe,
5247 0x5c, 0x10, 0x61, 0x04, 0x1b, 0xfe, 0x58, 0x12, 0x09, 0x04, 0x1b, 0xfe,
5248 0x50, 0x13, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x5c, 0x0c, 0xfe,
5249 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x62, 0x0c, 0x09, 0x4a, 0x1b, 0x35,
5250 0xfe, 0xa9, 0x10, 0x0f, 0xfe, 0x15, 0x00, 0xfe, 0x04, 0xe6, 0x0b, 0x5f,
5251 0x5c, 0x0f, 0xfe, 0x13, 0x00, 0xfe, 0x10, 0x10, 0x0f, 0xfe, 0x47, 0x00,
5252 0xa1, 0x0f, 0xfe, 0x41, 0x00, 0xa0, 0x0f, 0xfe, 0x24, 0x00, 0x87, 0xaa,
5253 0xab, 0x70, 0x05, 0x6b, 0x28, 0x21, 0xd1, 0x5f, 0xfe, 0x04, 0xe6, 0x1b,
5254 0xfe, 0x9d, 0x41, 0xfe, 0x1c, 0x42, 0x59, 0x01, 0xda, 0x02, 0x29, 0xea,
5255 0x14, 0x0b, 0x37, 0x95, 0xa9, 0x14, 0xfe, 0x31, 0x00, 0x37, 0x97, 0x01,
5256 0xfe, 0x54, 0x0f, 0x02, 0xd0, 0x3c, 0xfe, 0x06, 0xec, 0xc9, 0xee, 0x3e,
5257 0x1d, 0xfe, 0xce, 0x45, 0x34, 0x3c, 0xfe, 0x06, 0xea, 0xc9, 0xfe, 0x47,
5258 0x4b, 0x89, 0xfe, 0x75, 0x57, 0x05, 0x51, 0xfe, 0x98, 0x56, 0xfe, 0x38,
5259 0x12, 0x0a, 0x42, 0x01, 0x0e, 0xfe, 0x44, 0x48, 0x46, 0x09, 0x04, 0x1d,
5260 0xfe, 0x1a, 0x13, 0x0a, 0x40, 0x01, 0x0e, 0x47, 0xfe, 0x41, 0x58, 0x0a,
5261 0x99, 0x01, 0x0e, 0xfe, 0x49, 0x54, 0x8e, 0xfe, 0x2a, 0x0d, 0x02, 0xfe,
5262 0x2a, 0x03, 0x0a, 0x51, 0xfe, 0xee, 0x14, 0xee, 0x3e, 0x1d, 0xfe, 0xce,
5263 0x45, 0x34, 0x3c, 0xfe, 0xce, 0x47, 0xfe, 0xad, 0x13, 0x02, 0x29, 0x1e,
5264 0x20, 0x07, 0x10, 0xfe, 0x9e, 0x12, 0x23, 0x12, 0x4d, 0x12, 0x94, 0x12,
5265 0xce, 0x1e, 0x2d, 0x47, 0x37, 0x2d, 0xb1, 0xe0, 0xfe, 0xbc, 0xf0, 0xfe,
5266 0xec, 0x0d, 0x13, 0x06, 0x12, 0x4d, 0x01, 0xfe, 0xe2, 0x15, 0x05, 0xfe,
5267 0x38, 0x01, 0x31, 0xfe, 0x3a, 0x01, 0x77, 0xfe, 0xf0, 0x0d, 0xfe, 0x02,
5268 0xec, 0xce, 0x62, 0x00, 0x5d, 0xfe, 0x04, 0xec, 0x20, 0x46, 0xfe, 0x05,
5269 0xf6, 0xfe, 0x34, 0x01, 0x01, 0xfe, 0x52, 0x16, 0xfb, 0xfe, 0x48, 0xf4,
5270 0x0d, 0xfe, 0x18, 0x13, 0xaf, 0xfe, 0x02, 0xea, 0xce, 0x62, 0x7a, 0xfe,
5271 0xc5, 0x13, 0x14, 0x1b, 0x37, 0x95, 0xa9, 0x5c, 0x05, 0xfe, 0x38, 0x01,
5272 0x1c, 0xfe, 0xf0, 0xff, 0x0c, 0xfe, 0x60, 0x01, 0x05, 0xfe, 0x3a, 0x01,
5273 0x0c, 0xfe, 0x62, 0x01, 0x3d, 0x12, 0x20, 0x24, 0x06, 0x12, 0x2d, 0x11,
5274 0x2d, 0x8a, 0x13, 0x06, 0x03, 0x23, 0x03, 0x1e, 0x4d, 0xfe, 0xf7, 0x12,
5275 0x1e, 0x94, 0xac, 0x12, 0x94, 0x07, 0x7a, 0xfe, 0x71, 0x13, 0xfe, 0x24,
5276 0x1c, 0x14, 0x1a, 0x37, 0x95, 0xa9, 0xfe, 0xd9, 0x10, 0xb6, 0xfe, 0x03,
5277 0xdc, 0xfe, 0x73, 0x57, 0xfe, 0x80, 0x5d, 0x03, 0xb6, 0xfe, 0x03, 0xdc,
5278 0xfe, 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x03, 0xfe, 0x03, 0x57, 0xb6, 0x23,
5279 0xfe, 0x00, 0xcc, 0x03, 0xfe, 0x03, 0x57, 0xb6, 0x75, 0x03, 0x09, 0x04,
5280 0x4c, 0xfe, 0x22, 0x13, 0xfe, 0x1c, 0x80, 0x07, 0x06, 0xfe, 0x1a, 0x13,
5281 0xfe, 0x1e, 0x80, 0xe1, 0xfe, 0x1d, 0x80, 0xa4, 0xfe, 0x0c, 0x90, 0xfe,
5282 0x0e, 0x13, 0xfe, 0x0e, 0x90, 0xa3, 0xfe, 0x3c, 0x90, 0xfe, 0x30, 0xf4,
5283 0x0b, 0xfe, 0x3c, 0x50, 0xa0, 0x01, 0xfe, 0x82, 0x16, 0x2f, 0x07, 0x2d,
5284 0xe0, 0x01, 0xfe, 0xbc, 0x15, 0x09, 0x04, 0x1d, 0x45, 0x01, 0xe7, 0x01,
5285 0xe8, 0x11, 0xfe, 0xe9, 0x00, 0x09, 0x04, 0x4c, 0xfe, 0x2c, 0x13, 0x01,
5286 0xfe, 0x14, 0x16, 0xfe, 0x1e, 0x1c, 0xfe, 0x14, 0x90, 0xfe, 0x96, 0x90,
5287 0x0c, 0xfe, 0x64, 0x01, 0x18, 0xfe, 0x66, 0x01, 0x09, 0x04, 0x4f, 0xfe,
5288 0x12, 0x12, 0xfe, 0x03, 0x80, 0x74, 0xfe, 0x01, 0xec, 0x20, 0xfe, 0x80,
5289 0x40, 0x12, 0x20, 0x63, 0x27, 0x11, 0xc8, 0x59, 0x1e, 0x20, 0xed, 0x76,
5290 0x20, 0x03, 0xfe, 0x08, 0x1c, 0x05, 0xfe, 0xac, 0x00, 0xfe, 0x06, 0x58,
5291 0x05, 0xfe, 0xae, 0x00, 0xfe, 0x07, 0x58, 0x05, 0xfe, 0xb0, 0x00, 0xfe,
5292 0x08, 0x58, 0x05, 0xfe, 0xb2, 0x00, 0xfe, 0x09, 0x58, 0xfe, 0x0a, 0x1c,
5293 0x24, 0x69, 0x12, 0xc9, 0x23, 0x0c, 0x50, 0x0c, 0x3f, 0x13, 0x40, 0x48,
5294 0x5f, 0x17, 0x1d, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x21, 0xfe, 0x08,
5295 0x0f, 0x3e, 0x10, 0x13, 0x42, 0x48, 0x17, 0x4c, 0xfe, 0x90, 0x4d, 0xfe,
5296 0x91, 0x54, 0x21, 0xfe, 0x1e, 0x0f, 0x24, 0x10, 0x12, 0x20, 0x78, 0x2c,
5297 0x46, 0x1e, 0x20, 0xed, 0x76, 0x20, 0x11, 0xc8, 0xf6, 0xfe, 0xd6, 0xf0,
5298 0xfe, 0x32, 0x0f, 0xea, 0x70, 0xfe, 0x14, 0x1c, 0xfe, 0x10, 0x1c, 0xfe,
5299 0x18, 0x1c, 0x03, 0x3c, 0xfe, 0x0c, 0x14, 0xee, 0xfe, 0x07, 0xe6, 0x1d,
5300 0xfe, 0xce, 0x47, 0xfe, 0xf5, 0x13, 0x03, 0x01, 0x86, 0x78, 0x2c, 0x46,
5301 0xfa, 0xef, 0xfe, 0x42, 0x13, 0x2f, 0x07, 0x2d, 0xfe, 0x34, 0x13, 0x0a,
5302 0x42, 0x01, 0x0e, 0xb0, 0xfe, 0x36, 0x12, 0xf0, 0xfe, 0x45, 0x48, 0x01,
5303 0xe3, 0xfe, 0x00, 0xcc, 0xb0, 0xfe, 0xf3, 0x13, 0x3d, 0x75, 0x07, 0x10,
5304 0xa3, 0x0a, 0x80, 0x01, 0x0e, 0xfe, 0x80, 0x5c, 0x01, 0x6f, 0xfe, 0x0e,
5305 0x10, 0x07, 0x7e, 0x45, 0xf6, 0xfe, 0xd6, 0xf0, 0xfe, 0x6c, 0x0f, 0x03,
5306 0xfe, 0x44, 0x58, 0x74, 0xfe, 0x01, 0xec, 0x97, 0xfe, 0x9e, 0x40, 0xfe,
5307 0x9d, 0xe7, 0x00, 0xfe, 0x9c, 0xe7, 0x1b, 0x76, 0x27, 0x01, 0xda, 0xfe,
5308 0xdd, 0x10, 0x2a, 0xbc, 0x7d, 0xbd, 0x7f, 0x30, 0x2e, 0xd5, 0x07, 0x1b,
5309 0xfe, 0x48, 0x12, 0x07, 0x0b, 0xfe, 0x56, 0x12, 0x07, 0x1a, 0xfe, 0x30,
5310 0x12, 0x07, 0xc2, 0x16, 0xfe, 0x3e, 0x11, 0x07, 0xfe, 0x23, 0x00, 0x16,
5311 0xfe, 0x4a, 0x11, 0x07, 0x06, 0x16, 0xfe, 0xa8, 0x11, 0x07, 0x19, 0xfe,
5312 0x12, 0x12, 0x07, 0x00, 0x16, 0x22, 0x14, 0xc2, 0x01, 0x33, 0x9f, 0x2b,
5313 0x01, 0x08, 0x8c, 0x43, 0x03, 0x2b, 0xfe, 0x62, 0x08, 0x0a, 0xca, 0x01,
5314 0xfe, 0x32, 0x0e, 0x11, 0x7e, 0x02, 0x29, 0x2b, 0x2f, 0x07, 0x9b, 0xfe,
5315 0xd9, 0x13, 0x79, 0x39, 0x68, 0x3a, 0x77, 0xfe, 0xfc, 0x10, 0x09, 0x04,
5316 0x6a, 0xfe, 0x72, 0x12, 0xc0, 0x38, 0xc1, 0x4e, 0xf4, 0xf5, 0x8e, 0xfe,
5317 0xc6, 0x10, 0x1e, 0x58, 0xfe, 0x26, 0x13, 0x05, 0x7b, 0x31, 0x7c, 0x77,
5318 0xfe, 0x82, 0x0c, 0x0c, 0x54, 0x18, 0x55, 0x23, 0x0c, 0x7b, 0x0c, 0x7c,
5319 0x01, 0xa8, 0x24, 0x69, 0x73, 0x12, 0x58, 0x01, 0xa5, 0xc0, 0x38, 0xc1,
5320 0x4e, 0xfe, 0x04, 0x55, 0xfe, 0xa5, 0x55, 0xfe, 0x04, 0xfa, 0x38, 0xfe,
5321 0x05, 0xfa, 0x4e, 0xfe, 0x91, 0x10, 0x05, 0x56, 0x31, 0x57, 0xfe, 0x40,
5322 0x56, 0xfe, 0xe1, 0x56, 0x0c, 0x56, 0x18, 0x57, 0x83, 0xc0, 0x38, 0xc1,
5323 0x4e, 0xf4, 0xf5, 0x05, 0x52, 0x31, 0x53, 0xfe, 0x00, 0x56, 0xfe, 0xa1,
5324 0x56, 0x0c, 0x52, 0x18, 0x53, 0x09, 0x04, 0x6a, 0xfe, 0x1e, 0x12, 0x1e,
5325 0x58, 0xfe, 0x1f, 0x40, 0x05, 0x54, 0x31, 0x55, 0xfe, 0x2c, 0x50, 0xfe,
5326 0xae, 0x50, 0x05, 0x56, 0x31, 0x57, 0xfe, 0x44, 0x50, 0xfe, 0xc6, 0x50,
5327 0x05, 0x52, 0x31, 0x53, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0x05, 0x39,
5328 0x31, 0x3a, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x02, 0x5c, 0x24, 0x06,
5329 0x12, 0xcd, 0x02, 0x5b, 0x2b, 0x01, 0x08, 0x1f, 0x44, 0x30, 0x2e, 0xd5,
5330 0x07, 0x06, 0x21, 0x44, 0x2f, 0x07, 0x9b, 0x21, 0x5b, 0x01, 0x6e, 0x1c,
5331 0x3d, 0x16, 0x44, 0x09, 0x04, 0x0b, 0xe2, 0x79, 0x39, 0x68, 0x3a, 0xfe,
5332 0x0a, 0x55, 0x34, 0xfe, 0x8b, 0x55, 0xbe, 0x39, 0xbf, 0x3a, 0xfe, 0x0c,
5333 0x51, 0xfe, 0x8e, 0x51, 0x02, 0x5b, 0xfe, 0x19, 0x81, 0xaf, 0xfe, 0x19,
5334 0x41, 0x02, 0x5b, 0x2b, 0x01, 0x08, 0x25, 0x32, 0x1f, 0xa2, 0x30, 0x2e,
5335 0xd8, 0x4b, 0x1a, 0xfe, 0xa6, 0x12, 0x4b, 0x0b, 0x3b, 0x02, 0x44, 0x01,
5336 0x08, 0x25, 0x32, 0x1f, 0xa2, 0x30, 0x2e, 0xd6, 0x07, 0x1a, 0x21, 0x44,
5337 0x01, 0x08, 0x1f, 0xa2, 0x30, 0x2e, 0xfe, 0xe8, 0x09, 0xfe, 0xc2, 0x49,
5338 0x60, 0x05, 0xfe, 0x9c, 0x00, 0x28, 0x84, 0x49, 0x04, 0x19, 0x34, 0x9f,
5339 0xfe, 0xbb, 0x45, 0x4b, 0x00, 0x45, 0x3e, 0x06, 0x78, 0x3d, 0xfe, 0xda,
5340 0x14, 0x01, 0x6e, 0x87, 0xfe, 0x4b, 0x45, 0xe2, 0x2f, 0x07, 0x9a, 0xe1,
5341 0x05, 0xc6, 0x28, 0x84, 0x05, 0x3f, 0x28, 0x34, 0x5e, 0x02, 0x5b, 0xfe,
5342 0xc0, 0x5d, 0xfe, 0xf8, 0x14, 0xfe, 0x03, 0x17, 0x05, 0x50, 0xb4, 0x0c,
5343 0x50, 0x5e, 0x2b, 0x01, 0x08, 0x26, 0x5c, 0x01, 0xfe, 0xaa, 0x14, 0x02,
5344 0x5c, 0x01, 0x08, 0x25, 0x32, 0x1f, 0x44, 0x30, 0x2e, 0xd6, 0x07, 0x06,
5345 0x21, 0x44, 0x01, 0xfe, 0x8e, 0x13, 0xfe, 0x42, 0x58, 0xfe, 0x82, 0x14,
5346 0xfe, 0xa4, 0x14, 0x87, 0xfe, 0x4a, 0xf4, 0x0b, 0x16, 0x44, 0xfe, 0x4a,
5347 0xf4, 0x06, 0xfe, 0x0c, 0x12, 0x2f, 0x07, 0x9a, 0x85, 0x02, 0x5b, 0x05,
5348 0x3f, 0xb4, 0x0c, 0x3f, 0x5e, 0x2b, 0x01, 0x08, 0x26, 0x5c, 0x01, 0xfe,
5349 0xd8, 0x14, 0x02, 0x5c, 0x13, 0x06, 0x65, 0xfe, 0xca, 0x12, 0x26, 0xfe,
5350 0xe0, 0x12, 0x72, 0xf1, 0x01, 0x08, 0x23, 0x72, 0x03, 0x8f, 0xfe, 0xdc,
5351 0x12, 0x25, 0xfe, 0xdc, 0x12, 0x1f, 0xfe, 0xca, 0x12, 0x5e, 0x2b, 0x01,
5352 0x08, 0xfe, 0xd5, 0x10, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b,
5353 0x1c, 0xfe, 0xff, 0x7f, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x03, 0x13,
5354 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, 0x1c, 0x3d, 0xfe, 0x30, 0x56,
5355 0xfe, 0x00, 0x5c, 0x03, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b,
5356 0x03, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, 0xfe, 0x0b, 0x58,
5357 0x03, 0x0a, 0x50, 0x01, 0x82, 0x0a, 0x3f, 0x01, 0x82, 0x03, 0xfc, 0x1c,
5358 0x10, 0xff, 0x03, 0x00, 0x54, 0xfe, 0x00, 0xf4, 0x19, 0x48, 0xfe, 0x00,
5359 0x7d, 0xfe, 0x01, 0x7d, 0xfe, 0x02, 0x7d, 0xfe, 0x03, 0x7c, 0x63, 0x27,
5360 0x0c, 0x52, 0x18, 0x53, 0xbe, 0x56, 0xbf, 0x57, 0x03, 0xfe, 0x62, 0x08,
5361 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x74, 0x03, 0x01,
5362 0xfe, 0x14, 0x18, 0xfe, 0x42, 0x48, 0x5f, 0x60, 0x89, 0x01, 0x08, 0x1f,
5363 0xfe, 0xa2, 0x14, 0x30, 0x2e, 0xd8, 0x01, 0x08, 0x1f, 0xfe, 0xa2, 0x14,
5364 0x30, 0x2e, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59, 0x05, 0xc6, 0x28, 0xfe,
5365 0xcc, 0x12, 0x49, 0x04, 0x1b, 0xfe, 0xc4, 0x13, 0x23, 0x62, 0x1b, 0xe2,
5366 0x4b, 0xc3, 0x64, 0xfe, 0xe8, 0x13, 0x3b, 0x13, 0x06, 0x17, 0xc3, 0x78,
5367 0xdb, 0xfe, 0x78, 0x10, 0xff, 0x02, 0x83, 0x55, 0xa1, 0xff, 0x02, 0x83,
5368 0x55, 0x62, 0x1a, 0xa4, 0xbb, 0xfe, 0x30, 0x00, 0x8e, 0xe4, 0x17, 0x2c,
5369 0x13, 0x06, 0xfe, 0x56, 0x10, 0x62, 0x0b, 0xe1, 0xbb, 0xfe, 0x64, 0x00,
5370 0x8e, 0xe4, 0x0a, 0xfe, 0x64, 0x00, 0x17, 0x93, 0x13, 0x06, 0xfe, 0x28,
5371 0x10, 0x62, 0x06, 0xfe, 0x60, 0x13, 0xbb, 0xfe, 0xc8, 0x00, 0x8e, 0xe4,
5372 0x0a, 0xfe, 0xc8, 0x00, 0x17, 0x4d, 0x13, 0x06, 0x83, 0xbb, 0xfe, 0x90,
5373 0x01, 0xba, 0xfe, 0x4e, 0x14, 0x89, 0xfe, 0x12, 0x10, 0xfe, 0x43, 0xf4,
5374 0x94, 0xfe, 0x56, 0xf0, 0xfe, 0x60, 0x14, 0xfe, 0x04, 0xf4, 0x6c, 0xfe,
5375 0x43, 0xf4, 0x93, 0xfe, 0xf3, 0x10, 0xf9, 0x01, 0xfe, 0x22, 0x13, 0x1c,
5376 0x3d, 0xfe, 0x10, 0x13, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4, 0x69, 0xba,
5377 0xfe, 0x9c, 0x14, 0xb7, 0x69, 0xfe, 0x1c, 0x10, 0xfe, 0x00, 0x17, 0xfe,
5378 0x4d, 0xe4, 0x19, 0xba, 0xfe, 0x9c, 0x14, 0xb7, 0x19, 0x83, 0x60, 0x23,
5379 0xfe, 0x4d, 0xf4, 0x00, 0xdf, 0x89, 0x13, 0x06, 0xfe, 0xb4, 0x56, 0xfe,
5380 0xc3, 0x58, 0x03, 0x60, 0x13, 0x0b, 0x03, 0x15, 0x06, 0x01, 0x08, 0x26,
5381 0xe5, 0x15, 0x0b, 0x01, 0x08, 0x26, 0xe5, 0x15, 0x1a, 0x01, 0x08, 0x26,
5382 0xe5, 0x72, 0xfe, 0x89, 0x49, 0x01, 0x08, 0x03, 0x15, 0x06, 0x01, 0x08,
5383 0x26, 0xa6, 0x15, 0x1a, 0x01, 0x08, 0x26, 0xa6, 0x15, 0x06, 0x01, 0x08,
5384 0x26, 0xa6, 0xfe, 0x89, 0x49, 0x01, 0x08, 0x26, 0xa6, 0x72, 0xfe, 0x89,
5385 0x4a, 0x01, 0x08, 0x03, 0x60, 0x03, 0x1e, 0xcc, 0x07, 0x06, 0xfe, 0x44,
5386 0x13, 0xad, 0x12, 0xcc, 0xfe, 0x49, 0xf4, 0x00, 0x3b, 0x72, 0x9f, 0x5e,
5387 0xfe, 0x01, 0xec, 0xfe, 0x27, 0x01, 0xf1, 0x01, 0x08, 0x2f, 0x07, 0xfe,
5388 0xe3, 0x00, 0xfe, 0x20, 0x13, 0x1f, 0xfe, 0x5a, 0x15, 0x23, 0x12, 0xcd,
5389 0x01, 0x43, 0x1e, 0xcd, 0x07, 0x06, 0x45, 0x09, 0x4a, 0x06, 0x35, 0x03,
5390 0x0a, 0x42, 0x01, 0x0e, 0xed, 0x88, 0x07, 0x10, 0xa4, 0x0a, 0x80, 0x01,
5391 0x0e, 0x88, 0x0a, 0x51, 0x01, 0x9e, 0x03, 0x0a, 0x80, 0x01, 0x0e, 0x88,
5392 0xfe, 0x80, 0xe7, 0x10, 0x07, 0x10, 0x84, 0xfe, 0x45, 0x58, 0x01, 0xe3,
5393 0x88, 0x03, 0x0a, 0x42, 0x01, 0x0e, 0x88, 0x0a, 0x51, 0x01, 0x9e, 0x03,
5394 0x0a, 0x42, 0x01, 0x0e, 0xfe, 0x80, 0x80, 0xf2, 0xfe, 0x49, 0xe4, 0x10,
5395 0xa4, 0x0a, 0x80, 0x01, 0x0e, 0xf2, 0x0a, 0x51, 0x01, 0x82, 0x03, 0x17,
5396 0x10, 0x71, 0x66, 0xfe, 0x60, 0x01, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde,
5397 0xfe, 0x24, 0x1c, 0xfe, 0x1d, 0xf7, 0x1d, 0x90, 0xfe, 0xf6, 0x15, 0x01,
5398 0xfe, 0xfc, 0x16, 0xe0, 0x91, 0x1d, 0x66, 0xfe, 0x2c, 0x01, 0xfe, 0x2f,
5399 0x19, 0x03, 0xae, 0x21, 0xfe, 0xe6, 0x15, 0xfe, 0xda, 0x10, 0x17, 0x10,
5400 0x71, 0x05, 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x19, 0xfe, 0x18, 0x58,
5401 0x05, 0xfe, 0x66, 0x01, 0xfe, 0x19, 0x58, 0x91, 0x19, 0xfe, 0x3c, 0x90,
5402 0xfe, 0x30, 0xf4, 0x06, 0xfe, 0x3c, 0x50, 0x66, 0xfe, 0x38, 0x00, 0xfe,
5403 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0x19, 0x90, 0xfe, 0x40, 0x16, 0xfe, 0xb6,
5404 0x14, 0x34, 0x03, 0xae, 0x21, 0xfe, 0x18, 0x16, 0xfe, 0x9c, 0x10, 0x17,
5405 0x10, 0x71, 0xfe, 0x83, 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe,
5406 0x1d, 0xf7, 0x38, 0x90, 0xfe, 0x62, 0x16, 0xfe, 0x94, 0x14, 0xfe, 0x10,
5407 0x13, 0x91, 0x38, 0x66, 0x1b, 0xfe, 0xaf, 0x19, 0xfe, 0x98, 0xe7, 0x00,
5408 0x03, 0xae, 0x21, 0xfe, 0x56, 0x16, 0xfe, 0x6c, 0x10, 0x17, 0x10, 0x71,
5409 0xfe, 0x30, 0xbc, 0xfe, 0xb2, 0xbc, 0x91, 0xc5, 0x66, 0x1b, 0xfe, 0x0f,
5410 0x79, 0xfe, 0x1c, 0xf7, 0xc5, 0x90, 0xfe, 0x9a, 0x16, 0xfe, 0x5c, 0x14,
5411 0x34, 0x03, 0xae, 0x21, 0xfe, 0x86, 0x16, 0xfe, 0x42, 0x10, 0xfe, 0x02,
5412 0xf6, 0x10, 0x71, 0xfe, 0x18, 0xfe, 0x54, 0xfe, 0x19, 0xfe, 0x55, 0xfc,
5413 0xfe, 0x1d, 0xf7, 0x4f, 0x90, 0xfe, 0xc0, 0x16, 0xfe, 0x36, 0x14, 0xfe,
5414 0x1c, 0x13, 0x91, 0x4f, 0x47, 0xfe, 0x83, 0x58, 0xfe, 0xaf, 0x19, 0xfe,
5415 0x80, 0xe7, 0x10, 0xfe, 0x81, 0xe7, 0x10, 0x11, 0xfe, 0xdd, 0x00, 0x63,
5416 0x27, 0x03, 0x63, 0x27, 0xfe, 0x12, 0x45, 0x21, 0xfe, 0xb0, 0x16, 0x14,
5417 0x06, 0x37, 0x95, 0xa9, 0x02, 0x29, 0xfe, 0x39, 0xf0, 0xfe, 0x04, 0x17,
5418 0x23, 0x03, 0xfe, 0x7e, 0x18, 0x1c, 0x1a, 0x5d, 0x13, 0x0d, 0x03, 0x71,
5419 0x05, 0xcb, 0x1c, 0x06, 0xfe, 0xef, 0x12, 0xfe, 0xe1, 0x10, 0x78, 0x2c,
5420 0x46, 0x2f, 0x07, 0x2d, 0xfe, 0x3c, 0x13, 0xfe, 0x82, 0x14, 0xfe, 0x42,
5421 0x13, 0x3c, 0x8a, 0x0a, 0x42, 0x01, 0x0e, 0xb0, 0xfe, 0x3e, 0x12, 0xf0,
5422 0xfe, 0x45, 0x48, 0x01, 0xe3, 0xfe, 0x00, 0xcc, 0xb0, 0xfe, 0xf3, 0x13,
5423 0x3d, 0x75, 0x07, 0x10, 0xa3, 0x0a, 0x80, 0x01, 0x0e, 0xf2, 0x01, 0x6f,
5424 0xfe, 0x16, 0x10, 0x07, 0x7e, 0x85, 0xfe, 0x40, 0x14, 0xfe, 0x24, 0x12,
5425 0xf6, 0xfe, 0xd6, 0xf0, 0xfe, 0x24, 0x17, 0x17, 0x0b, 0x03, 0xfe, 0x9c,
5426 0xe7, 0x0b, 0x0f, 0xfe, 0x15, 0x00, 0x59, 0x76, 0x27, 0x01, 0xda, 0x17,
5427 0x06, 0x03, 0x3c, 0x8a, 0x09, 0x4a, 0x1d, 0x35, 0x11, 0x2d, 0x01, 0x6f,
5428 0x17, 0x06, 0x03, 0xfe, 0x38, 0x90, 0xfe, 0xba, 0x90, 0x79, 0xc7, 0x68,
5429 0xc8, 0xfe, 0x48, 0x55, 0x34, 0xfe, 0xc9, 0x55, 0x03, 0x1e, 0x98, 0x73,
5430 0x12, 0x98, 0x03, 0x0a, 0x99, 0x01, 0x0e, 0xf0, 0x0a, 0x40, 0x01, 0x0e,
5431 0xfe, 0x49, 0x44, 0x16, 0xfe, 0xf0, 0x17, 0x73, 0x75, 0x03, 0x0a, 0x42,
5432 0x01, 0x0e, 0x07, 0x10, 0x45, 0x0a, 0x51, 0x01, 0x9e, 0x0a, 0x40, 0x01,
5433 0x0e, 0x73, 0x75, 0x03, 0xfe, 0x4e, 0xe4, 0x1a, 0x64, 0xfe, 0x24, 0x18,
5434 0x05, 0xfe, 0x90, 0x00, 0xfe, 0x3a, 0x45, 0x5b, 0xfe, 0x4e, 0xe4, 0xc2,
5435 0x64, 0xfe, 0x36, 0x18, 0x05, 0xfe, 0x92, 0x00, 0xfe, 0x02, 0xe6, 0x1b,
5436 0xdc, 0xfe, 0x4e, 0xe4, 0xfe, 0x0b, 0x00, 0x64, 0xfe, 0x48, 0x18, 0x05,
5437 0xfe, 0x94, 0x00, 0xfe, 0x02, 0xe6, 0x19, 0xfe, 0x08, 0x10, 0x05, 0xfe,
5438 0x96, 0x00, 0xfe, 0x02, 0xe6, 0x2c, 0xfe, 0x4e, 0x45, 0xfe, 0x0c, 0x12,
5439 0xaf, 0xff, 0x04, 0x68, 0x54, 0xde, 0x1c, 0x69, 0x03, 0x07, 0x7a, 0xfe,
5440 0x5a, 0xf0, 0xfe, 0x74, 0x18, 0x24, 0xfe, 0x09, 0x00, 0xfe, 0x34, 0x10,
5441 0x07, 0x1b, 0xfe, 0x5a, 0xf0, 0xfe, 0x82, 0x18, 0x24, 0xc3, 0xfe, 0x26,
5442 0x10, 0x07, 0x1a, 0x5d, 0x24, 0x2c, 0xdc, 0x07, 0x0b, 0x5d, 0x24, 0x93,
5443 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x5d, 0x24, 0x4d, 0x9f, 0xad, 0x03, 0x14,
5444 0xfe, 0x09, 0x00, 0x01, 0x33, 0xfe, 0x04, 0xfe, 0x7d, 0x05, 0x7f, 0xf9,
5445 0x03, 0x25, 0xfe, 0xca, 0x18, 0xfe, 0x14, 0xf0, 0x08, 0x65, 0xfe, 0xc6,
5446 0x18, 0x03, 0xff, 0x1a, 0x00, 0x00,
5449 static unsigned short _adv_asc3550_size = sizeof(_adv_asc3550_buf); /* 0x13AD */
5450 static ADV_DCNT _adv_asc3550_chksum = 0x04D52DDDUL; /* Expanded little-endian checksum. */
5452 /* Microcode buffer is kept after initialization for error recovery. */
5453 static unsigned char _adv_asc38C0800_buf[] = {
5454 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0xfc, 0x00, 0x16, 0x18, 0xe4,
5455 0x01, 0x00, 0x48, 0xe4, 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00, 0xce, 0x19,
5456 0x00, 0xfa, 0xff, 0xff, 0x1c, 0x0f, 0x00, 0xf6, 0x9e, 0xe7, 0xff, 0x00,
5457 0x82, 0xe7, 0x00, 0xea, 0x01, 0xfa, 0x01, 0xe6, 0x09, 0xe7, 0x55, 0xf0,
5458 0x01, 0xf6, 0x03, 0x00, 0x04, 0x00, 0x10, 0x00, 0x1e, 0xf0, 0x85, 0xf0,
5459 0x18, 0xf4, 0x08, 0x00, 0xbc, 0x00, 0x38, 0x54, 0x00, 0xec, 0xd5, 0xf0,
5460 0x82, 0x0d, 0x00, 0xe6, 0x86, 0xf0, 0xb1, 0xf0, 0x98, 0x57, 0x01, 0xfc,
5461 0xb4, 0x00, 0xd4, 0x01, 0x0c, 0x1c, 0x3e, 0x1c, 0x3c, 0x00, 0xbb, 0x00,
5462 0x00, 0x10, 0xba, 0x19, 0x02, 0x80, 0x32, 0xf0, 0x7c, 0x0d, 0x02, 0x13,
5463 0xba, 0x13, 0x18, 0x40, 0x00, 0x57, 0x01, 0xea, 0x02, 0xfc, 0x03, 0xfc,
5464 0x3e, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x74, 0x01, 0x76, 0x01, 0xb9, 0x54,
5465 0x3e, 0x57, 0x00, 0x80, 0x03, 0xe6, 0xb6, 0x00, 0xc0, 0x00, 0x01, 0x01,
5466 0x3e, 0x01, 0x7a, 0x01, 0xca, 0x08, 0xce, 0x10, 0x16, 0x11, 0x04, 0x12,
5467 0x08, 0x12, 0x02, 0x4a, 0xbb, 0x55, 0x3c, 0x56, 0x03, 0x58, 0x1b, 0x80,
5468 0x30, 0xe4, 0x4b, 0xe4, 0x5d, 0xf0, 0x02, 0xfa, 0x20, 0x00, 0x32, 0x00,
5469 0x40, 0x00, 0x80, 0x00, 0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01,
5470 0x70, 0x01, 0x72, 0x01, 0x78, 0x01, 0x7c, 0x01, 0x62, 0x0a, 0x86, 0x0d,
5471 0x06, 0x13, 0x4c, 0x1c, 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0,
5472 0x03, 0xf7, 0x0c, 0x00, 0x0f, 0x00, 0x47, 0x00, 0xbe, 0x00, 0x00, 0x01,
5473 0x20, 0x11, 0x5c, 0x16, 0x32, 0x1c, 0x38, 0x1c, 0x4e, 0x1c, 0x10, 0x44,
5474 0x00, 0x4c, 0x04, 0xea, 0x5c, 0xf0, 0xa7, 0xf0, 0x04, 0xf6, 0x03, 0xfa,
5475 0x05, 0x00, 0x34, 0x00, 0x36, 0x00, 0x98, 0x00, 0xcc, 0x00, 0x20, 0x01,
5476 0x4e, 0x01, 0x4a, 0x0b, 0x42, 0x0c, 0x12, 0x0f, 0x0c, 0x10, 0x22, 0x11,
5477 0x0a, 0x12, 0x04, 0x13, 0x30, 0x1c, 0x02, 0x48, 0x00, 0x4e, 0x42, 0x54,
5478 0x44, 0x55, 0xbd, 0x56, 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0,
5479 0x59, 0xf0, 0xb8, 0xf0, 0x4b, 0xf4, 0x06, 0xf7, 0x0e, 0xf7, 0x04, 0xfc,
5480 0x05, 0xfc, 0x06, 0x00, 0x19, 0x00, 0x33, 0x00, 0x9b, 0x00, 0xa4, 0x00,
5481 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00, 0xe7, 0x00, 0xe2, 0x03,
5482 0x08, 0x0f, 0x02, 0x10, 0x04, 0x10, 0x0a, 0x10, 0x0a, 0x13, 0x0c, 0x13,
5483 0x12, 0x13, 0x24, 0x14, 0x34, 0x14, 0x04, 0x16, 0x08, 0x16, 0xa4, 0x17,
5484 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, 0x08, 0x44, 0x38, 0x44, 0x91, 0x44,
5485 0x0a, 0x45, 0x48, 0x46, 0x01, 0x48, 0x68, 0x54, 0x3a, 0x55, 0x83, 0x55,
5486 0xe5, 0x55, 0xb0, 0x57, 0x01, 0x58, 0x83, 0x59, 0x05, 0xe6, 0x0b, 0xf0,
5487 0x0c, 0xf0, 0x04, 0xf8, 0x05, 0xf8, 0x07, 0x00, 0x0a, 0x00, 0x1c, 0x00,
5488 0x1e, 0x00, 0x9e, 0x00, 0xa8, 0x00, 0xaa, 0x00, 0xb9, 0x00, 0xe0, 0x00,
5489 0x22, 0x01, 0x26, 0x01, 0x79, 0x01, 0x7e, 0x01, 0xc4, 0x01, 0xc6, 0x01,
5490 0x80, 0x02, 0x5e, 0x03, 0xee, 0x04, 0x9a, 0x06, 0xf8, 0x07, 0x62, 0x08,
5491 0x68, 0x08, 0x69, 0x08, 0xd6, 0x08, 0xe9, 0x09, 0xfa, 0x0b, 0x2e, 0x0f,
5492 0x12, 0x10, 0x1a, 0x10, 0xed, 0x10, 0xf1, 0x10, 0x2a, 0x11, 0x06, 0x12,
5493 0x0c, 0x12, 0x3e, 0x12, 0x10, 0x13, 0x16, 0x13, 0x1e, 0x13, 0x46, 0x14,
5494 0x76, 0x14, 0x82, 0x14, 0x36, 0x15, 0xca, 0x15, 0x6b, 0x18, 0xbe, 0x18,
5495 0xca, 0x18, 0xe6, 0x19, 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40,
5496 0x0e, 0x47, 0xfe, 0x9c, 0xf0, 0x2b, 0x02, 0xfe, 0xac, 0x0d, 0xff, 0x10,
5497 0x00, 0x00, 0xd7, 0xfe, 0xe8, 0x19, 0x00, 0xd6, 0xfe, 0x84, 0x01, 0xff,
5498 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00,
5499 0x00, 0xfe, 0x57, 0x24, 0x00, 0xfe, 0x4c, 0x00, 0x5b, 0xff, 0x04, 0x00,
5500 0x00, 0x11, 0xff, 0x09, 0x00, 0x00, 0xff, 0x08, 0x01, 0x01, 0xff, 0x08,
5501 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, 0xff, 0xff, 0xff, 0x11,
5502 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00,
5503 0xfe, 0x04, 0xf7, 0xd6, 0x2c, 0x99, 0x0a, 0x01, 0xfe, 0xc2, 0x0f, 0xfe,
5504 0x04, 0xf7, 0xd6, 0x99, 0x0a, 0x42, 0x2c, 0xfe, 0x3d, 0xf0, 0xfe, 0x06,
5505 0x02, 0xfe, 0x20, 0xf0, 0xa7, 0xfe, 0x91, 0xf0, 0xfe, 0xf4, 0x01, 0xfe,
5506 0x90, 0xf0, 0xfe, 0xf4, 0x01, 0xfe, 0x8f, 0xf0, 0xa7, 0x03, 0x5d, 0x4d,
5507 0x02, 0xfe, 0xc8, 0x0d, 0x01, 0xfe, 0x38, 0x0e, 0xfe, 0xdd, 0x12, 0xfe,
5508 0xfc, 0x10, 0xfe, 0x28, 0x1c, 0x03, 0xfe, 0xa6, 0x00, 0xfe, 0xd3, 0x12,
5509 0x41, 0x14, 0xfe, 0xa6, 0x00, 0xc2, 0xfe, 0x48, 0xf0, 0xfe, 0x8a, 0x02,
5510 0xfe, 0x49, 0xf0, 0xfe, 0xa4, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc2, 0x02,
5511 0xfe, 0x46, 0xf0, 0xfe, 0x54, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x5a, 0x02,
5512 0xfe, 0x43, 0xf0, 0xfe, 0x48, 0x02, 0xfe, 0x44, 0xf0, 0xfe, 0x4c, 0x02,
5513 0xfe, 0x45, 0xf0, 0xfe, 0x50, 0x02, 0x18, 0x0a, 0xaa, 0x18, 0x06, 0x14,
5514 0xa1, 0x02, 0x2b, 0xfe, 0x00, 0x1c, 0xe7, 0xfe, 0x02, 0x1c, 0xe6, 0xfe,
5515 0x1e, 0x1c, 0xfe, 0xe9, 0x10, 0x01, 0xfe, 0x18, 0x18, 0xfe, 0xe7, 0x10,
5516 0xfe, 0x06, 0xfc, 0xce, 0x09, 0x70, 0x01, 0xa8, 0x02, 0x2b, 0x15, 0x59,
5517 0x39, 0xa2, 0x01, 0xfe, 0x58, 0x10, 0x09, 0x70, 0x01, 0x87, 0xfe, 0xbd,
5518 0x10, 0x09, 0x70, 0x01, 0x87, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe,
5519 0x58, 0x1c, 0x18, 0x06, 0x14, 0xa1, 0x2c, 0x1c, 0x2b, 0xfe, 0x3d, 0xf0,
5520 0xfe, 0x06, 0x02, 0x23, 0xfe, 0x98, 0x02, 0xfe, 0x5a, 0x1c, 0xf8, 0xfe,
5521 0x14, 0x1c, 0x15, 0xfe, 0x30, 0x00, 0x39, 0xa2, 0x01, 0xfe, 0x48, 0x10,
5522 0x18, 0x06, 0x14, 0xa1, 0x02, 0xd7, 0x22, 0x20, 0x07, 0x11, 0x35, 0xfe,
5523 0x69, 0x10, 0x18, 0x06, 0x14, 0xa1, 0xfe, 0x04, 0xec, 0x20, 0x4f, 0x43,
5524 0x13, 0x20, 0xfe, 0x05, 0xf6, 0xce, 0x01, 0xfe, 0x4a, 0x17, 0x08, 0x54,
5525 0x58, 0x37, 0x12, 0x2f, 0x42, 0x92, 0x01, 0xfe, 0x82, 0x16, 0x02, 0x2b,
5526 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x66, 0x01, 0x73, 0xfe, 0x18, 0x10,
5527 0xfe, 0x41, 0x58, 0x09, 0xa4, 0x01, 0x0e, 0xfe, 0xc8, 0x54, 0x6b, 0xfe,
5528 0x10, 0x03, 0x01, 0xfe, 0x82, 0x16, 0x02, 0x2b, 0x2c, 0x4f, 0xfe, 0x02,
5529 0xe8, 0x2a, 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43, 0xfe, 0x77, 0x57, 0xfe,
5530 0x27, 0xf0, 0xfe, 0xe0, 0x01, 0xfe, 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xa7,
5531 0xfe, 0x40, 0x1c, 0x1c, 0xd9, 0xfe, 0x26, 0xf0, 0xfe, 0x5a, 0x03, 0xfe,
5532 0xa0, 0xf0, 0xfe, 0x48, 0x03, 0xfe, 0x11, 0xf0, 0xa7, 0xfe, 0xef, 0x10,
5533 0xfe, 0x9f, 0xf0, 0xfe, 0x68, 0x03, 0xf9, 0x10, 0xfe, 0x11, 0x00, 0x02,
5534 0x65, 0x2c, 0xfe, 0x48, 0x1c, 0xf9, 0x08, 0x05, 0x1b, 0xfe, 0x18, 0x13,
5535 0x21, 0x22, 0xa3, 0xb7, 0x13, 0xa3, 0x09, 0x46, 0x01, 0x0e, 0xb7, 0x78,
5536 0x01, 0xfe, 0xb4, 0x16, 0x12, 0xd1, 0x1c, 0xd9, 0xfe, 0x01, 0xf0, 0xd9,
5537 0xfe, 0x82, 0xf0, 0xfe, 0x96, 0x03, 0xfa, 0x12, 0xfe, 0xe4, 0x00, 0x27,
5538 0xfe, 0xa8, 0x03, 0x1c, 0x34, 0x1d, 0xfe, 0xb8, 0x03, 0x01, 0x4b, 0xfe,
5539 0x06, 0xf0, 0xfe, 0xc8, 0x03, 0x95, 0x86, 0xfe, 0x0a, 0xf0, 0xfe, 0x8a,
5540 0x06, 0x02, 0x24, 0x03, 0x70, 0x28, 0x17, 0xfe, 0xfa, 0x04, 0x15, 0x6d,
5541 0x01, 0x36, 0x7b, 0xfe, 0x6a, 0x02, 0x02, 0xd8, 0xf9, 0x2c, 0x99, 0x19,
5542 0xfe, 0x67, 0x1b, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x48, 0x1c,
5543 0x74, 0x01, 0xaf, 0x8c, 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x17, 0xda,
5544 0x09, 0xd1, 0x01, 0x0e, 0x8d, 0x51, 0x64, 0x79, 0x2a, 0x03, 0x70, 0x28,
5545 0xfe, 0x10, 0x12, 0x15, 0x6d, 0x01, 0x36, 0x7b, 0xfe, 0x6a, 0x02, 0x02,
5546 0xd8, 0xc7, 0x81, 0xc8, 0x83, 0x1c, 0x24, 0x27, 0xfe, 0x40, 0x04, 0x1d,
5547 0xfe, 0x3c, 0x04, 0x3b, 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x4e,
5548 0x12, 0x2d, 0xff, 0x02, 0x00, 0x10, 0x01, 0x0b, 0x1d, 0xfe, 0xe4, 0x04,
5549 0x2d, 0x01, 0x0b, 0x1d, 0x24, 0x33, 0x31, 0xde, 0xfe, 0x4c, 0x44, 0xfe,
5550 0x4c, 0x12, 0x51, 0xfe, 0x44, 0x48, 0x0f, 0x6f, 0xfe, 0x4c, 0x54, 0x6b,
5551 0xda, 0x4f, 0x79, 0x2a, 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x62,
5552 0x13, 0x08, 0x05, 0x1b, 0xfe, 0x2a, 0x13, 0x32, 0x07, 0x82, 0xfe, 0x52,
5553 0x13, 0xfe, 0x20, 0x10, 0x0f, 0x6f, 0xfe, 0x4c, 0x54, 0x6b, 0xda, 0xfe,
5554 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x40, 0x13, 0x08, 0x05, 0x1b, 0xfe,
5555 0x08, 0x13, 0x32, 0x07, 0x82, 0xfe, 0x30, 0x13, 0x08, 0x05, 0x1b, 0xfe,
5556 0x1c, 0x12, 0x15, 0x9d, 0x08, 0x05, 0x06, 0x4d, 0x15, 0xfe, 0x0d, 0x00,
5557 0x01, 0x36, 0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24, 0x2d, 0x12, 0xfe, 0xe6,
5558 0x00, 0xfe, 0x1c, 0x90, 0xfe, 0x40, 0x5c, 0x04, 0x15, 0x9d, 0x01, 0x36,
5559 0x02, 0x2b, 0xfe, 0x42, 0x5b, 0x99, 0x19, 0xfe, 0x46, 0x59, 0xfe, 0xbf,
5560 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x87, 0x80, 0xfe, 0x31, 0xe4, 0x5b, 0x08,
5561 0x05, 0x0a, 0xfe, 0x84, 0x13, 0xfe, 0x20, 0x80, 0x07, 0x19, 0xfe, 0x7c,
5562 0x12, 0x53, 0x05, 0x06, 0xfe, 0x6c, 0x13, 0x03, 0xfe, 0xa2, 0x00, 0x28,
5563 0x17, 0xfe, 0x90, 0x05, 0xfe, 0x31, 0xe4, 0x5a, 0x53, 0x05, 0x0a, 0xfe,
5564 0x56, 0x13, 0x03, 0xfe, 0xa0, 0x00, 0x28, 0xfe, 0x4e, 0x12, 0x67, 0xff,
5565 0x02, 0x00, 0x10, 0x27, 0xfe, 0x48, 0x05, 0x1c, 0x34, 0xfe, 0x89, 0x48,
5566 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x56, 0x05, 0x26, 0xfe, 0xa8, 0x05,
5567 0x12, 0xfe, 0xe3, 0x00, 0x21, 0x53, 0xfe, 0x4a, 0xf0, 0xfe, 0x76, 0x05,
5568 0xfe, 0x49, 0xf0, 0xfe, 0x70, 0x05, 0x88, 0x25, 0xfe, 0x21, 0x00, 0xab,
5569 0x25, 0xfe, 0x22, 0x00, 0xaa, 0x25, 0x58, 0xfe, 0x09, 0x48, 0xff, 0x02,
5570 0x00, 0x10, 0x27, 0xfe, 0x86, 0x05, 0x26, 0xfe, 0xa8, 0x05, 0xfe, 0xe2,
5571 0x08, 0x53, 0x05, 0xcb, 0x4d, 0x01, 0xb0, 0x25, 0x06, 0x13, 0xd3, 0x39,
5572 0xfe, 0x27, 0x01, 0x08, 0x05, 0x1b, 0xfe, 0x22, 0x12, 0x41, 0x01, 0xb2,
5573 0x15, 0x9d, 0x08, 0x05, 0x06, 0x4d, 0x15, 0xfe, 0x0d, 0x00, 0x01, 0x36,
5574 0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24, 0x03, 0xfe, 0x9c, 0x00, 0x28, 0xeb,
5575 0x03, 0x5c, 0x28, 0xfe, 0x36, 0x13, 0x41, 0x01, 0xb2, 0x26, 0xfe, 0x18,
5576 0x06, 0x09, 0x06, 0x53, 0x05, 0x1f, 0xfe, 0x02, 0x12, 0x50, 0x01, 0xfe,
5577 0x9e, 0x15, 0x1d, 0xfe, 0x0e, 0x06, 0x12, 0xa5, 0x01, 0x4b, 0x12, 0xfe,
5578 0xe5, 0x00, 0x03, 0x5c, 0xc1, 0x0c, 0x5c, 0x03, 0xcd, 0x28, 0xfe, 0x62,
5579 0x12, 0x03, 0x45, 0x28, 0xfe, 0x5a, 0x13, 0x01, 0xfe, 0x0c, 0x19, 0x01,
5580 0xfe, 0x76, 0x19, 0xfe, 0x43, 0x48, 0xc4, 0xcc, 0x0f, 0x71, 0xff, 0x02,
5581 0x00, 0x57, 0x52, 0x93, 0x1e, 0x43, 0x8b, 0xc4, 0x6e, 0x41, 0x01, 0xb2,
5582 0x26, 0xfe, 0x82, 0x06, 0x53, 0x05, 0x1a, 0xe9, 0x91, 0x09, 0x59, 0x01,
5583 0xfe, 0xcc, 0x15, 0x1d, 0xfe, 0x78, 0x06, 0x12, 0xa5, 0x01, 0x4b, 0x12,
5584 0xfe, 0xe5, 0x00, 0x03, 0x45, 0xc1, 0x0c, 0x45, 0x18, 0x06, 0x01, 0xb2,
5585 0xfa, 0x76, 0x74, 0x01, 0xaf, 0x8c, 0x12, 0xfe, 0xe2, 0x00, 0x27, 0xdb,
5586 0x1c, 0x34, 0xfe, 0x0a, 0xf0, 0xfe, 0xb6, 0x06, 0x94, 0xfe, 0x6c, 0x07,
5587 0xfe, 0x06, 0xf0, 0xfe, 0x74, 0x07, 0x95, 0x86, 0x02, 0x24, 0x08, 0x05,
5588 0x0a, 0xfe, 0x2e, 0x12, 0x16, 0x19, 0x01, 0x0b, 0x16, 0x00, 0x01, 0x0b,
5589 0x16, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, 0x0b, 0xfe, 0x99, 0xa4, 0x01,
5590 0x0b, 0x16, 0x00, 0x02, 0xfe, 0x42, 0x08, 0x68, 0x05, 0x1a, 0xfe, 0x38,
5591 0x12, 0x08, 0x05, 0x1a, 0xfe, 0x30, 0x13, 0x16, 0xfe, 0x1b, 0x00, 0x01,
5592 0x0b, 0x16, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01,
5593 0x0b, 0x16, 0x06, 0x01, 0x0b, 0x16, 0x00, 0x02, 0xe2, 0x6c, 0x58, 0xbe,
5594 0x50, 0xfe, 0x9a, 0x81, 0x55, 0x1b, 0x7a, 0xfe, 0x42, 0x07, 0x09, 0x1b,
5595 0xfe, 0x09, 0x6f, 0xba, 0xfe, 0xca, 0x45, 0xfe, 0x32, 0x12, 0x69, 0x6d,
5596 0x8b, 0x6c, 0x7f, 0x27, 0xfe, 0x54, 0x07, 0x1c, 0x34, 0xfe, 0x0a, 0xf0,
5597 0xfe, 0x42, 0x07, 0x95, 0x86, 0x94, 0xfe, 0x6c, 0x07, 0x02, 0x24, 0x01,
5598 0x4b, 0x02, 0xdb, 0x16, 0x1f, 0x02, 0xdb, 0xfe, 0x9c, 0xf7, 0xdc, 0xfe,
5599 0x2c, 0x90, 0xfe, 0xae, 0x90, 0x56, 0xfe, 0xda, 0x07, 0x0c, 0x60, 0x14,
5600 0x61, 0x08, 0x54, 0x5a, 0x37, 0x22, 0x20, 0x07, 0x11, 0xfe, 0x0e, 0x12,
5601 0x8d, 0xfe, 0x80, 0x80, 0x39, 0x20, 0x6a, 0x2a, 0xfe, 0x06, 0x10, 0xfe,
5602 0x83, 0xe7, 0xfe, 0x48, 0x00, 0xab, 0xfe, 0x03, 0x40, 0x08, 0x54, 0x5b,
5603 0x37, 0x01, 0xb3, 0xb8, 0xfe, 0x1f, 0x40, 0x13, 0x62, 0x01, 0xef, 0xfe,
5604 0x08, 0x50, 0xfe, 0x8a, 0x50, 0xfe, 0x44, 0x51, 0xfe, 0xc6, 0x51, 0x88,
5605 0xfe, 0x08, 0x90, 0xfe, 0x8a, 0x90, 0x0c, 0x5e, 0x14, 0x5f, 0xfe, 0x0c,
5606 0x90, 0xfe, 0x8e, 0x90, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x0c, 0x3d,
5607 0x14, 0x3e, 0xfe, 0x4a, 0x10, 0x08, 0x05, 0x5a, 0xfe, 0x2a, 0x12, 0xfe,
5608 0x2c, 0x90, 0xfe, 0xae, 0x90, 0x0c, 0x60, 0x14, 0x61, 0x08, 0x05, 0x5b,
5609 0x8b, 0x01, 0xb3, 0xfe, 0x1f, 0x80, 0x13, 0x62, 0xfe, 0x44, 0x90, 0xfe,
5610 0xc6, 0x90, 0x0c, 0x3f, 0x14, 0x40, 0xfe, 0x08, 0x90, 0xfe, 0x8a, 0x90,
5611 0x0c, 0x5e, 0x14, 0x5f, 0xfe, 0x40, 0x90, 0xfe, 0xc2, 0x90, 0x0c, 0x3d,
5612 0x14, 0x3e, 0x0c, 0x2e, 0x14, 0x3c, 0x21, 0x0c, 0x49, 0x0c, 0x63, 0x08,
5613 0x54, 0x1f, 0x37, 0x2c, 0x0f, 0xfe, 0x4e, 0x11, 0x27, 0xdd, 0xfe, 0x9e,
5614 0xf0, 0xfe, 0x76, 0x08, 0xbc, 0x17, 0x34, 0x2c, 0x77, 0xe6, 0xc5, 0xfe,
5615 0x9a, 0x08, 0xc6, 0xfe, 0xb8, 0x08, 0x94, 0xfe, 0x8e, 0x08, 0xfe, 0x06,
5616 0xf0, 0xfe, 0x94, 0x08, 0x95, 0x86, 0x02, 0x24, 0x01, 0x4b, 0xfe, 0xc9,
5617 0x10, 0x16, 0x1f, 0xfe, 0xc9, 0x10, 0x68, 0x05, 0x06, 0xfe, 0x10, 0x12,
5618 0x68, 0x05, 0x0a, 0x4e, 0x08, 0x05, 0x0a, 0xfe, 0x90, 0x12, 0xfe, 0x2e,
5619 0x1c, 0x02, 0xfe, 0x18, 0x0b, 0x68, 0x05, 0x06, 0x4e, 0x68, 0x05, 0x0a,
5620 0xfe, 0x7a, 0x12, 0xfe, 0x2c, 0x1c, 0xfe, 0xaa, 0xf0, 0xfe, 0xd2, 0x09,
5621 0xfe, 0xac, 0xf0, 0xfe, 0x00, 0x09, 0x02, 0xfe, 0xde, 0x09, 0xfe, 0xb7,
5622 0xf0, 0xfe, 0xfc, 0x08, 0xfe, 0x02, 0xf6, 0x1a, 0x50, 0xfe, 0x70, 0x18,
5623 0xfe, 0xf1, 0x18, 0xfe, 0x40, 0x55, 0xfe, 0xe1, 0x55, 0xfe, 0x10, 0x58,
5624 0xfe, 0x91, 0x58, 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0x1c, 0x85, 0xfe,
5625 0x8c, 0xf0, 0xfe, 0xfc, 0x08, 0xfe, 0xac, 0xf0, 0xfe, 0xf0, 0x08, 0xb5,
5626 0xfe, 0xcb, 0x10, 0xfe, 0xad, 0xf0, 0xfe, 0x0c, 0x09, 0x02, 0xfe, 0x18,
5627 0x0b, 0xb6, 0xfe, 0xbf, 0x10, 0xfe, 0x2b, 0xf0, 0x85, 0xf4, 0x1e, 0xfe,
5628 0x00, 0xfe, 0xfe, 0x1c, 0x12, 0xc2, 0xfe, 0xd2, 0xf0, 0x85, 0xfe, 0x76,
5629 0x18, 0x1e, 0x19, 0x17, 0x85, 0x03, 0xd2, 0x1e, 0x06, 0x17, 0x85, 0xc5,
5630 0x4a, 0xc6, 0x4a, 0xb5, 0xb6, 0xfe, 0x89, 0x10, 0x74, 0x67, 0x2d, 0x15,
5631 0x9d, 0x01, 0x36, 0x10, 0xfe, 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x65, 0x10,
5632 0x80, 0x02, 0x65, 0xfe, 0x98, 0x80, 0xfe, 0x19, 0xe4, 0x0a, 0xfe, 0x1a,
5633 0x12, 0x51, 0xfe, 0x19, 0x82, 0xfe, 0x6c, 0x18, 0xfe, 0x44, 0x54, 0xbe,
5634 0xfe, 0x19, 0x81, 0xfe, 0x74, 0x18, 0x8f, 0x90, 0x17, 0xfe, 0xce, 0x08,
5635 0x02, 0x4a, 0x08, 0x05, 0x5a, 0xec, 0x03, 0x2e, 0x29, 0x3c, 0x0c, 0x3f,
5636 0x14, 0x40, 0x9b, 0x2e, 0x9c, 0x3c, 0xfe, 0x6c, 0x18, 0xfe, 0xed, 0x18,
5637 0xfe, 0x44, 0x54, 0xfe, 0xe5, 0x54, 0x3a, 0x3f, 0x3b, 0x40, 0x03, 0x49,
5638 0x29, 0x63, 0x8f, 0xfe, 0xe3, 0x54, 0xfe, 0x74, 0x18, 0xfe, 0xf5, 0x18,
5639 0x8f, 0xfe, 0xe3, 0x54, 0x90, 0xc0, 0x56, 0xfe, 0xce, 0x08, 0x02, 0x4a,
5640 0xfe, 0x37, 0xf0, 0xfe, 0xda, 0x09, 0xfe, 0x8b, 0xf0, 0xfe, 0x60, 0x09,
5641 0x02, 0x4a, 0x08, 0x05, 0x0a, 0x23, 0xfe, 0xfa, 0x0a, 0x3a, 0x49, 0x3b,
5642 0x63, 0x56, 0xfe, 0x3e, 0x0a, 0x0f, 0xfe, 0xc0, 0x07, 0x41, 0x98, 0x00,
5643 0xad, 0xfe, 0x01, 0x59, 0xfe, 0x52, 0xf0, 0xfe, 0x0c, 0x0a, 0x8f, 0x7a,
5644 0xfe, 0x24, 0x0a, 0x3a, 0x49, 0x8f, 0xfe, 0xe3, 0x54, 0x57, 0x49, 0x7d,
5645 0x63, 0xfe, 0x14, 0x58, 0xfe, 0x95, 0x58, 0x02, 0x4a, 0x3a, 0x49, 0x3b,
5646 0x63, 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0xbe, 0x57, 0x49, 0x57, 0x63,
5647 0x02, 0x4a, 0x08, 0x05, 0x5a, 0xfe, 0x82, 0x12, 0x08, 0x05, 0x1f, 0xfe,
5648 0x66, 0x13, 0x22, 0x62, 0xb7, 0xfe, 0x03, 0xa1, 0xfe, 0x83, 0x80, 0xfe,
5649 0xc8, 0x44, 0xfe, 0x2e, 0x13, 0xfe, 0x04, 0x91, 0xfe, 0x86, 0x91, 0x6a,
5650 0x2a, 0xfe, 0x40, 0x59, 0xfe, 0xc1, 0x59, 0x56, 0xe0, 0x03, 0x60, 0x29,
5651 0x61, 0x0c, 0x7f, 0x14, 0x80, 0x57, 0x60, 0x7d, 0x61, 0x01, 0xb3, 0xb8,
5652 0x6a, 0x2a, 0x13, 0x62, 0x9b, 0x2e, 0x9c, 0x3c, 0x3a, 0x3f, 0x3b, 0x40,
5653 0x90, 0xc0, 0xfe, 0x04, 0xfa, 0x2e, 0xfe, 0x05, 0xfa, 0x3c, 0x01, 0xef,
5654 0xfe, 0x36, 0x10, 0x21, 0x0c, 0x7f, 0x0c, 0x80, 0x3a, 0x3f, 0x3b, 0x40,
5655 0xe4, 0x08, 0x05, 0x1f, 0x17, 0xe0, 0x3a, 0x3d, 0x3b, 0x3e, 0x08, 0x05,
5656 0xfe, 0xf7, 0x00, 0x37, 0x03, 0x5e, 0x29, 0x5f, 0xfe, 0x10, 0x58, 0xfe,
5657 0x91, 0x58, 0x57, 0x49, 0x7d, 0x63, 0x02, 0xfe, 0xf4, 0x09, 0x08, 0x05,
5658 0x1f, 0x17, 0xe0, 0x08, 0x05, 0xfe, 0xf7, 0x00, 0x37, 0xbe, 0xfe, 0x19,
5659 0x81, 0x50, 0xfe, 0x10, 0x90, 0xfe, 0x92, 0x90, 0xfe, 0xd3, 0x10, 0x32,
5660 0x07, 0xa6, 0x17, 0xfe, 0x08, 0x09, 0x12, 0xa6, 0x08, 0x05, 0x0a, 0xfe,
5661 0x14, 0x13, 0x03, 0x3d, 0x29, 0x3e, 0x56, 0xfe, 0x08, 0x09, 0xfe, 0x0c,
5662 0x58, 0xfe, 0x8d, 0x58, 0x02, 0x4a, 0x21, 0x41, 0xfe, 0x19, 0x80, 0xe7,
5663 0x08, 0x05, 0x0a, 0xfe, 0x1a, 0x12, 0xfe, 0x6c, 0x19, 0xfe, 0x19, 0x41,
5664 0xf4, 0xc2, 0xfe, 0xd1, 0xf0, 0xe2, 0x15, 0x7e, 0x01, 0x36, 0x10, 0xfe,
5665 0x44, 0x00, 0xfe, 0x8e, 0x10, 0xfe, 0x6c, 0x19, 0x57, 0x3d, 0xfe, 0xed,
5666 0x19, 0x7d, 0x3e, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0xf4, 0x1e, 0xfe,
5667 0x00, 0xff, 0x35, 0xfe, 0x74, 0x10, 0xc2, 0xfe, 0xd2, 0xf0, 0xfe, 0xa6,
5668 0x0b, 0xfe, 0x76, 0x18, 0x1e, 0x19, 0x8a, 0x03, 0xd2, 0x1e, 0x06, 0xfe,
5669 0x08, 0x13, 0x10, 0xfe, 0x16, 0x00, 0x02, 0x65, 0xfe, 0xd1, 0xf0, 0xfe,
5670 0xb8, 0x0b, 0x15, 0x7e, 0x01, 0x36, 0x10, 0xfe, 0x17, 0x00, 0xfe, 0x42,
5671 0x10, 0xfe, 0xce, 0xf0, 0xfe, 0xbe, 0x0b, 0xfe, 0x3c, 0x10, 0xfe, 0xcd,
5672 0xf0, 0xfe, 0xca, 0x0b, 0x10, 0xfe, 0x22, 0x00, 0x02, 0x65, 0xfe, 0xcb,
5673 0xf0, 0xfe, 0xd6, 0x0b, 0x10, 0xfe, 0x24, 0x00, 0x02, 0x65, 0xfe, 0xd0,
5674 0xf0, 0xfe, 0xe0, 0x0b, 0x10, 0x9e, 0xe5, 0xfe, 0xcf, 0xf0, 0xfe, 0xea,
5675 0x0b, 0x10, 0x58, 0xfe, 0x10, 0x10, 0xfe, 0xcc, 0xf0, 0xe2, 0x68, 0x05,
5676 0x1f, 0x4d, 0x10, 0xfe, 0x12, 0x00, 0x2c, 0x0f, 0xfe, 0x4e, 0x11, 0x27,
5677 0xfe, 0x00, 0x0c, 0xfe, 0x9e, 0xf0, 0xfe, 0x14, 0x0c, 0xbc, 0x17, 0x34,
5678 0x2c, 0x77, 0xe6, 0xc5, 0x24, 0xc6, 0x24, 0x2c, 0xfa, 0x27, 0xfe, 0x20,
5679 0x0c, 0x1c, 0x34, 0x94, 0xfe, 0x3c, 0x0c, 0x95, 0x86, 0xc5, 0xdc, 0xc6,
5680 0xdc, 0x02, 0x24, 0x01, 0x4b, 0xfe, 0xdb, 0x10, 0x12, 0xfe, 0xe8, 0x00,
5681 0xb5, 0xb6, 0x74, 0xc7, 0x81, 0xc8, 0x83, 0xfe, 0x89, 0xf0, 0x24, 0x33,
5682 0x31, 0xe1, 0xc7, 0x81, 0xc8, 0x83, 0x27, 0xfe, 0x66, 0x0c, 0x1d, 0x24,
5683 0x33, 0x31, 0xdf, 0xbc, 0x4e, 0x10, 0xfe, 0x42, 0x00, 0x02, 0x65, 0x7c,
5684 0x06, 0xfe, 0x81, 0x49, 0x17, 0xfe, 0x2c, 0x0d, 0x08, 0x05, 0x0a, 0xfe,
5685 0x44, 0x13, 0x10, 0x00, 0x55, 0x0a, 0xfe, 0x54, 0x12, 0x55, 0xfe, 0x28,
5686 0x00, 0x23, 0xfe, 0x9a, 0x0d, 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x66,
5687 0x44, 0xfe, 0x28, 0x00, 0xfe, 0xe2, 0x10, 0x01, 0xf5, 0x01, 0xf6, 0x09,
5688 0xa4, 0x01, 0xfe, 0x26, 0x0f, 0x64, 0x12, 0x2f, 0x01, 0x73, 0x02, 0x2b,
5689 0x10, 0xfe, 0x44, 0x00, 0x55, 0x0a, 0xe9, 0x44, 0x0a, 0xfe, 0xb4, 0x10,
5690 0x01, 0xb0, 0x44, 0x0a, 0xfe, 0xaa, 0x10, 0x01, 0xb0, 0xfe, 0x19, 0x82,
5691 0xfe, 0x34, 0x46, 0xac, 0x44, 0x0a, 0x10, 0xfe, 0x43, 0x00, 0xfe, 0x96,
5692 0x10, 0x08, 0x54, 0x0a, 0x37, 0x01, 0xf5, 0x01, 0xf6, 0x64, 0x12, 0x2f,
5693 0x01, 0x73, 0x99, 0x0a, 0x64, 0x42, 0x92, 0x02, 0xfe, 0x2e, 0x03, 0x08,
5694 0x05, 0x0a, 0x8a, 0x44, 0x0a, 0x10, 0x00, 0xfe, 0x5c, 0x10, 0x68, 0x05,
5695 0x1a, 0xfe, 0x58, 0x12, 0x08, 0x05, 0x1a, 0xfe, 0x50, 0x13, 0xfe, 0x1c,
5696 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x50, 0x0d, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d,
5697 0xf0, 0xfe, 0x56, 0x0d, 0x08, 0x54, 0x1a, 0x37, 0xfe, 0xa9, 0x10, 0x10,
5698 0xfe, 0x15, 0x00, 0xfe, 0x04, 0xe6, 0x0a, 0x50, 0xfe, 0x2e, 0x10, 0x10,
5699 0xfe, 0x13, 0x00, 0xfe, 0x10, 0x10, 0x10, 0x6f, 0xab, 0x10, 0xfe, 0x41,
5700 0x00, 0xaa, 0x10, 0xfe, 0x24, 0x00, 0x8c, 0xb5, 0xb6, 0x74, 0x03, 0x70,
5701 0x28, 0x23, 0xd8, 0x50, 0xfe, 0x04, 0xe6, 0x1a, 0xfe, 0x9d, 0x41, 0xfe,
5702 0x1c, 0x42, 0x64, 0x01, 0xe3, 0x02, 0x2b, 0xf8, 0x15, 0x0a, 0x39, 0xa0,
5703 0xb4, 0x15, 0xfe, 0x31, 0x00, 0x39, 0xa2, 0x01, 0xfe, 0x48, 0x10, 0x02,
5704 0xd7, 0x42, 0xfe, 0x06, 0xec, 0xd0, 0xfc, 0x44, 0x1b, 0xfe, 0xce, 0x45,
5705 0x35, 0x42, 0xfe, 0x06, 0xea, 0xd0, 0xfe, 0x47, 0x4b, 0x91, 0xfe, 0x75,
5706 0x57, 0x03, 0x5d, 0xfe, 0x98, 0x56, 0xfe, 0x38, 0x12, 0x09, 0x48, 0x01,
5707 0x0e, 0xfe, 0x44, 0x48, 0x4f, 0x08, 0x05, 0x1b, 0xfe, 0x1a, 0x13, 0x09,
5708 0x46, 0x01, 0x0e, 0x41, 0xfe, 0x41, 0x58, 0x09, 0xa4, 0x01, 0x0e, 0xfe,
5709 0x49, 0x54, 0x96, 0xfe, 0x1e, 0x0e, 0x02, 0xfe, 0x2e, 0x03, 0x09, 0x5d,
5710 0xfe, 0xee, 0x14, 0xfc, 0x44, 0x1b, 0xfe, 0xce, 0x45, 0x35, 0x42, 0xfe,
5711 0xce, 0x47, 0xfe, 0xad, 0x13, 0x02, 0x2b, 0x22, 0x20, 0x07, 0x11, 0xfe,
5712 0x9e, 0x12, 0x21, 0x13, 0x59, 0x13, 0x9f, 0x13, 0xd5, 0x22, 0x2f, 0x41,
5713 0x39, 0x2f, 0xbc, 0xad, 0xfe, 0xbc, 0xf0, 0xfe, 0xe0, 0x0e, 0x0f, 0x06,
5714 0x13, 0x59, 0x01, 0xfe, 0xda, 0x16, 0x03, 0xfe, 0x38, 0x01, 0x29, 0xfe,
5715 0x3a, 0x01, 0x56, 0xfe, 0xe4, 0x0e, 0xfe, 0x02, 0xec, 0xd5, 0x69, 0x00,
5716 0x66, 0xfe, 0x04, 0xec, 0x20, 0x4f, 0xfe, 0x05, 0xf6, 0xfe, 0x34, 0x01,
5717 0x01, 0xfe, 0x4a, 0x17, 0xfe, 0x08, 0x90, 0xfe, 0x48, 0xf4, 0x0d, 0xfe,
5718 0x18, 0x13, 0xba, 0xfe, 0x02, 0xea, 0xd5, 0x69, 0x7e, 0xfe, 0xc5, 0x13,
5719 0x15, 0x1a, 0x39, 0xa0, 0xb4, 0xfe, 0x2e, 0x10, 0x03, 0xfe, 0x38, 0x01,
5720 0x1e, 0xfe, 0xf0, 0xff, 0x0c, 0xfe, 0x60, 0x01, 0x03, 0xfe, 0x3a, 0x01,
5721 0x0c, 0xfe, 0x62, 0x01, 0x43, 0x13, 0x20, 0x25, 0x06, 0x13, 0x2f, 0x12,
5722 0x2f, 0x92, 0x0f, 0x06, 0x04, 0x21, 0x04, 0x22, 0x59, 0xfe, 0xf7, 0x12,
5723 0x22, 0x9f, 0xb7, 0x13, 0x9f, 0x07, 0x7e, 0xfe, 0x71, 0x13, 0xfe, 0x24,
5724 0x1c, 0x15, 0x19, 0x39, 0xa0, 0xb4, 0xfe, 0xd9, 0x10, 0xc3, 0xfe, 0x03,
5725 0xdc, 0xfe, 0x73, 0x57, 0xfe, 0x80, 0x5d, 0x04, 0xc3, 0xfe, 0x03, 0xdc,
5726 0xfe, 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x04, 0xfe, 0x03, 0x57, 0xc3, 0x21,
5727 0xfe, 0x00, 0xcc, 0x04, 0xfe, 0x03, 0x57, 0xc3, 0x78, 0x04, 0x08, 0x05,
5728 0x58, 0xfe, 0x22, 0x13, 0xfe, 0x1c, 0x80, 0x07, 0x06, 0xfe, 0x1a, 0x13,
5729 0xfe, 0x1e, 0x80, 0xed, 0xfe, 0x1d, 0x80, 0xae, 0xfe, 0x0c, 0x90, 0xfe,
5730 0x0e, 0x13, 0xfe, 0x0e, 0x90, 0xac, 0xfe, 0x3c, 0x90, 0xfe, 0x30, 0xf4,
5731 0x0a, 0xfe, 0x3c, 0x50, 0xaa, 0x01, 0xfe, 0x7a, 0x17, 0x32, 0x07, 0x2f,
5732 0xad, 0x01, 0xfe, 0xb4, 0x16, 0x08, 0x05, 0x1b, 0x4e, 0x01, 0xf5, 0x01,
5733 0xf6, 0x12, 0xfe, 0xe9, 0x00, 0x08, 0x05, 0x58, 0xfe, 0x2c, 0x13, 0x01,
5734 0xfe, 0x0c, 0x17, 0xfe, 0x1e, 0x1c, 0xfe, 0x14, 0x90, 0xfe, 0x96, 0x90,
5735 0x0c, 0xfe, 0x64, 0x01, 0x14, 0xfe, 0x66, 0x01, 0x08, 0x05, 0x5b, 0xfe,
5736 0x12, 0x12, 0xfe, 0x03, 0x80, 0x8d, 0xfe, 0x01, 0xec, 0x20, 0xfe, 0x80,
5737 0x40, 0x13, 0x20, 0x6a, 0x2a, 0x12, 0xcf, 0x64, 0x22, 0x20, 0xfb, 0x79,
5738 0x20, 0x04, 0xfe, 0x08, 0x1c, 0x03, 0xfe, 0xac, 0x00, 0xfe, 0x06, 0x58,
5739 0x03, 0xfe, 0xae, 0x00, 0xfe, 0x07, 0x58, 0x03, 0xfe, 0xb0, 0x00, 0xfe,
5740 0x08, 0x58, 0x03, 0xfe, 0xb2, 0x00, 0xfe, 0x09, 0x58, 0xfe, 0x0a, 0x1c,
5741 0x25, 0x6e, 0x13, 0xd0, 0x21, 0x0c, 0x5c, 0x0c, 0x45, 0x0f, 0x46, 0x52,
5742 0x50, 0x18, 0x1b, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x23, 0xfe, 0xfc,
5743 0x0f, 0x44, 0x11, 0x0f, 0x48, 0x52, 0x18, 0x58, 0xfe, 0x90, 0x4d, 0xfe,
5744 0x91, 0x54, 0x23, 0xe4, 0x25, 0x11, 0x13, 0x20, 0x7c, 0x6f, 0x4f, 0x22,
5745 0x20, 0xfb, 0x79, 0x20, 0x12, 0xcf, 0xfe, 0x14, 0x56, 0xfe, 0xd6, 0xf0,
5746 0xfe, 0x26, 0x10, 0xf8, 0x74, 0xfe, 0x14, 0x1c, 0xfe, 0x10, 0x1c, 0xfe,
5747 0x18, 0x1c, 0x04, 0x42, 0xfe, 0x0c, 0x14, 0xfc, 0xfe, 0x07, 0xe6, 0x1b,
5748 0xfe, 0xce, 0x47, 0xfe, 0xf5, 0x13, 0x04, 0x01, 0xb0, 0x7c, 0x6f, 0x4f,
5749 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x42, 0x13, 0x32, 0x07, 0x2f,
5750 0xfe, 0x34, 0x13, 0x09, 0x48, 0x01, 0x0e, 0xbb, 0xfe, 0x36, 0x12, 0xfe,
5751 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01, 0xf0, 0xfe, 0x00, 0xcc, 0xbb, 0xfe,
5752 0xf3, 0x13, 0x43, 0x78, 0x07, 0x11, 0xac, 0x09, 0x84, 0x01, 0x0e, 0xfe,
5753 0x80, 0x5c, 0x01, 0x73, 0xfe, 0x0e, 0x10, 0x07, 0x82, 0x4e, 0xfe, 0x14,
5754 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x60, 0x10, 0x04, 0xfe, 0x44, 0x58, 0x8d,
5755 0xfe, 0x01, 0xec, 0xa2, 0xfe, 0x9e, 0x40, 0xfe, 0x9d, 0xe7, 0x00, 0xfe,
5756 0x9c, 0xe7, 0x1a, 0x79, 0x2a, 0x01, 0xe3, 0xfe, 0xdd, 0x10, 0x2c, 0xc7,
5757 0x81, 0xc8, 0x83, 0x33, 0x31, 0xde, 0x07, 0x1a, 0xfe, 0x48, 0x12, 0x07,
5758 0x0a, 0xfe, 0x56, 0x12, 0x07, 0x19, 0xfe, 0x30, 0x12, 0x07, 0xc9, 0x17,
5759 0xfe, 0x32, 0x12, 0x07, 0xfe, 0x23, 0x00, 0x17, 0xeb, 0x07, 0x06, 0x17,
5760 0xfe, 0x9c, 0x12, 0x07, 0x1f, 0xfe, 0x12, 0x12, 0x07, 0x00, 0x17, 0x24,
5761 0x15, 0xc9, 0x01, 0x36, 0xa9, 0x2d, 0x01, 0x0b, 0x94, 0x4b, 0x04, 0x2d,
5762 0xdd, 0x09, 0xd1, 0x01, 0xfe, 0x26, 0x0f, 0x12, 0x82, 0x02, 0x2b, 0x2d,
5763 0x32, 0x07, 0xa6, 0xfe, 0xd9, 0x13, 0x3a, 0x3d, 0x3b, 0x3e, 0x56, 0xfe,
5764 0xf0, 0x11, 0x08, 0x05, 0x5a, 0xfe, 0x72, 0x12, 0x9b, 0x2e, 0x9c, 0x3c,
5765 0x90, 0xc0, 0x96, 0xfe, 0xba, 0x11, 0x22, 0x62, 0xfe, 0x26, 0x13, 0x03,
5766 0x7f, 0x29, 0x80, 0x56, 0xfe, 0x76, 0x0d, 0x0c, 0x60, 0x14, 0x61, 0x21,
5767 0x0c, 0x7f, 0x0c, 0x80, 0x01, 0xb3, 0x25, 0x6e, 0x77, 0x13, 0x62, 0x01,
5768 0xef, 0x9b, 0x2e, 0x9c, 0x3c, 0xfe, 0x04, 0x55, 0xfe, 0xa5, 0x55, 0xfe,
5769 0x04, 0xfa, 0x2e, 0xfe, 0x05, 0xfa, 0x3c, 0xfe, 0x91, 0x10, 0x03, 0x3f,
5770 0x29, 0x40, 0xfe, 0x40, 0x56, 0xfe, 0xe1, 0x56, 0x0c, 0x3f, 0x14, 0x40,
5771 0x88, 0x9b, 0x2e, 0x9c, 0x3c, 0x90, 0xc0, 0x03, 0x5e, 0x29, 0x5f, 0xfe,
5772 0x00, 0x56, 0xfe, 0xa1, 0x56, 0x0c, 0x5e, 0x14, 0x5f, 0x08, 0x05, 0x5a,
5773 0xfe, 0x1e, 0x12, 0x22, 0x62, 0xfe, 0x1f, 0x40, 0x03, 0x60, 0x29, 0x61,
5774 0xfe, 0x2c, 0x50, 0xfe, 0xae, 0x50, 0x03, 0x3f, 0x29, 0x40, 0xfe, 0x44,
5775 0x50, 0xfe, 0xc6, 0x50, 0x03, 0x5e, 0x29, 0x5f, 0xfe, 0x08, 0x50, 0xfe,
5776 0x8a, 0x50, 0x03, 0x3d, 0x29, 0x3e, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50,
5777 0x02, 0x89, 0x25, 0x06, 0x13, 0xd4, 0x02, 0x72, 0x2d, 0x01, 0x0b, 0x1d,
5778 0x4c, 0x33, 0x31, 0xde, 0x07, 0x06, 0x23, 0x4c, 0x32, 0x07, 0xa6, 0x23,
5779 0x72, 0x01, 0xaf, 0x1e, 0x43, 0x17, 0x4c, 0x08, 0x05, 0x0a, 0xee, 0x3a,
5780 0x3d, 0x3b, 0x3e, 0xfe, 0x0a, 0x55, 0x35, 0xfe, 0x8b, 0x55, 0x57, 0x3d,
5781 0x7d, 0x3e, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0x02, 0x72, 0xfe, 0x19,
5782 0x81, 0xba, 0xfe, 0x19, 0x41, 0x02, 0x72, 0x2d, 0x01, 0x0b, 0x1c, 0x34,
5783 0x1d, 0xe8, 0x33, 0x31, 0xe1, 0x55, 0x19, 0xfe, 0xa6, 0x12, 0x55, 0x0a,
5784 0x4d, 0x02, 0x4c, 0x01, 0x0b, 0x1c, 0x34, 0x1d, 0xe8, 0x33, 0x31, 0xdf,
5785 0x07, 0x19, 0x23, 0x4c, 0x01, 0x0b, 0x1d, 0xe8, 0x33, 0x31, 0xfe, 0xe8,
5786 0x09, 0xfe, 0xc2, 0x49, 0x51, 0x03, 0xfe, 0x9c, 0x00, 0x28, 0x8a, 0x53,
5787 0x05, 0x1f, 0x35, 0xa9, 0xfe, 0xbb, 0x45, 0x55, 0x00, 0x4e, 0x44, 0x06,
5788 0x7c, 0x43, 0xfe, 0xda, 0x14, 0x01, 0xaf, 0x8c, 0xfe, 0x4b, 0x45, 0xee,
5789 0x32, 0x07, 0xa5, 0xed, 0x03, 0xcd, 0x28, 0x8a, 0x03, 0x45, 0x28, 0x35,
5790 0x67, 0x02, 0x72, 0xfe, 0xc0, 0x5d, 0xfe, 0xf8, 0x14, 0xfe, 0x03, 0x17,
5791 0x03, 0x5c, 0xc1, 0x0c, 0x5c, 0x67, 0x2d, 0x01, 0x0b, 0x26, 0x89, 0x01,
5792 0xfe, 0x9e, 0x15, 0x02, 0x89, 0x01, 0x0b, 0x1c, 0x34, 0x1d, 0x4c, 0x33,
5793 0x31, 0xdf, 0x07, 0x06, 0x23, 0x4c, 0x01, 0xf1, 0xfe, 0x42, 0x58, 0xf1,
5794 0xfe, 0xa4, 0x14, 0x8c, 0xfe, 0x4a, 0xf4, 0x0a, 0x17, 0x4c, 0xfe, 0x4a,
5795 0xf4, 0x06, 0xea, 0x32, 0x07, 0xa5, 0x8b, 0x02, 0x72, 0x03, 0x45, 0xc1,
5796 0x0c, 0x45, 0x67, 0x2d, 0x01, 0x0b, 0x26, 0x89, 0x01, 0xfe, 0xcc, 0x15,
5797 0x02, 0x89, 0x0f, 0x06, 0x27, 0xfe, 0xbe, 0x13, 0x26, 0xfe, 0xd4, 0x13,
5798 0x76, 0xfe, 0x89, 0x48, 0x01, 0x0b, 0x21, 0x76, 0x04, 0x7b, 0xfe, 0xd0,
5799 0x13, 0x1c, 0xfe, 0xd0, 0x13, 0x1d, 0xfe, 0xbe, 0x13, 0x67, 0x2d, 0x01,
5800 0x0b, 0xfe, 0xd5, 0x10, 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93,
5801 0x1e, 0xfe, 0xff, 0x7f, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x04, 0x0f,
5802 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0x1e, 0x43, 0xfe, 0x30, 0x56,
5803 0xfe, 0x00, 0x5c, 0x04, 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93,
5804 0x04, 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0xfe, 0x0b, 0x58,
5805 0x04, 0x09, 0x5c, 0x01, 0x87, 0x09, 0x45, 0x01, 0x87, 0x04, 0xfe, 0x03,
5806 0xa1, 0x1e, 0x11, 0xff, 0x03, 0x00, 0x54, 0xfe, 0x00, 0xf4, 0x1f, 0x52,
5807 0xfe, 0x00, 0x7d, 0xfe, 0x01, 0x7d, 0xfe, 0x02, 0x7d, 0xfe, 0x03, 0x7c,
5808 0x6a, 0x2a, 0x0c, 0x5e, 0x14, 0x5f, 0x57, 0x3f, 0x7d, 0x40, 0x04, 0xdd,
5809 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x8d, 0x04, 0x01,
5810 0xfe, 0x0c, 0x19, 0xfe, 0x42, 0x48, 0x50, 0x51, 0x91, 0x01, 0x0b, 0x1d,
5811 0xfe, 0x96, 0x15, 0x33, 0x31, 0xe1, 0x01, 0x0b, 0x1d, 0xfe, 0x96, 0x15,
5812 0x33, 0x31, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59, 0x03, 0xcd, 0x28, 0xfe,
5813 0xcc, 0x12, 0x53, 0x05, 0x1a, 0xfe, 0xc4, 0x13, 0x21, 0x69, 0x1a, 0xee,
5814 0x55, 0xca, 0x6b, 0xfe, 0xdc, 0x14, 0x4d, 0x0f, 0x06, 0x18, 0xca, 0x7c,
5815 0x30, 0xfe, 0x78, 0x10, 0xff, 0x02, 0x83, 0x55, 0xab, 0xff, 0x02, 0x83,
5816 0x55, 0x69, 0x19, 0xae, 0x98, 0xfe, 0x30, 0x00, 0x96, 0xf2, 0x18, 0x6d,
5817 0x0f, 0x06, 0xfe, 0x56, 0x10, 0x69, 0x0a, 0xed, 0x98, 0xfe, 0x64, 0x00,
5818 0x96, 0xf2, 0x09, 0xfe, 0x64, 0x00, 0x18, 0x9e, 0x0f, 0x06, 0xfe, 0x28,
5819 0x10, 0x69, 0x06, 0xfe, 0x60, 0x13, 0x98, 0xfe, 0xc8, 0x00, 0x96, 0xf2,
5820 0x09, 0xfe, 0xc8, 0x00, 0x18, 0x59, 0x0f, 0x06, 0x88, 0x98, 0xfe, 0x90,
5821 0x01, 0x7a, 0xfe, 0x42, 0x15, 0x91, 0xe4, 0xfe, 0x43, 0xf4, 0x9f, 0xfe,
5822 0x56, 0xf0, 0xfe, 0x54, 0x15, 0xfe, 0x04, 0xf4, 0x71, 0xfe, 0x43, 0xf4,
5823 0x9e, 0xfe, 0xf3, 0x10, 0xfe, 0x40, 0x5c, 0x01, 0xfe, 0x16, 0x14, 0x1e,
5824 0x43, 0xec, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4, 0x6e, 0x7a, 0xfe, 0x90,
5825 0x15, 0xc4, 0x6e, 0xfe, 0x1c, 0x10, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4,
5826 0xcc, 0x7a, 0xfe, 0x90, 0x15, 0xc4, 0xcc, 0x88, 0x51, 0x21, 0xfe, 0x4d,
5827 0xf4, 0x00, 0xe9, 0x91, 0x0f, 0x06, 0xfe, 0xb4, 0x56, 0xfe, 0xc3, 0x58,
5828 0x04, 0x51, 0x0f, 0x0a, 0x04, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xf3, 0x16,
5829 0x0a, 0x01, 0x0b, 0x26, 0xf3, 0x16, 0x19, 0x01, 0x0b, 0x26, 0xf3, 0x76,
5830 0xfe, 0x89, 0x49, 0x01, 0x0b, 0x04, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xb1,
5831 0x16, 0x19, 0x01, 0x0b, 0x26, 0xb1, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xb1,
5832 0xfe, 0x89, 0x49, 0x01, 0x0b, 0x26, 0xb1, 0x76, 0xfe, 0x89, 0x4a, 0x01,
5833 0x0b, 0x04, 0x51, 0x04, 0x22, 0xd3, 0x07, 0x06, 0xfe, 0x48, 0x13, 0xb8,
5834 0x13, 0xd3, 0xfe, 0x49, 0xf4, 0x00, 0x4d, 0x76, 0xa9, 0x67, 0xfe, 0x01,
5835 0xec, 0xfe, 0x27, 0x01, 0xfe, 0x89, 0x48, 0xff, 0x02, 0x00, 0x10, 0x27,
5836 0xfe, 0x2e, 0x16, 0x32, 0x07, 0xfe, 0xe3, 0x00, 0xfe, 0x20, 0x13, 0x1d,
5837 0xfe, 0x52, 0x16, 0x21, 0x13, 0xd4, 0x01, 0x4b, 0x22, 0xd4, 0x07, 0x06,
5838 0x4e, 0x08, 0x54, 0x06, 0x37, 0x04, 0x09, 0x48, 0x01, 0x0e, 0xfb, 0x8e,
5839 0x07, 0x11, 0xae, 0x09, 0x84, 0x01, 0x0e, 0x8e, 0x09, 0x5d, 0x01, 0xa8,
5840 0x04, 0x09, 0x84, 0x01, 0x0e, 0x8e, 0xfe, 0x80, 0xe7, 0x11, 0x07, 0x11,
5841 0x8a, 0xfe, 0x45, 0x58, 0x01, 0xf0, 0x8e, 0x04, 0x09, 0x48, 0x01, 0x0e,
5842 0x8e, 0x09, 0x5d, 0x01, 0xa8, 0x04, 0x09, 0x48, 0x01, 0x0e, 0xfe, 0x80,
5843 0x80, 0xfe, 0x80, 0x4c, 0xfe, 0x49, 0xe4, 0x11, 0xae, 0x09, 0x84, 0x01,
5844 0x0e, 0xfe, 0x80, 0x4c, 0x09, 0x5d, 0x01, 0x87, 0x04, 0x18, 0x11, 0x75,
5845 0x6c, 0xfe, 0x60, 0x01, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x24,
5846 0x1c, 0xfe, 0x1d, 0xf7, 0x1b, 0x97, 0xfe, 0xee, 0x16, 0x01, 0xfe, 0xf4,
5847 0x17, 0xad, 0x9a, 0x1b, 0x6c, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x04,
5848 0xb9, 0x23, 0xfe, 0xde, 0x16, 0xfe, 0xda, 0x10, 0x18, 0x11, 0x75, 0x03,
5849 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x1f, 0xfe, 0x18, 0x58, 0x03, 0xfe,
5850 0x66, 0x01, 0xfe, 0x19, 0x58, 0x9a, 0x1f, 0xfe, 0x3c, 0x90, 0xfe, 0x30,
5851 0xf4, 0x06, 0xfe, 0x3c, 0x50, 0x6c, 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79,
5852 0xfe, 0x1c, 0xf7, 0x1f, 0x97, 0xfe, 0x38, 0x17, 0xfe, 0xb6, 0x14, 0x35,
5853 0x04, 0xb9, 0x23, 0xfe, 0x10, 0x17, 0xfe, 0x9c, 0x10, 0x18, 0x11, 0x75,
5854 0xfe, 0x83, 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x1d, 0xf7,
5855 0x2e, 0x97, 0xfe, 0x5a, 0x17, 0xfe, 0x94, 0x14, 0xec, 0x9a, 0x2e, 0x6c,
5856 0x1a, 0xfe, 0xaf, 0x19, 0xfe, 0x98, 0xe7, 0x00, 0x04, 0xb9, 0x23, 0xfe,
5857 0x4e, 0x17, 0xfe, 0x6c, 0x10, 0x18, 0x11, 0x75, 0xfe, 0x30, 0xbc, 0xfe,
5858 0xb2, 0xbc, 0x9a, 0xcb, 0x6c, 0x1a, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7,
5859 0xcb, 0x97, 0xfe, 0x92, 0x17, 0xfe, 0x5c, 0x14, 0x35, 0x04, 0xb9, 0x23,
5860 0xfe, 0x7e, 0x17, 0xfe, 0x42, 0x10, 0xfe, 0x02, 0xf6, 0x11, 0x75, 0xfe,
5861 0x18, 0xfe, 0x60, 0xfe, 0x19, 0xfe, 0x61, 0xfe, 0x03, 0xa1, 0xfe, 0x1d,
5862 0xf7, 0x5b, 0x97, 0xfe, 0xb8, 0x17, 0xfe, 0x36, 0x14, 0xfe, 0x1c, 0x13,
5863 0x9a, 0x5b, 0x41, 0xfe, 0x83, 0x58, 0xfe, 0xaf, 0x19, 0xfe, 0x80, 0xe7,
5864 0x11, 0xfe, 0x81, 0xe7, 0x11, 0x12, 0xfe, 0xdd, 0x00, 0x6a, 0x2a, 0x04,
5865 0x6a, 0x2a, 0xfe, 0x12, 0x45, 0x23, 0xfe, 0xa8, 0x17, 0x15, 0x06, 0x39,
5866 0xa0, 0xb4, 0x02, 0x2b, 0xfe, 0x39, 0xf0, 0xfe, 0xfc, 0x17, 0x21, 0x04,
5867 0xfe, 0x7e, 0x18, 0x1e, 0x19, 0x66, 0x0f, 0x0d, 0x04, 0x75, 0x03, 0xd2,
5868 0x1e, 0x06, 0xfe, 0xef, 0x12, 0xfe, 0xe1, 0x10, 0x7c, 0x6f, 0x4f, 0x32,
5869 0x07, 0x2f, 0xfe, 0x3c, 0x13, 0xf1, 0xfe, 0x42, 0x13, 0x42, 0x92, 0x09,
5870 0x48, 0x01, 0x0e, 0xbb, 0xeb, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01,
5871 0xf0, 0xfe, 0x00, 0xcc, 0xbb, 0xfe, 0xf3, 0x13, 0x43, 0x78, 0x07, 0x11,
5872 0xac, 0x09, 0x84, 0x01, 0x0e, 0xfe, 0x80, 0x4c, 0x01, 0x73, 0xfe, 0x16,
5873 0x10, 0x07, 0x82, 0x8b, 0xfe, 0x40, 0x14, 0xfe, 0x24, 0x12, 0xfe, 0x14,
5874 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x1c, 0x18, 0x18, 0x0a, 0x04, 0xfe, 0x9c,
5875 0xe7, 0x0a, 0x10, 0xfe, 0x15, 0x00, 0x64, 0x79, 0x2a, 0x01, 0xe3, 0x18,
5876 0x06, 0x04, 0x42, 0x92, 0x08, 0x54, 0x1b, 0x37, 0x12, 0x2f, 0x01, 0x73,
5877 0x18, 0x06, 0x04, 0xfe, 0x38, 0x90, 0xfe, 0xba, 0x90, 0x3a, 0xce, 0x3b,
5878 0xcf, 0xfe, 0x48, 0x55, 0x35, 0xfe, 0xc9, 0x55, 0x04, 0x22, 0xa3, 0x77,
5879 0x13, 0xa3, 0x04, 0x09, 0xa4, 0x01, 0x0e, 0xfe, 0x41, 0x48, 0x09, 0x46,
5880 0x01, 0x0e, 0xfe, 0x49, 0x44, 0x17, 0xfe, 0xe8, 0x18, 0x77, 0x78, 0x04,
5881 0x09, 0x48, 0x01, 0x0e, 0x07, 0x11, 0x4e, 0x09, 0x5d, 0x01, 0xa8, 0x09,
5882 0x46, 0x01, 0x0e, 0x77, 0x78, 0x04, 0xfe, 0x4e, 0xe4, 0x19, 0x6b, 0xfe,
5883 0x1c, 0x19, 0x03, 0xfe, 0x90, 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10,
5884 0xfe, 0x4e, 0xe4, 0xc9, 0x6b, 0xfe, 0x2e, 0x19, 0x03, 0xfe, 0x92, 0x00,
5885 0xfe, 0x02, 0xe6, 0x1a, 0xe5, 0xfe, 0x4e, 0xe4, 0xfe, 0x0b, 0x00, 0x6b,
5886 0xfe, 0x40, 0x19, 0x03, 0xfe, 0x94, 0x00, 0xfe, 0x02, 0xe6, 0x1f, 0xfe,
5887 0x08, 0x10, 0x03, 0xfe, 0x96, 0x00, 0xfe, 0x02, 0xe6, 0x6d, 0xfe, 0x4e,
5888 0x45, 0xea, 0xba, 0xff, 0x04, 0x68, 0x54, 0xe7, 0x1e, 0x6e, 0xfe, 0x08,
5889 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c, 0xfe, 0x1a, 0xf4, 0xfe, 0x00,
5890 0x04, 0xea, 0xfe, 0x48, 0xf4, 0x19, 0x7a, 0xfe, 0x74, 0x19, 0x0f, 0x19,
5891 0x04, 0x07, 0x7e, 0xfe, 0x5a, 0xf0, 0xfe, 0x84, 0x19, 0x25, 0xfe, 0x09,
5892 0x00, 0xfe, 0x34, 0x10, 0x07, 0x1a, 0xfe, 0x5a, 0xf0, 0xfe, 0x92, 0x19,
5893 0x25, 0xca, 0xfe, 0x26, 0x10, 0x07, 0x19, 0x66, 0x25, 0x6d, 0xe5, 0x07,
5894 0x0a, 0x66, 0x25, 0x9e, 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x66, 0x25, 0x59,
5895 0xa9, 0xb8, 0x04, 0x15, 0xfe, 0x09, 0x00, 0x01, 0x36, 0xfe, 0x04, 0xfe,
5896 0x81, 0x03, 0x83, 0xfe, 0x40, 0x5c, 0x04, 0x1c, 0xf7, 0xfe, 0x14, 0xf0,
5897 0x0b, 0x27, 0xfe, 0xd6, 0x19, 0x1c, 0xf7, 0x7b, 0xf7, 0xfe, 0x82, 0xf0,
5898 0xfe, 0xda, 0x19, 0x04, 0xff, 0xcc, 0x00, 0x00,
5901 static unsigned short _adv_asc38C0800_size = sizeof(_adv_asc38C0800_buf); /* 0x14E1 */
5902 static ADV_DCNT _adv_asc38C0800_chksum = 0x050D3FD8UL; /* Expanded little-endian checksum. */
5904 /* Microcode buffer is kept after initialization for error recovery. */
5905 static unsigned char _adv_asc38C1600_buf[] = {
5906 0x00, 0x00, 0x00, 0xf2, 0x00, 0x16, 0x00, 0xfc, 0x00, 0x10, 0x00, 0xf0,
5907 0x18, 0xe4, 0x01, 0x00, 0x04, 0x1e, 0x48, 0xe4, 0x03, 0xf6, 0xf7, 0x13,
5908 0x2e, 0x1e, 0x02, 0x00, 0x07, 0x17, 0xc0, 0x5f, 0x00, 0xfa, 0xff, 0xff,
5909 0x04, 0x00, 0x00, 0xf6, 0x09, 0xe7, 0x82, 0xe7, 0x85, 0xf0, 0x86, 0xf0,
5910 0x4e, 0x10, 0x9e, 0xe7, 0xff, 0x00, 0x55, 0xf0, 0x01, 0xf6, 0x03, 0x00,
5911 0x98, 0x57, 0x01, 0xe6, 0x00, 0xea, 0x00, 0xec, 0x01, 0xfa, 0x18, 0xf4,
5912 0x08, 0x00, 0xf0, 0x1d, 0x38, 0x54, 0x32, 0xf0, 0x10, 0x00, 0xc2, 0x0e,
5913 0x1e, 0xf0, 0xd5, 0xf0, 0xbc, 0x00, 0x4b, 0xe4, 0x00, 0xe6, 0xb1, 0xf0,
5914 0xb4, 0x00, 0x02, 0x13, 0x3e, 0x1c, 0xc8, 0x47, 0x3e, 0x00, 0xd8, 0x01,
5915 0x06, 0x13, 0x0c, 0x1c, 0x5e, 0x1e, 0x00, 0x57, 0xc8, 0x57, 0x01, 0xfc,
5916 0xbc, 0x0e, 0xa2, 0x12, 0xb9, 0x54, 0x00, 0x80, 0x62, 0x0a, 0x5a, 0x12,
5917 0xc8, 0x15, 0x3e, 0x1e, 0x18, 0x40, 0xbd, 0x56, 0x03, 0xe6, 0x01, 0xea,
5918 0x5c, 0xf0, 0x0f, 0x00, 0x20, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12,
5919 0x04, 0x13, 0xbb, 0x55, 0x3c, 0x56, 0x3e, 0x57, 0x03, 0x58, 0x4a, 0xe4,
5920 0x40, 0x00, 0xb6, 0x00, 0xbb, 0x00, 0xc0, 0x00, 0x00, 0x01, 0x01, 0x01,
5921 0x3e, 0x01, 0x58, 0x0a, 0x44, 0x10, 0x0a, 0x12, 0x4c, 0x1c, 0x4e, 0x1c,
5922 0x02, 0x4a, 0x30, 0xe4, 0x05, 0xe6, 0x0c, 0x00, 0x3c, 0x00, 0x80, 0x00,
5923 0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01, 0x70, 0x01, 0x72, 0x01,
5924 0x74, 0x01, 0x76, 0x01, 0x78, 0x01, 0x7c, 0x01, 0xc6, 0x0e, 0x0c, 0x10,
5925 0xac, 0x12, 0xae, 0x12, 0x16, 0x1a, 0x32, 0x1c, 0x6e, 0x1e, 0x02, 0x48,
5926 0x3a, 0x55, 0xc9, 0x57, 0x02, 0xee, 0x5b, 0xf0, 0x03, 0xf7, 0x06, 0xf7,
5927 0x03, 0xfc, 0x06, 0x00, 0x1e, 0x00, 0xbe, 0x00, 0xe1, 0x00, 0x0c, 0x12,
5928 0x18, 0x1a, 0x70, 0x1a, 0x30, 0x1c, 0x38, 0x1c, 0x10, 0x44, 0x00, 0x4c,
5929 0xb0, 0x57, 0x40, 0x5c, 0x4d, 0xe4, 0x04, 0xea, 0x5d, 0xf0, 0xa7, 0xf0,
5930 0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x09, 0x00, 0x19, 0x00, 0x32, 0x00,
5931 0x33, 0x00, 0x34, 0x00, 0x36, 0x00, 0x98, 0x00, 0x9e, 0x00, 0xcc, 0x00,
5932 0x20, 0x01, 0x4e, 0x01, 0x79, 0x01, 0x3c, 0x09, 0x68, 0x0d, 0x02, 0x10,
5933 0x04, 0x10, 0x3a, 0x10, 0x08, 0x12, 0x0a, 0x13, 0x40, 0x16, 0x50, 0x16,
5934 0x00, 0x17, 0x4a, 0x19, 0x00, 0x4e, 0x00, 0x54, 0x01, 0x58, 0x00, 0xdc,
5935 0x05, 0xf0, 0x09, 0xf0, 0x59, 0xf0, 0xb8, 0xf0, 0x48, 0xf4, 0x0e, 0xf7,
5936 0x0a, 0x00, 0x9b, 0x00, 0x9c, 0x00, 0xa4, 0x00, 0xb5, 0x00, 0xba, 0x00,
5937 0xd0, 0x00, 0xe7, 0x00, 0xf0, 0x03, 0x69, 0x08, 0xe9, 0x09, 0x5c, 0x0c,
5938 0xb6, 0x12, 0xbc, 0x19, 0xd8, 0x1b, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c,
5939 0x42, 0x1d, 0x08, 0x44, 0x38, 0x44, 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46,
5940 0x89, 0x48, 0x68, 0x54, 0x83, 0x55, 0x83, 0x59, 0x31, 0xe4, 0x02, 0xe6,
5941 0x07, 0xf0, 0x08, 0xf0, 0x0b, 0xf0, 0x0c, 0xf0, 0x4b, 0xf4, 0x04, 0xf8,
5942 0x05, 0xf8, 0x02, 0xfa, 0x03, 0xfa, 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00,
5943 0xa8, 0x00, 0xaa, 0x00, 0xb9, 0x00, 0xe0, 0x00, 0xe5, 0x00, 0x22, 0x01,
5944 0x26, 0x01, 0x60, 0x01, 0x7a, 0x01, 0x82, 0x01, 0xc8, 0x01, 0xca, 0x01,
5945 0x86, 0x02, 0x6a, 0x03, 0x18, 0x05, 0xb2, 0x07, 0x68, 0x08, 0x10, 0x0d,
5946 0x06, 0x10, 0x0a, 0x10, 0x0e, 0x10, 0x12, 0x10, 0x60, 0x10, 0xed, 0x10,
5947 0xf3, 0x10, 0x06, 0x12, 0x10, 0x12, 0x1e, 0x12, 0x0c, 0x13, 0x0e, 0x13,
5948 0x10, 0x13, 0xfe, 0x9c, 0xf0, 0x35, 0x05, 0xfe, 0xec, 0x0e, 0xff, 0x10,
5949 0x00, 0x00, 0xe9, 0xfe, 0x34, 0x1f, 0x00, 0xe8, 0xfe, 0x88, 0x01, 0xff,
5950 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00,
5951 0x00, 0xfe, 0x57, 0x24, 0x00, 0xfe, 0x4c, 0x00, 0x65, 0xff, 0x04, 0x00,
5952 0x00, 0x1a, 0xff, 0x09, 0x00, 0x00, 0xff, 0x08, 0x01, 0x01, 0xff, 0x08,
5953 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, 0xff, 0xff, 0xff, 0x13,
5954 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00,
5955 0xfe, 0x04, 0xf7, 0xe8, 0x37, 0x7d, 0x0d, 0x01, 0xfe, 0x4a, 0x11, 0xfe,
5956 0x04, 0xf7, 0xe8, 0x7d, 0x0d, 0x51, 0x37, 0xfe, 0x3d, 0xf0, 0xfe, 0x0c,
5957 0x02, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x91, 0xf0, 0xfe, 0xf8, 0x01, 0xfe,
5958 0x90, 0xf0, 0xfe, 0xf8, 0x01, 0xfe, 0x8f, 0xf0, 0xbc, 0x03, 0x67, 0x4d,
5959 0x05, 0xfe, 0x08, 0x0f, 0x01, 0xfe, 0x78, 0x0f, 0xfe, 0xdd, 0x12, 0x05,
5960 0xfe, 0x0e, 0x03, 0xfe, 0x28, 0x1c, 0x03, 0xfe, 0xa6, 0x00, 0xfe, 0xd1,
5961 0x12, 0x3e, 0x22, 0xfe, 0xa6, 0x00, 0xac, 0xfe, 0x48, 0xf0, 0xfe, 0x90,
5962 0x02, 0xfe, 0x49, 0xf0, 0xfe, 0xaa, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc8,
5963 0x02, 0xfe, 0x46, 0xf0, 0xfe, 0x5a, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x60,
5964 0x02, 0xfe, 0x43, 0xf0, 0xfe, 0x4e, 0x02, 0xfe, 0x44, 0xf0, 0xfe, 0x52,
5965 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x56, 0x02, 0x1c, 0x0d, 0xa2, 0x1c, 0x07,
5966 0x22, 0xb7, 0x05, 0x35, 0xfe, 0x00, 0x1c, 0xfe, 0xf1, 0x10, 0xfe, 0x02,
5967 0x1c, 0xf5, 0xfe, 0x1e, 0x1c, 0xfe, 0xe9, 0x10, 0x01, 0x5f, 0xfe, 0xe7,
5968 0x10, 0xfe, 0x06, 0xfc, 0xde, 0x0a, 0x81, 0x01, 0xa3, 0x05, 0x35, 0x1f,
5969 0x95, 0x47, 0xb8, 0x01, 0xfe, 0xe4, 0x11, 0x0a, 0x81, 0x01, 0x5c, 0xfe,
5970 0xbd, 0x10, 0x0a, 0x81, 0x01, 0x5c, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c,
5971 0xfe, 0x58, 0x1c, 0x1c, 0x07, 0x22, 0xb7, 0x37, 0x2a, 0x35, 0xfe, 0x3d,
5972 0xf0, 0xfe, 0x0c, 0x02, 0x2b, 0xfe, 0x9e, 0x02, 0xfe, 0x5a, 0x1c, 0xfe,
5973 0x12, 0x1c, 0xfe, 0x14, 0x1c, 0x1f, 0xfe, 0x30, 0x00, 0x47, 0xb8, 0x01,
5974 0xfe, 0xd4, 0x11, 0x1c, 0x07, 0x22, 0xb7, 0x05, 0xe9, 0x21, 0x2c, 0x09,
5975 0x1a, 0x31, 0xfe, 0x69, 0x10, 0x1c, 0x07, 0x22, 0xb7, 0xfe, 0x04, 0xec,
5976 0x2c, 0x60, 0x01, 0xfe, 0x1e, 0x1e, 0x20, 0x2c, 0xfe, 0x05, 0xf6, 0xde,
5977 0x01, 0xfe, 0x62, 0x1b, 0x01, 0x0c, 0x61, 0x4a, 0x44, 0x15, 0x56, 0x51,
5978 0x01, 0xfe, 0x9e, 0x1e, 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x0a, 0x57,
5979 0x01, 0x18, 0x09, 0x00, 0x36, 0x01, 0x85, 0xfe, 0x18, 0x10, 0xfe, 0x41,
5980 0x58, 0x0a, 0xba, 0x01, 0x18, 0xfe, 0xc8, 0x54, 0x7b, 0xfe, 0x1c, 0x03,
5981 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x37, 0x60, 0xfe, 0x02, 0xe8, 0x30,
5982 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43, 0xfe, 0x77, 0x57, 0xfe, 0x27, 0xf0,
5983 0xfe, 0xe4, 0x01, 0xfe, 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x40,
5984 0x1c, 0x2a, 0xeb, 0xfe, 0x26, 0xf0, 0xfe, 0x66, 0x03, 0xfe, 0xa0, 0xf0,
5985 0xfe, 0x54, 0x03, 0xfe, 0x11, 0xf0, 0xbc, 0xfe, 0xef, 0x10, 0xfe, 0x9f,
5986 0xf0, 0xfe, 0x74, 0x03, 0xfe, 0x46, 0x1c, 0x19, 0xfe, 0x11, 0x00, 0x05,
5987 0x70, 0x37, 0xfe, 0x48, 0x1c, 0xfe, 0x46, 0x1c, 0x01, 0x0c, 0x06, 0x28,
5988 0xfe, 0x18, 0x13, 0x26, 0x21, 0xb9, 0xc7, 0x20, 0xb9, 0x0a, 0x57, 0x01,
5989 0x18, 0xc7, 0x89, 0x01, 0xfe, 0xc8, 0x1a, 0x15, 0xe1, 0x2a, 0xeb, 0xfe,
5990 0x01, 0xf0, 0xeb, 0xfe, 0x82, 0xf0, 0xfe, 0xa4, 0x03, 0xfe, 0x9c, 0x32,
5991 0x15, 0xfe, 0xe4, 0x00, 0x2f, 0xfe, 0xb6, 0x03, 0x2a, 0x3c, 0x16, 0xfe,
5992 0xc6, 0x03, 0x01, 0x41, 0xfe, 0x06, 0xf0, 0xfe, 0xd6, 0x03, 0xaf, 0xa0,
5993 0xfe, 0x0a, 0xf0, 0xfe, 0xa2, 0x07, 0x05, 0x29, 0x03, 0x81, 0x1e, 0x1b,
5994 0xfe, 0x24, 0x05, 0x1f, 0x63, 0x01, 0x42, 0x8f, 0xfe, 0x70, 0x02, 0x05,
5995 0xea, 0xfe, 0x46, 0x1c, 0x37, 0x7d, 0x1d, 0xfe, 0x67, 0x1b, 0xfe, 0xbf,
5996 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x48, 0x1c, 0x75, 0x01, 0xa6, 0x86, 0x0a,
5997 0x57, 0x01, 0x18, 0x09, 0x00, 0x1b, 0xec, 0x0a, 0xe1, 0x01, 0x18, 0x77,
5998 0x50, 0x40, 0x8d, 0x30, 0x03, 0x81, 0x1e, 0xf8, 0x1f, 0x63, 0x01, 0x42,
5999 0x8f, 0xfe, 0x70, 0x02, 0x05, 0xea, 0xd7, 0x99, 0xd8, 0x9c, 0x2a, 0x29,
6000 0x2f, 0xfe, 0x4e, 0x04, 0x16, 0xfe, 0x4a, 0x04, 0x7e, 0xfe, 0xa0, 0x00,
6001 0xfe, 0x9b, 0x57, 0xfe, 0x54, 0x12, 0x32, 0xff, 0x02, 0x00, 0x10, 0x01,
6002 0x08, 0x16, 0xfe, 0x02, 0x05, 0x32, 0x01, 0x08, 0x16, 0x29, 0x27, 0x25,
6003 0xee, 0xfe, 0x4c, 0x44, 0xfe, 0x58, 0x12, 0x50, 0xfe, 0x44, 0x48, 0x13,
6004 0x34, 0xfe, 0x4c, 0x54, 0x7b, 0xec, 0x60, 0x8d, 0x30, 0x01, 0xfe, 0x4e,
6005 0x1e, 0xfe, 0x48, 0x47, 0xfe, 0x7c, 0x13, 0x01, 0x0c, 0x06, 0x28, 0xfe,
6006 0x32, 0x13, 0x01, 0x43, 0x09, 0x9b, 0xfe, 0x68, 0x13, 0xfe, 0x26, 0x10,
6007 0x13, 0x34, 0xfe, 0x4c, 0x54, 0x7b, 0xec, 0x01, 0xfe, 0x4e, 0x1e, 0xfe,
6008 0x48, 0x47, 0xfe, 0x54, 0x13, 0x01, 0x0c, 0x06, 0x28, 0xa5, 0x01, 0x43,
6009 0x09, 0x9b, 0xfe, 0x40, 0x13, 0x01, 0x0c, 0x06, 0x28, 0xf9, 0x1f, 0x7f,
6010 0x01, 0x0c, 0x06, 0x07, 0x4d, 0x1f, 0xfe, 0x0d, 0x00, 0x01, 0x42, 0x8f,
6011 0xfe, 0xa4, 0x0e, 0x05, 0x29, 0x32, 0x15, 0xfe, 0xe6, 0x00, 0x0f, 0xfe,
6012 0x1c, 0x90, 0x04, 0xfe, 0x9c, 0x93, 0x3a, 0x0b, 0x0e, 0x8b, 0x02, 0x1f,
6013 0x7f, 0x01, 0x42, 0x05, 0x35, 0xfe, 0x42, 0x5b, 0x7d, 0x1d, 0xfe, 0x46,
6014 0x59, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0x0f, 0xfe, 0x87, 0x80, 0x04,
6015 0xfe, 0x87, 0x83, 0xfe, 0xc9, 0x47, 0x0b, 0x0e, 0xd0, 0x65, 0x01, 0x0c,
6016 0x06, 0x0d, 0xfe, 0x98, 0x13, 0x0f, 0xfe, 0x20, 0x80, 0x04, 0xfe, 0xa0,
6017 0x83, 0x33, 0x0b, 0x0e, 0x09, 0x1d, 0xfe, 0x84, 0x12, 0x01, 0x38, 0x06,
6018 0x07, 0xfe, 0x70, 0x13, 0x03, 0xfe, 0xa2, 0x00, 0x1e, 0x1b, 0xfe, 0xda,
6019 0x05, 0xd0, 0x54, 0x01, 0x38, 0x06, 0x0d, 0xfe, 0x58, 0x13, 0x03, 0xfe,
6020 0xa0, 0x00, 0x1e, 0xfe, 0x50, 0x12, 0x5e, 0xff, 0x02, 0x00, 0x10, 0x2f,
6021 0xfe, 0x90, 0x05, 0x2a, 0x3c, 0xcc, 0xff, 0x02, 0x00, 0x10, 0x2f, 0xfe,
6022 0x9e, 0x05, 0x17, 0xfe, 0xf4, 0x05, 0x15, 0xfe, 0xe3, 0x00, 0x26, 0x01,
6023 0x38, 0xfe, 0x4a, 0xf0, 0xfe, 0xc0, 0x05, 0xfe, 0x49, 0xf0, 0xfe, 0xba,
6024 0x05, 0x71, 0x2e, 0xfe, 0x21, 0x00, 0xf1, 0x2e, 0xfe, 0x22, 0x00, 0xa2,
6025 0x2e, 0x4a, 0xfe, 0x09, 0x48, 0xff, 0x02, 0x00, 0x10, 0x2f, 0xfe, 0xd0,
6026 0x05, 0x17, 0xfe, 0xf4, 0x05, 0xfe, 0xe2, 0x08, 0x01, 0x38, 0x06, 0xfe,
6027 0x1c, 0x00, 0x4d, 0x01, 0xa7, 0x2e, 0x07, 0x20, 0xe4, 0x47, 0xfe, 0x27,
6028 0x01, 0x01, 0x0c, 0x06, 0x28, 0xfe, 0x24, 0x12, 0x3e, 0x01, 0x84, 0x1f,
6029 0x7f, 0x01, 0x0c, 0x06, 0x07, 0x4d, 0x1f, 0xfe, 0x0d, 0x00, 0x01, 0x42,
6030 0x8f, 0xfe, 0xa4, 0x0e, 0x05, 0x29, 0x03, 0xe6, 0x1e, 0xfe, 0xca, 0x13,
6031 0x03, 0xb6, 0x1e, 0xfe, 0x40, 0x12, 0x03, 0x66, 0x1e, 0xfe, 0x38, 0x13,
6032 0x3e, 0x01, 0x84, 0x17, 0xfe, 0x72, 0x06, 0x0a, 0x07, 0x01, 0x38, 0x06,
6033 0x24, 0xfe, 0x02, 0x12, 0x4f, 0x01, 0xfe, 0x56, 0x19, 0x16, 0xfe, 0x68,
6034 0x06, 0x15, 0x82, 0x01, 0x41, 0x15, 0xe2, 0x03, 0x66, 0x8a, 0x10, 0x66,
6035 0x03, 0x9a, 0x1e, 0xfe, 0x70, 0x12, 0x03, 0x55, 0x1e, 0xfe, 0x68, 0x13,
6036 0x01, 0xc6, 0x09, 0x12, 0x48, 0xfe, 0x92, 0x06, 0x2e, 0x12, 0x01, 0xfe,
6037 0xac, 0x1d, 0xfe, 0x43, 0x48, 0x62, 0x80, 0x13, 0x58, 0xff, 0x02, 0x00,
6038 0x57, 0x52, 0xad, 0x23, 0x3f, 0x4e, 0x62, 0x49, 0x3e, 0x01, 0x84, 0x17,
6039 0xfe, 0xea, 0x06, 0x01, 0x38, 0x06, 0x12, 0xf7, 0x45, 0x0a, 0x95, 0x01,
6040 0xfe, 0x84, 0x19, 0x16, 0xfe, 0xe0, 0x06, 0x15, 0x82, 0x01, 0x41, 0x15,
6041 0xe2, 0x03, 0x55, 0x8a, 0x10, 0x55, 0x1c, 0x07, 0x01, 0x84, 0xfe, 0xae,
6042 0x10, 0x03, 0x6f, 0x1e, 0xfe, 0x9e, 0x13, 0x3e, 0x01, 0x84, 0x03, 0x9a,
6043 0x1e, 0xfe, 0x1a, 0x12, 0x01, 0x38, 0x06, 0x12, 0xfc, 0x01, 0xc6, 0x01,
6044 0xfe, 0xac, 0x1d, 0xfe, 0x43, 0x48, 0x62, 0x80, 0xf0, 0x45, 0x0a, 0x95,
6045 0x03, 0xb6, 0x1e, 0xf8, 0x01, 0x38, 0x06, 0x24, 0x36, 0xfe, 0x02, 0xf6,
6046 0x07, 0x71, 0x78, 0x8c, 0x00, 0x4d, 0x62, 0x49, 0x3e, 0x2d, 0x93, 0x4e,
6047 0xd0, 0x0d, 0x17, 0xfe, 0x9a, 0x07, 0x01, 0xfe, 0xc0, 0x19, 0x16, 0xfe,
6048 0x90, 0x07, 0x26, 0x20, 0x9e, 0x15, 0x82, 0x01, 0x41, 0x15, 0xe2, 0x21,
6049 0x9e, 0x09, 0x07, 0xfb, 0x03, 0xe6, 0xfe, 0x58, 0x57, 0x10, 0xe6, 0x05,
6050 0xfe, 0x2a, 0x06, 0x03, 0x6f, 0x8a, 0x10, 0x6f, 0x1c, 0x07, 0x01, 0x84,
6051 0xfe, 0x9c, 0x32, 0x5f, 0x75, 0x01, 0xa6, 0x86, 0x15, 0xfe, 0xe2, 0x00,
6052 0x2f, 0xed, 0x2a, 0x3c, 0xfe, 0x0a, 0xf0, 0xfe, 0xce, 0x07, 0xae, 0xfe,
6053 0x96, 0x08, 0xfe, 0x06, 0xf0, 0xfe, 0x9e, 0x08, 0xaf, 0xa0, 0x05, 0x29,
6054 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x2e, 0x12, 0x14, 0x1d, 0x01, 0x08, 0x14,
6055 0x00, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0xfe,
6056 0x99, 0xa4, 0x01, 0x08, 0x14, 0x00, 0x05, 0xfe, 0xc6, 0x09, 0x01, 0x76,
6057 0x06, 0x12, 0xfe, 0x3a, 0x12, 0x01, 0x0c, 0x06, 0x12, 0xfe, 0x30, 0x13,
6058 0x14, 0xfe, 0x1b, 0x00, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0x14, 0x00,
6059 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0x14, 0x07, 0x01, 0x08, 0x14, 0x00,
6060 0x05, 0xef, 0x7c, 0x4a, 0x78, 0x4f, 0x0f, 0xfe, 0x9a, 0x81, 0x04, 0xfe,
6061 0x9a, 0x83, 0xfe, 0xcb, 0x47, 0x0b, 0x0e, 0x2d, 0x28, 0x48, 0xfe, 0x6c,
6062 0x08, 0x0a, 0x28, 0xfe, 0x09, 0x6f, 0xca, 0xfe, 0xca, 0x45, 0xfe, 0x32,
6063 0x12, 0x53, 0x63, 0x4e, 0x7c, 0x97, 0x2f, 0xfe, 0x7e, 0x08, 0x2a, 0x3c,
6064 0xfe, 0x0a, 0xf0, 0xfe, 0x6c, 0x08, 0xaf, 0xa0, 0xae, 0xfe, 0x96, 0x08,
6065 0x05, 0x29, 0x01, 0x41, 0x05, 0xed, 0x14, 0x24, 0x05, 0xed, 0xfe, 0x9c,
6066 0xf7, 0x9f, 0x01, 0xfe, 0xae, 0x1e, 0xfe, 0x18, 0x58, 0x01, 0xfe, 0xbe,
6067 0x1e, 0xfe, 0x99, 0x58, 0xfe, 0x78, 0x18, 0xfe, 0xf9, 0x18, 0x8e, 0xfe,
6068 0x16, 0x09, 0x10, 0x6a, 0x22, 0x6b, 0x01, 0x0c, 0x61, 0x54, 0x44, 0x21,
6069 0x2c, 0x09, 0x1a, 0xf8, 0x77, 0x01, 0xfe, 0x7e, 0x1e, 0x47, 0x2c, 0x7a,
6070 0x30, 0xf0, 0xfe, 0x83, 0xe7, 0xfe, 0x3f, 0x00, 0x71, 0xfe, 0x03, 0x40,
6071 0x01, 0x0c, 0x61, 0x65, 0x44, 0x01, 0xc2, 0xc8, 0xfe, 0x1f, 0x40, 0x20,
6072 0x6e, 0x01, 0xfe, 0x6a, 0x16, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0xfe,
6073 0x44, 0x51, 0xfe, 0xc6, 0x51, 0xfe, 0x10, 0x10, 0x01, 0xfe, 0xce, 0x1e,
6074 0x01, 0xfe, 0xde, 0x1e, 0x10, 0x68, 0x22, 0x69, 0x01, 0xfe, 0xee, 0x1e,
6075 0x01, 0xfe, 0xfe, 0x1e, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x10, 0x4b,
6076 0x22, 0x4c, 0xfe, 0x8a, 0x10, 0x01, 0x0c, 0x06, 0x54, 0xfe, 0x50, 0x12,
6077 0x01, 0xfe, 0xae, 0x1e, 0x01, 0xfe, 0xbe, 0x1e, 0x10, 0x6a, 0x22, 0x6b,
6078 0x01, 0x0c, 0x06, 0x65, 0x4e, 0x01, 0xc2, 0x0f, 0xfe, 0x1f, 0x80, 0x04,
6079 0xfe, 0x9f, 0x83, 0x33, 0x0b, 0x0e, 0x20, 0x6e, 0x0f, 0xfe, 0x44, 0x90,
6080 0x04, 0xfe, 0xc4, 0x93, 0x3a, 0x0b, 0xfe, 0xc6, 0x90, 0x04, 0xfe, 0xc6,
6081 0x93, 0x79, 0x0b, 0x0e, 0x10, 0x6c, 0x22, 0x6d, 0x01, 0xfe, 0xce, 0x1e,
6082 0x01, 0xfe, 0xde, 0x1e, 0x10, 0x68, 0x22, 0x69, 0x0f, 0xfe, 0x40, 0x90,
6083 0x04, 0xfe, 0xc0, 0x93, 0x3a, 0x0b, 0xfe, 0xc2, 0x90, 0x04, 0xfe, 0xc2,
6084 0x93, 0x79, 0x0b, 0x0e, 0x10, 0x4b, 0x22, 0x4c, 0x10, 0x64, 0x22, 0x34,
6085 0x01, 0x0c, 0x61, 0x24, 0x44, 0x37, 0x13, 0xfe, 0x4e, 0x11, 0x2f, 0xfe,
6086 0xde, 0x09, 0xfe, 0x9e, 0xf0, 0xfe, 0xf2, 0x09, 0xfe, 0x01, 0x48, 0x1b,
6087 0x3c, 0x37, 0x88, 0xf5, 0xd4, 0xfe, 0x1e, 0x0a, 0xd5, 0xfe, 0x42, 0x0a,
6088 0xd2, 0xfe, 0x1e, 0x0a, 0xd3, 0xfe, 0x42, 0x0a, 0xae, 0xfe, 0x12, 0x0a,
6089 0xfe, 0x06, 0xf0, 0xfe, 0x18, 0x0a, 0xaf, 0xa0, 0x05, 0x29, 0x01, 0x41,
6090 0xfe, 0xc1, 0x10, 0x14, 0x24, 0xfe, 0xc1, 0x10, 0x01, 0x76, 0x06, 0x07,
6091 0xfe, 0x14, 0x12, 0x01, 0x76, 0x06, 0x0d, 0x5d, 0x01, 0x0c, 0x06, 0x0d,
6092 0xfe, 0x74, 0x12, 0xfe, 0x2e, 0x1c, 0x05, 0xfe, 0x1a, 0x0c, 0x01, 0x76,
6093 0x06, 0x07, 0x5d, 0x01, 0x76, 0x06, 0x0d, 0x41, 0xfe, 0x2c, 0x1c, 0xfe,
6094 0xaa, 0xf0, 0xfe, 0xce, 0x0a, 0xfe, 0xac, 0xf0, 0xfe, 0x66, 0x0a, 0xfe,
6095 0x92, 0x10, 0xc4, 0xf6, 0xfe, 0xad, 0xf0, 0xfe, 0x72, 0x0a, 0x05, 0xfe,
6096 0x1a, 0x0c, 0xc5, 0xfe, 0xe7, 0x10, 0xfe, 0x2b, 0xf0, 0xbf, 0xfe, 0x6b,
6097 0x18, 0x23, 0xfe, 0x00, 0xfe, 0xfe, 0x1c, 0x12, 0xac, 0xfe, 0xd2, 0xf0,
6098 0xbf, 0xfe, 0x76, 0x18, 0x23, 0x1d, 0x1b, 0xbf, 0x03, 0xe3, 0x23, 0x07,
6099 0x1b, 0xbf, 0xd4, 0x5b, 0xd5, 0x5b, 0xd2, 0x5b, 0xd3, 0x5b, 0xc4, 0xc5,
6100 0xfe, 0xa9, 0x10, 0x75, 0x5e, 0x32, 0x1f, 0x7f, 0x01, 0x42, 0x19, 0xfe,
6101 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x70, 0x19, 0x98, 0x05, 0x70, 0xfe, 0x74,
6102 0x18, 0x23, 0xfe, 0x00, 0xf8, 0x1b, 0x5b, 0x7d, 0x12, 0x01, 0xfe, 0x78,
6103 0x0f, 0x4d, 0x01, 0xfe, 0x96, 0x1a, 0x21, 0x30, 0x77, 0x7d, 0x1d, 0x05,
6104 0x5b, 0x01, 0x0c, 0x06, 0x0d, 0x2b, 0xfe, 0xe2, 0x0b, 0x01, 0x0c, 0x06,
6105 0x54, 0xfe, 0xa6, 0x12, 0x01, 0x0c, 0x06, 0x24, 0xfe, 0x88, 0x13, 0x21,
6106 0x6e, 0xc7, 0x01, 0xfe, 0x1e, 0x1f, 0x0f, 0xfe, 0x83, 0x80, 0x04, 0xfe,
6107 0x83, 0x83, 0xfe, 0xc9, 0x47, 0x0b, 0x0e, 0xfe, 0xc8, 0x44, 0xfe, 0x42,
6108 0x13, 0x0f, 0xfe, 0x04, 0x91, 0x04, 0xfe, 0x84, 0x93, 0xfe, 0xca, 0x57,
6109 0x0b, 0xfe, 0x86, 0x91, 0x04, 0xfe, 0x86, 0x93, 0xfe, 0xcb, 0x57, 0x0b,
6110 0x0e, 0x7a, 0x30, 0xfe, 0x40, 0x59, 0xfe, 0xc1, 0x59, 0x8e, 0x40, 0x03,
6111 0x6a, 0x3b, 0x6b, 0x10, 0x97, 0x22, 0x98, 0xd9, 0x6a, 0xda, 0x6b, 0x01,
6112 0xc2, 0xc8, 0x7a, 0x30, 0x20, 0x6e, 0xdb, 0x64, 0xdc, 0x34, 0x91, 0x6c,
6113 0x7e, 0x6d, 0xfe, 0x44, 0x55, 0xfe, 0xe5, 0x55, 0xfe, 0x04, 0xfa, 0x64,
6114 0xfe, 0x05, 0xfa, 0x34, 0x01, 0xfe, 0x6a, 0x16, 0xa3, 0x26, 0x10, 0x97,
6115 0x10, 0x98, 0x91, 0x6c, 0x7e, 0x6d, 0xfe, 0x14, 0x10, 0x01, 0x0c, 0x06,
6116 0x24, 0x1b, 0x40, 0x91, 0x4b, 0x7e, 0x4c, 0x01, 0x0c, 0x06, 0xfe, 0xf7,
6117 0x00, 0x44, 0x03, 0x68, 0x3b, 0x69, 0xfe, 0x10, 0x58, 0xfe, 0x91, 0x58,
6118 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0x05, 0x5b, 0x01, 0x0c, 0x06, 0x24,
6119 0x1b, 0x40, 0x01, 0x0c, 0x06, 0xfe, 0xf7, 0x00, 0x44, 0x78, 0x01, 0xfe,
6120 0x8e, 0x1e, 0x4f, 0x0f, 0xfe, 0x10, 0x90, 0x04, 0xfe, 0x90, 0x93, 0x3a,
6121 0x0b, 0xfe, 0x92, 0x90, 0x04, 0xfe, 0x92, 0x93, 0x79, 0x0b, 0x0e, 0xfe,
6122 0xbd, 0x10, 0x01, 0x43, 0x09, 0xbb, 0x1b, 0xfe, 0x6e, 0x0a, 0x15, 0xbb,
6123 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x14, 0x13, 0x03, 0x4b, 0x3b, 0x4c, 0x8e,
6124 0xfe, 0x6e, 0x0a, 0xfe, 0x0c, 0x58, 0xfe, 0x8d, 0x58, 0x05, 0x5b, 0x26,
6125 0x3e, 0x0f, 0xfe, 0x19, 0x80, 0x04, 0xfe, 0x99, 0x83, 0x33, 0x0b, 0x0e,
6126 0xfe, 0xe5, 0x10, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x1a, 0x12, 0xfe, 0x6c,
6127 0x19, 0xfe, 0x19, 0x41, 0xfe, 0x6b, 0x18, 0xac, 0xfe, 0xd1, 0xf0, 0xef,
6128 0x1f, 0x92, 0x01, 0x42, 0x19, 0xfe, 0x44, 0x00, 0xfe, 0x90, 0x10, 0xfe,
6129 0x6c, 0x19, 0xd9, 0x4b, 0xfe, 0xed, 0x19, 0xda, 0x4c, 0xfe, 0x0c, 0x51,
6130 0xfe, 0x8e, 0x51, 0xfe, 0x6b, 0x18, 0x23, 0xfe, 0x00, 0xff, 0x31, 0xfe,
6131 0x76, 0x10, 0xac, 0xfe, 0xd2, 0xf0, 0xfe, 0xba, 0x0c, 0xfe, 0x76, 0x18,
6132 0x23, 0x1d, 0x5d, 0x03, 0xe3, 0x23, 0x07, 0xfe, 0x08, 0x13, 0x19, 0xfe,
6133 0x16, 0x00, 0x05, 0x70, 0xfe, 0xd1, 0xf0, 0xfe, 0xcc, 0x0c, 0x1f, 0x92,
6134 0x01, 0x42, 0x19, 0xfe, 0x17, 0x00, 0x5c, 0xfe, 0xce, 0xf0, 0xfe, 0xd2,
6135 0x0c, 0xfe, 0x3e, 0x10, 0xfe, 0xcd, 0xf0, 0xfe, 0xde, 0x0c, 0x19, 0xfe,
6136 0x22, 0x00, 0x05, 0x70, 0xfe, 0xcb, 0xf0, 0xfe, 0xea, 0x0c, 0x19, 0xfe,
6137 0x24, 0x00, 0x05, 0x70, 0xfe, 0xd0, 0xf0, 0xfe, 0xf4, 0x0c, 0x19, 0x94,
6138 0xfe, 0x1c, 0x10, 0xfe, 0xcf, 0xf0, 0xfe, 0xfe, 0x0c, 0x19, 0x4a, 0xf3,
6139 0xfe, 0xcc, 0xf0, 0xef, 0x01, 0x76, 0x06, 0x24, 0x4d, 0x19, 0xfe, 0x12,
6140 0x00, 0x37, 0x13, 0xfe, 0x4e, 0x11, 0x2f, 0xfe, 0x16, 0x0d, 0xfe, 0x9e,
6141 0xf0, 0xfe, 0x2a, 0x0d, 0xfe, 0x01, 0x48, 0x1b, 0x3c, 0x37, 0x88, 0xf5,
6142 0xd4, 0x29, 0xd5, 0x29, 0xd2, 0x29, 0xd3, 0x29, 0x37, 0xfe, 0x9c, 0x32,
6143 0x2f, 0xfe, 0x3e, 0x0d, 0x2a, 0x3c, 0xae, 0xfe, 0x62, 0x0d, 0xaf, 0xa0,
6144 0xd4, 0x9f, 0xd5, 0x9f, 0xd2, 0x9f, 0xd3, 0x9f, 0x05, 0x29, 0x01, 0x41,
6145 0xfe, 0xd3, 0x10, 0x15, 0xfe, 0xe8, 0x00, 0xc4, 0xc5, 0x75, 0xd7, 0x99,
6146 0xd8, 0x9c, 0xfe, 0x89, 0xf0, 0x29, 0x27, 0x25, 0xbe, 0xd7, 0x99, 0xd8,
6147 0x9c, 0x2f, 0xfe, 0x8c, 0x0d, 0x16, 0x29, 0x27, 0x25, 0xbd, 0xfe, 0x01,
6148 0x48, 0xa4, 0x19, 0xfe, 0x42, 0x00, 0x05, 0x70, 0x90, 0x07, 0xfe, 0x81,
6149 0x49, 0x1b, 0xfe, 0x64, 0x0e, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x44, 0x13,
6150 0x19, 0x00, 0x2d, 0x0d, 0xfe, 0x54, 0x12, 0x2d, 0xfe, 0x28, 0x00, 0x2b,
6151 0xfe, 0xda, 0x0e, 0x0a, 0x57, 0x01, 0x18, 0x09, 0x00, 0x36, 0x46, 0xfe,
6152 0x28, 0x00, 0xfe, 0xfa, 0x10, 0x01, 0xfe, 0xf4, 0x1c, 0x01, 0xfe, 0x00,
6153 0x1d, 0x0a, 0xba, 0x01, 0xfe, 0x58, 0x10, 0x40, 0x15, 0x56, 0x01, 0x85,
6154 0x05, 0x35, 0x19, 0xfe, 0x44, 0x00, 0x2d, 0x0d, 0xf7, 0x46, 0x0d, 0xfe,
6155 0xcc, 0x10, 0x01, 0xa7, 0x46, 0x0d, 0xfe, 0xc2, 0x10, 0x01, 0xa7, 0x0f,
6156 0xfe, 0x19, 0x82, 0x04, 0xfe, 0x99, 0x83, 0xfe, 0xcc, 0x47, 0x0b, 0x0e,
6157 0xfe, 0x34, 0x46, 0xa5, 0x46, 0x0d, 0x19, 0xfe, 0x43, 0x00, 0xfe, 0xa2,
6158 0x10, 0x01, 0x0c, 0x61, 0x0d, 0x44, 0x01, 0xfe, 0xf4, 0x1c, 0x01, 0xfe,
6159 0x00, 0x1d, 0x40, 0x15, 0x56, 0x01, 0x85, 0x7d, 0x0d, 0x40, 0x51, 0x01,
6160 0xfe, 0x9e, 0x1e, 0x05, 0xfe, 0x3a, 0x03, 0x01, 0x0c, 0x06, 0x0d, 0x5d,
6161 0x46, 0x0d, 0x19, 0x00, 0xfe, 0x62, 0x10, 0x01, 0x76, 0x06, 0x12, 0xfe,
6162 0x5c, 0x12, 0x01, 0x0c, 0x06, 0x12, 0xfe, 0x52, 0x13, 0xfe, 0x1c, 0x1c,
6163 0xfe, 0x9d, 0xf0, 0xfe, 0x8e, 0x0e, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, 0xf0,
6164 0xfe, 0x94, 0x0e, 0x01, 0x0c, 0x61, 0x12, 0x44, 0xfe, 0x9f, 0x10, 0x19,
6165 0xfe, 0x15, 0x00, 0xfe, 0x04, 0xe6, 0x0d, 0x4f, 0xfe, 0x2e, 0x10, 0x19,
6166 0xfe, 0x13, 0x00, 0xfe, 0x10, 0x10, 0x19, 0xfe, 0x47, 0x00, 0xf1, 0x19,
6167 0xfe, 0x41, 0x00, 0xa2, 0x19, 0xfe, 0x24, 0x00, 0x86, 0xc4, 0xc5, 0x75,
6168 0x03, 0x81, 0x1e, 0x2b, 0xea, 0x4f, 0xfe, 0x04, 0xe6, 0x12, 0xfe, 0x9d,
6169 0x41, 0xfe, 0x1c, 0x42, 0x40, 0x01, 0xf4, 0x05, 0x35, 0xfe, 0x12, 0x1c,
6170 0x1f, 0x0d, 0x47, 0xb5, 0xc3, 0x1f, 0xfe, 0x31, 0x00, 0x47, 0xb8, 0x01,
6171 0xfe, 0xd4, 0x11, 0x05, 0xe9, 0x51, 0xfe, 0x06, 0xec, 0xe0, 0xfe, 0x0e,
6172 0x47, 0x46, 0x28, 0xfe, 0xce, 0x45, 0x31, 0x51, 0xfe, 0x06, 0xea, 0xe0,
6173 0xfe, 0x47, 0x4b, 0x45, 0xfe, 0x75, 0x57, 0x03, 0x67, 0xfe, 0x98, 0x56,
6174 0xfe, 0x38, 0x12, 0x0a, 0x5a, 0x01, 0x18, 0xfe, 0x44, 0x48, 0x60, 0x01,
6175 0x0c, 0x06, 0x28, 0xfe, 0x18, 0x13, 0x0a, 0x57, 0x01, 0x18, 0x3e, 0xfe,
6176 0x41, 0x58, 0x0a, 0xba, 0xfe, 0xfa, 0x14, 0xfe, 0x49, 0x54, 0xb0, 0xfe,
6177 0x5e, 0x0f, 0x05, 0xfe, 0x3a, 0x03, 0x0a, 0x67, 0xfe, 0xe0, 0x14, 0xfe,
6178 0x0e, 0x47, 0x46, 0x28, 0xfe, 0xce, 0x45, 0x31, 0x51, 0xfe, 0xce, 0x47,
6179 0xfe, 0xad, 0x13, 0x05, 0x35, 0x21, 0x2c, 0x09, 0x1a, 0xfe, 0x98, 0x12,
6180 0x26, 0x20, 0x96, 0x20, 0xe7, 0xfe, 0x08, 0x1c, 0xfe, 0x7c, 0x19, 0xfe,
6181 0xfd, 0x19, 0xfe, 0x0a, 0x1c, 0x03, 0xe5, 0xfe, 0x48, 0x55, 0xa5, 0x3b,
6182 0xfe, 0x62, 0x01, 0xfe, 0xc9, 0x55, 0x31, 0xfe, 0x74, 0x10, 0x01, 0xfe,
6183 0xf0, 0x1a, 0x03, 0xfe, 0x38, 0x01, 0x3b, 0xfe, 0x3a, 0x01, 0x8e, 0xfe,
6184 0x1e, 0x10, 0xfe, 0x02, 0xec, 0xe7, 0x53, 0x00, 0x36, 0xfe, 0x04, 0xec,
6185 0x2c, 0x60, 0xfe, 0x05, 0xf6, 0xfe, 0x34, 0x01, 0x01, 0xfe, 0x62, 0x1b,
6186 0x01, 0xfe, 0xce, 0x1e, 0xb2, 0x11, 0xfe, 0x18, 0x13, 0xca, 0xfe, 0x02,
6187 0xea, 0xe7, 0x53, 0x92, 0xfe, 0xc3, 0x13, 0x1f, 0x12, 0x47, 0xb5, 0xc3,
6188 0xfe, 0x2a, 0x10, 0x03, 0xfe, 0x38, 0x01, 0x23, 0xfe, 0xf0, 0xff, 0x10,
6189 0xe5, 0x03, 0xfe, 0x3a, 0x01, 0x10, 0xfe, 0x62, 0x01, 0x01, 0xfe, 0x1e,
6190 0x1e, 0x20, 0x2c, 0x15, 0x56, 0x01, 0xfe, 0x9e, 0x1e, 0x13, 0x07, 0x02,
6191 0x26, 0x02, 0x21, 0x96, 0xc7, 0x20, 0x96, 0x09, 0x92, 0xfe, 0x79, 0x13,
6192 0x1f, 0x1d, 0x47, 0xb5, 0xc3, 0xfe, 0xe1, 0x10, 0xcf, 0xfe, 0x03, 0xdc,
6193 0xfe, 0x73, 0x57, 0xfe, 0x80, 0x5d, 0x02, 0xcf, 0xfe, 0x03, 0xdc, 0xfe,
6194 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x02, 0xfe, 0x03, 0x57, 0xcf, 0x26, 0xfe,
6195 0x00, 0xcc, 0x02, 0xfe, 0x03, 0x57, 0xcf, 0x89, 0x02, 0x01, 0x0c, 0x06,
6196 0x4a, 0xfe, 0x4e, 0x13, 0x0f, 0xfe, 0x1c, 0x80, 0x04, 0xfe, 0x9c, 0x83,
6197 0x33, 0x0b, 0x0e, 0x09, 0x07, 0xfe, 0x3a, 0x13, 0x0f, 0xfe, 0x1e, 0x80,
6198 0x04, 0xfe, 0x9e, 0x83, 0x33, 0x0b, 0x0e, 0xfe, 0x2a, 0x13, 0x0f, 0xfe,
6199 0x1d, 0x80, 0x04, 0xfe, 0x9d, 0x83, 0xfe, 0xf9, 0x13, 0x0e, 0xfe, 0x1c,
6200 0x13, 0x01, 0xfe, 0xee, 0x1e, 0xac, 0xfe, 0x14, 0x13, 0x01, 0xfe, 0xfe,
6201 0x1e, 0xfe, 0x81, 0x58, 0xfa, 0x01, 0xfe, 0x0e, 0x1f, 0xfe, 0x30, 0xf4,
6202 0x0d, 0xfe, 0x3c, 0x50, 0xa2, 0x01, 0xfe, 0x92, 0x1b, 0x01, 0x43, 0x09,
6203 0x56, 0xfb, 0x01, 0xfe, 0xc8, 0x1a, 0x01, 0x0c, 0x06, 0x28, 0xa4, 0x01,
6204 0xfe, 0xf4, 0x1c, 0x01, 0xfe, 0x00, 0x1d, 0x15, 0xfe, 0xe9, 0x00, 0x01,
6205 0x0c, 0x06, 0x4a, 0xfe, 0x4e, 0x13, 0x01, 0xfe, 0x22, 0x1b, 0xfe, 0x1e,
6206 0x1c, 0x0f, 0xfe, 0x14, 0x90, 0x04, 0xfe, 0x94, 0x93, 0x3a, 0x0b, 0xfe,
6207 0x96, 0x90, 0x04, 0xfe, 0x96, 0x93, 0x79, 0x0b, 0x0e, 0x10, 0xfe, 0x64,
6208 0x01, 0x22, 0xfe, 0x66, 0x01, 0x01, 0x0c, 0x06, 0x65, 0xf9, 0x0f, 0xfe,
6209 0x03, 0x80, 0x04, 0xfe, 0x83, 0x83, 0x33, 0x0b, 0x0e, 0x77, 0xfe, 0x01,
6210 0xec, 0x2c, 0xfe, 0x80, 0x40, 0x20, 0x2c, 0x7a, 0x30, 0x15, 0xdf, 0x40,
6211 0x21, 0x2c, 0xfe, 0x00, 0x40, 0x8d, 0x2c, 0x02, 0xfe, 0x08, 0x1c, 0x03,
6212 0xfe, 0xac, 0x00, 0xfe, 0x06, 0x58, 0x03, 0xfe, 0xae, 0x00, 0xfe, 0x07,
6213 0x58, 0x03, 0xfe, 0xb0, 0x00, 0xfe, 0x08, 0x58, 0x03, 0xfe, 0xb2, 0x00,
6214 0xfe, 0x09, 0x58, 0xfe, 0x0a, 0x1c, 0x2e, 0x49, 0x20, 0xe0, 0x26, 0x10,
6215 0x66, 0x10, 0x55, 0x10, 0x6f, 0x13, 0x57, 0x52, 0x4f, 0x1c, 0x28, 0xfe,
6216 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x2b, 0xfe, 0x88, 0x11, 0x46, 0x1a, 0x13,
6217 0x5a, 0x52, 0x1c, 0x4a, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x2b, 0xfe,
6218 0x9e, 0x11, 0x2e, 0x1a, 0x20, 0x2c, 0x90, 0x34, 0x60, 0x21, 0x2c, 0xfe,
6219 0x00, 0x40, 0x8d, 0x2c, 0x15, 0xdf, 0xfe, 0x14, 0x56, 0xfe, 0xd6, 0xf0,
6220 0xfe, 0xb2, 0x11, 0xfe, 0x12, 0x1c, 0x75, 0xfe, 0x14, 0x1c, 0xfe, 0x10,
6221 0x1c, 0xfe, 0x18, 0x1c, 0x02, 0x51, 0xfe, 0x0c, 0x14, 0xfe, 0x0e, 0x47,
6222 0xfe, 0x07, 0xe6, 0x28, 0xfe, 0xce, 0x47, 0xfe, 0xf5, 0x13, 0x02, 0x01,
6223 0xa7, 0x90, 0x34, 0x60, 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x42,
6224 0x13, 0xfe, 0x02, 0x80, 0x09, 0x56, 0xfe, 0x34, 0x13, 0x0a, 0x5a, 0x01,
6225 0x18, 0xcb, 0xfe, 0x36, 0x12, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01,
6226 0xfe, 0xb2, 0x16, 0xfe, 0x00, 0xcc, 0xcb, 0xfe, 0xf3, 0x13, 0x3f, 0x89,
6227 0x09, 0x1a, 0xa5, 0x0a, 0x9d, 0x01, 0x18, 0xfe, 0x80, 0x5c, 0x01, 0x85,
6228 0xf2, 0x09, 0x9b, 0xa4, 0xfe, 0x14, 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0xec,
6229 0x11, 0x02, 0xfe, 0x44, 0x58, 0x77, 0xfe, 0x01, 0xec, 0xb8, 0xfe, 0x9e,
6230 0x40, 0xfe, 0x9d, 0xe7, 0x00, 0xfe, 0x9c, 0xe7, 0x12, 0x8d, 0x30, 0x01,
6231 0xf4, 0xfe, 0xdd, 0x10, 0x37, 0xd7, 0x99, 0xd8, 0x9c, 0x27, 0x25, 0xee,
6232 0x09, 0x12, 0xfe, 0x48, 0x12, 0x09, 0x0d, 0xfe, 0x56, 0x12, 0x09, 0x1d,
6233 0xfe, 0x30, 0x12, 0x09, 0xdd, 0x1b, 0xfe, 0xc4, 0x13, 0x09, 0xfe, 0x23,
6234 0x00, 0x1b, 0xfe, 0xd0, 0x13, 0x09, 0x07, 0x1b, 0xfe, 0x34, 0x14, 0x09,
6235 0x24, 0xfe, 0x12, 0x12, 0x09, 0x00, 0x1b, 0x29, 0x1f, 0xdd, 0x01, 0x42,
6236 0xa1, 0x32, 0x01, 0x08, 0xae, 0x41, 0x02, 0x32, 0xfe, 0x62, 0x08, 0x0a,
6237 0xe1, 0x01, 0xfe, 0x58, 0x10, 0x15, 0x9b, 0x05, 0x35, 0x32, 0x01, 0x43,
6238 0x09, 0xbb, 0xfe, 0xd7, 0x13, 0x91, 0x4b, 0x7e, 0x4c, 0x8e, 0xfe, 0x80,
6239 0x13, 0x01, 0x0c, 0x06, 0x54, 0xfe, 0x72, 0x12, 0xdb, 0x64, 0xdc, 0x34,
6240 0xfe, 0x44, 0x55, 0xfe, 0xe5, 0x55, 0xb0, 0xfe, 0x4a, 0x13, 0x21, 0x6e,
6241 0xfe, 0x26, 0x13, 0x03, 0x97, 0x3b, 0x98, 0x8e, 0xfe, 0xb6, 0x0e, 0x10,
6242 0x6a, 0x22, 0x6b, 0x26, 0x10, 0x97, 0x10, 0x98, 0x01, 0xc2, 0x2e, 0x49,
6243 0x88, 0x20, 0x6e, 0x01, 0xfe, 0x6a, 0x16, 0xdb, 0x64, 0xdc, 0x34, 0xfe,
6244 0x04, 0x55, 0xfe, 0xa5, 0x55, 0xfe, 0x04, 0xfa, 0x64, 0xfe, 0x05, 0xfa,
6245 0x34, 0xfe, 0x8f, 0x10, 0x03, 0x6c, 0x3b, 0x6d, 0xfe, 0x40, 0x56, 0xfe,
6246 0xe1, 0x56, 0x10, 0x6c, 0x22, 0x6d, 0x71, 0xdb, 0x64, 0xdc, 0x34, 0xfe,
6247 0x44, 0x55, 0xfe, 0xe5, 0x55, 0x03, 0x68, 0x3b, 0x69, 0xfe, 0x00, 0x56,
6248 0xfe, 0xa1, 0x56, 0x10, 0x68, 0x22, 0x69, 0x01, 0x0c, 0x06, 0x54, 0xf9,
6249 0x21, 0x6e, 0xfe, 0x1f, 0x40, 0x03, 0x6a, 0x3b, 0x6b, 0xfe, 0x2c, 0x50,
6250 0xfe, 0xae, 0x50, 0x03, 0x6c, 0x3b, 0x6d, 0xfe, 0x44, 0x50, 0xfe, 0xc6,
6251 0x50, 0x03, 0x68, 0x3b, 0x69, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0x03,
6252 0x4b, 0x3b, 0x4c, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x05, 0x73, 0x2e,
6253 0x07, 0x20, 0x9e, 0x05, 0x72, 0x32, 0x01, 0x08, 0x16, 0x3d, 0x27, 0x25,
6254 0xee, 0x09, 0x07, 0x2b, 0x3d, 0x01, 0x43, 0x09, 0xbb, 0x2b, 0x72, 0x01,
6255 0xa6, 0x23, 0x3f, 0x1b, 0x3d, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x1e, 0x13,
6256 0x91, 0x4b, 0x7e, 0x4c, 0xfe, 0x0a, 0x55, 0x31, 0xfe, 0x8b, 0x55, 0xd9,
6257 0x4b, 0xda, 0x4c, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0x05, 0x72, 0x01,
6258 0xfe, 0x8e, 0x1e, 0xca, 0xfe, 0x19, 0x41, 0x05, 0x72, 0x32, 0x01, 0x08,
6259 0x2a, 0x3c, 0x16, 0xc0, 0x27, 0x25, 0xbe, 0x2d, 0x1d, 0xc0, 0x2d, 0x0d,
6260 0x83, 0x2d, 0x7f, 0x1b, 0xfe, 0x66, 0x15, 0x05, 0x3d, 0x01, 0x08, 0x2a,
6261 0x3c, 0x16, 0xc0, 0x27, 0x25, 0xbd, 0x09, 0x1d, 0x2b, 0x3d, 0x01, 0x08,
6262 0x16, 0xc0, 0x27, 0x25, 0xfe, 0xe8, 0x09, 0xfe, 0xc2, 0x49, 0x50, 0x03,
6263 0xb6, 0x1e, 0x83, 0x01, 0x38, 0x06, 0x24, 0x31, 0xa1, 0xfe, 0xbb, 0x45,
6264 0x2d, 0x00, 0xa4, 0x46, 0x07, 0x90, 0x3f, 0x01, 0xfe, 0xf8, 0x15, 0x01,
6265 0xa6, 0x86, 0xfe, 0x4b, 0x45, 0xfe, 0x20, 0x13, 0x01, 0x43, 0x09, 0x82,
6266 0xfe, 0x16, 0x13, 0x03, 0x9a, 0x1e, 0x5d, 0x03, 0x55, 0x1e, 0x31, 0x5e,
6267 0x05, 0x72, 0xfe, 0xc0, 0x5d, 0x01, 0xa7, 0xfe, 0x03, 0x17, 0x03, 0x66,
6268 0x8a, 0x10, 0x66, 0x5e, 0x32, 0x01, 0x08, 0x17, 0x73, 0x01, 0xfe, 0x56,
6269 0x19, 0x05, 0x73, 0x01, 0x08, 0x2a, 0x3c, 0x16, 0x3d, 0x27, 0x25, 0xbd,
6270 0x09, 0x07, 0x2b, 0x3d, 0x01, 0xfe, 0xbe, 0x16, 0xfe, 0x42, 0x58, 0xfe,
6271 0xe8, 0x14, 0x01, 0xa6, 0x86, 0xfe, 0x4a, 0xf4, 0x0d, 0x1b, 0x3d, 0xfe,
6272 0x4a, 0xf4, 0x07, 0xfe, 0x0e, 0x12, 0x01, 0x43, 0x09, 0x82, 0x4e, 0x05,
6273 0x72, 0x03, 0x55, 0x8a, 0x10, 0x55, 0x5e, 0x32, 0x01, 0x08, 0x17, 0x73,
6274 0x01, 0xfe, 0x84, 0x19, 0x05, 0x73, 0x01, 0x08, 0x2a, 0x3c, 0x16, 0x3d,
6275 0x27, 0x25, 0xbd, 0x09, 0x12, 0x2b, 0x3d, 0x01, 0xfe, 0xe8, 0x17, 0x8b,
6276 0xfe, 0xaa, 0x14, 0xfe, 0xb6, 0x14, 0x86, 0xa8, 0xb2, 0x0d, 0x1b, 0x3d,
6277 0xb2, 0x07, 0xfe, 0x0e, 0x12, 0x01, 0x43, 0x09, 0x82, 0x4e, 0x05, 0x72,
6278 0x03, 0x6f, 0x8a, 0x10, 0x6f, 0x5e, 0x32, 0x01, 0x08, 0x17, 0x73, 0x01,
6279 0xfe, 0xc0, 0x19, 0x05, 0x73, 0x13, 0x07, 0x2f, 0xfe, 0xcc, 0x15, 0x17,
6280 0xfe, 0xe2, 0x15, 0x5f, 0xcc, 0x01, 0x08, 0x26, 0x5f, 0x02, 0x8f, 0xfe,
6281 0xde, 0x15, 0x2a, 0xfe, 0xde, 0x15, 0x16, 0xfe, 0xcc, 0x15, 0x5e, 0x32,
6282 0x01, 0x08, 0xfe, 0xd5, 0x10, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52,
6283 0xad, 0x23, 0xfe, 0xff, 0x7f, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x02,
6284 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, 0xad, 0x23, 0x3f, 0xfe, 0x30,
6285 0x56, 0xfe, 0x00, 0x5c, 0x02, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52,
6286 0xad, 0x02, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, 0xfe, 0x00, 0x5e,
6287 0x02, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, 0xad, 0xfe, 0x0b, 0x58,
6288 0x02, 0x0a, 0x66, 0x01, 0x5c, 0x0a, 0x55, 0x01, 0x5c, 0x0a, 0x6f, 0x01,
6289 0x5c, 0x02, 0x01, 0xfe, 0x1e, 0x1f, 0x23, 0x1a, 0xff, 0x03, 0x00, 0x54,
6290 0xfe, 0x00, 0xf4, 0x24, 0x52, 0x0f, 0xfe, 0x00, 0x7c, 0x04, 0xfe, 0x07,
6291 0x7c, 0x3a, 0x0b, 0x0e, 0xfe, 0x00, 0x71, 0xfe, 0xf9, 0x18, 0xfe, 0x7a,
6292 0x19, 0xfe, 0xfb, 0x19, 0xfe, 0x1a, 0xf7, 0x00, 0xfe, 0x1b, 0xf7, 0x00,
6293 0x7a, 0x30, 0x10, 0x68, 0x22, 0x69, 0xd9, 0x6c, 0xda, 0x6d, 0x02, 0xfe,
6294 0x62, 0x08, 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x77,
6295 0x02, 0x01, 0xc6, 0xfe, 0x42, 0x48, 0x4f, 0x50, 0x45, 0x01, 0x08, 0x16,
6296 0xfe, 0xe0, 0x17, 0x27, 0x25, 0xbe, 0x01, 0x08, 0x16, 0xfe, 0xe0, 0x17,
6297 0x27, 0x25, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59, 0x03, 0x9a, 0x1e, 0xfe,
6298 0xda, 0x12, 0x01, 0x38, 0x06, 0x12, 0xfe, 0xd0, 0x13, 0x26, 0x53, 0x12,
6299 0x48, 0xfe, 0x08, 0x17, 0xd1, 0x12, 0x53, 0x12, 0xfe, 0x1e, 0x13, 0x2d,
6300 0xb4, 0x7b, 0xfe, 0x26, 0x17, 0x4d, 0x13, 0x07, 0x1c, 0xb4, 0x90, 0x04,
6301 0xfe, 0x78, 0x10, 0xff, 0x02, 0x83, 0x55, 0xf1, 0xff, 0x02, 0x83, 0x55,
6302 0x53, 0x1d, 0xfe, 0x12, 0x13, 0xd6, 0xfe, 0x30, 0x00, 0xb0, 0xfe, 0x80,
6303 0x17, 0x1c, 0x63, 0x13, 0x07, 0xfe, 0x56, 0x10, 0x53, 0x0d, 0xfe, 0x16,
6304 0x13, 0xd6, 0xfe, 0x64, 0x00, 0xb0, 0xfe, 0x80, 0x17, 0x0a, 0xfe, 0x64,
6305 0x00, 0x1c, 0x94, 0x13, 0x07, 0xfe, 0x28, 0x10, 0x53, 0x07, 0xfe, 0x60,
6306 0x13, 0xd6, 0xfe, 0xc8, 0x00, 0xb0, 0xfe, 0x80, 0x17, 0x0a, 0xfe, 0xc8,
6307 0x00, 0x1c, 0x95, 0x13, 0x07, 0x71, 0xd6, 0xfe, 0x90, 0x01, 0x48, 0xfe,
6308 0x8c, 0x17, 0x45, 0xf3, 0xfe, 0x43, 0xf4, 0x96, 0xfe, 0x56, 0xf0, 0xfe,
6309 0x9e, 0x17, 0xfe, 0x04, 0xf4, 0x58, 0xfe, 0x43, 0xf4, 0x94, 0xf6, 0x8b,
6310 0x01, 0xfe, 0x24, 0x16, 0x23, 0x3f, 0xfc, 0xa8, 0x8c, 0x49, 0x48, 0xfe,
6311 0xda, 0x17, 0x62, 0x49, 0xfe, 0x1c, 0x10, 0xa8, 0x8c, 0x80, 0x48, 0xfe,
6312 0xda, 0x17, 0x62, 0x80, 0x71, 0x50, 0x26, 0xfe, 0x4d, 0xf4, 0x00, 0xf7,
6313 0x45, 0x13, 0x07, 0xfe, 0xb4, 0x56, 0xfe, 0xc3, 0x58, 0x02, 0x50, 0x13,
6314 0x0d, 0x02, 0x50, 0x3e, 0x78, 0x4f, 0x45, 0x01, 0x08, 0x16, 0xa9, 0x27,
6315 0x25, 0xbe, 0xfe, 0x03, 0xea, 0xfe, 0x7e, 0x01, 0x01, 0x08, 0x16, 0xa9,
6316 0x27, 0x25, 0xfe, 0xe9, 0x0a, 0x01, 0x08, 0x16, 0xa9, 0x27, 0x25, 0xfe,
6317 0xe9, 0x0a, 0xfe, 0x05, 0xea, 0xfe, 0x7f, 0x01, 0x01, 0x08, 0x16, 0xa9,
6318 0x27, 0x25, 0xfe, 0x69, 0x09, 0xfe, 0x02, 0xea, 0xfe, 0x80, 0x01, 0x01,
6319 0x08, 0x16, 0xa9, 0x27, 0x25, 0xfe, 0xe8, 0x08, 0x47, 0xfe, 0x81, 0x01,
6320 0x03, 0xb6, 0x1e, 0x83, 0x01, 0x38, 0x06, 0x24, 0x31, 0xa2, 0x78, 0xf2,
6321 0x53, 0x07, 0x36, 0xfe, 0x34, 0xf4, 0x3f, 0xa1, 0x78, 0x03, 0x9a, 0x1e,
6322 0x83, 0x01, 0x38, 0x06, 0x12, 0x31, 0xf0, 0x4f, 0x45, 0xfe, 0x90, 0x10,
6323 0xfe, 0x40, 0x5a, 0x23, 0x3f, 0xfb, 0x8c, 0x49, 0x48, 0xfe, 0xaa, 0x18,
6324 0x62, 0x49, 0x71, 0x8c, 0x80, 0x48, 0xfe, 0xaa, 0x18, 0x62, 0x80, 0xfe,
6325 0xb4, 0x56, 0xfe, 0x40, 0x5d, 0x01, 0xc6, 0x01, 0xfe, 0xac, 0x1d, 0xfe,
6326 0x02, 0x17, 0xfe, 0xc8, 0x45, 0xfe, 0x5a, 0xf0, 0xfe, 0xc0, 0x18, 0xfe,
6327 0x43, 0x48, 0x2d, 0x93, 0x36, 0xfe, 0x34, 0xf4, 0xfe, 0x00, 0x11, 0xfe,
6328 0x40, 0x10, 0x2d, 0xb4, 0x36, 0xfe, 0x34, 0xf4, 0x04, 0xfe, 0x34, 0x10,
6329 0x2d, 0xfe, 0x0b, 0x00, 0x36, 0x46, 0x63, 0xfe, 0x28, 0x10, 0xfe, 0xc0,
6330 0x49, 0xff, 0x02, 0x00, 0x54, 0xb2, 0xfe, 0x90, 0x01, 0x48, 0xfe, 0xfa,
6331 0x18, 0x45, 0xfe, 0x1c, 0xf4, 0x3f, 0xf3, 0xfe, 0x40, 0xf4, 0x96, 0xfe,
6332 0x56, 0xf0, 0xfe, 0x0c, 0x19, 0xfe, 0x04, 0xf4, 0x58, 0xfe, 0x40, 0xf4,
6333 0x94, 0xf6, 0x3e, 0x2d, 0x93, 0x4e, 0xd0, 0x0d, 0x21, 0xfe, 0x7f, 0x01,
6334 0xfe, 0xc8, 0x46, 0xfe, 0x24, 0x13, 0x8c, 0x00, 0x5d, 0x26, 0x21, 0xfe,
6335 0x7e, 0x01, 0xfe, 0xc8, 0x45, 0xfe, 0x14, 0x13, 0x21, 0xfe, 0x80, 0x01,
6336 0xfe, 0x48, 0x45, 0xfa, 0x21, 0xfe, 0x81, 0x01, 0xfe, 0xc8, 0x44, 0x4e,
6337 0x26, 0x02, 0x13, 0x07, 0x02, 0x78, 0x45, 0x50, 0x13, 0x0d, 0x02, 0x14,
6338 0x07, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x14, 0x0d, 0x01, 0x08, 0x17,
6339 0xfe, 0x82, 0x19, 0x14, 0x1d, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x5f,
6340 0xfe, 0x89, 0x49, 0x01, 0x08, 0x02, 0x14, 0x07, 0x01, 0x08, 0x17, 0xc1,
6341 0x14, 0x1d, 0x01, 0x08, 0x17, 0xc1, 0x14, 0x07, 0x01, 0x08, 0x17, 0xc1,
6342 0xfe, 0x89, 0x49, 0x01, 0x08, 0x17, 0xc1, 0x5f, 0xfe, 0x89, 0x4a, 0x01,
6343 0x08, 0x02, 0x50, 0x02, 0x14, 0x07, 0x01, 0x08, 0x17, 0x74, 0x14, 0x7f,
6344 0x01, 0x08, 0x17, 0x74, 0x14, 0x12, 0x01, 0x08, 0x17, 0x74, 0xfe, 0x89,
6345 0x49, 0x01, 0x08, 0x17, 0x74, 0x14, 0x00, 0x01, 0x08, 0x17, 0x74, 0xfe,
6346 0x89, 0x4a, 0x01, 0x08, 0x17, 0x74, 0xfe, 0x09, 0x49, 0x01, 0x08, 0x17,
6347 0x74, 0x5f, 0xcc, 0x01, 0x08, 0x02, 0x21, 0xe4, 0x09, 0x07, 0xfe, 0x4c,
6348 0x13, 0xc8, 0x20, 0xe4, 0xfe, 0x49, 0xf4, 0x00, 0x4d, 0x5f, 0xa1, 0x5e,
6349 0xfe, 0x01, 0xec, 0xfe, 0x27, 0x01, 0xcc, 0xff, 0x02, 0x00, 0x10, 0x2f,
6350 0xfe, 0x3e, 0x1a, 0x01, 0x43, 0x09, 0xfe, 0xe3, 0x00, 0xfe, 0x22, 0x13,
6351 0x16, 0xfe, 0x64, 0x1a, 0x26, 0x20, 0x9e, 0x01, 0x41, 0x21, 0x9e, 0x09,
6352 0x07, 0x5d, 0x01, 0x0c, 0x61, 0x07, 0x44, 0x02, 0x0a, 0x5a, 0x01, 0x18,
6353 0xfe, 0x00, 0x40, 0xaa, 0x09, 0x1a, 0xfe, 0x12, 0x13, 0x0a, 0x9d, 0x01,
6354 0x18, 0xaa, 0x0a, 0x67, 0x01, 0xa3, 0x02, 0x0a, 0x9d, 0x01, 0x18, 0xaa,
6355 0xfe, 0x80, 0xe7, 0x1a, 0x09, 0x1a, 0x5d, 0xfe, 0x45, 0x58, 0x01, 0xfe,
6356 0xb2, 0x16, 0xaa, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0xaa, 0x0a, 0x67, 0x01,
6357 0xa3, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x01, 0xfe, 0x7e, 0x1e, 0xfe, 0x80,
6358 0x4c, 0xfe, 0x49, 0xe4, 0x1a, 0xfe, 0x12, 0x13, 0x0a, 0x9d, 0x01, 0x18,
6359 0xfe, 0x80, 0x4c, 0x0a, 0x67, 0x01, 0x5c, 0x02, 0x1c, 0x1a, 0x87, 0x7c,
6360 0xe5, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x24, 0x1c, 0xfe, 0x1d,
6361 0xf7, 0x28, 0xb1, 0xfe, 0x04, 0x1b, 0x01, 0xfe, 0x2a, 0x1c, 0xfa, 0xb3,
6362 0x28, 0x7c, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x02, 0xc9, 0x2b, 0xfe,
6363 0xf4, 0x1a, 0xfe, 0xfa, 0x10, 0x1c, 0x1a, 0x87, 0x03, 0xfe, 0x64, 0x01,
6364 0xfe, 0x00, 0xf4, 0x24, 0xfe, 0x18, 0x58, 0x03, 0xfe, 0x66, 0x01, 0xfe,
6365 0x19, 0x58, 0xb3, 0x24, 0x01, 0xfe, 0x0e, 0x1f, 0xfe, 0x30, 0xf4, 0x07,
6366 0xfe, 0x3c, 0x50, 0x7c, 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, 0xfe, 0x1c,
6367 0xf7, 0x24, 0xb1, 0xfe, 0x50, 0x1b, 0xfe, 0xd4, 0x14, 0x31, 0x02, 0xc9,
6368 0x2b, 0xfe, 0x26, 0x1b, 0xfe, 0xba, 0x10, 0x1c, 0x1a, 0x87, 0xfe, 0x83,
6369 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x1d, 0xf7, 0x54, 0xb1,
6370 0xfe, 0x72, 0x1b, 0xfe, 0xb2, 0x14, 0xfc, 0xb3, 0x54, 0x7c, 0x12, 0xfe,
6371 0xaf, 0x19, 0xfe, 0x98, 0xe7, 0x00, 0x02, 0xc9, 0x2b, 0xfe, 0x66, 0x1b,
6372 0xfe, 0x8a, 0x10, 0x1c, 0x1a, 0x87, 0x8b, 0x0f, 0xfe, 0x30, 0x90, 0x04,
6373 0xfe, 0xb0, 0x93, 0x3a, 0x0b, 0xfe, 0x18, 0x58, 0xfe, 0x32, 0x90, 0x04,
6374 0xfe, 0xb2, 0x93, 0x3a, 0x0b, 0xfe, 0x19, 0x58, 0x0e, 0xa8, 0xb3, 0x4a,
6375 0x7c, 0x12, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0x4a, 0xb1, 0xfe, 0xc6,
6376 0x1b, 0xfe, 0x5e, 0x14, 0x31, 0x02, 0xc9, 0x2b, 0xfe, 0x96, 0x1b, 0x5c,
6377 0xfe, 0x02, 0xf6, 0x1a, 0x87, 0xfe, 0x18, 0xfe, 0x6a, 0xfe, 0x19, 0xfe,
6378 0x6b, 0x01, 0xfe, 0x1e, 0x1f, 0xfe, 0x1d, 0xf7, 0x65, 0xb1, 0xfe, 0xee,
6379 0x1b, 0xfe, 0x36, 0x14, 0xfe, 0x1c, 0x13, 0xb3, 0x65, 0x3e, 0xfe, 0x83,
6380 0x58, 0xfe, 0xaf, 0x19, 0xfe, 0x80, 0xe7, 0x1a, 0xfe, 0x81, 0xe7, 0x1a,
6381 0x15, 0xfe, 0xdd, 0x00, 0x7a, 0x30, 0x02, 0x7a, 0x30, 0xfe, 0x12, 0x45,
6382 0x2b, 0xfe, 0xdc, 0x1b, 0x1f, 0x07, 0x47, 0xb5, 0xc3, 0x05, 0x35, 0xfe,
6383 0x39, 0xf0, 0x75, 0x26, 0x02, 0xfe, 0x7e, 0x18, 0x23, 0x1d, 0x36, 0x13,
6384 0x11, 0x02, 0x87, 0x03, 0xe3, 0x23, 0x07, 0xfe, 0xef, 0x12, 0xfe, 0xe1,
6385 0x10, 0x90, 0x34, 0x60, 0xfe, 0x02, 0x80, 0x09, 0x56, 0xfe, 0x3c, 0x13,
6386 0xfe, 0x82, 0x14, 0xfe, 0x42, 0x13, 0x51, 0xfe, 0x06, 0x83, 0x0a, 0x5a,
6387 0x01, 0x18, 0xcb, 0xfe, 0x3e, 0x12, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48,
6388 0x01, 0xfe, 0xb2, 0x16, 0xfe, 0x00, 0xcc, 0xcb, 0xfe, 0xf3, 0x13, 0x3f,
6389 0x89, 0x09, 0x1a, 0xa5, 0x0a, 0x9d, 0x01, 0x18, 0xfe, 0x80, 0x4c, 0x01,
6390 0x85, 0xfe, 0x16, 0x10, 0x09, 0x9b, 0x4e, 0xfe, 0x40, 0x14, 0xfe, 0x24,
6391 0x12, 0xfe, 0x14, 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x52, 0x1c, 0x1c, 0x0d,
6392 0x02, 0xfe, 0x9c, 0xe7, 0x0d, 0x19, 0xfe, 0x15, 0x00, 0x40, 0x8d, 0x30,
6393 0x01, 0xf4, 0x1c, 0x07, 0x02, 0x51, 0xfe, 0x06, 0x83, 0xfe, 0x18, 0x80,
6394 0x61, 0x28, 0x44, 0x15, 0x56, 0x01, 0x85, 0x1c, 0x07, 0x02, 0xfe, 0x38,
6395 0x90, 0xfe, 0xba, 0x90, 0x91, 0xde, 0x7e, 0xdf, 0xfe, 0x48, 0x55, 0x31,
6396 0xfe, 0xc9, 0x55, 0x02, 0x21, 0xb9, 0x88, 0x20, 0xb9, 0x02, 0x0a, 0xba,
6397 0x01, 0x18, 0xfe, 0x41, 0x48, 0x0a, 0x57, 0x01, 0x18, 0xfe, 0x49, 0x44,
6398 0x1b, 0xfe, 0x1e, 0x1d, 0x88, 0x89, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x09,
6399 0x1a, 0xa4, 0x0a, 0x67, 0x01, 0xa3, 0x0a, 0x57, 0x01, 0x18, 0x88, 0x89,
6400 0x02, 0xfe, 0x4e, 0xe4, 0x1d, 0x7b, 0xfe, 0x52, 0x1d, 0x03, 0xfe, 0x90,
6401 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10, 0xfe, 0x4e, 0xe4, 0xdd, 0x7b,
6402 0xfe, 0x64, 0x1d, 0x03, 0xfe, 0x92, 0x00, 0xd1, 0x12, 0xfe, 0x1a, 0x10,
6403 0xfe, 0x4e, 0xe4, 0xfe, 0x0b, 0x00, 0x7b, 0xfe, 0x76, 0x1d, 0x03, 0xfe,
6404 0x94, 0x00, 0xd1, 0x24, 0xfe, 0x08, 0x10, 0x03, 0xfe, 0x96, 0x00, 0xd1,
6405 0x63, 0xfe, 0x4e, 0x45, 0x83, 0xca, 0xff, 0x04, 0x68, 0x54, 0xfe, 0xf1,
6406 0x10, 0x23, 0x49, 0xfe, 0x08, 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c,
6407 0xfe, 0x1a, 0xf4, 0xfe, 0x00, 0x04, 0x83, 0xb2, 0x1d, 0x48, 0xfe, 0xaa,
6408 0x1d, 0x13, 0x1d, 0x02, 0x09, 0x92, 0xfe, 0x5a, 0xf0, 0xfe, 0xba, 0x1d,
6409 0x2e, 0x93, 0xfe, 0x34, 0x10, 0x09, 0x12, 0xfe, 0x5a, 0xf0, 0xfe, 0xc8,
6410 0x1d, 0x2e, 0xb4, 0xfe, 0x26, 0x10, 0x09, 0x1d, 0x36, 0x2e, 0x63, 0xfe,
6411 0x1a, 0x10, 0x09, 0x0d, 0x36, 0x2e, 0x94, 0xf2, 0x09, 0x07, 0x36, 0x2e,
6412 0x95, 0xa1, 0xc8, 0x02, 0x1f, 0x93, 0x01, 0x42, 0xfe, 0x04, 0xfe, 0x99,
6413 0x03, 0x9c, 0x8b, 0x02, 0x2a, 0xfe, 0x1c, 0x1e, 0xfe, 0x14, 0xf0, 0x08,
6414 0x2f, 0xfe, 0x0c, 0x1e, 0x2a, 0xfe, 0x1c, 0x1e, 0x8f, 0xfe, 0x1c, 0x1e,
6415 0xfe, 0x82, 0xf0, 0xfe, 0x10, 0x1e, 0x02, 0x0f, 0x3f, 0x04, 0xfe, 0x80,
6416 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x18, 0x80, 0x04, 0xfe, 0x98,
6417 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x02, 0x80, 0x04, 0xfe, 0x82,
6418 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06, 0x80, 0x04, 0xfe, 0x86,
6419 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x1b, 0x80, 0x04, 0xfe, 0x9b,
6420 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x04, 0x80, 0x04, 0xfe, 0x84,
6421 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x80, 0x80, 0x04, 0xfe, 0x80,
6422 0x83, 0xfe, 0xc9, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x19, 0x81, 0x04,
6423 0xfe, 0x99, 0x83, 0xfe, 0xca, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06,
6424 0x83, 0x04, 0xfe, 0x86, 0x83, 0xfe, 0xce, 0x47, 0x0b, 0x0e, 0x02, 0x0f,
6425 0xfe, 0x2c, 0x90, 0x04, 0xfe, 0xac, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f,
6426 0xfe, 0xae, 0x90, 0x04, 0xfe, 0xae, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f,
6427 0xfe, 0x08, 0x90, 0x04, 0xfe, 0x88, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f,
6428 0xfe, 0x8a, 0x90, 0x04, 0xfe, 0x8a, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f,
6429 0xfe, 0x0c, 0x90, 0x04, 0xfe, 0x8c, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f,
6430 0xfe, 0x8e, 0x90, 0x04, 0xfe, 0x8e, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f,
6431 0xfe, 0x3c, 0x90, 0x04, 0xfe, 0xbc, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x8b,
6432 0x0f, 0xfe, 0x03, 0x80, 0x04, 0xfe, 0x83, 0x83, 0x33, 0x0b, 0x77, 0x0e,
6433 0xa8, 0x02, 0xff, 0x66, 0x00, 0x00,
6436 static unsigned short _adv_asc38C1600_size = sizeof(_adv_asc38C1600_buf); /* 0x1673 */
6437 static ADV_DCNT _adv_asc38C1600_chksum = 0x0604EF77UL; /* Expanded little-endian checksum. */
6439 static void AscInitQLinkVar(ASC_DVC_VAR *asc_dvc)
6445 iop_base = asc_dvc->iop_base;
6446 AscPutRiscVarFreeQHead(iop_base, 1);
6447 AscPutRiscVarDoneQTail(iop_base, asc_dvc->max_total_qng);
6448 AscPutVarFreeQHead(iop_base, 1);
6449 AscPutVarDoneQTail(iop_base, asc_dvc->max_total_qng);
6450 AscWriteLramByte(iop_base, ASCV_BUSY_QHEAD_B,
6451 (uchar)((int)asc_dvc->max_total_qng + 1));
6452 AscWriteLramByte(iop_base, ASCV_DISC1_QHEAD_B,
6453 (uchar)((int)asc_dvc->max_total_qng + 2));
6454 AscWriteLramByte(iop_base, (ushort)ASCV_TOTAL_READY_Q_B,
6455 asc_dvc->max_total_qng);
6456 AscWriteLramWord(iop_base, ASCV_ASCDVC_ERR_CODE_W, 0);
6457 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
6458 AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, 0);
6459 AscWriteLramByte(iop_base, ASCV_SCSIBUSY_B, 0);
6460 AscWriteLramByte(iop_base, ASCV_WTM_FLAG_B, 0);
6461 AscPutQDoneInProgress(iop_base, 0);
6462 lram_addr = ASC_QADR_BEG;
6463 for (i = 0; i < 32; i++, lram_addr += 2) {
6464 AscWriteLramWord(iop_base, lram_addr, 0);
6468 static ushort AscInitMicroCodeVar(ASC_DVC_VAR *asc_dvc)
6476 iop_base = asc_dvc->iop_base;
6478 for (i = 0; i <= ASC_MAX_TID; i++) {
6479 AscPutMCodeInitSDTRAtID(iop_base, i,
6480 asc_dvc->cfg->sdtr_period_offset[i]);
6483 AscInitQLinkVar(asc_dvc);
6484 AscWriteLramByte(iop_base, ASCV_DISC_ENABLE_B,
6485 asc_dvc->cfg->disc_enable);
6486 AscWriteLramByte(iop_base, ASCV_HOSTSCSI_ID_B,
6487 ASC_TID_TO_TARGET_ID(asc_dvc->cfg->chip_scsi_id));
6489 /* Align overrun buffer on an 8 byte boundary. */
6490 phy_addr = virt_to_bus(asc_dvc->cfg->overrun_buf);
6491 phy_addr = cpu_to_le32((phy_addr + 7) & ~0x7);
6492 AscMemDWordCopyPtrToLram(iop_base, ASCV_OVERRUN_PADDR_D,
6493 (uchar *)&phy_addr, 1);
6494 phy_size = cpu_to_le32(ASC_OVERRUN_BSIZE - 8);
6495 AscMemDWordCopyPtrToLram(iop_base, ASCV_OVERRUN_BSIZE_D,
6496 (uchar *)&phy_size, 1);
6498 asc_dvc->cfg->mcode_date =
6499 AscReadLramWord(iop_base, (ushort)ASCV_MC_DATE_W);
6500 asc_dvc->cfg->mcode_version =
6501 AscReadLramWord(iop_base, (ushort)ASCV_MC_VER_W);
6503 AscSetPCAddr(iop_base, ASC_MCODE_START_ADDR);
6504 if (AscGetPCAddr(iop_base) != ASC_MCODE_START_ADDR) {
6505 asc_dvc->err_code |= ASC_IERR_SET_PC_ADDR;
6508 if (AscStartChip(iop_base) != 1) {
6509 asc_dvc->err_code |= ASC_IERR_START_STOP_CHIP;
6516 static ushort AscInitAsc1000Driver(ASC_DVC_VAR *asc_dvc)
6521 iop_base = asc_dvc->iop_base;
6523 if ((asc_dvc->dvc_cntl & ASC_CNTL_RESET_SCSI) &&
6524 !(asc_dvc->init_state & ASC_INIT_RESET_SCSI_DONE)) {
6525 AscResetChipAndScsiBus(asc_dvc);
6526 mdelay(asc_dvc->scsi_reset_wait * 1000); /* XXX: msleep? */
6528 asc_dvc->init_state |= ASC_INIT_STATE_BEG_LOAD_MC;
6529 if (asc_dvc->err_code != 0)
6531 if (!AscFindSignature(asc_dvc->iop_base)) {
6532 asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE;
6535 AscDisableInterrupt(iop_base);
6536 warn_code |= AscInitLram(asc_dvc);
6537 if (asc_dvc->err_code != 0)
6539 ASC_DBG1(1, "AscInitAsc1000Driver: _asc_mcode_chksum 0x%lx\n",
6540 (ulong)_asc_mcode_chksum);
6541 if (AscLoadMicroCode(iop_base, 0, _asc_mcode_buf,
6542 _asc_mcode_size) != _asc_mcode_chksum) {
6543 asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM;
6546 warn_code |= AscInitMicroCodeVar(asc_dvc);
6547 asc_dvc->init_state |= ASC_INIT_STATE_END_LOAD_MC;
6548 AscEnableInterrupt(iop_base);
6553 * Load the Microcode
6555 * Write the microcode image to RISC memory starting at address 0.
6557 * The microcode is stored compressed in the following format:
6559 * 254 word (508 byte) table indexed by byte code followed
6560 * by the following byte codes:
6563 * 00: Emit word 0 in table.
6564 * 01: Emit word 1 in table.
6566 * FD: Emit word 253 in table.
6569 * FE WW WW: (3 byte code) Word to emit is the next word WW WW.
6570 * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW.
6572 * Returns 0 or an error if the checksum doesn't match
6574 static int AdvLoadMicrocode(AdvPortAddr iop_base, unsigned char *buf, int size,
6575 int memsize, int chksum)
6577 int i, j, end, len = 0;
6580 AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0);
6582 for (i = 253 * 2; i < size; i++) {
6583 if (buf[i] == 0xff) {
6584 unsigned short word = (buf[i + 3] << 8) | buf[i + 2];
6585 for (j = 0; j < buf[i + 1]; j++) {
6586 AdvWriteWordAutoIncLram(iop_base, word);
6590 } else if (buf[i] == 0xfe) {
6591 unsigned short word = (buf[i + 2] << 8) | buf[i + 1];
6592 AdvWriteWordAutoIncLram(iop_base, word);
6596 unsigned char off = buf[i] * 2;
6597 unsigned short word = (buf[off + 1] << 8) | buf[off];
6598 AdvWriteWordAutoIncLram(iop_base, word);
6605 while (len < memsize) {
6606 AdvWriteWordAutoIncLram(iop_base, 0);
6610 /* Verify the microcode checksum. */
6612 AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0);
6614 for (len = 0; len < end; len += 2) {
6615 sum += AdvReadWordAutoIncLram(iop_base);
6619 return ASC_IERR_MCODE_CHKSUM;
6627 * Return the physical address of 'vaddr' and set '*lenp' to the
6628 * number of physically contiguous bytes that follow 'vaddr'.
6629 * 'flag' indicates the type of structure whose physical address
6630 * is being translated.
6632 * Note: Because Linux currently doesn't page the kernel and all
6633 * kernel buffers are physically contiguous, leave '*lenp' unchanged.
6636 DvcGetPhyAddr(ADV_DVC_VAR *asc_dvc, ADV_SCSI_REQ_Q *scsiq,
6637 uchar *vaddr, ADV_SDCNT *lenp, int flag)
6639 ADV_PADDR paddr = virt_to_bus(vaddr);
6641 ASC_DBG4(4, "DvcGetPhyAddr: vaddr 0x%p, lenp 0x%p *lenp %lu, paddr 0x%lx\n",
6642 vaddr, lenp, (ulong)*((ulong *)lenp), (ulong)paddr);
6647 static void AdvBuildCarrierFreelist(struct adv_dvc_var *asc_dvc)
6651 ADV_PADDR carr_paddr;
6653 BUG_ON(!asc_dvc->carrier_buf);
6655 carrp = (ADV_CARR_T *) ADV_16BALIGN(asc_dvc->carrier_buf);
6656 asc_dvc->carr_freelist = NULL;
6657 if (carrp == asc_dvc->carrier_buf) {
6658 buf_size = ADV_CARRIER_BUFSIZE;
6660 buf_size = ADV_CARRIER_BUFSIZE - sizeof(ADV_CARR_T);
6664 /* Get physical address of the carrier 'carrp'. */
6665 ADV_DCNT contig_len = sizeof(ADV_CARR_T);
6666 carr_paddr = cpu_to_le32(DvcGetPhyAddr(asc_dvc, NULL,
6668 (ADV_SDCNT *)&contig_len,
6669 ADV_IS_CARRIER_FLAG));
6671 buf_size -= sizeof(ADV_CARR_T);
6674 * If the current carrier is not physically contiguous, then
6675 * maybe there was a page crossing. Try the next carrier
6676 * aligned start address.
6678 if (contig_len < sizeof(ADV_CARR_T)) {
6683 carrp->carr_pa = carr_paddr;
6684 carrp->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(carrp));
6687 * Insert the carrier at the beginning of the freelist.
6690 cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist));
6691 asc_dvc->carr_freelist = carrp;
6694 } while (buf_size > 0);
6698 * Send an idle command to the chip and wait for completion.
6700 * Command completion is polled for once per microsecond.
6702 * The function can be called from anywhere including an interrupt handler.
6703 * But the function is not re-entrant, so it uses the DvcEnter/LeaveCritical()
6704 * functions to prevent reentrancy.
6707 * ADV_TRUE - command completed successfully
6708 * ADV_FALSE - command failed
6709 * ADV_ERROR - command timed out
6712 AdvSendIdleCmd(ADV_DVC_VAR *asc_dvc,
6713 ushort idle_cmd, ADV_DCNT idle_cmd_parameter)
6717 AdvPortAddr iop_base;
6719 iop_base = asc_dvc->iop_base;
6722 * Clear the idle command status which is set by the microcode
6723 * to a non-zero value to indicate when the command is completed.
6724 * The non-zero result is one of the IDLE_CMD_STATUS_* values
6726 AdvWriteWordLram(iop_base, ASC_MC_IDLE_CMD_STATUS, (ushort)0);
6729 * Write the idle command value after the idle command parameter
6730 * has been written to avoid a race condition. If the order is not
6731 * followed, the microcode may process the idle command before the
6732 * parameters have been written to LRAM.
6734 AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IDLE_CMD_PARAMETER,
6735 cpu_to_le32(idle_cmd_parameter));
6736 AdvWriteWordLram(iop_base, ASC_MC_IDLE_CMD, idle_cmd);
6739 * Tickle the RISC to tell it to process the idle command.
6741 AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_B);
6742 if (asc_dvc->chip_type == ADV_CHIP_ASC3550) {
6744 * Clear the tickle value. In the ASC-3550 the RISC flag
6745 * command 'clr_tickle_b' does not work unless the host
6748 AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_NOP);
6751 /* Wait for up to 100 millisecond for the idle command to timeout. */
6752 for (i = 0; i < SCSI_WAIT_100_MSEC; i++) {
6753 /* Poll once each microsecond for command completion. */
6754 for (j = 0; j < SCSI_US_PER_MSEC; j++) {
6755 AdvReadWordLram(iop_base, ASC_MC_IDLE_CMD_STATUS,
6763 BUG(); /* The idle command should never timeout. */
6768 * Reset SCSI Bus and purge all outstanding requests.
6771 * ADV_TRUE(1) - All requests are purged and SCSI Bus is reset.
6772 * ADV_FALSE(0) - Microcode command failed.
6773 * ADV_ERROR(-1) - Microcode command timed-out. Microcode or IC
6774 * may be hung which requires driver recovery.
6776 static int AdvResetSB(ADV_DVC_VAR *asc_dvc)
6781 * Send the SCSI Bus Reset idle start idle command which asserts
6782 * the SCSI Bus Reset signal.
6784 status = AdvSendIdleCmd(asc_dvc, (ushort)IDLE_CMD_SCSI_RESET_START, 0L);
6785 if (status != ADV_TRUE) {
6790 * Delay for the specified SCSI Bus Reset hold time.
6792 * The hold time delay is done on the host because the RISC has no
6793 * microsecond accurate timer.
6795 udelay(ASC_SCSI_RESET_HOLD_TIME_US);
6798 * Send the SCSI Bus Reset end idle command which de-asserts
6799 * the SCSI Bus Reset signal and purges any pending requests.
6801 status = AdvSendIdleCmd(asc_dvc, (ushort)IDLE_CMD_SCSI_RESET_END, 0L);
6802 if (status != ADV_TRUE) {
6806 mdelay(asc_dvc->scsi_reset_wait * 1000); /* XXX: msleep? */
6812 * Initialize the ASC-3550.
6814 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
6816 * For a non-fatal error return a warning code. If there are no warnings
6817 * then 0 is returned.
6819 * Needed after initialization for error recovery.
6821 static int AdvInitAsc3550Driver(ADV_DVC_VAR *asc_dvc)
6823 AdvPortAddr iop_base;
6832 ushort bios_mem[ASC_MC_BIOSLEN / 2]; /* BIOS RISC Memory 0x40-0x8F. */
6833 ushort wdtr_able = 0, sdtr_able, tagqng_able;
6834 uchar max_cmd[ADV_MAX_TID + 1];
6836 /* If there is already an error, don't continue. */
6837 if (asc_dvc->err_code != 0)
6841 * The caller must set 'chip_type' to ADV_CHIP_ASC3550.
6843 if (asc_dvc->chip_type != ADV_CHIP_ASC3550) {
6844 asc_dvc->err_code = ASC_IERR_BAD_CHIPTYPE;
6849 iop_base = asc_dvc->iop_base;
6852 * Save the RISC memory BIOS region before writing the microcode.
6853 * The BIOS may already be loaded and using its RISC LRAM region
6854 * so its region must be saved and restored.
6856 * Note: This code makes the assumption, which is currently true,
6857 * that a chip reset does not clear RISC LRAM.
6859 for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) {
6860 AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i),
6865 * Save current per TID negotiated values.
6867 if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] == 0x55AA) {
6868 ushort bios_version, major, minor;
6871 bios_mem[(ASC_MC_BIOS_VERSION - ASC_MC_BIOSMEM) / 2];
6872 major = (bios_version >> 12) & 0xF;
6873 minor = (bios_version >> 8) & 0xF;
6874 if (major < 3 || (major == 3 && minor == 1)) {
6875 /* BIOS 3.1 and earlier location of 'wdtr_able' variable. */
6876 AdvReadWordLram(iop_base, 0x120, wdtr_able);
6878 AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
6881 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
6882 AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
6883 for (tid = 0; tid <= ADV_MAX_TID; tid++) {
6884 AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid,
6888 asc_dvc->err_code = AdvLoadMicrocode(iop_base, _adv_asc3550_buf,
6889 _adv_asc3550_size, ADV_3550_MEMSIZE,
6890 _adv_asc3550_chksum);
6891 if (asc_dvc->err_code)
6895 * Restore the RISC memory BIOS region.
6897 for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) {
6898 AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i),
6903 * Calculate and write the microcode code checksum to the microcode
6904 * code checksum location ASC_MC_CODE_CHK_SUM (0x2C).
6906 AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr);
6907 AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr);
6909 AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr);
6910 for (word = begin_addr; word < end_addr; word += 2) {
6911 code_sum += AdvReadWordAutoIncLram(iop_base);
6913 AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum);
6916 * Read and save microcode version and date.
6918 AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE,
6919 asc_dvc->cfg->mcode_date);
6920 AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM,
6921 asc_dvc->cfg->mcode_version);
6924 * Set the chip type to indicate the ASC3550.
6926 AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC3550);
6929 * If the PCI Configuration Command Register "Parity Error Response
6930 * Control" Bit was clear (0), then set the microcode variable
6931 * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
6932 * to ignore DMA parity errors.
6934 if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) {
6935 AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
6936 word |= CONTROL_FLAG_IGNORE_PERR;
6937 AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
6941 * For ASC-3550, setting the START_CTL_EMFU [3:2] bits sets a FIFO
6942 * threshold of 128 bytes. This register is only accessible to the host.
6944 AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0,
6945 START_CTL_EMFU | READ_CMD_MRM);
6948 * Microcode operating variables for WDTR, SDTR, and command tag
6949 * queuing will be set in slave_configure() based on what a
6950 * device reports it is capable of in Inquiry byte 7.
6952 * If SCSI Bus Resets have been disabled, then directly set
6953 * SDTR and WDTR from the EEPROM configuration. This will allow
6954 * the BIOS and warm boot to work without a SCSI bus hang on
6955 * the Inquiry caused by host and target mismatched DTR values.
6956 * Without the SCSI Bus Reset, before an Inquiry a device can't
6957 * be assumed to be in Asynchronous, Narrow mode.
6959 if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) {
6960 AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE,
6961 asc_dvc->wdtr_able);
6962 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE,
6963 asc_dvc->sdtr_able);
6967 * Set microcode operating variables for SDTR_SPEED1, SDTR_SPEED2,
6968 * SDTR_SPEED3, and SDTR_SPEED4 based on the ULTRA EEPROM per TID
6969 * bitmask. These values determine the maximum SDTR speed negotiated
6972 * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2,
6973 * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them
6974 * without determining here whether the device supports SDTR.
6976 * 4-bit speed SDTR speed name
6977 * =========== ===============
6978 * 0000b (0x0) SDTR disabled
6980 * 0010b (0x2) 10 Mhz
6981 * 0011b (0x3) 20 Mhz (Ultra)
6982 * 0100b (0x4) 40 Mhz (LVD/Ultra2)
6983 * 0101b (0x5) 80 Mhz (LVD2/Ultra3)
6984 * 0110b (0x6) Undefined
6986 * 1111b (0xF) Undefined
6989 for (tid = 0; tid <= ADV_MAX_TID; tid++) {
6990 if (ADV_TID_TO_TIDMASK(tid) & asc_dvc->ultra_able) {
6991 /* Set Ultra speed for TID 'tid'. */
6992 word |= (0x3 << (4 * (tid % 4)));
6994 /* Set Fast speed for TID 'tid'. */
6995 word |= (0x2 << (4 * (tid % 4)));
6997 if (tid == 3) { /* Check if done with sdtr_speed1. */
6998 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, word);
7000 } else if (tid == 7) { /* Check if done with sdtr_speed2. */
7001 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, word);
7003 } else if (tid == 11) { /* Check if done with sdtr_speed3. */
7004 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, word);
7006 } else if (tid == 15) { /* Check if done with sdtr_speed4. */
7007 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, word);
7013 * Set microcode operating variable for the disconnect per TID bitmask.
7015 AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE,
7016 asc_dvc->cfg->disc_enable);
7019 * Set SCSI_CFG0 Microcode Default Value.
7021 * The microcode will set the SCSI_CFG0 register using this value
7022 * after it is started below.
7024 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0,
7025 PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN |
7026 asc_dvc->chip_scsi_id);
7029 * Determine SCSI_CFG1 Microcode Default Value.
7031 * The microcode will set the SCSI_CFG1 register using this value
7032 * after it is started below.
7035 /* Read current SCSI_CFG1 Register value. */
7036 scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1);
7039 * If all three connectors are in use, return an error.
7041 if ((scsi_cfg1 & CABLE_ILLEGAL_A) == 0 ||
7042 (scsi_cfg1 & CABLE_ILLEGAL_B) == 0) {
7043 asc_dvc->err_code |= ASC_IERR_ILLEGAL_CONNECTION;
7048 * If the internal narrow cable is reversed all of the SCSI_CTRL
7049 * register signals will be set. Check for and return an error if
7050 * this condition is found.
7052 if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) {
7053 asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE;
7058 * If this is a differential board and a single-ended device
7059 * is attached to one of the connectors, return an error.
7061 if ((scsi_cfg1 & DIFF_MODE) && (scsi_cfg1 & DIFF_SENSE) == 0) {
7062 asc_dvc->err_code |= ASC_IERR_SINGLE_END_DEVICE;
7067 * If automatic termination control is enabled, then set the
7068 * termination value based on a table listed in a_condor.h.
7070 * If manual termination was specified with an EEPROM setting
7071 * then 'termination' was set-up in AdvInitFrom3550EEPROM() and
7072 * is ready to be 'ored' into SCSI_CFG1.
7074 if (asc_dvc->cfg->termination == 0) {
7076 * The software always controls termination by setting TERM_CTL_SEL.
7077 * If TERM_CTL_SEL were set to 0, the hardware would set termination.
7079 asc_dvc->cfg->termination |= TERM_CTL_SEL;
7081 switch (scsi_cfg1 & CABLE_DETECT) {
7082 /* TERM_CTL_H: on, TERM_CTL_L: on */
7089 asc_dvc->cfg->termination |= (TERM_CTL_H | TERM_CTL_L);
7092 /* TERM_CTL_H: on, TERM_CTL_L: off */
7098 asc_dvc->cfg->termination |= TERM_CTL_H;
7101 /* TERM_CTL_H: off, TERM_CTL_L: off */
7109 * Clear any set TERM_CTL_H and TERM_CTL_L bits.
7111 scsi_cfg1 &= ~TERM_CTL;
7114 * Invert the TERM_CTL_H and TERM_CTL_L bits and then
7115 * set 'scsi_cfg1'. The TERM_POL bit does not need to be
7116 * referenced, because the hardware internally inverts
7117 * the Termination High and Low bits if TERM_POL is set.
7119 scsi_cfg1 |= (TERM_CTL_SEL | (~asc_dvc->cfg->termination & TERM_CTL));
7122 * Set SCSI_CFG1 Microcode Default Value
7124 * Set filter value and possibly modified termination control
7125 * bits in the Microcode SCSI_CFG1 Register Value.
7127 * The microcode will set the SCSI_CFG1 register using this value
7128 * after it is started below.
7130 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1,
7131 FLTR_DISABLE | scsi_cfg1);
7134 * Set MEM_CFG Microcode Default Value
7136 * The microcode will set the MEM_CFG register using this value
7137 * after it is started below.
7139 * MEM_CFG may be accessed as a word or byte, but only bits 0-7
7142 * ASC-3550 has 8KB internal memory.
7144 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG,
7145 BIOS_EN | RAM_SZ_8KB);
7148 * Set SEL_MASK Microcode Default Value
7150 * The microcode will set the SEL_MASK register using this value
7151 * after it is started below.
7153 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK,
7154 ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id));
7156 AdvBuildCarrierFreelist(asc_dvc);
7159 * Set-up the Host->RISC Initiator Command Queue (ICQ).
7162 if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) {
7163 asc_dvc->err_code |= ASC_IERR_NO_CARRIER;
7166 asc_dvc->carr_freelist = (ADV_CARR_T *)
7167 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa));
7170 * The first command issued will be placed in the stopper carrier.
7172 asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
7175 * Set RISC ICQ physical address start value.
7177 AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa);
7180 * Set-up the RISC->Host Initiator Response Queue (IRQ).
7182 if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) {
7183 asc_dvc->err_code |= ASC_IERR_NO_CARRIER;
7186 asc_dvc->carr_freelist = (ADV_CARR_T *)
7187 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa));
7190 * The first command completed by the RISC will be placed in
7193 * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is
7194 * completed the RISC will set the ASC_RQ_STOPPER bit.
7196 asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
7199 * Set RISC IRQ physical address start value.
7201 AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa);
7202 asc_dvc->carr_pending_cnt = 0;
7204 AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES,
7205 (ADV_INTR_ENABLE_HOST_INTR |
7206 ADV_INTR_ENABLE_GLOBAL_INTR));
7208 AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word);
7209 AdvWriteWordRegister(iop_base, IOPW_PC, word);
7211 /* finally, finally, gentlemen, start your engine */
7212 AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN);
7215 * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus
7216 * Resets should be performed. The RISC has to be running
7217 * to issue a SCSI Bus Reset.
7219 if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) {
7221 * If the BIOS Signature is present in memory, restore the
7222 * BIOS Handshake Configuration Table and do not perform
7225 if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] ==
7228 * Restore per TID negotiated values.
7230 AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
7231 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
7232 AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE,
7234 for (tid = 0; tid <= ADV_MAX_TID; tid++) {
7235 AdvWriteByteLram(iop_base,
7236 ASC_MC_NUMBER_OF_MAX_CMD + tid,
7240 if (AdvResetSB(asc_dvc) != ADV_TRUE) {
7241 warn_code = ASC_WARN_BUSRESET_ERROR;
7250 * Initialize the ASC-38C0800.
7252 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
7254 * For a non-fatal error return a warning code. If there are no warnings
7255 * then 0 is returned.
7257 * Needed after initialization for error recovery.
7259 static int AdvInitAsc38C0800Driver(ADV_DVC_VAR *asc_dvc)
7261 AdvPortAddr iop_base;
7271 ushort bios_mem[ASC_MC_BIOSLEN / 2]; /* BIOS RISC Memory 0x40-0x8F. */
7272 ushort wdtr_able, sdtr_able, tagqng_able;
7273 uchar max_cmd[ADV_MAX_TID + 1];
7275 /* If there is already an error, don't continue. */
7276 if (asc_dvc->err_code != 0)
7280 * The caller must set 'chip_type' to ADV_CHIP_ASC38C0800.
7282 if (asc_dvc->chip_type != ADV_CHIP_ASC38C0800) {
7283 asc_dvc->err_code = ASC_IERR_BAD_CHIPTYPE;
7288 iop_base = asc_dvc->iop_base;
7291 * Save the RISC memory BIOS region before writing the microcode.
7292 * The BIOS may already be loaded and using its RISC LRAM region
7293 * so its region must be saved and restored.
7295 * Note: This code makes the assumption, which is currently true,
7296 * that a chip reset does not clear RISC LRAM.
7298 for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) {
7299 AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i),
7304 * Save current per TID negotiated values.
7306 AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
7307 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
7308 AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
7309 for (tid = 0; tid <= ADV_MAX_TID; tid++) {
7310 AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid,
7315 * RAM BIST (RAM Built-In Self Test)
7317 * Address : I/O base + offset 0x38h register (byte).
7318 * Function: Bit 7-6(RW) : RAM mode
7319 * Normal Mode : 0x00
7320 * Pre-test Mode : 0x40
7321 * RAM Test Mode : 0x80
7323 * Bit 4(RO) : Done bit
7324 * Bit 3-0(RO) : Status
7326 * Int_RAM Error : 0x04
7331 * Note: RAM BIST code should be put right here, before loading the
7332 * microcode and after saving the RISC memory BIOS region.
7338 * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds.
7339 * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return
7340 * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset
7341 * to NORMAL_MODE, return an error too.
7343 for (i = 0; i < 2; i++) {
7344 AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, PRE_TEST_MODE);
7345 mdelay(10); /* Wait for 10ms before reading back. */
7346 byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST);
7347 if ((byte & RAM_TEST_DONE) == 0
7348 || (byte & 0x0F) != PRE_TEST_VALUE) {
7349 asc_dvc->err_code = ASC_IERR_BIST_PRE_TEST;
7353 AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE);
7354 mdelay(10); /* Wait for 10ms before reading back. */
7355 if (AdvReadByteRegister(iop_base, IOPB_RAM_BIST)
7357 asc_dvc->err_code = ASC_IERR_BIST_PRE_TEST;
7363 * LRAM Test - It takes about 1.5 ms to run through the test.
7365 * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds.
7366 * If Done bit not set or Status not 0, save register byte, set the
7367 * err_code, and return an error.
7369 AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, RAM_TEST_MODE);
7370 mdelay(10); /* Wait for 10ms before checking status. */
7372 byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST);
7373 if ((byte & RAM_TEST_DONE) == 0 || (byte & RAM_TEST_STATUS) != 0) {
7374 /* Get here if Done bit not set or Status not 0. */
7375 asc_dvc->bist_err_code = byte; /* for BIOS display message */
7376 asc_dvc->err_code = ASC_IERR_BIST_RAM_TEST;
7380 /* We need to reset back to normal mode after LRAM test passes. */
7381 AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE);
7383 asc_dvc->err_code = AdvLoadMicrocode(iop_base, _adv_asc38C0800_buf,
7384 _adv_asc38C0800_size, ADV_38C0800_MEMSIZE,
7385 _adv_asc38C0800_chksum);
7386 if (asc_dvc->err_code)
7390 * Restore the RISC memory BIOS region.
7392 for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) {
7393 AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i),
7398 * Calculate and write the microcode code checksum to the microcode
7399 * code checksum location ASC_MC_CODE_CHK_SUM (0x2C).
7401 AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr);
7402 AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr);
7404 AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr);
7405 for (word = begin_addr; word < end_addr; word += 2) {
7406 code_sum += AdvReadWordAutoIncLram(iop_base);
7408 AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum);
7411 * Read microcode version and date.
7413 AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE,
7414 asc_dvc->cfg->mcode_date);
7415 AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM,
7416 asc_dvc->cfg->mcode_version);
7419 * Set the chip type to indicate the ASC38C0800.
7421 AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC38C0800);
7424 * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register.
7425 * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current
7426 * cable detection and then we are able to read C_DET[3:0].
7428 * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1
7429 * Microcode Default Value' section below.
7431 scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1);
7432 AdvWriteWordRegister(iop_base, IOPW_SCSI_CFG1,
7433 scsi_cfg1 | DIS_TERM_DRV);
7436 * If the PCI Configuration Command Register "Parity Error Response
7437 * Control" Bit was clear (0), then set the microcode variable
7438 * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
7439 * to ignore DMA parity errors.
7441 if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) {
7442 AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
7443 word |= CONTROL_FLAG_IGNORE_PERR;
7444 AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
7448 * For ASC-38C0800, set FIFO_THRESH_80B [6:4] bits and START_CTL_TH [3:2]
7449 * bits for the default FIFO threshold.
7451 * Note: ASC-38C0800 FIFO threshold has been changed to 256 bytes.
7453 * For DMA Errata #4 set the BC_THRESH_ENB bit.
7455 AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0,
7456 BC_THRESH_ENB | FIFO_THRESH_80B | START_CTL_TH |
7460 * Microcode operating variables for WDTR, SDTR, and command tag
7461 * queuing will be set in slave_configure() based on what a
7462 * device reports it is capable of in Inquiry byte 7.
7464 * If SCSI Bus Resets have been disabled, then directly set
7465 * SDTR and WDTR from the EEPROM configuration. This will allow
7466 * the BIOS and warm boot to work without a SCSI bus hang on
7467 * the Inquiry caused by host and target mismatched DTR values.
7468 * Without the SCSI Bus Reset, before an Inquiry a device can't
7469 * be assumed to be in Asynchronous, Narrow mode.
7471 if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) {
7472 AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE,
7473 asc_dvc->wdtr_able);
7474 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE,
7475 asc_dvc->sdtr_able);
7479 * Set microcode operating variables for DISC and SDTR_SPEED1,
7480 * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM
7481 * configuration values.
7483 * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2,
7484 * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them
7485 * without determining here whether the device supports SDTR.
7487 AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE,
7488 asc_dvc->cfg->disc_enable);
7489 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, asc_dvc->sdtr_speed1);
7490 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, asc_dvc->sdtr_speed2);
7491 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, asc_dvc->sdtr_speed3);
7492 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, asc_dvc->sdtr_speed4);
7495 * Set SCSI_CFG0 Microcode Default Value.
7497 * The microcode will set the SCSI_CFG0 register using this value
7498 * after it is started below.
7500 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0,
7501 PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN |
7502 asc_dvc->chip_scsi_id);
7505 * Determine SCSI_CFG1 Microcode Default Value.
7507 * The microcode will set the SCSI_CFG1 register using this value
7508 * after it is started below.
7511 /* Read current SCSI_CFG1 Register value. */
7512 scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1);
7515 * If the internal narrow cable is reversed all of the SCSI_CTRL
7516 * register signals will be set. Check for and return an error if
7517 * this condition is found.
7519 if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) {
7520 asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE;
7525 * All kind of combinations of devices attached to one of four
7526 * connectors are acceptable except HVD device attached. For example,
7527 * LVD device can be attached to SE connector while SE device attached
7528 * to LVD connector. If LVD device attached to SE connector, it only
7529 * runs up to Ultra speed.
7531 * If an HVD device is attached to one of LVD connectors, return an
7532 * error. However, there is no way to detect HVD device attached to
7535 if (scsi_cfg1 & HVD) {
7536 asc_dvc->err_code = ASC_IERR_HVD_DEVICE;
7541 * If either SE or LVD automatic termination control is enabled, then
7542 * set the termination value based on a table listed in a_condor.h.
7544 * If manual termination was specified with an EEPROM setting then
7545 * 'termination' was set-up in AdvInitFrom38C0800EEPROM() and is ready
7546 * to be 'ored' into SCSI_CFG1.
7548 if ((asc_dvc->cfg->termination & TERM_SE) == 0) {
7549 /* SE automatic termination control is enabled. */
7550 switch (scsi_cfg1 & C_DET_SE) {
7551 /* TERM_SE_HI: on, TERM_SE_LO: on */
7555 asc_dvc->cfg->termination |= TERM_SE;
7558 /* TERM_SE_HI: on, TERM_SE_LO: off */
7560 asc_dvc->cfg->termination |= TERM_SE_HI;
7565 if ((asc_dvc->cfg->termination & TERM_LVD) == 0) {
7566 /* LVD automatic termination control is enabled. */
7567 switch (scsi_cfg1 & C_DET_LVD) {
7568 /* TERM_LVD_HI: on, TERM_LVD_LO: on */
7572 asc_dvc->cfg->termination |= TERM_LVD;
7575 /* TERM_LVD_HI: off, TERM_LVD_LO: off */
7582 * Clear any set TERM_SE and TERM_LVD bits.
7584 scsi_cfg1 &= (~TERM_SE & ~TERM_LVD);
7587 * Invert the TERM_SE and TERM_LVD bits and then set 'scsi_cfg1'.
7589 scsi_cfg1 |= (~asc_dvc->cfg->termination & 0xF0);
7592 * Clear BIG_ENDIAN, DIS_TERM_DRV, Terminator Polarity and HVD/LVD/SE
7593 * bits and set possibly modified termination control bits in the
7594 * Microcode SCSI_CFG1 Register Value.
7596 scsi_cfg1 &= (~BIG_ENDIAN & ~DIS_TERM_DRV & ~TERM_POL & ~HVD_LVD_SE);
7599 * Set SCSI_CFG1 Microcode Default Value
7601 * Set possibly modified termination control and reset DIS_TERM_DRV
7602 * bits in the Microcode SCSI_CFG1 Register Value.
7604 * The microcode will set the SCSI_CFG1 register using this value
7605 * after it is started below.
7607 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, scsi_cfg1);
7610 * Set MEM_CFG Microcode Default Value
7612 * The microcode will set the MEM_CFG register using this value
7613 * after it is started below.
7615 * MEM_CFG may be accessed as a word or byte, but only bits 0-7
7618 * ASC-38C0800 has 16KB internal memory.
7620 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG,
7621 BIOS_EN | RAM_SZ_16KB);
7624 * Set SEL_MASK Microcode Default Value
7626 * The microcode will set the SEL_MASK register using this value
7627 * after it is started below.
7629 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK,
7630 ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id));
7632 AdvBuildCarrierFreelist(asc_dvc);
7635 * Set-up the Host->RISC Initiator Command Queue (ICQ).
7638 if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) {
7639 asc_dvc->err_code |= ASC_IERR_NO_CARRIER;
7642 asc_dvc->carr_freelist = (ADV_CARR_T *)
7643 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa));
7646 * The first command issued will be placed in the stopper carrier.
7648 asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
7651 * Set RISC ICQ physical address start value.
7652 * carr_pa is LE, must be native before write
7654 AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa);
7657 * Set-up the RISC->Host Initiator Response Queue (IRQ).
7659 if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) {
7660 asc_dvc->err_code |= ASC_IERR_NO_CARRIER;
7663 asc_dvc->carr_freelist = (ADV_CARR_T *)
7664 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa));
7667 * The first command completed by the RISC will be placed in
7670 * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is
7671 * completed the RISC will set the ASC_RQ_STOPPER bit.
7673 asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
7676 * Set RISC IRQ physical address start value.
7678 * carr_pa is LE, must be native before write *
7680 AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa);
7681 asc_dvc->carr_pending_cnt = 0;
7683 AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES,
7684 (ADV_INTR_ENABLE_HOST_INTR |
7685 ADV_INTR_ENABLE_GLOBAL_INTR));
7687 AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word);
7688 AdvWriteWordRegister(iop_base, IOPW_PC, word);
7690 /* finally, finally, gentlemen, start your engine */
7691 AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN);
7694 * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus
7695 * Resets should be performed. The RISC has to be running
7696 * to issue a SCSI Bus Reset.
7698 if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) {
7700 * If the BIOS Signature is present in memory, restore the
7701 * BIOS Handshake Configuration Table and do not perform
7704 if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] ==
7707 * Restore per TID negotiated values.
7709 AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
7710 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
7711 AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE,
7713 for (tid = 0; tid <= ADV_MAX_TID; tid++) {
7714 AdvWriteByteLram(iop_base,
7715 ASC_MC_NUMBER_OF_MAX_CMD + tid,
7719 if (AdvResetSB(asc_dvc) != ADV_TRUE) {
7720 warn_code = ASC_WARN_BUSRESET_ERROR;
7729 * Initialize the ASC-38C1600.
7731 * On failure set the ASC_DVC_VAR field 'err_code' and return ADV_ERROR.
7733 * For a non-fatal error return a warning code. If there are no warnings
7734 * then 0 is returned.
7736 * Needed after initialization for error recovery.
7738 static int AdvInitAsc38C1600Driver(ADV_DVC_VAR *asc_dvc)
7740 AdvPortAddr iop_base;
7750 ushort bios_mem[ASC_MC_BIOSLEN / 2]; /* BIOS RISC Memory 0x40-0x8F. */
7751 ushort wdtr_able, sdtr_able, ppr_able, tagqng_able;
7752 uchar max_cmd[ASC_MAX_TID + 1];
7754 /* If there is already an error, don't continue. */
7755 if (asc_dvc->err_code != 0) {
7760 * The caller must set 'chip_type' to ADV_CHIP_ASC38C1600.
7762 if (asc_dvc->chip_type != ADV_CHIP_ASC38C1600) {
7763 asc_dvc->err_code = ASC_IERR_BAD_CHIPTYPE;
7768 iop_base = asc_dvc->iop_base;
7771 * Save the RISC memory BIOS region before writing the microcode.
7772 * The BIOS may already be loaded and using its RISC LRAM region
7773 * so its region must be saved and restored.
7775 * Note: This code makes the assumption, which is currently true,
7776 * that a chip reset does not clear RISC LRAM.
7778 for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) {
7779 AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i),
7784 * Save current per TID negotiated values.
7786 AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
7787 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
7788 AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able);
7789 AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
7790 for (tid = 0; tid <= ASC_MAX_TID; tid++) {
7791 AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid,
7796 * RAM BIST (Built-In Self Test)
7798 * Address : I/O base + offset 0x38h register (byte).
7799 * Function: Bit 7-6(RW) : RAM mode
7800 * Normal Mode : 0x00
7801 * Pre-test Mode : 0x40
7802 * RAM Test Mode : 0x80
7804 * Bit 4(RO) : Done bit
7805 * Bit 3-0(RO) : Status
7807 * Int_RAM Error : 0x04
7812 * Note: RAM BIST code should be put right here, before loading the
7813 * microcode and after saving the RISC memory BIOS region.
7819 * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds.
7820 * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return
7821 * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset
7822 * to NORMAL_MODE, return an error too.
7824 for (i = 0; i < 2; i++) {
7825 AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, PRE_TEST_MODE);
7826 mdelay(10); /* Wait for 10ms before reading back. */
7827 byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST);
7828 if ((byte & RAM_TEST_DONE) == 0
7829 || (byte & 0x0F) != PRE_TEST_VALUE) {
7830 asc_dvc->err_code = ASC_IERR_BIST_PRE_TEST;
7834 AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE);
7835 mdelay(10); /* Wait for 10ms before reading back. */
7836 if (AdvReadByteRegister(iop_base, IOPB_RAM_BIST)
7838 asc_dvc->err_code = ASC_IERR_BIST_PRE_TEST;
7844 * LRAM Test - It takes about 1.5 ms to run through the test.
7846 * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds.
7847 * If Done bit not set or Status not 0, save register byte, set the
7848 * err_code, and return an error.
7850 AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, RAM_TEST_MODE);
7851 mdelay(10); /* Wait for 10ms before checking status. */
7853 byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST);
7854 if ((byte & RAM_TEST_DONE) == 0 || (byte & RAM_TEST_STATUS) != 0) {
7855 /* Get here if Done bit not set or Status not 0. */
7856 asc_dvc->bist_err_code = byte; /* for BIOS display message */
7857 asc_dvc->err_code = ASC_IERR_BIST_RAM_TEST;
7861 /* We need to reset back to normal mode after LRAM test passes. */
7862 AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE);
7864 asc_dvc->err_code = AdvLoadMicrocode(iop_base, _adv_asc38C1600_buf,
7865 _adv_asc38C1600_size, ADV_38C1600_MEMSIZE,
7866 _adv_asc38C1600_chksum);
7867 if (asc_dvc->err_code)
7871 * Restore the RISC memory BIOS region.
7873 for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) {
7874 AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i),
7879 * Calculate and write the microcode code checksum to the microcode
7880 * code checksum location ASC_MC_CODE_CHK_SUM (0x2C).
7882 AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr);
7883 AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr);
7885 AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr);
7886 for (word = begin_addr; word < end_addr; word += 2) {
7887 code_sum += AdvReadWordAutoIncLram(iop_base);
7889 AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum);
7892 * Read microcode version and date.
7894 AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE,
7895 asc_dvc->cfg->mcode_date);
7896 AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM,
7897 asc_dvc->cfg->mcode_version);
7900 * Set the chip type to indicate the ASC38C1600.
7902 AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC38C1600);
7905 * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register.
7906 * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current
7907 * cable detection and then we are able to read C_DET[3:0].
7909 * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1
7910 * Microcode Default Value' section below.
7912 scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1);
7913 AdvWriteWordRegister(iop_base, IOPW_SCSI_CFG1,
7914 scsi_cfg1 | DIS_TERM_DRV);
7917 * If the PCI Configuration Command Register "Parity Error Response
7918 * Control" Bit was clear (0), then set the microcode variable
7919 * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
7920 * to ignore DMA parity errors.
7922 if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) {
7923 AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
7924 word |= CONTROL_FLAG_IGNORE_PERR;
7925 AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
7929 * If the BIOS control flag AIPP (Asynchronous Information
7930 * Phase Protection) disable bit is not set, then set the firmware
7931 * 'control_flag' CONTROL_FLAG_ENABLE_AIPP bit to enable
7932 * AIPP checking and encoding.
7934 if ((asc_dvc->bios_ctrl & BIOS_CTRL_AIPP_DIS) == 0) {
7935 AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
7936 word |= CONTROL_FLAG_ENABLE_AIPP;
7937 AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
7941 * For ASC-38C1600 use DMA_CFG0 default values: FIFO_THRESH_80B [6:4],
7942 * and START_CTL_TH [3:2].
7944 AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0,
7945 FIFO_THRESH_80B | START_CTL_TH | READ_CMD_MRM);
7948 * Microcode operating variables for WDTR, SDTR, and command tag
7949 * queuing will be set in slave_configure() based on what a
7950 * device reports it is capable of in Inquiry byte 7.
7952 * If SCSI Bus Resets have been disabled, then directly set
7953 * SDTR and WDTR from the EEPROM configuration. This will allow
7954 * the BIOS and warm boot to work without a SCSI bus hang on
7955 * the Inquiry caused by host and target mismatched DTR values.
7956 * Without the SCSI Bus Reset, before an Inquiry a device can't
7957 * be assumed to be in Asynchronous, Narrow mode.
7959 if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) {
7960 AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE,
7961 asc_dvc->wdtr_able);
7962 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE,
7963 asc_dvc->sdtr_able);
7967 * Set microcode operating variables for DISC and SDTR_SPEED1,
7968 * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM
7969 * configuration values.
7971 * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2,
7972 * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them
7973 * without determining here whether the device supports SDTR.
7975 AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE,
7976 asc_dvc->cfg->disc_enable);
7977 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, asc_dvc->sdtr_speed1);
7978 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, asc_dvc->sdtr_speed2);
7979 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, asc_dvc->sdtr_speed3);
7980 AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, asc_dvc->sdtr_speed4);
7983 * Set SCSI_CFG0 Microcode Default Value.
7985 * The microcode will set the SCSI_CFG0 register using this value
7986 * after it is started below.
7988 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0,
7989 PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN |
7990 asc_dvc->chip_scsi_id);
7993 * Calculate SCSI_CFG1 Microcode Default Value.
7995 * The microcode will set the SCSI_CFG1 register using this value
7996 * after it is started below.
7998 * Each ASC-38C1600 function has only two cable detect bits.
7999 * The bus mode override bits are in IOPB_SOFT_OVER_WR.
8001 scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1);
8004 * If the cable is reversed all of the SCSI_CTRL register signals
8005 * will be set. Check for and return an error if this condition is
8008 if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) {
8009 asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE;
8014 * Each ASC-38C1600 function has two connectors. Only an HVD device
8015 * can not be connected to either connector. An LVD device or SE device
8016 * may be connected to either connecor. If an SE device is connected,
8017 * then at most Ultra speed (20 Mhz) can be used on both connectors.
8019 * If an HVD device is attached, return an error.
8021 if (scsi_cfg1 & HVD) {
8022 asc_dvc->err_code |= ASC_IERR_HVD_DEVICE;
8027 * Each function in the ASC-38C1600 uses only the SE cable detect and
8028 * termination because there are two connectors for each function. Each
8029 * function may use either LVD or SE mode. Corresponding the SE automatic
8030 * termination control EEPROM bits are used for each function. Each
8031 * function has its own EEPROM. If SE automatic control is enabled for
8032 * the function, then set the termination value based on a table listed
8035 * If manual termination is specified in the EEPROM for the function,
8036 * then 'termination' was set-up in AscInitFrom38C1600EEPROM() and is
8037 * ready to be 'ored' into SCSI_CFG1.
8039 if ((asc_dvc->cfg->termination & TERM_SE) == 0) {
8040 struct pci_dev *pdev = adv_dvc_to_pdev(asc_dvc);
8041 /* SE automatic termination control is enabled. */
8042 switch (scsi_cfg1 & C_DET_SE) {
8043 /* TERM_SE_HI: on, TERM_SE_LO: on */
8047 asc_dvc->cfg->termination |= TERM_SE;
8051 if (PCI_FUNC(pdev->devfn) == 0) {
8052 /* Function 0 - TERM_SE_HI: off, TERM_SE_LO: off */
8054 /* Function 1 - TERM_SE_HI: on, TERM_SE_LO: off */
8055 asc_dvc->cfg->termination |= TERM_SE_HI;
8062 * Clear any set TERM_SE bits.
8064 scsi_cfg1 &= ~TERM_SE;
8067 * Invert the TERM_SE bits and then set 'scsi_cfg1'.
8069 scsi_cfg1 |= (~asc_dvc->cfg->termination & TERM_SE);
8072 * Clear Big Endian and Terminator Polarity bits and set possibly
8073 * modified termination control bits in the Microcode SCSI_CFG1
8076 * Big Endian bit is not used even on big endian machines.
8078 scsi_cfg1 &= (~BIG_ENDIAN & ~DIS_TERM_DRV & ~TERM_POL);
8081 * Set SCSI_CFG1 Microcode Default Value
8083 * Set possibly modified termination control bits in the Microcode
8084 * SCSI_CFG1 Register Value.
8086 * The microcode will set the SCSI_CFG1 register using this value
8087 * after it is started below.
8089 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, scsi_cfg1);
8092 * Set MEM_CFG Microcode Default Value
8094 * The microcode will set the MEM_CFG register using this value
8095 * after it is started below.
8097 * MEM_CFG may be accessed as a word or byte, but only bits 0-7
8100 * ASC-38C1600 has 32KB internal memory.
8102 * XXX - Since ASC38C1600 Rev.3 has a Local RAM failure issue, we come
8103 * out a special 16K Adv Library and Microcode version. After the issue
8104 * resolved, we should turn back to the 32K support. Both a_condor.h and
8105 * mcode.sas files also need to be updated.
8107 * AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG,
8108 * BIOS_EN | RAM_SZ_32KB);
8110 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG,
8111 BIOS_EN | RAM_SZ_16KB);
8114 * Set SEL_MASK Microcode Default Value
8116 * The microcode will set the SEL_MASK register using this value
8117 * after it is started below.
8119 AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK,
8120 ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id));
8122 AdvBuildCarrierFreelist(asc_dvc);
8125 * Set-up the Host->RISC Initiator Command Queue (ICQ).
8127 if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) {
8128 asc_dvc->err_code |= ASC_IERR_NO_CARRIER;
8131 asc_dvc->carr_freelist = (ADV_CARR_T *)
8132 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa));
8135 * The first command issued will be placed in the stopper carrier.
8137 asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
8140 * Set RISC ICQ physical address start value. Initialize the
8141 * COMMA register to the same value otherwise the RISC will
8142 * prematurely detect a command is available.
8144 AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa);
8145 AdvWriteDWordRegister(iop_base, IOPDW_COMMA,
8146 le32_to_cpu(asc_dvc->icq_sp->carr_pa));
8149 * Set-up the RISC->Host Initiator Response Queue (IRQ).
8151 if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) {
8152 asc_dvc->err_code |= ASC_IERR_NO_CARRIER;
8155 asc_dvc->carr_freelist = (ADV_CARR_T *)
8156 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa));
8159 * The first command completed by the RISC will be placed in
8162 * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is
8163 * completed the RISC will set the ASC_RQ_STOPPER bit.
8165 asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
8168 * Set RISC IRQ physical address start value.
8170 AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa);
8171 asc_dvc->carr_pending_cnt = 0;
8173 AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES,
8174 (ADV_INTR_ENABLE_HOST_INTR |
8175 ADV_INTR_ENABLE_GLOBAL_INTR));
8176 AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word);
8177 AdvWriteWordRegister(iop_base, IOPW_PC, word);
8179 /* finally, finally, gentlemen, start your engine */
8180 AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN);
8183 * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus
8184 * Resets should be performed. The RISC has to be running
8185 * to issue a SCSI Bus Reset.
8187 if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) {
8189 * If the BIOS Signature is present in memory, restore the
8190 * per TID microcode operating variables.
8192 if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] ==
8195 * Restore per TID negotiated values.
8197 AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
8198 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
8199 AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able);
8200 AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE,
8202 for (tid = 0; tid <= ASC_MAX_TID; tid++) {
8203 AdvWriteByteLram(iop_base,
8204 ASC_MC_NUMBER_OF_MAX_CMD + tid,
8208 if (AdvResetSB(asc_dvc) != ADV_TRUE) {
8209 warn_code = ASC_WARN_BUSRESET_ERROR;
8218 * Reset chip and SCSI Bus.
8221 * ADV_TRUE(1) - Chip re-initialization and SCSI Bus Reset successful.
8222 * ADV_FALSE(0) - Chip re-initialization and SCSI Bus Reset failure.
8224 static int AdvResetChipAndSB(ADV_DVC_VAR *asc_dvc)
8227 ushort wdtr_able, sdtr_able, tagqng_able;
8228 ushort ppr_able = 0;
8229 uchar tid, max_cmd[ADV_MAX_TID + 1];
8230 AdvPortAddr iop_base;
8233 iop_base = asc_dvc->iop_base;
8236 * Save current per TID negotiated values.
8238 AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
8239 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
8240 if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) {
8241 AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able);
8243 AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
8244 for (tid = 0; tid <= ADV_MAX_TID; tid++) {
8245 AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid,
8250 * Force the AdvInitAsc3550/38C0800Driver() function to
8251 * perform a SCSI Bus Reset by clearing the BIOS signature word.
8252 * The initialization functions assumes a SCSI Bus Reset is not
8253 * needed if the BIOS signature word is present.
8255 AdvReadWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, bios_sig);
8256 AdvWriteWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, 0);
8259 * Stop chip and reset it.
8261 AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_STOP);
8262 AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, ADV_CTRL_REG_CMD_RESET);
8264 AdvWriteWordRegister(iop_base, IOPW_CTRL_REG,
8265 ADV_CTRL_REG_CMD_WR_IO_REG);
8268 * Reset Adv Library error code, if any, and try
8269 * re-initializing the chip.
8271 asc_dvc->err_code = 0;
8272 if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) {
8273 status = AdvInitAsc38C1600Driver(asc_dvc);
8274 } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800) {
8275 status = AdvInitAsc38C0800Driver(asc_dvc);
8277 status = AdvInitAsc3550Driver(asc_dvc);
8280 /* Translate initialization return value to status value. */
8288 * Restore the BIOS signature word.
8290 AdvWriteWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, bios_sig);
8293 * Restore per TID negotiated values.
8295 AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
8296 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
8297 if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) {
8298 AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able);
8300 AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
8301 for (tid = 0; tid <= ADV_MAX_TID; tid++) {
8302 AdvWriteByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid,
8310 * adv_async_callback() - Adv Library asynchronous event callback function.
8312 static void adv_async_callback(ADV_DVC_VAR *adv_dvc_varp, uchar code)
8315 case ADV_ASYNC_SCSI_BUS_RESET_DET:
8317 * The firmware detected a SCSI Bus reset.
8320 "adv_async_callback: ADV_ASYNC_SCSI_BUS_RESET_DET\n");
8323 case ADV_ASYNC_RDMA_FAILURE:
8325 * Handle RDMA failure by resetting the SCSI Bus and
8326 * possibly the chip if it is unresponsive. Log the error
8327 * with a unique code.
8329 ASC_DBG(0, "adv_async_callback: ADV_ASYNC_RDMA_FAILURE\n");
8330 AdvResetChipAndSB(adv_dvc_varp);
8333 case ADV_HOST_SCSI_BUS_RESET:
8335 * Host generated SCSI bus reset occurred.
8337 ASC_DBG(0, "adv_async_callback: ADV_HOST_SCSI_BUS_RESET\n");
8341 ASC_DBG1(0, "DvcAsyncCallBack: unknown code 0x%x\n", code);
8347 * adv_isr_callback() - Second Level Interrupt Handler called by AdvISR().
8349 * Callback function for the Wide SCSI Adv Library.
8351 static void adv_isr_callback(ADV_DVC_VAR *adv_dvc_varp, ADV_SCSI_REQ_Q *scsiqp)
8353 struct asc_board *boardp;
8355 adv_sgblk_t *sgblkp;
8356 struct scsi_cmnd *scp;
8357 struct Scsi_Host *shost;
8360 ASC_DBG2(1, "adv_isr_callback: adv_dvc_varp 0x%lx, scsiqp 0x%lx\n",
8361 (ulong)adv_dvc_varp, (ulong)scsiqp);
8362 ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp);
8365 * Get the adv_req_t structure for the command that has been
8366 * completed. The adv_req_t structure actually contains the
8367 * completed ADV_SCSI_REQ_Q structure.
8369 reqp = (adv_req_t *)ADV_U32_TO_VADDR(scsiqp->srb_ptr);
8370 ASC_DBG1(1, "adv_isr_callback: reqp 0x%lx\n", (ulong)reqp);
8372 ASC_PRINT("adv_isr_callback: reqp is NULL\n");
8377 * Get the struct scsi_cmnd structure and Scsi_Host structure for the
8378 * command that has been completed.
8380 * Note: The adv_req_t request structure and adv_sgblk_t structure,
8381 * if any, are dropped, because a board structure pointer can not be
8385 ASC_DBG1(1, "adv_isr_callback: scp 0x%lx\n", (ulong)scp);
8388 ("adv_isr_callback: scp is NULL; adv_req_t dropped.\n");
8391 ASC_DBG_PRT_CDB(2, scp->cmnd, scp->cmd_len);
8393 shost = scp->device->host;
8394 ASC_STATS(shost, callback);
8395 ASC_DBG1(1, "adv_isr_callback: shost 0x%lx\n", (ulong)shost);
8397 boardp = shost_priv(shost);
8398 BUG_ON(adv_dvc_varp != &boardp->dvc_var.adv_dvc_var);
8401 * 'done_status' contains the command's ending status.
8403 switch (scsiqp->done_status) {
8405 ASC_DBG(2, "adv_isr_callback: QD_NO_ERROR\n");
8409 * Check for an underrun condition.
8411 * If there was no error and an underrun condition, then
8412 * then return the number of underrun bytes.
8414 resid_cnt = le32_to_cpu(scsiqp->data_cnt);
8415 if (scp->request_bufflen != 0 && resid_cnt != 0 &&
8416 resid_cnt <= scp->request_bufflen) {
8418 "adv_isr_callback: underrun condition %lu bytes\n",
8420 scp->resid = resid_cnt;
8425 ASC_DBG(2, "adv_isr_callback: QD_WITH_ERROR\n");
8426 switch (scsiqp->host_status) {
8427 case QHSTA_NO_ERROR:
8428 if (scsiqp->scsi_status == SAM_STAT_CHECK_CONDITION) {
8430 "adv_isr_callback: SAM_STAT_CHECK_CONDITION\n");
8431 ASC_DBG_PRT_SENSE(2, scp->sense_buffer,
8432 sizeof(scp->sense_buffer));
8434 * Note: The 'status_byte()' macro used by
8435 * target drivers defined in scsi.h shifts the
8436 * status byte returned by host drivers right
8437 * by 1 bit. This is why target drivers also
8438 * use right shifted status byte definitions.
8439 * For instance target drivers use
8440 * CHECK_CONDITION, defined to 0x1, instead of
8441 * the SCSI defined check condition value of
8442 * 0x2. Host drivers are supposed to return
8443 * the status byte as it is defined by SCSI.
8445 scp->result = DRIVER_BYTE(DRIVER_SENSE) |
8446 STATUS_BYTE(scsiqp->scsi_status);
8448 scp->result = STATUS_BYTE(scsiqp->scsi_status);
8453 /* Some other QHSTA error occurred. */
8454 ASC_DBG1(1, "adv_isr_callback: host_status 0x%x\n",
8455 scsiqp->host_status);
8456 scp->result = HOST_BYTE(DID_BAD_TARGET);
8461 case QD_ABORTED_BY_HOST:
8462 ASC_DBG(1, "adv_isr_callback: QD_ABORTED_BY_HOST\n");
8464 HOST_BYTE(DID_ABORT) | STATUS_BYTE(scsiqp->scsi_status);
8468 ASC_DBG1(1, "adv_isr_callback: done_status 0x%x\n",
8469 scsiqp->done_status);
8471 HOST_BYTE(DID_ERROR) | STATUS_BYTE(scsiqp->scsi_status);
8476 * If the 'init_tidmask' bit isn't already set for the target and the
8477 * current request finished normally, then set the bit for the target
8478 * to indicate that a device is present.
8480 if ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(scp->device->id)) == 0 &&
8481 scsiqp->done_status == QD_NO_ERROR &&
8482 scsiqp->host_status == QHSTA_NO_ERROR) {
8483 boardp->init_tidmask |= ADV_TID_TO_TIDMASK(scp->device->id);
8489 * Free all 'adv_sgblk_t' structures allocated for the request.
8491 while ((sgblkp = reqp->sgblkp) != NULL) {
8492 /* Remove 'sgblkp' from the request list. */
8493 reqp->sgblkp = sgblkp->next_sgblkp;
8495 /* Add 'sgblkp' to the board free list. */
8496 sgblkp->next_sgblkp = boardp->adv_sgblkp;
8497 boardp->adv_sgblkp = sgblkp;
8501 * Free the adv_req_t structure used with the command by adding
8502 * it back to the board free list.
8504 reqp->next_reqp = boardp->adv_reqp;
8505 boardp->adv_reqp = reqp;
8507 ASC_DBG(1, "adv_isr_callback: done\n");
8513 * Adv Library Interrupt Service Routine
8515 * This function is called by a driver's interrupt service routine.
8516 * The function disables and re-enables interrupts.
8518 * When a microcode idle command is completed, the ADV_DVC_VAR
8519 * 'idle_cmd_done' field is set to ADV_TRUE.
8521 * Note: AdvISR() can be called when interrupts are disabled or even
8522 * when there is no hardware interrupt condition present. It will
8523 * always check for completed idle commands and microcode requests.
8524 * This is an important feature that shouldn't be changed because it
8525 * allows commands to be completed from polling mode loops.
8528 * ADV_TRUE(1) - interrupt was pending
8529 * ADV_FALSE(0) - no interrupt was pending
8531 static int AdvISR(ADV_DVC_VAR *asc_dvc)
8533 AdvPortAddr iop_base;
8536 ADV_CARR_T *free_carrp;
8537 ADV_VADDR irq_next_vpa;
8538 ADV_SCSI_REQ_Q *scsiq;
8540 iop_base = asc_dvc->iop_base;
8542 /* Reading the register clears the interrupt. */
8543 int_stat = AdvReadByteRegister(iop_base, IOPB_INTR_STATUS_REG);
8545 if ((int_stat & (ADV_INTR_STATUS_INTRA | ADV_INTR_STATUS_INTRB |
8546 ADV_INTR_STATUS_INTRC)) == 0) {
8551 * Notify the driver of an asynchronous microcode condition by
8552 * calling the adv_async_callback function. The function
8553 * is passed the microcode ASC_MC_INTRB_CODE byte value.
8555 if (int_stat & ADV_INTR_STATUS_INTRB) {
8558 AdvReadByteLram(iop_base, ASC_MC_INTRB_CODE, intrb_code);
8560 if (asc_dvc->chip_type == ADV_CHIP_ASC3550 ||
8561 asc_dvc->chip_type == ADV_CHIP_ASC38C0800) {
8562 if (intrb_code == ADV_ASYNC_CARRIER_READY_FAILURE &&
8563 asc_dvc->carr_pending_cnt != 0) {
8564 AdvWriteByteRegister(iop_base, IOPB_TICKLE,
8566 if (asc_dvc->chip_type == ADV_CHIP_ASC3550) {
8567 AdvWriteByteRegister(iop_base,
8574 adv_async_callback(asc_dvc, intrb_code);
8578 * Check if the IRQ stopper carrier contains a completed request.
8580 while (((irq_next_vpa =
8581 le32_to_cpu(asc_dvc->irq_sp->next_vpa)) & ASC_RQ_DONE) != 0) {
8583 * Get a pointer to the newly completed ADV_SCSI_REQ_Q structure.
8584 * The RISC will have set 'areq_vpa' to a virtual address.
8586 * The firmware will have copied the ASC_SCSI_REQ_Q.scsiq_ptr
8587 * field to the carrier ADV_CARR_T.areq_vpa field. The conversion
8588 * below complements the conversion of ASC_SCSI_REQ_Q.scsiq_ptr'
8589 * in AdvExeScsiQueue().
8591 scsiq = (ADV_SCSI_REQ_Q *)
8592 ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->areq_vpa));
8595 * Request finished with good status and the queue was not
8596 * DMAed to host memory by the firmware. Set all status fields
8597 * to indicate good status.
8599 if ((irq_next_vpa & ASC_RQ_GOOD) != 0) {
8600 scsiq->done_status = QD_NO_ERROR;
8601 scsiq->host_status = scsiq->scsi_status = 0;
8602 scsiq->data_cnt = 0L;
8606 * Advance the stopper pointer to the next carrier
8607 * ignoring the lower four bits. Free the previous
8610 free_carrp = asc_dvc->irq_sp;
8611 asc_dvc->irq_sp = (ADV_CARR_T *)
8612 ADV_U32_TO_VADDR(ASC_GET_CARRP(irq_next_vpa));
8614 free_carrp->next_vpa =
8615 cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist));
8616 asc_dvc->carr_freelist = free_carrp;
8617 asc_dvc->carr_pending_cnt--;
8619 target_bit = ADV_TID_TO_TIDMASK(scsiq->target_id);
8622 * Clear request microcode control flag.
8627 * Notify the driver of the completed request by passing
8628 * the ADV_SCSI_REQ_Q pointer to its callback function.
8630 scsiq->a_flag |= ADV_SCSIQ_DONE;
8631 adv_isr_callback(asc_dvc, scsiq);
8633 * Note: After the driver callback function is called, 'scsiq'
8634 * can no longer be referenced.
8636 * Fall through and continue processing other completed
8643 static int AscSetLibErrorCode(ASC_DVC_VAR *asc_dvc, ushort err_code)
8645 if (asc_dvc->err_code == 0) {
8646 asc_dvc->err_code = err_code;
8647 AscWriteLramWord(asc_dvc->iop_base, ASCV_ASCDVC_ERR_CODE_W,
8653 static void AscAckInterrupt(PortAddr iop_base)
8661 risc_flag = AscReadLramByte(iop_base, ASCV_RISC_FLAG_B);
8662 if (loop++ > 0x7FFF) {
8665 } while ((risc_flag & ASC_RISC_FLAG_GEN_INT) != 0);
8667 AscReadLramByte(iop_base,
8668 ASCV_HOST_FLAG_B) & (~ASC_HOST_FLAG_ACK_INT);
8669 AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B,
8670 (uchar)(host_flag | ASC_HOST_FLAG_ACK_INT));
8671 AscSetChipStatus(iop_base, CIW_INT_ACK);
8673 while (AscGetChipStatus(iop_base) & CSW_INT_PENDING) {
8674 AscSetChipStatus(iop_base, CIW_INT_ACK);
8679 AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, host_flag);
8683 static uchar AscGetSynPeriodIndex(ASC_DVC_VAR *asc_dvc, uchar syn_time)
8685 uchar *period_table;
8690 period_table = asc_dvc->sdtr_period_tbl;
8691 max_index = (int)asc_dvc->max_sdtr_index;
8692 min_index = (int)asc_dvc->host_init_sdtr_index;
8693 if ((syn_time <= period_table[max_index])) {
8694 for (i = min_index; i < (max_index - 1); i++) {
8695 if (syn_time <= period_table[i]) {
8699 return (uchar)max_index;
8701 return (uchar)(max_index + 1);
8706 AscMsgOutSDTR(ASC_DVC_VAR *asc_dvc, uchar sdtr_period, uchar sdtr_offset)
8709 uchar sdtr_period_index;
8712 iop_base = asc_dvc->iop_base;
8713 sdtr_buf.msg_type = EXTENDED_MESSAGE;
8714 sdtr_buf.msg_len = MS_SDTR_LEN;
8715 sdtr_buf.msg_req = EXTENDED_SDTR;
8716 sdtr_buf.xfer_period = sdtr_period;
8717 sdtr_offset &= ASC_SYN_MAX_OFFSET;
8718 sdtr_buf.req_ack_offset = sdtr_offset;
8719 sdtr_period_index = AscGetSynPeriodIndex(asc_dvc, sdtr_period);
8720 if (sdtr_period_index <= asc_dvc->max_sdtr_index) {
8721 AscMemWordCopyPtrToLram(iop_base, ASCV_MSGOUT_BEG,
8723 sizeof(EXT_MSG) >> 1);
8724 return ((sdtr_period_index << 4) | sdtr_offset);
8726 sdtr_buf.req_ack_offset = 0;
8727 AscMemWordCopyPtrToLram(iop_base, ASCV_MSGOUT_BEG,
8729 sizeof(EXT_MSG) >> 1);
8735 AscCalSDTRData(ASC_DVC_VAR *asc_dvc, uchar sdtr_period, uchar syn_offset)
8738 uchar sdtr_period_ix;
8740 sdtr_period_ix = AscGetSynPeriodIndex(asc_dvc, sdtr_period);
8741 if (sdtr_period_ix > asc_dvc->max_sdtr_index) {
8744 byte = (sdtr_period_ix << 4) | (syn_offset & ASC_SYN_MAX_OFFSET);
8748 static int AscSetChipSynRegAtID(PortAddr iop_base, uchar id, uchar sdtr_data)
8750 ASC_SCSI_BIT_ID_TYPE org_id;
8754 AscSetBank(iop_base, 1);
8755 org_id = AscReadChipDvcID(iop_base);
8756 for (i = 0; i <= ASC_MAX_TID; i++) {
8757 if (org_id == (0x01 << i))
8760 org_id = (ASC_SCSI_BIT_ID_TYPE) i;
8761 AscWriteChipDvcID(iop_base, id);
8762 if (AscReadChipDvcID(iop_base) == (0x01 << id)) {
8763 AscSetBank(iop_base, 0);
8764 AscSetChipSyn(iop_base, sdtr_data);
8765 if (AscGetChipSyn(iop_base) != sdtr_data) {
8771 AscSetBank(iop_base, 1);
8772 AscWriteChipDvcID(iop_base, org_id);
8773 AscSetBank(iop_base, 0);
8777 static void AscSetChipSDTR(PortAddr iop_base, uchar sdtr_data, uchar tid_no)
8779 AscSetChipSynRegAtID(iop_base, tid_no, sdtr_data);
8780 AscPutMCodeSDTRDoneAtID(iop_base, tid_no, sdtr_data);
8783 static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc)
8789 ushort int_halt_code;
8790 ASC_SCSI_BIT_ID_TYPE scsi_busy;
8791 ASC_SCSI_BIT_ID_TYPE target_id;
8798 uchar q_cntl, tid_no;
8802 struct asc_board *boardp;
8804 BUG_ON(!asc_dvc->drv_ptr);
8805 boardp = asc_dvc->drv_ptr;
8807 iop_base = asc_dvc->iop_base;
8808 int_halt_code = AscReadLramWord(iop_base, ASCV_HALTCODE_W);
8810 halt_qp = AscReadLramByte(iop_base, ASCV_CURCDB_B);
8811 halt_q_addr = ASC_QNO_TO_QADDR(halt_qp);
8812 target_ix = AscReadLramByte(iop_base,
8813 (ushort)(halt_q_addr +
8814 (ushort)ASC_SCSIQ_B_TARGET_IX));
8815 q_cntl = AscReadLramByte(iop_base,
8816 (ushort)(halt_q_addr + (ushort)ASC_SCSIQ_B_CNTL));
8817 tid_no = ASC_TIX_TO_TID(target_ix);
8818 target_id = (uchar)ASC_TID_TO_TARGET_ID(tid_no);
8819 if (asc_dvc->pci_fix_asyn_xfer & target_id) {
8820 asyn_sdtr = ASYN_SDTR_DATA_FIX_PCI_REV_AB;
8824 if (int_halt_code == ASC_HALT_DISABLE_ASYN_USE_SYN_FIX) {
8825 if (asc_dvc->pci_fix_asyn_xfer & target_id) {
8826 AscSetChipSDTR(iop_base, 0, tid_no);
8827 boardp->sdtr_data[tid_no] = 0;
8829 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
8831 } else if (int_halt_code == ASC_HALT_ENABLE_ASYN_USE_SYN_FIX) {
8832 if (asc_dvc->pci_fix_asyn_xfer & target_id) {
8833 AscSetChipSDTR(iop_base, asyn_sdtr, tid_no);
8834 boardp->sdtr_data[tid_no] = asyn_sdtr;
8836 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
8838 } else if (int_halt_code == ASC_HALT_EXTMSG_IN) {
8839 AscMemWordCopyPtrFromLram(iop_base,
8842 sizeof(EXT_MSG) >> 1);
8844 if (ext_msg.msg_type == EXTENDED_MESSAGE &&
8845 ext_msg.msg_req == EXTENDED_SDTR &&
8846 ext_msg.msg_len == MS_SDTR_LEN) {
8848 if ((ext_msg.req_ack_offset > ASC_SYN_MAX_OFFSET)) {
8850 sdtr_accept = FALSE;
8851 ext_msg.req_ack_offset = ASC_SYN_MAX_OFFSET;
8853 if ((ext_msg.xfer_period <
8854 asc_dvc->sdtr_period_tbl[asc_dvc->
8855 host_init_sdtr_index])
8856 || (ext_msg.xfer_period >
8857 asc_dvc->sdtr_period_tbl[asc_dvc->
8859 sdtr_accept = FALSE;
8860 ext_msg.xfer_period =
8861 asc_dvc->sdtr_period_tbl[asc_dvc->
8862 host_init_sdtr_index];
8866 AscCalSDTRData(asc_dvc, ext_msg.xfer_period,
8867 ext_msg.req_ack_offset);
8868 if ((sdtr_data == 0xFF)) {
8870 q_cntl |= QC_MSG_OUT;
8871 asc_dvc->init_sdtr &= ~target_id;
8872 asc_dvc->sdtr_done &= ~target_id;
8873 AscSetChipSDTR(iop_base, asyn_sdtr,
8875 boardp->sdtr_data[tid_no] = asyn_sdtr;
8878 if (ext_msg.req_ack_offset == 0) {
8880 q_cntl &= ~QC_MSG_OUT;
8881 asc_dvc->init_sdtr &= ~target_id;
8882 asc_dvc->sdtr_done &= ~target_id;
8883 AscSetChipSDTR(iop_base, asyn_sdtr, tid_no);
8885 if (sdtr_accept && (q_cntl & QC_MSG_OUT)) {
8887 q_cntl &= ~QC_MSG_OUT;
8888 asc_dvc->sdtr_done |= target_id;
8889 asc_dvc->init_sdtr |= target_id;
8890 asc_dvc->pci_fix_asyn_xfer &=
8893 AscCalSDTRData(asc_dvc,
8894 ext_msg.xfer_period,
8897 AscSetChipSDTR(iop_base, sdtr_data,
8899 boardp->sdtr_data[tid_no] = sdtr_data;
8902 q_cntl |= QC_MSG_OUT;
8903 AscMsgOutSDTR(asc_dvc,
8904 ext_msg.xfer_period,
8905 ext_msg.req_ack_offset);
8906 asc_dvc->pci_fix_asyn_xfer &=
8909 AscCalSDTRData(asc_dvc,
8910 ext_msg.xfer_period,
8913 AscSetChipSDTR(iop_base, sdtr_data,
8915 boardp->sdtr_data[tid_no] = sdtr_data;
8916 asc_dvc->sdtr_done |= target_id;
8917 asc_dvc->init_sdtr |= target_id;
8921 AscWriteLramByte(iop_base,
8922 (ushort)(halt_q_addr +
8923 (ushort)ASC_SCSIQ_B_CNTL),
8925 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
8927 } else if (ext_msg.msg_type == EXTENDED_MESSAGE &&
8928 ext_msg.msg_req == EXTENDED_WDTR &&
8929 ext_msg.msg_len == MS_WDTR_LEN) {
8931 ext_msg.wdtr_width = 0;
8932 AscMemWordCopyPtrToLram(iop_base,
8935 sizeof(EXT_MSG) >> 1);
8936 q_cntl |= QC_MSG_OUT;
8937 AscWriteLramByte(iop_base,
8938 (ushort)(halt_q_addr +
8939 (ushort)ASC_SCSIQ_B_CNTL),
8941 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
8945 ext_msg.msg_type = MESSAGE_REJECT;
8946 AscMemWordCopyPtrToLram(iop_base,
8949 sizeof(EXT_MSG) >> 1);
8950 q_cntl |= QC_MSG_OUT;
8951 AscWriteLramByte(iop_base,
8952 (ushort)(halt_q_addr +
8953 (ushort)ASC_SCSIQ_B_CNTL),
8955 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
8958 } else if (int_halt_code == ASC_HALT_CHK_CONDITION) {
8960 q_cntl |= QC_REQ_SENSE;
8962 if ((asc_dvc->init_sdtr & target_id) != 0) {
8964 asc_dvc->sdtr_done &= ~target_id;
8966 sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no);
8967 q_cntl |= QC_MSG_OUT;
8968 AscMsgOutSDTR(asc_dvc,
8970 sdtr_period_tbl[(sdtr_data >> 4) &
8974 (uchar)(sdtr_data & (uchar)
8975 ASC_SYN_MAX_OFFSET));
8978 AscWriteLramByte(iop_base,
8979 (ushort)(halt_q_addr +
8980 (ushort)ASC_SCSIQ_B_CNTL), q_cntl);
8982 tag_code = AscReadLramByte(iop_base,
8983 (ushort)(halt_q_addr + (ushort)
8984 ASC_SCSIQ_B_TAG_CODE));
8986 if ((asc_dvc->pci_fix_asyn_xfer & target_id)
8987 && !(asc_dvc->pci_fix_asyn_xfer_always & target_id)
8990 tag_code |= (ASC_TAG_FLAG_DISABLE_DISCONNECT
8991 | ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX);
8994 AscWriteLramByte(iop_base,
8995 (ushort)(halt_q_addr +
8996 (ushort)ASC_SCSIQ_B_TAG_CODE),
8999 q_status = AscReadLramByte(iop_base,
9000 (ushort)(halt_q_addr + (ushort)
9001 ASC_SCSIQ_B_STATUS));
9002 q_status |= (QS_READY | QS_BUSY);
9003 AscWriteLramByte(iop_base,
9004 (ushort)(halt_q_addr +
9005 (ushort)ASC_SCSIQ_B_STATUS),
9008 scsi_busy = AscReadLramByte(iop_base, (ushort)ASCV_SCSIBUSY_B);
9009 scsi_busy &= ~target_id;
9010 AscWriteLramByte(iop_base, (ushort)ASCV_SCSIBUSY_B, scsi_busy);
9012 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
9014 } else if (int_halt_code == ASC_HALT_SDTR_REJECTED) {
9016 AscMemWordCopyPtrFromLram(iop_base,
9019 sizeof(EXT_MSG) >> 1);
9021 if ((out_msg.msg_type == EXTENDED_MESSAGE) &&
9022 (out_msg.msg_len == MS_SDTR_LEN) &&
9023 (out_msg.msg_req == EXTENDED_SDTR)) {
9025 asc_dvc->init_sdtr &= ~target_id;
9026 asc_dvc->sdtr_done &= ~target_id;
9027 AscSetChipSDTR(iop_base, asyn_sdtr, tid_no);
9028 boardp->sdtr_data[tid_no] = asyn_sdtr;
9030 q_cntl &= ~QC_MSG_OUT;
9031 AscWriteLramByte(iop_base,
9032 (ushort)(halt_q_addr +
9033 (ushort)ASC_SCSIQ_B_CNTL), q_cntl);
9034 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
9036 } else if (int_halt_code == ASC_HALT_SS_QUEUE_FULL) {
9038 scsi_status = AscReadLramByte(iop_base,
9039 (ushort)((ushort)halt_q_addr +
9041 ASC_SCSIQ_SCSI_STATUS));
9043 AscReadLramByte(iop_base,
9044 (ushort)((ushort)ASC_QADR_BEG +
9045 (ushort)target_ix));
9046 if ((cur_dvc_qng > 0) && (asc_dvc->cur_dvc_qng[tid_no] > 0)) {
9048 scsi_busy = AscReadLramByte(iop_base,
9049 (ushort)ASCV_SCSIBUSY_B);
9050 scsi_busy |= target_id;
9051 AscWriteLramByte(iop_base,
9052 (ushort)ASCV_SCSIBUSY_B, scsi_busy);
9053 asc_dvc->queue_full_or_busy |= target_id;
9055 if (scsi_status == SAM_STAT_TASK_SET_FULL) {
9056 if (cur_dvc_qng > ASC_MIN_TAGGED_CMD) {
9058 asc_dvc->max_dvc_qng[tid_no] =
9061 AscWriteLramByte(iop_base,
9063 ASCV_MAX_DVC_QNG_BEG
9069 * Set the device queue depth to the
9070 * number of active requests when the
9071 * QUEUE FULL condition was encountered.
9073 boardp->queue_full |= target_id;
9074 boardp->queue_full_cnt[tid_no] =
9079 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
9082 #if CC_VERY_LONG_SG_LIST
9083 else if (int_halt_code == ASC_HALT_HOST_COPY_SG_LIST_TO_RISC) {
9087 uchar first_sg_wk_q_no;
9088 ASC_SCSI_Q *scsiq; /* Ptr to driver request. */
9089 ASC_SG_HEAD *sg_head; /* Ptr to driver SG request. */
9090 ASC_SG_LIST_Q scsi_sg_q; /* Structure written to queue. */
9091 ushort sg_list_dwords;
9092 ushort sg_entry_cnt;
9096 q_no = AscReadLramByte(iop_base, (ushort)ASCV_REQ_SG_LIST_QP);
9097 if (q_no == ASC_QLINK_END)
9100 q_addr = ASC_QNO_TO_QADDR(q_no);
9103 * Convert the request's SRB pointer to a host ASC_SCSI_REQ
9104 * structure pointer using a macro provided by the driver.
9105 * The ASC_SCSI_REQ pointer provides a pointer to the
9106 * host ASC_SG_HEAD structure.
9108 /* Read request's SRB pointer. */
9109 scsiq = (ASC_SCSI_Q *)
9110 ASC_SRB2SCSIQ(ASC_U32_TO_VADDR(AscReadLramDWord(iop_base,
9113 ASC_SCSIQ_D_SRBPTR))));
9116 * Get request's first and working SG queue.
9118 sg_wk_q_no = AscReadLramByte(iop_base,
9120 ASC_SCSIQ_B_SG_WK_QP));
9122 first_sg_wk_q_no = AscReadLramByte(iop_base,
9124 ASC_SCSIQ_B_FIRST_SG_WK_QP));
9127 * Reset request's working SG queue back to the
9130 AscWriteLramByte(iop_base,
9132 (ushort)ASC_SCSIQ_B_SG_WK_QP),
9135 sg_head = scsiq->sg_head;
9138 * Set sg_entry_cnt to the number of SG elements
9139 * that will be completed on this interrupt.
9141 * Note: The allocated SG queues contain ASC_MAX_SG_LIST - 1
9142 * SG elements. The data_cnt and data_addr fields which
9143 * add 1 to the SG element capacity are not used when
9144 * restarting SG handling after a halt.
9146 if (scsiq->remain_sg_entry_cnt > (ASC_MAX_SG_LIST - 1)) {
9147 sg_entry_cnt = ASC_MAX_SG_LIST - 1;
9150 * Keep track of remaining number of SG elements that
9151 * will need to be handled on the next interrupt.
9153 scsiq->remain_sg_entry_cnt -= (ASC_MAX_SG_LIST - 1);
9155 sg_entry_cnt = scsiq->remain_sg_entry_cnt;
9156 scsiq->remain_sg_entry_cnt = 0;
9160 * Copy SG elements into the list of allocated SG queues.
9162 * Last index completed is saved in scsiq->next_sg_index.
9164 next_qp = first_sg_wk_q_no;
9165 q_addr = ASC_QNO_TO_QADDR(next_qp);
9166 scsi_sg_q.sg_head_qp = q_no;
9167 scsi_sg_q.cntl = QCSG_SG_XFER_LIST;
9168 for (i = 0; i < sg_head->queue_cnt; i++) {
9169 scsi_sg_q.seq_no = i + 1;
9170 if (sg_entry_cnt > ASC_SG_LIST_PER_Q) {
9171 sg_list_dwords = (uchar)(ASC_SG_LIST_PER_Q * 2);
9172 sg_entry_cnt -= ASC_SG_LIST_PER_Q;
9174 * After very first SG queue RISC FW uses next
9175 * SG queue first element then checks sg_list_cnt
9176 * against zero and then decrements, so set
9177 * sg_list_cnt 1 less than number of SG elements
9180 scsi_sg_q.sg_list_cnt = ASC_SG_LIST_PER_Q - 1;
9181 scsi_sg_q.sg_cur_list_cnt =
9182 ASC_SG_LIST_PER_Q - 1;
9185 * This is the last SG queue in the list of
9186 * allocated SG queues. If there are more
9187 * SG elements than will fit in the allocated
9188 * queues, then set the QCSG_SG_XFER_MORE flag.
9190 if (scsiq->remain_sg_entry_cnt != 0) {
9191 scsi_sg_q.cntl |= QCSG_SG_XFER_MORE;
9193 scsi_sg_q.cntl |= QCSG_SG_XFER_END;
9195 /* equals sg_entry_cnt * 2 */
9196 sg_list_dwords = sg_entry_cnt << 1;
9197 scsi_sg_q.sg_list_cnt = sg_entry_cnt - 1;
9198 scsi_sg_q.sg_cur_list_cnt = sg_entry_cnt - 1;
9202 scsi_sg_q.q_no = next_qp;
9203 AscMemWordCopyPtrToLram(iop_base,
9204 q_addr + ASC_SCSIQ_SGHD_CPY_BEG,
9205 (uchar *)&scsi_sg_q,
9206 sizeof(ASC_SG_LIST_Q) >> 1);
9208 AscMemDWordCopyPtrToLram(iop_base,
9209 q_addr + ASC_SGQ_LIST_BEG,
9211 sg_list[scsiq->next_sg_index],
9214 scsiq->next_sg_index += ASC_SG_LIST_PER_Q;
9217 * If the just completed SG queue contained the
9218 * last SG element, then no more SG queues need
9221 if (scsi_sg_q.cntl & QCSG_SG_XFER_END) {
9225 next_qp = AscReadLramByte(iop_base,
9228 q_addr = ASC_QNO_TO_QADDR(next_qp);
9232 * Clear the halt condition so the RISC will be restarted
9235 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
9238 #endif /* CC_VERY_LONG_SG_LIST */
9244 * DvcGetQinfo(PortAddr iop_base, ushort s_addr, uchar *inbuf, int words)
9246 * Calling/Exit State:
9250 * Input an ASC_QDONE_INFO structure from the chip
9253 DvcGetQinfo(PortAddr iop_base, ushort s_addr, uchar *inbuf, int words)
9258 AscSetChipLramAddr(iop_base, s_addr);
9259 for (i = 0; i < 2 * words; i += 2) {
9263 word = inpw(iop_base + IOP_RAM_DATA);
9264 inbuf[i] = word & 0xff;
9265 inbuf[i + 1] = (word >> 8) & 0xff;
9267 ASC_DBG_PRT_HEX(2, "DvcGetQinfo", inbuf, 2 * words);
9271 _AscCopyLramScsiDoneQ(PortAddr iop_base,
9273 ASC_QDONE_INFO *scsiq, ASC_DCNT max_dma_count)
9278 DvcGetQinfo(iop_base,
9279 q_addr + ASC_SCSIQ_DONE_INFO_BEG,
9281 (sizeof(ASC_SCSIQ_2) + sizeof(ASC_SCSIQ_3)) / 2);
9283 _val = AscReadLramWord(iop_base,
9284 (ushort)(q_addr + (ushort)ASC_SCSIQ_B_STATUS));
9285 scsiq->q_status = (uchar)_val;
9286 scsiq->q_no = (uchar)(_val >> 8);
9287 _val = AscReadLramWord(iop_base,
9288 (ushort)(q_addr + (ushort)ASC_SCSIQ_B_CNTL));
9289 scsiq->cntl = (uchar)_val;
9290 sg_queue_cnt = (uchar)(_val >> 8);
9291 _val = AscReadLramWord(iop_base,
9293 (ushort)ASC_SCSIQ_B_SENSE_LEN));
9294 scsiq->sense_len = (uchar)_val;
9295 scsiq->extra_bytes = (uchar)(_val >> 8);
9298 * Read high word of remain bytes from alternate location.
9300 scsiq->remain_bytes = (((ADV_DCNT)AscReadLramWord(iop_base,
9303 ASC_SCSIQ_W_ALT_DC1)))
9306 * Read low word of remain bytes from original location.
9308 scsiq->remain_bytes += AscReadLramWord(iop_base,
9309 (ushort)(q_addr + (ushort)
9310 ASC_SCSIQ_DW_REMAIN_XFER_CNT));
9312 scsiq->remain_bytes &= max_dma_count;
9313 return sg_queue_cnt;
9317 * asc_isr_callback() - Second Level Interrupt Handler called by AscISR().
9319 * Interrupt callback function for the Narrow SCSI Asc Library.
9321 static void asc_isr_callback(ASC_DVC_VAR *asc_dvc_varp, ASC_QDONE_INFO *qdonep)
9323 struct asc_board *boardp;
9324 struct scsi_cmnd *scp;
9325 struct Scsi_Host *shost;
9327 ASC_DBG2(1, "asc_isr_callback: asc_dvc_varp 0x%lx, qdonep 0x%lx\n",
9328 (ulong)asc_dvc_varp, (ulong)qdonep);
9329 ASC_DBG_PRT_ASC_QDONE_INFO(2, qdonep);
9332 * Get the struct scsi_cmnd structure and Scsi_Host structure for the
9333 * command that has been completed.
9335 scp = (struct scsi_cmnd *)ASC_U32_TO_VADDR(qdonep->d2.srb_ptr);
9336 ASC_DBG1(1, "asc_isr_callback: scp 0x%lx\n", (ulong)scp);
9339 ASC_PRINT("asc_isr_callback: scp is NULL\n");
9342 ASC_DBG_PRT_CDB(2, scp->cmnd, scp->cmd_len);
9344 shost = scp->device->host;
9345 ASC_STATS(shost, callback);
9346 ASC_DBG1(1, "asc_isr_callback: shost 0x%lx\n", (ulong)shost);
9348 boardp = shost_priv(shost);
9349 BUG_ON(asc_dvc_varp != &boardp->dvc_var.asc_dvc_var);
9352 * 'qdonep' contains the command's ending status.
9354 switch (qdonep->d3.done_stat) {
9356 ASC_DBG(2, "asc_isr_callback: QD_NO_ERROR\n");
9360 * Check for an underrun condition.
9362 * If there was no error and an underrun condition, then
9363 * return the number of underrun bytes.
9365 if (scp->request_bufflen != 0 && qdonep->remain_bytes != 0 &&
9366 qdonep->remain_bytes <= scp->request_bufflen) {
9368 "asc_isr_callback: underrun condition %u bytes\n",
9369 (unsigned)qdonep->remain_bytes);
9370 scp->resid = qdonep->remain_bytes;
9375 ASC_DBG(2, "asc_isr_callback: QD_WITH_ERROR\n");
9376 switch (qdonep->d3.host_stat) {
9377 case QHSTA_NO_ERROR:
9378 if (qdonep->d3.scsi_stat == SAM_STAT_CHECK_CONDITION) {
9380 "asc_isr_callback: SAM_STAT_CHECK_CONDITION\n");
9381 ASC_DBG_PRT_SENSE(2, scp->sense_buffer,
9382 sizeof(scp->sense_buffer));
9384 * Note: The 'status_byte()' macro used by
9385 * target drivers defined in scsi.h shifts the
9386 * status byte returned by host drivers right
9387 * by 1 bit. This is why target drivers also
9388 * use right shifted status byte definitions.
9389 * For instance target drivers use
9390 * CHECK_CONDITION, defined to 0x1, instead of
9391 * the SCSI defined check condition value of
9392 * 0x2. Host drivers are supposed to return
9393 * the status byte as it is defined by SCSI.
9395 scp->result = DRIVER_BYTE(DRIVER_SENSE) |
9396 STATUS_BYTE(qdonep->d3.scsi_stat);
9398 scp->result = STATUS_BYTE(qdonep->d3.scsi_stat);
9403 /* QHSTA error occurred */
9404 ASC_DBG1(1, "asc_isr_callback: host_stat 0x%x\n",
9405 qdonep->d3.host_stat);
9406 scp->result = HOST_BYTE(DID_BAD_TARGET);
9411 case QD_ABORTED_BY_HOST:
9412 ASC_DBG(1, "asc_isr_callback: QD_ABORTED_BY_HOST\n");
9414 HOST_BYTE(DID_ABORT) | MSG_BYTE(qdonep->d3.
9416 STATUS_BYTE(qdonep->d3.scsi_stat);
9420 ASC_DBG1(1, "asc_isr_callback: done_stat 0x%x\n",
9421 qdonep->d3.done_stat);
9423 HOST_BYTE(DID_ERROR) | MSG_BYTE(qdonep->d3.
9425 STATUS_BYTE(qdonep->d3.scsi_stat);
9430 * If the 'init_tidmask' bit isn't already set for the target and the
9431 * current request finished normally, then set the bit for the target
9432 * to indicate that a device is present.
9434 if ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(scp->device->id)) == 0 &&
9435 qdonep->d3.done_stat == QD_NO_ERROR &&
9436 qdonep->d3.host_stat == QHSTA_NO_ERROR) {
9437 boardp->init_tidmask |= ADV_TID_TO_TIDMASK(scp->device->id);
9445 static int AscIsrQDone(ASC_DVC_VAR *asc_dvc)
9454 ASC_SCSI_BIT_ID_TYPE scsi_busy;
9455 ASC_SCSI_BIT_ID_TYPE target_id;
9459 uchar cur_target_qng;
9460 ASC_QDONE_INFO scsiq_buf;
9461 ASC_QDONE_INFO *scsiq;
9464 iop_base = asc_dvc->iop_base;
9466 scsiq = (ASC_QDONE_INFO *)&scsiq_buf;
9467 done_q_tail = (uchar)AscGetVarDoneQTail(iop_base);
9468 q_addr = ASC_QNO_TO_QADDR(done_q_tail);
9469 next_qp = AscReadLramByte(iop_base,
9470 (ushort)(q_addr + (ushort)ASC_SCSIQ_B_FWD));
9471 if (next_qp != ASC_QLINK_END) {
9472 AscPutVarDoneQTail(iop_base, next_qp);
9473 q_addr = ASC_QNO_TO_QADDR(next_qp);
9474 sg_queue_cnt = _AscCopyLramScsiDoneQ(iop_base, q_addr, scsiq,
9475 asc_dvc->max_dma_count);
9476 AscWriteLramByte(iop_base,
9478 (ushort)ASC_SCSIQ_B_STATUS),
9480 q_status & (uchar)~(QS_READY |
9482 tid_no = ASC_TIX_TO_TID(scsiq->d2.target_ix);
9483 target_id = ASC_TIX_TO_TARGET_ID(scsiq->d2.target_ix);
9484 if ((scsiq->cntl & QC_SG_HEAD) != 0) {
9486 sg_list_qp = next_qp;
9487 for (q_cnt = 0; q_cnt < sg_queue_cnt; q_cnt++) {
9488 sg_list_qp = AscReadLramByte(iop_base,
9492 sg_q_addr = ASC_QNO_TO_QADDR(sg_list_qp);
9493 if (sg_list_qp == ASC_QLINK_END) {
9494 AscSetLibErrorCode(asc_dvc,
9495 ASCQ_ERR_SG_Q_LINKS);
9496 scsiq->d3.done_stat = QD_WITH_ERROR;
9497 scsiq->d3.host_stat =
9498 QHSTA_D_QDONE_SG_LIST_CORRUPTED;
9499 goto FATAL_ERR_QDONE;
9501 AscWriteLramByte(iop_base,
9502 (ushort)(sg_q_addr + (ushort)
9503 ASC_SCSIQ_B_STATUS),
9506 n_q_used = sg_queue_cnt + 1;
9507 AscPutVarDoneQTail(iop_base, sg_list_qp);
9509 if (asc_dvc->queue_full_or_busy & target_id) {
9510 cur_target_qng = AscReadLramByte(iop_base,
9516 if (cur_target_qng < asc_dvc->max_dvc_qng[tid_no]) {
9517 scsi_busy = AscReadLramByte(iop_base, (ushort)
9519 scsi_busy &= ~target_id;
9520 AscWriteLramByte(iop_base,
9521 (ushort)ASCV_SCSIBUSY_B,
9523 asc_dvc->queue_full_or_busy &= ~target_id;
9526 if (asc_dvc->cur_total_qng >= n_q_used) {
9527 asc_dvc->cur_total_qng -= n_q_used;
9528 if (asc_dvc->cur_dvc_qng[tid_no] != 0) {
9529 asc_dvc->cur_dvc_qng[tid_no]--;
9532 AscSetLibErrorCode(asc_dvc, ASCQ_ERR_CUR_QNG);
9533 scsiq->d3.done_stat = QD_WITH_ERROR;
9534 goto FATAL_ERR_QDONE;
9536 if ((scsiq->d2.srb_ptr == 0UL) ||
9537 ((scsiq->q_status & QS_ABORTED) != 0)) {
9539 } else if (scsiq->q_status == QS_DONE) {
9540 false_overrun = FALSE;
9541 if (scsiq->extra_bytes != 0) {
9542 scsiq->remain_bytes +=
9543 (ADV_DCNT)scsiq->extra_bytes;
9545 if (scsiq->d3.done_stat == QD_WITH_ERROR) {
9546 if (scsiq->d3.host_stat ==
9547 QHSTA_M_DATA_OVER_RUN) {
9549 cntl & (QC_DATA_IN | QC_DATA_OUT))
9551 scsiq->d3.done_stat =
9553 scsiq->d3.host_stat =
9555 } else if (false_overrun) {
9556 scsiq->d3.done_stat =
9558 scsiq->d3.host_stat =
9561 } else if (scsiq->d3.host_stat ==
9562 QHSTA_M_HUNG_REQ_SCSI_BUS_RESET) {
9563 AscStopChip(iop_base);
9564 AscSetChipControl(iop_base,
9565 (uchar)(CC_SCSI_RESET
9568 AscSetChipControl(iop_base, CC_HALT);
9569 AscSetChipStatus(iop_base,
9570 CIW_CLR_SCSI_RESET_INT);
9571 AscSetChipStatus(iop_base, 0);
9572 AscSetChipControl(iop_base, 0);
9575 if ((scsiq->cntl & QC_NO_CALLBACK) == 0) {
9576 asc_isr_callback(asc_dvc, scsiq);
9578 if ((AscReadLramByte(iop_base,
9579 (ushort)(q_addr + (ushort)
9582 asc_dvc->unit_not_ready &= ~target_id;
9583 if (scsiq->d3.done_stat != QD_NO_ERROR) {
9584 asc_dvc->start_motor &=
9591 AscSetLibErrorCode(asc_dvc, ASCQ_ERR_Q_STATUS);
9593 if ((scsiq->cntl & QC_NO_CALLBACK) == 0) {
9594 asc_isr_callback(asc_dvc, scsiq);
9602 static int AscISR(ASC_DVC_VAR *asc_dvc)
9604 ASC_CS_TYPE chipstat;
9606 ushort saved_ram_addr;
9608 uchar saved_ctrl_reg;
9613 iop_base = asc_dvc->iop_base;
9614 int_pending = FALSE;
9616 if (AscIsIntPending(iop_base) == 0)
9619 if ((asc_dvc->init_state & ASC_INIT_STATE_END_LOAD_MC) == 0) {
9622 if (asc_dvc->in_critical_cnt != 0) {
9623 AscSetLibErrorCode(asc_dvc, ASCQ_ERR_ISR_ON_CRITICAL);
9626 if (asc_dvc->is_in_int) {
9627 AscSetLibErrorCode(asc_dvc, ASCQ_ERR_ISR_RE_ENTRY);
9630 asc_dvc->is_in_int = TRUE;
9631 ctrl_reg = AscGetChipControl(iop_base);
9632 saved_ctrl_reg = ctrl_reg & (~(CC_SCSI_RESET | CC_CHIP_RESET |
9633 CC_SINGLE_STEP | CC_DIAG | CC_TEST));
9634 chipstat = AscGetChipStatus(iop_base);
9635 if (chipstat & CSW_SCSI_RESET_LATCH) {
9636 if (!(asc_dvc->bus_type & (ASC_IS_VL | ASC_IS_EISA))) {
9639 asc_dvc->sdtr_done = 0;
9640 saved_ctrl_reg &= (uchar)(~CC_HALT);
9641 while ((AscGetChipStatus(iop_base) &
9642 CSW_SCSI_RESET_ACTIVE) && (i-- > 0)) {
9645 AscSetChipControl(iop_base, (CC_CHIP_RESET | CC_HALT));
9646 AscSetChipControl(iop_base, CC_HALT);
9647 AscSetChipStatus(iop_base, CIW_CLR_SCSI_RESET_INT);
9648 AscSetChipStatus(iop_base, 0);
9649 chipstat = AscGetChipStatus(iop_base);
9652 saved_ram_addr = AscGetChipLramAddr(iop_base);
9653 host_flag = AscReadLramByte(iop_base,
9655 (uchar)(~ASC_HOST_FLAG_IN_ISR);
9656 AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B,
9657 (uchar)(host_flag | (uchar)ASC_HOST_FLAG_IN_ISR));
9658 if ((chipstat & CSW_INT_PENDING) || (int_pending)) {
9659 AscAckInterrupt(iop_base);
9661 if ((chipstat & CSW_HALTED) && (ctrl_reg & CC_SINGLE_STEP)) {
9662 if (AscIsrChipHalted(asc_dvc) == ERR) {
9663 goto ISR_REPORT_QDONE_FATAL_ERROR;
9665 saved_ctrl_reg &= (uchar)(~CC_HALT);
9668 ISR_REPORT_QDONE_FATAL_ERROR:
9669 if ((asc_dvc->dvc_cntl & ASC_CNTL_INT_MULTI_Q) != 0) {
9671 AscIsrQDone(asc_dvc)) & 0x01) != 0) {
9676 AscIsrQDone(asc_dvc)) == 1) {
9679 } while (status == 0x11);
9681 if ((status & 0x80) != 0)
9685 AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, host_flag);
9686 AscSetChipLramAddr(iop_base, saved_ram_addr);
9687 AscSetChipControl(iop_base, saved_ctrl_reg);
9688 asc_dvc->is_in_int = FALSE;
9695 * Reset the bus associated with the command 'scp'.
9697 * This function runs its own thread. Interrupts must be blocked but
9698 * sleeping is allowed and no locking other than for host structures is
9699 * required. Returns SUCCESS or FAILED.
9701 static int advansys_reset(struct scsi_cmnd *scp)
9703 struct Scsi_Host *shost = scp->device->host;
9704 struct asc_board *boardp = shost_priv(shost);
9705 unsigned long flags;
9709 ASC_DBG1(1, "advansys_reset: 0x%p\n", scp);
9711 ASC_STATS(shost, reset);
9713 scmd_printk(KERN_INFO, scp, "SCSI bus reset started...\n");
9715 if (ASC_NARROW_BOARD(boardp)) {
9716 ASC_DVC_VAR *asc_dvc = &boardp->dvc_var.asc_dvc_var;
9718 /* Reset the chip and SCSI bus. */
9719 ASC_DBG(1, "advansys_reset: before AscInitAsc1000Driver()\n");
9720 status = AscInitAsc1000Driver(asc_dvc);
9722 /* Refer to ASC_IERR_* defintions for meaning of 'err_code'. */
9723 if (asc_dvc->err_code) {
9724 scmd_printk(KERN_INFO, scp, "SCSI bus reset error: "
9725 "0x%x\n", asc_dvc->err_code);
9727 } else if (status) {
9728 scmd_printk(KERN_INFO, scp, "SCSI bus reset warning: "
9731 scmd_printk(KERN_INFO, scp, "SCSI bus reset "
9735 ASC_DBG(1, "advansys_reset: after AscInitAsc1000Driver()\n");
9736 spin_lock_irqsave(&boardp->lock, flags);
9739 * If the suggest reset bus flags are set, then reset the bus.
9740 * Otherwise only reset the device.
9742 ADV_DVC_VAR *adv_dvc = &boardp->dvc_var.adv_dvc_var;
9745 * Reset the target's SCSI bus.
9747 ASC_DBG(1, "advansys_reset: before AdvResetChipAndSB()\n");
9748 switch (AdvResetChipAndSB(adv_dvc)) {
9750 scmd_printk(KERN_INFO, scp, "SCSI bus reset "
9755 scmd_printk(KERN_INFO, scp, "SCSI bus reset error\n");
9759 spin_lock_irqsave(&boardp->lock, flags);
9763 /* Save the time of the most recently completed reset. */
9764 boardp->last_reset = jiffies;
9765 spin_unlock_irqrestore(&boardp->lock, flags);
9767 ASC_DBG1(1, "advansys_reset: ret %d\n", ret);
9773 * advansys_biosparam()
9775 * Translate disk drive geometry if the "BIOS greater than 1 GB"
9776 * support is enabled for a drive.
9778 * ip (information pointer) is an int array with the following definition:
9784 advansys_biosparam(struct scsi_device *sdev, struct block_device *bdev,
9785 sector_t capacity, int ip[])
9787 struct asc_board *boardp = shost_priv(sdev->host);
9789 ASC_DBG(1, "advansys_biosparam: begin\n");
9790 ASC_STATS(sdev->host, biosparam);
9791 if (ASC_NARROW_BOARD(boardp)) {
9792 if ((boardp->dvc_var.asc_dvc_var.dvc_cntl &
9793 ASC_CNTL_BIOS_GT_1GB) && capacity > 0x200000) {
9801 if ((boardp->dvc_var.adv_dvc_var.bios_ctrl &
9802 BIOS_CTRL_EXTENDED_XLAT) && capacity > 0x200000) {
9810 ip[2] = (unsigned long)capacity / (ip[0] * ip[1]);
9811 ASC_DBG(1, "advansys_biosparam: end\n");
9816 * First-level interrupt handler.
9818 * 'dev_id' is a pointer to the interrupting adapter's Scsi_Host.
9820 static irqreturn_t advansys_interrupt(int irq, void *dev_id)
9822 unsigned long flags;
9823 struct Scsi_Host *shost = dev_id;
9824 struct asc_board *boardp = shost_priv(shost);
9825 irqreturn_t result = IRQ_NONE;
9827 ASC_DBG1(2, "advansys_interrupt: boardp 0x%p\n", boardp);
9828 spin_lock_irqsave(&boardp->lock, flags);
9829 if (ASC_NARROW_BOARD(boardp)) {
9830 if (AscIsIntPending(shost->io_port)) {
9831 result = IRQ_HANDLED;
9832 ASC_STATS(shost, interrupt);
9833 ASC_DBG(1, "advansys_interrupt: before AscISR()\n");
9834 AscISR(&boardp->dvc_var.asc_dvc_var);
9837 ASC_DBG(1, "advansys_interrupt: before AdvISR()\n");
9838 if (AdvISR(&boardp->dvc_var.adv_dvc_var)) {
9839 result = IRQ_HANDLED;
9840 ASC_STATS(shost, interrupt);
9843 spin_unlock_irqrestore(&boardp->lock, flags);
9845 ASC_DBG(1, "advansys_interrupt: end\n");
9849 static int AscHostReqRiscHalt(PortAddr iop_base)
9853 uchar saved_stop_code;
9855 if (AscIsChipHalted(iop_base))
9857 saved_stop_code = AscReadLramByte(iop_base, ASCV_STOP_CODE_B);
9858 AscWriteLramByte(iop_base, ASCV_STOP_CODE_B,
9859 ASC_STOP_HOST_REQ_RISC_HALT | ASC_STOP_REQ_RISC_STOP);
9861 if (AscIsChipHalted(iop_base)) {
9866 } while (count++ < 20);
9867 AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, saved_stop_code);
9872 AscSetRunChipSynRegAtID(PortAddr iop_base, uchar tid_no, uchar sdtr_data)
9876 if (AscHostReqRiscHalt(iop_base)) {
9877 sta = AscSetChipSynRegAtID(iop_base, tid_no, sdtr_data);
9878 AscStartChip(iop_base);
9883 static void AscAsyncFix(ASC_DVC_VAR *asc_dvc, struct scsi_device *sdev)
9885 char type = sdev->type;
9886 ASC_SCSI_BIT_ID_TYPE tid_bits = 1 << sdev->id;
9888 if (!(asc_dvc->bug_fix_cntl & ASC_BUG_FIX_ASYN_USE_SYN))
9890 if (asc_dvc->init_sdtr & tid_bits)
9893 if ((type == TYPE_ROM) && (strncmp(sdev->vendor, "HP ", 3) == 0))
9894 asc_dvc->pci_fix_asyn_xfer_always |= tid_bits;
9896 asc_dvc->pci_fix_asyn_xfer |= tid_bits;
9897 if ((type == TYPE_PROCESSOR) || (type == TYPE_SCANNER) ||
9898 (type == TYPE_ROM) || (type == TYPE_TAPE))
9899 asc_dvc->pci_fix_asyn_xfer &= ~tid_bits;
9901 if (asc_dvc->pci_fix_asyn_xfer & tid_bits)
9902 AscSetRunChipSynRegAtID(asc_dvc->iop_base, sdev->id,
9903 ASYN_SDTR_DATA_FIX_PCI_REV_AB);
9907 advansys_narrow_slave_configure(struct scsi_device *sdev, ASC_DVC_VAR *asc_dvc)
9909 ASC_SCSI_BIT_ID_TYPE tid_bit = 1 << sdev->id;
9910 ASC_SCSI_BIT_ID_TYPE orig_use_tagged_qng = asc_dvc->use_tagged_qng;
9912 if (sdev->lun == 0) {
9913 ASC_SCSI_BIT_ID_TYPE orig_init_sdtr = asc_dvc->init_sdtr;
9914 if ((asc_dvc->cfg->sdtr_enable & tid_bit) && sdev->sdtr) {
9915 asc_dvc->init_sdtr |= tid_bit;
9917 asc_dvc->init_sdtr &= ~tid_bit;
9920 if (orig_init_sdtr != asc_dvc->init_sdtr)
9921 AscAsyncFix(asc_dvc, sdev);
9924 if (sdev->tagged_supported) {
9925 if (asc_dvc->cfg->cmd_qng_enabled & tid_bit) {
9926 if (sdev->lun == 0) {
9927 asc_dvc->cfg->can_tagged_qng |= tid_bit;
9928 asc_dvc->use_tagged_qng |= tid_bit;
9930 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG,
9931 asc_dvc->max_dvc_qng[sdev->id]);
9934 if (sdev->lun == 0) {
9935 asc_dvc->cfg->can_tagged_qng &= ~tid_bit;
9936 asc_dvc->use_tagged_qng &= ~tid_bit;
9938 scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
9941 if ((sdev->lun == 0) &&
9942 (orig_use_tagged_qng != asc_dvc->use_tagged_qng)) {
9943 AscWriteLramByte(asc_dvc->iop_base, ASCV_DISC_ENABLE_B,
9944 asc_dvc->cfg->disc_enable);
9945 AscWriteLramByte(asc_dvc->iop_base, ASCV_USE_TAGGED_QNG_B,
9946 asc_dvc->use_tagged_qng);
9947 AscWriteLramByte(asc_dvc->iop_base, ASCV_CAN_TAGGED_QNG_B,
9948 asc_dvc->cfg->can_tagged_qng);
9950 asc_dvc->max_dvc_qng[sdev->id] =
9951 asc_dvc->cfg->max_tag_qng[sdev->id];
9952 AscWriteLramByte(asc_dvc->iop_base,
9953 (ushort)(ASCV_MAX_DVC_QNG_BEG + sdev->id),
9954 asc_dvc->max_dvc_qng[sdev->id]);
9961 * If the EEPROM enabled WDTR for the device and the device supports wide
9962 * bus (16 bit) transfers, then turn on the device's 'wdtr_able' bit and
9963 * write the new value to the microcode.
9966 advansys_wide_enable_wdtr(AdvPortAddr iop_base, unsigned short tidmask)
9968 unsigned short cfg_word;
9969 AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, cfg_word);
9970 if ((cfg_word & tidmask) != 0)
9973 cfg_word |= tidmask;
9974 AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, cfg_word);
9977 * Clear the microcode SDTR and WDTR negotiation done indicators for
9978 * the target to cause it to negotiate with the new setting set above.
9979 * WDTR when accepted causes the target to enter asynchronous mode, so
9980 * SDTR must be negotiated.
9982 AdvReadWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word);
9983 cfg_word &= ~tidmask;
9984 AdvWriteWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word);
9985 AdvReadWordLram(iop_base, ASC_MC_WDTR_DONE, cfg_word);
9986 cfg_word &= ~tidmask;
9987 AdvWriteWordLram(iop_base, ASC_MC_WDTR_DONE, cfg_word);
9991 * Synchronous Transfers
9993 * If the EEPROM enabled SDTR for the device and the device
9994 * supports synchronous transfers, then turn on the device's
9995 * 'sdtr_able' bit. Write the new value to the microcode.
9998 advansys_wide_enable_sdtr(AdvPortAddr iop_base, unsigned short tidmask)
10000 unsigned short cfg_word;
10001 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, cfg_word);
10002 if ((cfg_word & tidmask) != 0)
10005 cfg_word |= tidmask;
10006 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, cfg_word);
10009 * Clear the microcode "SDTR negotiation" done indicator for the
10010 * target to cause it to negotiate with the new setting set above.
10012 AdvReadWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word);
10013 cfg_word &= ~tidmask;
10014 AdvWriteWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word);
10018 * PPR (Parallel Protocol Request) Capable
10020 * If the device supports DT mode, then it must be PPR capable.
10021 * The PPR message will be used in place of the SDTR and WDTR
10022 * messages to negotiate synchronous speed and offset, transfer
10023 * width, and protocol options.
10025 static void advansys_wide_enable_ppr(ADV_DVC_VAR *adv_dvc,
10026 AdvPortAddr iop_base, unsigned short tidmask)
10028 AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, adv_dvc->ppr_able);
10029 adv_dvc->ppr_able |= tidmask;
10030 AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, adv_dvc->ppr_able);
10034 advansys_wide_slave_configure(struct scsi_device *sdev, ADV_DVC_VAR *adv_dvc)
10036 AdvPortAddr iop_base = adv_dvc->iop_base;
10037 unsigned short tidmask = 1 << sdev->id;
10039 if (sdev->lun == 0) {
10041 * Handle WDTR, SDTR, and Tag Queuing. If the feature
10042 * is enabled in the EEPROM and the device supports the
10043 * feature, then enable it in the microcode.
10046 if ((adv_dvc->wdtr_able & tidmask) && sdev->wdtr)
10047 advansys_wide_enable_wdtr(iop_base, tidmask);
10048 if ((adv_dvc->sdtr_able & tidmask) && sdev->sdtr)
10049 advansys_wide_enable_sdtr(iop_base, tidmask);
10050 if (adv_dvc->chip_type == ADV_CHIP_ASC38C1600 && sdev->ppr)
10051 advansys_wide_enable_ppr(adv_dvc, iop_base, tidmask);
10054 * Tag Queuing is disabled for the BIOS which runs in polled
10055 * mode and would see no benefit from Tag Queuing. Also by
10056 * disabling Tag Queuing in the BIOS devices with Tag Queuing
10057 * bugs will at least work with the BIOS.
10059 if ((adv_dvc->tagqng_able & tidmask) &&
10060 sdev->tagged_supported) {
10061 unsigned short cfg_word;
10062 AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, cfg_word);
10063 cfg_word |= tidmask;
10064 AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE,
10066 AdvWriteByteLram(iop_base,
10067 ASC_MC_NUMBER_OF_MAX_CMD + sdev->id,
10068 adv_dvc->max_dvc_qng);
10072 if ((adv_dvc->tagqng_able & tidmask) && sdev->tagged_supported) {
10073 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG,
10074 adv_dvc->max_dvc_qng);
10076 scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
10081 * Set the number of commands to queue per device for the
10082 * specified host adapter.
10084 static int advansys_slave_configure(struct scsi_device *sdev)
10086 struct asc_board *boardp = shost_priv(sdev->host);
10088 if (ASC_NARROW_BOARD(boardp))
10089 advansys_narrow_slave_configure(sdev,
10090 &boardp->dvc_var.asc_dvc_var);
10092 advansys_wide_slave_configure(sdev,
10093 &boardp->dvc_var.adv_dvc_var);
10098 static int asc_build_req(struct asc_board *boardp, struct scsi_cmnd *scp,
10099 struct asc_scsi_q *asc_scsi_q)
10101 memset(asc_scsi_q, 0, sizeof(*asc_scsi_q));
10104 * Point the ASC_SCSI_Q to the 'struct scsi_cmnd'.
10106 asc_scsi_q->q2.srb_ptr = ASC_VADDR_TO_U32(scp);
10109 * Build the ASC_SCSI_Q request.
10111 asc_scsi_q->cdbptr = &scp->cmnd[0];
10112 asc_scsi_q->q2.cdb_len = scp->cmd_len;
10113 asc_scsi_q->q1.target_id = ASC_TID_TO_TARGET_ID(scp->device->id);
10114 asc_scsi_q->q1.target_lun = scp->device->lun;
10115 asc_scsi_q->q2.target_ix =
10116 ASC_TIDLUN_TO_IX(scp->device->id, scp->device->lun);
10117 asc_scsi_q->q1.sense_addr =
10118 cpu_to_le32(virt_to_bus(&scp->sense_buffer[0]));
10119 asc_scsi_q->q1.sense_len = sizeof(scp->sense_buffer);
10122 * If there are any outstanding requests for the current target,
10123 * then every 255th request send an ORDERED request. This heuristic
10124 * tries to retain the benefit of request sorting while preventing
10125 * request starvation. 255 is the max number of tags or pending commands
10126 * a device may have outstanding.
10128 * The request count is incremented below for every successfully
10132 if ((boardp->dvc_var.asc_dvc_var.cur_dvc_qng[scp->device->id] > 0) &&
10133 (boardp->reqcnt[scp->device->id] % 255) == 0) {
10134 asc_scsi_q->q2.tag_code = MSG_ORDERED_TAG;
10136 asc_scsi_q->q2.tag_code = MSG_SIMPLE_TAG;
10140 * Build ASC_SCSI_Q for a contiguous buffer or a scatter-gather
10143 if (scp->use_sg == 0) {
10145 * CDB request of single contiguous buffer.
10147 ASC_STATS(scp->device->host, cont_cnt);
10148 scp->SCp.dma_handle = scp->request_bufflen ?
10149 dma_map_single(boardp->dev, scp->request_buffer,
10150 scp->request_bufflen,
10151 scp->sc_data_direction) : 0;
10152 asc_scsi_q->q1.data_addr = cpu_to_le32(scp->SCp.dma_handle);
10153 asc_scsi_q->q1.data_cnt = cpu_to_le32(scp->request_bufflen);
10154 ASC_STATS_ADD(scp->device->host, cont_xfer,
10155 ASC_CEILING(scp->request_bufflen, 512));
10156 asc_scsi_q->q1.sg_queue_cnt = 0;
10157 asc_scsi_q->sg_head = NULL;
10160 * CDB scatter-gather request list.
10164 struct scatterlist *slp;
10165 struct asc_sg_head *asc_sg_head;
10167 slp = (struct scatterlist *)scp->request_buffer;
10168 use_sg = dma_map_sg(boardp->dev, slp, scp->use_sg,
10169 scp->sc_data_direction);
10171 if (use_sg > scp->device->host->sg_tablesize) {
10172 ASC_PRINT3("asc_build_req: board %d: use_sg %d > "
10173 "sg_tablesize %d\n", boardp->id, use_sg,
10174 scp->device->host->sg_tablesize);
10175 dma_unmap_sg(boardp->dev, slp, scp->use_sg,
10176 scp->sc_data_direction);
10177 scp->result = HOST_BYTE(DID_ERROR);
10181 ASC_STATS(scp->device->host, sg_cnt);
10183 asc_sg_head = kzalloc(sizeof(asc_scsi_q->sg_head) +
10184 use_sg * sizeof(struct asc_sg_list), GFP_ATOMIC);
10185 if (!asc_sg_head) {
10186 dma_unmap_sg(boardp->dev, slp, scp->use_sg,
10187 scp->sc_data_direction);
10188 scp->result = HOST_BYTE(DID_SOFT_ERROR);
10192 asc_scsi_q->q1.cntl |= QC_SG_HEAD;
10193 asc_scsi_q->sg_head = asc_sg_head;
10194 asc_scsi_q->q1.data_cnt = 0;
10195 asc_scsi_q->q1.data_addr = 0;
10196 /* This is a byte value, otherwise it would need to be swapped. */
10197 asc_sg_head->entry_cnt = asc_scsi_q->q1.sg_queue_cnt = use_sg;
10198 ASC_STATS_ADD(scp->device->host, sg_elem,
10199 asc_sg_head->entry_cnt);
10202 * Convert scatter-gather list into ASC_SG_HEAD list.
10204 for (sgcnt = 0; sgcnt < use_sg; sgcnt++, slp++) {
10205 asc_sg_head->sg_list[sgcnt].addr =
10206 cpu_to_le32(sg_dma_address(slp));
10207 asc_sg_head->sg_list[sgcnt].bytes =
10208 cpu_to_le32(sg_dma_len(slp));
10209 ASC_STATS_ADD(scp->device->host, sg_xfer,
10210 ASC_CEILING(sg_dma_len(slp), 512));
10214 ASC_DBG_PRT_ASC_SCSI_Q(2, &asc_scsi_q);
10215 ASC_DBG_PRT_CDB(1, scp->cmnd, scp->cmd_len);
10217 return ASC_NOERROR;
10221 * Build scatter-gather list for Adv Library (Wide Board).
10223 * Additional ADV_SG_BLOCK structures will need to be allocated
10224 * if the total number of scatter-gather elements exceeds
10225 * NO_OF_SG_PER_BLOCK (15). The ADV_SG_BLOCK structures are
10226 * assumed to be physically contiguous.
10229 * ADV_SUCCESS(1) - SG List successfully created
10230 * ADV_ERROR(-1) - SG List creation failed
10233 adv_get_sglist(struct asc_board *boardp, adv_req_t *reqp, struct scsi_cmnd *scp,
10236 adv_sgblk_t *sgblkp;
10237 ADV_SCSI_REQ_Q *scsiqp;
10238 struct scatterlist *slp;
10240 ADV_SG_BLOCK *sg_block, *prev_sg_block;
10241 ADV_PADDR sg_block_paddr;
10244 scsiqp = (ADV_SCSI_REQ_Q *)ADV_32BALIGN(&reqp->scsi_req_q);
10245 slp = (struct scatterlist *)scp->request_buffer;
10246 sg_elem_cnt = use_sg;
10247 prev_sg_block = NULL;
10248 reqp->sgblkp = NULL;
10252 * Allocate a 'adv_sgblk_t' structure from the board free
10253 * list. One 'adv_sgblk_t' structure holds NO_OF_SG_PER_BLOCK
10254 * (15) scatter-gather elements.
10256 if ((sgblkp = boardp->adv_sgblkp) == NULL) {
10257 ASC_DBG(1, "adv_get_sglist: no free adv_sgblk_t\n");
10258 ASC_STATS(scp->device->host, adv_build_nosg);
10261 * Allocation failed. Free 'adv_sgblk_t' structures
10262 * already allocated for the request.
10264 while ((sgblkp = reqp->sgblkp) != NULL) {
10265 /* Remove 'sgblkp' from the request list. */
10266 reqp->sgblkp = sgblkp->next_sgblkp;
10268 /* Add 'sgblkp' to the board free list. */
10269 sgblkp->next_sgblkp = boardp->adv_sgblkp;
10270 boardp->adv_sgblkp = sgblkp;
10275 /* Complete 'adv_sgblk_t' board allocation. */
10276 boardp->adv_sgblkp = sgblkp->next_sgblkp;
10277 sgblkp->next_sgblkp = NULL;
10280 * Get 8 byte aligned virtual and physical addresses
10281 * for the allocated ADV_SG_BLOCK structure.
10283 sg_block = (ADV_SG_BLOCK *)ADV_8BALIGN(&sgblkp->sg_block);
10284 sg_block_paddr = virt_to_bus(sg_block);
10287 * Check if this is the first 'adv_sgblk_t' for the
10290 if (reqp->sgblkp == NULL) {
10291 /* Request's first scatter-gather block. */
10292 reqp->sgblkp = sgblkp;
10295 * Set ADV_SCSI_REQ_T ADV_SG_BLOCK virtual and physical
10296 * address pointers.
10298 scsiqp->sg_list_ptr = sg_block;
10299 scsiqp->sg_real_addr = cpu_to_le32(sg_block_paddr);
10301 /* Request's second or later scatter-gather block. */
10302 sgblkp->next_sgblkp = reqp->sgblkp;
10303 reqp->sgblkp = sgblkp;
10306 * Point the previous ADV_SG_BLOCK structure to
10307 * the newly allocated ADV_SG_BLOCK structure.
10309 prev_sg_block->sg_ptr = cpu_to_le32(sg_block_paddr);
10312 for (i = 0; i < NO_OF_SG_PER_BLOCK; i++) {
10313 sg_block->sg_list[i].sg_addr =
10314 cpu_to_le32(sg_dma_address(slp));
10315 sg_block->sg_list[i].sg_count =
10316 cpu_to_le32(sg_dma_len(slp));
10317 ASC_STATS_ADD(scp->device->host, sg_xfer,
10318 ASC_CEILING(sg_dma_len(slp), 512));
10320 if (--sg_elem_cnt == 0) { /* Last ADV_SG_BLOCK and scatter-gather entry. */
10321 sg_block->sg_cnt = i + 1;
10322 sg_block->sg_ptr = 0L; /* Last ADV_SG_BLOCK in list. */
10323 return ADV_SUCCESS;
10327 sg_block->sg_cnt = NO_OF_SG_PER_BLOCK;
10328 prev_sg_block = sg_block;
10333 * Build a request structure for the Adv Library (Wide Board).
10335 * If an adv_req_t can not be allocated to issue the request,
10336 * then return ASC_BUSY. If an error occurs, then return ASC_ERROR.
10338 * Multi-byte fields in the ASC_SCSI_REQ_Q that are used by the
10339 * microcode for DMA addresses or math operations are byte swapped
10340 * to little-endian order.
10343 adv_build_req(struct asc_board *boardp, struct scsi_cmnd *scp,
10344 ADV_SCSI_REQ_Q **adv_scsiqpp)
10347 ADV_SCSI_REQ_Q *scsiqp;
10352 * Allocate an adv_req_t structure from the board to execute
10355 if (boardp->adv_reqp == NULL) {
10356 ASC_DBG(1, "adv_build_req: no free adv_req_t\n");
10357 ASC_STATS(scp->device->host, adv_build_noreq);
10360 reqp = boardp->adv_reqp;
10361 boardp->adv_reqp = reqp->next_reqp;
10362 reqp->next_reqp = NULL;
10366 * Get 32-byte aligned ADV_SCSI_REQ_Q and ADV_SG_BLOCK pointers.
10368 scsiqp = (ADV_SCSI_REQ_Q *)ADV_32BALIGN(&reqp->scsi_req_q);
10371 * Initialize the structure.
10373 scsiqp->cntl = scsiqp->scsi_cntl = scsiqp->done_status = 0;
10376 * Set the ADV_SCSI_REQ_Q 'srb_ptr' to point to the adv_req_t structure.
10378 scsiqp->srb_ptr = ASC_VADDR_TO_U32(reqp);
10381 * Set the adv_req_t 'cmndp' to point to the struct scsi_cmnd structure.
10386 * Build the ADV_SCSI_REQ_Q request.
10389 /* Set CDB length and copy it to the request structure. */
10390 scsiqp->cdb_len = scp->cmd_len;
10391 /* Copy first 12 CDB bytes to cdb[]. */
10392 for (i = 0; i < scp->cmd_len && i < 12; i++) {
10393 scsiqp->cdb[i] = scp->cmnd[i];
10395 /* Copy last 4 CDB bytes, if present, to cdb16[]. */
10396 for (; i < scp->cmd_len; i++) {
10397 scsiqp->cdb16[i - 12] = scp->cmnd[i];
10400 scsiqp->target_id = scp->device->id;
10401 scsiqp->target_lun = scp->device->lun;
10403 scsiqp->sense_addr = cpu_to_le32(virt_to_bus(&scp->sense_buffer[0]));
10404 scsiqp->sense_len = sizeof(scp->sense_buffer);
10407 * Build ADV_SCSI_REQ_Q for a contiguous buffer or a scatter-gather
10411 scsiqp->data_cnt = cpu_to_le32(scp->request_bufflen);
10412 scsiqp->vdata_addr = scp->request_buffer;
10413 scsiqp->data_addr = cpu_to_le32(virt_to_bus(scp->request_buffer));
10415 if (scp->use_sg == 0) {
10417 * CDB request of single contiguous buffer.
10419 reqp->sgblkp = NULL;
10420 scsiqp->data_cnt = cpu_to_le32(scp->request_bufflen);
10421 if (scp->request_bufflen) {
10422 scsiqp->vdata_addr = scp->request_buffer;
10423 scp->SCp.dma_handle =
10424 dma_map_single(boardp->dev, scp->request_buffer,
10425 scp->request_bufflen,
10426 scp->sc_data_direction);
10428 scsiqp->vdata_addr = NULL;
10429 scp->SCp.dma_handle = 0;
10431 scsiqp->data_addr = cpu_to_le32(scp->SCp.dma_handle);
10432 scsiqp->sg_list_ptr = NULL;
10433 scsiqp->sg_real_addr = 0;
10434 ASC_STATS(scp->device->host, cont_cnt);
10435 ASC_STATS_ADD(scp->device->host, cont_xfer,
10436 ASC_CEILING(scp->request_bufflen, 512));
10439 * CDB scatter-gather request list.
10441 struct scatterlist *slp;
10444 slp = (struct scatterlist *)scp->request_buffer;
10445 use_sg = dma_map_sg(boardp->dev, slp, scp->use_sg,
10446 scp->sc_data_direction);
10448 if (use_sg > ADV_MAX_SG_LIST) {
10449 ASC_PRINT3("adv_build_req: board %d: use_sg %d > "
10450 "ADV_MAX_SG_LIST %d\n", boardp->id, use_sg,
10451 scp->device->host->sg_tablesize);
10452 dma_unmap_sg(boardp->dev, slp, scp->use_sg,
10453 scp->sc_data_direction);
10454 scp->result = HOST_BYTE(DID_ERROR);
10457 * Free the 'adv_req_t' structure by adding it back
10458 * to the board free list.
10460 reqp->next_reqp = boardp->adv_reqp;
10461 boardp->adv_reqp = reqp;
10466 ret = adv_get_sglist(boardp, reqp, scp, use_sg);
10467 if (ret != ADV_SUCCESS) {
10469 * Free the adv_req_t structure by adding it back to
10470 * the board free list.
10472 reqp->next_reqp = boardp->adv_reqp;
10473 boardp->adv_reqp = reqp;
10478 ASC_STATS(scp->device->host, sg_cnt);
10479 ASC_STATS_ADD(scp->device->host, sg_elem, use_sg);
10482 ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp);
10483 ASC_DBG_PRT_CDB(1, scp->cmnd, scp->cmd_len);
10485 *adv_scsiqpp = scsiqp;
10487 return ASC_NOERROR;
10490 static int AscSgListToQueue(int sg_list)
10494 n_sg_list_qs = ((sg_list - 1) / ASC_SG_LIST_PER_Q);
10495 if (((sg_list - 1) % ASC_SG_LIST_PER_Q) != 0)
10497 return n_sg_list_qs + 1;
10501 AscGetNumOfFreeQueue(ASC_DVC_VAR *asc_dvc, uchar target_ix, uchar n_qs)
10505 ASC_SCSI_BIT_ID_TYPE target_id;
10508 target_id = ASC_TIX_TO_TARGET_ID(target_ix);
10509 tid_no = ASC_TIX_TO_TID(target_ix);
10510 if ((asc_dvc->unit_not_ready & target_id) ||
10511 (asc_dvc->queue_full_or_busy & target_id)) {
10515 cur_used_qs = (uint) asc_dvc->cur_total_qng +
10516 (uint) asc_dvc->last_q_shortage + (uint) ASC_MIN_FREE_Q;
10518 cur_used_qs = (uint) asc_dvc->cur_total_qng +
10519 (uint) ASC_MIN_FREE_Q;
10521 if ((uint) (cur_used_qs + n_qs) <= (uint) asc_dvc->max_total_qng) {
10522 cur_free_qs = (uint) asc_dvc->max_total_qng - cur_used_qs;
10523 if (asc_dvc->cur_dvc_qng[tid_no] >=
10524 asc_dvc->max_dvc_qng[tid_no]) {
10527 return cur_free_qs;
10530 if ((n_qs > asc_dvc->last_q_shortage)
10531 && (n_qs <= (asc_dvc->max_total_qng - ASC_MIN_FREE_Q))) {
10532 asc_dvc->last_q_shortage = n_qs;
10538 static uchar AscAllocFreeQueue(PortAddr iop_base, uchar free_q_head)
10544 q_addr = ASC_QNO_TO_QADDR(free_q_head);
10545 q_status = (uchar)AscReadLramByte(iop_base,
10547 ASC_SCSIQ_B_STATUS));
10548 next_qp = AscReadLramByte(iop_base, (ushort)(q_addr + ASC_SCSIQ_B_FWD));
10549 if (((q_status & QS_READY) == 0) && (next_qp != ASC_QLINK_END))
10551 return ASC_QLINK_END;
10555 AscAllocMultipleFreeQueue(PortAddr iop_base, uchar free_q_head, uchar n_free_q)
10559 for (i = 0; i < n_free_q; i++) {
10560 free_q_head = AscAllocFreeQueue(iop_base, free_q_head);
10561 if (free_q_head == ASC_QLINK_END)
10564 return free_q_head;
10569 * DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words)
10571 * Calling/Exit State:
10575 * Output an ASC_SCSI_Q structure to the chip
10578 DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words)
10582 ASC_DBG_PRT_HEX(2, "DvcPutScsiQ", outbuf, 2 * words);
10583 AscSetChipLramAddr(iop_base, s_addr);
10584 for (i = 0; i < 2 * words; i += 2) {
10585 if (i == 4 || i == 20) {
10588 outpw(iop_base + IOP_RAM_DATA,
10589 ((ushort)outbuf[i + 1] << 8) | outbuf[i]);
10593 static int AscPutReadyQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar q_no)
10598 uchar syn_period_ix;
10602 iop_base = asc_dvc->iop_base;
10603 if (((asc_dvc->init_sdtr & scsiq->q1.target_id) != 0) &&
10604 ((asc_dvc->sdtr_done & scsiq->q1.target_id) == 0)) {
10605 tid_no = ASC_TIX_TO_TID(scsiq->q2.target_ix);
10606 sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no);
10608 (sdtr_data >> 4) & (asc_dvc->max_sdtr_index - 1);
10609 syn_offset = sdtr_data & ASC_SYN_MAX_OFFSET;
10610 AscMsgOutSDTR(asc_dvc,
10611 asc_dvc->sdtr_period_tbl[syn_period_ix],
10613 scsiq->q1.cntl |= QC_MSG_OUT;
10615 q_addr = ASC_QNO_TO_QADDR(q_no);
10616 if ((scsiq->q1.target_id & asc_dvc->use_tagged_qng) == 0) {
10617 scsiq->q2.tag_code &= ~MSG_SIMPLE_TAG;
10619 scsiq->q1.status = QS_FREE;
10620 AscMemWordCopyPtrToLram(iop_base,
10621 q_addr + ASC_SCSIQ_CDB_BEG,
10622 (uchar *)scsiq->cdbptr, scsiq->q2.cdb_len >> 1);
10624 DvcPutScsiQ(iop_base,
10625 q_addr + ASC_SCSIQ_CPY_BEG,
10626 (uchar *)&scsiq->q1.cntl,
10627 ((sizeof(ASC_SCSIQ_1) + sizeof(ASC_SCSIQ_2)) / 2) - 1);
10628 AscWriteLramWord(iop_base,
10629 (ushort)(q_addr + (ushort)ASC_SCSIQ_B_STATUS),
10630 (ushort)(((ushort)scsiq->q1.
10631 q_no << 8) | (ushort)QS_READY));
10636 AscPutReadySgListQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar q_no)
10640 ASC_SG_HEAD *sg_head;
10641 ASC_SG_LIST_Q scsi_sg_q;
10642 ASC_DCNT saved_data_addr;
10643 ASC_DCNT saved_data_cnt;
10645 ushort sg_list_dwords;
10647 ushort sg_entry_cnt;
10651 iop_base = asc_dvc->iop_base;
10652 sg_head = scsiq->sg_head;
10653 saved_data_addr = scsiq->q1.data_addr;
10654 saved_data_cnt = scsiq->q1.data_cnt;
10655 scsiq->q1.data_addr = (ASC_PADDR) sg_head->sg_list[0].addr;
10656 scsiq->q1.data_cnt = (ASC_DCNT) sg_head->sg_list[0].bytes;
10657 #if CC_VERY_LONG_SG_LIST
10659 * If sg_head->entry_cnt is greater than ASC_MAX_SG_LIST
10660 * then not all SG elements will fit in the allocated queues.
10661 * The rest of the SG elements will be copied when the RISC
10662 * completes the SG elements that fit and halts.
10664 if (sg_head->entry_cnt > ASC_MAX_SG_LIST) {
10666 * Set sg_entry_cnt to be the number of SG elements that
10667 * will fit in the allocated SG queues. It is minus 1, because
10668 * the first SG element is handled above. ASC_MAX_SG_LIST is
10669 * already inflated by 1 to account for this. For example it
10670 * may be 50 which is 1 + 7 queues * 7 SG elements.
10672 sg_entry_cnt = ASC_MAX_SG_LIST - 1;
10675 * Keep track of remaining number of SG elements that will
10676 * need to be handled from a_isr.c.
10678 scsiq->remain_sg_entry_cnt =
10679 sg_head->entry_cnt - ASC_MAX_SG_LIST;
10681 #endif /* CC_VERY_LONG_SG_LIST */
10683 * Set sg_entry_cnt to be the number of SG elements that
10684 * will fit in the allocated SG queues. It is minus 1, because
10685 * the first SG element is handled above.
10687 sg_entry_cnt = sg_head->entry_cnt - 1;
10688 #if CC_VERY_LONG_SG_LIST
10690 #endif /* CC_VERY_LONG_SG_LIST */
10691 if (sg_entry_cnt != 0) {
10692 scsiq->q1.cntl |= QC_SG_HEAD;
10693 q_addr = ASC_QNO_TO_QADDR(q_no);
10695 scsiq->q1.sg_queue_cnt = sg_head->queue_cnt;
10696 scsi_sg_q.sg_head_qp = q_no;
10697 scsi_sg_q.cntl = QCSG_SG_XFER_LIST;
10698 for (i = 0; i < sg_head->queue_cnt; i++) {
10699 scsi_sg_q.seq_no = i + 1;
10700 if (sg_entry_cnt > ASC_SG_LIST_PER_Q) {
10701 sg_list_dwords = (uchar)(ASC_SG_LIST_PER_Q * 2);
10702 sg_entry_cnt -= ASC_SG_LIST_PER_Q;
10704 scsi_sg_q.sg_list_cnt =
10706 scsi_sg_q.sg_cur_list_cnt =
10709 scsi_sg_q.sg_list_cnt =
10710 ASC_SG_LIST_PER_Q - 1;
10711 scsi_sg_q.sg_cur_list_cnt =
10712 ASC_SG_LIST_PER_Q - 1;
10715 #if CC_VERY_LONG_SG_LIST
10717 * This is the last SG queue in the list of
10718 * allocated SG queues. If there are more
10719 * SG elements than will fit in the allocated
10720 * queues, then set the QCSG_SG_XFER_MORE flag.
10722 if (sg_head->entry_cnt > ASC_MAX_SG_LIST) {
10723 scsi_sg_q.cntl |= QCSG_SG_XFER_MORE;
10725 #endif /* CC_VERY_LONG_SG_LIST */
10726 scsi_sg_q.cntl |= QCSG_SG_XFER_END;
10727 #if CC_VERY_LONG_SG_LIST
10729 #endif /* CC_VERY_LONG_SG_LIST */
10730 sg_list_dwords = sg_entry_cnt << 1;
10732 scsi_sg_q.sg_list_cnt = sg_entry_cnt;
10733 scsi_sg_q.sg_cur_list_cnt =
10736 scsi_sg_q.sg_list_cnt =
10738 scsi_sg_q.sg_cur_list_cnt =
10743 next_qp = AscReadLramByte(iop_base,
10746 scsi_sg_q.q_no = next_qp;
10747 q_addr = ASC_QNO_TO_QADDR(next_qp);
10748 AscMemWordCopyPtrToLram(iop_base,
10749 q_addr + ASC_SCSIQ_SGHD_CPY_BEG,
10750 (uchar *)&scsi_sg_q,
10751 sizeof(ASC_SG_LIST_Q) >> 1);
10752 AscMemDWordCopyPtrToLram(iop_base,
10753 q_addr + ASC_SGQ_LIST_BEG,
10754 (uchar *)&sg_head->
10757 sg_index += ASC_SG_LIST_PER_Q;
10758 scsiq->next_sg_index = sg_index;
10761 scsiq->q1.cntl &= ~QC_SG_HEAD;
10763 sta = AscPutReadyQueue(asc_dvc, scsiq, q_no);
10764 scsiq->q1.data_addr = saved_data_addr;
10765 scsiq->q1.data_cnt = saved_data_cnt;
10770 AscSendScsiQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar n_q_required)
10779 iop_base = asc_dvc->iop_base;
10780 target_ix = scsiq->q2.target_ix;
10781 tid_no = ASC_TIX_TO_TID(target_ix);
10783 free_q_head = (uchar)AscGetVarFreeQHead(iop_base);
10784 if (n_q_required > 1) {
10785 next_qp = AscAllocMultipleFreeQueue(iop_base, free_q_head,
10786 (uchar)n_q_required);
10787 if (next_qp != ASC_QLINK_END) {
10788 asc_dvc->last_q_shortage = 0;
10789 scsiq->sg_head->queue_cnt = n_q_required - 1;
10790 scsiq->q1.q_no = free_q_head;
10791 sta = AscPutReadySgListQueue(asc_dvc, scsiq,
10794 } else if (n_q_required == 1) {
10795 next_qp = AscAllocFreeQueue(iop_base, free_q_head);
10796 if (next_qp != ASC_QLINK_END) {
10797 scsiq->q1.q_no = free_q_head;
10798 sta = AscPutReadyQueue(asc_dvc, scsiq, free_q_head);
10802 AscPutVarFreeQHead(iop_base, next_qp);
10803 asc_dvc->cur_total_qng += n_q_required;
10804 asc_dvc->cur_dvc_qng[tid_no]++;
10809 #define ASC_SYN_OFFSET_ONE_DISABLE_LIST 16
10810 static uchar _syn_offset_one_disable_cmd[ASC_SYN_OFFSET_ONE_DISABLE_LIST] = {
10829 static int AscExeScsiQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq)
10834 int disable_syn_offset_one_fix;
10837 ushort sg_entry_cnt = 0;
10838 ushort sg_entry_cnt_minus_one = 0;
10845 ASC_SG_HEAD *sg_head;
10848 iop_base = asc_dvc->iop_base;
10849 sg_head = scsiq->sg_head;
10850 if (asc_dvc->err_code != 0)
10852 scsiq->q1.q_no = 0;
10853 if ((scsiq->q2.tag_code & ASC_TAG_FLAG_EXTRA_BYTES) == 0) {
10854 scsiq->q1.extra_bytes = 0;
10857 target_ix = scsiq->q2.target_ix;
10858 tid_no = ASC_TIX_TO_TID(target_ix);
10860 if (scsiq->cdbptr[0] == REQUEST_SENSE) {
10861 if ((asc_dvc->init_sdtr & scsiq->q1.target_id) != 0) {
10862 asc_dvc->sdtr_done &= ~scsiq->q1.target_id;
10863 sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no);
10864 AscMsgOutSDTR(asc_dvc,
10866 sdtr_period_tbl[(sdtr_data >> 4) &
10870 (uchar)(sdtr_data & (uchar)
10871 ASC_SYN_MAX_OFFSET));
10872 scsiq->q1.cntl |= (QC_MSG_OUT | QC_URGENT);
10875 if (asc_dvc->in_critical_cnt != 0) {
10876 AscSetLibErrorCode(asc_dvc, ASCQ_ERR_CRITICAL_RE_ENTRY);
10879 asc_dvc->in_critical_cnt++;
10880 if ((scsiq->q1.cntl & QC_SG_HEAD) != 0) {
10881 if ((sg_entry_cnt = sg_head->entry_cnt) == 0) {
10882 asc_dvc->in_critical_cnt--;
10885 #if !CC_VERY_LONG_SG_LIST
10886 if (sg_entry_cnt > ASC_MAX_SG_LIST) {
10887 asc_dvc->in_critical_cnt--;
10890 #endif /* !CC_VERY_LONG_SG_LIST */
10891 if (sg_entry_cnt == 1) {
10892 scsiq->q1.data_addr =
10893 (ADV_PADDR)sg_head->sg_list[0].addr;
10894 scsiq->q1.data_cnt =
10895 (ADV_DCNT)sg_head->sg_list[0].bytes;
10896 scsiq->q1.cntl &= ~(QC_SG_HEAD | QC_SG_SWAP_QUEUE);
10898 sg_entry_cnt_minus_one = sg_entry_cnt - 1;
10900 scsi_cmd = scsiq->cdbptr[0];
10901 disable_syn_offset_one_fix = FALSE;
10902 if ((asc_dvc->pci_fix_asyn_xfer & scsiq->q1.target_id) &&
10903 !(asc_dvc->pci_fix_asyn_xfer_always & scsiq->q1.target_id)) {
10904 if (scsiq->q1.cntl & QC_SG_HEAD) {
10906 for (i = 0; i < sg_entry_cnt; i++) {
10908 (ADV_DCNT)le32_to_cpu(sg_head->sg_list[i].
10912 data_cnt = le32_to_cpu(scsiq->q1.data_cnt);
10914 if (data_cnt != 0UL) {
10915 if (data_cnt < 512UL) {
10916 disable_syn_offset_one_fix = TRUE;
10918 for (i = 0; i < ASC_SYN_OFFSET_ONE_DISABLE_LIST;
10921 _syn_offset_one_disable_cmd[i];
10922 if (disable_cmd == 0xFF) {
10925 if (scsi_cmd == disable_cmd) {
10926 disable_syn_offset_one_fix =
10934 if (disable_syn_offset_one_fix) {
10935 scsiq->q2.tag_code &= ~MSG_SIMPLE_TAG;
10936 scsiq->q2.tag_code |= (ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX |
10937 ASC_TAG_FLAG_DISABLE_DISCONNECT);
10939 scsiq->q2.tag_code &= 0x27;
10941 if ((scsiq->q1.cntl & QC_SG_HEAD) != 0) {
10942 if (asc_dvc->bug_fix_cntl) {
10943 if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_IF_NOT_DWB) {
10944 if ((scsi_cmd == READ_6) ||
10945 (scsi_cmd == READ_10)) {
10947 (ADV_PADDR)le32_to_cpu(sg_head->
10949 [sg_entry_cnt_minus_one].
10951 (ADV_DCNT)le32_to_cpu(sg_head->
10953 [sg_entry_cnt_minus_one].
10956 (uchar)((ushort)addr & 0x0003);
10957 if ((extra_bytes != 0)
10961 ASC_TAG_FLAG_EXTRA_BYTES)
10963 scsiq->q2.tag_code |=
10964 ASC_TAG_FLAG_EXTRA_BYTES;
10965 scsiq->q1.extra_bytes =
10968 le32_to_cpu(sg_head->
10970 [sg_entry_cnt_minus_one].
10973 (ASC_DCNT) extra_bytes;
10976 [sg_entry_cnt_minus_one].
10978 cpu_to_le32(data_cnt);
10983 sg_head->entry_to_copy = sg_head->entry_cnt;
10984 #if CC_VERY_LONG_SG_LIST
10986 * Set the sg_entry_cnt to the maximum possible. The rest of
10987 * the SG elements will be copied when the RISC completes the
10988 * SG elements that fit and halts.
10990 if (sg_entry_cnt > ASC_MAX_SG_LIST) {
10991 sg_entry_cnt = ASC_MAX_SG_LIST;
10993 #endif /* CC_VERY_LONG_SG_LIST */
10994 n_q_required = AscSgListToQueue(sg_entry_cnt);
10995 if ((AscGetNumOfFreeQueue(asc_dvc, target_ix, n_q_required) >=
10996 (uint) n_q_required)
10997 || ((scsiq->q1.cntl & QC_URGENT) != 0)) {
10999 AscSendScsiQueue(asc_dvc, scsiq,
11000 n_q_required)) == 1) {
11001 asc_dvc->in_critical_cnt--;
11006 if (asc_dvc->bug_fix_cntl) {
11007 if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_IF_NOT_DWB) {
11008 if ((scsi_cmd == READ_6) ||
11009 (scsi_cmd == READ_10)) {
11011 le32_to_cpu(scsiq->q1.data_addr) +
11012 le32_to_cpu(scsiq->q1.data_cnt);
11014 (uchar)((ushort)addr & 0x0003);
11015 if ((extra_bytes != 0)
11019 ASC_TAG_FLAG_EXTRA_BYTES)
11022 le32_to_cpu(scsiq->q1.
11024 if (((ushort)data_cnt & 0x01FF)
11026 scsiq->q2.tag_code |=
11027 ASC_TAG_FLAG_EXTRA_BYTES;
11028 data_cnt -= (ASC_DCNT)
11030 scsiq->q1.data_cnt =
11033 scsiq->q1.extra_bytes =
11041 if ((AscGetNumOfFreeQueue(asc_dvc, target_ix, 1) >= 1) ||
11042 ((scsiq->q1.cntl & QC_URGENT) != 0)) {
11043 if ((sta = AscSendScsiQueue(asc_dvc, scsiq,
11044 n_q_required)) == 1) {
11045 asc_dvc->in_critical_cnt--;
11050 asc_dvc->in_critical_cnt--;
11055 * AdvExeScsiQueue() - Send a request to the RISC microcode program.
11057 * Allocate a carrier structure, point the carrier to the ADV_SCSI_REQ_Q,
11058 * add the carrier to the ICQ (Initiator Command Queue), and tickle the
11059 * RISC to notify it a new command is ready to be executed.
11061 * If 'done_status' is not set to QD_DO_RETRY, then 'error_retry' will be
11062 * set to SCSI_MAX_RETRY.
11064 * Multi-byte fields in the ASC_SCSI_REQ_Q that are used by the microcode
11065 * for DMA addresses or math operations are byte swapped to little-endian
11069 * ADV_SUCCESS(1) - The request was successfully queued.
11070 * ADV_BUSY(0) - Resource unavailable; Retry again after pending
11071 * request completes.
11072 * ADV_ERROR(-1) - Invalid ADV_SCSI_REQ_Q request structure
11075 static int AdvExeScsiQueue(ADV_DVC_VAR *asc_dvc, ADV_SCSI_REQ_Q *scsiq)
11077 AdvPortAddr iop_base;
11079 ADV_PADDR req_paddr;
11080 ADV_CARR_T *new_carrp;
11083 * The ADV_SCSI_REQ_Q 'target_id' field should never exceed ADV_MAX_TID.
11085 if (scsiq->target_id > ADV_MAX_TID) {
11086 scsiq->host_status = QHSTA_M_INVALID_DEVICE;
11087 scsiq->done_status = QD_WITH_ERROR;
11091 iop_base = asc_dvc->iop_base;
11094 * Allocate a carrier ensuring at least one carrier always
11095 * remains on the freelist and initialize fields.
11097 if ((new_carrp = asc_dvc->carr_freelist) == NULL) {
11100 asc_dvc->carr_freelist = (ADV_CARR_T *)
11101 ADV_U32_TO_VADDR(le32_to_cpu(new_carrp->next_vpa));
11102 asc_dvc->carr_pending_cnt++;
11105 * Set the carrier to be a stopper by setting 'next_vpa'
11106 * to the stopper value. The current stopper will be changed
11107 * below to point to the new stopper.
11109 new_carrp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
11112 * Clear the ADV_SCSI_REQ_Q done flag.
11114 scsiq->a_flag &= ~ADV_SCSIQ_DONE;
11116 req_size = sizeof(ADV_SCSI_REQ_Q);
11117 req_paddr = DvcGetPhyAddr(asc_dvc, scsiq, (uchar *)scsiq,
11118 (ADV_SDCNT *)&req_size, ADV_IS_SCSIQ_FLAG);
11120 BUG_ON(req_paddr & 31);
11121 BUG_ON(req_size < sizeof(ADV_SCSI_REQ_Q));
11123 /* Wait for assertion before making little-endian */
11124 req_paddr = cpu_to_le32(req_paddr);
11126 /* Save virtual and physical address of ADV_SCSI_REQ_Q and carrier. */
11127 scsiq->scsiq_ptr = cpu_to_le32(ADV_VADDR_TO_U32(scsiq));
11128 scsiq->scsiq_rptr = req_paddr;
11130 scsiq->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->icq_sp));
11132 * Every ADV_CARR_T.carr_pa is byte swapped to little-endian
11133 * order during initialization.
11135 scsiq->carr_pa = asc_dvc->icq_sp->carr_pa;
11138 * Use the current stopper to send the ADV_SCSI_REQ_Q command to
11139 * the microcode. The newly allocated stopper will become the new
11142 asc_dvc->icq_sp->areq_vpa = req_paddr;
11145 * Set the 'next_vpa' pointer for the old stopper to be the
11146 * physical address of the new stopper. The RISC can only
11147 * follow physical addresses.
11149 asc_dvc->icq_sp->next_vpa = new_carrp->carr_pa;
11152 * Set the host adapter stopper pointer to point to the new carrier.
11154 asc_dvc->icq_sp = new_carrp;
11156 if (asc_dvc->chip_type == ADV_CHIP_ASC3550 ||
11157 asc_dvc->chip_type == ADV_CHIP_ASC38C0800) {
11159 * Tickle the RISC to tell it to read its Command Queue Head pointer.
11161 AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_A);
11162 if (asc_dvc->chip_type == ADV_CHIP_ASC3550) {
11164 * Clear the tickle value. In the ASC-3550 the RISC flag
11165 * command 'clr_tickle_a' does not work unless the host
11166 * value is cleared.
11168 AdvWriteByteRegister(iop_base, IOPB_TICKLE,
11171 } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) {
11173 * Notify the RISC a carrier is ready by writing the physical
11174 * address of the new carrier stopper to the COMMA register.
11176 AdvWriteDWordRegister(iop_base, IOPDW_COMMA,
11177 le32_to_cpu(new_carrp->carr_pa));
11180 return ADV_SUCCESS;
11184 * Execute a single 'Scsi_Cmnd'.
11186 * The function 'done' is called when the request has been completed.
11190 * host - board controlling device
11191 * device - device to send command
11192 * target - target of device
11193 * lun - lun of device
11194 * cmd_len - length of SCSI CDB
11195 * cmnd - buffer for SCSI 8, 10, or 12 byte CDB
11196 * use_sg - if non-zero indicates scatter-gather request with use_sg elements
11198 * if (use_sg == 0) {
11199 * request_buffer - buffer address for request
11200 * request_bufflen - length of request buffer
11202 * request_buffer - pointer to scatterlist structure
11205 * sense_buffer - sense command buffer
11207 * result (4 bytes of an int):
11209 * 0 SCSI Status Byte Code
11210 * 1 SCSI One Byte Message Code
11211 * 2 Host Error Code
11212 * 3 Mid-Level Error Code
11214 * host driver fields:
11215 * SCp - Scsi_Pointer used for command processing status
11216 * scsi_done - used to save caller's done function
11217 * host_scribble - used for pointer to another struct scsi_cmnd
11219 * If this function returns ASC_NOERROR the request will be completed
11220 * from the interrupt handler.
11222 * If this function returns ASC_ERROR the host error code has been set,
11223 * and the called must call asc_scsi_done.
11225 * If ASC_BUSY is returned the request will be returned to the midlayer
11226 * and re-tried later.
11228 static int asc_execute_scsi_cmnd(struct scsi_cmnd *scp)
11231 struct asc_board *boardp = shost_priv(scp->device->host);
11233 ASC_DBG1(1, "asc_execute_scsi_cmnd: scp 0x%p\n", scp);
11235 if (ASC_NARROW_BOARD(boardp)) {
11236 ASC_DVC_VAR *asc_dvc = &boardp->dvc_var.asc_dvc_var;
11237 struct asc_scsi_q asc_scsi_q;
11239 /* asc_build_req() can not return ASC_BUSY. */
11240 ret = asc_build_req(boardp, scp, &asc_scsi_q);
11241 if (ret == ASC_ERROR) {
11242 ASC_STATS(scp->device->host, build_error);
11246 ret = AscExeScsiQueue(asc_dvc, &asc_scsi_q);
11247 kfree(asc_scsi_q.sg_head);
11248 err_code = asc_dvc->err_code;
11250 ADV_DVC_VAR *adv_dvc = &boardp->dvc_var.adv_dvc_var;
11251 ADV_SCSI_REQ_Q *adv_scsiqp;
11253 switch (adv_build_req(boardp, scp, &adv_scsiqp)) {
11255 ASC_DBG(3, "asc_execute_scsi_cmnd: adv_build_req "
11259 ASC_DBG(1, "asc_execute_scsi_cmnd: adv_build_req "
11262 * The asc_stats fields 'adv_build_noreq' and
11263 * 'adv_build_nosg' count wide board busy conditions.
11264 * They are updated in adv_build_req and
11265 * adv_get_sglist, respectively.
11270 ASC_DBG(1, "asc_execute_scsi_cmnd: adv_build_req "
11272 ASC_STATS(scp->device->host, build_error);
11276 ret = AdvExeScsiQueue(adv_dvc, adv_scsiqp);
11277 err_code = adv_dvc->err_code;
11282 ASC_STATS(scp->device->host, exe_noerror);
11284 * Increment monotonically increasing per device
11285 * successful request counter. Wrapping doesn't matter.
11287 boardp->reqcnt[scp->device->id]++;
11288 ASC_DBG(1, "asc_execute_scsi_cmnd: ExeScsiQueue(), "
11292 ASC_STATS(scp->device->host, exe_busy);
11295 ASC_PRINT2("asc_execute_scsi_cmnd: board %d: ExeScsiQueue() "
11296 "ASC_ERROR, err_code 0x%x\n", boardp->id, err_code);
11297 ASC_STATS(scp->device->host, exe_error);
11298 scp->result = HOST_BYTE(DID_ERROR);
11301 ASC_PRINT2("asc_execute_scsi_cmnd: board %d: ExeScsiQueue() "
11302 "unknown, err_code 0x%x\n", boardp->id, err_code);
11303 ASC_STATS(scp->device->host, exe_unknown);
11304 scp->result = HOST_BYTE(DID_ERROR);
11308 ASC_DBG(1, "asc_execute_scsi_cmnd: end\n");
11313 * advansys_queuecommand() - interrupt-driven I/O entrypoint.
11315 * This function always returns 0. Command return status is saved
11316 * in the 'scp' result field.
11319 advansys_queuecommand(struct scsi_cmnd *scp, void (*done)(struct scsi_cmnd *))
11321 struct Scsi_Host *shost = scp->device->host;
11322 struct asc_board *boardp = shost_priv(shost);
11323 unsigned long flags;
11324 int asc_res, result = 0;
11326 ASC_STATS(shost, queuecommand);
11327 scp->scsi_done = done;
11330 * host_lock taken by mid-level prior to call, but need
11331 * to protect against own ISR
11333 spin_lock_irqsave(&boardp->lock, flags);
11334 asc_res = asc_execute_scsi_cmnd(scp);
11335 spin_unlock_irqrestore(&boardp->lock, flags);
11341 result = SCSI_MLQUEUE_HOST_BUSY;
11345 asc_scsi_done(scp);
11352 static ushort __devinit AscGetEisaChipCfg(PortAddr iop_base)
11354 PortAddr eisa_cfg_iop = (PortAddr) ASC_GET_EISA_SLOT(iop_base) |
11355 (PortAddr) (ASC_EISA_CFG_IOP_MASK);
11356 return inpw(eisa_cfg_iop);
11360 * Return the BIOS address of the adapter at the specified
11361 * I/O port and with the specified bus type.
11363 static unsigned short __devinit
11364 AscGetChipBiosAddress(PortAddr iop_base, unsigned short bus_type)
11366 unsigned short cfg_lsw;
11367 unsigned short bios_addr;
11370 * The PCI BIOS is re-located by the motherboard BIOS. Because
11371 * of this the driver can not determine where a PCI BIOS is
11372 * loaded and executes.
11374 if (bus_type & ASC_IS_PCI)
11377 if ((bus_type & ASC_IS_EISA) != 0) {
11378 cfg_lsw = AscGetEisaChipCfg(iop_base);
11380 bios_addr = ASC_BIOS_MIN_ADDR + cfg_lsw * ASC_BIOS_BANK_SIZE;
11384 cfg_lsw = AscGetChipCfgLsw(iop_base);
11387 * ISA PnP uses the top bit as the 32K BIOS flag
11389 if (bus_type == ASC_IS_ISAPNP)
11391 bios_addr = ASC_BIOS_MIN_ADDR + (cfg_lsw >> 12) * ASC_BIOS_BANK_SIZE;
11395 static uchar __devinit AscSetChipScsiID(PortAddr iop_base, uchar new_host_id)
11399 if (AscGetChipScsiID(iop_base) == new_host_id) {
11400 return (new_host_id);
11402 cfg_lsw = AscGetChipCfgLsw(iop_base);
11404 cfg_lsw |= (ushort)((new_host_id & ASC_MAX_TID) << 8);
11405 AscSetChipCfgLsw(iop_base, cfg_lsw);
11406 return (AscGetChipScsiID(iop_base));
11409 static unsigned char __devinit AscGetChipScsiCtrl(PortAddr iop_base)
11413 AscSetBank(iop_base, 1);
11414 sc = inp(iop_base + IOP_REG_SC);
11415 AscSetBank(iop_base, 0);
11419 static unsigned char __devinit
11420 AscGetChipVersion(PortAddr iop_base, unsigned short bus_type)
11422 if (bus_type & ASC_IS_EISA) {
11424 unsigned char revision;
11425 eisa_iop = (PortAddr) ASC_GET_EISA_SLOT(iop_base) |
11426 (PortAddr) ASC_EISA_REV_IOP_MASK;
11427 revision = inp(eisa_iop);
11428 return ASC_CHIP_MIN_VER_EISA - 1 + revision;
11430 return AscGetChipVerNo(iop_base);
11434 static void __devinit AscEnableIsaDma(uchar dma_channel)
11436 if (dma_channel < 4) {
11437 outp(0x000B, (ushort)(0xC0 | dma_channel));
11438 outp(0x000A, dma_channel);
11439 } else if (dma_channel < 8) {
11440 outp(0x00D6, (ushort)(0xC0 | (dma_channel - 4)));
11441 outp(0x00D4, (ushort)(dma_channel - 4));
11445 #endif /* CONFIG_ISA */
11447 static int AscStopQueueExe(PortAddr iop_base)
11451 if (AscReadLramByte(iop_base, ASCV_STOP_CODE_B) == 0) {
11452 AscWriteLramByte(iop_base, ASCV_STOP_CODE_B,
11453 ASC_STOP_REQ_RISC_STOP);
11455 if (AscReadLramByte(iop_base, ASCV_STOP_CODE_B) &
11456 ASC_STOP_ACK_RISC_STOP) {
11460 } while (count++ < 20);
11465 static ASC_DCNT __devinit AscGetMaxDmaCount(ushort bus_type)
11467 if (bus_type & ASC_IS_ISA)
11468 return ASC_MAX_ISA_DMA_COUNT;
11469 else if (bus_type & (ASC_IS_EISA | ASC_IS_VL))
11470 return ASC_MAX_VL_DMA_COUNT;
11471 return ASC_MAX_PCI_DMA_COUNT;
11475 static ushort __devinit AscGetIsaDmaChannel(PortAddr iop_base)
11479 channel = AscGetChipCfgLsw(iop_base) & 0x0003;
11480 if (channel == 0x03)
11482 else if (channel == 0x00)
11484 return (channel + 4);
11487 static ushort __devinit AscSetIsaDmaChannel(PortAddr iop_base, ushort dma_channel)
11492 if ((dma_channel >= 5) && (dma_channel <= 7)) {
11493 if (dma_channel == 7)
11496 value = dma_channel - 4;
11497 cfg_lsw = AscGetChipCfgLsw(iop_base) & 0xFFFC;
11499 AscSetChipCfgLsw(iop_base, cfg_lsw);
11500 return (AscGetIsaDmaChannel(iop_base));
11505 static uchar __devinit AscGetIsaDmaSpeed(PortAddr iop_base)
11509 AscSetBank(iop_base, 1);
11510 speed_value = AscReadChipDmaSpeed(iop_base);
11511 speed_value &= 0x07;
11512 AscSetBank(iop_base, 0);
11513 return speed_value;
11516 static uchar __devinit AscSetIsaDmaSpeed(PortAddr iop_base, uchar speed_value)
11518 speed_value &= 0x07;
11519 AscSetBank(iop_base, 1);
11520 AscWriteChipDmaSpeed(iop_base, speed_value);
11521 AscSetBank(iop_base, 0);
11522 return AscGetIsaDmaSpeed(iop_base);
11524 #endif /* CONFIG_ISA */
11526 static ushort __devinit AscInitAscDvcVar(ASC_DVC_VAR *asc_dvc)
11531 uchar chip_version;
11533 iop_base = asc_dvc->iop_base;
11535 asc_dvc->err_code = 0;
11536 if ((asc_dvc->bus_type &
11537 (ASC_IS_ISA | ASC_IS_PCI | ASC_IS_EISA | ASC_IS_VL)) == 0) {
11538 asc_dvc->err_code |= ASC_IERR_NO_BUS_TYPE;
11540 AscSetChipControl(iop_base, CC_HALT);
11541 AscSetChipStatus(iop_base, 0);
11542 asc_dvc->bug_fix_cntl = 0;
11543 asc_dvc->pci_fix_asyn_xfer = 0;
11544 asc_dvc->pci_fix_asyn_xfer_always = 0;
11545 /* asc_dvc->init_state initalized in AscInitGetConfig(). */
11546 asc_dvc->sdtr_done = 0;
11547 asc_dvc->cur_total_qng = 0;
11548 asc_dvc->is_in_int = 0;
11549 asc_dvc->in_critical_cnt = 0;
11550 asc_dvc->last_q_shortage = 0;
11551 asc_dvc->use_tagged_qng = 0;
11552 asc_dvc->no_scam = 0;
11553 asc_dvc->unit_not_ready = 0;
11554 asc_dvc->queue_full_or_busy = 0;
11555 asc_dvc->redo_scam = 0;
11557 asc_dvc->host_init_sdtr_index = 0;
11558 asc_dvc->cfg->can_tagged_qng = 0;
11559 asc_dvc->cfg->cmd_qng_enabled = 0;
11560 asc_dvc->dvc_cntl = ASC_DEF_DVC_CNTL;
11561 asc_dvc->init_sdtr = 0;
11562 asc_dvc->max_total_qng = ASC_DEF_MAX_TOTAL_QNG;
11563 asc_dvc->scsi_reset_wait = 3;
11564 asc_dvc->start_motor = ASC_SCSI_WIDTH_BIT_SET;
11565 asc_dvc->max_dma_count = AscGetMaxDmaCount(asc_dvc->bus_type);
11566 asc_dvc->cfg->sdtr_enable = ASC_SCSI_WIDTH_BIT_SET;
11567 asc_dvc->cfg->disc_enable = ASC_SCSI_WIDTH_BIT_SET;
11568 asc_dvc->cfg->chip_scsi_id = ASC_DEF_CHIP_SCSI_ID;
11569 asc_dvc->cfg->lib_serial_no = ASC_LIB_SERIAL_NUMBER;
11570 asc_dvc->cfg->lib_version = (ASC_LIB_VERSION_MAJOR << 8) |
11571 ASC_LIB_VERSION_MINOR;
11572 chip_version = AscGetChipVersion(iop_base, asc_dvc->bus_type);
11573 asc_dvc->cfg->chip_version = chip_version;
11574 asc_dvc->sdtr_period_tbl[0] = SYN_XFER_NS_0;
11575 asc_dvc->sdtr_period_tbl[1] = SYN_XFER_NS_1;
11576 asc_dvc->sdtr_period_tbl[2] = SYN_XFER_NS_2;
11577 asc_dvc->sdtr_period_tbl[3] = SYN_XFER_NS_3;
11578 asc_dvc->sdtr_period_tbl[4] = SYN_XFER_NS_4;
11579 asc_dvc->sdtr_period_tbl[5] = SYN_XFER_NS_5;
11580 asc_dvc->sdtr_period_tbl[6] = SYN_XFER_NS_6;
11581 asc_dvc->sdtr_period_tbl[7] = SYN_XFER_NS_7;
11582 asc_dvc->max_sdtr_index = 7;
11583 if ((asc_dvc->bus_type & ASC_IS_PCI) &&
11584 (chip_version >= ASC_CHIP_VER_PCI_ULTRA_3150)) {
11585 asc_dvc->bus_type = ASC_IS_PCI_ULTRA;
11586 asc_dvc->sdtr_period_tbl[0] = SYN_ULTRA_XFER_NS_0;
11587 asc_dvc->sdtr_period_tbl[1] = SYN_ULTRA_XFER_NS_1;
11588 asc_dvc->sdtr_period_tbl[2] = SYN_ULTRA_XFER_NS_2;
11589 asc_dvc->sdtr_period_tbl[3] = SYN_ULTRA_XFER_NS_3;
11590 asc_dvc->sdtr_period_tbl[4] = SYN_ULTRA_XFER_NS_4;
11591 asc_dvc->sdtr_period_tbl[5] = SYN_ULTRA_XFER_NS_5;
11592 asc_dvc->sdtr_period_tbl[6] = SYN_ULTRA_XFER_NS_6;
11593 asc_dvc->sdtr_period_tbl[7] = SYN_ULTRA_XFER_NS_7;
11594 asc_dvc->sdtr_period_tbl[8] = SYN_ULTRA_XFER_NS_8;
11595 asc_dvc->sdtr_period_tbl[9] = SYN_ULTRA_XFER_NS_9;
11596 asc_dvc->sdtr_period_tbl[10] = SYN_ULTRA_XFER_NS_10;
11597 asc_dvc->sdtr_period_tbl[11] = SYN_ULTRA_XFER_NS_11;
11598 asc_dvc->sdtr_period_tbl[12] = SYN_ULTRA_XFER_NS_12;
11599 asc_dvc->sdtr_period_tbl[13] = SYN_ULTRA_XFER_NS_13;
11600 asc_dvc->sdtr_period_tbl[14] = SYN_ULTRA_XFER_NS_14;
11601 asc_dvc->sdtr_period_tbl[15] = SYN_ULTRA_XFER_NS_15;
11602 asc_dvc->max_sdtr_index = 15;
11603 if (chip_version == ASC_CHIP_VER_PCI_ULTRA_3150) {
11604 AscSetExtraControl(iop_base,
11605 (SEC_ACTIVE_NEGATE | SEC_SLEW_RATE));
11606 } else if (chip_version >= ASC_CHIP_VER_PCI_ULTRA_3050) {
11607 AscSetExtraControl(iop_base,
11608 (SEC_ACTIVE_NEGATE |
11609 SEC_ENABLE_FILTER));
11612 if (asc_dvc->bus_type == ASC_IS_PCI) {
11613 AscSetExtraControl(iop_base,
11614 (SEC_ACTIVE_NEGATE | SEC_SLEW_RATE));
11617 asc_dvc->cfg->isa_dma_speed = ASC_DEF_ISA_DMA_SPEED;
11619 if ((asc_dvc->bus_type & ASC_IS_ISA) != 0) {
11620 if (chip_version >= ASC_CHIP_MIN_VER_ISA_PNP) {
11621 AscSetChipIFC(iop_base, IFC_INIT_DEFAULT);
11622 asc_dvc->bus_type = ASC_IS_ISAPNP;
11624 asc_dvc->cfg->isa_dma_channel =
11625 (uchar)AscGetIsaDmaChannel(iop_base);
11627 #endif /* CONFIG_ISA */
11628 for (i = 0; i <= ASC_MAX_TID; i++) {
11629 asc_dvc->cur_dvc_qng[i] = 0;
11630 asc_dvc->max_dvc_qng[i] = ASC_MAX_SCSI1_QNG;
11631 asc_dvc->scsiq_busy_head[i] = (ASC_SCSI_Q *)0L;
11632 asc_dvc->scsiq_busy_tail[i] = (ASC_SCSI_Q *)0L;
11633 asc_dvc->cfg->max_tag_qng[i] = ASC_MAX_INRAM_TAG_QNG;
11638 static int __devinit AscWriteEEPCmdReg(PortAddr iop_base, uchar cmd_reg)
11642 for (retry = 0; retry < ASC_EEP_MAX_RETRY; retry++) {
11643 unsigned char read_back;
11644 AscSetChipEEPCmd(iop_base, cmd_reg);
11646 read_back = AscGetChipEEPCmd(iop_base);
11647 if (read_back == cmd_reg)
11653 static void __devinit AscWaitEEPRead(void)
11658 static ushort __devinit AscReadEEPWord(PortAddr iop_base, uchar addr)
11663 AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_DISABLE);
11665 cmd_reg = addr | ASC_EEP_CMD_READ;
11666 AscWriteEEPCmdReg(iop_base, cmd_reg);
11668 read_wval = AscGetChipEEPData(iop_base);
11673 static ushort __devinit
11674 AscGetEEPConfig(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type)
11681 int uchar_end_in_config = ASC_EEP_MAX_DVC_ADDR - 2;
11684 wbuf = (ushort *)cfg_buf;
11686 /* Read two config words; Byte-swapping done by AscReadEEPWord(). */
11687 for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) {
11688 *wbuf = AscReadEEPWord(iop_base, (uchar)s_addr);
11691 if (bus_type & ASC_IS_VL) {
11692 cfg_beg = ASC_EEP_DVC_CFG_BEG_VL;
11693 cfg_end = ASC_EEP_MAX_DVC_ADDR_VL;
11695 cfg_beg = ASC_EEP_DVC_CFG_BEG;
11696 cfg_end = ASC_EEP_MAX_DVC_ADDR;
11698 for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) {
11699 wval = AscReadEEPWord(iop_base, (uchar)s_addr);
11700 if (s_addr <= uchar_end_in_config) {
11702 * Swap all char fields - must unswap bytes already swapped
11703 * by AscReadEEPWord().
11705 *wbuf = le16_to_cpu(wval);
11707 /* Don't swap word field at the end - cntl field. */
11710 sum += wval; /* Checksum treats all EEPROM data as words. */
11713 * Read the checksum word which will be compared against 'sum'
11714 * by the caller. Word field already swapped.
11716 *wbuf = AscReadEEPWord(iop_base, (uchar)s_addr);
11720 static int __devinit AscTestExternalLram(ASC_DVC_VAR *asc_dvc)
11727 iop_base = asc_dvc->iop_base;
11729 q_addr = ASC_QNO_TO_QADDR(241);
11730 saved_word = AscReadLramWord(iop_base, q_addr);
11731 AscSetChipLramAddr(iop_base, q_addr);
11732 AscSetChipLramData(iop_base, 0x55AA);
11734 AscSetChipLramAddr(iop_base, q_addr);
11735 if (AscGetChipLramData(iop_base) == 0x55AA) {
11737 AscWriteLramWord(iop_base, q_addr, saved_word);
11742 static void __devinit AscWaitEEPWrite(void)
11748 static int __devinit AscWriteEEPDataReg(PortAddr iop_base, ushort data_reg)
11755 AscSetChipEEPData(iop_base, data_reg);
11757 read_back = AscGetChipEEPData(iop_base);
11758 if (read_back == data_reg) {
11761 if (retry++ > ASC_EEP_MAX_RETRY) {
11767 static ushort __devinit
11768 AscWriteEEPWord(PortAddr iop_base, uchar addr, ushort word_val)
11772 read_wval = AscReadEEPWord(iop_base, addr);
11773 if (read_wval != word_val) {
11774 AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_ABLE);
11776 AscWriteEEPDataReg(iop_base, word_val);
11778 AscWriteEEPCmdReg(iop_base,
11779 (uchar)((uchar)ASC_EEP_CMD_WRITE | addr));
11781 AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_DISABLE);
11783 return (AscReadEEPWord(iop_base, addr));
11785 return (read_wval);
11788 static int __devinit
11789 AscSetEEPConfigOnce(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type)
11798 int uchar_end_in_config = ASC_EEP_MAX_DVC_ADDR - 2;
11800 wbuf = (ushort *)cfg_buf;
11803 /* Write two config words; AscWriteEEPWord() will swap bytes. */
11804 for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) {
11806 if (*wbuf != AscWriteEEPWord(iop_base, (uchar)s_addr, *wbuf)) {
11810 if (bus_type & ASC_IS_VL) {
11811 cfg_beg = ASC_EEP_DVC_CFG_BEG_VL;
11812 cfg_end = ASC_EEP_MAX_DVC_ADDR_VL;
11814 cfg_beg = ASC_EEP_DVC_CFG_BEG;
11815 cfg_end = ASC_EEP_MAX_DVC_ADDR;
11817 for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) {
11818 if (s_addr <= uchar_end_in_config) {
11820 * This is a char field. Swap char fields before they are
11821 * swapped again by AscWriteEEPWord().
11823 word = cpu_to_le16(*wbuf);
11825 AscWriteEEPWord(iop_base, (uchar)s_addr, word)) {
11829 /* Don't swap word field at the end - cntl field. */
11831 AscWriteEEPWord(iop_base, (uchar)s_addr, *wbuf)) {
11835 sum += *wbuf; /* Checksum calculated from word values. */
11837 /* Write checksum word. It will be swapped by AscWriteEEPWord(). */
11839 if (sum != AscWriteEEPWord(iop_base, (uchar)s_addr, sum)) {
11843 /* Read EEPROM back again. */
11844 wbuf = (ushort *)cfg_buf;
11846 * Read two config words; Byte-swapping done by AscReadEEPWord().
11848 for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) {
11849 if (*wbuf != AscReadEEPWord(iop_base, (uchar)s_addr)) {
11853 if (bus_type & ASC_IS_VL) {
11854 cfg_beg = ASC_EEP_DVC_CFG_BEG_VL;
11855 cfg_end = ASC_EEP_MAX_DVC_ADDR_VL;
11857 cfg_beg = ASC_EEP_DVC_CFG_BEG;
11858 cfg_end = ASC_EEP_MAX_DVC_ADDR;
11860 for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) {
11861 if (s_addr <= uchar_end_in_config) {
11863 * Swap all char fields. Must unswap bytes already swapped
11864 * by AscReadEEPWord().
11867 le16_to_cpu(AscReadEEPWord
11868 (iop_base, (uchar)s_addr));
11870 /* Don't swap word field at the end - cntl field. */
11871 word = AscReadEEPWord(iop_base, (uchar)s_addr);
11873 if (*wbuf != word) {
11877 /* Read checksum; Byte swapping not needed. */
11878 if (AscReadEEPWord(iop_base, (uchar)s_addr) != sum) {
11884 static int __devinit
11885 AscSetEEPConfig(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type)
11892 if ((n_error = AscSetEEPConfigOnce(iop_base, cfg_buf,
11896 if (++retry > ASC_EEP_MAX_RETRY) {
11903 static ushort __devinit AscInitFromEEP(ASC_DVC_VAR *asc_dvc)
11905 ASCEEP_CONFIG eep_config_buf;
11906 ASCEEP_CONFIG *eep_config;
11910 ushort cfg_msw, cfg_lsw;
11914 iop_base = asc_dvc->iop_base;
11916 AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0x00FE);
11917 AscStopQueueExe(iop_base);
11918 if ((AscStopChip(iop_base) == FALSE) ||
11919 (AscGetChipScsiCtrl(iop_base) != 0)) {
11920 asc_dvc->init_state |= ASC_INIT_RESET_SCSI_DONE;
11921 AscResetChipAndScsiBus(asc_dvc);
11922 mdelay(asc_dvc->scsi_reset_wait * 1000); /* XXX: msleep? */
11924 if (AscIsChipHalted(iop_base) == FALSE) {
11925 asc_dvc->err_code |= ASC_IERR_START_STOP_CHIP;
11926 return (warn_code);
11928 AscSetPCAddr(iop_base, ASC_MCODE_START_ADDR);
11929 if (AscGetPCAddr(iop_base) != ASC_MCODE_START_ADDR) {
11930 asc_dvc->err_code |= ASC_IERR_SET_PC_ADDR;
11931 return (warn_code);
11933 eep_config = (ASCEEP_CONFIG *)&eep_config_buf;
11934 cfg_msw = AscGetChipCfgMsw(iop_base);
11935 cfg_lsw = AscGetChipCfgLsw(iop_base);
11936 if ((cfg_msw & ASC_CFG_MSW_CLR_MASK) != 0) {
11937 cfg_msw &= ~ASC_CFG_MSW_CLR_MASK;
11938 warn_code |= ASC_WARN_CFG_MSW_RECOVER;
11939 AscSetChipCfgMsw(iop_base, cfg_msw);
11941 chksum = AscGetEEPConfig(iop_base, eep_config, asc_dvc->bus_type);
11942 ASC_DBG1(1, "AscInitFromEEP: chksum 0x%x\n", chksum);
11946 if (AscGetChipStatus(iop_base) & CSW_AUTO_CONFIG) {
11947 warn_code |= ASC_WARN_AUTO_CONFIG;
11948 if (asc_dvc->cfg->chip_version == 3) {
11949 if (eep_config->cfg_lsw != cfg_lsw) {
11950 warn_code |= ASC_WARN_EEPROM_RECOVER;
11951 eep_config->cfg_lsw =
11952 AscGetChipCfgLsw(iop_base);
11954 if (eep_config->cfg_msw != cfg_msw) {
11955 warn_code |= ASC_WARN_EEPROM_RECOVER;
11956 eep_config->cfg_msw =
11957 AscGetChipCfgMsw(iop_base);
11961 eep_config->cfg_msw &= ~ASC_CFG_MSW_CLR_MASK;
11962 eep_config->cfg_lsw |= ASC_CFG0_HOST_INT_ON;
11963 ASC_DBG1(1, "AscInitFromEEP: eep_config->chksum 0x%x\n",
11964 eep_config->chksum);
11965 if (chksum != eep_config->chksum) {
11966 if (AscGetChipVersion(iop_base, asc_dvc->bus_type) ==
11967 ASC_CHIP_VER_PCI_ULTRA_3050) {
11969 "AscInitFromEEP: chksum error ignored; EEPROM-less board\n");
11970 eep_config->init_sdtr = 0xFF;
11971 eep_config->disc_enable = 0xFF;
11972 eep_config->start_motor = 0xFF;
11973 eep_config->use_cmd_qng = 0;
11974 eep_config->max_total_qng = 0xF0;
11975 eep_config->max_tag_qng = 0x20;
11976 eep_config->cntl = 0xBFFF;
11977 ASC_EEP_SET_CHIP_ID(eep_config, 7);
11978 eep_config->no_scam = 0;
11979 eep_config->adapter_info[0] = 0;
11980 eep_config->adapter_info[1] = 0;
11981 eep_config->adapter_info[2] = 0;
11982 eep_config->adapter_info[3] = 0;
11983 eep_config->adapter_info[4] = 0;
11984 /* Indicate EEPROM-less board. */
11985 eep_config->adapter_info[5] = 0xBB;
11988 ("AscInitFromEEP: EEPROM checksum error; Will try to re-write EEPROM.\n");
11990 warn_code |= ASC_WARN_EEPROM_CHKSUM;
11993 asc_dvc->cfg->sdtr_enable = eep_config->init_sdtr;
11994 asc_dvc->cfg->disc_enable = eep_config->disc_enable;
11995 asc_dvc->cfg->cmd_qng_enabled = eep_config->use_cmd_qng;
11996 asc_dvc->cfg->isa_dma_speed = ASC_EEP_GET_DMA_SPD(eep_config);
11997 asc_dvc->start_motor = eep_config->start_motor;
11998 asc_dvc->dvc_cntl = eep_config->cntl;
11999 asc_dvc->no_scam = eep_config->no_scam;
12000 asc_dvc->cfg->adapter_info[0] = eep_config->adapter_info[0];
12001 asc_dvc->cfg->adapter_info[1] = eep_config->adapter_info[1];
12002 asc_dvc->cfg->adapter_info[2] = eep_config->adapter_info[2];
12003 asc_dvc->cfg->adapter_info[3] = eep_config->adapter_info[3];
12004 asc_dvc->cfg->adapter_info[4] = eep_config->adapter_info[4];
12005 asc_dvc->cfg->adapter_info[5] = eep_config->adapter_info[5];
12006 if (!AscTestExternalLram(asc_dvc)) {
12007 if (((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) ==
12008 ASC_IS_PCI_ULTRA)) {
12009 eep_config->max_total_qng =
12010 ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG;
12011 eep_config->max_tag_qng =
12012 ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG;
12014 eep_config->cfg_msw |= 0x0800;
12016 AscSetChipCfgMsw(iop_base, cfg_msw);
12017 eep_config->max_total_qng = ASC_MAX_PCI_INRAM_TOTAL_QNG;
12018 eep_config->max_tag_qng = ASC_MAX_INRAM_TAG_QNG;
12022 if (eep_config->max_total_qng < ASC_MIN_TOTAL_QNG) {
12023 eep_config->max_total_qng = ASC_MIN_TOTAL_QNG;
12025 if (eep_config->max_total_qng > ASC_MAX_TOTAL_QNG) {
12026 eep_config->max_total_qng = ASC_MAX_TOTAL_QNG;
12028 if (eep_config->max_tag_qng > eep_config->max_total_qng) {
12029 eep_config->max_tag_qng = eep_config->max_total_qng;
12031 if (eep_config->max_tag_qng < ASC_MIN_TAG_Q_PER_DVC) {
12032 eep_config->max_tag_qng = ASC_MIN_TAG_Q_PER_DVC;
12034 asc_dvc->max_total_qng = eep_config->max_total_qng;
12035 if ((eep_config->use_cmd_qng & eep_config->disc_enable) !=
12036 eep_config->use_cmd_qng) {
12037 eep_config->disc_enable = eep_config->use_cmd_qng;
12038 warn_code |= ASC_WARN_CMD_QNG_CONFLICT;
12040 ASC_EEP_SET_CHIP_ID(eep_config,
12041 ASC_EEP_GET_CHIP_ID(eep_config) & ASC_MAX_TID);
12042 asc_dvc->cfg->chip_scsi_id = ASC_EEP_GET_CHIP_ID(eep_config);
12043 if (((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA) &&
12044 !(asc_dvc->dvc_cntl & ASC_CNTL_SDTR_ENABLE_ULTRA)) {
12045 asc_dvc->host_init_sdtr_index = ASC_SDTR_ULTRA_PCI_10MB_INDEX;
12048 for (i = 0; i <= ASC_MAX_TID; i++) {
12049 asc_dvc->dos_int13_table[i] = eep_config->dos_int13_table[i];
12050 asc_dvc->cfg->max_tag_qng[i] = eep_config->max_tag_qng;
12051 asc_dvc->cfg->sdtr_period_offset[i] =
12052 (uchar)(ASC_DEF_SDTR_OFFSET |
12053 (asc_dvc->host_init_sdtr_index << 4));
12055 eep_config->cfg_msw = AscGetChipCfgMsw(iop_base);
12057 if ((i = AscSetEEPConfig(iop_base, eep_config,
12058 asc_dvc->bus_type)) != 0) {
12060 ("AscInitFromEEP: Failed to re-write EEPROM with %d errors.\n",
12064 ("AscInitFromEEP: Successfully re-wrote EEPROM.\n");
12067 return (warn_code);
12070 static int __devinit AscInitGetConfig(struct asc_board *boardp)
12072 ASC_DVC_VAR *asc_dvc = &boardp->dvc_var.asc_dvc_var;
12073 unsigned short warn_code = 0;
12075 asc_dvc->init_state = ASC_INIT_STATE_BEG_GET_CFG;
12076 if (asc_dvc->err_code != 0)
12077 return asc_dvc->err_code;
12079 if (AscFindSignature(asc_dvc->iop_base)) {
12080 warn_code |= AscInitAscDvcVar(asc_dvc);
12081 warn_code |= AscInitFromEEP(asc_dvc);
12082 asc_dvc->init_state |= ASC_INIT_STATE_END_GET_CFG;
12083 if (asc_dvc->scsi_reset_wait > ASC_MAX_SCSI_RESET_WAIT)
12084 asc_dvc->scsi_reset_wait = ASC_MAX_SCSI_RESET_WAIT;
12086 asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE;
12089 switch (warn_code) {
12090 case 0: /* No error */
12092 case ASC_WARN_IO_PORT_ROTATE:
12093 ASC_PRINT1("AscInitGetConfig: board %d: I/O port address "
12094 "modified\n", boardp->id);
12096 case ASC_WARN_AUTO_CONFIG:
12097 ASC_PRINT1("AscInitGetConfig: board %d: I/O port increment "
12098 "switch enabled\n", boardp->id);
12100 case ASC_WARN_EEPROM_CHKSUM:
12101 ASC_PRINT1("AscInitGetConfig: board %d: EEPROM checksum "
12102 "error\n", boardp->id);
12104 case ASC_WARN_IRQ_MODIFIED:
12105 ASC_PRINT1("AscInitGetConfig: board %d: IRQ modified\n",
12108 case ASC_WARN_CMD_QNG_CONFLICT:
12109 ASC_PRINT1("AscInitGetConfig: board %d: tag queuing enabled "
12110 "w/o disconnects\n", boardp->id);
12113 ASC_PRINT2("AscInitGetConfig: board %d: unknown warning: "
12114 "0x%x\n", boardp->id, warn_code);
12118 if (asc_dvc->err_code != 0) {
12119 ASC_PRINT3("AscInitGetConfig: board %d error: init_state 0x%x, "
12120 "err_code 0x%x\n", boardp->id, asc_dvc->init_state,
12121 asc_dvc->err_code);
12124 return asc_dvc->err_code;
12127 static int __devinit AscInitSetConfig(struct pci_dev *pdev, struct asc_board *boardp)
12129 ASC_DVC_VAR *asc_dvc = &boardp->dvc_var.asc_dvc_var;
12130 PortAddr iop_base = asc_dvc->iop_base;
12131 unsigned short cfg_msw;
12132 unsigned short warn_code = 0;
12134 asc_dvc->init_state |= ASC_INIT_STATE_BEG_SET_CFG;
12135 if (asc_dvc->err_code != 0)
12136 return asc_dvc->err_code;
12137 if (!AscFindSignature(asc_dvc->iop_base)) {
12138 asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE;
12139 return asc_dvc->err_code;
12142 cfg_msw = AscGetChipCfgMsw(iop_base);
12143 if ((cfg_msw & ASC_CFG_MSW_CLR_MASK) != 0) {
12144 cfg_msw &= ~ASC_CFG_MSW_CLR_MASK;
12145 warn_code |= ASC_WARN_CFG_MSW_RECOVER;
12146 AscSetChipCfgMsw(iop_base, cfg_msw);
12148 if ((asc_dvc->cfg->cmd_qng_enabled & asc_dvc->cfg->disc_enable) !=
12149 asc_dvc->cfg->cmd_qng_enabled) {
12150 asc_dvc->cfg->disc_enable = asc_dvc->cfg->cmd_qng_enabled;
12151 warn_code |= ASC_WARN_CMD_QNG_CONFLICT;
12153 if (AscGetChipStatus(iop_base) & CSW_AUTO_CONFIG) {
12154 warn_code |= ASC_WARN_AUTO_CONFIG;
12157 if (asc_dvc->bus_type & ASC_IS_PCI) {
12159 AscSetChipCfgMsw(iop_base, cfg_msw);
12160 if ((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA) {
12162 if ((pdev->device == PCI_DEVICE_ID_ASP_1200A) ||
12163 (pdev->device == PCI_DEVICE_ID_ASP_ABP940)) {
12164 asc_dvc->bug_fix_cntl |= ASC_BUG_FIX_IF_NOT_DWB;
12165 asc_dvc->bug_fix_cntl |=
12166 ASC_BUG_FIX_ASYN_USE_SYN;
12170 #endif /* CONFIG_PCI */
12171 if (asc_dvc->bus_type == ASC_IS_ISAPNP) {
12172 if (AscGetChipVersion(iop_base, asc_dvc->bus_type)
12173 == ASC_CHIP_VER_ASYN_BUG) {
12174 asc_dvc->bug_fix_cntl |= ASC_BUG_FIX_ASYN_USE_SYN;
12177 if (AscSetChipScsiID(iop_base, asc_dvc->cfg->chip_scsi_id) !=
12178 asc_dvc->cfg->chip_scsi_id) {
12179 asc_dvc->err_code |= ASC_IERR_SET_SCSI_ID;
12182 if (asc_dvc->bus_type & ASC_IS_ISA) {
12183 AscSetIsaDmaChannel(iop_base, asc_dvc->cfg->isa_dma_channel);
12184 AscSetIsaDmaSpeed(iop_base, asc_dvc->cfg->isa_dma_speed);
12186 #endif /* CONFIG_ISA */
12188 asc_dvc->init_state |= ASC_INIT_STATE_END_SET_CFG;
12190 switch (warn_code) {
12191 case 0: /* No error. */
12193 case ASC_WARN_IO_PORT_ROTATE:
12194 ASC_PRINT1("AscInitSetConfig: board %d: I/O port address "
12195 "modified\n", boardp->id);
12197 case ASC_WARN_AUTO_CONFIG:
12198 ASC_PRINT1("AscInitSetConfig: board %d: I/O port increment "
12199 "switch enabled\n", boardp->id);
12201 case ASC_WARN_EEPROM_CHKSUM:
12202 ASC_PRINT1("AscInitSetConfig: board %d: EEPROM checksum "
12203 "error\n", boardp->id);
12205 case ASC_WARN_IRQ_MODIFIED:
12206 ASC_PRINT1("AscInitSetConfig: board %d: IRQ modified\n",
12209 case ASC_WARN_CMD_QNG_CONFLICT:
12210 ASC_PRINT1("AscInitSetConfig: board %d: tag queuing w/o "
12215 ASC_PRINT2("AscInitSetConfig: board %d: unknown warning: "
12216 "0x%x\n", boardp->id, warn_code);
12220 if (asc_dvc->err_code != 0) {
12221 ASC_PRINT3("AscInitSetConfig: board %d error: init_state 0x%x, "
12222 "err_code 0x%x\n", boardp->id, asc_dvc->init_state,
12223 asc_dvc->err_code);
12226 return asc_dvc->err_code;
12230 * EEPROM Configuration.
12232 * All drivers should use this structure to set the default EEPROM
12233 * configuration. The BIOS now uses this structure when it is built.
12234 * Additional structure information can be found in a_condor.h where
12235 * the structure is defined.
12237 * The *_Field_IsChar structs are needed to correct for endianness.
12238 * These values are read from the board 16 bits at a time directly
12239 * into the structs. Because some fields are char, the values will be
12240 * in the wrong order. The *_Field_IsChar tells when to flip the
12241 * bytes. Data read and written to PCI memory is automatically swapped
12242 * on big-endian platforms so char fields read as words are actually being
12243 * unswapped on big-endian platforms.
12245 static ADVEEP_3550_CONFIG Default_3550_EEPROM_Config __devinitdata = {
12246 ADV_EEPROM_BIOS_ENABLE, /* cfg_lsw */
12247 0x0000, /* cfg_msw */
12248 0xFFFF, /* disc_enable */
12249 0xFFFF, /* wdtr_able */
12250 0xFFFF, /* sdtr_able */
12251 0xFFFF, /* start_motor */
12252 0xFFFF, /* tagqng_able */
12253 0xFFFF, /* bios_scan */
12254 0, /* scam_tolerant */
12255 7, /* adapter_scsi_id */
12256 0, /* bios_boot_delay */
12257 3, /* scsi_reset_delay */
12258 0, /* bios_id_lun */
12259 0, /* termination */
12261 0xFFE7, /* bios_ctrl */
12262 0xFFFF, /* ultra_able */
12264 ASC_DEF_MAX_HOST_QNG, /* max_host_qng */
12265 ASC_DEF_MAX_DVC_QNG, /* max_dvc_qng */
12268 0, /* serial_number_word1 */
12269 0, /* serial_number_word2 */
12270 0, /* serial_number_word3 */
12272 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
12273 , /* oem_name[16] */
12274 0, /* dvc_err_code */
12275 0, /* adv_err_code */
12276 0, /* adv_err_addr */
12277 0, /* saved_dvc_err_code */
12278 0, /* saved_adv_err_code */
12279 0, /* saved_adv_err_addr */
12283 static ADVEEP_3550_CONFIG ADVEEP_3550_Config_Field_IsChar __devinitdata = {
12286 0, /* -disc_enable */
12289 0, /* start_motor */
12290 0, /* tagqng_able */
12292 0, /* scam_tolerant */
12293 1, /* adapter_scsi_id */
12294 1, /* bios_boot_delay */
12295 1, /* scsi_reset_delay */
12296 1, /* bios_id_lun */
12297 1, /* termination */
12300 0, /* ultra_able */
12302 1, /* max_host_qng */
12303 1, /* max_dvc_qng */
12306 0, /* serial_number_word1 */
12307 0, /* serial_number_word2 */
12308 0, /* serial_number_word3 */
12310 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
12311 , /* oem_name[16] */
12312 0, /* dvc_err_code */
12313 0, /* adv_err_code */
12314 0, /* adv_err_addr */
12315 0, /* saved_dvc_err_code */
12316 0, /* saved_adv_err_code */
12317 0, /* saved_adv_err_addr */
12321 static ADVEEP_38C0800_CONFIG Default_38C0800_EEPROM_Config __devinitdata = {
12322 ADV_EEPROM_BIOS_ENABLE, /* 00 cfg_lsw */
12323 0x0000, /* 01 cfg_msw */
12324 0xFFFF, /* 02 disc_enable */
12325 0xFFFF, /* 03 wdtr_able */
12326 0x4444, /* 04 sdtr_speed1 */
12327 0xFFFF, /* 05 start_motor */
12328 0xFFFF, /* 06 tagqng_able */
12329 0xFFFF, /* 07 bios_scan */
12330 0, /* 08 scam_tolerant */
12331 7, /* 09 adapter_scsi_id */
12332 0, /* bios_boot_delay */
12333 3, /* 10 scsi_reset_delay */
12334 0, /* bios_id_lun */
12335 0, /* 11 termination_se */
12336 0, /* termination_lvd */
12337 0xFFE7, /* 12 bios_ctrl */
12338 0x4444, /* 13 sdtr_speed2 */
12339 0x4444, /* 14 sdtr_speed3 */
12340 ASC_DEF_MAX_HOST_QNG, /* 15 max_host_qng */
12341 ASC_DEF_MAX_DVC_QNG, /* max_dvc_qng */
12342 0, /* 16 dvc_cntl */
12343 0x4444, /* 17 sdtr_speed4 */
12344 0, /* 18 serial_number_word1 */
12345 0, /* 19 serial_number_word2 */
12346 0, /* 20 serial_number_word3 */
12347 0, /* 21 check_sum */
12348 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
12349 , /* 22-29 oem_name[16] */
12350 0, /* 30 dvc_err_code */
12351 0, /* 31 adv_err_code */
12352 0, /* 32 adv_err_addr */
12353 0, /* 33 saved_dvc_err_code */
12354 0, /* 34 saved_adv_err_code */
12355 0, /* 35 saved_adv_err_addr */
12356 0, /* 36 reserved */
12357 0, /* 37 reserved */
12358 0, /* 38 reserved */
12359 0, /* 39 reserved */
12360 0, /* 40 reserved */
12361 0, /* 41 reserved */
12362 0, /* 42 reserved */
12363 0, /* 43 reserved */
12364 0, /* 44 reserved */
12365 0, /* 45 reserved */
12366 0, /* 46 reserved */
12367 0, /* 47 reserved */
12368 0, /* 48 reserved */
12369 0, /* 49 reserved */
12370 0, /* 50 reserved */
12371 0, /* 51 reserved */
12372 0, /* 52 reserved */
12373 0, /* 53 reserved */
12374 0, /* 54 reserved */
12375 0, /* 55 reserved */
12376 0, /* 56 cisptr_lsw */
12377 0, /* 57 cisprt_msw */
12378 PCI_VENDOR_ID_ASP, /* 58 subsysvid */
12379 PCI_DEVICE_ID_38C0800_REV1, /* 59 subsysid */
12380 0, /* 60 reserved */
12381 0, /* 61 reserved */
12382 0, /* 62 reserved */
12383 0 /* 63 reserved */
12386 static ADVEEP_38C0800_CONFIG ADVEEP_38C0800_Config_Field_IsChar __devinitdata = {
12387 0, /* 00 cfg_lsw */
12388 0, /* 01 cfg_msw */
12389 0, /* 02 disc_enable */
12390 0, /* 03 wdtr_able */
12391 0, /* 04 sdtr_speed1 */
12392 0, /* 05 start_motor */
12393 0, /* 06 tagqng_able */
12394 0, /* 07 bios_scan */
12395 0, /* 08 scam_tolerant */
12396 1, /* 09 adapter_scsi_id */
12397 1, /* bios_boot_delay */
12398 1, /* 10 scsi_reset_delay */
12399 1, /* bios_id_lun */
12400 1, /* 11 termination_se */
12401 1, /* termination_lvd */
12402 0, /* 12 bios_ctrl */
12403 0, /* 13 sdtr_speed2 */
12404 0, /* 14 sdtr_speed3 */
12405 1, /* 15 max_host_qng */
12406 1, /* max_dvc_qng */
12407 0, /* 16 dvc_cntl */
12408 0, /* 17 sdtr_speed4 */
12409 0, /* 18 serial_number_word1 */
12410 0, /* 19 serial_number_word2 */
12411 0, /* 20 serial_number_word3 */
12412 0, /* 21 check_sum */
12413 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
12414 , /* 22-29 oem_name[16] */
12415 0, /* 30 dvc_err_code */
12416 0, /* 31 adv_err_code */
12417 0, /* 32 adv_err_addr */
12418 0, /* 33 saved_dvc_err_code */
12419 0, /* 34 saved_adv_err_code */
12420 0, /* 35 saved_adv_err_addr */
12421 0, /* 36 reserved */
12422 0, /* 37 reserved */
12423 0, /* 38 reserved */
12424 0, /* 39 reserved */
12425 0, /* 40 reserved */
12426 0, /* 41 reserved */
12427 0, /* 42 reserved */
12428 0, /* 43 reserved */
12429 0, /* 44 reserved */
12430 0, /* 45 reserved */
12431 0, /* 46 reserved */
12432 0, /* 47 reserved */
12433 0, /* 48 reserved */
12434 0, /* 49 reserved */
12435 0, /* 50 reserved */
12436 0, /* 51 reserved */
12437 0, /* 52 reserved */
12438 0, /* 53 reserved */
12439 0, /* 54 reserved */
12440 0, /* 55 reserved */
12441 0, /* 56 cisptr_lsw */
12442 0, /* 57 cisprt_msw */
12443 0, /* 58 subsysvid */
12444 0, /* 59 subsysid */
12445 0, /* 60 reserved */
12446 0, /* 61 reserved */
12447 0, /* 62 reserved */
12448 0 /* 63 reserved */
12451 static ADVEEP_38C1600_CONFIG Default_38C1600_EEPROM_Config __devinitdata = {
12452 ADV_EEPROM_BIOS_ENABLE, /* 00 cfg_lsw */
12453 0x0000, /* 01 cfg_msw */
12454 0xFFFF, /* 02 disc_enable */
12455 0xFFFF, /* 03 wdtr_able */
12456 0x5555, /* 04 sdtr_speed1 */
12457 0xFFFF, /* 05 start_motor */
12458 0xFFFF, /* 06 tagqng_able */
12459 0xFFFF, /* 07 bios_scan */
12460 0, /* 08 scam_tolerant */
12461 7, /* 09 adapter_scsi_id */
12462 0, /* bios_boot_delay */
12463 3, /* 10 scsi_reset_delay */
12464 0, /* bios_id_lun */
12465 0, /* 11 termination_se */
12466 0, /* termination_lvd */
12467 0xFFE7, /* 12 bios_ctrl */
12468 0x5555, /* 13 sdtr_speed2 */
12469 0x5555, /* 14 sdtr_speed3 */
12470 ASC_DEF_MAX_HOST_QNG, /* 15 max_host_qng */
12471 ASC_DEF_MAX_DVC_QNG, /* max_dvc_qng */
12472 0, /* 16 dvc_cntl */
12473 0x5555, /* 17 sdtr_speed4 */
12474 0, /* 18 serial_number_word1 */
12475 0, /* 19 serial_number_word2 */
12476 0, /* 20 serial_number_word3 */
12477 0, /* 21 check_sum */
12478 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
12479 , /* 22-29 oem_name[16] */
12480 0, /* 30 dvc_err_code */
12481 0, /* 31 adv_err_code */
12482 0, /* 32 adv_err_addr */
12483 0, /* 33 saved_dvc_err_code */
12484 0, /* 34 saved_adv_err_code */
12485 0, /* 35 saved_adv_err_addr */
12486 0, /* 36 reserved */
12487 0, /* 37 reserved */
12488 0, /* 38 reserved */
12489 0, /* 39 reserved */
12490 0, /* 40 reserved */
12491 0, /* 41 reserved */
12492 0, /* 42 reserved */
12493 0, /* 43 reserved */
12494 0, /* 44 reserved */
12495 0, /* 45 reserved */
12496 0, /* 46 reserved */
12497 0, /* 47 reserved */
12498 0, /* 48 reserved */
12499 0, /* 49 reserved */
12500 0, /* 50 reserved */
12501 0, /* 51 reserved */
12502 0, /* 52 reserved */
12503 0, /* 53 reserved */
12504 0, /* 54 reserved */
12505 0, /* 55 reserved */
12506 0, /* 56 cisptr_lsw */
12507 0, /* 57 cisprt_msw */
12508 PCI_VENDOR_ID_ASP, /* 58 subsysvid */
12509 PCI_DEVICE_ID_38C1600_REV1, /* 59 subsysid */
12510 0, /* 60 reserved */
12511 0, /* 61 reserved */
12512 0, /* 62 reserved */
12513 0 /* 63 reserved */
12516 static ADVEEP_38C1600_CONFIG ADVEEP_38C1600_Config_Field_IsChar __devinitdata = {
12517 0, /* 00 cfg_lsw */
12518 0, /* 01 cfg_msw */
12519 0, /* 02 disc_enable */
12520 0, /* 03 wdtr_able */
12521 0, /* 04 sdtr_speed1 */
12522 0, /* 05 start_motor */
12523 0, /* 06 tagqng_able */
12524 0, /* 07 bios_scan */
12525 0, /* 08 scam_tolerant */
12526 1, /* 09 adapter_scsi_id */
12527 1, /* bios_boot_delay */
12528 1, /* 10 scsi_reset_delay */
12529 1, /* bios_id_lun */
12530 1, /* 11 termination_se */
12531 1, /* termination_lvd */
12532 0, /* 12 bios_ctrl */
12533 0, /* 13 sdtr_speed2 */
12534 0, /* 14 sdtr_speed3 */
12535 1, /* 15 max_host_qng */
12536 1, /* max_dvc_qng */
12537 0, /* 16 dvc_cntl */
12538 0, /* 17 sdtr_speed4 */
12539 0, /* 18 serial_number_word1 */
12540 0, /* 19 serial_number_word2 */
12541 0, /* 20 serial_number_word3 */
12542 0, /* 21 check_sum */
12543 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
12544 , /* 22-29 oem_name[16] */
12545 0, /* 30 dvc_err_code */
12546 0, /* 31 adv_err_code */
12547 0, /* 32 adv_err_addr */
12548 0, /* 33 saved_dvc_err_code */
12549 0, /* 34 saved_adv_err_code */
12550 0, /* 35 saved_adv_err_addr */
12551 0, /* 36 reserved */
12552 0, /* 37 reserved */
12553 0, /* 38 reserved */
12554 0, /* 39 reserved */
12555 0, /* 40 reserved */
12556 0, /* 41 reserved */
12557 0, /* 42 reserved */
12558 0, /* 43 reserved */
12559 0, /* 44 reserved */
12560 0, /* 45 reserved */
12561 0, /* 46 reserved */
12562 0, /* 47 reserved */
12563 0, /* 48 reserved */
12564 0, /* 49 reserved */
12565 0, /* 50 reserved */
12566 0, /* 51 reserved */
12567 0, /* 52 reserved */
12568 0, /* 53 reserved */
12569 0, /* 54 reserved */
12570 0, /* 55 reserved */
12571 0, /* 56 cisptr_lsw */
12572 0, /* 57 cisprt_msw */
12573 0, /* 58 subsysvid */
12574 0, /* 59 subsysid */
12575 0, /* 60 reserved */
12576 0, /* 61 reserved */
12577 0, /* 62 reserved */
12578 0 /* 63 reserved */
12583 * Wait for EEPROM command to complete
12585 static void __devinit AdvWaitEEPCmd(AdvPortAddr iop_base)
12589 for (eep_delay_ms = 0; eep_delay_ms < ADV_EEP_DELAY_MS; eep_delay_ms++) {
12590 if (AdvReadWordRegister(iop_base, IOPW_EE_CMD) &
12591 ASC_EEP_CMD_DONE) {
12596 if ((AdvReadWordRegister(iop_base, IOPW_EE_CMD) & ASC_EEP_CMD_DONE) ==
12602 * Read the EEPROM from specified location
12604 static ushort __devinit AdvReadEEPWord(AdvPortAddr iop_base, int eep_word_addr)
12606 AdvWriteWordRegister(iop_base, IOPW_EE_CMD,
12607 ASC_EEP_CMD_READ | eep_word_addr);
12608 AdvWaitEEPCmd(iop_base);
12609 return AdvReadWordRegister(iop_base, IOPW_EE_DATA);
12613 * Write the EEPROM from 'cfg_buf'.
12616 AdvSet3550EEPConfig(AdvPortAddr iop_base, ADVEEP_3550_CONFIG *cfg_buf)
12619 ushort addr, chksum;
12620 ushort *charfields;
12622 wbuf = (ushort *)cfg_buf;
12623 charfields = (ushort *)&ADVEEP_3550_Config_Field_IsChar;
12626 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE);
12627 AdvWaitEEPCmd(iop_base);
12630 * Write EEPROM from word 0 to word 20.
12632 for (addr = ADV_EEP_DVC_CFG_BEGIN;
12633 addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) {
12636 if (*charfields++) {
12637 word = cpu_to_le16(*wbuf);
12641 chksum += *wbuf; /* Checksum is calculated from word values. */
12642 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word);
12643 AdvWriteWordRegister(iop_base, IOPW_EE_CMD,
12644 ASC_EEP_CMD_WRITE | addr);
12645 AdvWaitEEPCmd(iop_base);
12646 mdelay(ADV_EEP_DELAY_MS);
12650 * Write EEPROM checksum at word 21.
12652 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum);
12653 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr);
12654 AdvWaitEEPCmd(iop_base);
12659 * Write EEPROM OEM name at words 22 to 29.
12661 for (addr = ADV_EEP_DVC_CTL_BEGIN;
12662 addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) {
12665 if (*charfields++) {
12666 word = cpu_to_le16(*wbuf);
12670 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word);
12671 AdvWriteWordRegister(iop_base, IOPW_EE_CMD,
12672 ASC_EEP_CMD_WRITE | addr);
12673 AdvWaitEEPCmd(iop_base);
12675 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE);
12676 AdvWaitEEPCmd(iop_base);
12680 * Write the EEPROM from 'cfg_buf'.
12683 AdvSet38C0800EEPConfig(AdvPortAddr iop_base, ADVEEP_38C0800_CONFIG *cfg_buf)
12686 ushort *charfields;
12687 ushort addr, chksum;
12689 wbuf = (ushort *)cfg_buf;
12690 charfields = (ushort *)&ADVEEP_38C0800_Config_Field_IsChar;
12693 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE);
12694 AdvWaitEEPCmd(iop_base);
12697 * Write EEPROM from word 0 to word 20.
12699 for (addr = ADV_EEP_DVC_CFG_BEGIN;
12700 addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) {
12703 if (*charfields++) {
12704 word = cpu_to_le16(*wbuf);
12708 chksum += *wbuf; /* Checksum is calculated from word values. */
12709 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word);
12710 AdvWriteWordRegister(iop_base, IOPW_EE_CMD,
12711 ASC_EEP_CMD_WRITE | addr);
12712 AdvWaitEEPCmd(iop_base);
12713 mdelay(ADV_EEP_DELAY_MS);
12717 * Write EEPROM checksum at word 21.
12719 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum);
12720 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr);
12721 AdvWaitEEPCmd(iop_base);
12726 * Write EEPROM OEM name at words 22 to 29.
12728 for (addr = ADV_EEP_DVC_CTL_BEGIN;
12729 addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) {
12732 if (*charfields++) {
12733 word = cpu_to_le16(*wbuf);
12737 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word);
12738 AdvWriteWordRegister(iop_base, IOPW_EE_CMD,
12739 ASC_EEP_CMD_WRITE | addr);
12740 AdvWaitEEPCmd(iop_base);
12742 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE);
12743 AdvWaitEEPCmd(iop_base);
12747 * Write the EEPROM from 'cfg_buf'.
12750 AdvSet38C1600EEPConfig(AdvPortAddr iop_base, ADVEEP_38C1600_CONFIG *cfg_buf)
12753 ushort *charfields;
12754 ushort addr, chksum;
12756 wbuf = (ushort *)cfg_buf;
12757 charfields = (ushort *)&ADVEEP_38C1600_Config_Field_IsChar;
12760 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE);
12761 AdvWaitEEPCmd(iop_base);
12764 * Write EEPROM from word 0 to word 20.
12766 for (addr = ADV_EEP_DVC_CFG_BEGIN;
12767 addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) {
12770 if (*charfields++) {
12771 word = cpu_to_le16(*wbuf);
12775 chksum += *wbuf; /* Checksum is calculated from word values. */
12776 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word);
12777 AdvWriteWordRegister(iop_base, IOPW_EE_CMD,
12778 ASC_EEP_CMD_WRITE | addr);
12779 AdvWaitEEPCmd(iop_base);
12780 mdelay(ADV_EEP_DELAY_MS);
12784 * Write EEPROM checksum at word 21.
12786 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum);
12787 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr);
12788 AdvWaitEEPCmd(iop_base);
12793 * Write EEPROM OEM name at words 22 to 29.
12795 for (addr = ADV_EEP_DVC_CTL_BEGIN;
12796 addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) {
12799 if (*charfields++) {
12800 word = cpu_to_le16(*wbuf);
12804 AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word);
12805 AdvWriteWordRegister(iop_base, IOPW_EE_CMD,
12806 ASC_EEP_CMD_WRITE | addr);
12807 AdvWaitEEPCmd(iop_base);
12809 AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE);
12810 AdvWaitEEPCmd(iop_base);
12814 * Read EEPROM configuration into the specified buffer.
12816 * Return a checksum based on the EEPROM configuration read.
12818 static ushort __devinit
12819 AdvGet3550EEPConfig(AdvPortAddr iop_base, ADVEEP_3550_CONFIG *cfg_buf)
12821 ushort wval, chksum;
12824 ushort *charfields;
12826 charfields = (ushort *)&ADVEEP_3550_Config_Field_IsChar;
12827 wbuf = (ushort *)cfg_buf;
12830 for (eep_addr = ADV_EEP_DVC_CFG_BEGIN;
12831 eep_addr < ADV_EEP_DVC_CFG_END; eep_addr++, wbuf++) {
12832 wval = AdvReadEEPWord(iop_base, eep_addr);
12833 chksum += wval; /* Checksum is calculated from word values. */
12834 if (*charfields++) {
12835 *wbuf = le16_to_cpu(wval);
12840 /* Read checksum word. */
12841 *wbuf = AdvReadEEPWord(iop_base, eep_addr);
12845 /* Read rest of EEPROM not covered by the checksum. */
12846 for (eep_addr = ADV_EEP_DVC_CTL_BEGIN;
12847 eep_addr < ADV_EEP_MAX_WORD_ADDR; eep_addr++, wbuf++) {
12848 *wbuf = AdvReadEEPWord(iop_base, eep_addr);
12849 if (*charfields++) {
12850 *wbuf = le16_to_cpu(*wbuf);
12857 * Read EEPROM configuration into the specified buffer.
12859 * Return a checksum based on the EEPROM configuration read.
12861 static ushort __devinit
12862 AdvGet38C0800EEPConfig(AdvPortAddr iop_base, ADVEEP_38C0800_CONFIG *cfg_buf)
12864 ushort wval, chksum;
12867 ushort *charfields;
12869 charfields = (ushort *)&ADVEEP_38C0800_Config_Field_IsChar;
12870 wbuf = (ushort *)cfg_buf;
12873 for (eep_addr = ADV_EEP_DVC_CFG_BEGIN;
12874 eep_addr < ADV_EEP_DVC_CFG_END; eep_addr++, wbuf++) {
12875 wval = AdvReadEEPWord(iop_base, eep_addr);
12876 chksum += wval; /* Checksum is calculated from word values. */
12877 if (*charfields++) {
12878 *wbuf = le16_to_cpu(wval);
12883 /* Read checksum word. */
12884 *wbuf = AdvReadEEPWord(iop_base, eep_addr);
12888 /* Read rest of EEPROM not covered by the checksum. */
12889 for (eep_addr = ADV_EEP_DVC_CTL_BEGIN;
12890 eep_addr < ADV_EEP_MAX_WORD_ADDR; eep_addr++, wbuf++) {
12891 *wbuf = AdvReadEEPWord(iop_base, eep_addr);
12892 if (*charfields++) {
12893 *wbuf = le16_to_cpu(*wbuf);
12900 * Read EEPROM configuration into the specified buffer.
12902 * Return a checksum based on the EEPROM configuration read.
12904 static ushort __devinit
12905 AdvGet38C1600EEPConfig(AdvPortAddr iop_base, ADVEEP_38C1600_CONFIG *cfg_buf)
12907 ushort wval, chksum;
12910 ushort *charfields;
12912 charfields = (ushort *)&ADVEEP_38C1600_Config_Field_IsChar;
12913 wbuf = (ushort *)cfg_buf;
12916 for (eep_addr = ADV_EEP_DVC_CFG_BEGIN;
12917 eep_addr < ADV_EEP_DVC_CFG_END; eep_addr++, wbuf++) {
12918 wval = AdvReadEEPWord(iop_base, eep_addr);
12919 chksum += wval; /* Checksum is calculated from word values. */
12920 if (*charfields++) {
12921 *wbuf = le16_to_cpu(wval);
12926 /* Read checksum word. */
12927 *wbuf = AdvReadEEPWord(iop_base, eep_addr);
12931 /* Read rest of EEPROM not covered by the checksum. */
12932 for (eep_addr = ADV_EEP_DVC_CTL_BEGIN;
12933 eep_addr < ADV_EEP_MAX_WORD_ADDR; eep_addr++, wbuf++) {
12934 *wbuf = AdvReadEEPWord(iop_base, eep_addr);
12935 if (*charfields++) {
12936 *wbuf = le16_to_cpu(*wbuf);
12943 * Read the board's EEPROM configuration. Set fields in ADV_DVC_VAR and
12944 * ADV_DVC_CFG based on the EEPROM settings. The chip is stopped while
12945 * all of this is done.
12947 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
12949 * For a non-fatal error return a warning code. If there are no warnings
12950 * then 0 is returned.
12952 * Note: Chip is stopped on entry.
12954 static int __devinit AdvInitFrom3550EEP(ADV_DVC_VAR *asc_dvc)
12956 AdvPortAddr iop_base;
12958 ADVEEP_3550_CONFIG eep_config;
12960 iop_base = asc_dvc->iop_base;
12965 * Read the board's EEPROM configuration.
12967 * Set default values if a bad checksum is found.
12969 if (AdvGet3550EEPConfig(iop_base, &eep_config) != eep_config.check_sum) {
12970 warn_code |= ASC_WARN_EEPROM_CHKSUM;
12973 * Set EEPROM default values.
12975 memcpy(&eep_config, &Default_3550_EEPROM_Config,
12976 sizeof(ADVEEP_3550_CONFIG));
12979 * Assume the 6 byte board serial number that was read from
12980 * EEPROM is correct even if the EEPROM checksum failed.
12982 eep_config.serial_number_word3 =
12983 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1);
12985 eep_config.serial_number_word2 =
12986 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 2);
12988 eep_config.serial_number_word1 =
12989 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 3);
12991 AdvSet3550EEPConfig(iop_base, &eep_config);
12994 * Set ASC_DVC_VAR and ASC_DVC_CFG variables from the
12995 * EEPROM configuration that was read.
12997 * This is the mapping of EEPROM fields to Adv Library fields.
12999 asc_dvc->wdtr_able = eep_config.wdtr_able;
13000 asc_dvc->sdtr_able = eep_config.sdtr_able;
13001 asc_dvc->ultra_able = eep_config.ultra_able;
13002 asc_dvc->tagqng_able = eep_config.tagqng_able;
13003 asc_dvc->cfg->disc_enable = eep_config.disc_enable;
13004 asc_dvc->max_host_qng = eep_config.max_host_qng;
13005 asc_dvc->max_dvc_qng = eep_config.max_dvc_qng;
13006 asc_dvc->chip_scsi_id = (eep_config.adapter_scsi_id & ADV_MAX_TID);
13007 asc_dvc->start_motor = eep_config.start_motor;
13008 asc_dvc->scsi_reset_wait = eep_config.scsi_reset_delay;
13009 asc_dvc->bios_ctrl = eep_config.bios_ctrl;
13010 asc_dvc->no_scam = eep_config.scam_tolerant;
13011 asc_dvc->cfg->serial1 = eep_config.serial_number_word1;
13012 asc_dvc->cfg->serial2 = eep_config.serial_number_word2;
13013 asc_dvc->cfg->serial3 = eep_config.serial_number_word3;
13016 * Set the host maximum queuing (max. 253, min. 16) and the per device
13017 * maximum queuing (max. 63, min. 4).
13019 if (eep_config.max_host_qng > ASC_DEF_MAX_HOST_QNG) {
13020 eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG;
13021 } else if (eep_config.max_host_qng < ASC_DEF_MIN_HOST_QNG) {
13022 /* If the value is zero, assume it is uninitialized. */
13023 if (eep_config.max_host_qng == 0) {
13024 eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG;
13026 eep_config.max_host_qng = ASC_DEF_MIN_HOST_QNG;
13030 if (eep_config.max_dvc_qng > ASC_DEF_MAX_DVC_QNG) {
13031 eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG;
13032 } else if (eep_config.max_dvc_qng < ASC_DEF_MIN_DVC_QNG) {
13033 /* If the value is zero, assume it is uninitialized. */
13034 if (eep_config.max_dvc_qng == 0) {
13035 eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG;
13037 eep_config.max_dvc_qng = ASC_DEF_MIN_DVC_QNG;
13042 * If 'max_dvc_qng' is greater than 'max_host_qng', then
13043 * set 'max_dvc_qng' to 'max_host_qng'.
13045 if (eep_config.max_dvc_qng > eep_config.max_host_qng) {
13046 eep_config.max_dvc_qng = eep_config.max_host_qng;
13050 * Set ADV_DVC_VAR 'max_host_qng' and ADV_DVC_VAR 'max_dvc_qng'
13051 * values based on possibly adjusted EEPROM values.
13053 asc_dvc->max_host_qng = eep_config.max_host_qng;
13054 asc_dvc->max_dvc_qng = eep_config.max_dvc_qng;
13057 * If the EEPROM 'termination' field is set to automatic (0), then set
13058 * the ADV_DVC_CFG 'termination' field to automatic also.
13060 * If the termination is specified with a non-zero 'termination'
13061 * value check that a legal value is set and set the ADV_DVC_CFG
13062 * 'termination' field appropriately.
13064 if (eep_config.termination == 0) {
13065 asc_dvc->cfg->termination = 0; /* auto termination */
13067 /* Enable manual control with low off / high off. */
13068 if (eep_config.termination == 1) {
13069 asc_dvc->cfg->termination = TERM_CTL_SEL;
13071 /* Enable manual control with low off / high on. */
13072 } else if (eep_config.termination == 2) {
13073 asc_dvc->cfg->termination = TERM_CTL_SEL | TERM_CTL_H;
13075 /* Enable manual control with low on / high on. */
13076 } else if (eep_config.termination == 3) {
13077 asc_dvc->cfg->termination =
13078 TERM_CTL_SEL | TERM_CTL_H | TERM_CTL_L;
13081 * The EEPROM 'termination' field contains a bad value. Use
13082 * automatic termination instead.
13084 asc_dvc->cfg->termination = 0;
13085 warn_code |= ASC_WARN_EEPROM_TERMINATION;
13093 * Read the board's EEPROM configuration. Set fields in ADV_DVC_VAR and
13094 * ADV_DVC_CFG based on the EEPROM settings. The chip is stopped while
13095 * all of this is done.
13097 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
13099 * For a non-fatal error return a warning code. If there are no warnings
13100 * then 0 is returned.
13102 * Note: Chip is stopped on entry.
13104 static int __devinit AdvInitFrom38C0800EEP(ADV_DVC_VAR *asc_dvc)
13106 AdvPortAddr iop_base;
13108 ADVEEP_38C0800_CONFIG eep_config;
13109 uchar tid, termination;
13110 ushort sdtr_speed = 0;
13112 iop_base = asc_dvc->iop_base;
13117 * Read the board's EEPROM configuration.
13119 * Set default values if a bad checksum is found.
13121 if (AdvGet38C0800EEPConfig(iop_base, &eep_config) !=
13122 eep_config.check_sum) {
13123 warn_code |= ASC_WARN_EEPROM_CHKSUM;
13126 * Set EEPROM default values.
13128 memcpy(&eep_config, &Default_38C0800_EEPROM_Config,
13129 sizeof(ADVEEP_38C0800_CONFIG));
13132 * Assume the 6 byte board serial number that was read from
13133 * EEPROM is correct even if the EEPROM checksum failed.
13135 eep_config.serial_number_word3 =
13136 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1);
13138 eep_config.serial_number_word2 =
13139 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 2);
13141 eep_config.serial_number_word1 =
13142 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 3);
13144 AdvSet38C0800EEPConfig(iop_base, &eep_config);
13147 * Set ADV_DVC_VAR and ADV_DVC_CFG variables from the
13148 * EEPROM configuration that was read.
13150 * This is the mapping of EEPROM fields to Adv Library fields.
13152 asc_dvc->wdtr_able = eep_config.wdtr_able;
13153 asc_dvc->sdtr_speed1 = eep_config.sdtr_speed1;
13154 asc_dvc->sdtr_speed2 = eep_config.sdtr_speed2;
13155 asc_dvc->sdtr_speed3 = eep_config.sdtr_speed3;
13156 asc_dvc->sdtr_speed4 = eep_config.sdtr_speed4;
13157 asc_dvc->tagqng_able = eep_config.tagqng_able;
13158 asc_dvc->cfg->disc_enable = eep_config.disc_enable;
13159 asc_dvc->max_host_qng = eep_config.max_host_qng;
13160 asc_dvc->max_dvc_qng = eep_config.max_dvc_qng;
13161 asc_dvc->chip_scsi_id = (eep_config.adapter_scsi_id & ADV_MAX_TID);
13162 asc_dvc->start_motor = eep_config.start_motor;
13163 asc_dvc->scsi_reset_wait = eep_config.scsi_reset_delay;
13164 asc_dvc->bios_ctrl = eep_config.bios_ctrl;
13165 asc_dvc->no_scam = eep_config.scam_tolerant;
13166 asc_dvc->cfg->serial1 = eep_config.serial_number_word1;
13167 asc_dvc->cfg->serial2 = eep_config.serial_number_word2;
13168 asc_dvc->cfg->serial3 = eep_config.serial_number_word3;
13171 * For every Target ID if any of its 'sdtr_speed[1234]' bits
13172 * are set, then set an 'sdtr_able' bit for it.
13174 asc_dvc->sdtr_able = 0;
13175 for (tid = 0; tid <= ADV_MAX_TID; tid++) {
13177 sdtr_speed = asc_dvc->sdtr_speed1;
13178 } else if (tid == 4) {
13179 sdtr_speed = asc_dvc->sdtr_speed2;
13180 } else if (tid == 8) {
13181 sdtr_speed = asc_dvc->sdtr_speed3;
13182 } else if (tid == 12) {
13183 sdtr_speed = asc_dvc->sdtr_speed4;
13185 if (sdtr_speed & ADV_MAX_TID) {
13186 asc_dvc->sdtr_able |= (1 << tid);
13192 * Set the host maximum queuing (max. 253, min. 16) and the per device
13193 * maximum queuing (max. 63, min. 4).
13195 if (eep_config.max_host_qng > ASC_DEF_MAX_HOST_QNG) {
13196 eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG;
13197 } else if (eep_config.max_host_qng < ASC_DEF_MIN_HOST_QNG) {
13198 /* If the value is zero, assume it is uninitialized. */
13199 if (eep_config.max_host_qng == 0) {
13200 eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG;
13202 eep_config.max_host_qng = ASC_DEF_MIN_HOST_QNG;
13206 if (eep_config.max_dvc_qng > ASC_DEF_MAX_DVC_QNG) {
13207 eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG;
13208 } else if (eep_config.max_dvc_qng < ASC_DEF_MIN_DVC_QNG) {
13209 /* If the value is zero, assume it is uninitialized. */
13210 if (eep_config.max_dvc_qng == 0) {
13211 eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG;
13213 eep_config.max_dvc_qng = ASC_DEF_MIN_DVC_QNG;
13218 * If 'max_dvc_qng' is greater than 'max_host_qng', then
13219 * set 'max_dvc_qng' to 'max_host_qng'.
13221 if (eep_config.max_dvc_qng > eep_config.max_host_qng) {
13222 eep_config.max_dvc_qng = eep_config.max_host_qng;
13226 * Set ADV_DVC_VAR 'max_host_qng' and ADV_DVC_VAR 'max_dvc_qng'
13227 * values based on possibly adjusted EEPROM values.
13229 asc_dvc->max_host_qng = eep_config.max_host_qng;
13230 asc_dvc->max_dvc_qng = eep_config.max_dvc_qng;
13233 * If the EEPROM 'termination' field is set to automatic (0), then set
13234 * the ADV_DVC_CFG 'termination' field to automatic also.
13236 * If the termination is specified with a non-zero 'termination'
13237 * value check that a legal value is set and set the ADV_DVC_CFG
13238 * 'termination' field appropriately.
13240 if (eep_config.termination_se == 0) {
13241 termination = 0; /* auto termination for SE */
13243 /* Enable manual control with low off / high off. */
13244 if (eep_config.termination_se == 1) {
13247 /* Enable manual control with low off / high on. */
13248 } else if (eep_config.termination_se == 2) {
13249 termination = TERM_SE_HI;
13251 /* Enable manual control with low on / high on. */
13252 } else if (eep_config.termination_se == 3) {
13253 termination = TERM_SE;
13256 * The EEPROM 'termination_se' field contains a bad value.
13257 * Use automatic termination instead.
13260 warn_code |= ASC_WARN_EEPROM_TERMINATION;
13264 if (eep_config.termination_lvd == 0) {
13265 asc_dvc->cfg->termination = termination; /* auto termination for LVD */
13267 /* Enable manual control with low off / high off. */
13268 if (eep_config.termination_lvd == 1) {
13269 asc_dvc->cfg->termination = termination;
13271 /* Enable manual control with low off / high on. */
13272 } else if (eep_config.termination_lvd == 2) {
13273 asc_dvc->cfg->termination = termination | TERM_LVD_HI;
13275 /* Enable manual control with low on / high on. */
13276 } else if (eep_config.termination_lvd == 3) {
13277 asc_dvc->cfg->termination = termination | TERM_LVD;
13280 * The EEPROM 'termination_lvd' field contains a bad value.
13281 * Use automatic termination instead.
13283 asc_dvc->cfg->termination = termination;
13284 warn_code |= ASC_WARN_EEPROM_TERMINATION;
13292 * Read the board's EEPROM configuration. Set fields in ASC_DVC_VAR and
13293 * ASC_DVC_CFG based on the EEPROM settings. The chip is stopped while
13294 * all of this is done.
13296 * On failure set the ASC_DVC_VAR field 'err_code' and return ADV_ERROR.
13298 * For a non-fatal error return a warning code. If there are no warnings
13299 * then 0 is returned.
13301 * Note: Chip is stopped on entry.
13303 static int __devinit AdvInitFrom38C1600EEP(ADV_DVC_VAR *asc_dvc)
13305 AdvPortAddr iop_base;
13307 ADVEEP_38C1600_CONFIG eep_config;
13308 uchar tid, termination;
13309 ushort sdtr_speed = 0;
13311 iop_base = asc_dvc->iop_base;
13316 * Read the board's EEPROM configuration.
13318 * Set default values if a bad checksum is found.
13320 if (AdvGet38C1600EEPConfig(iop_base, &eep_config) !=
13321 eep_config.check_sum) {
13322 struct pci_dev *pdev = adv_dvc_to_pdev(asc_dvc);
13323 warn_code |= ASC_WARN_EEPROM_CHKSUM;
13326 * Set EEPROM default values.
13328 memcpy(&eep_config, &Default_38C1600_EEPROM_Config,
13329 sizeof(ADVEEP_38C1600_CONFIG));
13331 if (PCI_FUNC(pdev->devfn) != 0) {
13334 * Disable Bit 14 (BIOS_ENABLE) to fix SPARC Ultra 60
13335 * and old Mac system booting problem. The Expansion
13336 * ROM must be disabled in Function 1 for these systems
13338 eep_config.cfg_lsw &= ~ADV_EEPROM_BIOS_ENABLE;
13340 * Clear the INTAB (bit 11) if the GPIO 0 input
13341 * indicates the Function 1 interrupt line is wired
13344 * Set/Clear Bit 11 (INTAB) from the GPIO bit 0 input:
13345 * 1 - Function 1 interrupt line wired to INT A.
13346 * 0 - Function 1 interrupt line wired to INT B.
13348 * Note: Function 0 is always wired to INTA.
13349 * Put all 5 GPIO bits in input mode and then read
13350 * their input values.
13352 AdvWriteByteRegister(iop_base, IOPB_GPIO_CNTL, 0);
13353 ints = AdvReadByteRegister(iop_base, IOPB_GPIO_DATA);
13354 if ((ints & 0x01) == 0)
13355 eep_config.cfg_lsw &= ~ADV_EEPROM_INTAB;
13359 * Assume the 6 byte board serial number that was read from
13360 * EEPROM is correct even if the EEPROM checksum failed.
13362 eep_config.serial_number_word3 =
13363 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1);
13364 eep_config.serial_number_word2 =
13365 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 2);
13366 eep_config.serial_number_word1 =
13367 AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 3);
13369 AdvSet38C1600EEPConfig(iop_base, &eep_config);
13373 * Set ASC_DVC_VAR and ASC_DVC_CFG variables from the
13374 * EEPROM configuration that was read.
13376 * This is the mapping of EEPROM fields to Adv Library fields.
13378 asc_dvc->wdtr_able = eep_config.wdtr_able;
13379 asc_dvc->sdtr_speed1 = eep_config.sdtr_speed1;
13380 asc_dvc->sdtr_speed2 = eep_config.sdtr_speed2;
13381 asc_dvc->sdtr_speed3 = eep_config.sdtr_speed3;
13382 asc_dvc->sdtr_speed4 = eep_config.sdtr_speed4;
13383 asc_dvc->ppr_able = 0;
13384 asc_dvc->tagqng_able = eep_config.tagqng_able;
13385 asc_dvc->cfg->disc_enable = eep_config.disc_enable;
13386 asc_dvc->max_host_qng = eep_config.max_host_qng;
13387 asc_dvc->max_dvc_qng = eep_config.max_dvc_qng;
13388 asc_dvc->chip_scsi_id = (eep_config.adapter_scsi_id & ASC_MAX_TID);
13389 asc_dvc->start_motor = eep_config.start_motor;
13390 asc_dvc->scsi_reset_wait = eep_config.scsi_reset_delay;
13391 asc_dvc->bios_ctrl = eep_config.bios_ctrl;
13392 asc_dvc->no_scam = eep_config.scam_tolerant;
13395 * For every Target ID if any of its 'sdtr_speed[1234]' bits
13396 * are set, then set an 'sdtr_able' bit for it.
13398 asc_dvc->sdtr_able = 0;
13399 for (tid = 0; tid <= ASC_MAX_TID; tid++) {
13401 sdtr_speed = asc_dvc->sdtr_speed1;
13402 } else if (tid == 4) {
13403 sdtr_speed = asc_dvc->sdtr_speed2;
13404 } else if (tid == 8) {
13405 sdtr_speed = asc_dvc->sdtr_speed3;
13406 } else if (tid == 12) {
13407 sdtr_speed = asc_dvc->sdtr_speed4;
13409 if (sdtr_speed & ASC_MAX_TID) {
13410 asc_dvc->sdtr_able |= (1 << tid);
13416 * Set the host maximum queuing (max. 253, min. 16) and the per device
13417 * maximum queuing (max. 63, min. 4).
13419 if (eep_config.max_host_qng > ASC_DEF_MAX_HOST_QNG) {
13420 eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG;
13421 } else if (eep_config.max_host_qng < ASC_DEF_MIN_HOST_QNG) {
13422 /* If the value is zero, assume it is uninitialized. */
13423 if (eep_config.max_host_qng == 0) {
13424 eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG;
13426 eep_config.max_host_qng = ASC_DEF_MIN_HOST_QNG;
13430 if (eep_config.max_dvc_qng > ASC_DEF_MAX_DVC_QNG) {
13431 eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG;
13432 } else if (eep_config.max_dvc_qng < ASC_DEF_MIN_DVC_QNG) {
13433 /* If the value is zero, assume it is uninitialized. */
13434 if (eep_config.max_dvc_qng == 0) {
13435 eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG;
13437 eep_config.max_dvc_qng = ASC_DEF_MIN_DVC_QNG;
13442 * If 'max_dvc_qng' is greater than 'max_host_qng', then
13443 * set 'max_dvc_qng' to 'max_host_qng'.
13445 if (eep_config.max_dvc_qng > eep_config.max_host_qng) {
13446 eep_config.max_dvc_qng = eep_config.max_host_qng;
13450 * Set ASC_DVC_VAR 'max_host_qng' and ASC_DVC_VAR 'max_dvc_qng'
13451 * values based on possibly adjusted EEPROM values.
13453 asc_dvc->max_host_qng = eep_config.max_host_qng;
13454 asc_dvc->max_dvc_qng = eep_config.max_dvc_qng;
13457 * If the EEPROM 'termination' field is set to automatic (0), then set
13458 * the ASC_DVC_CFG 'termination' field to automatic also.
13460 * If the termination is specified with a non-zero 'termination'
13461 * value check that a legal value is set and set the ASC_DVC_CFG
13462 * 'termination' field appropriately.
13464 if (eep_config.termination_se == 0) {
13465 termination = 0; /* auto termination for SE */
13467 /* Enable manual control with low off / high off. */
13468 if (eep_config.termination_se == 1) {
13471 /* Enable manual control with low off / high on. */
13472 } else if (eep_config.termination_se == 2) {
13473 termination = TERM_SE_HI;
13475 /* Enable manual control with low on / high on. */
13476 } else if (eep_config.termination_se == 3) {
13477 termination = TERM_SE;
13480 * The EEPROM 'termination_se' field contains a bad value.
13481 * Use automatic termination instead.
13484 warn_code |= ASC_WARN_EEPROM_TERMINATION;
13488 if (eep_config.termination_lvd == 0) {
13489 asc_dvc->cfg->termination = termination; /* auto termination for LVD */
13491 /* Enable manual control with low off / high off. */
13492 if (eep_config.termination_lvd == 1) {
13493 asc_dvc->cfg->termination = termination;
13495 /* Enable manual control with low off / high on. */
13496 } else if (eep_config.termination_lvd == 2) {
13497 asc_dvc->cfg->termination = termination | TERM_LVD_HI;
13499 /* Enable manual control with low on / high on. */
13500 } else if (eep_config.termination_lvd == 3) {
13501 asc_dvc->cfg->termination = termination | TERM_LVD;
13504 * The EEPROM 'termination_lvd' field contains a bad value.
13505 * Use automatic termination instead.
13507 asc_dvc->cfg->termination = termination;
13508 warn_code |= ASC_WARN_EEPROM_TERMINATION;
13516 * Initialize the ADV_DVC_VAR structure.
13518 * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
13520 * For a non-fatal error return a warning code. If there are no warnings
13521 * then 0 is returned.
13523 static int __devinit
13524 AdvInitGetConfig(struct pci_dev *pdev, struct asc_board *boardp)
13526 ADV_DVC_VAR *asc_dvc = &boardp->dvc_var.adv_dvc_var;
13527 unsigned short warn_code = 0;
13528 AdvPortAddr iop_base = asc_dvc->iop_base;
13532 asc_dvc->err_code = 0;
13535 * Save the state of the PCI Configuration Command Register
13536 * "Parity Error Response Control" Bit. If the bit is clear (0),
13537 * in AdvInitAsc3550/38C0800Driver() tell the microcode to ignore
13538 * DMA parity errors.
13540 asc_dvc->cfg->control_flag = 0;
13541 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
13542 if ((cmd & PCI_COMMAND_PARITY) == 0)
13543 asc_dvc->cfg->control_flag |= CONTROL_FLAG_IGNORE_PERR;
13545 asc_dvc->cfg->lib_version = (ADV_LIB_VERSION_MAJOR << 8) |
13546 ADV_LIB_VERSION_MINOR;
13547 asc_dvc->cfg->chip_version =
13548 AdvGetChipVersion(iop_base, asc_dvc->bus_type);
13550 ASC_DBG2(1, "AdvInitGetConfig: iopb_chip_id_1: 0x%x 0x%x\n",
13551 (ushort)AdvReadByteRegister(iop_base, IOPB_CHIP_ID_1),
13552 (ushort)ADV_CHIP_ID_BYTE);
13554 ASC_DBG2(1, "AdvInitGetConfig: iopw_chip_id_0: 0x%x 0x%x\n",
13555 (ushort)AdvReadWordRegister(iop_base, IOPW_CHIP_ID_0),
13556 (ushort)ADV_CHIP_ID_WORD);
13559 * Reset the chip to start and allow register writes.
13561 if (AdvFindSignature(iop_base) == 0) {
13562 asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE;
13566 * The caller must set 'chip_type' to a valid setting.
13568 if (asc_dvc->chip_type != ADV_CHIP_ASC3550 &&
13569 asc_dvc->chip_type != ADV_CHIP_ASC38C0800 &&
13570 asc_dvc->chip_type != ADV_CHIP_ASC38C1600) {
13571 asc_dvc->err_code |= ASC_IERR_BAD_CHIPTYPE;
13578 AdvWriteWordRegister(iop_base, IOPW_CTRL_REG,
13579 ADV_CTRL_REG_CMD_RESET);
13581 AdvWriteWordRegister(iop_base, IOPW_CTRL_REG,
13582 ADV_CTRL_REG_CMD_WR_IO_REG);
13584 if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) {
13585 status = AdvInitFrom38C1600EEP(asc_dvc);
13586 } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800) {
13587 status = AdvInitFrom38C0800EEP(asc_dvc);
13589 status = AdvInitFrom3550EEP(asc_dvc);
13591 warn_code |= status;
13594 if (warn_code != 0) {
13595 ASC_PRINT2("AdvInitGetConfig: board %d: warning: 0x%x\n",
13596 boardp->id, warn_code);
13599 if (asc_dvc->err_code) {
13600 ASC_PRINT2("AdvInitGetConfig: board %d error: err_code 0x%x\n",
13601 boardp->id, asc_dvc->err_code);
13604 return asc_dvc->err_code;
13608 static struct scsi_host_template advansys_template = {
13609 .proc_name = DRV_NAME,
13610 #ifdef CONFIG_PROC_FS
13611 .proc_info = advansys_proc_info,
13614 .info = advansys_info,
13615 .queuecommand = advansys_queuecommand,
13616 .eh_bus_reset_handler = advansys_reset,
13617 .bios_param = advansys_biosparam,
13618 .slave_configure = advansys_slave_configure,
13620 * Because the driver may control an ISA adapter 'unchecked_isa_dma'
13621 * must be set. The flag will be cleared in advansys_board_found
13622 * for non-ISA adapters.
13624 .unchecked_isa_dma = 1,
13626 * All adapters controlled by this driver are capable of large
13627 * scatter-gather lists. According to the mid-level SCSI documentation
13628 * this obviates any performance gain provided by setting
13629 * 'use_clustering'. But empirically while CPU utilization is increased
13630 * by enabling clustering, I/O throughput increases as well.
13632 .use_clustering = ENABLE_CLUSTERING,
13635 static int __devinit
13636 advansys_wide_init_chip(struct asc_board *boardp, ADV_DVC_VAR *adv_dvc_varp)
13639 adv_req_t *reqp = NULL;
13642 int warn_code, err_code;
13645 * Allocate buffer carrier structures. The total size
13646 * is about 4 KB, so allocate all at once.
13648 boardp->carrp = kmalloc(ADV_CARRIER_BUFSIZE, GFP_KERNEL);
13649 ASC_DBG1(1, "advansys_wide_init_chip: carrp 0x%p\n", boardp->carrp);
13651 if (!boardp->carrp)
13652 goto kmalloc_failed;
13655 * Allocate up to 'max_host_qng' request structures for the Wide
13656 * board. The total size is about 16 KB, so allocate all at once.
13657 * If the allocation fails decrement and try again.
13659 for (req_cnt = adv_dvc_varp->max_host_qng; req_cnt > 0; req_cnt--) {
13660 reqp = kmalloc(sizeof(adv_req_t) * req_cnt, GFP_KERNEL);
13662 ASC_DBG3(1, "advansys_wide_init_chip: reqp 0x%p, req_cnt %d, "
13663 "bytes %lu\n", reqp, req_cnt,
13664 (ulong)sizeof(adv_req_t) * req_cnt);
13671 goto kmalloc_failed;
13673 boardp->orig_reqp = reqp;
13676 * Allocate up to ADV_TOT_SG_BLOCK request structures for
13677 * the Wide board. Each structure is about 136 bytes.
13679 boardp->adv_sgblkp = NULL;
13680 for (sg_cnt = 0; sg_cnt < ADV_TOT_SG_BLOCK; sg_cnt++) {
13681 sgp = kmalloc(sizeof(adv_sgblk_t), GFP_KERNEL);
13686 sgp->next_sgblkp = boardp->adv_sgblkp;
13687 boardp->adv_sgblkp = sgp;
13691 ASC_DBG3(1, "advansys_wide_init_chip: sg_cnt %d * %u = %u bytes\n",
13692 sg_cnt, sizeof(adv_sgblk_t),
13693 (unsigned)(sizeof(adv_sgblk_t) * sg_cnt));
13695 if (!boardp->adv_sgblkp)
13696 goto kmalloc_failed;
13698 adv_dvc_varp->carrier_buf = boardp->carrp;
13701 * Point 'adv_reqp' to the request structures and
13702 * link them together.
13705 reqp[req_cnt].next_reqp = NULL;
13706 for (; req_cnt > 0; req_cnt--) {
13707 reqp[req_cnt - 1].next_reqp = &reqp[req_cnt];
13709 boardp->adv_reqp = &reqp[0];
13711 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
13712 ASC_DBG(2, "advansys_wide_init_chip: AdvInitAsc3550Driver()\n");
13713 warn_code = AdvInitAsc3550Driver(adv_dvc_varp);
13714 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
13715 ASC_DBG(2, "advansys_wide_init_chip: AdvInitAsc38C0800Driver()"
13717 warn_code = AdvInitAsc38C0800Driver(adv_dvc_varp);
13719 ASC_DBG(2, "advansys_wide_init_chip: AdvInitAsc38C1600Driver()"
13721 warn_code = AdvInitAsc38C1600Driver(adv_dvc_varp);
13723 err_code = adv_dvc_varp->err_code;
13725 if (warn_code || err_code) {
13726 ASC_PRINT3("advansys_wide_init_chip: board %d error: warn 0x%x,"
13727 " error 0x%x\n", boardp->id, warn_code, err_code);
13733 ASC_PRINT1("advansys_wide_init_chip: board %d error: kmalloc() "
13734 "failed\n", boardp->id);
13735 err_code = ADV_ERROR;
13740 static void advansys_wide_free_mem(struct asc_board *boardp)
13742 kfree(boardp->carrp);
13743 boardp->carrp = NULL;
13744 kfree(boardp->orig_reqp);
13745 boardp->orig_reqp = boardp->adv_reqp = NULL;
13746 while (boardp->adv_sgblkp) {
13747 adv_sgblk_t *sgp = boardp->adv_sgblkp;
13748 boardp->adv_sgblkp = sgp->next_sgblkp;
13753 static int __devinit advansys_board_found(struct Scsi_Host *shost,
13754 unsigned int iop, int bus_type)
13756 struct pci_dev *pdev;
13757 struct asc_board *boardp = shost_priv(shost);
13758 ASC_DVC_VAR *asc_dvc_varp = NULL;
13759 ADV_DVC_VAR *adv_dvc_varp = NULL;
13760 int share_irq, warn_code, ret;
13762 boardp->id = asc_board_count++;
13763 spin_lock_init(&boardp->lock);
13764 pdev = (bus_type == ASC_IS_PCI) ? to_pci_dev(boardp->dev) : NULL;
13766 if (ASC_NARROW_BOARD(boardp)) {
13767 ASC_DBG(1, "advansys_board_found: narrow board\n");
13768 asc_dvc_varp = &boardp->dvc_var.asc_dvc_var;
13769 asc_dvc_varp->bus_type = bus_type;
13770 asc_dvc_varp->drv_ptr = boardp;
13771 asc_dvc_varp->cfg = &boardp->dvc_cfg.asc_dvc_cfg;
13772 asc_dvc_varp->cfg->overrun_buf = &overrun_buf[0];
13773 asc_dvc_varp->iop_base = iop;
13776 ASC_DBG(1, "advansys_board_found: wide board\n");
13777 adv_dvc_varp = &boardp->dvc_var.adv_dvc_var;
13778 adv_dvc_varp->drv_ptr = boardp;
13779 adv_dvc_varp->cfg = &boardp->dvc_cfg.adv_dvc_cfg;
13780 if (pdev->device == PCI_DEVICE_ID_ASP_ABP940UW) {
13781 ASC_DBG(1, "advansys_board_found: ASC-3550\n");
13782 adv_dvc_varp->chip_type = ADV_CHIP_ASC3550;
13783 } else if (pdev->device == PCI_DEVICE_ID_38C0800_REV1) {
13784 ASC_DBG(1, "advansys_board_found: ASC-38C0800\n");
13785 adv_dvc_varp->chip_type = ADV_CHIP_ASC38C0800;
13787 ASC_DBG(1, "advansys_board_found: ASC-38C1600\n");
13788 adv_dvc_varp->chip_type = ADV_CHIP_ASC38C1600;
13791 boardp->asc_n_io_port = pci_resource_len(pdev, 1);
13792 boardp->ioremap_addr = ioremap(pci_resource_start(pdev, 1),
13793 boardp->asc_n_io_port);
13794 if (!boardp->ioremap_addr) {
13796 ("advansys_board_found: board %d: ioremap(%x, %d) returned NULL\n",
13797 boardp->id, pci_resource_start(pdev, 1),
13798 boardp->asc_n_io_port);
13802 adv_dvc_varp->iop_base = (AdvPortAddr)boardp->ioremap_addr
13803 ASC_DBG1(1, "advansys_board_found: iop_base: 0x%lx\n",
13804 adv_dvc_varp->iop_base);
13807 * Even though it isn't used to access wide boards, other
13808 * than for the debug line below, save I/O Port address so
13809 * that it can be reported.
13811 boardp->ioport = iop;
13813 ASC_DBG2(1, "advansys_board_found: iopb_chip_id_1 0x%x, "
13814 "iopw_chip_id_0 0x%x\n", (ushort)inp(iop + 1),
13815 (ushort)inpw(iop));
13816 #endif /* CONFIG_PCI */
13819 #ifdef CONFIG_PROC_FS
13821 * Allocate buffer for printing information from
13822 * /proc/scsi/advansys/[0...].
13824 boardp->prtbuf = kmalloc(ASC_PRTBUF_SIZE, GFP_KERNEL);
13825 if (!boardp->prtbuf) {
13826 ASC_PRINT2("advansys_board_found: board %d: kmalloc(%d) "
13827 "returned NULL\n", boardp->id, ASC_PRTBUF_SIZE);
13831 #endif /* CONFIG_PROC_FS */
13833 if (ASC_NARROW_BOARD(boardp)) {
13835 * Set the board bus type and PCI IRQ before
13836 * calling AscInitGetConfig().
13838 switch (asc_dvc_varp->bus_type) {
13841 shost->unchecked_isa_dma = TRUE;
13845 shost->unchecked_isa_dma = FALSE;
13849 shost->unchecked_isa_dma = FALSE;
13850 share_irq = IRQF_SHARED;
13852 #endif /* CONFIG_ISA */
13855 shost->unchecked_isa_dma = FALSE;
13856 share_irq = IRQF_SHARED;
13858 #endif /* CONFIG_PCI */
13861 ("advansys_board_found: board %d: unknown adapter type: %d\n",
13862 boardp->id, asc_dvc_varp->bus_type);
13863 shost->unchecked_isa_dma = TRUE;
13869 * NOTE: AscInitGetConfig() may change the board's
13870 * bus_type value. The bus_type value should no
13871 * longer be used. If the bus_type field must be
13872 * referenced only use the bit-wise AND operator "&".
13874 ASC_DBG(2, "advansys_board_found: AscInitGetConfig()\n");
13875 ret = AscInitGetConfig(boardp) ? -ENODEV : 0;
13879 * For Wide boards set PCI information before calling
13880 * AdvInitGetConfig().
13882 shost->unchecked_isa_dma = FALSE;
13883 share_irq = IRQF_SHARED;
13884 ASC_DBG(2, "advansys_board_found: AdvInitGetConfig()\n");
13886 ret = AdvInitGetConfig(pdev, boardp) ? -ENODEV : 0;
13887 #endif /* CONFIG_PCI */
13891 goto err_free_proc;
13894 * Save the EEPROM configuration so that it can be displayed
13895 * from /proc/scsi/advansys/[0...].
13897 if (ASC_NARROW_BOARD(boardp)) {
13902 * Set the adapter's target id bit in the 'init_tidmask' field.
13904 boardp->init_tidmask |=
13905 ADV_TID_TO_TIDMASK(asc_dvc_varp->cfg->chip_scsi_id);
13908 * Save EEPROM settings for the board.
13910 ep = &boardp->eep_config.asc_eep;
13912 ep->init_sdtr = asc_dvc_varp->cfg->sdtr_enable;
13913 ep->disc_enable = asc_dvc_varp->cfg->disc_enable;
13914 ep->use_cmd_qng = asc_dvc_varp->cfg->cmd_qng_enabled;
13915 ASC_EEP_SET_DMA_SPD(ep, asc_dvc_varp->cfg->isa_dma_speed);
13916 ep->start_motor = asc_dvc_varp->start_motor;
13917 ep->cntl = asc_dvc_varp->dvc_cntl;
13918 ep->no_scam = asc_dvc_varp->no_scam;
13919 ep->max_total_qng = asc_dvc_varp->max_total_qng;
13920 ASC_EEP_SET_CHIP_ID(ep, asc_dvc_varp->cfg->chip_scsi_id);
13921 /* 'max_tag_qng' is set to the same value for every device. */
13922 ep->max_tag_qng = asc_dvc_varp->cfg->max_tag_qng[0];
13923 ep->adapter_info[0] = asc_dvc_varp->cfg->adapter_info[0];
13924 ep->adapter_info[1] = asc_dvc_varp->cfg->adapter_info[1];
13925 ep->adapter_info[2] = asc_dvc_varp->cfg->adapter_info[2];
13926 ep->adapter_info[3] = asc_dvc_varp->cfg->adapter_info[3];
13927 ep->adapter_info[4] = asc_dvc_varp->cfg->adapter_info[4];
13928 ep->adapter_info[5] = asc_dvc_varp->cfg->adapter_info[5];
13931 * Modify board configuration.
13933 ASC_DBG(2, "advansys_board_found: AscInitSetConfig()\n");
13934 ret = AscInitSetConfig(pdev, boardp) ? -ENODEV : 0;
13936 goto err_free_proc;
13938 ADVEEP_3550_CONFIG *ep_3550;
13939 ADVEEP_38C0800_CONFIG *ep_38C0800;
13940 ADVEEP_38C1600_CONFIG *ep_38C1600;
13943 * Save Wide EEP Configuration Information.
13945 if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) {
13946 ep_3550 = &boardp->eep_config.adv_3550_eep;
13948 ep_3550->adapter_scsi_id = adv_dvc_varp->chip_scsi_id;
13949 ep_3550->max_host_qng = adv_dvc_varp->max_host_qng;
13950 ep_3550->max_dvc_qng = adv_dvc_varp->max_dvc_qng;
13951 ep_3550->termination = adv_dvc_varp->cfg->termination;
13952 ep_3550->disc_enable = adv_dvc_varp->cfg->disc_enable;
13953 ep_3550->bios_ctrl = adv_dvc_varp->bios_ctrl;
13954 ep_3550->wdtr_able = adv_dvc_varp->wdtr_able;
13955 ep_3550->sdtr_able = adv_dvc_varp->sdtr_able;
13956 ep_3550->ultra_able = adv_dvc_varp->ultra_able;
13957 ep_3550->tagqng_able = adv_dvc_varp->tagqng_able;
13958 ep_3550->start_motor = adv_dvc_varp->start_motor;
13959 ep_3550->scsi_reset_delay =
13960 adv_dvc_varp->scsi_reset_wait;
13961 ep_3550->serial_number_word1 =
13962 adv_dvc_varp->cfg->serial1;
13963 ep_3550->serial_number_word2 =
13964 adv_dvc_varp->cfg->serial2;
13965 ep_3550->serial_number_word3 =
13966 adv_dvc_varp->cfg->serial3;
13967 } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) {
13968 ep_38C0800 = &boardp->eep_config.adv_38C0800_eep;
13970 ep_38C0800->adapter_scsi_id =
13971 adv_dvc_varp->chip_scsi_id;
13972 ep_38C0800->max_host_qng = adv_dvc_varp->max_host_qng;
13973 ep_38C0800->max_dvc_qng = adv_dvc_varp->max_dvc_qng;
13974 ep_38C0800->termination_lvd =
13975 adv_dvc_varp->cfg->termination;
13976 ep_38C0800->disc_enable =
13977 adv_dvc_varp->cfg->disc_enable;
13978 ep_38C0800->bios_ctrl = adv_dvc_varp->bios_ctrl;
13979 ep_38C0800->wdtr_able = adv_dvc_varp->wdtr_able;
13980 ep_38C0800->tagqng_able = adv_dvc_varp->tagqng_able;
13981 ep_38C0800->sdtr_speed1 = adv_dvc_varp->sdtr_speed1;
13982 ep_38C0800->sdtr_speed2 = adv_dvc_varp->sdtr_speed2;
13983 ep_38C0800->sdtr_speed3 = adv_dvc_varp->sdtr_speed3;
13984 ep_38C0800->sdtr_speed4 = adv_dvc_varp->sdtr_speed4;
13985 ep_38C0800->tagqng_able = adv_dvc_varp->tagqng_able;
13986 ep_38C0800->start_motor = adv_dvc_varp->start_motor;
13987 ep_38C0800->scsi_reset_delay =
13988 adv_dvc_varp->scsi_reset_wait;
13989 ep_38C0800->serial_number_word1 =
13990 adv_dvc_varp->cfg->serial1;
13991 ep_38C0800->serial_number_word2 =
13992 adv_dvc_varp->cfg->serial2;
13993 ep_38C0800->serial_number_word3 =
13994 adv_dvc_varp->cfg->serial3;
13996 ep_38C1600 = &boardp->eep_config.adv_38C1600_eep;
13998 ep_38C1600->adapter_scsi_id =
13999 adv_dvc_varp->chip_scsi_id;
14000 ep_38C1600->max_host_qng = adv_dvc_varp->max_host_qng;
14001 ep_38C1600->max_dvc_qng = adv_dvc_varp->max_dvc_qng;
14002 ep_38C1600->termination_lvd =
14003 adv_dvc_varp->cfg->termination;
14004 ep_38C1600->disc_enable =
14005 adv_dvc_varp->cfg->disc_enable;
14006 ep_38C1600->bios_ctrl = adv_dvc_varp->bios_ctrl;
14007 ep_38C1600->wdtr_able = adv_dvc_varp->wdtr_able;
14008 ep_38C1600->tagqng_able = adv_dvc_varp->tagqng_able;
14009 ep_38C1600->sdtr_speed1 = adv_dvc_varp->sdtr_speed1;
14010 ep_38C1600->sdtr_speed2 = adv_dvc_varp->sdtr_speed2;
14011 ep_38C1600->sdtr_speed3 = adv_dvc_varp->sdtr_speed3;
14012 ep_38C1600->sdtr_speed4 = adv_dvc_varp->sdtr_speed4;
14013 ep_38C1600->tagqng_able = adv_dvc_varp->tagqng_able;
14014 ep_38C1600->start_motor = adv_dvc_varp->start_motor;
14015 ep_38C1600->scsi_reset_delay =
14016 adv_dvc_varp->scsi_reset_wait;
14017 ep_38C1600->serial_number_word1 =
14018 adv_dvc_varp->cfg->serial1;
14019 ep_38C1600->serial_number_word2 =
14020 adv_dvc_varp->cfg->serial2;
14021 ep_38C1600->serial_number_word3 =
14022 adv_dvc_varp->cfg->serial3;
14026 * Set the adapter's target id bit in the 'init_tidmask' field.
14028 boardp->init_tidmask |=
14029 ADV_TID_TO_TIDMASK(adv_dvc_varp->chip_scsi_id);
14033 * Channels are numbered beginning with 0. For AdvanSys one host
14034 * structure supports one channel. Multi-channel boards have a
14035 * separate host structure for each channel.
14037 shost->max_channel = 0;
14038 if (ASC_NARROW_BOARD(boardp)) {
14039 shost->max_id = ASC_MAX_TID + 1;
14040 shost->max_lun = ASC_MAX_LUN + 1;
14041 shost->max_cmd_len = ASC_MAX_CDB_LEN;
14043 shost->io_port = asc_dvc_varp->iop_base;
14044 boardp->asc_n_io_port = ASC_IOADR_GAP;
14045 shost->this_id = asc_dvc_varp->cfg->chip_scsi_id;
14047 /* Set maximum number of queues the adapter can handle. */
14048 shost->can_queue = asc_dvc_varp->max_total_qng;
14050 shost->max_id = ADV_MAX_TID + 1;
14051 shost->max_lun = ADV_MAX_LUN + 1;
14052 shost->max_cmd_len = ADV_MAX_CDB_LEN;
14055 * Save the I/O Port address and length even though
14056 * I/O ports are not used to access Wide boards.
14057 * Instead the Wide boards are accessed with
14058 * PCI Memory Mapped I/O.
14060 shost->io_port = iop;
14062 shost->this_id = adv_dvc_varp->chip_scsi_id;
14064 /* Set maximum number of queues the adapter can handle. */
14065 shost->can_queue = adv_dvc_varp->max_host_qng;
14069 * Following v1.3.89, 'cmd_per_lun' is no longer needed
14070 * and should be set to zero.
14072 * But because of a bug introduced in v1.3.89 if the driver is
14073 * compiled as a module and 'cmd_per_lun' is zero, the Mid-Level
14074 * SCSI function 'allocate_device' will panic. To allow the driver
14075 * to work as a module in these kernels set 'cmd_per_lun' to 1.
14077 * Note: This is wrong. cmd_per_lun should be set to the depth
14078 * you want on untagged devices always.
14081 shost->cmd_per_lun = 1;
14083 shost->cmd_per_lun = 0;
14087 * Set the maximum number of scatter-gather elements the
14088 * adapter can handle.
14090 if (ASC_NARROW_BOARD(boardp)) {
14092 * Allow two commands with 'sg_tablesize' scatter-gather
14093 * elements to be executed simultaneously. This value is
14094 * the theoretical hardware limit. It may be decreased
14097 shost->sg_tablesize =
14098 (((asc_dvc_varp->max_total_qng - 2) / 2) *
14099 ASC_SG_LIST_PER_Q) + 1;
14101 shost->sg_tablesize = ADV_MAX_SG_LIST;
14105 * The value of 'sg_tablesize' can not exceed the SCSI
14106 * mid-level driver definition of SG_ALL. SG_ALL also
14107 * must not be exceeded, because it is used to define the
14108 * size of the scatter-gather table in 'struct asc_sg_head'.
14110 if (shost->sg_tablesize > SG_ALL) {
14111 shost->sg_tablesize = SG_ALL;
14114 ASC_DBG1(1, "advansys_board_found: sg_tablesize: %d\n", shost->sg_tablesize);
14116 /* BIOS start address. */
14117 if (ASC_NARROW_BOARD(boardp)) {
14118 shost->base = AscGetChipBiosAddress(asc_dvc_varp->iop_base,
14119 asc_dvc_varp->bus_type);
14122 * Fill-in BIOS board variables. The Wide BIOS saves
14123 * information in LRAM that is used by the driver.
14125 AdvReadWordLram(adv_dvc_varp->iop_base,
14126 BIOS_SIGNATURE, boardp->bios_signature);
14127 AdvReadWordLram(adv_dvc_varp->iop_base,
14128 BIOS_VERSION, boardp->bios_version);
14129 AdvReadWordLram(adv_dvc_varp->iop_base,
14130 BIOS_CODESEG, boardp->bios_codeseg);
14131 AdvReadWordLram(adv_dvc_varp->iop_base,
14132 BIOS_CODELEN, boardp->bios_codelen);
14135 "advansys_board_found: bios_signature 0x%x, bios_version 0x%x\n",
14136 boardp->bios_signature, boardp->bios_version);
14139 "advansys_board_found: bios_codeseg 0x%x, bios_codelen 0x%x\n",
14140 boardp->bios_codeseg, boardp->bios_codelen);
14143 * If the BIOS saved a valid signature, then fill in
14144 * the BIOS code segment base address.
14146 if (boardp->bios_signature == 0x55AA) {
14148 * Convert x86 realmode code segment to a linear
14149 * address by shifting left 4.
14151 shost->base = ((ulong)boardp->bios_codeseg << 4);
14158 * Register Board Resources - I/O Port, DMA, IRQ
14161 /* Register DMA Channel for Narrow boards. */
14162 shost->dma_channel = NO_ISA_DMA; /* Default to no ISA DMA. */
14164 if (ASC_NARROW_BOARD(boardp)) {
14165 /* Register DMA channel for ISA bus. */
14166 if (asc_dvc_varp->bus_type & ASC_IS_ISA) {
14167 shost->dma_channel = asc_dvc_varp->cfg->isa_dma_channel;
14168 ret = request_dma(shost->dma_channel, DRV_NAME);
14171 ("advansys_board_found: board %d: request_dma() %d failed %d\n",
14172 boardp->id, shost->dma_channel, ret);
14173 goto err_free_proc;
14175 AscEnableIsaDma(shost->dma_channel);
14178 #endif /* CONFIG_ISA */
14180 /* Register IRQ Number. */
14181 ASC_DBG1(2, "advansys_board_found: request_irq() %d\n", boardp->irq);
14183 ret = request_irq(boardp->irq, advansys_interrupt, share_irq,
14187 if (ret == -EBUSY) {
14189 ("advansys_board_found: board %d: request_irq(): IRQ 0x%x already in use.\n",
14190 boardp->id, boardp->irq);
14191 } else if (ret == -EINVAL) {
14193 ("advansys_board_found: board %d: request_irq(): IRQ 0x%x not valid.\n",
14194 boardp->id, boardp->irq);
14197 ("advansys_board_found: board %d: request_irq(): IRQ 0x%x failed with %d\n",
14198 boardp->id, boardp->irq, ret);
14204 * Initialize board RISC chip and enable interrupts.
14206 if (ASC_NARROW_BOARD(boardp)) {
14207 ASC_DBG(2, "advansys_board_found: AscInitAsc1000Driver()\n");
14208 warn_code = AscInitAsc1000Driver(asc_dvc_varp);
14210 if (warn_code || asc_dvc_varp->err_code) {
14211 ASC_PRINT4("advansys_board_found: board %d error: "
14212 "init_state 0x%x, warn 0x%x, error 0x%x\n",
14213 boardp->id, asc_dvc_varp->init_state,
14214 warn_code, asc_dvc_varp->err_code);
14215 if (asc_dvc_varp->err_code)
14219 if (advansys_wide_init_chip(boardp, adv_dvc_varp))
14224 goto err_free_wide_mem;
14226 ASC_DBG_PRT_SCSI_HOST(2, shost);
14228 ret = scsi_add_host(shost, boardp->dev);
14230 goto err_free_wide_mem;
14232 scsi_scan_host(shost);
14236 advansys_wide_free_mem(boardp);
14237 free_irq(boardp->irq, shost);
14239 if (shost->dma_channel != NO_ISA_DMA)
14240 free_dma(shost->dma_channel);
14242 kfree(boardp->prtbuf);
14244 if (boardp->ioremap_addr)
14245 iounmap(boardp->ioremap_addr);
14251 * advansys_release()
14253 * Release resources allocated for a single AdvanSys adapter.
14255 static int advansys_release(struct Scsi_Host *shost)
14257 struct asc_board *boardp = shost_priv(shost);
14258 ASC_DBG(1, "advansys_release: begin\n");
14259 scsi_remove_host(shost);
14260 free_irq(boardp->irq, shost);
14261 if (shost->dma_channel != NO_ISA_DMA) {
14262 ASC_DBG(1, "advansys_release: free_dma()\n");
14263 free_dma(shost->dma_channel);
14265 if (!ASC_NARROW_BOARD(boardp)) {
14266 iounmap(boardp->ioremap_addr);
14267 advansys_wide_free_mem(boardp);
14269 kfree(boardp->prtbuf);
14270 scsi_host_put(shost);
14271 ASC_DBG(1, "advansys_release: end\n");
14275 #define ASC_IOADR_TABLE_MAX_IX 11
14277 static PortAddr _asc_def_iop_base[ASC_IOADR_TABLE_MAX_IX] __devinitdata = {
14278 0x100, 0x0110, 0x120, 0x0130, 0x140, 0x0150, 0x0190,
14279 0x0210, 0x0230, 0x0250, 0x0330
14283 * The ISA IRQ number is found in bits 2 and 3 of the CfgLsw. It decodes as:
14289 static unsigned int __devinit advansys_isa_irq_no(PortAddr iop_base)
14291 unsigned short cfg_lsw = AscGetChipCfgLsw(iop_base);
14292 unsigned int chip_irq = ((cfg_lsw >> 2) & 0x03) + 10;
14293 if (chip_irq == 13)
14298 static int __devinit advansys_isa_probe(struct device *dev, unsigned int id)
14301 PortAddr iop_base = _asc_def_iop_base[id];
14302 struct Scsi_Host *shost;
14303 struct asc_board *board;
14305 if (!request_region(iop_base, ASC_IOADR_GAP, DRV_NAME)) {
14306 ASC_DBG1(1, "advansys_isa_match: I/O port 0x%x busy\n",
14310 ASC_DBG1(1, "advansys_isa_match: probing I/O port 0x%x\n", iop_base);
14311 if (!AscFindSignature(iop_base))
14312 goto release_region;
14313 if (!(AscGetChipVersion(iop_base, ASC_IS_ISA) & ASC_CHIP_VER_ISA_BIT))
14314 goto release_region;
14317 shost = scsi_host_alloc(&advansys_template, sizeof(*board));
14319 goto release_region;
14321 board = shost_priv(shost);
14322 board->irq = advansys_isa_irq_no(iop_base);
14325 err = advansys_board_found(shost, iop_base, ASC_IS_ISA);
14329 dev_set_drvdata(dev, shost);
14333 scsi_host_put(shost);
14335 release_region(iop_base, ASC_IOADR_GAP);
14339 static int __devexit advansys_isa_remove(struct device *dev, unsigned int id)
14341 int ioport = _asc_def_iop_base[id];
14342 advansys_release(dev_get_drvdata(dev));
14343 release_region(ioport, ASC_IOADR_GAP);
14347 static struct isa_driver advansys_isa_driver = {
14348 .probe = advansys_isa_probe,
14349 .remove = __devexit_p(advansys_isa_remove),
14351 .owner = THIS_MODULE,
14357 * The VLB IRQ number is found in bits 2 to 4 of the CfgLsw. It decodes as:
14367 static unsigned int __devinit advansys_vlb_irq_no(PortAddr iop_base)
14369 unsigned short cfg_lsw = AscGetChipCfgLsw(iop_base);
14370 unsigned int chip_irq = ((cfg_lsw >> 2) & 0x07) + 9;
14371 if ((chip_irq < 10) || (chip_irq == 13) || (chip_irq > 15))
14376 static int __devinit advansys_vlb_probe(struct device *dev, unsigned int id)
14379 PortAddr iop_base = _asc_def_iop_base[id];
14380 struct Scsi_Host *shost;
14381 struct asc_board *board;
14383 if (!request_region(iop_base, ASC_IOADR_GAP, DRV_NAME)) {
14384 ASC_DBG1(1, "advansys_vlb_match: I/O port 0x%x busy\n",
14388 ASC_DBG1(1, "advansys_vlb_match: probing I/O port 0x%x\n", iop_base);
14389 if (!AscFindSignature(iop_base))
14390 goto release_region;
14392 * I don't think this condition can actually happen, but the old
14393 * driver did it, and the chances of finding a VLB setup in 2007
14394 * to do testing with is slight to none.
14396 if (AscGetChipVersion(iop_base, ASC_IS_VL) > ASC_CHIP_MAX_VER_VL)
14397 goto release_region;
14400 shost = scsi_host_alloc(&advansys_template, sizeof(*board));
14402 goto release_region;
14404 board = shost_priv(shost);
14405 board->irq = advansys_vlb_irq_no(iop_base);
14408 err = advansys_board_found(shost, iop_base, ASC_IS_VL);
14412 dev_set_drvdata(dev, shost);
14416 scsi_host_put(shost);
14418 release_region(iop_base, ASC_IOADR_GAP);
14422 static struct isa_driver advansys_vlb_driver = {
14423 .probe = advansys_vlb_probe,
14424 .remove = __devexit_p(advansys_isa_remove),
14426 .owner = THIS_MODULE,
14427 .name = "advansys_vlb",
14431 static struct eisa_device_id advansys_eisa_table[] __devinitdata = {
14437 MODULE_DEVICE_TABLE(eisa, advansys_eisa_table);
14440 * EISA is a little more tricky than PCI; each EISA device may have two
14441 * channels, and this driver is written to make each channel its own Scsi_Host
14443 struct eisa_scsi_data {
14444 struct Scsi_Host *host[2];
14448 * The EISA IRQ number is found in bits 8 to 10 of the CfgLsw. It decodes as:
14458 static unsigned int __devinit advansys_eisa_irq_no(struct eisa_device *edev)
14460 unsigned short cfg_lsw = inw(edev->base_addr + 0xc86);
14461 unsigned int chip_irq = ((cfg_lsw >> 8) & 0x07) + 10;
14462 if ((chip_irq == 13) || (chip_irq > 15))
14467 static int __devinit advansys_eisa_probe(struct device *dev)
14469 int i, ioport, irq = 0;
14471 struct eisa_device *edev = to_eisa_device(dev);
14472 struct eisa_scsi_data *data;
14475 data = kzalloc(sizeof(*data), GFP_KERNEL);
14478 ioport = edev->base_addr + 0xc30;
14481 for (i = 0; i < 2; i++, ioport += 0x20) {
14482 struct asc_board *board;
14483 struct Scsi_Host *shost;
14484 if (!request_region(ioport, ASC_IOADR_GAP, DRV_NAME)) {
14485 printk(KERN_WARNING "Region %x-%x busy\n", ioport,
14486 ioport + ASC_IOADR_GAP - 1);
14489 if (!AscFindSignature(ioport)) {
14490 release_region(ioport, ASC_IOADR_GAP);
14495 * I don't know why we need to do this for EISA chips, but
14496 * not for any others. It looks to be equivalent to
14497 * AscGetChipCfgMsw, but I may have overlooked something,
14498 * so I'm not converting it until I get an EISA board to
14504 irq = advansys_eisa_irq_no(edev);
14507 shost = scsi_host_alloc(&advansys_template, sizeof(*board));
14509 goto release_region;
14511 board = shost_priv(shost);
14515 err = advansys_board_found(shost, ioport, ASC_IS_EISA);
14517 data->host[i] = shost;
14521 scsi_host_put(shost);
14523 release_region(ioport, ASC_IOADR_GAP);
14529 dev_set_drvdata(dev, data);
14533 kfree(data->host[0]);
14534 kfree(data->host[1]);
14540 static __devexit int advansys_eisa_remove(struct device *dev)
14543 struct eisa_scsi_data *data = dev_get_drvdata(dev);
14545 for (i = 0; i < 2; i++) {
14547 struct Scsi_Host *shost = data->host[i];
14550 ioport = shost->io_port;
14551 advansys_release(shost);
14552 release_region(ioport, ASC_IOADR_GAP);
14559 static struct eisa_driver advansys_eisa_driver = {
14560 .id_table = advansys_eisa_table,
14563 .probe = advansys_eisa_probe,
14564 .remove = __devexit_p(advansys_eisa_remove),
14568 /* PCI Devices supported by this driver */
14569 static struct pci_device_id advansys_pci_tbl[] __devinitdata = {
14570 {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_1200A,
14571 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
14572 {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_ABP940,
14573 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
14574 {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_ABP940U,
14575 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
14576 {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_ABP940UW,
14577 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
14578 {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_38C0800_REV1,
14579 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
14580 {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_38C1600_REV1,
14581 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
14585 MODULE_DEVICE_TABLE(pci, advansys_pci_tbl);
14587 static void __devinit advansys_set_latency(struct pci_dev *pdev)
14589 if ((pdev->device == PCI_DEVICE_ID_ASP_1200A) ||
14590 (pdev->device == PCI_DEVICE_ID_ASP_ABP940)) {
14591 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0);
14594 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency);
14595 if (latency < 0x20)
14596 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x20);
14600 static int __devinit
14601 advansys_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
14604 struct Scsi_Host *shost;
14605 struct asc_board *board;
14607 err = pci_enable_device(pdev);
14610 err = pci_request_regions(pdev, DRV_NAME);
14612 goto disable_device;
14613 pci_set_master(pdev);
14614 advansys_set_latency(pdev);
14617 if (pci_resource_len(pdev, 0) == 0)
14618 goto release_region;
14620 ioport = pci_resource_start(pdev, 0);
14623 shost = scsi_host_alloc(&advansys_template, sizeof(*board));
14625 goto release_region;
14627 board = shost_priv(shost);
14628 board->irq = pdev->irq;
14629 board->dev = &pdev->dev;
14631 if (pdev->device == PCI_DEVICE_ID_ASP_ABP940UW ||
14632 pdev->device == PCI_DEVICE_ID_38C0800_REV1 ||
14633 pdev->device == PCI_DEVICE_ID_38C1600_REV1) {
14634 board->flags |= ASC_IS_WIDE_BOARD;
14637 err = advansys_board_found(shost, ioport, ASC_IS_PCI);
14641 pci_set_drvdata(pdev, shost);
14645 scsi_host_put(shost);
14647 pci_release_regions(pdev);
14649 pci_disable_device(pdev);
14654 static void __devexit advansys_pci_remove(struct pci_dev *pdev)
14656 advansys_release(pci_get_drvdata(pdev));
14657 pci_release_regions(pdev);
14658 pci_disable_device(pdev);
14661 static struct pci_driver advansys_pci_driver = {
14663 .id_table = advansys_pci_tbl,
14664 .probe = advansys_pci_probe,
14665 .remove = __devexit_p(advansys_pci_remove),
14668 static int __init advansys_init(void)
14672 error = isa_register_driver(&advansys_isa_driver,
14673 ASC_IOADR_TABLE_MAX_IX);
14677 error = isa_register_driver(&advansys_vlb_driver,
14678 ASC_IOADR_TABLE_MAX_IX);
14680 goto unregister_isa;
14682 error = eisa_driver_register(&advansys_eisa_driver);
14684 goto unregister_vlb;
14686 error = pci_register_driver(&advansys_pci_driver);
14688 goto unregister_eisa;
14693 eisa_driver_unregister(&advansys_eisa_driver);
14695 isa_unregister_driver(&advansys_vlb_driver);
14697 isa_unregister_driver(&advansys_isa_driver);
14702 static void __exit advansys_exit(void)
14704 pci_unregister_driver(&advansys_pci_driver);
14705 eisa_driver_unregister(&advansys_eisa_driver);
14706 isa_unregister_driver(&advansys_vlb_driver);
14707 isa_unregister_driver(&advansys_isa_driver);
14710 module_init(advansys_init);
14711 module_exit(advansys_exit);
14713 MODULE_LICENSE("GPL");