2 * drivers/s390/net/qeth_core_main.c
4 * Copyright IBM Corp. 2007
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/string.h>
14 #include <linux/errno.h>
15 #include <linux/kernel.h>
17 #include <linux/ipv6.h>
18 #include <linux/tcp.h>
19 #include <linux/mii.h>
20 #include <linux/kthread.h>
22 #include <asm-s390/ebcdic.h>
23 #include <asm-s390/io.h>
24 #include <asm/s390_rdev.h>
26 #include "qeth_core.h"
27 #include "qeth_core_offl.h"
29 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
30 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
32 [QETH_DBF_SETUP] = {"qeth_setup",
33 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
34 [QETH_DBF_QERR] = {"qeth_qerr",
35 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_TRACE] = {"qeth_trace",
37 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
38 [QETH_DBF_MSG] = {"qeth_msg",
39 8, 1, 128, 3, &debug_sprintf_view, NULL},
40 [QETH_DBF_SENSE] = {"qeth_sense",
41 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
42 [QETH_DBF_MISC] = {"qeth_misc",
43 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
44 [QETH_DBF_CTRL] = {"qeth_control",
45 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
47 EXPORT_SYMBOL_GPL(qeth_dbf);
49 struct qeth_card_list_struct qeth_core_card_list;
50 EXPORT_SYMBOL_GPL(qeth_core_card_list);
52 static struct device *qeth_core_root_dev;
53 static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
54 static struct lock_class_key qdio_out_skb_queue_key;
56 static void qeth_send_control_data_cb(struct qeth_channel *,
57 struct qeth_cmd_buffer *);
58 static int qeth_issue_next_read(struct qeth_card *);
59 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
60 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
61 static void qeth_free_buffer_pool(struct qeth_card *);
62 static int qeth_qdio_establish(struct qeth_card *);
65 static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
66 struct qdio_buffer *buffer, int is_tso,
67 int *next_element_to_fill)
69 struct skb_frag_struct *frag;
72 int element, cnt, dlen;
74 fragno = skb_shinfo(skb)->nr_frags;
75 element = *next_element_to_fill;
79 buffer->element[element].flags =
80 SBAL_FLAGS_MIDDLE_FRAG;
82 buffer->element[element].flags =
83 SBAL_FLAGS_FIRST_FRAG;
84 dlen = skb->len - skb->data_len;
86 buffer->element[element].addr = skb->data;
87 buffer->element[element].length = dlen;
90 for (cnt = 0; cnt < fragno; cnt++) {
91 frag = &skb_shinfo(skb)->frags[cnt];
92 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
94 buffer->element[element].addr = (char *)addr;
95 buffer->element[element].length = frag->size;
96 if (cnt < (fragno - 1))
97 buffer->element[element].flags =
98 SBAL_FLAGS_MIDDLE_FRAG;
100 buffer->element[element].flags =
101 SBAL_FLAGS_LAST_FRAG;
104 *next_element_to_fill = element;
107 static inline const char *qeth_get_cardname(struct qeth_card *card)
109 if (card->info.guestlan) {
110 switch (card->info.type) {
111 case QETH_CARD_TYPE_OSAE:
112 return " Guest LAN QDIO";
113 case QETH_CARD_TYPE_IQD:
114 return " Guest LAN Hiper";
119 switch (card->info.type) {
120 case QETH_CARD_TYPE_OSAE:
121 return " OSD Express";
122 case QETH_CARD_TYPE_IQD:
123 return " HiperSockets";
124 case QETH_CARD_TYPE_OSN:
133 /* max length to be returned: 14 */
134 const char *qeth_get_cardname_short(struct qeth_card *card)
136 if (card->info.guestlan) {
137 switch (card->info.type) {
138 case QETH_CARD_TYPE_OSAE:
139 return "GuestLAN QDIO";
140 case QETH_CARD_TYPE_IQD:
141 return "GuestLAN Hiper";
146 switch (card->info.type) {
147 case QETH_CARD_TYPE_OSAE:
148 switch (card->info.link_type) {
149 case QETH_LINK_TYPE_FAST_ETH:
151 case QETH_LINK_TYPE_HSTR:
153 case QETH_LINK_TYPE_GBIT_ETH:
155 case QETH_LINK_TYPE_10GBIT_ETH:
157 case QETH_LINK_TYPE_LANE_ETH100:
158 return "OSD_FE_LANE";
159 case QETH_LINK_TYPE_LANE_TR:
160 return "OSD_TR_LANE";
161 case QETH_LINK_TYPE_LANE_ETH1000:
162 return "OSD_GbE_LANE";
163 case QETH_LINK_TYPE_LANE:
164 return "OSD_ATM_LANE";
166 return "OSD_Express";
168 case QETH_CARD_TYPE_IQD:
169 return "HiperSockets";
170 case QETH_CARD_TYPE_OSN:
179 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
180 int clear_start_mask)
184 spin_lock_irqsave(&card->thread_mask_lock, flags);
185 card->thread_allowed_mask = threads;
186 if (clear_start_mask)
187 card->thread_start_mask &= threads;
188 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
189 wake_up(&card->wait_q);
191 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
193 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
198 spin_lock_irqsave(&card->thread_mask_lock, flags);
199 rc = (card->thread_running_mask & threads);
200 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
203 EXPORT_SYMBOL_GPL(qeth_threads_running);
205 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
207 return wait_event_interruptible(card->wait_q,
208 qeth_threads_running(card, threads) == 0);
210 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
212 void qeth_clear_working_pool_list(struct qeth_card *card)
214 struct qeth_buffer_pool_entry *pool_entry, *tmp;
216 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
217 list_for_each_entry_safe(pool_entry, tmp,
218 &card->qdio.in_buf_pool.entry_list, list){
219 list_del(&pool_entry->list);
222 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
224 static int qeth_alloc_buffer_pool(struct qeth_card *card)
226 struct qeth_buffer_pool_entry *pool_entry;
230 QETH_DBF_TEXT(TRACE, 5, "alocpool");
231 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
232 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
234 qeth_free_buffer_pool(card);
237 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
238 ptr = (void *) __get_free_page(GFP_KERNEL);
241 free_page((unsigned long)
242 pool_entry->elements[--j]);
244 qeth_free_buffer_pool(card);
247 pool_entry->elements[j] = ptr;
249 list_add(&pool_entry->init_list,
250 &card->qdio.init_pool.entry_list);
255 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
257 QETH_DBF_TEXT(TRACE, 2, "realcbp");
259 if ((card->state != CARD_STATE_DOWN) &&
260 (card->state != CARD_STATE_RECOVER))
263 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
264 qeth_clear_working_pool_list(card);
265 qeth_free_buffer_pool(card);
266 card->qdio.in_buf_pool.buf_count = bufcnt;
267 card->qdio.init_pool.buf_count = bufcnt;
268 return qeth_alloc_buffer_pool(card);
271 int qeth_set_large_send(struct qeth_card *card,
272 enum qeth_large_send_types type)
276 if (card->dev == NULL) {
277 card->options.large_send = type;
280 if (card->state == CARD_STATE_UP)
281 netif_tx_disable(card->dev);
282 card->options.large_send = type;
283 switch (card->options.large_send) {
284 case QETH_LARGE_SEND_EDDP:
285 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
288 case QETH_LARGE_SEND_TSO:
289 if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
290 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
293 PRINT_WARN("TSO not supported on %s. "
294 "large_send set to 'no'.\n",
296 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
298 card->options.large_send = QETH_LARGE_SEND_NO;
302 default: /* includes QETH_LARGE_SEND_NO */
303 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
307 if (card->state == CARD_STATE_UP)
308 netif_wake_queue(card->dev);
311 EXPORT_SYMBOL_GPL(qeth_set_large_send);
313 static int qeth_issue_next_read(struct qeth_card *card)
316 struct qeth_cmd_buffer *iob;
318 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
319 if (card->read.state != CH_STATE_UP)
321 iob = qeth_get_buffer(&card->read);
323 PRINT_WARN("issue_next_read failed: no iob available!\n");
326 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
327 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
328 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
331 PRINT_ERR("Error in starting next read ccw! rc=%i\n", rc);
332 atomic_set(&card->read.irq_pending, 0);
333 qeth_schedule_recovery(card);
334 wake_up(&card->wait_q);
339 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
341 struct qeth_reply *reply;
343 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
345 atomic_set(&reply->refcnt, 1);
346 atomic_set(&reply->received, 0);
352 static void qeth_get_reply(struct qeth_reply *reply)
354 WARN_ON(atomic_read(&reply->refcnt) <= 0);
355 atomic_inc(&reply->refcnt);
358 static void qeth_put_reply(struct qeth_reply *reply)
360 WARN_ON(atomic_read(&reply->refcnt) <= 0);
361 if (atomic_dec_and_test(&reply->refcnt))
365 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
366 struct qeth_card *card)
369 int com = cmd->hdr.command;
370 ipa_name = qeth_get_ipa_cmd_name(com);
372 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
373 ipa_name, com, QETH_CARD_IFNAME(card),
374 rc, qeth_get_ipa_msg(rc));
376 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
377 ipa_name, com, QETH_CARD_IFNAME(card));
380 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
381 struct qeth_cmd_buffer *iob)
383 struct qeth_ipa_cmd *cmd = NULL;
385 QETH_DBF_TEXT(TRACE, 5, "chkipad");
386 if (IS_IPA(iob->data)) {
387 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
388 if (IS_IPA_REPLY(cmd)) {
389 if (cmd->hdr.command < IPA_CMD_SETCCID ||
390 cmd->hdr.command > IPA_CMD_MODCCID)
391 qeth_issue_ipa_msg(cmd,
392 cmd->hdr.return_code, card);
395 switch (cmd->hdr.command) {
396 case IPA_CMD_STOPLAN:
397 PRINT_WARN("Link failure on %s (CHPID 0x%X) - "
398 "there is a network problem or "
399 "someone pulled the cable or "
400 "disabled the port.\n",
401 QETH_CARD_IFNAME(card),
403 card->lan_online = 0;
404 if (card->dev && netif_carrier_ok(card->dev))
405 netif_carrier_off(card->dev);
407 case IPA_CMD_STARTLAN:
408 PRINT_INFO("Link reestablished on %s "
409 "(CHPID 0x%X). Scheduling "
410 "IP address reset.\n",
411 QETH_CARD_IFNAME(card),
413 netif_carrier_on(card->dev);
414 card->lan_online = 1;
415 qeth_schedule_recovery(card);
417 case IPA_CMD_MODCCID:
419 case IPA_CMD_REGISTER_LOCAL_ADDR:
420 QETH_DBF_TEXT(TRACE, 3, "irla");
422 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
423 QETH_DBF_TEXT(TRACE, 3, "urla");
426 PRINT_WARN("Received data is IPA "
427 "but not a reply!\n");
435 void qeth_clear_ipacmd_list(struct qeth_card *card)
437 struct qeth_reply *reply, *r;
440 QETH_DBF_TEXT(TRACE, 4, "clipalst");
442 spin_lock_irqsave(&card->lock, flags);
443 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
444 qeth_get_reply(reply);
446 atomic_inc(&reply->received);
447 list_del_init(&reply->list);
448 wake_up(&reply->wait_q);
449 qeth_put_reply(reply);
451 spin_unlock_irqrestore(&card->lock, flags);
453 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
455 static int qeth_check_idx_response(unsigned char *buffer)
460 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
461 if ((buffer[2] & 0xc0) == 0xc0) {
462 PRINT_WARN("received an IDX TERMINATE "
463 "with cause code 0x%02x%s\n",
465 ((buffer[4] == 0x22) ?
466 " -- try another portname" : ""));
467 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
468 QETH_DBF_TEXT(TRACE, 2, " idxterm");
469 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
475 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
478 struct qeth_card *card;
480 QETH_DBF_TEXT(TRACE, 4, "setupccw");
481 card = CARD_FROM_CDEV(channel->ccwdev);
482 if (channel == &card->read)
483 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
485 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
486 channel->ccw.count = len;
487 channel->ccw.cda = (__u32) __pa(iob);
490 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
494 QETH_DBF_TEXT(TRACE, 6, "getbuff");
495 index = channel->io_buf_no;
497 if (channel->iob[index].state == BUF_STATE_FREE) {
498 channel->iob[index].state = BUF_STATE_LOCKED;
499 channel->io_buf_no = (channel->io_buf_no + 1) %
501 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
502 return channel->iob + index;
504 index = (index + 1) % QETH_CMD_BUFFER_NO;
505 } while (index != channel->io_buf_no);
510 void qeth_release_buffer(struct qeth_channel *channel,
511 struct qeth_cmd_buffer *iob)
515 QETH_DBF_TEXT(TRACE, 6, "relbuff");
516 spin_lock_irqsave(&channel->iob_lock, flags);
517 memset(iob->data, 0, QETH_BUFSIZE);
518 iob->state = BUF_STATE_FREE;
519 iob->callback = qeth_send_control_data_cb;
521 spin_unlock_irqrestore(&channel->iob_lock, flags);
523 EXPORT_SYMBOL_GPL(qeth_release_buffer);
525 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
527 struct qeth_cmd_buffer *buffer = NULL;
530 spin_lock_irqsave(&channel->iob_lock, flags);
531 buffer = __qeth_get_buffer(channel);
532 spin_unlock_irqrestore(&channel->iob_lock, flags);
536 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
538 struct qeth_cmd_buffer *buffer;
539 wait_event(channel->wait_q,
540 ((buffer = qeth_get_buffer(channel)) != NULL));
543 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
545 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
549 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
550 qeth_release_buffer(channel, &channel->iob[cnt]);
552 channel->io_buf_no = 0;
554 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
556 static void qeth_send_control_data_cb(struct qeth_channel *channel,
557 struct qeth_cmd_buffer *iob)
559 struct qeth_card *card;
560 struct qeth_reply *reply, *r;
561 struct qeth_ipa_cmd *cmd;
565 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
567 card = CARD_FROM_CDEV(channel->ccwdev);
568 if (qeth_check_idx_response(iob->data)) {
569 qeth_clear_ipacmd_list(card);
570 qeth_schedule_recovery(card);
574 cmd = qeth_check_ipa_data(card, iob);
575 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
577 /*in case of OSN : check if cmd is set */
578 if (card->info.type == QETH_CARD_TYPE_OSN &&
580 cmd->hdr.command != IPA_CMD_STARTLAN &&
581 card->osn_info.assist_cb != NULL) {
582 card->osn_info.assist_cb(card->dev, cmd);
586 spin_lock_irqsave(&card->lock, flags);
587 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
588 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
589 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
590 qeth_get_reply(reply);
591 list_del_init(&reply->list);
592 spin_unlock_irqrestore(&card->lock, flags);
594 if (reply->callback != NULL) {
596 reply->offset = (__u16)((char *)cmd -
598 keep_reply = reply->callback(card,
602 keep_reply = reply->callback(card,
607 reply->rc = (u16) cmd->hdr.return_code;
611 spin_lock_irqsave(&card->lock, flags);
612 list_add_tail(&reply->list,
613 &card->cmd_waiter_list);
614 spin_unlock_irqrestore(&card->lock, flags);
616 atomic_inc(&reply->received);
617 wake_up(&reply->wait_q);
619 qeth_put_reply(reply);
623 spin_unlock_irqrestore(&card->lock, flags);
625 memcpy(&card->seqno.pdu_hdr_ack,
626 QETH_PDU_HEADER_SEQ_NO(iob->data),
628 qeth_release_buffer(channel, iob);
631 static int qeth_setup_channel(struct qeth_channel *channel)
635 QETH_DBF_TEXT(SETUP, 2, "setupch");
636 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
637 channel->iob[cnt].data = (char *)
638 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
639 if (channel->iob[cnt].data == NULL)
641 channel->iob[cnt].state = BUF_STATE_FREE;
642 channel->iob[cnt].channel = channel;
643 channel->iob[cnt].callback = qeth_send_control_data_cb;
644 channel->iob[cnt].rc = 0;
646 if (cnt < QETH_CMD_BUFFER_NO) {
648 kfree(channel->iob[cnt].data);
652 channel->io_buf_no = 0;
653 atomic_set(&channel->irq_pending, 0);
654 spin_lock_init(&channel->iob_lock);
656 init_waitqueue_head(&channel->wait_q);
660 static int qeth_set_thread_start_bit(struct qeth_card *card,
661 unsigned long thread)
665 spin_lock_irqsave(&card->thread_mask_lock, flags);
666 if (!(card->thread_allowed_mask & thread) ||
667 (card->thread_start_mask & thread)) {
668 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
671 card->thread_start_mask |= thread;
672 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
676 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
680 spin_lock_irqsave(&card->thread_mask_lock, flags);
681 card->thread_start_mask &= ~thread;
682 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
683 wake_up(&card->wait_q);
685 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
687 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
691 spin_lock_irqsave(&card->thread_mask_lock, flags);
692 card->thread_running_mask &= ~thread;
693 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
694 wake_up(&card->wait_q);
696 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
698 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
703 spin_lock_irqsave(&card->thread_mask_lock, flags);
704 if (card->thread_start_mask & thread) {
705 if ((card->thread_allowed_mask & thread) &&
706 !(card->thread_running_mask & thread)) {
708 card->thread_start_mask &= ~thread;
709 card->thread_running_mask |= thread;
713 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
717 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
721 wait_event(card->wait_q,
722 (rc = __qeth_do_run_thread(card, thread)) >= 0);
725 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
727 void qeth_schedule_recovery(struct qeth_card *card)
729 QETH_DBF_TEXT(TRACE, 2, "startrec");
730 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
731 schedule_work(&card->kernel_thread_starter);
733 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
735 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
740 sense = (char *) irb->ecw;
741 cstat = irb->scsw.cstat;
742 dstat = irb->scsw.dstat;
744 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
745 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
746 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
747 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
748 PRINT_WARN("check on device %s, dstat=x%x, cstat=x%x ",
749 cdev->dev.bus_id, dstat, cstat);
750 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
755 if (dstat & DEV_STAT_UNIT_CHECK) {
756 if (sense[SENSE_RESETTING_EVENT_BYTE] &
757 SENSE_RESETTING_EVENT_FLAG) {
758 QETH_DBF_TEXT(TRACE, 2, "REVIND");
761 if (sense[SENSE_COMMAND_REJECT_BYTE] &
762 SENSE_COMMAND_REJECT_FLAG) {
763 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
766 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
767 QETH_DBF_TEXT(TRACE, 2, "AFFE");
770 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
771 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
774 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
780 static long __qeth_check_irb_error(struct ccw_device *cdev,
781 unsigned long intparm, struct irb *irb)
786 switch (PTR_ERR(irb)) {
788 PRINT_WARN("i/o-error on device %s\n", cdev->dev.bus_id);
789 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
790 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
793 PRINT_WARN("timeout on device %s\n", cdev->dev.bus_id);
794 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
795 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
796 if (intparm == QETH_RCD_PARM) {
797 struct qeth_card *card = CARD_FROM_CDEV(cdev);
799 if (card && (card->data.ccwdev == cdev)) {
800 card->data.state = CH_STATE_DOWN;
801 wake_up(&card->wait_q);
806 PRINT_WARN("unknown error %ld on device %s\n", PTR_ERR(irb),
808 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
809 QETH_DBF_TEXT(TRACE, 2, " rc???");
814 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
819 struct qeth_cmd_buffer *buffer;
820 struct qeth_channel *channel;
821 struct qeth_card *card;
822 struct qeth_cmd_buffer *iob;
825 QETH_DBF_TEXT(TRACE, 5, "irq");
827 if (__qeth_check_irb_error(cdev, intparm, irb))
829 cstat = irb->scsw.cstat;
830 dstat = irb->scsw.dstat;
832 card = CARD_FROM_CDEV(cdev);
836 if (card->read.ccwdev == cdev) {
837 channel = &card->read;
838 QETH_DBF_TEXT(TRACE, 5, "read");
839 } else if (card->write.ccwdev == cdev) {
840 channel = &card->write;
841 QETH_DBF_TEXT(TRACE, 5, "write");
843 channel = &card->data;
844 QETH_DBF_TEXT(TRACE, 5, "data");
846 atomic_set(&channel->irq_pending, 0);
848 if (irb->scsw.fctl & (SCSW_FCTL_CLEAR_FUNC))
849 channel->state = CH_STATE_STOPPED;
851 if (irb->scsw.fctl & (SCSW_FCTL_HALT_FUNC))
852 channel->state = CH_STATE_HALTED;
854 /*let's wake up immediately on data channel*/
855 if ((channel == &card->data) && (intparm != 0) &&
856 (intparm != QETH_RCD_PARM))
859 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
860 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
861 /* we don't have to handle this further */
864 if (intparm == QETH_HALT_CHANNEL_PARM) {
865 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
866 /* we don't have to handle this further */
869 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
870 (dstat & DEV_STAT_UNIT_CHECK) ||
872 if (irb->esw.esw0.erw.cons) {
873 /* TODO: we should make this s390dbf */
874 PRINT_WARN("sense data available on channel %s.\n",
875 CHANNEL_ID(channel));
876 PRINT_WARN(" cstat 0x%X\n dstat 0x%X\n", cstat, dstat);
877 print_hex_dump(KERN_WARNING, "qeth: irb ",
878 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
879 print_hex_dump(KERN_WARNING, "qeth: sense data ",
880 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
882 if (intparm == QETH_RCD_PARM) {
883 channel->state = CH_STATE_DOWN;
886 rc = qeth_get_problem(cdev, irb);
888 qeth_schedule_recovery(card);
893 if (intparm == QETH_RCD_PARM) {
894 channel->state = CH_STATE_RCD_DONE;
898 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
899 buffer->state = BUF_STATE_PROCESSED;
901 if (channel == &card->data)
903 if (channel == &card->read &&
904 channel->state == CH_STATE_UP)
905 qeth_issue_next_read(card);
908 index = channel->buf_no;
909 while (iob[index].state == BUF_STATE_PROCESSED) {
910 if (iob[index].callback != NULL)
911 iob[index].callback(channel, iob + index);
913 index = (index + 1) % QETH_CMD_BUFFER_NO;
915 channel->buf_no = index;
917 wake_up(&card->wait_q);
921 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
922 struct qeth_qdio_out_buffer *buf)
927 /* is PCI flag set on buffer? */
928 if (buf->buffer->element[0].flags & 0x40)
929 atomic_dec(&queue->set_pci_flags_count);
931 skb = skb_dequeue(&buf->skb_list);
933 atomic_dec(&skb->users);
934 dev_kfree_skb_any(skb);
935 skb = skb_dequeue(&buf->skb_list);
937 qeth_eddp_buf_release_contexts(buf);
938 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
939 buf->buffer->element[i].length = 0;
940 buf->buffer->element[i].addr = NULL;
941 buf->buffer->element[i].flags = 0;
943 buf->next_element_to_fill = 0;
944 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
947 void qeth_clear_qdio_buffers(struct qeth_card *card)
951 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
952 /* clear outbound buffers to free skbs */
953 for (i = 0; i < card->qdio.no_out_queues; ++i)
954 if (card->qdio.out_qs[i]) {
955 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
956 qeth_clear_output_buffer(card->qdio.out_qs[i],
957 &card->qdio.out_qs[i]->bufs[j]);
960 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
962 static void qeth_free_buffer_pool(struct qeth_card *card)
964 struct qeth_buffer_pool_entry *pool_entry, *tmp;
966 QETH_DBF_TEXT(TRACE, 5, "freepool");
967 list_for_each_entry_safe(pool_entry, tmp,
968 &card->qdio.init_pool.entry_list, init_list){
969 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
970 free_page((unsigned long)pool_entry->elements[i]);
971 list_del(&pool_entry->init_list);
976 static void qeth_free_qdio_buffers(struct qeth_card *card)
980 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
981 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
982 QETH_QDIO_UNINITIALIZED)
984 kfree(card->qdio.in_q);
985 card->qdio.in_q = NULL;
986 /* inbound buffer pool */
987 qeth_free_buffer_pool(card);
988 /* free outbound qdio_qs */
989 if (card->qdio.out_qs) {
990 for (i = 0; i < card->qdio.no_out_queues; ++i) {
991 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
992 qeth_clear_output_buffer(card->qdio.out_qs[i],
993 &card->qdio.out_qs[i]->bufs[j]);
994 kfree(card->qdio.out_qs[i]);
996 kfree(card->qdio.out_qs);
997 card->qdio.out_qs = NULL;
1001 static void qeth_clean_channel(struct qeth_channel *channel)
1005 QETH_DBF_TEXT(SETUP, 2, "freech");
1006 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1007 kfree(channel->iob[cnt].data);
1010 static int qeth_is_1920_device(struct qeth_card *card)
1012 int single_queue = 0;
1013 struct ccw_device *ccwdev;
1014 struct channelPath_dsc {
1025 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
1027 ccwdev = card->data.ccwdev;
1028 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1029 if (chp_dsc != NULL) {
1030 /* CHPP field bit 6 == 1 -> single queue */
1031 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1034 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
1035 return single_queue;
1038 static void qeth_init_qdio_info(struct qeth_card *card)
1040 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1041 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1043 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1044 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1045 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1046 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1047 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1050 static void qeth_set_intial_options(struct qeth_card *card)
1052 card->options.route4.type = NO_ROUTER;
1053 card->options.route6.type = NO_ROUTER;
1054 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1055 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1056 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1057 card->options.fake_broadcast = 0;
1058 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1059 card->options.fake_ll = 0;
1060 card->options.performance_stats = 0;
1061 card->options.rx_sg_cb = QETH_RX_SG_CB;
1064 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1066 unsigned long flags;
1069 spin_lock_irqsave(&card->thread_mask_lock, flags);
1070 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
1071 (u8) card->thread_start_mask,
1072 (u8) card->thread_allowed_mask,
1073 (u8) card->thread_running_mask);
1074 rc = (card->thread_start_mask & thread);
1075 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1079 static void qeth_start_kernel_thread(struct work_struct *work)
1081 struct qeth_card *card = container_of(work, struct qeth_card,
1082 kernel_thread_starter);
1083 QETH_DBF_TEXT(TRACE , 2, "strthrd");
1085 if (card->read.state != CH_STATE_UP &&
1086 card->write.state != CH_STATE_UP)
1088 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1089 kthread_run(card->discipline.recover, (void *) card,
1093 static int qeth_setup_card(struct qeth_card *card)
1096 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1097 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1099 card->read.state = CH_STATE_DOWN;
1100 card->write.state = CH_STATE_DOWN;
1101 card->data.state = CH_STATE_DOWN;
1102 card->state = CARD_STATE_DOWN;
1103 card->lan_online = 0;
1104 card->use_hard_stop = 0;
1106 spin_lock_init(&card->vlanlock);
1107 spin_lock_init(&card->mclock);
1108 card->vlangrp = NULL;
1109 spin_lock_init(&card->lock);
1110 spin_lock_init(&card->ip_lock);
1111 spin_lock_init(&card->thread_mask_lock);
1112 card->thread_start_mask = 0;
1113 card->thread_allowed_mask = 0;
1114 card->thread_running_mask = 0;
1115 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1116 INIT_LIST_HEAD(&card->ip_list);
1117 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1118 if (!card->ip_tbd_list) {
1119 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1122 INIT_LIST_HEAD(card->ip_tbd_list);
1123 INIT_LIST_HEAD(&card->cmd_waiter_list);
1124 init_waitqueue_head(&card->wait_q);
1125 /* intial options */
1126 qeth_set_intial_options(card);
1127 /* IP address takeover */
1128 INIT_LIST_HEAD(&card->ipato.entries);
1129 card->ipato.enabled = 0;
1130 card->ipato.invert4 = 0;
1131 card->ipato.invert6 = 0;
1132 /* init QDIO stuff */
1133 qeth_init_qdio_info(card);
1137 static struct qeth_card *qeth_alloc_card(void)
1139 struct qeth_card *card;
1141 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1142 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1145 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1146 if (qeth_setup_channel(&card->read)) {
1150 if (qeth_setup_channel(&card->write)) {
1151 qeth_clean_channel(&card->read);
1155 card->options.layer2 = -1;
1159 static int qeth_determine_card_type(struct qeth_card *card)
1163 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1165 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1166 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1167 while (known_devices[i][4]) {
1168 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1169 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1170 card->info.type = known_devices[i][4];
1171 card->qdio.no_out_queues = known_devices[i][8];
1172 card->info.is_multicast_different = known_devices[i][9];
1173 if (qeth_is_1920_device(card)) {
1174 PRINT_INFO("Priority Queueing not able "
1175 "due to hardware limitations!\n");
1176 card->qdio.no_out_queues = 1;
1177 card->qdio.default_out_queue = 0;
1183 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1184 PRINT_ERR("unknown card type on device %s\n", CARD_BUS_ID(card));
1188 static int qeth_clear_channel(struct qeth_channel *channel)
1190 unsigned long flags;
1191 struct qeth_card *card;
1194 QETH_DBF_TEXT(TRACE, 3, "clearch");
1195 card = CARD_FROM_CDEV(channel->ccwdev);
1196 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1197 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1198 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1202 rc = wait_event_interruptible_timeout(card->wait_q,
1203 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1204 if (rc == -ERESTARTSYS)
1206 if (channel->state != CH_STATE_STOPPED)
1208 channel->state = CH_STATE_DOWN;
1212 static int qeth_halt_channel(struct qeth_channel *channel)
1214 unsigned long flags;
1215 struct qeth_card *card;
1218 QETH_DBF_TEXT(TRACE, 3, "haltch");
1219 card = CARD_FROM_CDEV(channel->ccwdev);
1220 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1221 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1222 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1226 rc = wait_event_interruptible_timeout(card->wait_q,
1227 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1228 if (rc == -ERESTARTSYS)
1230 if (channel->state != CH_STATE_HALTED)
1235 static int qeth_halt_channels(struct qeth_card *card)
1237 int rc1 = 0, rc2 = 0, rc3 = 0;
1239 QETH_DBF_TEXT(TRACE, 3, "haltchs");
1240 rc1 = qeth_halt_channel(&card->read);
1241 rc2 = qeth_halt_channel(&card->write);
1242 rc3 = qeth_halt_channel(&card->data);
1250 static int qeth_clear_channels(struct qeth_card *card)
1252 int rc1 = 0, rc2 = 0, rc3 = 0;
1254 QETH_DBF_TEXT(TRACE, 3, "clearchs");
1255 rc1 = qeth_clear_channel(&card->read);
1256 rc2 = qeth_clear_channel(&card->write);
1257 rc3 = qeth_clear_channel(&card->data);
1265 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1269 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1270 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
1273 rc = qeth_halt_channels(card);
1276 return qeth_clear_channels(card);
1279 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1283 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
1284 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1285 QETH_QDIO_CLEANING)) {
1286 case QETH_QDIO_ESTABLISHED:
1287 if (card->info.type == QETH_CARD_TYPE_IQD)
1288 rc = qdio_cleanup(CARD_DDEV(card),
1289 QDIO_FLAG_CLEANUP_USING_HALT);
1291 rc = qdio_cleanup(CARD_DDEV(card),
1292 QDIO_FLAG_CLEANUP_USING_CLEAR);
1294 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
1295 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1297 case QETH_QDIO_CLEANING:
1302 rc = qeth_clear_halt_card(card, use_halt);
1304 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
1305 card->state = CARD_STATE_DOWN;
1308 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1310 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1316 struct qeth_channel *channel = &card->data;
1317 unsigned long flags;
1320 * scan for RCD command in extended SenseID data
1322 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1323 if (!ciw || ciw->cmd == 0)
1325 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1329 channel->ccw.cmd_code = ciw->cmd;
1330 channel->ccw.cda = (__u32) __pa(rcd_buf);
1331 channel->ccw.count = ciw->count;
1332 channel->ccw.flags = CCW_FLAG_SLI;
1333 channel->state = CH_STATE_RCD;
1334 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1335 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1336 QETH_RCD_PARM, LPM_ANYPATH, 0,
1338 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1340 wait_event(card->wait_q,
1341 (channel->state == CH_STATE_RCD_DONE ||
1342 channel->state == CH_STATE_DOWN));
1343 if (channel->state == CH_STATE_DOWN)
1346 channel->state = CH_STATE_DOWN;
1352 *length = ciw->count;
1358 static int qeth_get_unitaddr(struct qeth_card *card)
1364 QETH_DBF_TEXT(SETUP, 2, "getunit");
1365 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1367 PRINT_ERR("qeth_read_conf_data for device %s returned %i\n",
1368 CARD_DDEV_ID(card), rc);
1371 card->info.chpid = prcd[30];
1372 card->info.unit_addr2 = prcd[31];
1373 card->info.cula = prcd[63];
1374 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1375 (prcd[0x11] == _ascebc['M']));
1380 static void qeth_init_tokens(struct qeth_card *card)
1382 card->token.issuer_rm_w = 0x00010103UL;
1383 card->token.cm_filter_w = 0x00010108UL;
1384 card->token.cm_connection_w = 0x0001010aUL;
1385 card->token.ulp_filter_w = 0x0001010bUL;
1386 card->token.ulp_connection_w = 0x0001010dUL;
1389 static void qeth_init_func_level(struct qeth_card *card)
1391 if (card->ipato.enabled) {
1392 if (card->info.type == QETH_CARD_TYPE_IQD)
1393 card->info.func_level =
1394 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1396 card->info.func_level =
1397 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1399 if (card->info.type == QETH_CARD_TYPE_IQD)
1400 /*FIXME:why do we have same values for dis and ena for
1402 card->info.func_level =
1403 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1405 card->info.func_level =
1406 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1410 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1411 void (*idx_reply_cb)(struct qeth_channel *,
1412 struct qeth_cmd_buffer *))
1414 struct qeth_cmd_buffer *iob;
1415 unsigned long flags;
1417 struct qeth_card *card;
1419 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1420 card = CARD_FROM_CDEV(channel->ccwdev);
1421 iob = qeth_get_buffer(channel);
1422 iob->callback = idx_reply_cb;
1423 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1424 channel->ccw.count = QETH_BUFSIZE;
1425 channel->ccw.cda = (__u32) __pa(iob->data);
1427 wait_event(card->wait_q,
1428 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1429 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1430 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1431 rc = ccw_device_start(channel->ccwdev,
1432 &channel->ccw, (addr_t) iob, 0, 0);
1433 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1436 PRINT_ERR("Error2 in activating channel rc=%d\n", rc);
1437 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1438 atomic_set(&channel->irq_pending, 0);
1439 wake_up(&card->wait_q);
1442 rc = wait_event_interruptible_timeout(card->wait_q,
1443 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1444 if (rc == -ERESTARTSYS)
1446 if (channel->state != CH_STATE_UP) {
1448 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1449 qeth_clear_cmd_buffers(channel);
1455 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1456 void (*idx_reply_cb)(struct qeth_channel *,
1457 struct qeth_cmd_buffer *))
1459 struct qeth_card *card;
1460 struct qeth_cmd_buffer *iob;
1461 unsigned long flags;
1465 struct ccw_dev_id temp_devid;
1467 card = CARD_FROM_CDEV(channel->ccwdev);
1469 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1471 iob = qeth_get_buffer(channel);
1472 iob->callback = idx_reply_cb;
1473 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1474 channel->ccw.count = IDX_ACTIVATE_SIZE;
1475 channel->ccw.cda = (__u32) __pa(iob->data);
1476 if (channel == &card->write) {
1477 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1478 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1479 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1480 card->seqno.trans_hdr++;
1482 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1483 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1484 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1486 tmp = ((__u8)card->info.portno) | 0x80;
1487 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1488 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1489 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1490 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1491 &card->info.func_level, sizeof(__u16));
1492 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1493 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1494 temp = (card->info.cula << 8) + card->info.unit_addr2;
1495 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1497 wait_event(card->wait_q,
1498 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1499 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1500 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1501 rc = ccw_device_start(channel->ccwdev,
1502 &channel->ccw, (addr_t) iob, 0, 0);
1503 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1506 PRINT_ERR("Error1 in activating channel. rc=%d\n", rc);
1507 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1508 atomic_set(&channel->irq_pending, 0);
1509 wake_up(&card->wait_q);
1512 rc = wait_event_interruptible_timeout(card->wait_q,
1513 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1514 if (rc == -ERESTARTSYS)
1516 if (channel->state != CH_STATE_ACTIVATING) {
1517 PRINT_WARN("IDX activate timed out!\n");
1518 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1519 qeth_clear_cmd_buffers(channel);
1522 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1525 static int qeth_peer_func_level(int level)
1527 if ((level & 0xff) == 8)
1528 return (level & 0xff) + 0x400;
1529 if (((level >> 8) & 3) == 1)
1530 return (level & 0xff) + 0x200;
1534 static void qeth_idx_write_cb(struct qeth_channel *channel,
1535 struct qeth_cmd_buffer *iob)
1537 struct qeth_card *card;
1540 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1542 if (channel->state == CH_STATE_DOWN) {
1543 channel->state = CH_STATE_ACTIVATING;
1546 card = CARD_FROM_CDEV(channel->ccwdev);
1548 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1549 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1550 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1551 "adapter exclusively used by another host\n",
1552 CARD_WDEV_ID(card));
1554 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1555 "negative reply\n", CARD_WDEV_ID(card));
1558 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1559 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1560 PRINT_WARN("IDX_ACTIVATE on write channel device %s: "
1561 "function level mismatch "
1562 "(sent: 0x%x, received: 0x%x)\n",
1563 CARD_WDEV_ID(card), card->info.func_level, temp);
1566 channel->state = CH_STATE_UP;
1568 qeth_release_buffer(channel, iob);
1571 static void qeth_idx_read_cb(struct qeth_channel *channel,
1572 struct qeth_cmd_buffer *iob)
1574 struct qeth_card *card;
1577 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1578 if (channel->state == CH_STATE_DOWN) {
1579 channel->state = CH_STATE_ACTIVATING;
1583 card = CARD_FROM_CDEV(channel->ccwdev);
1584 if (qeth_check_idx_response(iob->data))
1587 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1588 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1589 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1590 "adapter exclusively used by another host\n",
1591 CARD_RDEV_ID(card));
1593 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1594 "negative reply\n", CARD_RDEV_ID(card));
1599 * temporary fix for microcode bug
1600 * to revert it,replace OR by AND
1602 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1603 (card->info.type == QETH_CARD_TYPE_OSAE))
1604 card->info.portname_required = 1;
1606 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1607 if (temp != qeth_peer_func_level(card->info.func_level)) {
1608 PRINT_WARN("IDX_ACTIVATE on read channel device %s: function "
1609 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1610 CARD_RDEV_ID(card), card->info.func_level, temp);
1613 memcpy(&card->token.issuer_rm_r,
1614 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1615 QETH_MPC_TOKEN_LENGTH);
1616 memcpy(&card->info.mcl_level[0],
1617 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1618 channel->state = CH_STATE_UP;
1620 qeth_release_buffer(channel, iob);
1623 void qeth_prepare_control_data(struct qeth_card *card, int len,
1624 struct qeth_cmd_buffer *iob)
1626 qeth_setup_ccw(&card->write, iob->data, len);
1627 iob->callback = qeth_release_buffer;
1629 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1630 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1631 card->seqno.trans_hdr++;
1632 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1633 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1634 card->seqno.pdu_hdr++;
1635 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1636 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1637 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1639 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1641 int qeth_send_control_data(struct qeth_card *card, int len,
1642 struct qeth_cmd_buffer *iob,
1643 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1648 unsigned long flags;
1649 struct qeth_reply *reply = NULL;
1650 unsigned long timeout;
1652 QETH_DBF_TEXT(TRACE, 2, "sendctl");
1654 reply = qeth_alloc_reply(card);
1656 PRINT_WARN("Could not alloc qeth_reply!\n");
1659 reply->callback = reply_cb;
1660 reply->param = reply_param;
1661 if (card->state == CARD_STATE_DOWN)
1662 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1664 reply->seqno = card->seqno.ipa++;
1665 init_waitqueue_head(&reply->wait_q);
1666 spin_lock_irqsave(&card->lock, flags);
1667 list_add_tail(&reply->list, &card->cmd_waiter_list);
1668 spin_unlock_irqrestore(&card->lock, flags);
1669 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1671 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1672 qeth_prepare_control_data(card, len, iob);
1674 if (IS_IPA(iob->data))
1675 timeout = jiffies + QETH_IPA_TIMEOUT;
1677 timeout = jiffies + QETH_TIMEOUT;
1679 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
1680 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1681 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1682 (addr_t) iob, 0, 0);
1683 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1685 PRINT_WARN("qeth_send_control_data: "
1686 "ccw_device_start rc = %i\n", rc);
1687 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
1688 spin_lock_irqsave(&card->lock, flags);
1689 list_del_init(&reply->list);
1690 qeth_put_reply(reply);
1691 spin_unlock_irqrestore(&card->lock, flags);
1692 qeth_release_buffer(iob->channel, iob);
1693 atomic_set(&card->write.irq_pending, 0);
1694 wake_up(&card->wait_q);
1697 while (!atomic_read(&reply->received)) {
1698 if (time_after(jiffies, timeout)) {
1699 spin_lock_irqsave(&reply->card->lock, flags);
1700 list_del_init(&reply->list);
1701 spin_unlock_irqrestore(&reply->card->lock, flags);
1703 atomic_inc(&reply->received);
1704 wake_up(&reply->wait_q);
1709 qeth_put_reply(reply);
1712 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1714 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1717 struct qeth_cmd_buffer *iob;
1719 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
1721 iob = (struct qeth_cmd_buffer *) data;
1722 memcpy(&card->token.cm_filter_r,
1723 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1724 QETH_MPC_TOKEN_LENGTH);
1725 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1729 static int qeth_cm_enable(struct qeth_card *card)
1732 struct qeth_cmd_buffer *iob;
1734 QETH_DBF_TEXT(SETUP, 2, "cmenable");
1736 iob = qeth_wait_for_buffer(&card->write);
1737 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1738 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1739 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1740 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1741 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1743 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1744 qeth_cm_enable_cb, NULL);
1748 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1752 struct qeth_cmd_buffer *iob;
1754 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
1756 iob = (struct qeth_cmd_buffer *) data;
1757 memcpy(&card->token.cm_connection_r,
1758 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1759 QETH_MPC_TOKEN_LENGTH);
1760 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1764 static int qeth_cm_setup(struct qeth_card *card)
1767 struct qeth_cmd_buffer *iob;
1769 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
1771 iob = qeth_wait_for_buffer(&card->write);
1772 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1773 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1774 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1775 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1776 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1777 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1778 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1779 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1780 qeth_cm_setup_cb, NULL);
1785 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1787 switch (card->info.type) {
1788 case QETH_CARD_TYPE_UNKNOWN:
1790 case QETH_CARD_TYPE_IQD:
1791 return card->info.max_mtu;
1792 case QETH_CARD_TYPE_OSAE:
1793 switch (card->info.link_type) {
1794 case QETH_LINK_TYPE_HSTR:
1795 case QETH_LINK_TYPE_LANE_TR:
1805 static inline int qeth_get_max_mtu_for_card(int cardtype)
1809 case QETH_CARD_TYPE_UNKNOWN:
1810 case QETH_CARD_TYPE_OSAE:
1811 case QETH_CARD_TYPE_OSN:
1813 case QETH_CARD_TYPE_IQD:
1820 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1823 case QETH_CARD_TYPE_IQD:
1830 static inline int qeth_get_mtu_outof_framesize(int framesize)
1832 switch (framesize) {
1846 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1848 switch (card->info.type) {
1849 case QETH_CARD_TYPE_OSAE:
1850 return ((mtu >= 576) && (mtu <= 61440));
1851 case QETH_CARD_TYPE_IQD:
1852 return ((mtu >= 576) &&
1853 (mtu <= card->info.max_mtu + 4096 - 32));
1854 case QETH_CARD_TYPE_OSN:
1855 case QETH_CARD_TYPE_UNKNOWN:
1861 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1865 __u16 mtu, framesize;
1868 struct qeth_cmd_buffer *iob;
1870 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
1872 iob = (struct qeth_cmd_buffer *) data;
1873 memcpy(&card->token.ulp_filter_r,
1874 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1875 QETH_MPC_TOKEN_LENGTH);
1876 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1877 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1878 mtu = qeth_get_mtu_outof_framesize(framesize);
1881 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1884 card->info.max_mtu = mtu;
1885 card->info.initial_mtu = mtu;
1886 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1888 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1889 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1890 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1893 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1894 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1896 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1897 card->info.link_type = link_type;
1899 card->info.link_type = 0;
1900 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1904 static int qeth_ulp_enable(struct qeth_card *card)
1908 struct qeth_cmd_buffer *iob;
1910 /*FIXME: trace view callbacks*/
1911 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
1913 iob = qeth_wait_for_buffer(&card->write);
1914 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1916 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1917 (__u8) card->info.portno;
1918 if (card->options.layer2)
1919 if (card->info.type == QETH_CARD_TYPE_OSN)
1920 prot_type = QETH_PROT_OSN2;
1922 prot_type = QETH_PROT_LAYER2;
1924 prot_type = QETH_PROT_TCPIP;
1926 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1927 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1928 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1929 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1930 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1931 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1932 card->info.portname, 9);
1933 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1934 qeth_ulp_enable_cb, NULL);
1939 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1942 struct qeth_cmd_buffer *iob;
1944 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
1946 iob = (struct qeth_cmd_buffer *) data;
1947 memcpy(&card->token.ulp_connection_r,
1948 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1949 QETH_MPC_TOKEN_LENGTH);
1950 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1954 static int qeth_ulp_setup(struct qeth_card *card)
1958 struct qeth_cmd_buffer *iob;
1959 struct ccw_dev_id dev_id;
1961 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
1963 iob = qeth_wait_for_buffer(&card->write);
1964 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
1966 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
1967 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1968 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
1969 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
1970 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
1971 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
1973 ccw_device_get_id(CARD_DDEV(card), &dev_id);
1974 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
1975 temp = (card->info.cula << 8) + card->info.unit_addr2;
1976 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
1977 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
1978 qeth_ulp_setup_cb, NULL);
1982 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
1986 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
1988 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
1989 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
1992 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
1994 if (!card->qdio.in_q)
1996 QETH_DBF_TEXT(SETUP, 2, "inq");
1997 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
1998 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
1999 /* give inbound qeth_qdio_buffers their qdio_buffers */
2000 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2001 card->qdio.in_q->bufs[i].buffer =
2002 &card->qdio.in_q->qdio_bufs[i];
2003 /* inbound buffer pool */
2004 if (qeth_alloc_buffer_pool(card))
2008 kmalloc(card->qdio.no_out_queues *
2009 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2010 if (!card->qdio.out_qs)
2012 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2013 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2015 if (!card->qdio.out_qs[i])
2017 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2018 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2019 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2020 card->qdio.out_qs[i]->queue_no = i;
2021 /* give outbound qeth_qdio_buffers their qdio_buffers */
2022 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2023 card->qdio.out_qs[i]->bufs[j].buffer =
2024 &card->qdio.out_qs[i]->qdio_bufs[j];
2025 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2028 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2029 &qdio_out_skb_queue_key);
2030 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2037 kfree(card->qdio.out_qs[--i]);
2038 kfree(card->qdio.out_qs);
2039 card->qdio.out_qs = NULL;
2041 qeth_free_buffer_pool(card);
2043 kfree(card->qdio.in_q);
2044 card->qdio.in_q = NULL;
2046 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2050 static void qeth_create_qib_param_field(struct qeth_card *card,
2054 param_field[0] = _ascebc['P'];
2055 param_field[1] = _ascebc['C'];
2056 param_field[2] = _ascebc['I'];
2057 param_field[3] = _ascebc['T'];
2058 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card);
2059 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card);
2060 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card);
2063 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2066 param_field[16] = _ascebc['B'];
2067 param_field[17] = _ascebc['L'];
2068 param_field[18] = _ascebc['K'];
2069 param_field[19] = _ascebc['T'];
2070 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total;
2071 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet;
2072 *((unsigned int *) (¶m_field[28])) =
2073 card->info.blkt.inter_packet_jumbo;
2076 static int qeth_qdio_activate(struct qeth_card *card)
2078 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2079 return qdio_activate(CARD_DDEV(card), 0);
2082 static int qeth_dm_act(struct qeth_card *card)
2085 struct qeth_cmd_buffer *iob;
2087 QETH_DBF_TEXT(SETUP, 2, "dmact");
2089 iob = qeth_wait_for_buffer(&card->write);
2090 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2092 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2093 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2094 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2095 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2096 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2100 static int qeth_mpc_initialize(struct qeth_card *card)
2104 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2106 rc = qeth_issue_next_read(card);
2108 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2111 rc = qeth_cm_enable(card);
2113 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2116 rc = qeth_cm_setup(card);
2118 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2121 rc = qeth_ulp_enable(card);
2123 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2126 rc = qeth_ulp_setup(card);
2128 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2131 rc = qeth_alloc_qdio_buffers(card);
2133 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2136 rc = qeth_qdio_establish(card);
2138 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2139 qeth_free_qdio_buffers(card);
2142 rc = qeth_qdio_activate(card);
2144 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2147 rc = qeth_dm_act(card);
2149 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2155 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2159 static void qeth_print_status_with_portname(struct qeth_card *card)
2164 sprintf(dbf_text, "%s", card->info.portname + 1);
2165 for (i = 0; i < 8; i++)
2167 (char) _ebcasc[(__u8) dbf_text[i]];
2169 PRINT_INFO("Device %s/%s/%s is a%s card%s%s%s\n"
2170 "with link type %s (portname: %s)\n",
2174 qeth_get_cardname(card),
2175 (card->info.mcl_level[0]) ? " (level: " : "",
2176 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2177 (card->info.mcl_level[0]) ? ")" : "",
2178 qeth_get_cardname_short(card),
2183 static void qeth_print_status_no_portname(struct qeth_card *card)
2185 if (card->info.portname[0])
2186 PRINT_INFO("Device %s/%s/%s is a%s "
2187 "card%s%s%s\nwith link type %s "
2188 "(no portname needed by interface).\n",
2192 qeth_get_cardname(card),
2193 (card->info.mcl_level[0]) ? " (level: " : "",
2194 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2195 (card->info.mcl_level[0]) ? ")" : "",
2196 qeth_get_cardname_short(card));
2198 PRINT_INFO("Device %s/%s/%s is a%s "
2199 "card%s%s%s\nwith link type %s.\n",
2203 qeth_get_cardname(card),
2204 (card->info.mcl_level[0]) ? " (level: " : "",
2205 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2206 (card->info.mcl_level[0]) ? ")" : "",
2207 qeth_get_cardname_short(card));
2210 void qeth_print_status_message(struct qeth_card *card)
2212 switch (card->info.type) {
2213 case QETH_CARD_TYPE_OSAE:
2214 /* VM will use a non-zero first character
2215 * to indicate a HiperSockets like reporting
2216 * of the level OSA sets the first character to zero
2218 if (!card->info.mcl_level[0]) {
2219 sprintf(card->info.mcl_level, "%02x%02x",
2220 card->info.mcl_level[2],
2221 card->info.mcl_level[3]);
2223 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2227 case QETH_CARD_TYPE_IQD:
2228 if (card->info.guestlan) {
2229 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2230 card->info.mcl_level[0]];
2231 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2232 card->info.mcl_level[1]];
2233 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2234 card->info.mcl_level[2]];
2235 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2236 card->info.mcl_level[3]];
2237 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2241 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2243 if (card->info.portname_required)
2244 qeth_print_status_with_portname(card);
2246 qeth_print_status_no_portname(card);
2248 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2250 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2252 struct qeth_buffer_pool_entry *entry;
2254 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
2256 list_for_each_entry(entry,
2257 &card->qdio.init_pool.entry_list, init_list) {
2258 qeth_put_buffer_pool_entry(card, entry);
2262 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2263 struct qeth_card *card)
2265 struct list_head *plh;
2266 struct qeth_buffer_pool_entry *entry;
2270 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2273 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2274 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2276 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2277 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2283 list_del_init(&entry->list);
2288 /* no free buffer in pool so take first one and swap pages */
2289 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2290 struct qeth_buffer_pool_entry, list);
2291 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2292 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2293 page = alloc_page(GFP_ATOMIC);
2297 free_page((unsigned long)entry->elements[i]);
2298 entry->elements[i] = page_address(page);
2299 if (card->options.performance_stats)
2300 card->perf_stats.sg_alloc_page_rx++;
2304 list_del_init(&entry->list);
2308 static int qeth_init_input_buffer(struct qeth_card *card,
2309 struct qeth_qdio_buffer *buf)
2311 struct qeth_buffer_pool_entry *pool_entry;
2314 pool_entry = qeth_find_free_buffer_pool_entry(card);
2319 * since the buffer is accessed only from the input_tasklet
2320 * there shouldn't be a need to synchronize; also, since we use
2321 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2324 BUG_ON(!pool_entry);
2326 buf->pool_entry = pool_entry;
2327 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2328 buf->buffer->element[i].length = PAGE_SIZE;
2329 buf->buffer->element[i].addr = pool_entry->elements[i];
2330 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2331 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2333 buf->buffer->element[i].flags = 0;
2338 int qeth_init_qdio_queues(struct qeth_card *card)
2343 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2346 memset(card->qdio.in_q->qdio_bufs, 0,
2347 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2348 qeth_initialize_working_pool_list(card);
2349 /*give only as many buffers to hardware as we have buffer pool entries*/
2350 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2351 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2352 card->qdio.in_q->next_buf_to_init =
2353 card->qdio.in_buf_pool.buf_count - 1;
2354 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2355 card->qdio.in_buf_pool.buf_count - 1, NULL);
2357 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2360 rc = qdio_synchronize(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0);
2362 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2365 /* outbound queue */
2366 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2367 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2368 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2369 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2370 qeth_clear_output_buffer(card->qdio.out_qs[i],
2371 &card->qdio.out_qs[i]->bufs[j]);
2373 card->qdio.out_qs[i]->card = card;
2374 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2375 card->qdio.out_qs[i]->do_pack = 0;
2376 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2377 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2378 atomic_set(&card->qdio.out_qs[i]->state,
2379 QETH_OUT_Q_UNLOCKED);
2383 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2385 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2387 switch (link_type) {
2388 case QETH_LINK_TYPE_HSTR:
2395 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2396 struct qeth_ipa_cmd *cmd, __u8 command,
2397 enum qeth_prot_versions prot)
2399 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2400 cmd->hdr.command = command;
2401 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2402 cmd->hdr.seqno = card->seqno.ipa;
2403 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2404 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2405 if (card->options.layer2)
2406 cmd->hdr.prim_version_no = 2;
2408 cmd->hdr.prim_version_no = 1;
2409 cmd->hdr.param_count = 1;
2410 cmd->hdr.prot_version = prot;
2411 cmd->hdr.ipa_supported = 0;
2412 cmd->hdr.ipa_enabled = 0;
2415 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2416 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2418 struct qeth_cmd_buffer *iob;
2419 struct qeth_ipa_cmd *cmd;
2421 iob = qeth_wait_for_buffer(&card->write);
2422 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2423 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2427 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2429 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2432 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2433 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2434 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2435 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2437 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2439 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2440 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2447 QETH_DBF_TEXT(TRACE, 4, "sendipa");
2449 if (card->options.layer2)
2450 if (card->info.type == QETH_CARD_TYPE_OSN)
2451 prot_type = QETH_PROT_OSN2;
2453 prot_type = QETH_PROT_LAYER2;
2455 prot_type = QETH_PROT_TCPIP;
2456 qeth_prepare_ipa_cmd(card, iob, prot_type);
2457 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2458 iob, reply_cb, reply_param);
2461 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2463 static int qeth_send_startstoplan(struct qeth_card *card,
2464 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2467 struct qeth_cmd_buffer *iob;
2469 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2470 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2475 int qeth_send_startlan(struct qeth_card *card)
2479 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2481 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2484 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2486 int qeth_send_stoplan(struct qeth_card *card)
2491 * TODO: according to the IPA format document page 14,
2492 * TCP/IP (we!) never issue a STOPLAN
2495 QETH_DBF_TEXT(SETUP, 2, "stoplan");
2497 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2500 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2502 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2503 struct qeth_reply *reply, unsigned long data)
2505 struct qeth_ipa_cmd *cmd;
2507 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
2509 cmd = (struct qeth_ipa_cmd *) data;
2510 if (cmd->hdr.return_code == 0)
2511 cmd->hdr.return_code =
2512 cmd->data.setadapterparms.hdr.return_code;
2515 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2517 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2518 struct qeth_reply *reply, unsigned long data)
2520 struct qeth_ipa_cmd *cmd;
2522 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
2524 cmd = (struct qeth_ipa_cmd *) data;
2525 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2526 card->info.link_type =
2527 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2528 card->options.adp.supported_funcs =
2529 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2530 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2533 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2534 __u32 command, __u32 cmdlen)
2536 struct qeth_cmd_buffer *iob;
2537 struct qeth_ipa_cmd *cmd;
2539 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2541 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2542 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2543 cmd->data.setadapterparms.hdr.command_code = command;
2544 cmd->data.setadapterparms.hdr.used_total = 1;
2545 cmd->data.setadapterparms.hdr.seq_no = 1;
2549 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2551 int qeth_query_setadapterparms(struct qeth_card *card)
2554 struct qeth_cmd_buffer *iob;
2556 QETH_DBF_TEXT(TRACE, 3, "queryadp");
2557 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2558 sizeof(struct qeth_ipacmd_setadpparms));
2559 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2562 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2564 int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
2565 unsigned int siga_error, const char *dbftext)
2567 if (qdio_error || siga_error) {
2568 QETH_DBF_TEXT(TRACE, 2, dbftext);
2569 QETH_DBF_TEXT(QERR, 2, dbftext);
2570 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
2571 buf->element[15].flags & 0xff);
2572 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
2573 buf->element[14].flags & 0xff);
2574 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
2575 QETH_DBF_TEXT_(QERR, 2, " serr=%X", siga_error);
2580 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2582 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2584 struct qeth_qdio_q *queue = card->qdio.in_q;
2590 count = (index < queue->next_buf_to_init)?
2591 card->qdio.in_buf_pool.buf_count -
2592 (queue->next_buf_to_init - index) :
2593 card->qdio.in_buf_pool.buf_count -
2594 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2595 /* only requeue at a certain threshold to avoid SIGAs */
2596 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2597 for (i = queue->next_buf_to_init;
2598 i < queue->next_buf_to_init + count; ++i) {
2599 if (qeth_init_input_buffer(card,
2600 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2607 if (newcount < count) {
2608 /* we are in memory shortage so we switch back to
2609 traditional skb allocation and drop packages */
2610 if (!atomic_read(&card->force_alloc_skb) &&
2612 PRINT_WARN("Switch to alloc skb\n");
2613 atomic_set(&card->force_alloc_skb, 3);
2616 if ((atomic_read(&card->force_alloc_skb) == 1) &&
2618 PRINT_WARN("Switch to sg\n");
2619 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2623 * according to old code it should be avoided to requeue all
2624 * 128 buffers in order to benefit from PCI avoidance.
2625 * this function keeps at least one buffer (the buffer at
2626 * 'index') un-requeued -> this buffer is the first buffer that
2627 * will be requeued the next time
2629 if (card->options.performance_stats) {
2630 card->perf_stats.inbound_do_qdio_cnt++;
2631 card->perf_stats.inbound_do_qdio_start_time =
2634 rc = do_QDIO(CARD_DDEV(card),
2635 QDIO_FLAG_SYNC_INPUT | QDIO_FLAG_UNDER_INTERRUPT,
2636 0, queue->next_buf_to_init, count, NULL);
2637 if (card->options.performance_stats)
2638 card->perf_stats.inbound_do_qdio_time +=
2640 card->perf_stats.inbound_do_qdio_start_time;
2642 PRINT_WARN("qeth_queue_input_buffer's do_QDIO "
2643 "return %i (device %s).\n",
2644 rc, CARD_DDEV_ID(card));
2645 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2646 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2648 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2649 QDIO_MAX_BUFFERS_PER_Q;
2652 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2654 static int qeth_handle_send_error(struct qeth_card *card,
2655 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err,
2656 unsigned int siga_err)
2658 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2659 int cc = siga_err & 3;
2661 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
2662 qeth_check_qdio_errors(buffer->buffer, qdio_err, siga_err, "qouterr");
2666 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2667 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2668 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
2669 (u16)qdio_err, (u8)sbalf15);
2670 return QETH_SEND_ERROR_LINK_FAILURE;
2672 return QETH_SEND_ERROR_NONE;
2674 if (siga_err & QDIO_SIGA_ERROR_B_BIT_SET) {
2675 QETH_DBF_TEXT(TRACE, 1, "SIGAcc2B");
2676 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2677 return QETH_SEND_ERROR_KICK_IT;
2679 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2680 return QETH_SEND_ERROR_RETRY;
2681 return QETH_SEND_ERROR_LINK_FAILURE;
2682 /* look at qdio_error and sbalf 15 */
2684 QETH_DBF_TEXT(TRACE, 1, "SIGAcc1");
2685 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2686 return QETH_SEND_ERROR_LINK_FAILURE;
2689 QETH_DBF_TEXT(TRACE, 1, "SIGAcc3");
2690 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2691 return QETH_SEND_ERROR_KICK_IT;
2696 * Switched to packing state if the number of used buffers on a queue
2697 * reaches a certain limit.
2699 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2701 if (!queue->do_pack) {
2702 if (atomic_read(&queue->used_buffers)
2703 >= QETH_HIGH_WATERMARK_PACK){
2704 /* switch non-PACKING -> PACKING */
2705 QETH_DBF_TEXT(TRACE, 6, "np->pack");
2706 if (queue->card->options.performance_stats)
2707 queue->card->perf_stats.sc_dp_p++;
2714 * Switches from packing to non-packing mode. If there is a packing
2715 * buffer on the queue this buffer will be prepared to be flushed.
2716 * In that case 1 is returned to inform the caller. If no buffer
2717 * has to be flushed, zero is returned.
2719 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2721 struct qeth_qdio_out_buffer *buffer;
2722 int flush_count = 0;
2724 if (queue->do_pack) {
2725 if (atomic_read(&queue->used_buffers)
2726 <= QETH_LOW_WATERMARK_PACK) {
2727 /* switch PACKING -> non-PACKING */
2728 QETH_DBF_TEXT(TRACE, 6, "pack->np");
2729 if (queue->card->options.performance_stats)
2730 queue->card->perf_stats.sc_p_dp++;
2732 /* flush packing buffers */
2733 buffer = &queue->bufs[queue->next_buf_to_fill];
2734 if ((atomic_read(&buffer->state) ==
2735 QETH_QDIO_BUF_EMPTY) &&
2736 (buffer->next_element_to_fill > 0)) {
2737 atomic_set(&buffer->state,
2738 QETH_QDIO_BUF_PRIMED);
2740 queue->next_buf_to_fill =
2741 (queue->next_buf_to_fill + 1) %
2742 QDIO_MAX_BUFFERS_PER_Q;
2750 * Called to flush a packing buffer if no more pci flags are on the queue.
2751 * Checks if there is a packing buffer and prepares it to be flushed.
2752 * In that case returns 1, otherwise zero.
2754 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2756 struct qeth_qdio_out_buffer *buffer;
2758 buffer = &queue->bufs[queue->next_buf_to_fill];
2759 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2760 (buffer->next_element_to_fill > 0)) {
2761 /* it's a packing buffer */
2762 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2763 queue->next_buf_to_fill =
2764 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2770 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int under_int,
2771 int index, int count)
2773 struct qeth_qdio_out_buffer *buf;
2776 unsigned int qdio_flags;
2778 for (i = index; i < index + count; ++i) {
2779 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2780 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2781 SBAL_FLAGS_LAST_ENTRY;
2783 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2786 if (!queue->do_pack) {
2787 if ((atomic_read(&queue->used_buffers) >=
2788 (QETH_HIGH_WATERMARK_PACK -
2789 QETH_WATERMARK_PACK_FUZZ)) &&
2790 !atomic_read(&queue->set_pci_flags_count)) {
2791 /* it's likely that we'll go to packing
2793 atomic_inc(&queue->set_pci_flags_count);
2794 buf->buffer->element[0].flags |= 0x40;
2797 if (!atomic_read(&queue->set_pci_flags_count)) {
2799 * there's no outstanding PCI any more, so we
2800 * have to request a PCI to be sure the the PCI
2801 * will wake at some time in the future then we
2802 * can flush packed buffers that might still be
2803 * hanging around, which can happen if no
2804 * further send was requested by the stack
2806 atomic_inc(&queue->set_pci_flags_count);
2807 buf->buffer->element[0].flags |= 0x40;
2812 queue->card->dev->trans_start = jiffies;
2813 if (queue->card->options.performance_stats) {
2814 queue->card->perf_stats.outbound_do_qdio_cnt++;
2815 queue->card->perf_stats.outbound_do_qdio_start_time =
2818 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2820 qdio_flags |= QDIO_FLAG_UNDER_INTERRUPT;
2821 if (atomic_read(&queue->set_pci_flags_count))
2822 qdio_flags |= QDIO_FLAG_PCI_OUT;
2823 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2824 queue->queue_no, index, count, NULL);
2825 if (queue->card->options.performance_stats)
2826 queue->card->perf_stats.outbound_do_qdio_time +=
2828 queue->card->perf_stats.outbound_do_qdio_start_time;
2830 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2831 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2832 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
2833 queue->card->stats.tx_errors += count;
2834 /* this must not happen under normal circumstances. if it
2835 * happens something is really wrong -> recover */
2836 qeth_schedule_recovery(queue->card);
2839 atomic_add(count, &queue->used_buffers);
2840 if (queue->card->options.performance_stats)
2841 queue->card->perf_stats.bufs_sent += count;
2844 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2848 int q_was_packing = 0;
2851 * check if weed have to switch to non-packing mode or if
2852 * we have to get a pci flag out on the queue
2854 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2855 !atomic_read(&queue->set_pci_flags_count)) {
2856 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2857 QETH_OUT_Q_UNLOCKED) {
2859 * If we get in here, there was no action in
2860 * do_send_packet. So, we check if there is a
2861 * packing buffer to be flushed here.
2863 netif_stop_queue(queue->card->dev);
2864 index = queue->next_buf_to_fill;
2865 q_was_packing = queue->do_pack;
2866 /* queue->do_pack may change */
2868 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2870 !atomic_read(&queue->set_pci_flags_count))
2872 qeth_flush_buffers_on_no_pci(queue);
2873 if (queue->card->options.performance_stats &&
2875 queue->card->perf_stats.bufs_sent_pack +=
2878 qeth_flush_buffers(queue, 1, index, flush_cnt);
2879 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2884 void qeth_qdio_output_handler(struct ccw_device *ccwdev, unsigned int status,
2885 unsigned int qdio_error, unsigned int siga_error,
2886 unsigned int __queue, int first_element, int count,
2887 unsigned long card_ptr)
2889 struct qeth_card *card = (struct qeth_card *) card_ptr;
2890 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2891 struct qeth_qdio_out_buffer *buffer;
2894 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
2895 if (status & QDIO_STATUS_LOOK_FOR_ERROR) {
2896 if (status & QDIO_STATUS_ACTIVATE_CHECK_CONDITION) {
2897 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2898 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2899 QETH_DBF_TEXT_(TRACE, 2, "%08x", status);
2900 netif_stop_queue(card->dev);
2901 qeth_schedule_recovery(card);
2905 if (card->options.performance_stats) {
2906 card->perf_stats.outbound_handler_cnt++;
2907 card->perf_stats.outbound_handler_start_time =
2910 for (i = first_element; i < (first_element + count); ++i) {
2911 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2912 /*we only handle the KICK_IT error by doing a recovery */
2913 if (qeth_handle_send_error(card, buffer,
2914 qdio_error, siga_error)
2915 == QETH_SEND_ERROR_KICK_IT){
2916 netif_stop_queue(card->dev);
2917 qeth_schedule_recovery(card);
2920 qeth_clear_output_buffer(queue, buffer);
2922 atomic_sub(count, &queue->used_buffers);
2923 /* check if we need to do something on this outbound queue */
2924 if (card->info.type != QETH_CARD_TYPE_IQD)
2925 qeth_check_outbound_queue(queue);
2927 netif_wake_queue(queue->card->dev);
2928 if (card->options.performance_stats)
2929 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2930 card->perf_stats.outbound_handler_start_time;
2932 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2934 int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb)
2936 int cast_type = RTN_UNSPEC;
2938 if (card->info.type == QETH_CARD_TYPE_OSN)
2941 if (skb->dst && skb->dst->neighbour) {
2942 cast_type = skb->dst->neighbour->type;
2943 if ((cast_type == RTN_BROADCAST) ||
2944 (cast_type == RTN_MULTICAST) ||
2945 (cast_type == RTN_ANYCAST))
2950 /* try something else */
2951 if (skb->protocol == ETH_P_IPV6)
2952 return (skb_network_header(skb)[24] == 0xff) ?
2954 else if (skb->protocol == ETH_P_IP)
2955 return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ?
2958 if (!memcmp(skb->data, skb->dev->broadcast, 6))
2959 return RTN_BROADCAST;
2963 hdr_mac = *((u16 *)skb->data);
2965 switch (card->info.link_type) {
2966 case QETH_LINK_TYPE_HSTR:
2967 case QETH_LINK_TYPE_LANE_TR:
2968 if ((hdr_mac == QETH_TR_MAC_NC) ||
2969 (hdr_mac == QETH_TR_MAC_C))
2970 return RTN_MULTICAST;
2972 /* eth or so multicast? */
2974 if ((hdr_mac == QETH_ETH_MAC_V4) ||
2975 (hdr_mac == QETH_ETH_MAC_V6))
2976 return RTN_MULTICAST;
2981 EXPORT_SYMBOL_GPL(qeth_get_cast_type);
2983 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2984 int ipv, int cast_type)
2986 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
2987 return card->qdio.default_out_queue;
2988 switch (card->qdio.no_out_queues) {
2990 if (cast_type && card->info.is_multicast_different)
2991 return card->info.is_multicast_different &
2992 (card->qdio.no_out_queues - 1);
2993 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2994 const u8 tos = ip_hdr(skb)->tos;
2996 if (card->qdio.do_prio_queueing ==
2997 QETH_PRIO_Q_ING_TOS) {
2998 if (tos & IP_TOS_NOTIMPORTANT)
3000 if (tos & IP_TOS_HIGHRELIABILITY)
3002 if (tos & IP_TOS_HIGHTHROUGHPUT)
3004 if (tos & IP_TOS_LOWDELAY)
3007 if (card->qdio.do_prio_queueing ==
3008 QETH_PRIO_Q_ING_PREC)
3009 return 3 - (tos >> 6);
3010 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3013 return card->qdio.default_out_queue;
3014 case 1: /* fallthrough for single-out-queue 1920-device */
3016 return card->qdio.default_out_queue;
3019 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3021 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3022 struct sk_buff *skb, int elems)
3024 int elements_needed = 0;
3026 if (skb_shinfo(skb)->nr_frags > 0)
3027 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
3028 if (elements_needed == 0)
3029 elements_needed = 1 + (((((unsigned long) hdr) % PAGE_SIZE)
3030 + skb->len) >> PAGE_SHIFT);
3031 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3032 PRINT_ERR("Invalid size of IP packet "
3033 "(Number=%d / Length=%d). Discarded.\n",
3034 (elements_needed+elems), skb->len);
3037 return elements_needed;
3039 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3041 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3042 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill)
3044 int length = skb->len;
3050 element = *next_element_to_fill;
3052 first_lap = (is_tso == 0 ? 1 : 0);
3054 while (length > 0) {
3055 /* length_here is the remaining amount of data in this page */
3056 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3057 if (length < length_here)
3058 length_here = length;
3060 buffer->element[element].addr = data;
3061 buffer->element[element].length = length_here;
3062 length -= length_here;
3065 buffer->element[element].flags = 0;
3067 buffer->element[element].flags =
3068 SBAL_FLAGS_LAST_FRAG;
3071 buffer->element[element].flags =
3072 SBAL_FLAGS_FIRST_FRAG;
3074 buffer->element[element].flags =
3075 SBAL_FLAGS_MIDDLE_FRAG;
3077 data += length_here;
3081 *next_element_to_fill = element;
3084 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3085 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb)
3087 struct qdio_buffer *buffer;
3088 struct qeth_hdr_tso *hdr;
3089 int flush_cnt = 0, hdr_len, large_send = 0;
3091 buffer = buf->buffer;
3092 atomic_inc(&skb->users);
3093 skb_queue_tail(&buf->skb_list, skb);
3095 hdr = (struct qeth_hdr_tso *) skb->data;
3096 /*check first on TSO ....*/
3097 if (hdr->hdr.hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3098 int element = buf->next_element_to_fill;
3100 hdr_len = sizeof(struct qeth_hdr_tso) + hdr->ext.dg_hdr_len;
3101 /*fill first buffer entry only with header information */
3102 buffer->element[element].addr = skb->data;
3103 buffer->element[element].length = hdr_len;
3104 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3105 buf->next_element_to_fill++;
3106 skb->data += hdr_len;
3107 skb->len -= hdr_len;
3110 if (skb_shinfo(skb)->nr_frags == 0)
3111 __qeth_fill_buffer(skb, buffer, large_send,
3112 (int *)&buf->next_element_to_fill);
3114 __qeth_fill_buffer_frag(skb, buffer, large_send,
3115 (int *)&buf->next_element_to_fill);
3117 if (!queue->do_pack) {
3118 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
3119 /* set state to PRIMED -> will be flushed */
3120 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3123 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
3124 if (queue->card->options.performance_stats)
3125 queue->card->perf_stats.skbs_sent_pack++;
3126 if (buf->next_element_to_fill >=
3127 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3129 * packed buffer if full -> set state PRIMED
3130 * -> will be flushed
3132 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3139 int qeth_do_send_packet_fast(struct qeth_card *card,
3140 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3141 struct qeth_hdr *hdr, int elements_needed,
3142 struct qeth_eddp_context *ctx)
3144 struct qeth_qdio_out_buffer *buffer;
3145 int buffers_needed = 0;
3149 /* spin until we get the queue ... */
3150 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3151 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3152 /* ... now we've got the queue */
3153 index = queue->next_buf_to_fill;
3154 buffer = &queue->bufs[queue->next_buf_to_fill];
3156 * check if buffer is empty to make sure that we do not 'overtake'
3157 * ourselves and try to fill a buffer that is already primed
3159 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3162 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3163 QDIO_MAX_BUFFERS_PER_Q;
3165 buffers_needed = qeth_eddp_check_buffers_for_context(queue,
3167 if (buffers_needed < 0)
3169 queue->next_buf_to_fill =
3170 (queue->next_buf_to_fill + buffers_needed) %
3171 QDIO_MAX_BUFFERS_PER_Q;
3173 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3175 qeth_fill_buffer(queue, buffer, skb);
3176 qeth_flush_buffers(queue, 0, index, 1);
3178 flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index);
3179 WARN_ON(buffers_needed != flush_cnt);
3180 qeth_flush_buffers(queue, 0, index, flush_cnt);
3184 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3187 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3189 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3190 struct sk_buff *skb, struct qeth_hdr *hdr,
3191 int elements_needed, struct qeth_eddp_context *ctx)
3193 struct qeth_qdio_out_buffer *buffer;
3195 int flush_count = 0;
3200 /* spin until we get the queue ... */
3201 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3202 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3203 start_index = queue->next_buf_to_fill;
3204 buffer = &queue->bufs[queue->next_buf_to_fill];
3206 * check if buffer is empty to make sure that we do not 'overtake'
3207 * ourselves and try to fill a buffer that is already primed
3209 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3210 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3213 /* check if we need to switch packing state of this queue */
3214 qeth_switch_to_packing_if_needed(queue);
3215 if (queue->do_pack) {
3218 /* does packet fit in current buffer? */
3219 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3220 buffer->next_element_to_fill) < elements_needed) {
3221 /* ... no -> set state PRIMED */
3222 atomic_set(&buffer->state,
3223 QETH_QDIO_BUF_PRIMED);
3225 queue->next_buf_to_fill =
3226 (queue->next_buf_to_fill + 1) %
3227 QDIO_MAX_BUFFERS_PER_Q;
3228 buffer = &queue->bufs[queue->next_buf_to_fill];
3229 /* we did a step forward, so check buffer state
3231 if (atomic_read(&buffer->state) !=
3232 QETH_QDIO_BUF_EMPTY){
3233 qeth_flush_buffers(queue, 0,
3234 start_index, flush_count);
3235 atomic_set(&queue->state,
3236 QETH_OUT_Q_UNLOCKED);
3241 /* check if we have enough elements (including following
3242 * free buffers) to handle eddp context */
3243 if (qeth_eddp_check_buffers_for_context(queue, ctx)
3245 if (net_ratelimit())
3246 PRINT_WARN("eddp tx_dropped 1\n");
3253 tmp = qeth_fill_buffer(queue, buffer, skb);
3255 tmp = qeth_eddp_fill_buffer(queue, ctx,
3256 queue->next_buf_to_fill);
3258 PRINT_ERR("eddp tx_dropped 2\n");
3263 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3264 QDIO_MAX_BUFFERS_PER_Q;
3268 qeth_flush_buffers(queue, 0, start_index, flush_count);
3269 else if (!atomic_read(&queue->set_pci_flags_count))
3270 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3272 * queue->state will go from LOCKED -> UNLOCKED or from
3273 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3274 * (switch packing state or flush buffer to get another pci flag out).
3275 * In that case we will enter this loop
3277 while (atomic_dec_return(&queue->state)) {
3279 start_index = queue->next_buf_to_fill;
3280 /* check if we can go back to non-packing state */
3281 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3283 * check if we need to flush a packing buffer to get a pci
3284 * flag out on the queue
3286 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3287 flush_count += qeth_flush_buffers_on_no_pci(queue);
3289 qeth_flush_buffers(queue, 0, start_index, flush_count);
3291 /* at this point the queue is UNLOCKED again */
3292 if (queue->card->options.performance_stats && do_pack)
3293 queue->card->perf_stats.bufs_sent_pack += flush_count;
3297 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3299 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3300 struct qeth_reply *reply, unsigned long data)
3302 struct qeth_ipa_cmd *cmd;
3303 struct qeth_ipacmd_setadpparms *setparms;
3305 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
3307 cmd = (struct qeth_ipa_cmd *) data;
3308 setparms = &(cmd->data.setadapterparms);
3310 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3311 if (cmd->hdr.return_code) {
3312 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
3313 setparms->data.mode = SET_PROMISC_MODE_OFF;
3315 card->info.promisc_mode = setparms->data.mode;
3319 void qeth_setadp_promisc_mode(struct qeth_card *card)
3321 enum qeth_ipa_promisc_modes mode;
3322 struct net_device *dev = card->dev;
3323 struct qeth_cmd_buffer *iob;
3324 struct qeth_ipa_cmd *cmd;
3326 QETH_DBF_TEXT(TRACE, 4, "setprom");
3328 if (((dev->flags & IFF_PROMISC) &&
3329 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3330 (!(dev->flags & IFF_PROMISC) &&
3331 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3333 mode = SET_PROMISC_MODE_OFF;
3334 if (dev->flags & IFF_PROMISC)
3335 mode = SET_PROMISC_MODE_ON;
3336 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
3338 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3339 sizeof(struct qeth_ipacmd_setadpparms));
3340 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3341 cmd->data.setadapterparms.data.mode = mode;
3342 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3344 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3346 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3348 struct qeth_card *card;
3351 card = netdev_priv(dev);
3353 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
3354 sprintf(dbf_text, "%8x", new_mtu);
3355 QETH_DBF_TEXT(TRACE, 4, dbf_text);
3359 if (new_mtu > 65535)
3361 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3362 (!qeth_mtu_is_valid(card, new_mtu)))
3367 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3369 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3371 struct qeth_card *card;
3373 card = netdev_priv(dev);
3375 QETH_DBF_TEXT(TRACE, 5, "getstat");
3377 return &card->stats;
3379 EXPORT_SYMBOL_GPL(qeth_get_stats);
3381 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3382 struct qeth_reply *reply, unsigned long data)
3384 struct qeth_ipa_cmd *cmd;
3386 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
3388 cmd = (struct qeth_ipa_cmd *) data;
3389 if (!card->options.layer2 ||
3390 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3391 memcpy(card->dev->dev_addr,
3392 &cmd->data.setadapterparms.data.change_addr.addr,
3394 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3396 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3400 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3403 struct qeth_cmd_buffer *iob;
3404 struct qeth_ipa_cmd *cmd;
3406 QETH_DBF_TEXT(TRACE, 4, "chgmac");
3408 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3409 sizeof(struct qeth_ipacmd_setadpparms));
3410 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3411 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3412 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3413 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3414 card->dev->dev_addr, OSA_ADDR_LEN);
3415 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3419 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3421 void qeth_tx_timeout(struct net_device *dev)
3423 struct qeth_card *card;
3425 card = netdev_priv(dev);
3426 card->stats.tx_errors++;
3427 qeth_schedule_recovery(card);
3429 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3431 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3433 struct qeth_card *card = netdev_priv(dev);
3437 case MII_BMCR: /* Basic mode control register */
3439 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3440 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3441 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3442 rc |= BMCR_SPEED100;
3444 case MII_BMSR: /* Basic mode status register */
3445 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3446 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3449 case MII_PHYSID1: /* PHYS ID 1 */
3450 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3452 rc = (rc >> 5) & 0xFFFF;
3454 case MII_PHYSID2: /* PHYS ID 2 */
3455 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3457 case MII_ADVERTISE: /* Advertisement control reg */
3460 case MII_LPA: /* Link partner ability reg */
3461 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3462 LPA_100BASE4 | LPA_LPACK;
3464 case MII_EXPANSION: /* Expansion register */
3466 case MII_DCOUNTER: /* disconnect counter */
3468 case MII_FCSCOUNTER: /* false carrier counter */
3470 case MII_NWAYTEST: /* N-way auto-neg test register */
3472 case MII_RERRCOUNTER: /* rx error counter */
3473 rc = card->stats.rx_errors;
3475 case MII_SREVISION: /* silicon revision */
3477 case MII_RESV1: /* reserved 1 */
3479 case MII_LBRERROR: /* loopback, rx, bypass error */
3481 case MII_PHYADDR: /* physical address */
3483 case MII_RESV2: /* reserved 2 */
3485 case MII_TPISTATUS: /* TPI status for 10mbps */
3487 case MII_NCONFIG: /* network interface config */
3494 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3496 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3497 struct qeth_cmd_buffer *iob, int len,
3498 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3504 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
3506 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3507 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3508 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3509 /* adjust PDU length fields in IPA_PDU_HEADER */
3510 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3512 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3513 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3514 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3515 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3516 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3517 reply_cb, reply_param);
3520 static int qeth_snmp_command_cb(struct qeth_card *card,
3521 struct qeth_reply *reply, unsigned long sdata)
3523 struct qeth_ipa_cmd *cmd;
3524 struct qeth_arp_query_info *qinfo;
3525 struct qeth_snmp_cmd *snmp;
3526 unsigned char *data;
3529 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
3531 cmd = (struct qeth_ipa_cmd *) sdata;
3532 data = (unsigned char *)((char *)cmd - reply->offset);
3533 qinfo = (struct qeth_arp_query_info *) reply->param;
3534 snmp = &cmd->data.setadapterparms.data.snmp;
3536 if (cmd->hdr.return_code) {
3537 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
3540 if (cmd->data.setadapterparms.hdr.return_code) {
3541 cmd->hdr.return_code =
3542 cmd->data.setadapterparms.hdr.return_code;
3543 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
3546 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3547 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3548 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3550 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3552 /* check if there is enough room in userspace */
3553 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3554 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
3555 cmd->hdr.return_code = -ENOMEM;
3558 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
3559 cmd->data.setadapterparms.hdr.used_total);
3560 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
3561 cmd->data.setadapterparms.hdr.seq_no);
3562 /*copy entries to user buffer*/
3563 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3564 memcpy(qinfo->udata + qinfo->udata_offset,
3566 data_len + offsetof(struct qeth_snmp_cmd, data));
3567 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3569 memcpy(qinfo->udata + qinfo->udata_offset,
3570 (char *)&snmp->request, data_len);
3572 qinfo->udata_offset += data_len;
3573 /* check if all replies received ... */
3574 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
3575 cmd->data.setadapterparms.hdr.used_total);
3576 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
3577 cmd->data.setadapterparms.hdr.seq_no);
3578 if (cmd->data.setadapterparms.hdr.seq_no <
3579 cmd->data.setadapterparms.hdr.used_total)
3584 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3586 struct qeth_cmd_buffer *iob;
3587 struct qeth_ipa_cmd *cmd;
3588 struct qeth_snmp_ureq *ureq;
3590 struct qeth_arp_query_info qinfo = {0, };
3593 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
3595 if (card->info.guestlan)
3598 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3599 (!card->options.layer2)) {
3600 PRINT_WARN("SNMP Query MIBS not supported "
3601 "on %s!\n", QETH_CARD_IFNAME(card));
3604 /* skip 4 bytes (data_len struct member) to get req_len */
3605 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3607 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3609 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
3612 if (copy_from_user(ureq, udata,
3613 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3617 qinfo.udata_len = ureq->hdr.data_len;
3618 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3623 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3625 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3626 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3627 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3628 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3629 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3630 qeth_snmp_command_cb, (void *)&qinfo);
3632 PRINT_WARN("SNMP command failed on %s: (0x%x)\n",
3633 QETH_CARD_IFNAME(card), rc);
3635 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3643 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3645 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3647 switch (card->info.type) {
3648 case QETH_CARD_TYPE_IQD:
3655 static int qeth_qdio_establish(struct qeth_card *card)
3657 struct qdio_initialize init_data;
3658 char *qib_param_field;
3659 struct qdio_buffer **in_sbal_ptrs;
3660 struct qdio_buffer **out_sbal_ptrs;
3664 QETH_DBF_TEXT(SETUP, 2, "qdioest");
3666 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3668 if (!qib_param_field)
3671 qeth_create_qib_param_field(card, qib_param_field);
3672 qeth_create_qib_param_field_blkt(card, qib_param_field);
3674 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3676 if (!in_sbal_ptrs) {
3677 kfree(qib_param_field);
3680 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3681 in_sbal_ptrs[i] = (struct qdio_buffer *)
3682 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3685 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3686 sizeof(void *), GFP_KERNEL);
3687 if (!out_sbal_ptrs) {
3688 kfree(in_sbal_ptrs);
3689 kfree(qib_param_field);
3692 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3693 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3694 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3695 card->qdio.out_qs[i]->bufs[j].buffer);
3698 memset(&init_data, 0, sizeof(struct qdio_initialize));
3699 init_data.cdev = CARD_DDEV(card);
3700 init_data.q_format = qeth_get_qdio_q_format(card);
3701 init_data.qib_param_field_format = 0;
3702 init_data.qib_param_field = qib_param_field;
3703 init_data.min_input_threshold = QETH_MIN_INPUT_THRESHOLD;
3704 init_data.max_input_threshold = QETH_MAX_INPUT_THRESHOLD;
3705 init_data.min_output_threshold = QETH_MIN_OUTPUT_THRESHOLD;
3706 init_data.max_output_threshold = QETH_MAX_OUTPUT_THRESHOLD;
3707 init_data.no_input_qs = 1;
3708 init_data.no_output_qs = card->qdio.no_out_queues;
3709 init_data.input_handler = card->discipline.input_handler;
3710 init_data.output_handler = card->discipline.output_handler;
3711 init_data.int_parm = (unsigned long) card;
3712 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3713 QDIO_OUTBOUND_0COPY_SBALS |
3714 QDIO_USE_OUTBOUND_PCIS;
3715 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3716 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3718 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3719 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3720 rc = qdio_initialize(&init_data);
3722 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3724 kfree(out_sbal_ptrs);
3725 kfree(in_sbal_ptrs);
3726 kfree(qib_param_field);
3730 static void qeth_core_free_card(struct qeth_card *card)
3733 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3734 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
3735 qeth_clean_channel(&card->read);
3736 qeth_clean_channel(&card->write);
3738 free_netdev(card->dev);
3739 kfree(card->ip_tbd_list);
3740 qeth_free_qdio_buffers(card);
3744 static struct ccw_device_id qeth_ids[] = {
3745 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3746 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3747 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3750 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3752 static struct ccw_driver qeth_ccw_driver = {
3755 .probe = ccwgroup_probe_ccwdev,
3756 .remove = ccwgroup_remove_ccwdev,
3759 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3760 unsigned long driver_id)
3762 return ccwgroup_create_from_string(root_dev, driver_id,
3763 &qeth_ccw_driver, 3, buf);
3766 int qeth_core_hardsetup_card(struct qeth_card *card)
3772 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
3773 atomic_set(&card->force_alloc_skb, 0);
3776 PRINT_WARN("Retrying to do IDX activates.\n");
3777 ccw_device_set_offline(CARD_DDEV(card));
3778 ccw_device_set_offline(CARD_WDEV(card));
3779 ccw_device_set_offline(CARD_RDEV(card));
3780 ccw_device_set_online(CARD_RDEV(card));
3781 ccw_device_set_online(CARD_WDEV(card));
3782 ccw_device_set_online(CARD_DDEV(card));
3784 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3785 if (rc == -ERESTARTSYS) {
3786 QETH_DBF_TEXT(SETUP, 2, "break1");
3789 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
3796 rc = qeth_get_unitaddr(card);
3798 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
3801 mpno = qdio_get_ssqd_pct(CARD_DDEV(card));
3803 mpno = min(mpno - 1, QETH_MAX_PORTNO);
3804 if (card->info.portno > mpno) {
3805 PRINT_ERR("Device %s does not offer port number %d \n.",
3806 CARD_BUS_ID(card), card->info.portno);
3810 qeth_init_tokens(card);
3811 qeth_init_func_level(card);
3812 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3813 if (rc == -ERESTARTSYS) {
3814 QETH_DBF_TEXT(SETUP, 2, "break2");
3817 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
3823 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3824 if (rc == -ERESTARTSYS) {
3825 QETH_DBF_TEXT(SETUP, 2, "break3");
3828 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
3834 rc = qeth_mpc_initialize(card);
3836 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
3841 PRINT_ERR("Initialization in hardsetup failed! rc=%d\n", rc);
3844 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3846 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3847 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3849 struct page *page = virt_to_page(element->addr);
3850 if (*pskb == NULL) {
3851 /* the upper protocol layers assume that there is data in the
3852 * skb itself. Copy a small amount (64 bytes) to make them
3854 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3857 skb_reserve(*pskb, ETH_HLEN);
3858 if (data_len <= 64) {
3859 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3863 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3864 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3866 (*pskb)->data_len += data_len - 64;
3867 (*pskb)->len += data_len - 64;
3868 (*pskb)->truesize += data_len - 64;
3873 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3874 (*pskb)->data_len += data_len;
3875 (*pskb)->len += data_len;
3876 (*pskb)->truesize += data_len;
3882 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3883 struct qdio_buffer *buffer,
3884 struct qdio_buffer_element **__element, int *__offset,
3885 struct qeth_hdr **hdr)
3887 struct qdio_buffer_element *element = *__element;
3888 int offset = *__offset;
3889 struct sk_buff *skb = NULL;
3897 /* qeth_hdr must not cross element boundaries */
3898 if (element->length < offset + sizeof(struct qeth_hdr)) {
3899 if (qeth_is_last_sbale(element))
3903 if (element->length < sizeof(struct qeth_hdr))
3906 *hdr = element->addr + offset;
3908 offset += sizeof(struct qeth_hdr);
3909 if (card->options.layer2) {
3910 if (card->info.type == QETH_CARD_TYPE_OSN) {
3911 skb_len = (*hdr)->hdr.osn.pdu_length;
3912 headroom = sizeof(struct qeth_hdr);
3914 skb_len = (*hdr)->hdr.l2.pkt_length;
3917 skb_len = (*hdr)->hdr.l3.length;
3918 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
3919 (card->info.link_type == QETH_LINK_TYPE_HSTR))
3922 headroom = ETH_HLEN;
3928 if ((skb_len >= card->options.rx_sg_cb) &&
3929 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
3930 (!atomic_read(&card->force_alloc_skb))) {
3933 skb = dev_alloc_skb(skb_len + headroom);
3937 skb_reserve(skb, headroom);
3940 data_ptr = element->addr + offset;
3942 data_len = min(skb_len, (int)(element->length - offset));
3945 if (qeth_create_skb_frag(element, &skb, offset,
3949 memcpy(skb_put(skb, data_len), data_ptr,
3953 skb_len -= data_len;
3955 if (qeth_is_last_sbale(element)) {
3956 QETH_DBF_TEXT(TRACE, 4, "unexeob");
3957 QETH_DBF_TEXT_(TRACE, 4, "%s",
3959 QETH_DBF_TEXT(QERR, 2, "unexeob");
3960 QETH_DBF_TEXT_(QERR, 2, "%s",
3962 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
3963 dev_kfree_skb_any(skb);
3964 card->stats.rx_errors++;
3969 data_ptr = element->addr;
3974 *__element = element;
3976 if (use_rx_sg && card->options.performance_stats) {
3977 card->perf_stats.sg_skbs_rx++;
3978 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
3982 if (net_ratelimit()) {
3983 PRINT_WARN("No memory for packet received on %s.\n",
3984 QETH_CARD_IFNAME(card));
3985 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
3986 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
3988 card->stats.rx_dropped++;
3991 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
3993 static void qeth_unregister_dbf_views(void)
3996 for (x = 0; x < QETH_DBF_INFOS; x++) {
3997 debug_unregister(qeth_dbf[x].id);
3998 qeth_dbf[x].id = NULL;
4002 void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *text, ...)
4004 char dbf_txt_buf[32];
4006 if (level > (qeth_dbf[dbf_nix].id)->level)
4008 snprintf(dbf_txt_buf, sizeof(dbf_txt_buf), text);
4009 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
4012 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4014 static int qeth_register_dbf_views(void)
4019 for (x = 0; x < QETH_DBF_INFOS; x++) {
4020 /* register the areas */
4021 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4025 if (qeth_dbf[x].id == NULL) {
4026 qeth_unregister_dbf_views();
4030 /* register a view */
4031 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4033 qeth_unregister_dbf_views();
4037 /* set a passing level */
4038 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4044 int qeth_core_load_discipline(struct qeth_card *card,
4045 enum qeth_discipline_id discipline)
4048 switch (discipline) {
4049 case QETH_DISCIPLINE_LAYER3:
4050 card->discipline.ccwgdriver = try_then_request_module(
4051 symbol_get(qeth_l3_ccwgroup_driver),
4054 case QETH_DISCIPLINE_LAYER2:
4055 card->discipline.ccwgdriver = try_then_request_module(
4056 symbol_get(qeth_l2_ccwgroup_driver),
4060 if (!card->discipline.ccwgdriver) {
4061 PRINT_ERR("Support for discipline %d not present\n",
4068 void qeth_core_free_discipline(struct qeth_card *card)
4070 if (card->options.layer2)
4071 symbol_put(qeth_l2_ccwgroup_driver);
4073 symbol_put(qeth_l3_ccwgroup_driver);
4074 card->discipline.ccwgdriver = NULL;
4077 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4079 struct qeth_card *card;
4082 unsigned long flags;
4084 QETH_DBF_TEXT(SETUP, 2, "probedev");
4087 if (!get_device(dev))
4090 QETH_DBF_TEXT_(SETUP, 2, "%s", gdev->dev.bus_id);
4092 card = qeth_alloc_card();
4094 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4098 card->read.ccwdev = gdev->cdev[0];
4099 card->write.ccwdev = gdev->cdev[1];
4100 card->data.ccwdev = gdev->cdev[2];
4101 dev_set_drvdata(&gdev->dev, card);
4103 gdev->cdev[0]->handler = qeth_irq;
4104 gdev->cdev[1]->handler = qeth_irq;
4105 gdev->cdev[2]->handler = qeth_irq;
4107 rc = qeth_determine_card_type(card);
4109 PRINT_WARN("%s: not a valid card type\n", __func__);
4110 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4113 rc = qeth_setup_card(card);
4115 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4119 if (card->info.type == QETH_CARD_TYPE_OSN) {
4120 rc = qeth_core_create_osn_attributes(dev);
4123 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4125 qeth_core_remove_osn_attributes(dev);
4128 rc = card->discipline.ccwgdriver->probe(card->gdev);
4130 qeth_core_free_discipline(card);
4131 qeth_core_remove_osn_attributes(dev);
4135 rc = qeth_core_create_device_attributes(dev);
4140 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4141 list_add_tail(&card->list, &qeth_core_card_list.list);
4142 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4146 qeth_core_free_card(card);
4152 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4154 unsigned long flags;
4155 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4157 if (card->discipline.ccwgdriver) {
4158 card->discipline.ccwgdriver->remove(gdev);
4159 qeth_core_free_discipline(card);
4162 if (card->info.type == QETH_CARD_TYPE_OSN) {
4163 qeth_core_remove_osn_attributes(&gdev->dev);
4165 qeth_core_remove_device_attributes(&gdev->dev);
4167 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4168 list_del(&card->list);
4169 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4170 qeth_core_free_card(card);
4171 dev_set_drvdata(&gdev->dev, NULL);
4172 put_device(&gdev->dev);
4176 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4178 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4182 if (!card->discipline.ccwgdriver) {
4183 if (card->info.type == QETH_CARD_TYPE_IQD)
4184 def_discipline = QETH_DISCIPLINE_LAYER3;
4186 def_discipline = QETH_DISCIPLINE_LAYER2;
4187 rc = qeth_core_load_discipline(card, def_discipline);
4190 rc = card->discipline.ccwgdriver->probe(card->gdev);
4194 rc = card->discipline.ccwgdriver->set_online(gdev);
4199 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4201 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4202 return card->discipline.ccwgdriver->set_offline(gdev);
4205 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4207 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4208 if (card->discipline.ccwgdriver &&
4209 card->discipline.ccwgdriver->shutdown)
4210 card->discipline.ccwgdriver->shutdown(gdev);
4213 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4214 .owner = THIS_MODULE,
4216 .driver_id = 0xD8C5E3C8,
4217 .probe = qeth_core_probe_device,
4218 .remove = qeth_core_remove_device,
4219 .set_online = qeth_core_set_online,
4220 .set_offline = qeth_core_set_offline,
4221 .shutdown = qeth_core_shutdown,
4225 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4229 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4230 qeth_core_ccwgroup_driver.driver_id);
4237 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4240 const char str[ETH_GSTRING_LEN];
4241 } qeth_ethtool_stats_keys[] = {
4246 {"tx skbs no packing"},
4247 {"tx buffers no packing"},
4248 {"tx skbs packing"},
4249 {"tx buffers packing"},
4252 /* 10 */{"rx sg skbs"},
4254 {"rx sg page allocs"},
4255 {"tx large kbytes"},
4257 {"tx pk state ch n->p"},
4258 {"tx pk state ch p->n"},
4259 {"tx pk watermark low"},
4260 {"tx pk watermark high"},
4261 {"queue 0 buffer usage"},
4262 /* 20 */{"queue 1 buffer usage"},
4263 {"queue 2 buffer usage"},
4264 {"queue 3 buffer usage"},
4265 {"rx handler time"},
4266 {"rx handler count"},
4267 {"rx do_QDIO time"},
4268 {"rx do_QDIO count"},
4269 {"tx handler time"},
4270 {"tx handler count"},
4272 /* 30 */{"tx count"},
4273 {"tx do_QDIO time"},
4274 {"tx do_QDIO count"},
4277 int qeth_core_get_stats_count(struct net_device *dev)
4279 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4281 EXPORT_SYMBOL_GPL(qeth_core_get_stats_count);
4283 void qeth_core_get_ethtool_stats(struct net_device *dev,
4284 struct ethtool_stats *stats, u64 *data)
4286 struct qeth_card *card = netdev_priv(dev);
4287 data[0] = card->stats.rx_packets -
4288 card->perf_stats.initial_rx_packets;
4289 data[1] = card->perf_stats.bufs_rec;
4290 data[2] = card->stats.tx_packets -
4291 card->perf_stats.initial_tx_packets;
4292 data[3] = card->perf_stats.bufs_sent;
4293 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4294 - card->perf_stats.skbs_sent_pack;
4295 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4296 data[6] = card->perf_stats.skbs_sent_pack;
4297 data[7] = card->perf_stats.bufs_sent_pack;
4298 data[8] = card->perf_stats.sg_skbs_sent;
4299 data[9] = card->perf_stats.sg_frags_sent;
4300 data[10] = card->perf_stats.sg_skbs_rx;
4301 data[11] = card->perf_stats.sg_frags_rx;
4302 data[12] = card->perf_stats.sg_alloc_page_rx;
4303 data[13] = (card->perf_stats.large_send_bytes >> 10);
4304 data[14] = card->perf_stats.large_send_cnt;
4305 data[15] = card->perf_stats.sc_dp_p;
4306 data[16] = card->perf_stats.sc_p_dp;
4307 data[17] = QETH_LOW_WATERMARK_PACK;
4308 data[18] = QETH_HIGH_WATERMARK_PACK;
4309 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4310 data[20] = (card->qdio.no_out_queues > 1) ?
4311 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4312 data[21] = (card->qdio.no_out_queues > 2) ?
4313 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4314 data[22] = (card->qdio.no_out_queues > 3) ?
4315 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4316 data[23] = card->perf_stats.inbound_time;
4317 data[24] = card->perf_stats.inbound_cnt;
4318 data[25] = card->perf_stats.inbound_do_qdio_time;
4319 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4320 data[27] = card->perf_stats.outbound_handler_time;
4321 data[28] = card->perf_stats.outbound_handler_cnt;
4322 data[29] = card->perf_stats.outbound_time;
4323 data[30] = card->perf_stats.outbound_cnt;
4324 data[31] = card->perf_stats.outbound_do_qdio_time;
4325 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4327 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4329 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4331 switch (stringset) {
4333 memcpy(data, &qeth_ethtool_stats_keys,
4334 sizeof(qeth_ethtool_stats_keys));
4341 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4343 void qeth_core_get_drvinfo(struct net_device *dev,
4344 struct ethtool_drvinfo *info)
4346 struct qeth_card *card = netdev_priv(dev);
4347 if (card->options.layer2)
4348 strcpy(info->driver, "qeth_l2");
4350 strcpy(info->driver, "qeth_l3");
4352 strcpy(info->version, "1.0");
4353 strcpy(info->fw_version, card->info.mcl_level);
4354 sprintf(info->bus_info, "%s/%s/%s",
4357 CARD_DDEV_ID(card));
4359 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4361 int qeth_core_ethtool_get_settings(struct net_device *netdev,
4362 struct ethtool_cmd *ecmd)
4364 struct qeth_card *card = netdev_priv(netdev);
4365 enum qeth_link_types link_type;
4367 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4368 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4370 link_type = card->info.link_type;
4372 ecmd->transceiver = XCVR_INTERNAL;
4373 ecmd->supported = SUPPORTED_Autoneg;
4374 ecmd->advertising = ADVERTISED_Autoneg;
4375 ecmd->duplex = DUPLEX_FULL;
4376 ecmd->autoneg = AUTONEG_ENABLE;
4378 switch (link_type) {
4379 case QETH_LINK_TYPE_FAST_ETH:
4380 case QETH_LINK_TYPE_LANE_ETH100:
4381 ecmd->supported |= SUPPORTED_10baseT_Half |
4382 SUPPORTED_10baseT_Full |
4383 SUPPORTED_100baseT_Half |
4384 SUPPORTED_100baseT_Full |
4386 ecmd->advertising |= ADVERTISED_10baseT_Half |
4387 ADVERTISED_10baseT_Full |
4388 ADVERTISED_100baseT_Half |
4389 ADVERTISED_100baseT_Full |
4391 ecmd->speed = SPEED_100;
4392 ecmd->port = PORT_TP;
4395 case QETH_LINK_TYPE_GBIT_ETH:
4396 case QETH_LINK_TYPE_LANE_ETH1000:
4397 ecmd->supported |= SUPPORTED_10baseT_Half |
4398 SUPPORTED_10baseT_Full |
4399 SUPPORTED_100baseT_Half |
4400 SUPPORTED_100baseT_Full |
4401 SUPPORTED_1000baseT_Half |
4402 SUPPORTED_1000baseT_Full |
4404 ecmd->advertising |= ADVERTISED_10baseT_Half |
4405 ADVERTISED_10baseT_Full |
4406 ADVERTISED_100baseT_Half |
4407 ADVERTISED_100baseT_Full |
4408 ADVERTISED_1000baseT_Half |
4409 ADVERTISED_1000baseT_Full |
4411 ecmd->speed = SPEED_1000;
4412 ecmd->port = PORT_FIBRE;
4415 case QETH_LINK_TYPE_10GBIT_ETH:
4416 ecmd->supported |= SUPPORTED_10baseT_Half |
4417 SUPPORTED_10baseT_Full |
4418 SUPPORTED_100baseT_Half |
4419 SUPPORTED_100baseT_Full |
4420 SUPPORTED_1000baseT_Half |
4421 SUPPORTED_1000baseT_Full |
4422 SUPPORTED_10000baseT_Full |
4424 ecmd->advertising |= ADVERTISED_10baseT_Half |
4425 ADVERTISED_10baseT_Full |
4426 ADVERTISED_100baseT_Half |
4427 ADVERTISED_100baseT_Full |
4428 ADVERTISED_1000baseT_Half |
4429 ADVERTISED_1000baseT_Full |
4430 ADVERTISED_10000baseT_Full |
4432 ecmd->speed = SPEED_10000;
4433 ecmd->port = PORT_FIBRE;
4437 ecmd->supported |= SUPPORTED_10baseT_Half |
4438 SUPPORTED_10baseT_Full |
4440 ecmd->advertising |= ADVERTISED_10baseT_Half |
4441 ADVERTISED_10baseT_Full |
4443 ecmd->speed = SPEED_10;
4444 ecmd->port = PORT_TP;
4449 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4451 static int __init qeth_core_init(void)
4455 PRINT_INFO("loading core functions\n");
4456 INIT_LIST_HEAD(&qeth_core_card_list.list);
4457 rwlock_init(&qeth_core_card_list.rwlock);
4459 rc = qeth_register_dbf_views();
4462 rc = ccw_driver_register(&qeth_ccw_driver);
4465 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4468 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4469 &driver_attr_group);
4472 qeth_core_root_dev = s390_root_dev_register("qeth");
4473 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4479 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4480 &driver_attr_group);
4482 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4484 ccw_driver_unregister(&qeth_ccw_driver);
4486 qeth_unregister_dbf_views();
4488 PRINT_ERR("Initialization failed with code %d\n", rc);
4492 static void __exit qeth_core_exit(void)
4494 s390_root_dev_unregister(qeth_core_root_dev);
4495 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4496 &driver_attr_group);
4497 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4498 ccw_driver_unregister(&qeth_ccw_driver);
4499 qeth_unregister_dbf_views();
4500 PRINT_INFO("core functions removed\n");
4503 module_init(qeth_core_init);
4504 module_exit(qeth_core_exit);
4505 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4506 MODULE_DESCRIPTION("qeth core functions");
4507 MODULE_LICENSE("GPL");