2 * drivers/pcmcia/m32r_pcc.c
4 * Device driver for the PCMCIA functionality of M32R.
6 * Copyright (c) 2001, 2002, 2003, 2004
7 * Hiroyuki Kondo, Naoto Sugai, Hayato Fujiwara
10 #include <linux/module.h>
11 #include <linux/moduleparam.h>
12 #include <linux/init.h>
13 #include <linux/config.h>
14 #include <linux/types.h>
15 #include <linux/fcntl.h>
16 #include <linux/string.h>
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/timer.h>
20 #include <linux/sched.h>
21 #include <linux/slab.h>
22 #include <linux/ioport.h>
23 #include <linux/delay.h>
24 #include <linux/workqueue.h>
25 #include <linux/interrupt.h>
26 #include <linux/device.h>
29 #include <asm/bitops.h>
30 #include <asm/system.h>
31 #include <asm/addrspace.h>
33 #include <pcmcia/version.h>
34 #include <pcmcia/cs_types.h>
35 #include <pcmcia/ss.h>
36 #include <pcmcia/cs.h>
38 /* XXX: should be moved into asm/irq.h */
44 #define CHAOS_PCC_DEBUG
45 #ifdef CHAOS_PCC_DEBUG
46 static volatile u_short dummy_readbuf;
49 #define PCC_DEBUG_DBEX
52 static int m32r_pcc_debug;
53 module_param(m32r_pcc_debug, int, 0644);
54 #define debug(lvl, fmt, arg...) do { \
55 if (m32r_pcc_debug > (lvl)) \
56 printk(KERN_DEBUG "m32r_pcc: " fmt , ## arg); \
59 #define debug(n, args...) do { } while (0)
62 /* Poll status interval -- 0 means default to interrupt */
63 static int poll_interval = 0;
65 typedef enum pcc_space { as_none = 0, as_comm, as_attr, as_io } pcc_as_t;
67 typedef struct pcc_socket {
69 struct pcmcia_socket socket;
73 u_long base; /* PCC register base */
75 pccard_io_map io_map[MAX_IO_WIN];
76 pccard_mem_map mem_map[MAX_WIN];
79 pcc_as_t current_space;
81 #ifdef CHAOS_PCC_DEBUG
85 struct proc_dir_entry *proc;
89 static int pcc_sockets = 0;
90 static pcc_socket_t socket[M32R_MAX_PCC] = {
94 /*====================================================================*/
96 static unsigned int pcc_get(u_short, unsigned int);
97 static void pcc_set(u_short, unsigned int , unsigned int );
99 static DEFINE_SPINLOCK(pcc_lock);
101 void pcc_iorw(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int wr, int flag)
106 #ifdef PCC_DEBUG_DBEX
109 pcc_socket_t *t = &socket[sock];
110 #ifdef CHAOS_PCC_DEBUG
115 spin_lock_irqsave(&pcc_lock, flags);
120 need_ex = (size > 1 && flag == 0) ? PCMOD_DBEX : 0;
121 #ifdef PCC_DEBUG_DBEX
127 * calculate access address
129 addr = t->mapaddr + port - t->ioaddr + KSEG1; /* XXX */
132 * Check current mapping
134 if (t->current_space != as_io || t->last_iodbex != need_ex) {
141 pcc_set(sock, PCCR, 0);
144 * Set mode and io address
146 cbsz = (t->flags & MAP_16BIT) ? 0 : PCMOD_CBSZ;
147 pcc_set(sock, PCMOD, PCMOD_AS_IO | cbsz | need_ex);
148 pcc_set(sock, PCADR, addr & 0x1ff00000);
153 pcc_set(sock, PCCR, 1);
155 #ifdef CHAOS_PCC_DEBUG
157 map_changed = (t->current_space == as_attr && size == 2); /* XXX */
162 t->current_space = as_io;
170 unsigned char *bp = (unsigned char *)buf;
174 dummy_readbuf = readb(addr);
190 unsigned short *bp = (unsigned short *)buf;
192 #ifdef CHAOS_PCC_DEBUG
194 dummy_readbuf = readw(addr);
200 #ifdef PCC_DEBUG_DBEX
202 unsigned char *cp = (unsigned char *)bp;
204 tmp = cp[1] << 8 | cp[0];
214 #ifdef PCC_DEBUG_DBEX
216 unsigned char *cp = (unsigned char *)bp;
220 cp[1] = (tmp >> 8) & 0xff;
230 /* addr is no longer used */
231 if ((addr = pcc_get(sock, PCIRC)) & PCIRC_BWERR) {
232 printk("m32r_pcc: BWERR detected : port 0x%04lx : iosize %dbit\n",
234 pcc_set(sock, PCIRC, addr);
240 t->last_iosize = size;
241 t->last_iodbex = need_ex;
245 spin_unlock_irqrestore(&pcc_lock,flags);
250 void pcc_ioread(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int flag) {
251 pcc_iorw(sock, port, buf, size, nmemb, 0, flag);
254 void pcc_iowrite(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int flag) {
255 pcc_iorw(sock, port, buf, size, nmemb, 1, flag);
258 /*====================================================================*/
260 #define IS_REGISTERED 0x2000
261 #define IS_ALIVE 0x8000
263 typedef struct pcc_t {
268 static pcc_t pcc[] = {
269 { "xnux2", 0 }, { "xnux2", 0 },
272 static irqreturn_t pcc_interrupt(int, void *, struct pt_regs *);
274 /*====================================================================*/
276 static struct timer_list poll_timer;
278 static unsigned int pcc_get(u_short sock, unsigned int reg)
280 return inl(socket[sock].base + reg);
284 static void pcc_set(u_short sock, unsigned int reg, unsigned int data)
286 outl(data, socket[sock].base + reg);
289 /*======================================================================
291 See if a card is present, powered up, in IO mode, and already
292 bound to a (non PC Card) Linux driver. We leave these alone.
294 We make an exception for cards that seem to be serial devices.
296 ======================================================================*/
298 static int __init is_alive(u_short sock)
303 stat = pcc_get(sock, PCIRC);
304 f = (stat & (PCIRC_CDIN1 | PCIRC_CDIN2)) >> 16;
306 printk("m32r_pcc: No Card is detected at socket %d : stat = 0x%08x\n",stat,sock);
310 printk("m32r_pcc: Insertion fail (%.8x) at socket %d\n",stat,sock);
312 printk("m32r_pcc: Card is Inserted at socket %d(%.8x)\n",sock,stat);
316 static void add_pcc_socket(ulong base, int irq, ulong mapaddr, kio_addr_t ioaddr)
318 pcc_socket_t *t = &socket[pcc_sockets];
322 t->mapaddr = mapaddr;
324 #ifdef CHAOS_PCC_DEBUG
325 t->flags = MAP_16BIT;
329 if (is_alive(pcc_sockets))
330 t->flags |= IS_ALIVE;
334 request_region(t->base, 0x20, "m32r-pcc");
337 printk(KERN_INFO " %s ", pcc[pcc_sockets].name);
338 printk("pcc at 0x%08lx\n", t->base);
340 /* Update socket interrupt information, capabilities */
341 t->socket.features |= (SS_CAP_PCCARD | SS_CAP_STATIC_MAP);
342 t->socket.map_size = M32R_PCC_MAPSIZE;
343 t->socket.io_offset = ioaddr; /* use for io access offset */
344 t->socket.irq_mask = 0;
345 t->socket.pci_irq = 2 + pcc_sockets; /* XXX */
347 request_irq(irq, pcc_interrupt, 0, "m32r-pcc", pcc_interrupt);
355 /*====================================================================*/
357 static irqreturn_t pcc_interrupt(int irq, void *dev, struct pt_regs *regs)
360 u_int events, active;
363 debug(4, "m32r: pcc_interrupt(%d)\n", irq);
365 for (j = 0; j < 20; j++) {
367 for (i = 0; i < pcc_sockets; i++) {
368 if ((socket[i].cs_irq != irq) &&
369 (socket[i].socket.pci_irq != irq))
372 irc = pcc_get(i, PCIRC);
374 debug(2, "m32r-pcc:interrput: socket %d pcirc 0x%02x ", i, irc);
378 events = (irc) ? SS_DETECT : 0;
379 events |= (pcc_get(i,PCCR) & PCCR_PCEN) ? SS_READY : 0;
380 debug(2, " event 0x%02x\n", events);
383 pcmcia_parse_events(&socket[i].socket, events);
391 printk(KERN_NOTICE "m32r-pcc: infinite loop in interrupt handler\n");
393 debug(4, "m32r-pcc: interrupt done\n");
395 return IRQ_RETVAL(handled);
396 } /* pcc_interrupt */
398 static void pcc_interrupt_wrapper(u_long data)
400 pcc_interrupt(0, NULL, NULL);
401 init_timer(&poll_timer);
402 poll_timer.expires = jiffies + poll_interval;
403 add_timer(&poll_timer);
406 /*====================================================================*/
408 static int _pcc_get_status(u_short sock, u_int *value)
412 status = pcc_get(sock,PCIRC);
413 *value = ((status & PCIRC_CDIN1) && (status & PCIRC_CDIN2))
416 status = pcc_get(sock,PCCR);
419 *value |= (status & PCCR_PCEN) ? SS_READY : 0;
421 *value |= SS_READY; /* XXX: always */
424 status = pcc_get(sock,PCCSIGCR);
425 *value |= (status & PCCSIGCR_VEN) ? SS_POWERON : 0;
427 debug(3, "m32r-pcc: GetStatus(%d) = %#4.4x\n", sock, *value);
431 /*====================================================================*/
433 static int _pcc_get_socket(u_short sock, socket_state_t *state)
435 debug(3, "m32r-pcc: GetSocket(%d) = flags %#3.3x, Vcc %d, Vpp %d, "
436 "io_irq %d, csc_mask %#2.2x\n", sock, state->flags,
437 state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
441 /*====================================================================*/
443 static int _pcc_set_socket(u_short sock, socket_state_t *state)
447 debug(3, "m32r-pcc: SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, "
448 "io_irq %d, csc_mask %#2.2x)", sock, state->flags,
449 state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
455 if (state->Vcc == 50) {
462 if (state->flags & SS_RESET) {
463 debug(3, ":RESET\n");
464 reg |= PCCSIGCR_CRST;
466 if (state->flags & SS_OUTPUT_ENA){
467 debug(3, ":OUTPUT_ENA\n");
473 pcc_set(sock,PCCSIGCR,reg);
476 if(state->flags & SS_IOCARD){
479 if (state->flags & SS_PWR_AUTO) {
480 debug(3, ":PWR_AUTO");
482 if (state->csc_mask & SS_DETECT)
483 debug(3, ":csc-SS_DETECT");
484 if (state->flags & SS_IOCARD) {
485 if (state->csc_mask & SS_STSCHG)
488 if (state->csc_mask & SS_BATDEAD)
489 debug(3, ":BATDEAD");
490 if (state->csc_mask & SS_BATWARN)
491 debug(3, ":BATWARN");
492 if (state->csc_mask & SS_READY)
500 /*====================================================================*/
502 static int _pcc_set_io_map(u_short sock, struct pccard_io_map *io)
506 debug(3, "m32r-pcc: SetIOMap(%d, %d, %#2.2x, %d ns, "
507 "%#lx-%#lx)\n", sock, io->map, io->flags,
508 io->speed, io->start, io->stop);
514 /*====================================================================*/
516 static int _pcc_set_mem_map(u_short sock, struct pccard_mem_map *mem)
519 u_char map = mem->map;
522 pcc_socket_t *t = &socket[sock];
523 #ifdef CHAOS_PCC_DEBUG
525 pcc_as_t last = t->current_space;
529 debug(3, "m32r-pcc: SetMemMap(%d, %d, %#2.2x, %d ns, "
530 "%#lx, %#x)\n", sock, map, mem->flags,
531 mem->speed, mem->static_start, mem->card_start);
536 if ((map > MAX_WIN) || (mem->card_start > 0x3ffffff)){
543 if ((mem->flags & MAP_ACTIVE) == 0) {
544 t->current_space = as_none;
551 pcc_set(sock, PCCR, 0);
556 if (mem->flags & MAP_ATTRIB) {
557 mode = PCMOD_AS_ATTRIB | PCMOD_CBSZ;
558 t->current_space = as_attr;
560 mode = 0; /* common memory */
561 t->current_space = as_comm;
563 pcc_set(sock, PCMOD, mode);
568 addr = t->mapaddr + (mem->card_start & M32R_PCC_MAPMASK);
569 pcc_set(sock, PCADR, addr);
571 mem->static_start = addr + mem->card_start;
576 pcc_set(sock, PCCR, 1);
578 #ifdef CHAOS_PCC_DEBUG
580 if (last != as_attr) {
584 dummy_readbuf = *(u_char *)(addr + KSEG1);
592 #if 0 /* driver model ordering issue */
593 /*======================================================================
595 Routines for accessing socket information and register dumps via
598 ======================================================================*/
600 static ssize_t show_info(struct class_device *class_dev, char *buf)
602 pcc_socket_t *s = container_of(class_dev, struct pcc_socket,
605 return sprintf(buf, "type: %s\nbase addr: 0x%08lx\n",
606 pcc[s->type].name, s->base);
609 static ssize_t show_exca(struct class_device *class_dev, char *buf)
616 static CLASS_DEVICE_ATTR(info, S_IRUGO, show_info, NULL);
617 static CLASS_DEVICE_ATTR(exca, S_IRUGO, show_exca, NULL);
620 /*====================================================================*/
622 /* this is horribly ugly... proper locking needs to be done here at
624 #define LOCKED(x) do { \
626 unsigned long flags; \
627 spin_lock_irqsave(&pcc_lock, flags); \
629 spin_unlock_irqrestore(&pcc_lock, flags); \
634 static int pcc_get_status(struct pcmcia_socket *s, u_int *value)
636 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
638 if (socket[sock].flags & IS_ALIVE) {
642 LOCKED(_pcc_get_status(sock, value));
645 static int pcc_get_socket(struct pcmcia_socket *s, socket_state_t *state)
647 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
649 if (socket[sock].flags & IS_ALIVE)
651 LOCKED(_pcc_get_socket(sock, state));
654 static int pcc_set_socket(struct pcmcia_socket *s, socket_state_t *state)
656 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
658 if (socket[sock].flags & IS_ALIVE)
661 LOCKED(_pcc_set_socket(sock, state));
664 static int pcc_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
666 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
668 if (socket[sock].flags & IS_ALIVE)
670 LOCKED(_pcc_set_io_map(sock, io));
673 static int pcc_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
675 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
677 if (socket[sock].flags & IS_ALIVE)
679 LOCKED(_pcc_set_mem_map(sock, mem));
682 static int pcc_init(struct pcmcia_socket *s)
684 debug(4, "m32r-pcc: init call\n");
688 static struct pccard_operations pcc_operations = {
690 .get_status = pcc_get_status,
691 .get_socket = pcc_get_socket,
692 .set_socket = pcc_set_socket,
693 .set_io_map = pcc_set_io_map,
694 .set_mem_map = pcc_set_mem_map,
697 /*====================================================================*/
699 static int m32r_pcc_suspend(struct device *dev, pm_message_t state, u32 level)
702 if (level == SUSPEND_SAVE_STATE)
703 ret = pcmcia_socket_dev_suspend(dev, state);
707 static int m32r_pcc_resume(struct device *dev, u32 level)
710 if (level == RESUME_RESTORE_STATE)
711 ret = pcmcia_socket_dev_resume(dev);
716 static struct device_driver pcc_driver = {
718 .bus = &platform_bus_type,
719 .suspend = m32r_pcc_suspend,
720 .resume = m32r_pcc_resume,
723 static struct platform_device pcc_device = {
728 /*====================================================================*/
730 static int __init init_m32r_pcc(void)
734 ret = driver_register(&pcc_driver);
738 ret = platform_device_register(&pcc_device);
740 driver_unregister(&pcc_driver);
744 printk(KERN_INFO "m32r PCC probe:\n");
748 add_pcc_socket(M32R_PCC0_BASE, PCC0_IRQ, M32R_PCC0_MAPBASE, 0x1000);
750 #ifdef CONFIG_M32RPCC_SLOT2
751 add_pcc_socket(M32R_PCC1_BASE, PCC1_IRQ, M32R_PCC1_MAPBASE, 0x2000);
754 if (pcc_sockets == 0) {
755 printk("socket is not found.\n");
756 platform_device_unregister(&pcc_device);
757 driver_unregister(&pcc_driver);
761 /* Set up interrupt handler(s) */
763 for (i = 0 ; i < pcc_sockets ; i++) {
764 socket[i].socket.dev.dev = &pcc_device.dev;
765 socket[i].socket.ops = &pcc_operations;
766 socket[i].socket.resource_ops = &pccard_static_ops;
767 socket[i].socket.owner = THIS_MODULE;
768 socket[i].number = i;
769 ret = pcmcia_register_socket(&socket[i].socket);
771 socket[i].flags |= IS_REGISTERED;
773 #if 0 /* driver model ordering issue */
774 class_device_create_file(&socket[i].socket.dev,
775 &class_device_attr_info);
776 class_device_create_file(&socket[i].socket.dev,
777 &class_device_attr_exca);
781 /* Finally, schedule a polling interrupt */
782 if (poll_interval != 0) {
783 poll_timer.function = pcc_interrupt_wrapper;
785 init_timer(&poll_timer);
786 poll_timer.expires = jiffies + poll_interval;
787 add_timer(&poll_timer);
791 } /* init_m32r_pcc */
793 static void __exit exit_m32r_pcc(void)
797 for (i = 0; i < pcc_sockets; i++)
798 if (socket[i].flags & IS_REGISTERED)
799 pcmcia_unregister_socket(&socket[i].socket);
801 platform_device_unregister(&pcc_device);
802 if (poll_interval != 0)
803 del_timer_sync(&poll_timer);
805 driver_unregister(&pcc_driver);
806 } /* exit_m32r_pcc */
808 module_init(init_m32r_pcc);
809 module_exit(exit_m32r_pcc);
810 MODULE_LICENSE("Dual MPL/GPL");
811 /*====================================================================*/