2 * $Id: proc.c,v 1.13 1998/05/12 07:36:07 mj Exp $
4 * Procfs interface for the PCI bus.
6 * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
9 #include <linux/init.h>
10 #include <linux/pci.h>
11 #include <linux/module.h>
12 #include <linux/proc_fs.h>
13 #include <linux/seq_file.h>
14 #include <linux/capability.h>
15 #include <asm/uaccess.h>
16 #include <asm/byteorder.h>
19 static int proc_initialized; /* = 0 */
22 proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
25 struct inode *inode = file->f_path.dentry->d_inode;
27 mutex_lock(&inode->i_mutex);
33 new = file->f_pos + off;
36 new = inode->i_size + off;
39 if (new < 0 || new > inode->i_size)
43 mutex_unlock(&inode->i_mutex);
48 proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *ppos)
50 const struct inode *ino = file->f_path.dentry->d_inode;
51 const struct proc_dir_entry *dp = PDE(ino);
52 struct pci_dev *dev = dp->data;
53 unsigned int pos = *ppos;
54 unsigned int cnt, size;
57 * Normal users can read only the standardized portion of the
58 * configuration space as several chips lock up when trying to read
59 * undefined locations (think of Intel PIIX4 as a typical example).
62 if (capable(CAP_SYS_ADMIN))
64 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
73 if (pos + nbytes > size)
77 if (!access_ok(VERIFY_WRITE, buf, cnt))
80 if ((pos & 1) && cnt) {
82 pci_user_read_config_byte(dev, pos, &val);
89 if ((pos & 3) && cnt > 2) {
91 pci_user_read_config_word(dev, pos, &val);
92 __put_user(cpu_to_le16(val), (unsigned short __user *) buf);
100 pci_user_read_config_dword(dev, pos, &val);
101 __put_user(cpu_to_le32(val), (unsigned int __user *) buf);
109 pci_user_read_config_word(dev, pos, &val);
110 __put_user(cpu_to_le16(val), (unsigned short __user *) buf);
118 pci_user_read_config_byte(dev, pos, &val);
119 __put_user(val, buf);
130 proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos)
132 struct inode *ino = file->f_path.dentry->d_inode;
133 const struct proc_dir_entry *dp = PDE(ino);
134 struct pci_dev *dev = dp->data;
143 if (pos + nbytes > size)
147 if (!access_ok(VERIFY_READ, buf, cnt))
150 if ((pos & 1) && cnt) {
152 __get_user(val, buf);
153 pci_user_write_config_byte(dev, pos, val);
159 if ((pos & 3) && cnt > 2) {
161 __get_user(val, (unsigned short __user *) buf);
162 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
170 __get_user(val, (unsigned int __user *) buf);
171 pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
179 __get_user(val, (unsigned short __user *) buf);
180 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
188 __get_user(val, buf);
189 pci_user_write_config_byte(dev, pos, val);
196 i_size_write(ino, dp->size);
200 struct pci_filp_private {
201 enum pci_mmap_state mmap_state;
205 static int proc_bus_pci_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
207 const struct proc_dir_entry *dp = PDE(inode);
208 struct pci_dev *dev = dp->data;
210 struct pci_filp_private *fpriv = file->private_data;
211 #endif /* HAVE_PCI_MMAP */
215 case PCIIOC_CONTROLLER:
216 ret = pci_domain_nr(dev->bus);
220 case PCIIOC_MMAP_IS_IO:
221 fpriv->mmap_state = pci_mmap_io;
224 case PCIIOC_MMAP_IS_MEM:
225 fpriv->mmap_state = pci_mmap_mem;
228 case PCIIOC_WRITE_COMBINE:
230 fpriv->write_combine = 1;
232 fpriv->write_combine = 0;
235 #endif /* HAVE_PCI_MMAP */
246 static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
248 struct inode *inode = file->f_path.dentry->d_inode;
249 const struct proc_dir_entry *dp = PDE(inode);
250 struct pci_dev *dev = dp->data;
251 struct pci_filp_private *fpriv = file->private_data;
254 if (!capable(CAP_SYS_RAWIO))
257 ret = pci_mmap_page_range(dev, vma,
259 fpriv->write_combine);
266 static int proc_bus_pci_open(struct inode *inode, struct file *file)
268 struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
273 fpriv->mmap_state = pci_mmap_io;
274 fpriv->write_combine = 0;
276 file->private_data = fpriv;
281 static int proc_bus_pci_release(struct inode *inode, struct file *file)
283 kfree(file->private_data);
284 file->private_data = NULL;
288 #endif /* HAVE_PCI_MMAP */
290 static const struct file_operations proc_bus_pci_operations = {
291 .llseek = proc_bus_pci_lseek,
292 .read = proc_bus_pci_read,
293 .write = proc_bus_pci_write,
294 .ioctl = proc_bus_pci_ioctl,
296 .open = proc_bus_pci_open,
297 .release = proc_bus_pci_release,
298 .mmap = proc_bus_pci_mmap,
299 #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
300 .get_unmapped_area = get_pci_unmapped_area,
301 #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
302 #endif /* HAVE_PCI_MMAP */
306 static void *pci_seq_start(struct seq_file *m, loff_t *pos)
308 struct pci_dev *dev = NULL;
311 for_each_pci_dev(dev) {
318 static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
320 struct pci_dev *dev = v;
323 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
327 static void pci_seq_stop(struct seq_file *m, void *v)
330 struct pci_dev *dev = v;
335 static int show_device(struct seq_file *m, void *v)
337 const struct pci_dev *dev = v;
338 const struct pci_driver *drv;
344 drv = pci_dev_driver(dev);
345 seq_printf(m, "%02x%02x\t%04x%04x\t%x",
351 /* Here should be 7 and not PCI_NUM_RESOURCES as we need to preserve compatibility */
352 for (i=0; i<7; i++) {
353 resource_size_t start, end;
354 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
355 seq_printf(m, "\t%16llx",
356 (unsigned long long)(start |
357 (dev->resource[i].flags & PCI_REGION_FLAG_MASK)));
359 for (i=0; i<7; i++) {
360 resource_size_t start, end;
361 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
362 seq_printf(m, "\t%16llx",
363 dev->resource[i].start < dev->resource[i].end ?
364 (unsigned long long)(end - start) + 1 : 0);
368 seq_printf(m, "%s", drv->name);
373 static struct seq_operations proc_bus_pci_devices_op = {
374 .start = pci_seq_start,
375 .next = pci_seq_next,
376 .stop = pci_seq_stop,
380 static struct proc_dir_entry *proc_bus_pci_dir;
382 int pci_proc_attach_device(struct pci_dev *dev)
384 struct pci_bus *bus = dev->bus;
385 struct proc_dir_entry *e;
388 if (!proc_initialized)
392 if (pci_proc_domain(bus)) {
393 sprintf(name, "%04x:%02x", pci_domain_nr(bus),
396 sprintf(name, "%02x", bus->number);
398 bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
403 sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
404 e = create_proc_entry(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir);
407 e->proc_fops = &proc_bus_pci_operations;
409 e->size = dev->cfg_size;
415 int pci_proc_detach_device(struct pci_dev *dev)
417 struct proc_dir_entry *e;
419 if ((e = dev->procent)) {
420 if (atomic_read(&e->count))
422 remove_proc_entry(e->name, dev->bus->procdir);
429 int pci_proc_attach_bus(struct pci_bus* bus)
431 struct proc_dir_entry *de = bus->procdir;
433 if (!proc_initialized)
438 sprintf(name, "%02x", bus->number);
439 de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
447 int pci_proc_detach_bus(struct pci_bus* bus)
449 struct proc_dir_entry *de = bus->procdir;
451 remove_proc_entry(de->name, proc_bus_pci_dir);
455 static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
457 return seq_open(file, &proc_bus_pci_devices_op);
459 static const struct file_operations proc_bus_pci_dev_operations = {
460 .open = proc_bus_pci_dev_open,
463 .release = seq_release,
466 static int __init pci_proc_init(void)
468 struct proc_dir_entry *entry;
469 struct pci_dev *dev = NULL;
470 proc_bus_pci_dir = proc_mkdir("pci", proc_bus);
471 entry = create_proc_entry("devices", 0, proc_bus_pci_dir);
473 entry->proc_fops = &proc_bus_pci_dev_operations;
474 proc_initialized = 1;
475 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
476 pci_proc_attach_device(dev);
481 __initcall(pci_proc_init);
483 #ifdef CONFIG_HOTPLUG
484 EXPORT_SYMBOL(pci_proc_detach_bus);