3 * Purpose: PCI Message Signaled Interrupt (MSI)
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
11 #include <linux/irq.h>
12 #include <linux/interrupt.h>
13 #include <linux/init.h>
14 #include <linux/ioport.h>
15 #include <linux/smp_lock.h>
16 #include <linux/pci.h>
17 #include <linux/proc_fs.h>
18 #include <linux/msi.h>
20 #include <asm/errno.h>
27 static struct kmem_cache* msi_cachep;
29 static int pci_msi_enable = 1;
31 static int msi_cache_init(void)
33 msi_cachep = kmem_cache_create("msi_cache", sizeof(struct msi_desc),
34 0, SLAB_HWCACHE_ALIGN, NULL, NULL);
41 static void msi_set_mask_bit(unsigned int irq, int flag)
43 struct msi_desc *entry;
45 entry = get_irq_msi(irq);
46 BUG_ON(!entry || !entry->dev);
47 switch (entry->msi_attrib.type) {
49 if (entry->msi_attrib.maskbit) {
53 pos = (long)entry->mask_base;
54 pci_read_config_dword(entry->dev, pos, &mask_bits);
57 pci_write_config_dword(entry->dev, pos, mask_bits);
62 int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
63 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
64 writel(flag, entry->mask_base + offset);
73 void read_msi_msg(unsigned int irq, struct msi_msg *msg)
75 struct msi_desc *entry = get_irq_msi(irq);
76 switch(entry->msi_attrib.type) {
79 struct pci_dev *dev = entry->dev;
80 int pos = entry->msi_attrib.pos;
83 pci_read_config_dword(dev, msi_lower_address_reg(pos),
85 if (entry->msi_attrib.is_64) {
86 pci_read_config_dword(dev, msi_upper_address_reg(pos),
88 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
91 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
99 base = entry->mask_base +
100 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
102 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
103 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
104 msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET);
112 void write_msi_msg(unsigned int irq, struct msi_msg *msg)
114 struct msi_desc *entry = get_irq_msi(irq);
115 switch (entry->msi_attrib.type) {
118 struct pci_dev *dev = entry->dev;
119 int pos = entry->msi_attrib.pos;
121 pci_write_config_dword(dev, msi_lower_address_reg(pos),
123 if (entry->msi_attrib.is_64) {
124 pci_write_config_dword(dev, msi_upper_address_reg(pos),
126 pci_write_config_word(dev, msi_data_reg(pos, 1),
129 pci_write_config_word(dev, msi_data_reg(pos, 0),
134 case PCI_CAP_ID_MSIX:
137 base = entry->mask_base +
138 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
140 writel(msg->address_lo,
141 base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
142 writel(msg->address_hi,
143 base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
144 writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET);
152 void mask_msi_irq(unsigned int irq)
154 msi_set_mask_bit(irq, 1);
157 void unmask_msi_irq(unsigned int irq)
159 msi_set_mask_bit(irq, 0);
162 static int msi_free_irq(struct pci_dev* dev, int irq);
164 static int msi_init(void)
166 static int status = -ENOMEM;
171 status = msi_cache_init();
174 printk(KERN_WARNING "PCI: MSI cache init failed\n");
181 static struct msi_desc* alloc_msi_entry(void)
183 struct msi_desc *entry;
185 entry = kmem_cache_zalloc(msi_cachep, GFP_KERNEL);
189 entry->link.tail = entry->link.head = 0; /* single message */
195 static void enable_msi_mode(struct pci_dev *dev, int pos, int type)
199 pci_read_config_word(dev, msi_control_reg(pos), &control);
200 if (type == PCI_CAP_ID_MSI) {
201 /* Set enabled bits to single MSI & enable MSI_enable bit */
202 msi_enable(control, 1);
203 pci_write_config_word(dev, msi_control_reg(pos), control);
204 dev->msi_enabled = 1;
206 msix_enable(control);
207 pci_write_config_word(dev, msi_control_reg(pos), control);
208 dev->msix_enabled = 1;
211 pci_intx(dev, 0); /* disable intx */
214 void disable_msi_mode(struct pci_dev *dev, int pos, int type)
218 pci_read_config_word(dev, msi_control_reg(pos), &control);
219 if (type == PCI_CAP_ID_MSI) {
220 /* Set enabled bits to single MSI & enable MSI_enable bit */
221 msi_disable(control);
222 pci_write_config_word(dev, msi_control_reg(pos), control);
223 dev->msi_enabled = 0;
225 msix_disable(control);
226 pci_write_config_word(dev, msi_control_reg(pos), control);
227 dev->msix_enabled = 0;
230 pci_intx(dev, 1); /* enable intx */
234 static int __pci_save_msi_state(struct pci_dev *dev)
238 struct pci_cap_saved_state *save_state;
241 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
242 if (pos <= 0 || dev->no_msi)
245 pci_read_config_word(dev, msi_control_reg(pos), &control);
246 if (!(control & PCI_MSI_FLAGS_ENABLE))
249 save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u32) * 5,
252 printk(KERN_ERR "Out of memory in pci_save_msi_state\n");
255 cap = &save_state->data[0];
257 pci_read_config_dword(dev, pos, &cap[i++]);
258 control = cap[0] >> 16;
259 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, &cap[i++]);
260 if (control & PCI_MSI_FLAGS_64BIT) {
261 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, &cap[i++]);
262 pci_read_config_dword(dev, pos + PCI_MSI_DATA_64, &cap[i++]);
264 pci_read_config_dword(dev, pos + PCI_MSI_DATA_32, &cap[i++]);
265 if (control & PCI_MSI_FLAGS_MASKBIT)
266 pci_read_config_dword(dev, pos + PCI_MSI_MASK_BIT, &cap[i++]);
267 save_state->cap_nr = PCI_CAP_ID_MSI;
268 pci_add_saved_cap(dev, save_state);
272 static void __pci_restore_msi_state(struct pci_dev *dev)
276 struct pci_cap_saved_state *save_state;
279 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSI);
280 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
281 if (!save_state || pos <= 0)
283 cap = &save_state->data[0];
285 control = cap[i++] >> 16;
286 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, cap[i++]);
287 if (control & PCI_MSI_FLAGS_64BIT) {
288 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, cap[i++]);
289 pci_write_config_dword(dev, pos + PCI_MSI_DATA_64, cap[i++]);
291 pci_write_config_dword(dev, pos + PCI_MSI_DATA_32, cap[i++]);
292 if (control & PCI_MSI_FLAGS_MASKBIT)
293 pci_write_config_dword(dev, pos + PCI_MSI_MASK_BIT, cap[i++]);
294 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
295 enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
296 pci_remove_saved_cap(save_state);
300 static int __pci_save_msix_state(struct pci_dev *dev)
303 int irq, head, tail = 0;
305 struct pci_cap_saved_state *save_state;
307 if (!dev->msix_enabled)
310 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
311 if (pos <= 0 || dev->no_msi)
314 /* save the capability */
315 pci_read_config_word(dev, msi_control_reg(pos), &control);
316 if (!(control & PCI_MSIX_FLAGS_ENABLE))
318 save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u16),
321 printk(KERN_ERR "Out of memory in pci_save_msix_state\n");
324 *((u16 *)&save_state->data[0]) = control;
327 irq = head = dev->first_msi_irq;
328 while (head != tail) {
329 struct msi_desc *entry;
331 entry = get_irq_msi(irq);
332 read_msi_msg(irq, &entry->msg_save);
334 tail = entry->link.tail;
338 save_state->cap_nr = PCI_CAP_ID_MSIX;
339 pci_add_saved_cap(dev, save_state);
343 int pci_save_msi_state(struct pci_dev *dev)
347 rc = __pci_save_msi_state(dev);
351 rc = __pci_save_msix_state(dev);
356 static void __pci_restore_msix_state(struct pci_dev *dev)
360 int irq, head, tail = 0;
361 struct msi_desc *entry;
362 struct pci_cap_saved_state *save_state;
364 if (!dev->msix_enabled)
367 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSIX);
370 save = *((u16 *)&save_state->data[0]);
371 pci_remove_saved_cap(save_state);
374 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
378 /* route the table */
379 irq = head = dev->first_msi_irq;
380 while (head != tail) {
381 entry = get_irq_msi(irq);
382 write_msi_msg(irq, &entry->msg_save);
384 tail = entry->link.tail;
388 pci_write_config_word(dev, msi_control_reg(pos), save);
389 enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
392 void pci_restore_msi_state(struct pci_dev *dev)
394 __pci_restore_msi_state(dev);
395 __pci_restore_msix_state(dev);
397 #endif /* CONFIG_PM */
400 * msi_capability_init - configure device's MSI capability structure
401 * @dev: pointer to the pci_dev data structure of MSI device function
403 * Setup the MSI capability structure of device function with a single
404 * MSI irq, regardless of device function is capable of handling
405 * multiple messages. A return of zero indicates the successful setup
406 * of an entry zero with the new MSI irq or non-zero for otherwise.
408 static int msi_capability_init(struct pci_dev *dev)
410 struct msi_desc *entry;
414 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
415 pci_read_config_word(dev, msi_control_reg(pos), &control);
416 /* MSI Entry Initialization */
417 entry = alloc_msi_entry();
421 entry->msi_attrib.type = PCI_CAP_ID_MSI;
422 entry->msi_attrib.is_64 = is_64bit_address(control);
423 entry->msi_attrib.entry_nr = 0;
424 entry->msi_attrib.maskbit = is_mask_bit_support(control);
425 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
426 entry->msi_attrib.pos = pos;
427 if (is_mask_bit_support(control)) {
428 entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos,
429 is_64bit_address(control));
432 if (entry->msi_attrib.maskbit) {
433 unsigned int maskbits, temp;
434 /* All MSIs are unmasked by default, Mask them all */
435 pci_read_config_dword(dev,
436 msi_mask_bits_reg(pos, is_64bit_address(control)),
438 temp = (1 << multi_msi_capable(control));
439 temp = ((temp - 1) & ~temp);
441 pci_write_config_dword(dev,
442 msi_mask_bits_reg(pos, is_64bit_address(control)),
445 /* Configure MSI capability structure */
446 irq = arch_setup_msi_irq(dev, entry);
448 kmem_cache_free(msi_cachep, entry);
451 entry->link.head = irq;
452 entry->link.tail = irq;
453 dev->first_msi_irq = irq;
454 set_irq_msi(irq, entry);
456 /* Set MSI enabled bits */
457 enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
464 * msix_capability_init - configure device's MSI-X capability
465 * @dev: pointer to the pci_dev data structure of MSI-X device function
466 * @entries: pointer to an array of struct msix_entry entries
467 * @nvec: number of @entries
469 * Setup the MSI-X capability structure of device function with a
470 * single MSI-X irq. A return of zero indicates the successful setup of
471 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
473 static int msix_capability_init(struct pci_dev *dev,
474 struct msix_entry *entries, int nvec)
476 struct msi_desc *head = NULL, *tail = NULL, *entry = NULL;
477 int irq, pos, i, j, nr_entries, temp = 0;
478 unsigned long phys_addr;
484 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
485 /* Request & Map MSI-X table region */
486 pci_read_config_word(dev, msi_control_reg(pos), &control);
487 nr_entries = multi_msix_capable(control);
489 pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
490 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
491 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
492 phys_addr = pci_resource_start (dev, bir) + table_offset;
493 base = ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
497 /* MSI-X Table Initialization */
498 for (i = 0; i < nvec; i++) {
499 entry = alloc_msi_entry();
503 j = entries[i].entry;
504 entry->msi_attrib.type = PCI_CAP_ID_MSIX;
505 entry->msi_attrib.is_64 = 1;
506 entry->msi_attrib.entry_nr = j;
507 entry->msi_attrib.maskbit = 1;
508 entry->msi_attrib.default_irq = dev->irq;
509 entry->msi_attrib.pos = pos;
511 entry->mask_base = base;
513 /* Configure MSI-X capability structure */
514 irq = arch_setup_msi_irq(dev, entry);
516 kmem_cache_free(msi_cachep, entry);
519 entries[i].vector = irq;
521 entry->link.head = irq;
522 entry->link.tail = irq;
525 entry->link.head = temp;
526 entry->link.tail = tail->link.tail;
527 tail->link.tail = irq;
528 head->link.head = irq;
533 set_irq_msi(irq, entry);
538 for (; i >= 0; i--) {
539 irq = (entries + i)->vector;
540 msi_free_irq(dev, irq);
541 (entries + i)->vector = 0;
543 /* If we had some success report the number of irqs
544 * we succeeded in setting up.
550 dev->first_msi_irq = entries[0].vector;
551 /* Set MSI-X enabled bits */
552 enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
558 * pci_msi_supported - check whether MSI may be enabled on device
559 * @dev: pointer to the pci_dev data structure of MSI device function
561 * Look at global flags, the device itself, and its parent busses
562 * to return 0 if MSI are supported for the device.
565 int pci_msi_supported(struct pci_dev * dev)
569 /* MSI must be globally enabled and supported by the device */
570 if (!pci_msi_enable || !dev || dev->no_msi)
573 /* Any bridge which does NOT route MSI transactions from it's
574 * secondary bus to it's primary bus must set NO_MSI flag on
575 * the secondary pci_bus.
576 * We expect only arch-specific PCI host bus controller driver
577 * or quirks for specific PCI bridges to be setting NO_MSI.
579 for (bus = dev->bus; bus; bus = bus->parent)
580 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
587 * pci_enable_msi - configure device's MSI capability structure
588 * @dev: pointer to the pci_dev data structure of MSI device function
590 * Setup the MSI capability structure of device function with
591 * a single MSI irq upon its software driver call to request for
592 * MSI mode enabled on its hardware device function. A return of zero
593 * indicates the successful setup of an entry zero with the new MSI
594 * irq or non-zero for otherwise.
596 int pci_enable_msi(struct pci_dev* dev)
600 if (pci_msi_supported(dev) < 0)
607 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
611 WARN_ON(!!dev->msi_enabled);
613 /* Check whether driver already requested for MSI-X irqs */
614 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
615 if (pos > 0 && dev->msix_enabled) {
616 printk(KERN_INFO "PCI: %s: Can't enable MSI. "
617 "Device already has MSI-X enabled\n",
621 status = msi_capability_init(dev);
625 void pci_disable_msi(struct pci_dev* dev)
627 struct msi_desc *entry;
628 int pos, default_irq;
636 if (!dev->msi_enabled)
639 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
643 pci_read_config_word(dev, msi_control_reg(pos), &control);
644 if (!(control & PCI_MSI_FLAGS_ENABLE))
648 disable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
650 entry = get_irq_msi(dev->first_msi_irq);
651 if (!entry || !entry->dev || entry->msi_attrib.type != PCI_CAP_ID_MSI) {
654 if (irq_has_action(dev->first_msi_irq)) {
655 printk(KERN_WARNING "PCI: %s: pci_disable_msi() called without "
656 "free_irq() on MSI irq %d\n",
657 pci_name(dev), dev->first_msi_irq);
658 BUG_ON(irq_has_action(dev->first_msi_irq));
660 default_irq = entry->msi_attrib.default_irq;
661 msi_free_irq(dev, dev->first_msi_irq);
663 /* Restore dev->irq to its default pin-assertion irq */
664 dev->irq = default_irq;
666 dev->first_msi_irq = 0;
669 static int msi_free_irq(struct pci_dev* dev, int irq)
671 struct msi_desc *entry;
672 int head, entry_nr, type;
675 entry = get_irq_msi(irq);
676 if (!entry || entry->dev != dev) {
679 type = entry->msi_attrib.type;
680 entry_nr = entry->msi_attrib.entry_nr;
681 head = entry->link.head;
682 base = entry->mask_base;
683 get_irq_msi(entry->link.head)->link.tail = entry->link.tail;
684 get_irq_msi(entry->link.tail)->link.head = entry->link.head;
686 arch_teardown_msi_irq(irq);
687 kmem_cache_free(msi_cachep, entry);
689 if (type == PCI_CAP_ID_MSIX) {
690 writel(1, base + entry_nr * PCI_MSIX_ENTRY_SIZE +
691 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
701 * pci_enable_msix - configure device's MSI-X capability structure
702 * @dev: pointer to the pci_dev data structure of MSI-X device function
703 * @entries: pointer to an array of MSI-X entries
704 * @nvec: number of MSI-X irqs requested for allocation by device driver
706 * Setup the MSI-X capability structure of device function with the number
707 * of requested irqs upon its software driver call to request for
708 * MSI-X mode enabled on its hardware device function. A return of zero
709 * indicates the successful configuration of MSI-X capability structure
710 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
711 * Or a return of > 0 indicates that driver request is exceeding the number
712 * of irqs available. Driver should use the returned value to re-send
715 int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec)
717 int status, pos, nr_entries;
721 if (!entries || pci_msi_supported(dev) < 0)
728 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
732 pci_read_config_word(dev, msi_control_reg(pos), &control);
733 nr_entries = multi_msix_capable(control);
734 if (nvec > nr_entries)
737 /* Check for any invalid entries */
738 for (i = 0; i < nvec; i++) {
739 if (entries[i].entry >= nr_entries)
740 return -EINVAL; /* invalid entry */
741 for (j = i + 1; j < nvec; j++) {
742 if (entries[i].entry == entries[j].entry)
743 return -EINVAL; /* duplicate entry */
746 WARN_ON(!!dev->msix_enabled);
748 /* Check whether driver already requested for MSI irq */
749 if (pci_find_capability(dev, PCI_CAP_ID_MSI) > 0 &&
751 printk(KERN_INFO "PCI: %s: Can't enable MSI-X. "
752 "Device already has an MSI irq assigned\n",
756 status = msix_capability_init(dev, entries, nvec);
760 void pci_disable_msix(struct pci_dev* dev)
762 int irq, head, tail = 0, warning = 0;
771 if (!dev->msix_enabled)
774 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
778 pci_read_config_word(dev, msi_control_reg(pos), &control);
779 if (!(control & PCI_MSIX_FLAGS_ENABLE))
782 disable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
784 irq = head = dev->first_msi_irq;
785 while (head != tail) {
786 tail = get_irq_msi(irq)->link.tail;
787 if (irq_has_action(irq))
789 else if (irq != head) /* Release MSI-X irq */
790 msi_free_irq(dev, irq);
793 msi_free_irq(dev, irq);
795 printk(KERN_WARNING "PCI: %s: pci_disable_msix() called without "
796 "free_irq() on all MSI-X irqs\n",
800 dev->first_msi_irq = 0;
804 * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state
805 * @dev: pointer to the pci_dev data structure of MSI(X) device function
807 * Being called during hotplug remove, from which the device function
808 * is hot-removed. All previous assigned MSI/MSI-X irqs, if
809 * allocated for this device function, are reclaimed to unused state,
810 * which may be used later on.
812 void msi_remove_pci_irq_vectors(struct pci_dev* dev)
814 if (!pci_msi_enable || !dev)
817 if (dev->msi_enabled) {
818 if (irq_has_action(dev->first_msi_irq)) {
819 printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() "
820 "called without free_irq() on MSI irq %d\n",
821 pci_name(dev), dev->first_msi_irq);
822 BUG_ON(irq_has_action(dev->first_msi_irq));
823 } else /* Release MSI irq assigned to this device */
824 msi_free_irq(dev, dev->first_msi_irq);
826 if (dev->msix_enabled) {
827 int irq, head, tail = 0, warning = 0;
828 void __iomem *base = NULL;
830 irq = head = dev->first_msi_irq;
831 while (head != tail) {
832 tail = get_irq_msi(irq)->link.tail;
833 base = get_irq_msi(irq)->mask_base;
834 if (irq_has_action(irq))
836 else if (irq != head) /* Release MSI-X irq */
837 msi_free_irq(dev, irq);
840 msi_free_irq(dev, irq);
843 printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() "
844 "called without free_irq() on all MSI-X irqs\n",
851 void pci_no_msi(void)
856 EXPORT_SYMBOL(pci_enable_msi);
857 EXPORT_SYMBOL(pci_disable_msi);
858 EXPORT_SYMBOL(pci_enable_msix);
859 EXPORT_SYMBOL(pci_disable_msix);