err.no Git - linux-2.6/blob - drivers/net/wireless/rtl8187_dev.c

   1 /*
   2  * Linux device driver for RTL8187
   3  *
   4  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   5  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   6  *
   7  * Based on the r8187 driver, which is:
   8  * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
   9  *
  10  * Magic delays and register offsets below are taken from the original
  11  * r8187 driver sources.  Thanks to Realtek for their support!
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License version 2 as
  15  * published by the Free Software Foundation.
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/usb.h>
  20 #include <linux/delay.h>
  21 #include <linux/etherdevice.h>
  22 #include <linux/eeprom_93cx6.h>
  23 #include <net/mac80211.h>
  24
  25 #include "rtl8187.h"
  26 #include "rtl8187_rtl8225.h"
  27
  28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  29 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  30 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
  31 MODULE_LICENSE("GPL");
  32
  33 static struct usb_device_id rtl8187_table[] __devinitdata = {
  34         /* Realtek */
  35         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
  36         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
  37         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
  38         /* Netgear */
  39         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
  40         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
  41         /* HP */
  42         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
  43         /* Sitecom */
  44         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
  45         {}
  46 };
  47
  48 MODULE_DEVICE_TABLE(usb, rtl8187_table);
  49
  50 static const struct ieee80211_rate rtl818x_rates[] = {
  51         { .bitrate = 10, .hw_value = 0, },
  52         { .bitrate = 20, .hw_value = 1, },
  53         { .bitrate = 55, .hw_value = 2, },
  54         { .bitrate = 110, .hw_value = 3, },
  55         { .bitrate = 60, .hw_value = 4, },
  56         { .bitrate = 90, .hw_value = 5, },
  57         { .bitrate = 120, .hw_value = 6, },
  58         { .bitrate = 180, .hw_value = 7, },
  59         { .bitrate = 240, .hw_value = 8, },
  60         { .bitrate = 360, .hw_value = 9, },
  61         { .bitrate = 480, .hw_value = 10, },
  62         { .bitrate = 540, .hw_value = 11, },
  63 };
  64
  65 static const struct ieee80211_channel rtl818x_channels[] = {
  66         { .center_freq = 2412 },
  67         { .center_freq = 2417 },
  68         { .center_freq = 2422 },
  69         { .center_freq = 2427 },
  70         { .center_freq = 2432 },
  71         { .center_freq = 2437 },
  72         { .center_freq = 2442 },
  73         { .center_freq = 2447 },
  74         { .center_freq = 2452 },
  75         { .center_freq = 2457 },
  76         { .center_freq = 2462 },
  77         { .center_freq = 2467 },
  78         { .center_freq = 2472 },
  79         { .center_freq = 2484 },
  80 };
  81
  82 static void rtl8187_iowrite_async_cb(struct urb *urb)
  83 {
  84         kfree(urb->context);
  85         usb_free_urb(urb);
  86 }
  87
  88 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
  89                                   void *data, u16 len)
  90 {
  91         struct usb_ctrlrequest *dr;
  92         struct urb *urb;
  93         struct rtl8187_async_write_data {
  94                 u8 data[4];
  95                 struct usb_ctrlrequest dr;
  96         } *buf;
  97         int rc;
  98
  99         buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
 100         if (!buf)
 101                 return;
 102
 103         urb = usb_alloc_urb(0, GFP_ATOMIC);
 104         if (!urb) {
 105                 kfree(buf);
 106                 return;
 107         }
 108
 109         dr = &buf->dr;
 110
 111         dr->bRequestType = RTL8187_REQT_WRITE;
 112         dr->bRequest = RTL8187_REQ_SET_REG;
 113         dr->wValue = addr;
 114         dr->wIndex = 0;
 115         dr->wLength = cpu_to_le16(len);
 116
 117         memcpy(buf, data, len);
 118
 119         usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
 120                              (unsigned char *)dr, buf, len,
 121                              rtl8187_iowrite_async_cb, buf);
 122         rc = usb_submit_urb(urb, GFP_ATOMIC);
 123         if (rc < 0) {
 124                 kfree(buf);
 125                 usb_free_urb(urb);
 126         }
 127 }
 128
 129 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
 130                                            __le32 *addr, u32 val)
 131 {
 132         __le32 buf = cpu_to_le32(val);
 133
 134         rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
 135                               &buf, sizeof(buf));
 136 }
 137
 138 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
 139 {
 140         struct rtl8187_priv *priv = dev->priv;
 141
 142         data <<= 8;
 143         data |= addr | 0x80;
 144
 145         rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
 146         rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
 147         rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
 148         rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
 149
 150         msleep(1);
 151 }
 152
 153 static void rtl8187_tx_cb(struct urb *urb)
 154 {
 155         struct sk_buff *skb = (struct sk_buff *)urb->context;
 156         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 157         struct ieee80211_hw *hw = info->driver_data[0];
 158
 159         usb_free_urb(info->driver_data[1]);
 160         skb_pull(skb, sizeof(struct rtl8187_tx_hdr));
 161         memset(&info->status, 0, sizeof(info->status));
 162         info->flags |= IEEE80211_TX_STAT_ACK;
 163         ieee80211_tx_status_irqsafe(hw, skb);
 164 }
 165
 166 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 167 {
 168         struct rtl8187_priv *priv = dev->priv;
 169         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 170         struct rtl8187_tx_hdr *hdr;
 171         struct urb *urb;
 172         __le16 rts_dur = 0;
 173         u32 flags;
 174         int rc;
 175
 176         urb = usb_alloc_urb(0, GFP_ATOMIC);
 177         if (!urb) {
 178                 kfree_skb(skb);
 179                 return 0;
 180         }
 181
 182         flags = skb->len;
 183         flags |= RTL8187_TX_FLAG_NO_ENCRYPT;
 184
 185         flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
 186         if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
 187                 flags |= RTL8187_TX_FLAG_MORE_FRAG;
 188         if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
 189                 flags |= RTL8187_TX_FLAG_RTS;
 190                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 191                 rts_dur = ieee80211_rts_duration(dev, priv->vif,
 192                                                  skb->len, info);
 193         } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
 194                 flags |= RTL8187_TX_FLAG_CTS;
 195                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 196         }
 197
 198         hdr = (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
 199         hdr->flags = cpu_to_le32(flags);
 200         hdr->len = 0;
 201         hdr->rts_duration = rts_dur;
 202         hdr->retry = cpu_to_le32(info->control.retry_limit << 8);
 203
 204         info->driver_data[0] = dev;
 205         info->driver_data[1] = urb;
 206         usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, 2),
 207                           hdr, skb->len, rtl8187_tx_cb, skb);
 208         rc = usb_submit_urb(urb, GFP_ATOMIC);
 209         if (rc < 0) {
 210                 usb_free_urb(urb);
 211                 kfree_skb(skb);
 212         }
 213
 214         return 0;
 215 }
 216
 217 static void rtl8187_rx_cb(struct urb *urb)
 218 {
 219         struct sk_buff *skb = (struct sk_buff *)urb->context;
 220         struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
 221         struct ieee80211_hw *dev = info->dev;
 222         struct rtl8187_priv *priv = dev->priv;
 223         struct rtl8187_rx_hdr *hdr;
 224         struct ieee80211_rx_status rx_status = { 0 };
 225         int rate, signal;
 226         u32 flags;
 227
 228         spin_lock(&priv->rx_queue.lock);
 229         if (skb->next)
 230                 __skb_unlink(skb, &priv->rx_queue);
 231         else {
 232                 spin_unlock(&priv->rx_queue.lock);
 233                 return;
 234         }
 235         spin_unlock(&priv->rx_queue.lock);
 236
 237         if (unlikely(urb->status)) {
 238                 usb_free_urb(urb);
 239                 dev_kfree_skb_irq(skb);
 240                 return;
 241         }
 242
 243         skb_put(skb, urb->actual_length);
 244         hdr = (struct rtl8187_rx_hdr *)(skb_tail_pointer(skb) - sizeof(*hdr));
 245         flags = le32_to_cpu(hdr->flags);
 246         skb_trim(skb, flags & 0x0FFF);
 247
 248         signal = hdr->agc >> 1;
 249         rate = (flags >> 20) & 0xF;
 250         if (rate > 3) { /* OFDM rate */
 251                 if (signal > 90)
 252                         signal = 90;
 253                 else if (signal < 25)
 254                         signal = 25;
 255                 signal = 90 - signal;
 256         } else {        /* CCK rate */
 257                 if (signal > 95)
 258                         signal = 95;
 259                 else if (signal < 30)
 260                         signal = 30;
 261                 signal = 95 - signal;
 262         }
 263
 264         rx_status.antenna = (hdr->signal >> 7) & 1;
 265         rx_status.qual = 64 - min(hdr->noise, (u8)64);
 266         rx_status.signal = signal;
 267         rx_status.rate_idx = rate;
 268         rx_status.freq = dev->conf.channel->center_freq;
 269         rx_status.band = dev->conf.channel->band;
 270         rx_status.mactime = le64_to_cpu(hdr->mac_time);
 271         rx_status.flag |= RX_FLAG_TSFT;
 272         if (flags & (1 << 13))
 273                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 274         ieee80211_rx_irqsafe(dev, skb, &rx_status);
 275
 276         skb = dev_alloc_skb(RTL8187_MAX_RX);
 277         if (unlikely(!skb)) {
 278                 usb_free_urb(urb);
 279                 /* TODO check rx queue length and refill *somewhere* */
 280                 return;
 281         }
 282
 283         info = (struct rtl8187_rx_info *)skb->cb;
 284         info->urb = urb;
 285         info->dev = dev;
 286         urb->transfer_buffer = skb_tail_pointer(skb);
 287         urb->context = skb;
 288         skb_queue_tail(&priv->rx_queue, skb);
 289
 290         usb_submit_urb(urb, GFP_ATOMIC);
 291 }
 292
 293 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
 294 {
 295         struct rtl8187_priv *priv = dev->priv;
 296         struct urb *entry;
 297         struct sk_buff *skb;
 298         struct rtl8187_rx_info *info;
 299
 300         while (skb_queue_len(&priv->rx_queue) < 8) {
 301                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
 302                 if (!skb)
 303                         break;
 304                 entry = usb_alloc_urb(0, GFP_KERNEL);
 305                 if (!entry) {
 306                         kfree_skb(skb);
 307                         break;
 308                 }
 309                 usb_fill_bulk_urb(entry, priv->udev,
 310                                   usb_rcvbulkpipe(priv->udev, 1),
 311                                   skb_tail_pointer(skb),
 312                                   RTL8187_MAX_RX, rtl8187_rx_cb, skb);
 313                 info = (struct rtl8187_rx_info *)skb->cb;
 314                 info->urb = entry;
 315                 info->dev = dev;
 316                 skb_queue_tail(&priv->rx_queue, skb);
 317                 usb_submit_urb(entry, GFP_KERNEL);
 318         }
 319
 320         return 0;
 321 }
 322
 323 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
 324 {
 325         struct rtl8187_priv *priv = dev->priv;
 326         u8 reg;
 327         int i;
 328
 329         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 330         reg &= (1 << 1);
 331         reg |= RTL818X_CMD_RESET;
 332         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 333
 334         i = 10;
 335         do {
 336                 msleep(2);
 337                 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
 338                       RTL818X_CMD_RESET))
 339                         break;
 340         } while (--i);
 341
 342         if (!i) {
 343                 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
 344                 return -ETIMEDOUT;
 345         }
 346
 347         /* reload registers from eeprom */
 348         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 349
 350         i = 10;
 351         do {
 352                 msleep(4);
 353                 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
 354                       RTL818X_EEPROM_CMD_CONFIG))
 355                         break;
 356         } while (--i);
 357
 358         if (!i) {
 359                 printk(KERN_ERR "%s: eeprom reset timeout!\n",
 360                        wiphy_name(dev->wiphy));
 361                 return -ETIMEDOUT;
 362         }
 363
 364         return 0;
 365 }
 366
 367 static int rtl8187_init_hw(struct ieee80211_hw *dev)
 368 {
 369         struct rtl8187_priv *priv = dev->priv;
 370         u8 reg;
 371         int res;
 372
 373         /* reset */
 374         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 375                          RTL818X_EEPROM_CMD_CONFIG);
 376         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 377         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
 378                          RTL818X_CONFIG3_ANAPARAM_WRITE);
 379         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
 380         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
 381         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
 382                          ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 383         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 384                          RTL818X_EEPROM_CMD_NORMAL);
 385
 386         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 387
 388         msleep(200);
 389         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
 390         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
 391         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
 392         msleep(200);
 393
 394         res = rtl8187_cmd_reset(dev);
 395         if (res)
 396                 return res;
 397
 398         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 399         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 400         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 401                         reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 402         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
 403         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
 404         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 405                         reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 406         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 407
 408         /* setup card */
 409         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 410         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
 411
 412         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 413         rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
 414         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 415
 416         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 417
 418         rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
 419         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 420         reg &= 0x3F;
 421         reg |= 0x80;
 422         rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
 423
 424         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 425
 426         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 427         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 428         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
 429
 430         // TODO: set RESP_RATE and BRSR properly
 431         rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 432         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 433
 434         /* host_usb_init */
 435         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 436         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
 437         reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
 438         rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
 439         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 440         rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
 441         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 442         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
 443         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
 444         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
 445         msleep(100);
 446
 447         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
 448         rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
 449         rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
 450         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 451                          RTL818X_EEPROM_CMD_CONFIG);
 452         rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
 453         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 454                          RTL818X_EEPROM_CMD_NORMAL);
 455         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
 456         msleep(100);
 457
 458         priv->rf->init(dev);
 459
 460         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 461         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
 462         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
 463         rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
 464         rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
 465         rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
 466         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
 467
 468         return 0;
 469 }
 470
 471 static const u8 rtl8187b_reg_table[][3] = {
 472         {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
 473         {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
 474         {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
 475         {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
 476
 477         {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
 478         {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
 479         {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
 480         {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
 481         {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
 482         {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
 483
 484         {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
 485         {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
 486         {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
 487         {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
 488         {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
 489         {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
 490         {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
 491         {0x73, 0x9A, 2},
 492
 493         {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
 494         {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
 495         {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
 496         {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
 497         {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0},
 498
 499         {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0},
 500         {0x8E, 0x08, 0}, {0x8F, 0x00, 0}
 501 };
 502
 503 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
 504 {
 505         struct rtl8187_priv *priv = dev->priv;
 506         int res, i;
 507         u8 reg;
 508
 509         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 510                          RTL818X_EEPROM_CMD_CONFIG);
 511
 512         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 513         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
 514         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 515         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, 0x727f3f52);
 516         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, 0x45090658);
 517         rtl818x_iowrite8(priv, &priv->map->ANAPARAM3, 0);
 518
 519         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
 520         reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
 521         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
 522         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
 523
 524         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 525         reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
 526         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 527
 528         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 529                          RTL818X_EEPROM_CMD_NORMAL);
 530
 531         res = rtl8187_cmd_reset(dev);
 532         if (res)
 533                 return res;
 534
 535         rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
 536         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 537         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 538         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 539         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 540         reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
 541                RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 542         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 543
 544         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
 545         reg = rtl818x_ioread8(priv, &priv->map->RATE_FALLBACK);
 546         reg |= RTL818X_RATE_FALLBACK_ENABLE;
 547         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, reg);
 548
 549         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
 550         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
 551         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
 552
 553         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 554                          RTL818X_EEPROM_CMD_CONFIG);
 555         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 556         rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
 557         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 558                          RTL818X_EEPROM_CMD_NORMAL);
 559
 560         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 561         for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
 562                 rtl818x_iowrite8_idx(priv,
 563                                      (u8 *)(uintptr_t)
 564                                      (rtl8187b_reg_table[i][0] | 0xFF00),
 565                                      rtl8187b_reg_table[i][1],
 566                                      rtl8187b_reg_table[i][2]);
 567         }
 568
 569         rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
 570         rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
 571
 572         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
 573         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
 574         rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
 575
 576         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
 577
 578         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
 579
 580         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 581                          RTL818X_EEPROM_CMD_CONFIG);
 582         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 583         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
 584         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 585         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 586                          RTL818X_EEPROM_CMD_NORMAL);
 587
 588         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
 589         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
 590         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
 591         msleep(1100);
 592
 593         priv->rf->init(dev);
 594
 595         reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
 596         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 597         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 598
 599         rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
 600         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
 601         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 602         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 603         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
 604         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 605         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 606
 607         reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
 608         rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
 609         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
 610         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
 611         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
 612         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
 613         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
 614         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
 615         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
 616         rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
 617         rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
 618         rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
 619         rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
 620
 621         rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
 622
 623         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
 624
 625         return 0;
 626 }
 627
 628 static int rtl8187_start(struct ieee80211_hw *dev)
 629 {
 630         struct rtl8187_priv *priv = dev->priv;
 631         u32 reg;
 632         int ret;
 633
 634         ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
 635                                      rtl8187b_init_hw(dev);
 636         if (ret)
 637                 return ret;
 638
 639         if (priv->is_rtl8187b) {
 640                 reg = RTL818X_RX_CONF_MGMT |
 641                       RTL818X_RX_CONF_DATA |
 642                       RTL818X_RX_CONF_BROADCAST |
 643                       RTL818X_RX_CONF_NICMAC |
 644                       RTL818X_RX_CONF_BSSID |
 645                       (7 << 13 /* RX FIFO threshold NONE */) |
 646                       (7 << 10 /* MAX RX DMA */) |
 647                       RTL818X_RX_CONF_RX_AUTORESETPHY |
 648                       RTL818X_RX_CONF_ONLYERLPKT |
 649                       RTL818X_RX_CONF_MULTICAST;
 650                 priv->rx_conf = reg;
 651                 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 652
 653                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 654                                   RTL818X_TX_CONF_HW_SEQNUM |
 655                                   RTL818X_TX_CONF_DISREQQSIZE |
 656                                   (7 << 8  /* short retry limit */) |
 657                                   (7 << 0  /* long retry limit */) |
 658                                   (7 << 21 /* MAX TX DMA */));
 659                 rtl8187_init_urbs(dev);
 660                 return 0;
 661         }
 662
 663         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 664
 665         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 666         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 667
 668         rtl8187_init_urbs(dev);
 669
 670         reg = RTL818X_RX_CONF_ONLYERLPKT |
 671               RTL818X_RX_CONF_RX_AUTORESETPHY |
 672               RTL818X_RX_CONF_BSSID |
 673               RTL818X_RX_CONF_MGMT |
 674               RTL818X_RX_CONF_DATA |
 675               (7 << 13 /* RX FIFO threshold NONE */) |
 676               (7 << 10 /* MAX RX DMA */) |
 677               RTL818X_RX_CONF_BROADCAST |
 678               RTL818X_RX_CONF_NICMAC;
 679
 680         priv->rx_conf = reg;
 681         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 682
 683         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 684         reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 685         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 686         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 687
 688         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 689         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 690         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 691         reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 692         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 693
 694         reg  = RTL818X_TX_CONF_CW_MIN |
 695                (7 << 21 /* MAX TX DMA */) |
 696                RTL818X_TX_CONF_NO_ICV;
 697         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 698
 699         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 700         reg |= RTL818X_CMD_TX_ENABLE;
 701         reg |= RTL818X_CMD_RX_ENABLE;
 702         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 703
 704         return 0;
 705 }
 706
 707 static void rtl8187_stop(struct ieee80211_hw *dev)
 708 {
 709         struct rtl8187_priv *priv = dev->priv;
 710         struct rtl8187_rx_info *info;
 711         struct sk_buff *skb;
 712         u32 reg;
 713
 714         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 715
 716         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 717         reg &= ~RTL818X_CMD_TX_ENABLE;
 718         reg &= ~RTL818X_CMD_RX_ENABLE;
 719         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 720
 721         priv->rf->stop(dev);
 722
 723         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 724         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
 725         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
 726         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 727
 728         while ((skb = skb_dequeue(&priv->rx_queue))) {
 729                 info = (struct rtl8187_rx_info *)skb->cb;
 730                 usb_kill_urb(info->urb);
 731                 kfree_skb(skb);
 732         }
 733         return;
 734 }
 735
 736 static int rtl8187_add_interface(struct ieee80211_hw *dev,
 737                                  struct ieee80211_if_init_conf *conf)
 738 {
 739         struct rtl8187_priv *priv = dev->priv;
 740         int i;
 741
 742         if (priv->mode != IEEE80211_IF_TYPE_MNTR)
 743                 return -EOPNOTSUPP;
 744
 745         switch (conf->type) {
 746         case IEEE80211_IF_TYPE_STA:
 747                 priv->mode = conf->type;
 748                 break;
 749         default:
 750                 return -EOPNOTSUPP;
 751         }
 752
 753         priv->vif = conf->vif;
 754
 755         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 756         for (i = 0; i < ETH_ALEN; i++)
 757                 rtl818x_iowrite8(priv, &priv->map->MAC[i],
 758                                  ((u8 *)conf->mac_addr)[i]);
 759         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 760
 761         return 0;
 762 }
 763
 764 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
 765                                      struct ieee80211_if_init_conf *conf)
 766 {
 767         struct rtl8187_priv *priv = dev->priv;
 768         priv->mode = IEEE80211_IF_TYPE_MNTR;
 769         priv->vif = NULL;
 770 }
 771
 772 static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
 773 {
 774         struct rtl8187_priv *priv = dev->priv;
 775         u32 reg;
 776
 777         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 778         /* Enable TX loopback on MAC level to avoid TX during channel
 779          * changes, as this has be seen to causes problems and the
 780          * card will stop work until next reset
 781          */
 782         rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 783                           reg | RTL818X_TX_CONF_LOOPBACK_MAC);
 784         msleep(10);
 785         priv->rf->set_chan(dev, conf);
 786         msleep(10);
 787         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 788
 789         rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
 790
 791         if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
 792                 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
 793                 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
 794                 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
 795                 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
 796         } else {
 797                 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
 798                 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
 799                 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
 800                 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
 801         }
 802
 803         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
 804         rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
 805         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
 806         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
 807         return 0;
 808 }
 809
 810 static int rtl8187_config_interface(struct ieee80211_hw *dev,
 811                                     struct ieee80211_vif *vif,
 812                                     struct ieee80211_if_conf *conf)
 813 {
 814         struct rtl8187_priv *priv = dev->priv;
 815         int i;
 816
 817         for (i = 0; i < ETH_ALEN; i++)
 818                 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
 819
 820         if (is_valid_ether_addr(conf->bssid))
 821                 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
 822         else
 823                 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
 824
 825         return 0;
 826 }
 827
 828 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
 829                                      unsigned int changed_flags,
 830                                      unsigned int *total_flags,
 831                                      int mc_count, struct dev_addr_list *mclist)
 832 {
 833         struct rtl8187_priv *priv = dev->priv;
 834
 835         if (changed_flags & FIF_FCSFAIL)
 836                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
 837         if (changed_flags & FIF_CONTROL)
 838                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
 839         if (changed_flags & FIF_OTHER_BSS)
 840                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
 841         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
 842                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
 843         else
 844                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
 845
 846         *total_flags = 0;
 847
 848         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
 849                 *total_flags |= FIF_FCSFAIL;
 850         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
 851                 *total_flags |= FIF_CONTROL;
 852         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
 853                 *total_flags |= FIF_OTHER_BSS;
 854         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
 855                 *total_flags |= FIF_ALLMULTI;
 856
 857         rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
 858 }
 859
 860 static const struct ieee80211_ops rtl8187_ops = {
 861         .tx                     = rtl8187_tx,
 862         .start                  = rtl8187_start,
 863         .stop                   = rtl8187_stop,
 864         .add_interface          = rtl8187_add_interface,
 865         .remove_interface       = rtl8187_remove_interface,
 866         .config                 = rtl8187_config,
 867         .config_interface       = rtl8187_config_interface,
 868         .configure_filter       = rtl8187_configure_filter,
 869 };
 870
 871 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
 872 {
 873         struct ieee80211_hw *dev = eeprom->data;
 874         struct rtl8187_priv *priv = dev->priv;
 875         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 876
 877         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
 878         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
 879         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
 880         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
 881 }
 882
 883 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
 884 {
 885         struct ieee80211_hw *dev = eeprom->data;
 886         struct rtl8187_priv *priv = dev->priv;
 887         u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
 888
 889         if (eeprom->reg_data_in)
 890                 reg |= RTL818X_EEPROM_CMD_WRITE;
 891         if (eeprom->reg_data_out)
 892                 reg |= RTL818X_EEPROM_CMD_READ;
 893         if (eeprom->reg_data_clock)
 894                 reg |= RTL818X_EEPROM_CMD_CK;
 895         if (eeprom->reg_chip_select)
 896                 reg |= RTL818X_EEPROM_CMD_CS;
 897
 898         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
 899         udelay(10);
 900 }
 901
 902 static int __devinit rtl8187_probe(struct usb_interface *intf,
 903                                    const struct usb_device_id *id)
 904 {
 905         struct usb_device *udev = interface_to_usbdev(intf);
 906         struct ieee80211_hw *dev;
 907         struct rtl8187_priv *priv;
 908         struct eeprom_93cx6 eeprom;
 909         struct ieee80211_channel *channel;
 910         u16 txpwr, reg;
 911         int err, i;
 912         DECLARE_MAC_BUF(mac);
 913
 914         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
 915         if (!dev) {
 916                 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
 917                 return -ENOMEM;
 918         }
 919
 920         priv = dev->priv;
 921
 922         SET_IEEE80211_DEV(dev, &intf->dev);
 923         usb_set_intfdata(intf, dev);
 924         priv->udev = udev;
 925
 926         usb_get_dev(udev);
 927
 928         skb_queue_head_init(&priv->rx_queue);
 929
 930         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
 931         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
 932
 933         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
 934         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
 935         priv->map = (struct rtl818x_csr *)0xFF00;
 936
 937         priv->band.band = IEEE80211_BAND_2GHZ;
 938         priv->band.channels = priv->channels;
 939         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
 940         priv->band.bitrates = priv->rates;
 941         priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
 942         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
 943
 944
 945         priv->mode = IEEE80211_IF_TYPE_MNTR;
 946         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
 947                      IEEE80211_HW_RX_INCLUDES_FCS |
 948                      IEEE80211_HW_SIGNAL_UNSPEC;
 949         dev->extra_tx_headroom = sizeof(struct rtl8187_tx_hdr);
 950         dev->queues = 1;
 951         dev->max_signal = 65;
 952
 953         eeprom.data = dev;
 954         eeprom.register_read = rtl8187_eeprom_register_read;
 955         eeprom.register_write = rtl8187_eeprom_register_write;
 956         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
 957                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
 958         else
 959                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
 960
 961         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 962         udelay(10);
 963
 964         eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
 965                                (__le16 __force *)dev->wiphy->perm_addr, 3);
 966         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
 967                 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
 968                        "generated MAC address\n");
 969                 random_ether_addr(dev->wiphy->perm_addr);
 970         }
 971
 972         channel = priv->channels;
 973         for (i = 0; i < 3; i++) {
 974                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
 975                                   &txpwr);
 976                 (*channel++).hw_value = txpwr & 0xFF;
 977                 (*channel++).hw_value = txpwr >> 8;
 978         }
 979         for (i = 0; i < 2; i++) {
 980                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
 981                                   &txpwr);
 982                 (*channel++).hw_value = txpwr & 0xFF;
 983                 (*channel++).hw_value = txpwr >> 8;
 984         }
 985         for (i = 0; i < 2; i++) {
 986                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6 + i,
 987                                   &txpwr);
 988                 (*channel++).hw_value = txpwr & 0xFF;
 989                 (*channel++).hw_value = txpwr >> 8;
 990         }
 991
 992         eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
 993                           &priv->txpwr_base);
 994
 995         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
 996         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
 997         /* 0 means asic B-cut, we should use SW 3 wire
 998          * bit-by-bit banging for radio. 1 means we can use
 999          * USB specific request to write radio registers */
1000         priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1001         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1002         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1003
1004         priv->rf = rtl8187_detect_rf(dev);
1005
1006         err = ieee80211_register_hw(dev);
1007         if (err) {
1008                 printk(KERN_ERR "rtl8187: Cannot register device\n");
1009                 goto err_free_dev;
1010         }
1011
1012         printk(KERN_INFO "%s: hwaddr %s, rtl8187 V%d + %s\n",
1013                wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
1014                priv->asic_rev, priv->rf->name);
1015
1016         return 0;
1017
1018  err_free_dev:
1019         ieee80211_free_hw(dev);
1020         usb_set_intfdata(intf, NULL);
1021         usb_put_dev(udev);
1022         return err;
1023 }
1024
1025 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1026 {
1027         struct ieee80211_hw *dev = usb_get_intfdata(intf);
1028         struct rtl8187_priv *priv;
1029
1030         if (!dev)
1031                 return;
1032
1033         ieee80211_unregister_hw(dev);
1034
1035         priv = dev->priv;
1036         usb_put_dev(interface_to_usbdev(intf));
1037         ieee80211_free_hw(dev);
1038 }
1039
1040 static struct usb_driver rtl8187_driver = {
1041         .name           = KBUILD_MODNAME,
1042         .id_table       = rtl8187_table,
1043         .probe          = rtl8187_probe,
1044         .disconnect     = rtl8187_disconnect,
1045 };
1046
1047 static int __init rtl8187_init(void)
1048 {
1049         return usb_register(&rtl8187_driver);
1050 }
1051
1052 static void __exit rtl8187_exit(void)
1053 {
1054         usb_deregister(&rtl8187_driver);
1055 }
1056
1057 module_init(rtl8187_init);
1058 module_exit(rtl8187_exit);