err.no Git - linux-2.6/blob - drivers/net/wireless/rt2x00/rt73usb.c

   1 /*
   2         Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, write to the
  17         Free Software Foundation, Inc.,
  18         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /*
  22         Module: rt73usb
  23         Abstract: rt73usb device specific routines.
  24         Supported chipsets: rt2571W & rt2671.
  25  */
  26
  27 #include <linux/crc-itu-t.h>
  28 #include <linux/delay.h>
  29 #include <linux/etherdevice.h>
  30 #include <linux/init.h>
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/usb.h>
  34
  35 #include "rt2x00.h"
  36 #include "rt2x00usb.h"
  37 #include "rt73usb.h"
  38
  39 /*
  40  * Register access.
  41  * All access to the CSR registers will go through the methods
  42  * rt73usb_register_read and rt73usb_register_write.
  43  * BBP and RF register require indirect register access,
  44  * and use the CSR registers BBPCSR and RFCSR to achieve this.
  45  * These indirect registers work with busy bits,
  46  * and we will try maximal REGISTER_BUSY_COUNT times to access
  47  * the register while taking a REGISTER_BUSY_DELAY us delay
  48  * between each attampt. When the busy bit is still set at that time,
  49  * the access attempt is considered to have failed,
  50  * and we will print an error.
  51  * The _lock versions must be used if you already hold the usb_cache_mutex
  52  */
  53 static inline void rt73usb_register_read(struct rt2x00_dev *rt2x00dev,
  54                                          const unsigned int offset, u32 *value)
  55 {
  56         __le32 reg;
  57         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  58                                       USB_VENDOR_REQUEST_IN, offset,
  59                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  60         *value = le32_to_cpu(reg);
  61 }
  62
  63 static inline void rt73usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
  64                                               const unsigned int offset, u32 *value)
  65 {
  66         __le32 reg;
  67         rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
  68                                        USB_VENDOR_REQUEST_IN, offset,
  69                                        &reg, sizeof(u32), REGISTER_TIMEOUT);
  70         *value = le32_to_cpu(reg);
  71 }
  72
  73 static inline void rt73usb_register_multiread(struct rt2x00_dev *rt2x00dev,
  74                                               const unsigned int offset,
  75                                               void *value, const u32 length)
  76 {
  77         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  78                                       USB_VENDOR_REQUEST_IN, offset,
  79                                       value, length,
  80                                       REGISTER_TIMEOUT32(length));
  81 }
  82
  83 static inline void rt73usb_register_write(struct rt2x00_dev *rt2x00dev,
  84                                           const unsigned int offset, u32 value)
  85 {
  86         __le32 reg = cpu_to_le32(value);
  87         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  88                                       USB_VENDOR_REQUEST_OUT, offset,
  89                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  90 }
  91
  92 static inline void rt73usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
  93                                                const unsigned int offset, u32 value)
  94 {
  95         __le32 reg = cpu_to_le32(value);
  96         rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
  97                                        USB_VENDOR_REQUEST_OUT, offset,
  98                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  99 }
 100
 101 static inline void rt73usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
 102                                                const unsigned int offset,
 103                                                void *value, const u32 length)
 104 {
 105         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
 106                                       USB_VENDOR_REQUEST_OUT, offset,
 107                                       value, length,
 108                                       REGISTER_TIMEOUT32(length));
 109 }
 110
 111 static u32 rt73usb_bbp_check(struct rt2x00_dev *rt2x00dev)
 112 {
 113         u32 reg;
 114         unsigned int i;
 115
 116         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 117                 rt73usb_register_read_lock(rt2x00dev, PHY_CSR3, &reg);
 118                 if (!rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 119                         break;
 120                 udelay(REGISTER_BUSY_DELAY);
 121         }
 122
 123         return reg;
 124 }
 125
 126 static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev,
 127                               const unsigned int word, const u8 value)
 128 {
 129         u32 reg;
 130
 131         mutex_lock(&rt2x00dev->usb_cache_mutex);
 132
 133         /*
 134          * Wait until the BBP becomes ready.
 135          */
 136         reg = rt73usb_bbp_check(rt2x00dev);
 137         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 138                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
 139                 mutex_unlock(&rt2x00dev->usb_cache_mutex);
 140                 return;
 141         }
 142
 143         /*
 144          * Write the data into the BBP.
 145          */
 146         reg = 0;
 147         rt2x00_set_field32(&reg, PHY_CSR3_VALUE, value);
 148         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 149         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 150         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 0);
 151
 152         rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
 153         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 154 }
 155
 156 static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev,
 157                              const unsigned int word, u8 *value)
 158 {
 159         u32 reg;
 160
 161         mutex_lock(&rt2x00dev->usb_cache_mutex);
 162
 163         /*
 164          * Wait until the BBP becomes ready.
 165          */
 166         reg = rt73usb_bbp_check(rt2x00dev);
 167         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 168                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 169                 mutex_unlock(&rt2x00dev->usb_cache_mutex);
 170                 return;
 171         }
 172
 173         /*
 174          * Write the request into the BBP.
 175          */
 176         reg = 0;
 177         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 178         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 179         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 1);
 180
 181         rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
 182
 183         /*
 184          * Wait until the BBP becomes ready.
 185          */
 186         reg = rt73usb_bbp_check(rt2x00dev);
 187         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 188                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 189                 *value = 0xff;
 190                 return;
 191         }
 192
 193         *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
 194         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 195 }
 196
 197 static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev,
 198                              const unsigned int word, const u32 value)
 199 {
 200         u32 reg;
 201         unsigned int i;
 202
 203         if (!word)
 204                 return;
 205
 206         mutex_lock(&rt2x00dev->usb_cache_mutex);
 207
 208         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 209                 rt73usb_register_read_lock(rt2x00dev, PHY_CSR4, &reg);
 210                 if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
 211                         goto rf_write;
 212                 udelay(REGISTER_BUSY_DELAY);
 213         }
 214
 215         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 216         ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
 217         return;
 218
 219 rf_write:
 220         reg = 0;
 221         rt2x00_set_field32(&reg, PHY_CSR4_VALUE, value);
 222
 223         /*
 224          * RF5225 and RF2527 contain 21 bits per RF register value,
 225          * all others contain 20 bits.
 226          */
 227         rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS,
 228                            20 + (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 229                                  rt2x00_rf(&rt2x00dev->chip, RF2527)));
 230         rt2x00_set_field32(&reg, PHY_CSR4_IF_SELECT, 0);
 231         rt2x00_set_field32(&reg, PHY_CSR4_BUSY, 1);
 232
 233         rt73usb_register_write_lock(rt2x00dev, PHY_CSR4, reg);
 234         rt2x00_rf_write(rt2x00dev, word, value);
 235         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 236 }
 237
 238 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
 239 #define CSR_OFFSET(__word)      ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
 240
 241 static void rt73usb_read_csr(struct rt2x00_dev *rt2x00dev,
 242                              const unsigned int word, u32 *data)
 243 {
 244         rt73usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
 245 }
 246
 247 static void rt73usb_write_csr(struct rt2x00_dev *rt2x00dev,
 248                               const unsigned int word, u32 data)
 249 {
 250         rt73usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
 251 }
 252
 253 static const struct rt2x00debug rt73usb_rt2x00debug = {
 254         .owner  = THIS_MODULE,
 255         .csr    = {
 256                 .read           = rt73usb_read_csr,
 257                 .write          = rt73usb_write_csr,
 258                 .word_size      = sizeof(u32),
 259                 .word_count     = CSR_REG_SIZE / sizeof(u32),
 260         },
 261         .eeprom = {
 262                 .read           = rt2x00_eeprom_read,
 263                 .write          = rt2x00_eeprom_write,
 264                 .word_size      = sizeof(u16),
 265                 .word_count     = EEPROM_SIZE / sizeof(u16),
 266         },
 267         .bbp    = {
 268                 .read           = rt73usb_bbp_read,
 269                 .write          = rt73usb_bbp_write,
 270                 .word_size      = sizeof(u8),
 271                 .word_count     = BBP_SIZE / sizeof(u8),
 272         },
 273         .rf     = {
 274                 .read           = rt2x00_rf_read,
 275                 .write          = rt73usb_rf_write,
 276                 .word_size      = sizeof(u32),
 277                 .word_count     = RF_SIZE / sizeof(u32),
 278         },
 279 };
 280 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
 281
 282 #ifdef CONFIG_RT73USB_LEDS
 283 static void rt73usb_brightness_set(struct led_classdev *led_cdev,
 284                                    enum led_brightness brightness)
 285 {
 286         struct rt2x00_led *led =
 287            container_of(led_cdev, struct rt2x00_led, led_dev);
 288         unsigned int enabled = brightness != LED_OFF;
 289         unsigned int a_mode =
 290             (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_5GHZ);
 291         unsigned int bg_mode =
 292             (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_2GHZ);
 293
 294         if (led->type == LED_TYPE_RADIO) {
 295                 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
 296                                    MCU_LEDCS_RADIO_STATUS, enabled);
 297
 298                 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
 299                                             0, led->rt2x00dev->led_mcu_reg,
 300                                             REGISTER_TIMEOUT);
 301         } else if (led->type == LED_TYPE_ASSOC) {
 302                 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
 303                                    MCU_LEDCS_LINK_BG_STATUS, bg_mode);
 304                 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
 305                                    MCU_LEDCS_LINK_A_STATUS, a_mode);
 306
 307                 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
 308                                             0, led->rt2x00dev->led_mcu_reg,
 309                                             REGISTER_TIMEOUT);
 310         } else if (led->type == LED_TYPE_QUALITY) {
 311                 /*
 312                  * The brightness is divided into 6 levels (0 - 5),
 313                  * this means we need to convert the brightness
 314                  * argument into the matching level within that range.
 315                  */
 316                 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
 317                                             brightness / (LED_FULL / 6),
 318                                             led->rt2x00dev->led_mcu_reg,
 319                                             REGISTER_TIMEOUT);
 320         }
 321 }
 322
 323 static int rt73usb_blink_set(struct led_classdev *led_cdev,
 324                              unsigned long *delay_on,
 325                              unsigned long *delay_off)
 326 {
 327         struct rt2x00_led *led =
 328             container_of(led_cdev, struct rt2x00_led, led_dev);
 329         u32 reg;
 330
 331         rt73usb_register_read(led->rt2x00dev, MAC_CSR14, &reg);
 332         rt2x00_set_field32(&reg, MAC_CSR14_ON_PERIOD, *delay_on);
 333         rt2x00_set_field32(&reg, MAC_CSR14_OFF_PERIOD, *delay_off);
 334         rt73usb_register_write(led->rt2x00dev, MAC_CSR14, reg);
 335
 336         return 0;
 337 }
 338 #endif /* CONFIG_RT73USB_LEDS */
 339
 340 /*
 341  * Configuration handlers.
 342  */
 343 static void rt73usb_config_filter(struct rt2x00_dev *rt2x00dev,
 344                                   const unsigned int filter_flags)
 345 {
 346         u32 reg;
 347
 348         /*
 349          * Start configuration steps.
 350          * Note that the version error will always be dropped
 351          * and broadcast frames will always be accepted since
 352          * there is no filter for it at this time.
 353          */
 354         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 355         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CRC,
 356                            !(filter_flags & FIF_FCSFAIL));
 357         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_PHYSICAL,
 358                            !(filter_flags & FIF_PLCPFAIL));
 359         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CONTROL,
 360                            !(filter_flags & FIF_CONTROL));
 361         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_NOT_TO_ME,
 362                            !(filter_flags & FIF_PROMISC_IN_BSS));
 363         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_TO_DS,
 364                            !(filter_flags & FIF_PROMISC_IN_BSS) &&
 365                            !rt2x00dev->intf_ap_count);
 366         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_VERSION_ERROR, 1);
 367         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_MULTICAST,
 368                            !(filter_flags & FIF_ALLMULTI));
 369         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_BROADCAST, 0);
 370         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_ACK_CTS,
 371                            !(filter_flags & FIF_CONTROL));
 372         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 373 }
 374
 375 static void rt73usb_config_intf(struct rt2x00_dev *rt2x00dev,
 376                                 struct rt2x00_intf *intf,
 377                                 struct rt2x00intf_conf *conf,
 378                                 const unsigned int flags)
 379 {
 380         unsigned int beacon_base;
 381         u32 reg;
 382
 383         if (flags & CONFIG_UPDATE_TYPE) {
 384                 /*
 385                  * Clear current synchronisation setup.
 386                  * For the Beacon base registers we only need to clear
 387                  * the first byte since that byte contains the VALID and OWNER
 388                  * bits which (when set to 0) will invalidate the entire beacon.
 389                  */
 390                 beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
 391                 rt73usb_register_write(rt2x00dev, beacon_base, 0);
 392
 393                 /*
 394                  * Enable synchronisation.
 395                  */
 396                 rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 397                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
 398                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, conf->sync);
 399                 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
 400                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 401         }
 402
 403         if (flags & CONFIG_UPDATE_MAC) {
 404                 reg = le32_to_cpu(conf->mac[1]);
 405                 rt2x00_set_field32(&reg, MAC_CSR3_UNICAST_TO_ME_MASK, 0xff);
 406                 conf->mac[1] = cpu_to_le32(reg);
 407
 408                 rt73usb_register_multiwrite(rt2x00dev, MAC_CSR2,
 409                                             conf->mac, sizeof(conf->mac));
 410         }
 411
 412         if (flags & CONFIG_UPDATE_BSSID) {
 413                 reg = le32_to_cpu(conf->bssid[1]);
 414                 rt2x00_set_field32(&reg, MAC_CSR5_BSS_ID_MASK, 3);
 415                 conf->bssid[1] = cpu_to_le32(reg);
 416
 417                 rt73usb_register_multiwrite(rt2x00dev, MAC_CSR4,
 418                                             conf->bssid, sizeof(conf->bssid));
 419         }
 420 }
 421
 422 static void rt73usb_config_erp(struct rt2x00_dev *rt2x00dev,
 423                                struct rt2x00lib_erp *erp)
 424 {
 425         u32 reg;
 426
 427         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 428         rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, erp->ack_timeout);
 429         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 430
 431         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 432         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
 433                            !!erp->short_preamble);
 434         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 435 }
 436
 437 static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
 438                                    const int basic_rate_mask)
 439 {
 440         rt73usb_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
 441 }
 442
 443 static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
 444                                    struct rf_channel *rf, const int txpower)
 445 {
 446         u8 r3;
 447         u8 r94;
 448         u8 smart;
 449
 450         rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
 451         rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
 452
 453         smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 454                   rt2x00_rf(&rt2x00dev->chip, RF2527));
 455
 456         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 457         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
 458         rt73usb_bbp_write(rt2x00dev, 3, r3);
 459
 460         r94 = 6;
 461         if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
 462                 r94 += txpower - MAX_TXPOWER;
 463         else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
 464                 r94 += txpower;
 465         rt73usb_bbp_write(rt2x00dev, 94, r94);
 466
 467         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 468         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 469         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 470         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 471
 472         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 473         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 474         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
 475         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 476
 477         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 478         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 479         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 480         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 481
 482         udelay(10);
 483 }
 484
 485 static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
 486                                    const int txpower)
 487 {
 488         struct rf_channel rf;
 489
 490         rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
 491         rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
 492         rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
 493         rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
 494
 495         rt73usb_config_channel(rt2x00dev, &rf, txpower);
 496 }
 497
 498 static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
 499                                       struct antenna_setup *ant)
 500 {
 501         u8 r3;
 502         u8 r4;
 503         u8 r77;
 504         u8 temp;
 505
 506         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 507         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 508         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 509
 510         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 511
 512         /*
 513          * Configure the RX antenna.
 514          */
 515         switch (ant->rx) {
 516         case ANTENNA_HW_DIVERSITY:
 517                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
 518                 temp = !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags)
 519                        && (rt2x00dev->curr_band != IEEE80211_BAND_5GHZ);
 520                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, temp);
 521                 break;
 522         case ANTENNA_A:
 523                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 524                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 525                 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
 526                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 527                 else
 528                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 529                 break;
 530         case ANTENNA_B:
 531         default:
 532                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 533                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 534                 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
 535                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 536                 else
 537                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 538                 break;
 539         }
 540
 541         rt73usb_bbp_write(rt2x00dev, 77, r77);
 542         rt73usb_bbp_write(rt2x00dev, 3, r3);
 543         rt73usb_bbp_write(rt2x00dev, 4, r4);
 544 }
 545
 546 static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
 547                                       struct antenna_setup *ant)
 548 {
 549         u8 r3;
 550         u8 r4;
 551         u8 r77;
 552
 553         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 554         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 555         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 556
 557         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 558         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 559                           !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 560
 561         /*
 562          * Configure the RX antenna.
 563          */
 564         switch (ant->rx) {
 565         case ANTENNA_HW_DIVERSITY:
 566                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
 567                 break;
 568         case ANTENNA_A:
 569                 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 570                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 571                 break;
 572         case ANTENNA_B:
 573         default:
 574                 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 575                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 576                 break;
 577         }
 578
 579         rt73usb_bbp_write(rt2x00dev, 77, r77);
 580         rt73usb_bbp_write(rt2x00dev, 3, r3);
 581         rt73usb_bbp_write(rt2x00dev, 4, r4);
 582 }
 583
 584 struct antenna_sel {
 585         u8 word;
 586         /*
 587          * value[0] -> non-LNA
 588          * value[1] -> LNA
 589          */
 590         u8 value[2];
 591 };
 592
 593 static const struct antenna_sel antenna_sel_a[] = {
 594         { 96,  { 0x58, 0x78 } },
 595         { 104, { 0x38, 0x48 } },
 596         { 75,  { 0xfe, 0x80 } },
 597         { 86,  { 0xfe, 0x80 } },
 598         { 88,  { 0xfe, 0x80 } },
 599         { 35,  { 0x60, 0x60 } },
 600         { 97,  { 0x58, 0x58 } },
 601         { 98,  { 0x58, 0x58 } },
 602 };
 603
 604 static const struct antenna_sel antenna_sel_bg[] = {
 605         { 96,  { 0x48, 0x68 } },
 606         { 104, { 0x2c, 0x3c } },
 607         { 75,  { 0xfe, 0x80 } },
 608         { 86,  { 0xfe, 0x80 } },
 609         { 88,  { 0xfe, 0x80 } },
 610         { 35,  { 0x50, 0x50 } },
 611         { 97,  { 0x48, 0x48 } },
 612         { 98,  { 0x48, 0x48 } },
 613 };
 614
 615 static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
 616                                    struct antenna_setup *ant)
 617 {
 618         const struct antenna_sel *sel;
 619         unsigned int lna;
 620         unsigned int i;
 621         u32 reg;
 622
 623         /*
 624          * We should never come here because rt2x00lib is supposed
 625          * to catch this and send us the correct antenna explicitely.
 626          */
 627         BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
 628                ant->tx == ANTENNA_SW_DIVERSITY);
 629
 630         if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ) {
 631                 sel = antenna_sel_a;
 632                 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
 633         } else {
 634                 sel = antenna_sel_bg;
 635                 lna = test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
 636         }
 637
 638         for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
 639                 rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
 640
 641         rt73usb_register_read(rt2x00dev, PHY_CSR0, &reg);
 642
 643         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG,
 644                            (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ));
 645         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A,
 646                            (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ));
 647
 648         rt73usb_register_write(rt2x00dev, PHY_CSR0, reg);
 649
 650         if (rt2x00_rf(&rt2x00dev->chip, RF5226) ||
 651             rt2x00_rf(&rt2x00dev->chip, RF5225))
 652                 rt73usb_config_antenna_5x(rt2x00dev, ant);
 653         else if (rt2x00_rf(&rt2x00dev->chip, RF2528) ||
 654                  rt2x00_rf(&rt2x00dev->chip, RF2527))
 655                 rt73usb_config_antenna_2x(rt2x00dev, ant);
 656 }
 657
 658 static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
 659                                     struct rt2x00lib_conf *libconf)
 660 {
 661         u32 reg;
 662
 663         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
 664         rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time);
 665         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
 666
 667         rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg);
 668         rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs);
 669         rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
 670         rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs);
 671         rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
 672
 673         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 674         rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
 675         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 676
 677         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 678         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
 679         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 680
 681         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 682         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
 683                            libconf->conf->beacon_int * 16);
 684         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 685 }
 686
 687 static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
 688                            struct rt2x00lib_conf *libconf,
 689                            const unsigned int flags)
 690 {
 691         if (flags & CONFIG_UPDATE_PHYMODE)
 692                 rt73usb_config_phymode(rt2x00dev, libconf->basic_rates);
 693         if (flags & CONFIG_UPDATE_CHANNEL)
 694                 rt73usb_config_channel(rt2x00dev, &libconf->rf,
 695                                        libconf->conf->power_level);
 696         if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
 697                 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
 698         if (flags & CONFIG_UPDATE_ANTENNA)
 699                 rt73usb_config_antenna(rt2x00dev, &libconf->ant);
 700         if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
 701                 rt73usb_config_duration(rt2x00dev, libconf);
 702 }
 703
 704 /*
 705  * Link tuning
 706  */
 707 static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev,
 708                                struct link_qual *qual)
 709 {
 710         u32 reg;
 711
 712         /*
 713          * Update FCS error count from register.
 714          */
 715         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
 716         qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
 717
 718         /*
 719          * Update False CCA count from register.
 720          */
 721         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
 722         qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
 723 }
 724
 725 static void rt73usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
 726 {
 727         rt73usb_bbp_write(rt2x00dev, 17, 0x20);
 728         rt2x00dev->link.vgc_level = 0x20;
 729 }
 730
 731 static void rt73usb_link_tuner(struct rt2x00_dev *rt2x00dev)
 732 {
 733         int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
 734         u8 r17;
 735         u8 up_bound;
 736         u8 low_bound;
 737
 738         rt73usb_bbp_read(rt2x00dev, 17, &r17);
 739
 740         /*
 741          * Determine r17 bounds.
 742          */
 743         if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
 744                 low_bound = 0x28;
 745                 up_bound = 0x48;
 746
 747                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
 748                         low_bound += 0x10;
 749                         up_bound += 0x10;
 750                 }
 751         } else {
 752                 if (rssi > -82) {
 753                         low_bound = 0x1c;
 754                         up_bound = 0x40;
 755                 } else if (rssi > -84) {
 756                         low_bound = 0x1c;
 757                         up_bound = 0x20;
 758                 } else {
 759                         low_bound = 0x1c;
 760                         up_bound = 0x1c;
 761                 }
 762
 763                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
 764                         low_bound += 0x14;
 765                         up_bound += 0x10;
 766                 }
 767         }
 768
 769         /*
 770          * If we are not associated, we should go straight to the
 771          * dynamic CCA tuning.
 772          */
 773         if (!rt2x00dev->intf_associated)
 774                 goto dynamic_cca_tune;
 775
 776         /*
 777          * Special big-R17 for very short distance
 778          */
 779         if (rssi > -35) {
 780                 if (r17 != 0x60)
 781                         rt73usb_bbp_write(rt2x00dev, 17, 0x60);
 782                 return;
 783         }
 784
 785         /*
 786          * Special big-R17 for short distance
 787          */
 788         if (rssi >= -58) {
 789                 if (r17 != up_bound)
 790                         rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 791                 return;
 792         }
 793
 794         /*
 795          * Special big-R17 for middle-short distance
 796          */
 797         if (rssi >= -66) {
 798                 low_bound += 0x10;
 799                 if (r17 != low_bound)
 800                         rt73usb_bbp_write(rt2x00dev, 17, low_bound);
 801                 return;
 802         }
 803
 804         /*
 805          * Special mid-R17 for middle distance
 806          */
 807         if (rssi >= -74) {
 808                 if (r17 != (low_bound + 0x10))
 809                         rt73usb_bbp_write(rt2x00dev, 17, low_bound + 0x08);
 810                 return;
 811         }
 812
 813         /*
 814          * Special case: Change up_bound based on the rssi.
 815          * Lower up_bound when rssi is weaker then -74 dBm.
 816          */
 817         up_bound -= 2 * (-74 - rssi);
 818         if (low_bound > up_bound)
 819                 up_bound = low_bound;
 820
 821         if (r17 > up_bound) {
 822                 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 823                 return;
 824         }
 825
 826 dynamic_cca_tune:
 827
 828         /*
 829          * r17 does not yet exceed upper limit, continue and base
 830          * the r17 tuning on the false CCA count.
 831          */
 832         if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
 833                 r17 += 4;
 834                 if (r17 > up_bound)
 835                         r17 = up_bound;
 836                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 837         } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
 838                 r17 -= 4;
 839                 if (r17 < low_bound)
 840                         r17 = low_bound;
 841                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 842         }
 843 }
 844
 845 /*
 846  * Firmware functions
 847  */
 848 static char *rt73usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
 849 {
 850         return FIRMWARE_RT2571;
 851 }
 852
 853 static u16 rt73usb_get_firmware_crc(void *data, const size_t len)
 854 {
 855         u16 crc;
 856
 857         /*
 858          * Use the crc itu-t algorithm.
 859          * The last 2 bytes in the firmware array are the crc checksum itself,
 860          * this means that we should never pass those 2 bytes to the crc
 861          * algorithm.
 862          */
 863         crc = crc_itu_t(0, data, len - 2);
 864         crc = crc_itu_t_byte(crc, 0);
 865         crc = crc_itu_t_byte(crc, 0);
 866
 867         return crc;
 868 }
 869
 870 static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, void *data,
 871                                  const size_t len)
 872 {
 873         unsigned int i;
 874         int status;
 875         u32 reg;
 876         char *ptr = data;
 877         char *cache;
 878         int buflen;
 879
 880         /*
 881          * Wait for stable hardware.
 882          */
 883         for (i = 0; i < 100; i++) {
 884                 rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
 885                 if (reg)
 886                         break;
 887                 msleep(1);
 888         }
 889
 890         if (!reg) {
 891                 ERROR(rt2x00dev, "Unstable hardware.\n");
 892                 return -EBUSY;
 893         }
 894
 895         /*
 896          * Write firmware to device.
 897          * We setup a seperate cache for this action,
 898          * since we are going to write larger chunks of data
 899          * then normally used cache size.
 900          */
 901         cache = kmalloc(CSR_CACHE_SIZE_FIRMWARE, GFP_KERNEL);
 902         if (!cache) {
 903                 ERROR(rt2x00dev, "Failed to allocate firmware cache.\n");
 904                 return -ENOMEM;
 905         }
 906
 907         for (i = 0; i < len; i += CSR_CACHE_SIZE_FIRMWARE) {
 908                 buflen = min_t(int, len - i, CSR_CACHE_SIZE_FIRMWARE);
 909
 910                 memcpy(cache, ptr, buflen);
 911
 912                 rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
 913                                          USB_VENDOR_REQUEST_OUT,
 914                                          FIRMWARE_IMAGE_BASE + i, 0,
 915                                          cache, buflen,
 916                                          REGISTER_TIMEOUT32(buflen));
 917
 918                 ptr += buflen;
 919         }
 920
 921         kfree(cache);
 922
 923         /*
 924          * Send firmware request to device to load firmware,
 925          * we need to specify a long timeout time.
 926          */
 927         status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
 928                                              0, USB_MODE_FIRMWARE,
 929                                              REGISTER_TIMEOUT_FIRMWARE);
 930         if (status < 0) {
 931                 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
 932                 return status;
 933         }
 934
 935         return 0;
 936 }
 937
 938 /*
 939  * Initialization functions.
 940  */
 941 static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
 942 {
 943         u32 reg;
 944
 945         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 946         rt2x00_set_field32(&reg, TXRX_CSR0_AUTO_TX_SEQ, 1);
 947         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 0);
 948         rt2x00_set_field32(&reg, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
 949         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 950
 951         rt73usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
 952         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
 953         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0_VALID, 1);
 954         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
 955         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1_VALID, 1);
 956         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2, 42); /* OFDM Rate */
 957         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2_VALID, 1);
 958         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3, 30); /* Rssi */
 959         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3_VALID, 1);
 960         rt73usb_register_write(rt2x00dev, TXRX_CSR1, reg);
 961
 962         /*
 963          * CCK TXD BBP registers
 964          */
 965         rt73usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
 966         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0, 13);
 967         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0_VALID, 1);
 968         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1, 12);
 969         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1_VALID, 1);
 970         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2, 11);
 971         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2_VALID, 1);
 972         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3, 10);
 973         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3_VALID, 1);
 974         rt73usb_register_write(rt2x00dev, TXRX_CSR2, reg);
 975
 976         /*
 977          * OFDM TXD BBP registers
 978          */
 979         rt73usb_register_read(rt2x00dev, TXRX_CSR3, &reg);
 980         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0, 7);
 981         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0_VALID, 1);
 982         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1, 6);
 983         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1_VALID, 1);
 984         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2, 5);
 985         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2_VALID, 1);
 986         rt73usb_register_write(rt2x00dev, TXRX_CSR3, reg);
 987
 988         rt73usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
 989         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_6MBS, 59);
 990         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_9MBS, 53);
 991         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_12MBS, 49);
 992         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_18MBS, 46);
 993         rt73usb_register_write(rt2x00dev, TXRX_CSR7, reg);
 994
 995         rt73usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
 996         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_24MBS, 44);
 997         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_36MBS, 42);
 998         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_48MBS, 42);
 999         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_54MBS, 42);
1000         rt73usb_register_write(rt2x00dev, TXRX_CSR8, reg);
1001
1002         rt73usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
1003
1004         rt73usb_register_read(rt2x00dev, MAC_CSR6, &reg);
1005         rt2x00_set_field32(&reg, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
1006         rt73usb_register_write(rt2x00dev, MAC_CSR6, reg);
1007
1008         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00000718);
1009
1010         if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
1011                 return -EBUSY;
1012
1013         rt73usb_register_write(rt2x00dev, MAC_CSR13, 0x00007f00);
1014
1015         /*
1016          * Invalidate all Shared Keys (SEC_CSR0),
1017          * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
1018          */
1019         rt73usb_register_write(rt2x00dev, SEC_CSR0, 0x00000000);
1020         rt73usb_register_write(rt2x00dev, SEC_CSR1, 0x00000000);
1021         rt73usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
1022
1023         reg = 0x000023b0;
1024         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1025             rt2x00_rf(&rt2x00dev->chip, RF2527))
1026                 rt2x00_set_field32(&reg, PHY_CSR1_RF_RPI, 1);
1027         rt73usb_register_write(rt2x00dev, PHY_CSR1, reg);
1028
1029         rt73usb_register_write(rt2x00dev, PHY_CSR5, 0x00040a06);
1030         rt73usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
1031         rt73usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
1032
1033         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR0, &reg);
1034         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC0_TX_OP, 0);
1035         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC1_TX_OP, 0);
1036         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR0, reg);
1037
1038         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR1, &reg);
1039         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC2_TX_OP, 192);
1040         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC3_TX_OP, 48);
1041         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR1, reg);
1042
1043         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
1044         rt2x00_set_field32(&reg, MAC_CSR9_CW_SELECT, 0);
1045         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
1046
1047         /*
1048          * Clear all beacons
1049          * For the Beacon base registers we only need to clear
1050          * the first byte since that byte contains the VALID and OWNER
1051          * bits which (when set to 0) will invalidate the entire beacon.
1052          */
1053         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
1054         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
1055         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
1056         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
1057
1058         /*
1059          * We must clear the error counters.
1060          * These registers are cleared on read,
1061          * so we may pass a useless variable to store the value.
1062          */
1063         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
1064         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
1065         rt73usb_register_read(rt2x00dev, STA_CSR2, &reg);
1066
1067         /*
1068          * Reset MAC and BBP registers.
1069          */
1070         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1071         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 1);
1072         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 1);
1073         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1074
1075         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1076         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 0);
1077         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 0);
1078         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1079
1080         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1081         rt2x00_set_field32(&reg, MAC_CSR1_HOST_READY, 1);
1082         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1083
1084         return 0;
1085 }
1086
1087 static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1088 {
1089         unsigned int i;
1090         u16 eeprom;
1091         u8 reg_id;
1092         u8 value;
1093
1094         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1095                 rt73usb_bbp_read(rt2x00dev, 0, &value);
1096                 if ((value != 0xff) && (value != 0x00))
1097                         goto continue_csr_init;
1098                 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
1099                 udelay(REGISTER_BUSY_DELAY);
1100         }
1101
1102         ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1103         return -EACCES;
1104
1105 continue_csr_init:
1106         rt73usb_bbp_write(rt2x00dev, 3, 0x80);
1107         rt73usb_bbp_write(rt2x00dev, 15, 0x30);
1108         rt73usb_bbp_write(rt2x00dev, 21, 0xc8);
1109         rt73usb_bbp_write(rt2x00dev, 22, 0x38);
1110         rt73usb_bbp_write(rt2x00dev, 23, 0x06);
1111         rt73usb_bbp_write(rt2x00dev, 24, 0xfe);
1112         rt73usb_bbp_write(rt2x00dev, 25, 0x0a);
1113         rt73usb_bbp_write(rt2x00dev, 26, 0x0d);
1114         rt73usb_bbp_write(rt2x00dev, 32, 0x0b);
1115         rt73usb_bbp_write(rt2x00dev, 34, 0x12);
1116         rt73usb_bbp_write(rt2x00dev, 37, 0x07);
1117         rt73usb_bbp_write(rt2x00dev, 39, 0xf8);
1118         rt73usb_bbp_write(rt2x00dev, 41, 0x60);
1119         rt73usb_bbp_write(rt2x00dev, 53, 0x10);
1120         rt73usb_bbp_write(rt2x00dev, 54, 0x18);
1121         rt73usb_bbp_write(rt2x00dev, 60, 0x10);
1122         rt73usb_bbp_write(rt2x00dev, 61, 0x04);
1123         rt73usb_bbp_write(rt2x00dev, 62, 0x04);
1124         rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
1125         rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
1126         rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
1127         rt73usb_bbp_write(rt2x00dev, 90, 0x0f);
1128         rt73usb_bbp_write(rt2x00dev, 99, 0x00);
1129         rt73usb_bbp_write(rt2x00dev, 102, 0x16);
1130         rt73usb_bbp_write(rt2x00dev, 107, 0x04);
1131
1132         for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1133                 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1134
1135                 if (eeprom != 0xffff && eeprom != 0x0000) {
1136                         reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1137                         value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1138                         rt73usb_bbp_write(rt2x00dev, reg_id, value);
1139                 }
1140         }
1141
1142         return 0;
1143 }
1144
1145 /*
1146  * Device state switch handlers.
1147  */
1148 static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1149                               enum dev_state state)
1150 {
1151         u32 reg;
1152
1153         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1154         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX,
1155                            state == STATE_RADIO_RX_OFF);
1156         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1157 }
1158
1159 static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1160 {
1161         /*
1162          * Initialize all registers.
1163          */
1164         if (rt73usb_init_registers(rt2x00dev) ||
1165             rt73usb_init_bbp(rt2x00dev)) {
1166                 ERROR(rt2x00dev, "Register initialization failed.\n");
1167                 return -EIO;
1168         }
1169
1170         return 0;
1171 }
1172
1173 static void rt73usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1174 {
1175         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00001818);
1176
1177         /*
1178          * Disable synchronisation.
1179          */
1180         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
1181
1182         rt2x00usb_disable_radio(rt2x00dev);
1183 }
1184
1185 static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
1186 {
1187         u32 reg;
1188         unsigned int i;
1189         char put_to_sleep;
1190         char current_state;
1191
1192         put_to_sleep = (state != STATE_AWAKE);
1193
1194         rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1195         rt2x00_set_field32(&reg, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
1196         rt2x00_set_field32(&reg, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
1197         rt73usb_register_write(rt2x00dev, MAC_CSR12, reg);
1198
1199         /*
1200          * Device is not guaranteed to be in the requested state yet.
1201          * We must wait until the register indicates that the
1202          * device has entered the correct state.
1203          */
1204         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1205                 rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1206                 current_state =
1207                     rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE);
1208                 if (current_state == !put_to_sleep)
1209                         return 0;
1210                 msleep(10);
1211         }
1212
1213         NOTICE(rt2x00dev, "Device failed to enter state %d, "
1214                "current device state %d.\n", !put_to_sleep, current_state);
1215
1216         return -EBUSY;
1217 }
1218
1219 static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1220                                     enum dev_state state)
1221 {
1222         int retval = 0;
1223
1224         switch (state) {
1225         case STATE_RADIO_ON:
1226                 retval = rt73usb_enable_radio(rt2x00dev);
1227                 break;
1228         case STATE_RADIO_OFF:
1229                 rt73usb_disable_radio(rt2x00dev);
1230                 break;
1231         case STATE_RADIO_RX_ON:
1232         case STATE_RADIO_RX_ON_LINK:
1233                 rt73usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
1234                 break;
1235         case STATE_RADIO_RX_OFF:
1236         case STATE_RADIO_RX_OFF_LINK:
1237                 rt73usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF);
1238                 break;
1239         case STATE_DEEP_SLEEP:
1240         case STATE_SLEEP:
1241         case STATE_STANDBY:
1242         case STATE_AWAKE:
1243                 retval = rt73usb_set_state(rt2x00dev, state);
1244                 break;
1245         default:
1246                 retval = -ENOTSUPP;
1247                 break;
1248         }
1249
1250         return retval;
1251 }
1252
1253 /*
1254  * TX descriptor initialization
1255  */
1256 static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1257                                     struct sk_buff *skb,
1258                                     struct txentry_desc *txdesc)
1259 {
1260         struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
1261         __le32 *txd = skbdesc->desc;
1262         u32 word;
1263
1264         /*
1265          * Start writing the descriptor words.
1266          */
1267         rt2x00_desc_read(txd, 1, &word);
1268         rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, txdesc->queue);
1269         rt2x00_set_field32(&word, TXD_W1_AIFSN, txdesc->aifs);
1270         rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1271         rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
1272         rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1273         rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1);
1274         rt2x00_desc_write(txd, 1, word);
1275
1276         rt2x00_desc_read(txd, 2, &word);
1277         rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1278         rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1279         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1280         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
1281         rt2x00_desc_write(txd, 2, word);
1282
1283         rt2x00_desc_read(txd, 5, &word);
1284         rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1285                            TXPOWER_TO_DEV(rt2x00dev->tx_power));
1286         rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1287         rt2x00_desc_write(txd, 5, word);
1288
1289         rt2x00_desc_read(txd, 0, &word);
1290         rt2x00_set_field32(&word, TXD_W0_BURST,
1291                            test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1292         rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1293         rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1294                            test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1295         rt2x00_set_field32(&word, TXD_W0_ACK,
1296                            test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1297         rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1298                            test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1299         rt2x00_set_field32(&word, TXD_W0_OFDM,
1300                            test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags));
1301         rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1302         rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
1303                            test_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags));
1304         rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0);
1305         rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len);
1306         rt2x00_set_field32(&word, TXD_W0_BURST2,
1307                            test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1308         rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
1309         rt2x00_desc_write(txd, 0, word);
1310 }
1311
1312 static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
1313                                    struct sk_buff *skb)
1314 {
1315         int length;
1316
1317         /*
1318          * The length _must_ be a multiple of 4,
1319          * but it must _not_ be a multiple of the USB packet size.
1320          */
1321         length = roundup(skb->len, 4);
1322         length += (4 * !(length % rt2x00dev->usb_maxpacket));
1323
1324         return length;
1325 }
1326
1327 /*
1328  * TX data initialization
1329  */
1330 static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1331                                   const enum data_queue_qid queue)
1332 {
1333         u32 reg;
1334
1335         if (queue != QID_BEACON)
1336                 return;
1337
1338         /*
1339          * For Wi-Fi faily generated beacons between participating stations.
1340          * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1341          */
1342         rt73usb_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1343
1344         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1345         if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1346                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
1347                 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
1348                 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1349                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1350         }
1351 }
1352
1353 /*
1354  * RX control handlers
1355  */
1356 static int rt73usb_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
1357 {
1358         u16 eeprom;
1359         u8 offset;
1360         u8 lna;
1361
1362         lna = rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_LNA);
1363         switch (lna) {
1364         case 3:
1365                 offset = 90;
1366                 break;
1367         case 2:
1368                 offset = 74;
1369                 break;
1370         case 1:
1371                 offset = 64;
1372                 break;
1373         default:
1374                 return 0;
1375         }
1376
1377         if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
1378                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
1379                         if (lna == 3 || lna == 2)
1380                                 offset += 10;
1381                 } else {
1382                         if (lna == 3)
1383                                 offset += 6;
1384                         else if (lna == 2)
1385                                 offset += 8;
1386                 }
1387
1388                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
1389                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
1390         } else {
1391                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
1392                         offset += 14;
1393
1394                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
1395                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
1396         }
1397
1398         return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset;
1399 }
1400
1401 static void rt73usb_fill_rxdone(struct queue_entry *entry,
1402                                 struct rxdone_entry_desc *rxdesc)
1403 {
1404         struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1405         __le32 *rxd = (__le32 *)entry->skb->data;
1406         unsigned int offset = entry->queue->desc_size + 2;
1407         u32 word0;
1408         u32 word1;
1409
1410         /*
1411          * Copy descriptor to the available headroom inside the skbuffer.
1412          */
1413         skb_push(entry->skb, offset);
1414         memcpy(entry->skb->data, rxd, entry->queue->desc_size);
1415         rxd = (__le32 *)entry->skb->data;
1416
1417         /*
1418          * The descriptor is now aligned to 4 bytes and thus it is
1419          * now safe to read it on all architectures.
1420          */
1421         rt2x00_desc_read(rxd, 0, &word0);
1422         rt2x00_desc_read(rxd, 1, &word1);
1423
1424         rxdesc->flags = 0;
1425         if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1426                 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1427
1428         /*
1429          * Obtain the status about this packet.
1430          * When frame was received with an OFDM bitrate,
1431          * the signal is the PLCP value. If it was received with
1432          * a CCK bitrate the signal is the rate in 100kbit/s.
1433          */
1434         rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1435         rxdesc->rssi = rt73usb_agc_to_rssi(entry->queue->rt2x00dev, word1);
1436         rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1437
1438         rxdesc->dev_flags = 0;
1439         if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1440                 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1441         if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1442                 rxdesc->dev_flags |= RXDONE_MY_BSS;
1443
1444         /*
1445          * Adjust the skb memory window to the frame boundaries.
1446          */
1447         skb_pull(entry->skb, offset + entry->queue->desc_size);
1448         skb_trim(entry->skb, rxdesc->size);
1449
1450         /*
1451          * Set descriptor and data pointer.
1452          */
1453         skbdesc->data = entry->skb->data;
1454         skbdesc->data_len = rxdesc->size;
1455         skbdesc->desc = rxd;
1456         skbdesc->desc_len = entry->queue->desc_size;
1457 }
1458
1459 /*
1460  * Device probe functions.
1461  */
1462 static int rt73usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1463 {
1464         u16 word;
1465         u8 *mac;
1466         s8 value;
1467
1468         rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1469
1470         /*
1471          * Start validation of the data that has been read.
1472          */
1473         mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1474         if (!is_valid_ether_addr(mac)) {
1475                 DECLARE_MAC_BUF(macbuf);
1476
1477                 random_ether_addr(mac);
1478                 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
1479         }
1480
1481         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1482         if (word == 0xffff) {
1483                 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1484                 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1485                                    ANTENNA_B);
1486                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1487                                    ANTENNA_B);
1488                 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1489                 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1490                 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1491                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1492                 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1493                 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1494         }
1495
1496         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1497         if (word == 0xffff) {
1498                 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1499                 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1500                 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1501         }
1502
1503         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &word);
1504         if (word == 0xffff) {
1505                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1506                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1507                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1508                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1509                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1510                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1511                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1512                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1513                 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1514                                    LED_MODE_DEFAULT);
1515                 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1516                 EEPROM(rt2x00dev, "Led: 0x%04x\n", word);
1517         }
1518
1519         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1520         if (word == 0xffff) {
1521                 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1522                 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1523                 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1524                 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1525         }
1526
1527         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &word);
1528         if (word == 0xffff) {
1529                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1530                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1531                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1532                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1533         } else {
1534                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_1);
1535                 if (value < -10 || value > 10)
1536                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1537                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_2);
1538                 if (value < -10 || value > 10)
1539                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1540                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1541         }
1542
1543         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &word);
1544         if (word == 0xffff) {
1545                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1546                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1547                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1548                 EEPROM(rt2x00dev, "RSSI OFFSET A: 0x%04x\n", word);
1549         } else {
1550                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_1);
1551                 if (value < -10 || value > 10)
1552                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1553                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_2);
1554                 if (value < -10 || value > 10)
1555                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1556                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1557         }
1558
1559         return 0;
1560 }
1561
1562 static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1563 {
1564         u32 reg;
1565         u16 value;
1566         u16 eeprom;
1567
1568         /*
1569          * Read EEPROM word for configuration.
1570          */
1571         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1572
1573         /*
1574          * Identify RF chipset.
1575          */
1576         value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1577         rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1578         rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
1579
1580         if (!rt2x00_check_rev(&rt2x00dev->chip, 0x25730)) {
1581                 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1582                 return -ENODEV;
1583         }
1584
1585         if (!rt2x00_rf(&rt2x00dev->chip, RF5226) &&
1586             !rt2x00_rf(&rt2x00dev->chip, RF2528) &&
1587             !rt2x00_rf(&rt2x00dev->chip, RF5225) &&
1588             !rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1589                 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1590                 return -ENODEV;
1591         }
1592
1593         /*
1594          * Identify default antenna configuration.
1595          */
1596         rt2x00dev->default_ant.tx =
1597             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1598         rt2x00dev->default_ant.rx =
1599             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1600
1601         /*
1602          * Read the Frame type.
1603          */
1604         if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
1605                 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
1606
1607         /*
1608          * Read frequency offset.
1609          */
1610         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1611         rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1612
1613         /*
1614          * Read external LNA informations.
1615          */
1616         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1617
1618         if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA)) {
1619                 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
1620                 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
1621         }
1622
1623         /*
1624          * Store led settings, for correct led behaviour.
1625          */
1626 #ifdef CONFIG_RT73USB_LEDS
1627         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom);
1628
1629         rt2x00dev->led_radio.rt2x00dev = rt2x00dev;
1630         rt2x00dev->led_radio.type = LED_TYPE_RADIO;
1631         rt2x00dev->led_radio.led_dev.brightness_set =
1632             rt73usb_brightness_set;
1633         rt2x00dev->led_radio.led_dev.blink_set =
1634             rt73usb_blink_set;
1635         rt2x00dev->led_radio.flags = LED_INITIALIZED;
1636
1637         rt2x00dev->led_assoc.rt2x00dev = rt2x00dev;
1638         rt2x00dev->led_assoc.type = LED_TYPE_ASSOC;
1639         rt2x00dev->led_assoc.led_dev.brightness_set =
1640             rt73usb_brightness_set;
1641         rt2x00dev->led_assoc.led_dev.blink_set =
1642             rt73usb_blink_set;
1643         rt2x00dev->led_assoc.flags = LED_INITIALIZED;
1644
1645         if (value == LED_MODE_SIGNAL_STRENGTH) {
1646                 rt2x00dev->led_qual.rt2x00dev = rt2x00dev;
1647                 rt2x00dev->led_qual.type = LED_TYPE_QUALITY;
1648                 rt2x00dev->led_qual.led_dev.brightness_set =
1649                     rt73usb_brightness_set;
1650                 rt2x00dev->led_qual.led_dev.blink_set =
1651                     rt73usb_blink_set;
1652                 rt2x00dev->led_qual.flags = LED_INITIALIZED;
1653         }
1654
1655         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_LED_MODE, value);
1656         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_0,
1657                            rt2x00_get_field16(eeprom,
1658                                               EEPROM_LED_POLARITY_GPIO_0));
1659         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_1,
1660                            rt2x00_get_field16(eeprom,
1661                                               EEPROM_LED_POLARITY_GPIO_1));
1662         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_2,
1663                            rt2x00_get_field16(eeprom,
1664                                               EEPROM_LED_POLARITY_GPIO_2));
1665         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_3,
1666                            rt2x00_get_field16(eeprom,
1667                                               EEPROM_LED_POLARITY_GPIO_3));
1668         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_4,
1669                            rt2x00_get_field16(eeprom,
1670                                               EEPROM_LED_POLARITY_GPIO_4));
1671         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_ACT,
1672                            rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_ACT));
1673         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_READY_BG,
1674                            rt2x00_get_field16(eeprom,
1675                                               EEPROM_LED_POLARITY_RDY_G));
1676         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_READY_A,
1677                            rt2x00_get_field16(eeprom,
1678                                               EEPROM_LED_POLARITY_RDY_A));
1679 #endif /* CONFIG_RT73USB_LEDS */
1680
1681         return 0;
1682 }
1683
1684 /*
1685  * RF value list for RF2528
1686  * Supports: 2.4 GHz
1687  */
1688 static const struct rf_channel rf_vals_bg_2528[] = {
1689         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1690         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1691         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1692         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1693         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1694         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1695         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1696         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1697         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1698         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1699         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1700         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1701         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1702         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1703 };
1704
1705 /*
1706  * RF value list for RF5226
1707  * Supports: 2.4 GHz & 5.2 GHz
1708  */
1709 static const struct rf_channel rf_vals_5226[] = {
1710         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1711         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1712         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1713         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1714         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1715         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1716         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1717         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1718         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1719         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1720         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1721         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1722         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1723         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1724
1725         /* 802.11 UNI / HyperLan 2 */
1726         { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1727         { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1728         { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1729         { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1730         { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1731         { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1732         { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1733         { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1734
1735         /* 802.11 HyperLan 2 */
1736         { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1737         { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1738         { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1739         { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1740         { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1741         { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1742         { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1743         { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1744         { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1745         { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1746
1747         /* 802.11 UNII */
1748         { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1749         { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1750         { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1751         { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1752         { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1753         { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1754
1755         /* MMAC(Japan)J52 ch 34,38,42,46 */
1756         { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1757         { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1758         { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1759         { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1760 };
1761
1762 /*
1763  * RF value list for RF5225 & RF2527
1764  * Supports: 2.4 GHz & 5.2 GHz
1765  */
1766 static const struct rf_channel rf_vals_5225_2527[] = {
1767         { 1,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1768         { 2,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1769         { 3,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1770         { 4,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1771         { 5,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
1772         { 6,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
1773         { 7,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
1774         { 8,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
1775         { 9,  0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
1776         { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
1777         { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
1778         { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
1779         { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
1780         { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
1781
1782         /* 802.11 UNI / HyperLan 2 */
1783         { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
1784         { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
1785         { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
1786         { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
1787         { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
1788         { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
1789         { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
1790         { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
1791
1792         /* 802.11 HyperLan 2 */
1793         { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
1794         { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
1795         { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
1796         { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
1797         { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
1798         { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
1799         { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
1800         { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
1801         { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
1802         { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
1803
1804         /* 802.11 UNII */
1805         { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
1806         { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
1807         { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
1808         { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
1809         { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
1810         { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
1811
1812         /* MMAC(Japan)J52 ch 34,38,42,46 */
1813         { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
1814         { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
1815         { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
1816         { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
1817 };
1818
1819
1820 static void rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1821 {
1822         struct hw_mode_spec *spec = &rt2x00dev->spec;
1823         u8 *txpower;
1824         unsigned int i;
1825
1826         /*
1827          * Initialize all hw fields.
1828          */
1829         rt2x00dev->hw->flags =
1830             IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1831             IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1832             IEEE80211_HW_SIGNAL_DBM;
1833         rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1834         rt2x00dev->hw->queues = 4;
1835
1836         SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1837         SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1838                                 rt2x00_eeprom_addr(rt2x00dev,
1839                                                    EEPROM_MAC_ADDR_0));
1840
1841         /*
1842          * Convert tx_power array in eeprom.
1843          */
1844         txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_G_START);
1845         for (i = 0; i < 14; i++)
1846                 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1847
1848         /*
1849          * Initialize hw_mode information.
1850          */
1851         spec->supported_bands = SUPPORT_BAND_2GHZ;
1852         spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1853         spec->tx_power_a = NULL;
1854         spec->tx_power_bg = txpower;
1855         spec->tx_power_default = DEFAULT_TXPOWER;
1856
1857         if (rt2x00_rf(&rt2x00dev->chip, RF2528)) {
1858                 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528);
1859                 spec->channels = rf_vals_bg_2528;
1860         } else if (rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1861                 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1862                 spec->num_channels = ARRAY_SIZE(rf_vals_5226);
1863                 spec->channels = rf_vals_5226;
1864         } else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1865                 spec->num_channels = 14;
1866                 spec->channels = rf_vals_5225_2527;
1867         } else if (rt2x00_rf(&rt2x00dev->chip, RF5225)) {
1868                 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1869                 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527);
1870                 spec->channels = rf_vals_5225_2527;
1871         }
1872
1873         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1874             rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1875                 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START);
1876                 for (i = 0; i < 14; i++)
1877                         txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1878
1879                 spec->tx_power_a = txpower;
1880         }
1881 }
1882
1883 static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1884 {
1885         int retval;
1886
1887         /*
1888          * Allocate eeprom data.
1889          */
1890         retval = rt73usb_validate_eeprom(rt2x00dev);
1891         if (retval)
1892                 return retval;
1893
1894         retval = rt73usb_init_eeprom(rt2x00dev);
1895         if (retval)
1896                 return retval;
1897
1898         /*
1899          * Initialize hw specifications.
1900          */
1901         rt73usb_probe_hw_mode(rt2x00dev);
1902
1903         /*
1904          * This device requires firmware.
1905          */
1906         __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
1907         __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
1908
1909         /*
1910          * Set the rssi offset.
1911          */
1912         rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1913
1914         return 0;
1915 }
1916
1917 /*
1918  * IEEE80211 stack callback functions.
1919  */
1920 static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
1921                                    u32 short_retry, u32 long_retry)
1922 {
1923         struct rt2x00_dev *rt2x00dev = hw->priv;
1924         u32 reg;
1925
1926         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
1927         rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
1928         rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
1929         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
1930
1931         return 0;
1932 }
1933
1934 #if 0
1935 /*
1936  * Mac80211 demands get_tsf must be atomic.
1937  * This is not possible for rt73usb since all register access
1938  * functions require sleeping. Untill mac80211 no longer needs
1939  * get_tsf to be atomic, this function should be disabled.
1940  */
1941 static u64 rt73usb_get_tsf(struct ieee80211_hw *hw)
1942 {
1943         struct rt2x00_dev *rt2x00dev = hw->priv;
1944         u64 tsf;
1945         u32 reg;
1946
1947         rt73usb_register_read(rt2x00dev, TXRX_CSR13, &reg);
1948         tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
1949         rt73usb_register_read(rt2x00dev, TXRX_CSR12, &reg);
1950         tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
1951
1952         return tsf;
1953 }
1954 #else
1955 #define rt73usb_get_tsf NULL
1956 #endif
1957
1958 static int rt73usb_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
1959                                  struct ieee80211_tx_control *control)
1960 {
1961         struct rt2x00_dev *rt2x00dev = hw->priv;
1962         struct rt2x00_intf *intf = vif_to_intf(control->vif);
1963         struct skb_frame_desc *skbdesc;
1964         unsigned int beacon_base;
1965         u32 reg;
1966
1967         if (unlikely(!intf->beacon))
1968                 return -ENOBUFS;
1969
1970         /*
1971          * Add the descriptor in front of the skb.
1972          */
1973         skb_push(skb, intf->beacon->queue->desc_size);
1974         memset(skb->data, 0, intf->beacon->queue->desc_size);
1975
1976         /*
1977          * Fill in skb descriptor
1978          */
1979         skbdesc = get_skb_frame_desc(skb);
1980         memset(skbdesc, 0, sizeof(*skbdesc));
1981         skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED;
1982         skbdesc->data = skb->data + intf->beacon->queue->desc_size;
1983         skbdesc->data_len = skb->len - intf->beacon->queue->desc_size;
1984         skbdesc->desc = skb->data;
1985         skbdesc->desc_len = intf->beacon->queue->desc_size;
1986         skbdesc->entry = intf->beacon;
1987
1988         /*
1989          * Disable beaconing while we are reloading the beacon data,
1990          * otherwise we might be sending out invalid data.
1991          */
1992         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1993         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 0);
1994         rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 0);
1995         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
1996         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1997
1998         /*
1999          * Write entire beacon with descriptor to register,
2000          * and kick the beacon generator.
2001          */
2002         rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
2003         beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
2004         rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
2005                                  USB_VENDOR_REQUEST_OUT, beacon_base, 0,
2006                                  skb->data, skb->len,
2007                                  REGISTER_TIMEOUT32(skb->len));
2008         rt73usb_kick_tx_queue(rt2x00dev, QID_BEACON);
2009
2010         return 0;
2011 }
2012
2013 static const struct ieee80211_ops rt73usb_mac80211_ops = {
2014         .tx                     = rt2x00mac_tx,
2015         .start                  = rt2x00mac_start,
2016         .stop                   = rt2x00mac_stop,
2017         .add_interface          = rt2x00mac_add_interface,
2018         .remove_interface       = rt2x00mac_remove_interface,
2019         .config                 = rt2x00mac_config,
2020         .config_interface       = rt2x00mac_config_interface,
2021         .configure_filter       = rt2x00mac_configure_filter,
2022         .get_stats              = rt2x00mac_get_stats,
2023         .set_retry_limit        = rt73usb_set_retry_limit,
2024         .bss_info_changed       = rt2x00mac_bss_info_changed,
2025         .conf_tx                = rt2x00mac_conf_tx,
2026         .get_tx_stats           = rt2x00mac_get_tx_stats,
2027         .get_tsf                = rt73usb_get_tsf,
2028         .beacon_update          = rt73usb_beacon_update,
2029 };
2030
2031 static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
2032         .probe_hw               = rt73usb_probe_hw,
2033         .get_firmware_name      = rt73usb_get_firmware_name,
2034         .get_firmware_crc       = rt73usb_get_firmware_crc,
2035         .load_firmware          = rt73usb_load_firmware,
2036         .initialize             = rt2x00usb_initialize,
2037         .uninitialize           = rt2x00usb_uninitialize,
2038         .init_rxentry           = rt2x00usb_init_rxentry,
2039         .init_txentry           = rt2x00usb_init_txentry,
2040         .set_device_state       = rt73usb_set_device_state,
2041         .link_stats             = rt73usb_link_stats,
2042         .reset_tuner            = rt73usb_reset_tuner,
2043         .link_tuner             = rt73usb_link_tuner,
2044         .write_tx_desc          = rt73usb_write_tx_desc,
2045         .write_tx_data          = rt2x00usb_write_tx_data,
2046         .get_tx_data_len        = rt73usb_get_tx_data_len,
2047         .kick_tx_queue          = rt73usb_kick_tx_queue,
2048         .fill_rxdone            = rt73usb_fill_rxdone,
2049         .config_filter          = rt73usb_config_filter,
2050         .config_intf            = rt73usb_config_intf,
2051         .config_erp             = rt73usb_config_erp,
2052         .config                 = rt73usb_config,
2053 };
2054
2055 static const struct data_queue_desc rt73usb_queue_rx = {
2056         .entry_num              = RX_ENTRIES,
2057         .data_size              = DATA_FRAME_SIZE,
2058         .desc_size              = RXD_DESC_SIZE,
2059         .priv_size              = sizeof(struct queue_entry_priv_usb_rx),
2060 };
2061
2062 static const struct data_queue_desc rt73usb_queue_tx = {
2063         .entry_num              = TX_ENTRIES,
2064         .data_size              = DATA_FRAME_SIZE,
2065         .desc_size              = TXD_DESC_SIZE,
2066         .priv_size              = sizeof(struct queue_entry_priv_usb_tx),
2067 };
2068
2069 static const struct data_queue_desc rt73usb_queue_bcn = {
2070         .entry_num              = 4 * BEACON_ENTRIES,
2071         .data_size              = MGMT_FRAME_SIZE,
2072         .desc_size              = TXINFO_SIZE,
2073         .priv_size              = sizeof(struct queue_entry_priv_usb_tx),
2074 };
2075
2076 static const struct rt2x00_ops rt73usb_ops = {
2077         .name           = KBUILD_MODNAME,
2078         .max_sta_intf   = 1,
2079         .max_ap_intf    = 4,
2080         .eeprom_size    = EEPROM_SIZE,
2081         .rf_size        = RF_SIZE,
2082         .rx             = &rt73usb_queue_rx,
2083         .tx             = &rt73usb_queue_tx,
2084         .bcn            = &rt73usb_queue_bcn,
2085         .lib            = &rt73usb_rt2x00_ops,
2086         .hw             = &rt73usb_mac80211_ops,
2087 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
2088         .debugfs        = &rt73usb_rt2x00debug,
2089 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2090 };
2091
2092 /*
2093  * rt73usb module information.
2094  */
2095 static struct usb_device_id rt73usb_device_table[] = {
2096         /* AboCom */
2097         { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
2098         /* Askey */
2099         { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
2100         /* ASUS */
2101         { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops) },
2102         { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops) },
2103         /* Belkin */
2104         { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops) },
2105         { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops) },
2106         { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops) },
2107         { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops) },
2108         /* Billionton */
2109         { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
2110         /* Buffalo */
2111         { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
2112         /* CNet */
2113         { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2114         { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
2115         /* Conceptronic */
2116         { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops) },
2117         /* Corega */
2118         { USB_DEVICE(0x07aa, 0x002e), USB_DEVICE_DATA(&rt73usb_ops) },
2119         /* D-Link */
2120         { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops) },
2121         { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
2122         { USB_DEVICE(0x07d1, 0x3c07), USB_DEVICE_DATA(&rt73usb_ops) },
2123         /* Gemtek */
2124         { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
2125         /* Gigabyte */
2126         { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops) },
2127         { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops) },
2128         /* Huawei-3Com */
2129         { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops) },
2130         /* Hercules */
2131         { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops) },
2132         { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops) },
2133         /* Linksys */
2134         { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops) },
2135         { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
2136         /* MSI */
2137         { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
2138         { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) },
2139         { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
2140         { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
2141         /* Ralink */
2142         { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
2143         { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
2144         /* Qcom */
2145         { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
2146         { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
2147         { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops) },
2148         /* Senao */
2149         { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops) },
2150         /* Sitecom */
2151         { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
2152         { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
2153         /* Surecom */
2154         { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
2155         /* Planex */
2156         { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
2157         { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
2158         { 0, }
2159 };
2160
2161 MODULE_AUTHOR(DRV_PROJECT);
2162 MODULE_VERSION(DRV_VERSION);
2163 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2164 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2165 MODULE_DEVICE_TABLE(usb, rt73usb_device_table);
2166 MODULE_FIRMWARE(FIRMWARE_RT2571);
2167 MODULE_LICENSE("GPL");
2168
2169 static struct usb_driver rt73usb_driver = {
2170         .name           = KBUILD_MODNAME,
2171         .id_table       = rt73usb_device_table,
2172         .probe          = rt2x00usb_probe,
2173         .disconnect     = rt2x00usb_disconnect,
2174         .suspend        = rt2x00usb_suspend,
2175         .resume         = rt2x00usb_resume,
2176 };
2177
2178 static int __init rt73usb_init(void)
2179 {
2180         return usb_register(&rt73usb_driver);
2181 }
2182
2183 static void __exit rt73usb_exit(void)
2184 {
2185         usb_deregister(&rt73usb_driver);
2186 }
2187
2188 module_init(rt73usb_init);
2189 module_exit(rt73usb_exit);