1 /******************************************************************************
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <net/mac80211.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
41 #include "iwl-eeprom.h"
45 #include "iwl-helpers.h"
46 #include "iwl-calib.h"
48 /* module parameters */
49 static struct iwl_mod_params iwl4965_mod_params = {
50 .num_of_queues = IWL49_NUM_QUEUES,
53 /* the rest are 0 by default */
56 #ifdef CONFIG_IWL4965_HT
58 static const u16 default_tid_to_tx_fifo[] = {
78 #endif /*CONFIG_IWL4965_HT */
80 /* check contents of special bootstrap uCode SRAM */
81 static int iwl4965_verify_bsm(struct iwl_priv *priv)
83 __le32 *image = priv->ucode_boot.v_addr;
84 u32 len = priv->ucode_boot.len;
88 IWL_DEBUG_INFO("Begin verify bsm\n");
90 /* verify BSM SRAM contents */
91 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
92 for (reg = BSM_SRAM_LOWER_BOUND;
93 reg < BSM_SRAM_LOWER_BOUND + len;
94 reg += sizeof(u32), image++) {
95 val = iwl_read_prph(priv, reg);
96 if (val != le32_to_cpu(*image)) {
97 IWL_ERROR("BSM uCode verification failed at "
98 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
100 reg - BSM_SRAM_LOWER_BOUND, len,
101 val, le32_to_cpu(*image));
106 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
112 * iwl4965_load_bsm - Load bootstrap instructions
116 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
117 * in special SRAM that does not power down during RFKILL. When powering back
118 * up after power-saving sleeps (or during initial uCode load), the BSM loads
119 * the bootstrap program into the on-board processor, and starts it.
121 * The bootstrap program loads (via DMA) instructions and data for a new
122 * program from host DRAM locations indicated by the host driver in the
123 * BSM_DRAM_* registers. Once the new program is loaded, it starts
126 * When initializing the NIC, the host driver points the BSM to the
127 * "initialize" uCode image. This uCode sets up some internal data, then
128 * notifies host via "initialize alive" that it is complete.
130 * The host then replaces the BSM_DRAM_* pointer values to point to the
131 * normal runtime uCode instructions and a backup uCode data cache buffer
132 * (filled initially with starting data values for the on-board processor),
133 * then triggers the "initialize" uCode to load and launch the runtime uCode,
134 * which begins normal operation.
136 * When doing a power-save shutdown, runtime uCode saves data SRAM into
137 * the backup data cache in DRAM before SRAM is powered down.
139 * When powering back up, the BSM loads the bootstrap program. This reloads
140 * the runtime uCode instructions and the backup data cache into SRAM,
141 * and re-launches the runtime uCode from where it left off.
143 static int iwl4965_load_bsm(struct iwl_priv *priv)
145 __le32 *image = priv->ucode_boot.v_addr;
146 u32 len = priv->ucode_boot.len;
156 IWL_DEBUG_INFO("Begin load bsm\n");
158 /* make sure bootstrap program is no larger than BSM's SRAM size */
159 if (len > IWL_MAX_BSM_SIZE)
162 /* Tell bootstrap uCode where to find the "Initialize" uCode
163 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
164 * NOTE: iwl4965_initialize_alive_start() will replace these values,
165 * after the "initialize" uCode has run, to point to
166 * runtime/protocol instructions and backup data cache. */
167 pinst = priv->ucode_init.p_addr >> 4;
168 pdata = priv->ucode_init_data.p_addr >> 4;
169 inst_len = priv->ucode_init.len;
170 data_len = priv->ucode_init_data.len;
172 ret = iwl_grab_nic_access(priv);
176 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
177 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
178 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
179 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
181 /* Fill BSM memory with bootstrap instructions */
182 for (reg_offset = BSM_SRAM_LOWER_BOUND;
183 reg_offset < BSM_SRAM_LOWER_BOUND + len;
184 reg_offset += sizeof(u32), image++)
185 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
187 ret = iwl4965_verify_bsm(priv);
189 iwl_release_nic_access(priv);
193 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
194 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
195 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
196 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
198 /* Load bootstrap code into instruction SRAM now,
199 * to prepare to load "initialize" uCode */
200 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
202 /* Wait for load of bootstrap uCode to finish */
203 for (i = 0; i < 100; i++) {
204 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
205 if (!(done & BSM_WR_CTRL_REG_BIT_START))
210 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
212 IWL_ERROR("BSM write did not complete!\n");
216 /* Enable future boot loads whenever power management unit triggers it
217 * (e.g. when powering back up after power-save shutdown) */
218 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
220 iwl_release_nic_access(priv);
225 static int is_fat_channel(__le32 rxon_flags)
227 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
228 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
231 int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags)
235 /* 4965 HT rate format */
236 if (rate_n_flags & RATE_MCS_HT_MSK) {
237 idx = (rate_n_flags & 0xff);
239 if (idx >= IWL_RATE_MIMO2_6M_PLCP)
240 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
242 idx += IWL_FIRST_OFDM_RATE;
243 /* skip 9M not supported in ht*/
244 if (idx >= IWL_RATE_9M_INDEX)
246 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
249 /* 4965 legacy rate format, search for match in table */
251 for (idx = 0; idx < ARRAY_SIZE(iwl4965_rates); idx++)
252 if (iwl4965_rates[idx].plcp == (rate_n_flags & 0xFF))
260 * translate ucode response to mac80211 tx status control values
262 void iwl4965_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
263 struct ieee80211_tx_control *control)
267 control->antenna_sel_tx =
268 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
269 if (rate_n_flags & RATE_MCS_HT_MSK)
270 control->flags |= IEEE80211_TXCTL_OFDM_HT;
271 if (rate_n_flags & RATE_MCS_GF_MSK)
272 control->flags |= IEEE80211_TXCTL_GREEN_FIELD;
273 if (rate_n_flags & RATE_MCS_FAT_MSK)
274 control->flags |= IEEE80211_TXCTL_40_MHZ_WIDTH;
275 if (rate_n_flags & RATE_MCS_DUP_MSK)
276 control->flags |= IEEE80211_TXCTL_DUP_DATA;
277 if (rate_n_flags & RATE_MCS_SGI_MSK)
278 control->flags |= IEEE80211_TXCTL_SHORT_GI;
279 /* since iwl4965_hwrate_to_plcp_idx is band indifferent, we always use
280 * IEEE80211_BAND_2GHZ band as it contains all the rates */
281 rate_index = iwl4965_hwrate_to_plcp_idx(rate_n_flags);
282 if (rate_index == -1)
283 control->tx_rate = NULL;
286 &priv->bands[IEEE80211_BAND_2GHZ].bitrates[rate_index];
289 int iwl4965_hw_rxq_stop(struct iwl_priv *priv)
294 spin_lock_irqsave(&priv->lock, flags);
295 rc = iwl_grab_nic_access(priv);
297 spin_unlock_irqrestore(&priv->lock, flags);
302 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
303 rc = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
306 IWL_ERROR("Can't stop Rx DMA.\n");
308 iwl_release_nic_access(priv);
309 spin_unlock_irqrestore(&priv->lock, flags);
318 static int iwl4965_eeprom_check_version(struct iwl_priv *priv)
323 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
325 calib_ver = iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
327 if (eeprom_ver < EEPROM_4965_EEPROM_VERSION ||
328 calib_ver < EEPROM_4965_TX_POWER_VERSION)
333 IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
334 eeprom_ver, EEPROM_4965_EEPROM_VERSION,
335 calib_ver, EEPROM_4965_TX_POWER_VERSION);
339 int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
344 spin_lock_irqsave(&priv->lock, flags);
345 ret = iwl_grab_nic_access(priv);
347 spin_unlock_irqrestore(&priv->lock, flags);
351 if (src == IWL_PWR_SRC_VAUX) {
353 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
356 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
357 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
358 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
359 ~APMG_PS_CTRL_MSK_PWR_SRC);
362 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
363 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
364 ~APMG_PS_CTRL_MSK_PWR_SRC);
367 iwl_release_nic_access(priv);
368 spin_unlock_irqrestore(&priv->lock, flags);
373 static int iwl4965_disable_tx_fifo(struct iwl_priv *priv)
378 spin_lock_irqsave(&priv->lock, flags);
380 ret = iwl_grab_nic_access(priv);
382 IWL_ERROR("Tx fifo reset failed");
383 spin_unlock_irqrestore(&priv->lock, flags);
387 iwl_write_prph(priv, IWL49_SCD_TXFACT, 0);
388 iwl_release_nic_access(priv);
389 spin_unlock_irqrestore(&priv->lock, flags);
394 static int iwl4965_apm_init(struct iwl_priv *priv)
399 spin_lock_irqsave(&priv->lock, flags);
400 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
401 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
403 /* set "initialization complete" bit to move adapter
404 * D0U* --> D0A* state */
405 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
407 /* wait for clock stabilization */
408 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
409 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
410 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
412 IWL_DEBUG_INFO("Failed to init the card\n");
416 ret = iwl_grab_nic_access(priv);
421 iwl_write_prph(priv, APMG_CLK_CTRL_REG,
422 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
426 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
427 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
429 iwl_release_nic_access(priv);
431 spin_unlock_irqrestore(&priv->lock, flags);
436 static void iwl4965_nic_config(struct iwl_priv *priv)
443 spin_lock_irqsave(&priv->lock, flags);
445 if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
446 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
447 /* Enable No Snoop field */
448 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
452 pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
454 /* disable L1 entry -- workaround for pre-B1 */
455 pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);
457 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
459 /* write radio config values to register */
460 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
461 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
462 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
463 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
464 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
466 /* set CSR_HW_CONFIG_REG for uCode use */
467 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
468 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
469 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
471 priv->calib_info = (struct iwl_eeprom_calib_info *)
472 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
474 spin_unlock_irqrestore(&priv->lock, flags);
477 int iwl4965_hw_nic_stop_master(struct iwl_priv *priv)
483 spin_lock_irqsave(&priv->lock, flags);
485 /* set stop master bit */
486 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
488 reg_val = iwl_read32(priv, CSR_GP_CNTRL);
490 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
491 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
492 IWL_DEBUG_INFO("Card in power save, master is already "
495 rc = iwl_poll_bit(priv, CSR_RESET,
496 CSR_RESET_REG_FLAG_MASTER_DISABLED,
497 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
499 spin_unlock_irqrestore(&priv->lock, flags);
504 spin_unlock_irqrestore(&priv->lock, flags);
505 IWL_DEBUG_INFO("stop master\n");
511 * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
513 void iwl4965_hw_txq_ctx_stop(struct iwl_priv *priv)
519 /* Stop each Tx DMA channel, and wait for it to be idle */
520 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
521 spin_lock_irqsave(&priv->lock, flags);
522 if (iwl_grab_nic_access(priv)) {
523 spin_unlock_irqrestore(&priv->lock, flags);
527 iwl_write_direct32(priv,
528 FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 0x0);
529 iwl_poll_direct_bit(priv, FH_TSSR_TX_STATUS_REG,
530 FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
532 iwl_release_nic_access(priv);
533 spin_unlock_irqrestore(&priv->lock, flags);
536 /* Deallocate memory for all Tx queues */
537 iwl_hw_txq_ctx_free(priv);
540 int iwl4965_hw_nic_reset(struct iwl_priv *priv)
545 iwl4965_hw_nic_stop_master(priv);
547 spin_lock_irqsave(&priv->lock, flags);
549 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
553 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
554 rc = iwl_poll_bit(priv, CSR_RESET,
555 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
556 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
560 rc = iwl_grab_nic_access(priv);
562 iwl_write_prph(priv, APMG_CLK_EN_REG,
563 APMG_CLK_VAL_DMA_CLK_RQT |
564 APMG_CLK_VAL_BSM_CLK_RQT);
568 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
569 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
571 iwl_release_nic_access(priv);
574 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
575 wake_up_interruptible(&priv->wait_command_queue);
577 spin_unlock_irqrestore(&priv->lock, flags);
583 #define REG_RECALIB_PERIOD (60)
586 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
588 * This callback is provided in order to send a statistics request.
590 * This timer function is continually reset to execute within
591 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
592 * was received. We need to ensure we receive the statistics in order
593 * to update the temperature used for calibrating the TXPOWER.
595 static void iwl4965_bg_statistics_periodic(unsigned long data)
597 struct iwl_priv *priv = (struct iwl_priv *)data;
599 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
602 iwl_send_statistics_request(priv, CMD_ASYNC);
605 void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
607 struct iwl4965_ct_kill_config cmd;
611 spin_lock_irqsave(&priv->lock, flags);
612 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
613 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
614 spin_unlock_irqrestore(&priv->lock, flags);
616 cmd.critical_temperature_R =
617 cpu_to_le32(priv->hw_params.ct_kill_threshold);
619 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
622 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
624 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded, "
625 "critical temperature is %d\n",
626 cmd.critical_temperature_R);
629 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
631 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
632 * Called after every association, but this runs only once!
633 * ... once chain noise is calibrated the first time, it's good forever. */
634 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
636 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
638 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
639 struct iwl4965_calibration_cmd cmd;
641 memset(&cmd, 0, sizeof(cmd));
642 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
646 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
648 IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
649 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
650 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
654 static void iwl4965_gain_computation(struct iwl_priv *priv,
656 u16 min_average_noise_antenna_i,
657 u32 min_average_noise)
660 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
662 data->delta_gain_code[min_average_noise_antenna_i] = 0;
664 for (i = 0; i < NUM_RX_CHAINS; i++) {
667 if (!(data->disconn_array[i]) &&
668 (data->delta_gain_code[i] ==
669 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
670 delta_g = average_noise[i] - min_average_noise;
671 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
672 data->delta_gain_code[i] =
673 min(data->delta_gain_code[i],
674 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
676 data->delta_gain_code[i] =
677 (data->delta_gain_code[i] | (1 << 2));
679 data->delta_gain_code[i] = 0;
682 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
683 data->delta_gain_code[0],
684 data->delta_gain_code[1],
685 data->delta_gain_code[2]);
687 /* Differential gain gets sent to uCode only once */
688 if (!data->radio_write) {
689 struct iwl4965_calibration_cmd cmd;
690 data->radio_write = 1;
692 memset(&cmd, 0, sizeof(cmd));
693 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
694 cmd.diff_gain_a = data->delta_gain_code[0];
695 cmd.diff_gain_b = data->delta_gain_code[1];
696 cmd.diff_gain_c = data->delta_gain_code[2];
697 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
700 IWL_DEBUG_CALIB("fail sending cmd "
701 "REPLY_PHY_CALIBRATION_CMD \n");
703 /* TODO we might want recalculate
704 * rx_chain in rxon cmd */
706 /* Mark so we run this algo only once! */
707 data->state = IWL_CHAIN_NOISE_CALIBRATED;
709 data->chain_noise_a = 0;
710 data->chain_noise_b = 0;
711 data->chain_noise_c = 0;
712 data->chain_signal_a = 0;
713 data->chain_signal_b = 0;
714 data->chain_signal_c = 0;
715 data->beacon_count = 0;
718 static void iwl4965_bg_sensitivity_work(struct work_struct *work)
720 struct iwl_priv *priv = container_of(work, struct iwl_priv,
723 mutex_lock(&priv->mutex);
725 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
726 test_bit(STATUS_SCANNING, &priv->status)) {
727 mutex_unlock(&priv->mutex);
731 if (priv->start_calib) {
732 iwl_chain_noise_calibration(priv, &priv->statistics);
734 iwl_sensitivity_calibration(priv, &priv->statistics);
737 mutex_unlock(&priv->mutex);
740 #endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/
742 static void iwl4965_bg_txpower_work(struct work_struct *work)
744 struct iwl_priv *priv = container_of(work, struct iwl_priv,
747 /* If a scan happened to start before we got here
748 * then just return; the statistics notification will
749 * kick off another scheduled work to compensate for
750 * any temperature delta we missed here. */
751 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
752 test_bit(STATUS_SCANNING, &priv->status))
755 mutex_lock(&priv->mutex);
757 /* Regardless of if we are assocaited, we must reconfigure the
758 * TX power since frames can be sent on non-radar channels while
760 iwl4965_hw_reg_send_txpower(priv);
762 /* Update last_temperature to keep is_calib_needed from running
763 * when it isn't needed... */
764 priv->last_temperature = priv->temperature;
766 mutex_unlock(&priv->mutex);
770 * Acquire priv->lock before calling this function !
772 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
774 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
775 (index & 0xff) | (txq_id << 8));
776 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
780 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
781 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
782 * @scd_retry: (1) Indicates queue will be used in aggregation mode
784 * NOTE: Acquire priv->lock before calling this function !
786 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
787 struct iwl4965_tx_queue *txq,
788 int tx_fifo_id, int scd_retry)
790 int txq_id = txq->q.id;
792 /* Find out whether to activate Tx queue */
793 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
795 /* Set up and activate */
796 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
797 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
798 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
799 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
800 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
801 IWL49_SCD_QUEUE_STTS_REG_MSK);
803 txq->sched_retry = scd_retry;
805 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
806 active ? "Activate" : "Deactivate",
807 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
810 static const u16 default_queue_to_tx_fifo[] = {
820 static inline void iwl4965_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
822 set_bit(txq_id, &priv->txq_ctx_active_msk);
825 static inline void iwl4965_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
827 clear_bit(txq_id, &priv->txq_ctx_active_msk);
830 int iwl4965_alive_notify(struct iwl_priv *priv)
837 spin_lock_irqsave(&priv->lock, flags);
839 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
840 memset(&(priv->sensitivity_data), 0,
841 sizeof(struct iwl_sensitivity_data));
842 memset(&(priv->chain_noise_data), 0,
843 sizeof(struct iwl_chain_noise_data));
844 for (i = 0; i < NUM_RX_CHAINS; i++)
845 priv->chain_noise_data.delta_gain_code[i] =
846 CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
847 #endif /* CONFIG_IWL4965_RUN_TIME_CALIB*/
848 ret = iwl_grab_nic_access(priv);
850 spin_unlock_irqrestore(&priv->lock, flags);
854 /* Clear 4965's internal Tx Scheduler data base */
855 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
856 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
857 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
858 iwl_write_targ_mem(priv, a, 0);
859 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
860 iwl_write_targ_mem(priv, a, 0);
861 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
862 iwl_write_targ_mem(priv, a, 0);
864 /* Tel 4965 where to find Tx byte count tables */
865 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
867 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
869 /* Disable chain mode for all queues */
870 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
872 /* Initialize each Tx queue (including the command queue) */
873 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
875 /* TFD circular buffer read/write indexes */
876 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
877 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
879 /* Max Tx Window size for Scheduler-ACK mode */
880 iwl_write_targ_mem(priv, priv->scd_base_addr +
881 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
883 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
884 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
887 iwl_write_targ_mem(priv, priv->scd_base_addr +
888 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
891 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
892 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
895 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
896 (1 << priv->hw_params.max_txq_num) - 1);
898 /* Activate all Tx DMA/FIFO channels */
899 iwl_write_prph(priv, IWL49_SCD_TXFACT,
900 SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
902 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
904 /* Map each Tx/cmd queue to its corresponding fifo */
905 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
906 int ac = default_queue_to_tx_fifo[i];
907 iwl4965_txq_ctx_activate(priv, i);
908 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
911 iwl_release_nic_access(priv);
912 spin_unlock_irqrestore(&priv->lock, flags);
914 /* Ask for statistics now, the uCode will send statistics notification
915 * periodically after association */
916 iwl_send_statistics_request(priv, CMD_ASYNC);
920 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
921 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
925 .auto_corr_min_ofdm = 85,
926 .auto_corr_min_ofdm_mrc = 170,
927 .auto_corr_min_ofdm_x1 = 105,
928 .auto_corr_min_ofdm_mrc_x1 = 220,
930 .auto_corr_max_ofdm = 120,
931 .auto_corr_max_ofdm_mrc = 210,
932 .auto_corr_max_ofdm_x1 = 140,
933 .auto_corr_max_ofdm_mrc_x1 = 270,
935 .auto_corr_min_cck = 125,
936 .auto_corr_max_cck = 200,
937 .auto_corr_min_cck_mrc = 200,
938 .auto_corr_max_cck_mrc = 400,
946 * iwl4965_hw_set_hw_params
948 * Called when initializing driver
950 int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
953 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
954 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
955 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
956 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
960 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
961 priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
962 priv->hw_params.tx_cmd_len = sizeof(struct iwl4965_tx_cmd);
963 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
964 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
965 if (priv->cfg->mod_params->amsdu_size_8K)
966 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
968 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
969 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
970 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
971 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
973 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
974 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
975 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
976 priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
978 priv->hw_params.tx_chains_num = 2;
979 priv->hw_params.rx_chains_num = 2;
980 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
981 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
982 priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
984 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
985 priv->hw_params.sens = &iwl4965_sensitivity;
991 /* set card power command */
992 static int iwl4965_set_power(struct iwl_priv *priv,
997 ret = iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD,
998 sizeof(struct iwl4965_powertable_cmd),
1002 int iwl4965_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1004 IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
1008 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
1021 *res = ((num * 2 + denom) / (denom * 2)) * sign;
1027 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
1029 * Determines power supply voltage compensation for txpower calculations.
1030 * Returns number of 1/2-dB steps to subtract from gain table index,
1031 * to compensate for difference between power supply voltage during
1032 * factory measurements, vs. current power supply voltage.
1034 * Voltage indication is higher for lower voltage.
1035 * Lower voltage requires more gain (lower gain table index).
1037 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
1038 s32 current_voltage)
1042 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
1043 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
1046 iwl4965_math_div_round(current_voltage - eeprom_voltage,
1047 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
1049 if (current_voltage > eeprom_voltage)
1051 if ((comp < -2) || (comp > 2))
1057 static const struct iwl_channel_info *
1058 iwl4965_get_channel_txpower_info(struct iwl_priv *priv,
1059 enum ieee80211_band band, u16 channel)
1061 const struct iwl_channel_info *ch_info;
1063 ch_info = iwl_get_channel_info(priv, band, channel);
1065 if (!is_channel_valid(ch_info))
1071 static s32 iwl4965_get_tx_atten_grp(u16 channel)
1073 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
1074 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
1075 return CALIB_CH_GROUP_5;
1077 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
1078 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
1079 return CALIB_CH_GROUP_1;
1081 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
1082 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
1083 return CALIB_CH_GROUP_2;
1085 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
1086 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
1087 return CALIB_CH_GROUP_3;
1089 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
1090 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
1091 return CALIB_CH_GROUP_4;
1093 IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
1097 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
1101 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
1102 if (priv->calib_info->band_info[b].ch_from == 0)
1105 if ((channel >= priv->calib_info->band_info[b].ch_from)
1106 && (channel <= priv->calib_info->band_info[b].ch_to))
1113 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
1120 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
1126 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
1128 * Interpolates factory measurements from the two sample channels within a
1129 * sub-band, to apply to channel of interest. Interpolation is proportional to
1130 * differences in channel frequencies, which is proportional to differences
1131 * in channel number.
1133 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
1134 struct iwl_eeprom_calib_ch_info *chan_info)
1139 const struct iwl_eeprom_calib_measure *m1;
1140 const struct iwl_eeprom_calib_measure *m2;
1141 struct iwl_eeprom_calib_measure *omeas;
1145 s = iwl4965_get_sub_band(priv, channel);
1146 if (s >= EEPROM_TX_POWER_BANDS) {
1147 IWL_ERROR("Tx Power can not find channel %d ", channel);
1151 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
1152 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
1153 chan_info->ch_num = (u8) channel;
1155 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
1156 channel, s, ch_i1, ch_i2);
1158 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
1159 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
1160 m1 = &(priv->calib_info->band_info[s].ch1.
1161 measurements[c][m]);
1162 m2 = &(priv->calib_info->band_info[s].ch2.
1163 measurements[c][m]);
1164 omeas = &(chan_info->measurements[c][m]);
1167 (u8) iwl4965_interpolate_value(channel, ch_i1,
1172 (u8) iwl4965_interpolate_value(channel, ch_i1,
1173 m1->gain_idx, ch_i2,
1175 omeas->temperature =
1176 (u8) iwl4965_interpolate_value(channel, ch_i1,
1181 (s8) iwl4965_interpolate_value(channel, ch_i1,
1186 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1187 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1189 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1190 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1192 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1193 m1->pa_det, m2->pa_det, omeas->pa_det);
1195 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
1196 m1->temperature, m2->temperature,
1197 omeas->temperature);
1204 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1205 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1206 static s32 back_off_table[] = {
1207 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1208 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1209 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1210 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1214 /* Thermal compensation values for txpower for various frequency ranges ...
1215 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1216 static struct iwl4965_txpower_comp_entry {
1217 s32 degrees_per_05db_a;
1218 s32 degrees_per_05db_a_denom;
1219 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1220 {9, 2}, /* group 0 5.2, ch 34-43 */
1221 {4, 1}, /* group 1 5.2, ch 44-70 */
1222 {4, 1}, /* group 2 5.2, ch 71-124 */
1223 {4, 1}, /* group 3 5.2, ch 125-200 */
1224 {3, 1} /* group 4 2.4, ch all */
1227 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1230 if ((rate_power_index & 7) <= 4)
1231 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1233 return MIN_TX_GAIN_INDEX;
1241 static const struct gain_entry gain_table[2][108] = {
1242 /* 5.2GHz power gain index table */
1244 {123, 0x3F}, /* highest txpower */
1353 /* 2.4GHz power gain index table */
1355 {110, 0x3f}, /* highest txpower */
1466 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1467 u8 is_fat, u8 ctrl_chan_high,
1468 struct iwl4965_tx_power_db *tx_power_tbl)
1470 u8 saturation_power;
1472 s32 user_target_power;
1476 s32 current_regulatory;
1477 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1480 const struct iwl_channel_info *ch_info = NULL;
1481 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1482 const struct iwl_eeprom_calib_measure *measurement;
1485 s32 voltage_compensation;
1486 s32 degrees_per_05db_num;
1487 s32 degrees_per_05db_denom;
1489 s32 temperature_comp[2];
1490 s32 factory_gain_index[2];
1491 s32 factory_actual_pwr[2];
1494 /* Sanity check requested level (dBm) */
1495 if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
1496 IWL_WARNING("Requested user TXPOWER %d below limit.\n",
1497 priv->user_txpower_limit);
1500 if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
1501 IWL_WARNING("Requested user TXPOWER %d above limit.\n",
1502 priv->user_txpower_limit);
1506 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1507 * are used for indexing into txpower table) */
1508 user_target_power = 2 * priv->user_txpower_limit;
1510 /* Get current (RXON) channel, band, width */
1512 iwl4965_get_channel_txpower_info(priv, priv->band, channel);
1514 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1520 /* get txatten group, used to select 1) thermal txpower adjustment
1521 * and 2) mimo txpower balance between Tx chains. */
1522 txatten_grp = iwl4965_get_tx_atten_grp(channel);
1523 if (txatten_grp < 0)
1526 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1527 channel, txatten_grp);
1536 /* hardware txpower limits ...
1537 * saturation (clipping distortion) txpowers are in half-dBm */
1539 saturation_power = priv->calib_info->saturation_power24;
1541 saturation_power = priv->calib_info->saturation_power52;
1543 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1544 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1546 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1548 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1551 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1552 * max_power_avg values are in dBm, convert * 2 */
1554 reg_limit = ch_info->fat_max_power_avg * 2;
1556 reg_limit = ch_info->max_power_avg * 2;
1558 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1559 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1561 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1563 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1566 /* Interpolate txpower calibration values for this channel,
1567 * based on factory calibration tests on spaced channels. */
1568 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1570 /* calculate tx gain adjustment based on power supply voltage */
1571 voltage = priv->calib_info->voltage;
1572 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1573 voltage_compensation =
1574 iwl4965_get_voltage_compensation(voltage, init_voltage);
1576 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1578 voltage, voltage_compensation);
1580 /* get current temperature (Celsius) */
1581 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1582 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1583 current_temp = KELVIN_TO_CELSIUS(current_temp);
1585 /* select thermal txpower adjustment params, based on channel group
1586 * (same frequency group used for mimo txatten adjustment) */
1587 degrees_per_05db_num =
1588 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1589 degrees_per_05db_denom =
1590 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1592 /* get per-chain txpower values from factory measurements */
1593 for (c = 0; c < 2; c++) {
1594 measurement = &ch_eeprom_info.measurements[c][1];
1596 /* txgain adjustment (in half-dB steps) based on difference
1597 * between factory and current temperature */
1598 factory_temp = measurement->temperature;
1599 iwl4965_math_div_round((current_temp - factory_temp) *
1600 degrees_per_05db_denom,
1601 degrees_per_05db_num,
1602 &temperature_comp[c]);
1604 factory_gain_index[c] = measurement->gain_idx;
1605 factory_actual_pwr[c] = measurement->actual_pow;
1607 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1608 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1609 "curr tmp %d, comp %d steps\n",
1610 factory_temp, current_temp,
1611 temperature_comp[c]);
1613 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1614 factory_gain_index[c],
1615 factory_actual_pwr[c]);
1618 /* for each of 33 bit-rates (including 1 for CCK) */
1619 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1621 union iwl4965_tx_power_dual_stream tx_power;
1623 /* for mimo, reduce each chain's txpower by half
1624 * (3dB, 6 steps), so total output power is regulatory
1627 current_regulatory = reg_limit -
1628 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1631 current_regulatory = reg_limit;
1635 /* find txpower limit, either hardware or regulatory */
1636 power_limit = saturation_power - back_off_table[i];
1637 if (power_limit > current_regulatory)
1638 power_limit = current_regulatory;
1640 /* reduce user's txpower request if necessary
1641 * for this rate on this channel */
1642 target_power = user_target_power;
1643 if (target_power > power_limit)
1644 target_power = power_limit;
1646 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1647 i, saturation_power - back_off_table[i],
1648 current_regulatory, user_target_power,
1651 /* for each of 2 Tx chains (radio transmitters) */
1652 for (c = 0; c < 2; c++) {
1657 (s32)le32_to_cpu(priv->card_alive_init.
1658 tx_atten[txatten_grp][c]);
1662 /* calculate index; higher index means lower txpower */
1663 power_index = (u8) (factory_gain_index[c] -
1665 factory_actual_pwr[c]) -
1666 temperature_comp[c] -
1667 voltage_compensation +
1670 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1673 if (power_index < get_min_power_index(i, band))
1674 power_index = get_min_power_index(i, band);
1676 /* adjust 5 GHz index to support negative indexes */
1680 /* CCK, rate 32, reduce txpower for CCK */
1681 if (i == POWER_TABLE_CCK_ENTRY)
1683 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1685 /* stay within the table! */
1686 if (power_index > 107) {
1687 IWL_WARNING("txpower index %d > 107\n",
1691 if (power_index < 0) {
1692 IWL_WARNING("txpower index %d < 0\n",
1697 /* fill txpower command for this rate/chain */
1698 tx_power.s.radio_tx_gain[c] =
1699 gain_table[band][power_index].radio;
1700 tx_power.s.dsp_predis_atten[c] =
1701 gain_table[band][power_index].dsp;
1703 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1704 "gain 0x%02x dsp %d\n",
1705 c, atten_value, power_index,
1706 tx_power.s.radio_tx_gain[c],
1707 tx_power.s.dsp_predis_atten[c]);
1708 }/* for each chain */
1710 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1712 }/* for each rate */
1718 * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
1720 * Uses the active RXON for channel, band, and characteristics (fat, high)
1721 * The power limit is taken from priv->user_txpower_limit.
1723 int iwl4965_hw_reg_send_txpower(struct iwl_priv *priv)
1725 struct iwl4965_txpowertable_cmd cmd = { 0 };
1729 u8 ctrl_chan_high = 0;
1731 if (test_bit(STATUS_SCANNING, &priv->status)) {
1732 /* If this gets hit a lot, switch it to a BUG() and catch
1733 * the stack trace to find out who is calling this during
1735 IWL_WARNING("TX Power requested while scanning!\n");
1739 band = priv->band == IEEE80211_BAND_2GHZ;
1741 is_fat = is_fat_channel(priv->active_rxon.flags);
1744 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1748 cmd.channel = priv->active_rxon.channel;
1750 ret = iwl4965_fill_txpower_tbl(priv, band,
1751 le16_to_cpu(priv->active_rxon.channel),
1752 is_fat, ctrl_chan_high, &cmd.tx_power);
1756 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1762 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1765 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1766 const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
1767 const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
1769 if ((rxon1->flags == rxon2->flags) &&
1770 (rxon1->filter_flags == rxon2->filter_flags) &&
1771 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1772 (rxon1->ofdm_ht_single_stream_basic_rates ==
1773 rxon2->ofdm_ht_single_stream_basic_rates) &&
1774 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1775 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1776 (rxon1->rx_chain == rxon2->rx_chain) &&
1777 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1778 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1782 rxon_assoc.flags = priv->staging_rxon.flags;
1783 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1784 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1785 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1786 rxon_assoc.reserved = 0;
1787 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1788 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1789 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1790 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1791 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1793 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1794 sizeof(rxon_assoc), &rxon_assoc, NULL);
1802 int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1807 u8 ctrl_chan_high = 0;
1808 struct iwl4965_channel_switch_cmd cmd = { 0 };
1809 const struct iwl_channel_info *ch_info;
1811 band = priv->band == IEEE80211_BAND_2GHZ;
1813 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1815 is_fat = is_fat_channel(priv->staging_rxon.flags);
1818 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1822 cmd.expect_beacon = 0;
1823 cmd.channel = cpu_to_le16(channel);
1824 cmd.rxon_flags = priv->active_rxon.flags;
1825 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1826 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1828 cmd.expect_beacon = is_channel_radar(ch_info);
1830 cmd.expect_beacon = 1;
1832 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1833 ctrl_chan_high, &cmd.tx_power);
1835 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
1839 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1843 #define RTS_HCCA_RETRY_LIMIT 3
1844 #define RTS_DFAULT_RETRY_LIMIT 60
1846 void iwl4965_hw_build_tx_cmd_rate(struct iwl_priv *priv,
1847 struct iwl_cmd *cmd,
1848 struct ieee80211_tx_control *ctrl,
1849 struct ieee80211_hdr *hdr, int sta_id,
1852 struct iwl4965_tx_cmd *tx = &cmd->cmd.tx;
1853 u8 rts_retry_limit = 0;
1854 u8 data_retry_limit = 0;
1855 u16 fc = le16_to_cpu(hdr->frame_control);
1858 int rate_idx = min(ctrl->tx_rate->hw_value & 0xffff, IWL_RATE_COUNT - 1);
1860 rate_plcp = iwl4965_rates[rate_idx].plcp;
1862 rts_retry_limit = (is_hcca) ?
1863 RTS_HCCA_RETRY_LIMIT : RTS_DFAULT_RETRY_LIMIT;
1865 if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE))
1866 rate_flags |= RATE_MCS_CCK_MSK;
1869 if (ieee80211_is_probe_response(fc)) {
1870 data_retry_limit = 3;
1871 if (data_retry_limit < rts_retry_limit)
1872 rts_retry_limit = data_retry_limit;
1874 data_retry_limit = IWL_DEFAULT_TX_RETRY;
1876 if (priv->data_retry_limit != -1)
1877 data_retry_limit = priv->data_retry_limit;
1880 if (ieee80211_is_data(fc)) {
1881 tx->initial_rate_index = 0;
1882 tx->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
1884 switch (fc & IEEE80211_FCTL_STYPE) {
1885 case IEEE80211_STYPE_AUTH:
1886 case IEEE80211_STYPE_DEAUTH:
1887 case IEEE80211_STYPE_ASSOC_REQ:
1888 case IEEE80211_STYPE_REASSOC_REQ:
1889 if (tx->tx_flags & TX_CMD_FLG_RTS_MSK) {
1890 tx->tx_flags &= ~TX_CMD_FLG_RTS_MSK;
1891 tx->tx_flags |= TX_CMD_FLG_CTS_MSK;
1898 /* Alternate between antenna A and B for successive frames */
1899 if (priv->use_ant_b_for_management_frame) {
1900 priv->use_ant_b_for_management_frame = 0;
1901 rate_flags |= RATE_MCS_ANT_B_MSK;
1903 priv->use_ant_b_for_management_frame = 1;
1904 rate_flags |= RATE_MCS_ANT_A_MSK;
1908 tx->rts_retry_limit = rts_retry_limit;
1909 tx->data_retry_limit = data_retry_limit;
1910 tx->rate_n_flags = iwl4965_hw_set_rate_n_flags(rate_plcp, rate_flags);
1913 int iwl4965_hw_get_rx_read(struct iwl_priv *priv)
1915 struct iwl4965_shared *s = priv->shared_virt;
1916 return le32_to_cpu(s->rb_closed) & 0xFFF;
1919 int iwl4965_hw_get_temperature(struct iwl_priv *priv)
1921 return priv->temperature;
1924 unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
1925 struct iwl4965_frame *frame, u8 rate)
1927 struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
1928 unsigned int frame_size;
1930 tx_beacon_cmd = &frame->u.beacon;
1931 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
1933 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
1934 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1936 frame_size = iwl4965_fill_beacon_frame(priv,
1937 tx_beacon_cmd->frame,
1938 iwl4965_broadcast_addr,
1939 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
1941 BUG_ON(frame_size > MAX_MPDU_SIZE);
1942 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
1944 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
1945 tx_beacon_cmd->tx.rate_n_flags =
1946 iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
1948 tx_beacon_cmd->tx.rate_n_flags =
1949 iwl4965_hw_set_rate_n_flags(rate, 0);
1951 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
1952 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
1953 return (sizeof(*tx_beacon_cmd) + frame_size);
1956 int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *ptr,
1957 dma_addr_t addr, u16 len)
1960 struct iwl_tfd_frame *tfd = ptr;
1961 u32 num_tbs = IWL_GET_BITS(*tfd, num_tbs);
1963 /* Each TFD can point to a maximum 20 Tx buffers */
1964 if ((num_tbs >= MAX_NUM_OF_TBS) || (num_tbs < 0)) {
1965 IWL_ERROR("Error can not send more than %d chunks\n",
1970 index = num_tbs / 2;
1971 is_odd = num_tbs & 0x1;
1974 tfd->pa[index].tb1_addr = cpu_to_le32(addr);
1975 IWL_SET_BITS(tfd->pa[index], tb1_addr_hi,
1976 iwl_get_dma_hi_address(addr));
1977 IWL_SET_BITS(tfd->pa[index], tb1_len, len);
1979 IWL_SET_BITS(tfd->pa[index], tb2_addr_lo16,
1980 (u32) (addr & 0xffff));
1981 IWL_SET_BITS(tfd->pa[index], tb2_addr_hi20, addr >> 16);
1982 IWL_SET_BITS(tfd->pa[index], tb2_len, len);
1985 IWL_SET_BITS(*tfd, num_tbs, num_tbs + 1);
1990 static int iwl4965_alloc_shared_mem(struct iwl_priv *priv)
1992 priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
1993 sizeof(struct iwl4965_shared),
1994 &priv->shared_phys);
1995 if (!priv->shared_virt)
1998 memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
2003 static void iwl4965_free_shared_mem(struct iwl_priv *priv)
2005 if (priv->shared_virt)
2006 pci_free_consistent(priv->pci_dev,
2007 sizeof(struct iwl4965_shared),
2013 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
2015 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
2016 struct iwl4965_tx_queue *txq,
2020 int txq_id = txq->q.id;
2021 struct iwl4965_shared *shared_data = priv->shared_virt;
2023 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
2025 /* Set up byte count within first 256 entries */
2026 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2027 tfd_offset[txq->q.write_ptr], byte_cnt, len);
2029 /* If within first 64 entries, duplicate at end */
2030 if (txq->q.write_ptr < IWL49_MAX_WIN_SIZE)
2031 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2032 tfd_offset[IWL49_QUEUE_SIZE + txq->q.write_ptr],
2037 * sign_extend - Sign extend a value using specified bit as sign-bit
2039 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
2040 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
2042 * @param oper value to sign extend
2043 * @param index 0 based bit index (0<=index<32) to sign bit
2045 static s32 sign_extend(u32 oper, int index)
2047 u8 shift = 31 - index;
2049 return (s32)(oper << shift) >> shift;
2053 * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
2054 * @statistics: Provides the temperature reading from the uCode
2056 * A return of <0 indicates bogus data in the statistics
2058 int iwl4965_get_temperature(const struct iwl_priv *priv)
2065 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
2066 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
2067 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
2068 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
2069 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
2070 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
2071 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
2073 IWL_DEBUG_TEMP("Running temperature calibration\n");
2074 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
2075 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
2076 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
2077 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
2081 * Temperature is only 23 bits, so sign extend out to 32.
2083 * NOTE If we haven't received a statistics notification yet
2084 * with an updated temperature, use R4 provided to us in the
2085 * "initialize" ALIVE response.
2087 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
2088 vt = sign_extend(R4, 23);
2091 le32_to_cpu(priv->statistics.general.temperature), 23);
2093 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
2097 IWL_ERROR("Calibration conflict R1 == R3\n");
2101 /* Calculate temperature in degrees Kelvin, adjust by 97%.
2102 * Add offset to center the adjustment around 0 degrees Centigrade. */
2103 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
2104 temperature /= (R3 - R1);
2105 temperature = (temperature * 97) / 100 +
2106 TEMPERATURE_CALIB_KELVIN_OFFSET;
2108 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
2109 KELVIN_TO_CELSIUS(temperature));
2114 /* Adjust Txpower only if temperature variance is greater than threshold. */
2115 #define IWL_TEMPERATURE_THRESHOLD 3
2118 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
2120 * If the temperature changed has changed sufficiently, then a recalibration
2123 * Assumes caller will replace priv->last_temperature once calibration
2126 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
2130 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
2131 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
2135 temp_diff = priv->temperature - priv->last_temperature;
2137 /* get absolute value */
2138 if (temp_diff < 0) {
2139 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
2140 temp_diff = -temp_diff;
2141 } else if (temp_diff == 0)
2142 IWL_DEBUG_POWER("Same temp, \n");
2144 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
2146 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
2147 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
2151 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
2156 /* Calculate noise level, based on measurements during network silence just
2157 * before arriving beacon. This measurement can be done only if we know
2158 * exactly when to expect beacons, therefore only when we're associated. */
2159 static void iwl4965_rx_calc_noise(struct iwl_priv *priv)
2161 struct statistics_rx_non_phy *rx_info
2162 = &(priv->statistics.rx.general);
2163 int num_active_rx = 0;
2164 int total_silence = 0;
2166 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
2168 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
2170 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
2172 if (bcn_silence_a) {
2173 total_silence += bcn_silence_a;
2176 if (bcn_silence_b) {
2177 total_silence += bcn_silence_b;
2180 if (bcn_silence_c) {
2181 total_silence += bcn_silence_c;
2185 /* Average among active antennas */
2187 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
2189 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2191 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
2192 bcn_silence_a, bcn_silence_b, bcn_silence_c,
2193 priv->last_rx_noise);
2196 void iwl4965_hw_rx_statistics(struct iwl_priv *priv,
2197 struct iwl_rx_mem_buffer *rxb)
2199 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2203 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
2204 (int)sizeof(priv->statistics), pkt->len);
2206 change = ((priv->statistics.general.temperature !=
2207 pkt->u.stats.general.temperature) ||
2208 ((priv->statistics.flag &
2209 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
2210 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
2212 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
2214 set_bit(STATUS_STATISTICS, &priv->status);
2216 /* Reschedule the statistics timer to occur in
2217 * REG_RECALIB_PERIOD seconds to ensure we get a
2218 * thermal update even if the uCode doesn't give
2220 mod_timer(&priv->statistics_periodic, jiffies +
2221 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
2223 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2224 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
2225 iwl4965_rx_calc_noise(priv);
2226 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
2227 queue_work(priv->workqueue, &priv->sensitivity_work);
2231 iwl_leds_background(priv);
2233 /* If the hardware hasn't reported a change in
2234 * temperature then don't bother computing a
2235 * calibrated temperature value */
2239 temp = iwl4965_get_temperature(priv);
2243 if (priv->temperature != temp) {
2244 if (priv->temperature)
2245 IWL_DEBUG_TEMP("Temperature changed "
2246 "from %dC to %dC\n",
2247 KELVIN_TO_CELSIUS(priv->temperature),
2248 KELVIN_TO_CELSIUS(temp));
2250 IWL_DEBUG_TEMP("Temperature "
2251 "initialized to %dC\n",
2252 KELVIN_TO_CELSIUS(temp));
2255 priv->temperature = temp;
2256 set_bit(STATUS_TEMPERATURE, &priv->status);
2258 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2259 iwl4965_is_temp_calib_needed(priv))
2260 queue_work(priv->workqueue, &priv->txpower_work);
2263 static void iwl4965_add_radiotap(struct iwl_priv *priv,
2264 struct sk_buff *skb,
2265 struct iwl4965_rx_phy_res *rx_start,
2266 struct ieee80211_rx_status *stats,
2269 s8 signal = stats->ssi;
2271 int rate = stats->rate_idx;
2272 u64 tsf = stats->mactime;
2274 __le16 phy_flags_hw = rx_start->phy_flags;
2275 struct iwl4965_rt_rx_hdr {
2276 struct ieee80211_radiotap_header rt_hdr;
2277 __le64 rt_tsf; /* TSF */
2278 u8 rt_flags; /* radiotap packet flags */
2279 u8 rt_rate; /* rate in 500kb/s */
2280 __le16 rt_channelMHz; /* channel in MHz */
2281 __le16 rt_chbitmask; /* channel bitfield */
2282 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
2284 u8 rt_antenna; /* antenna number */
2285 } __attribute__ ((packed)) *iwl4965_rt;
2287 /* TODO: We won't have enough headroom for HT frames. Fix it later. */
2288 if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
2289 if (net_ratelimit())
2290 printk(KERN_ERR "not enough headroom [%d] for "
2291 "radiotap head [%zd]\n",
2292 skb_headroom(skb), sizeof(*iwl4965_rt));
2296 /* put radiotap header in front of 802.11 header and data */
2297 iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
2299 /* initialise radiotap header */
2300 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
2301 iwl4965_rt->rt_hdr.it_pad = 0;
2303 /* total header + data */
2304 put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
2305 &iwl4965_rt->rt_hdr.it_len);
2307 /* Indicate all the fields we add to the radiotap header */
2308 put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
2309 (1 << IEEE80211_RADIOTAP_FLAGS) |
2310 (1 << IEEE80211_RADIOTAP_RATE) |
2311 (1 << IEEE80211_RADIOTAP_CHANNEL) |
2312 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
2313 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
2314 (1 << IEEE80211_RADIOTAP_ANTENNA)),
2315 &iwl4965_rt->rt_hdr.it_present);
2317 /* Zero the flags, we'll add to them as we go */
2318 iwl4965_rt->rt_flags = 0;
2320 put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
2322 iwl4965_rt->rt_dbmsignal = signal;
2323 iwl4965_rt->rt_dbmnoise = noise;
2325 /* Convert the channel frequency and set the flags */
2326 put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
2327 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
2328 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2329 IEEE80211_CHAN_5GHZ),
2330 &iwl4965_rt->rt_chbitmask);
2331 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
2332 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
2333 IEEE80211_CHAN_2GHZ),
2334 &iwl4965_rt->rt_chbitmask);
2336 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2337 IEEE80211_CHAN_2GHZ),
2338 &iwl4965_rt->rt_chbitmask);
2341 iwl4965_rt->rt_rate = 0;
2343 iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
2348 * It seems that the antenna field in the phy flags value
2349 * is actually a bitfield. This is undefined by radiotap,
2350 * it wants an actual antenna number but I always get "7"
2351 * for most legacy frames I receive indicating that the
2352 * same frame was received on all three RX chains.
2354 * I think this field should be removed in favour of a
2355 * new 802.11n radiotap field "RX chains" that is defined
2358 antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
2359 iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
2361 /* set the preamble flag if appropriate */
2362 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
2363 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2365 stats->flag |= RX_FLAG_RADIOTAP;
2368 static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
2370 /* 0 - mgmt, 1 - cnt, 2 - data */
2371 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
2372 priv->rx_stats[idx].cnt++;
2373 priv->rx_stats[idx].bytes += len;
2377 * returns non-zero if packet should be dropped
2379 static int iwl4965_set_decrypted_flag(struct iwl_priv *priv,
2380 struct ieee80211_hdr *hdr,
2382 struct ieee80211_rx_status *stats)
2384 u16 fc = le16_to_cpu(hdr->frame_control);
2386 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2389 if (!(fc & IEEE80211_FCTL_PROTECTED))
2392 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2393 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2394 case RX_RES_STATUS_SEC_TYPE_TKIP:
2395 /* The uCode has got a bad phase 1 Key, pushes the packet.
2396 * Decryption will be done in SW. */
2397 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2398 RX_RES_STATUS_BAD_KEY_TTAK)
2401 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2402 RX_RES_STATUS_BAD_ICV_MIC) {
2403 /* bad ICV, the packet is destroyed since the
2404 * decryption is inplace, drop it */
2405 IWL_DEBUG_RX("Packet destroyed\n");
2408 case RX_RES_STATUS_SEC_TYPE_WEP:
2409 case RX_RES_STATUS_SEC_TYPE_CCMP:
2410 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2411 RX_RES_STATUS_DECRYPT_OK) {
2412 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2413 stats->flag |= RX_FLAG_DECRYPTED;
2423 static u32 iwl4965_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
2425 u32 decrypt_out = 0;
2427 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
2428 RX_RES_STATUS_STATION_FOUND)
2429 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
2430 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
2432 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
2434 /* packet was not encrypted */
2435 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2436 RX_RES_STATUS_SEC_TYPE_NONE)
2439 /* packet was encrypted with unknown alg */
2440 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2441 RX_RES_STATUS_SEC_TYPE_ERR)
2444 /* decryption was not done in HW */
2445 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
2446 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
2449 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
2451 case RX_RES_STATUS_SEC_TYPE_CCMP:
2452 /* alg is CCM: check MIC only */
2453 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
2455 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2457 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2461 case RX_RES_STATUS_SEC_TYPE_TKIP:
2462 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
2464 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
2467 /* fall through if TTAK OK */
2469 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
2470 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2472 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2476 IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
2477 decrypt_in, decrypt_out);
2482 static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
2484 struct iwl_rx_mem_buffer *rxb,
2485 struct ieee80211_rx_status *stats)
2487 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2488 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2489 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
2490 struct ieee80211_hdr *hdr;
2493 unsigned int skblen;
2495 u32 ampdu_status_legacy;
2497 if (!include_phy && priv->last_phy_res[0])
2498 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2501 IWL_ERROR("MPDU frame without a PHY data\n");
2505 hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
2506 rx_start->cfg_phy_cnt);
2508 len = le16_to_cpu(rx_start->byte_count);
2510 rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
2511 sizeof(struct iwl4965_rx_phy_res) +
2512 rx_start->cfg_phy_cnt + len);
2515 struct iwl4965_rx_mpdu_res_start *amsdu =
2516 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2518 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
2519 sizeof(struct iwl4965_rx_mpdu_res_start));
2520 len = le16_to_cpu(amsdu->byte_count);
2521 rx_start->byte_count = amsdu->byte_count;
2522 rx_end = (__le32 *) (((u8 *) hdr) + len);
2524 if (len > priv->hw_params.max_pkt_size || len < 16) {
2525 IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
2529 ampdu_status = le32_to_cpu(*rx_end);
2530 skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
2533 /* New status scheme, need to translate */
2534 ampdu_status_legacy = ampdu_status;
2535 ampdu_status = iwl4965_translate_rx_status(priv, ampdu_status);
2538 /* start from MAC */
2539 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
2540 skb_put(rxb->skb, len); /* end where data ends */
2542 /* We only process data packets if the interface is open */
2543 if (unlikely(!priv->is_open)) {
2544 IWL_DEBUG_DROP_LIMIT
2545 ("Dropping packet while interface is not open.\n");
2550 hdr = (struct ieee80211_hdr *)rxb->skb->data;
2552 /* in case of HW accelerated crypto and bad decryption, drop */
2553 if (!priv->hw_params.sw_crypto &&
2554 iwl4965_set_decrypted_flag(priv, hdr, ampdu_status, stats))
2557 if (priv->add_radiotap)
2558 iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
2560 iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
2561 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
2562 priv->alloc_rxb_skb--;
2566 /* Calc max signal level (dBm) among 3 possible receivers */
2567 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2568 struct iwl4965_rx_phy_res *rx_resp)
2570 /* data from PHY/DSP regarding signal strength, etc.,
2571 * contents are always there, not configurable by host. */
2572 struct iwl4965_rx_non_cfg_phy *ncphy =
2573 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
2574 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
2577 u32 valid_antennae =
2578 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
2579 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
2583 /* Find max rssi among 3 possible receivers.
2584 * These values are measured by the digital signal processor (DSP).
2585 * They should stay fairly constant even as the signal strength varies,
2586 * if the radio's automatic gain control (AGC) is working right.
2587 * AGC value (see below) will provide the "interesting" info. */
2588 for (i = 0; i < 3; i++)
2589 if (valid_antennae & (1 << i))
2590 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2592 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2593 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2596 /* dBm = max_rssi dB - agc dB - constant.
2597 * Higher AGC (higher radio gain) means lower signal. */
2598 return (max_rssi - agc - IWL_RSSI_OFFSET);
2601 static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
2603 unsigned long flags;
2605 spin_lock_irqsave(&priv->sta_lock, flags);
2606 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
2607 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
2608 priv->stations[sta_id].sta.sta.modify_mask = 0;
2609 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2610 spin_unlock_irqrestore(&priv->sta_lock, flags);
2612 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
2615 static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
2617 /* FIXME: need locking over ps_status ??? */
2618 u8 sta_id = iwl_find_station(priv, addr);
2620 if (sta_id != IWL_INVALID_STATION) {
2621 u8 sta_awake = priv->stations[sta_id].
2622 ps_status == STA_PS_STATUS_WAKE;
2624 if (sta_awake && ps_bit)
2625 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
2626 else if (!sta_awake && !ps_bit) {
2627 iwl4965_sta_modify_ps_wake(priv, sta_id);
2628 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
2632 #ifdef CONFIG_IWLWIFI_DEBUG
2635 * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
2637 * You may hack this function to show different aspects of received frames,
2638 * including selective frame dumps.
2639 * group100 parameter selects whether to show 1 out of 100 good frames.
2641 * TODO: This was originally written for 3945, need to audit for
2642 * proper operation with 4965.
2644 static void iwl4965_dbg_report_frame(struct iwl_priv *priv,
2645 struct iwl_rx_packet *pkt,
2646 struct ieee80211_hdr *header, int group100)
2649 u32 print_summary = 0;
2650 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
2667 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
2668 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
2669 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
2670 u8 *data = IWL_RX_DATA(pkt);
2672 if (likely(!(priv->debug_level & IWL_DL_RX)))
2676 fc = le16_to_cpu(header->frame_control);
2677 seq_ctl = le16_to_cpu(header->seq_ctrl);
2680 channel = le16_to_cpu(rx_hdr->channel);
2681 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
2682 rate_sym = rx_hdr->rate;
2683 length = le16_to_cpu(rx_hdr->len);
2685 /* end-of-frame status and timestamp */
2686 status = le32_to_cpu(rx_end->status);
2687 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
2688 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
2689 tsf = le64_to_cpu(rx_end->timestamp);
2691 /* signal statistics */
2692 rssi = rx_stats->rssi;
2693 agc = rx_stats->agc;
2694 sig_avg = le16_to_cpu(rx_stats->sig_avg);
2695 noise_diff = le16_to_cpu(rx_stats->noise_diff);
2697 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
2699 /* if data frame is to us and all is good,
2700 * (optionally) print summary for only 1 out of every 100 */
2701 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
2702 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
2705 print_summary = 1; /* print each frame */
2706 else if (priv->framecnt_to_us < 100) {
2707 priv->framecnt_to_us++;
2710 priv->framecnt_to_us = 0;
2715 /* print summary for all other frames */
2719 if (print_summary) {
2725 title = "100Frames";
2726 else if (fc & IEEE80211_FCTL_RETRY)
2728 else if (ieee80211_is_assoc_response(fc))
2730 else if (ieee80211_is_reassoc_response(fc))
2732 else if (ieee80211_is_probe_response(fc)) {
2734 print_dump = 1; /* dump frame contents */
2735 } else if (ieee80211_is_beacon(fc)) {
2737 print_dump = 1; /* dump frame contents */
2738 } else if (ieee80211_is_atim(fc))
2740 else if (ieee80211_is_auth(fc))
2742 else if (ieee80211_is_deauth(fc))
2744 else if (ieee80211_is_disassoc(fc))
2749 rate_idx = iwl4965_hwrate_to_plcp_idx(rate_sym);
2750 if (unlikely(rate_idx == -1))
2753 bitrate = iwl4965_rates[rate_idx].ieee / 2;
2755 /* print frame summary.
2756 * MAC addresses show just the last byte (for brevity),
2757 * but you can hack it to show more, if you'd like to. */
2759 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
2760 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
2761 title, fc, header->addr1[5],
2762 length, rssi, channel, bitrate);
2764 /* src/dst addresses assume managed mode */
2765 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
2766 "src=0x%02x, rssi=%u, tim=%lu usec, "
2767 "phy=0x%02x, chnl=%d\n",
2768 title, fc, header->addr1[5],
2769 header->addr3[5], rssi,
2770 tsf_low - priv->scan_start_tsf,
2771 phy_flags, channel);
2775 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
2778 static inline void iwl4965_dbg_report_frame(struct iwl_priv *priv,
2779 struct iwl_rx_packet *pkt,
2780 struct ieee80211_hdr *header,
2788 /* Called for REPLY_RX (legacy ABG frames), or
2789 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
2790 static void iwl4965_rx_reply_rx(struct iwl_priv *priv,
2791 struct iwl_rx_mem_buffer *rxb)
2793 struct ieee80211_hdr *header;
2794 struct ieee80211_rx_status rx_status;
2795 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2796 /* Use phy data (Rx signal strength, etc.) contained within
2797 * this rx packet for legacy frames,
2798 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
2799 int include_phy = (pkt->hdr.cmd == REPLY_RX);
2800 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2801 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
2802 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2804 unsigned int len = 0;
2808 rx_status.mactime = le64_to_cpu(rx_start->timestamp);
2810 ieee80211_frequency_to_channel(le16_to_cpu(rx_start->channel));
2811 rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
2812 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
2813 rx_status.rate_idx =
2814 iwl4965_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
2815 if (rx_status.band == IEEE80211_BAND_5GHZ)
2816 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
2818 rx_status.antenna = 0;
2821 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
2822 IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
2823 rx_start->cfg_phy_cnt);
2828 if (priv->last_phy_res[0])
2829 rx_start = (struct iwl4965_rx_phy_res *)
2830 &priv->last_phy_res[1];
2836 IWL_ERROR("MPDU frame without a PHY data\n");
2841 header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
2842 + rx_start->cfg_phy_cnt);
2844 len = le16_to_cpu(rx_start->byte_count);
2845 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
2846 sizeof(struct iwl4965_rx_phy_res) + len);
2848 struct iwl4965_rx_mpdu_res_start *amsdu =
2849 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2851 header = (void *)(pkt->u.raw +
2852 sizeof(struct iwl4965_rx_mpdu_res_start));
2853 len = le16_to_cpu(amsdu->byte_count);
2854 rx_end = (__le32 *) (pkt->u.raw +
2855 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
2858 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
2859 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
2860 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
2861 le32_to_cpu(*rx_end));
2865 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
2867 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
2868 rx_status.ssi = iwl4965_calc_rssi(priv, rx_start);
2870 /* Meaningful noise values are available only from beacon statistics,
2871 * which are gathered only when associated, and indicate noise
2872 * only for the associated network channel ...
2873 * Ignore these noise values while scanning (other channels) */
2874 if (iwl_is_associated(priv) &&
2875 !test_bit(STATUS_SCANNING, &priv->status)) {
2876 rx_status.noise = priv->last_rx_noise;
2877 rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi,
2880 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2881 rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi, 0);
2884 /* Reset beacon noise level if not associated. */
2885 if (!iwl_is_associated(priv))
2886 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2888 /* Set "1" to report good data frames in groups of 100 */
2889 /* FIXME: need to optimze the call: */
2890 iwl4965_dbg_report_frame(priv, pkt, header, 1);
2892 IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
2893 rx_status.ssi, rx_status.noise, rx_status.signal,
2894 (unsigned long long)rx_status.mactime);
2896 network_packet = iwl4965_is_network_packet(priv, header);
2897 if (network_packet) {
2898 priv->last_rx_rssi = rx_status.ssi;
2899 priv->last_beacon_time = priv->ucode_beacon_time;
2900 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
2903 fc = le16_to_cpu(header->frame_control);
2904 switch (fc & IEEE80211_FCTL_FTYPE) {
2905 case IEEE80211_FTYPE_MGMT:
2906 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2907 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
2909 iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
2912 case IEEE80211_FTYPE_CTL:
2913 #ifdef CONFIG_IWL4965_HT
2914 switch (fc & IEEE80211_FCTL_STYPE) {
2915 case IEEE80211_STYPE_BACK_REQ:
2916 IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
2917 iwl4965_handle_data_packet(priv, 0, include_phy,
2926 case IEEE80211_FTYPE_DATA: {
2927 DECLARE_MAC_BUF(mac1);
2928 DECLARE_MAC_BUF(mac2);
2929 DECLARE_MAC_BUF(mac3);
2931 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2932 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
2935 if (unlikely(!network_packet))
2936 IWL_DEBUG_DROP("Dropping (non network): "
2938 print_mac(mac1, header->addr1),
2939 print_mac(mac2, header->addr2),
2940 print_mac(mac3, header->addr3));
2941 else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
2942 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
2943 print_mac(mac1, header->addr1),
2944 print_mac(mac2, header->addr2),
2945 print_mac(mac3, header->addr3));
2947 iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
2957 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
2958 * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
2959 static void iwl4965_rx_reply_rx_phy(struct iwl_priv *priv,
2960 struct iwl_rx_mem_buffer *rxb)
2962 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2963 priv->last_phy_res[0] = 1;
2964 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
2965 sizeof(struct iwl4965_rx_phy_res));
2967 static void iwl4965_rx_missed_beacon_notif(struct iwl_priv *priv,
2968 struct iwl_rx_mem_buffer *rxb)
2971 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
2972 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2973 struct iwl4965_missed_beacon_notif *missed_beacon;
2975 missed_beacon = &pkt->u.missed_beacon;
2976 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
2977 IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
2978 le32_to_cpu(missed_beacon->consequtive_missed_beacons),
2979 le32_to_cpu(missed_beacon->total_missed_becons),
2980 le32_to_cpu(missed_beacon->num_recvd_beacons),
2981 le32_to_cpu(missed_beacon->num_expected_beacons));
2982 if (!test_bit(STATUS_SCANNING, &priv->status))
2983 iwl_init_sensitivity(priv);
2985 #endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/
2987 #ifdef CONFIG_IWL4965_HT
2990 * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table
2992 static void iwl4965_sta_modify_enable_tid_tx(struct iwl_priv *priv,
2993 int sta_id, int tid)
2995 unsigned long flags;
2997 /* Remove "disable" flag, to enable Tx for this TID */
2998 spin_lock_irqsave(&priv->sta_lock, flags);
2999 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
3000 priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
3001 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3002 spin_unlock_irqrestore(&priv->sta_lock, flags);
3004 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
3008 * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
3010 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
3011 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
3013 static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
3014 struct iwl_ht_agg *agg,
3015 struct iwl4965_compressed_ba_resp*
3020 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
3021 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
3024 struct ieee80211_tx_status *tx_status;
3026 if (unlikely(!agg->wait_for_ba)) {
3027 IWL_ERROR("Received BA when not expected\n");
3031 /* Mark that the expected block-ack response arrived */
3032 agg->wait_for_ba = 0;
3033 IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
3035 /* Calculate shift to align block-ack bits with our Tx window bits */
3036 sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
3037 if (sh < 0) /* tbw something is wrong with indices */
3040 /* don't use 64-bit values for now */
3041 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
3043 if (agg->frame_count > (64 - sh)) {
3044 IWL_DEBUG_TX_REPLY("more frames than bitmap size");
3048 /* check for success or failure according to the
3049 * transmitted bitmap and block-ack bitmap */
3050 bitmap &= agg->bitmap;
3052 /* For each frame attempted in aggregation,
3053 * update driver's record of tx frame's status. */
3054 for (i = 0; i < agg->frame_count ; i++) {
3055 ack = bitmap & (1 << i);
3057 IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
3058 ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
3059 agg->start_idx + i);
3062 tx_status = &priv->txq[scd_flow].txb[agg->start_idx].status;
3063 tx_status->flags = IEEE80211_TX_STATUS_ACK;
3064 tx_status->flags |= IEEE80211_TX_STATUS_AMPDU;
3065 tx_status->ampdu_ack_map = successes;
3066 tx_status->ampdu_ack_len = agg->frame_count;
3067 iwl4965_hwrate_to_tx_control(priv, agg->rate_n_flags,
3068 &tx_status->control);
3070 IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
3076 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
3078 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
3081 /* Simply stop the queue, but don't change any configuration;
3082 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
3083 iwl_write_prph(priv,
3084 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
3085 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
3086 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
3090 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
3091 * priv->lock must be held by the caller
3093 static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
3094 u16 ssn_idx, u8 tx_fifo)
3098 if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
3099 IWL_WARNING("queue number too small: %d, must be > %d\n",
3100 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3104 ret = iwl_grab_nic_access(priv);
3108 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3110 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
3112 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3113 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
3114 /* supposes that ssn_idx is valid (!= 0xFFF) */
3115 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3117 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
3118 iwl4965_txq_ctx_deactivate(priv, txq_id);
3119 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
3121 iwl_release_nic_access(priv);
3126 int iwl4965_check_empty_hw_queue(struct iwl_priv *priv, int sta_id,
3129 struct iwl4965_queue *q = &priv->txq[txq_id].q;
3130 u8 *addr = priv->stations[sta_id].sta.sta.addr;
3131 struct iwl_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
3133 switch (priv->stations[sta_id].tid[tid].agg.state) {
3134 case IWL_EMPTYING_HW_QUEUE_DELBA:
3135 /* We are reclaiming the last packet of the */
3136 /* aggregated HW queue */
3137 if (txq_id == tid_data->agg.txq_id &&
3138 q->read_ptr == q->write_ptr) {
3139 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
3140 int tx_fifo = default_tid_to_tx_fifo[tid];
3141 IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n");
3142 iwl4965_tx_queue_agg_disable(priv, txq_id,
3144 tid_data->agg.state = IWL_AGG_OFF;
3145 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3148 case IWL_EMPTYING_HW_QUEUE_ADDBA:
3149 /* We are reclaiming the last packet of the queue */
3150 if (tid_data->tfds_in_queue == 0) {
3151 IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n");
3152 tid_data->agg.state = IWL_AGG_ON;
3153 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3161 * iwl4965_queue_dec_wrap - Decrement queue index, wrap back to end if needed
3162 * @index -- current index
3163 * @n_bd -- total number of entries in queue (s/b power of 2)
3165 static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
3167 return (index == 0) ? n_bd - 1 : index - 1;
3171 * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
3173 * Handles block-acknowledge notification from device, which reports success
3174 * of frames sent via aggregation.
3176 static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
3177 struct iwl_rx_mem_buffer *rxb)
3179 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3180 struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
3182 struct iwl4965_tx_queue *txq = NULL;
3183 struct iwl_ht_agg *agg;
3184 DECLARE_MAC_BUF(mac);
3186 /* "flow" corresponds to Tx queue */
3187 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
3189 /* "ssn" is start of block-ack Tx window, corresponds to index
3190 * (in Tx queue's circular buffer) of first TFD/frame in window */
3191 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
3193 if (scd_flow >= priv->hw_params.max_txq_num) {
3194 IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
3198 txq = &priv->txq[scd_flow];
3199 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
3201 /* Find index just before block-ack window */
3202 index = iwl4965_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
3204 /* TODO: Need to get this copy more safely - now good for debug */
3206 IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
3209 print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
3211 IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
3212 "%d, scd_ssn = %d\n",
3215 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
3218 IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
3220 (unsigned long long)agg->bitmap);
3222 /* Update driver's record of ACK vs. not for each frame in window */
3223 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
3225 /* Release all TFDs before the SSN, i.e. all TFDs in front of
3226 * block-ack window (we assume that they've been successfully
3227 * transmitted ... if not, it's too late anyway). */
3228 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
3229 /* calculate mac80211 ampdu sw queue to wake */
3231 scd_flow - IWL_BACK_QUEUE_FIRST_ID + priv->hw->queues;
3232 int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index);
3233 priv->stations[ba_resp->sta_id].
3234 tid[ba_resp->tid].tfds_in_queue -= freed;
3235 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3236 priv->mac80211_registered &&
3237 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
3238 ieee80211_wake_queue(priv->hw, ampdu_q);
3239 iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id,
3240 ba_resp->tid, scd_flow);
3245 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
3247 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
3254 scd_q2ratid = ra_tid & IWL49_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
3256 tbl_dw_addr = priv->scd_base_addr +
3257 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
3259 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
3262 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
3264 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
3266 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
3273 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
3275 * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
3276 * i.e. it must be one of the higher queues used for aggregation
3278 static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
3279 int tx_fifo, int sta_id, int tid,
3282 unsigned long flags;
3286 if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
3287 IWL_WARNING("queue number too small: %d, must be > %d\n",
3288 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3290 ra_tid = BUILD_RAxTID(sta_id, tid);
3292 /* Modify device's station table to Tx this TID */
3293 iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
3295 spin_lock_irqsave(&priv->lock, flags);
3296 rc = iwl_grab_nic_access(priv);
3298 spin_unlock_irqrestore(&priv->lock, flags);
3302 /* Stop this Tx queue before configuring it */
3303 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3305 /* Map receiver-address / traffic-ID to this queue */
3306 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
3308 /* Set this queue as a chain-building queue */
3309 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
3311 /* Place first TFD at index corresponding to start sequence number.
3312 * Assumes that ssn_idx is valid (!= 0xFFF) */
3313 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3314 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
3315 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3317 /* Set up Tx window size and frame limit for this queue */
3318 iwl_write_targ_mem(priv,
3319 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
3320 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
3321 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
3323 iwl_write_targ_mem(priv, priv->scd_base_addr +
3324 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
3325 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
3326 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
3328 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
3330 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
3331 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
3333 iwl_release_nic_access(priv);
3334 spin_unlock_irqrestore(&priv->lock, flags);
3339 #endif /* CONFIG_IWL4965_HT */
3342 * iwl4965_add_station - Initialize a station's hardware rate table
3344 * The uCode's station table contains a table of fallback rates
3345 * for automatic fallback during transmission.
3347 * NOTE: This sets up a default set of values. These will be replaced later
3348 * if the driver's iwl-4965-rs rate scaling algorithm is used, instead of
3351 * NOTE: Run REPLY_ADD_STA command to set up station table entry, before
3352 * calling this function (which runs REPLY_TX_LINK_QUALITY_CMD,
3353 * which requires station table entry to exist).
3355 void iwl4965_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
3358 struct iwl_link_quality_cmd link_cmd = {
3363 /* Set up the rate scaling to start at selected rate, fall back
3364 * all the way down to 1M in IEEE order, and then spin on 1M */
3366 r = IWL_RATE_54M_INDEX;
3367 else if (priv->band == IEEE80211_BAND_5GHZ)
3368 r = IWL_RATE_6M_INDEX;
3370 r = IWL_RATE_1M_INDEX;
3372 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
3374 if (r >= IWL_FIRST_CCK_RATE && r <= IWL_LAST_CCK_RATE)
3375 rate_flags |= RATE_MCS_CCK_MSK;
3377 /* Use Tx antenna B only */
3378 rate_flags |= RATE_MCS_ANT_B_MSK; /*FIXME:RS*/
3380 link_cmd.rs_table[i].rate_n_flags =
3381 iwl4965_hw_set_rate_n_flags(iwl4965_rates[r].plcp, rate_flags);
3382 r = iwl4965_get_prev_ieee_rate(r);
3385 link_cmd.general_params.single_stream_ant_msk = 2;
3386 link_cmd.general_params.dual_stream_ant_msk = 3;
3387 link_cmd.agg_params.agg_dis_start_th = 3;
3388 link_cmd.agg_params.agg_time_limit = cpu_to_le16(4000);
3390 /* Update the rate scaling for control frame Tx to AP */
3391 link_cmd.sta_id = is_ap ? IWL_AP_ID : priv->hw_params.bcast_sta_id;
3393 iwl_send_cmd_pdu_async(priv, REPLY_TX_LINK_QUALITY_CMD,
3394 sizeof(link_cmd), &link_cmd, NULL);
3397 #ifdef CONFIG_IWL4965_HT
3399 void iwl4965_set_ht_add_station(struct iwl_priv *priv, u8 index,
3400 struct ieee80211_ht_info *sta_ht_inf)
3405 if (!sta_ht_inf || !sta_ht_inf->ht_supported)
3408 mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2;
3410 sta_flags = priv->stations[index].sta.station_flags;
3412 sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
3414 switch (mimo_ps_mode) {
3415 case WLAN_HT_CAP_MIMO_PS_STATIC:
3416 sta_flags |= STA_FLG_MIMO_DIS_MSK;
3418 case WLAN_HT_CAP_MIMO_PS_DYNAMIC:
3419 sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
3421 case WLAN_HT_CAP_MIMO_PS_DISABLED:
3424 IWL_WARNING("Invalid MIMO PS mode %d", mimo_ps_mode);
3428 sta_flags |= cpu_to_le32(
3429 (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
3431 sta_flags |= cpu_to_le32(
3432 (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
3434 if (iwl_is_fat_tx_allowed(priv, sta_ht_inf))
3435 sta_flags |= STA_FLG_FAT_EN_MSK;
3437 sta_flags &= ~STA_FLG_FAT_EN_MSK;
3439 priv->stations[index].sta.station_flags = sta_flags;
3444 static int iwl4965_rx_agg_start(struct iwl_priv *priv,
3445 const u8 *addr, int tid, u16 ssn)
3447 unsigned long flags;
3450 sta_id = iwl_find_station(priv, addr);
3451 if (sta_id == IWL_INVALID_STATION)
3454 spin_lock_irqsave(&priv->sta_lock, flags);
3455 priv->stations[sta_id].sta.station_flags_msk = 0;
3456 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
3457 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
3458 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
3459 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3460 spin_unlock_irqrestore(&priv->sta_lock, flags);
3462 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
3466 static int iwl4965_rx_agg_stop(struct iwl_priv *priv,
3467 const u8 *addr, int tid)
3469 unsigned long flags;
3472 sta_id = iwl_find_station(priv, addr);
3473 if (sta_id == IWL_INVALID_STATION)
3476 spin_lock_irqsave(&priv->sta_lock, flags);
3477 priv->stations[sta_id].sta.station_flags_msk = 0;
3478 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
3479 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
3480 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3481 spin_unlock_irqrestore(&priv->sta_lock, flags);
3483 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
3488 * Find first available (lowest unused) Tx Queue, mark it "active".
3489 * Called only when finding queue for aggregation.
3490 * Should never return anything < 7, because they should already
3491 * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
3493 static int iwl4965_txq_ctx_activate_free(struct iwl_priv *priv)
3497 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++)
3498 if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
3503 static int iwl4965_tx_agg_start(struct ieee80211_hw *hw, const u8 *ra,
3504 u16 tid, u16 *start_seq_num)
3506 struct iwl_priv *priv = hw->priv;
3512 unsigned long flags;
3513 struct iwl_tid_data *tid_data;
3514 DECLARE_MAC_BUF(mac);
3516 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
3517 tx_fifo = default_tid_to_tx_fifo[tid];
3521 IWL_WARNING("%s on ra = %s tid = %d\n",
3522 __func__, print_mac(mac, ra), tid);
3524 sta_id = iwl_find_station(priv, ra);
3525 if (sta_id == IWL_INVALID_STATION)
3528 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
3529 IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n");
3533 txq_id = iwl4965_txq_ctx_activate_free(priv);
3537 spin_lock_irqsave(&priv->sta_lock, flags);
3538 tid_data = &priv->stations[sta_id].tid[tid];
3539 ssn = SEQ_TO_SN(tid_data->seq_number);
3540 tid_data->agg.txq_id = txq_id;
3541 spin_unlock_irqrestore(&priv->sta_lock, flags);
3543 *start_seq_num = ssn;
3544 ret = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
3550 if (tid_data->tfds_in_queue == 0) {
3551 printk(KERN_ERR "HW queue is empty\n");
3552 tid_data->agg.state = IWL_AGG_ON;
3553 ieee80211_start_tx_ba_cb_irqsafe(hw, ra, tid);
3555 IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n",
3556 tid_data->tfds_in_queue);
3557 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
3562 static int iwl4965_tx_agg_stop(struct ieee80211_hw *hw, const u8 *ra, u16 tid)
3564 struct iwl_priv *priv = hw->priv;
3565 int tx_fifo_id, txq_id, sta_id, ssn = -1;
3566 struct iwl_tid_data *tid_data;
3567 int ret, write_ptr, read_ptr;
3568 unsigned long flags;
3569 DECLARE_MAC_BUF(mac);
3572 IWL_ERROR("ra = NULL\n");
3576 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
3577 tx_fifo_id = default_tid_to_tx_fifo[tid];
3581 sta_id = iwl_find_station(priv, ra);
3583 if (sta_id == IWL_INVALID_STATION)
3586 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
3587 IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n");
3589 tid_data = &priv->stations[sta_id].tid[tid];
3590 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
3591 txq_id = tid_data->agg.txq_id;
3592 write_ptr = priv->txq[txq_id].q.write_ptr;
3593 read_ptr = priv->txq[txq_id].q.read_ptr;
3595 /* The queue is not empty */
3596 if (write_ptr != read_ptr) {
3597 IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n");
3598 priv->stations[sta_id].tid[tid].agg.state =
3599 IWL_EMPTYING_HW_QUEUE_DELBA;
3603 IWL_DEBUG_HT("HW queue is empty\n");
3604 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
3606 spin_lock_irqsave(&priv->lock, flags);
3607 ret = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
3608 spin_unlock_irqrestore(&priv->lock, flags);
3613 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, ra, tid);
3618 int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
3619 enum ieee80211_ampdu_mlme_action action,
3620 const u8 *addr, u16 tid, u16 *ssn)
3622 struct iwl_priv *priv = hw->priv;
3623 DECLARE_MAC_BUF(mac);
3625 IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
3626 print_mac(mac, addr), tid);
3629 case IEEE80211_AMPDU_RX_START:
3630 IWL_DEBUG_HT("start Rx\n");
3631 return iwl4965_rx_agg_start(priv, addr, tid, *ssn);
3632 case IEEE80211_AMPDU_RX_STOP:
3633 IWL_DEBUG_HT("stop Rx\n");
3634 return iwl4965_rx_agg_stop(priv, addr, tid);
3635 case IEEE80211_AMPDU_TX_START:
3636 IWL_DEBUG_HT("start Tx\n");
3637 return iwl4965_tx_agg_start(hw, addr, tid, ssn);
3638 case IEEE80211_AMPDU_TX_STOP:
3639 IWL_DEBUG_HT("stop Tx\n");
3640 return iwl4965_tx_agg_stop(hw, addr, tid);
3642 IWL_DEBUG_HT("unknown\n");
3648 #endif /* CONFIG_IWL4965_HT */
3651 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
3653 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
3654 addsta->mode = cmd->mode;
3655 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
3656 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
3657 addsta->station_flags = cmd->station_flags;
3658 addsta->station_flags_msk = cmd->station_flags_msk;
3659 addsta->tid_disable_tx = cmd->tid_disable_tx;
3660 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
3661 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
3662 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
3663 addsta->reserved1 = __constant_cpu_to_le16(0);
3664 addsta->reserved2 = __constant_cpu_to_le32(0);
3666 return (u16)sizeof(struct iwl4965_addsta_cmd);
3668 /* Set up 4965-specific Rx frame reply handlers */
3669 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
3671 /* Legacy Rx frames */
3672 priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx;
3674 /* High-throughput (HT) Rx frames */
3675 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
3676 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
3678 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
3679 iwl4965_rx_missed_beacon_notif;
3681 #ifdef CONFIG_IWL4965_HT
3682 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
3683 #endif /* CONFIG_IWL4965_HT */
3686 void iwl4965_hw_setup_deferred_work(struct iwl_priv *priv)
3688 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
3689 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
3690 INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
3692 init_timer(&priv->statistics_periodic);
3693 priv->statistics_periodic.data = (unsigned long)priv;
3694 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
3697 void iwl4965_hw_cancel_deferred_work(struct iwl_priv *priv)
3699 del_timer_sync(&priv->statistics_periodic);
3701 cancel_delayed_work(&priv->init_alive_start);
3705 static struct iwl_hcmd_ops iwl4965_hcmd = {
3706 .rxon_assoc = iwl4965_send_rxon_assoc,
3709 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
3710 .enqueue_hcmd = iwl4965_enqueue_hcmd,
3711 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
3712 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
3713 .chain_noise_reset = iwl4965_chain_noise_reset,
3714 .gain_computation = iwl4965_gain_computation,
3718 static struct iwl_lib_ops iwl4965_lib = {
3719 .set_hw_params = iwl4965_hw_set_hw_params,
3720 .alloc_shared_mem = iwl4965_alloc_shared_mem,
3721 .free_shared_mem = iwl4965_free_shared_mem,
3722 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
3723 .disable_tx_fifo = iwl4965_disable_tx_fifo,
3724 .rx_handler_setup = iwl4965_rx_handler_setup,
3725 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
3726 .alive_notify = iwl4965_alive_notify,
3727 .load_ucode = iwl4965_load_bsm,
3729 .init = iwl4965_apm_init,
3730 .config = iwl4965_nic_config,
3731 .set_pwr_src = iwl4965_set_pwr_src,
3734 .regulatory_bands = {
3735 EEPROM_REGULATORY_BAND_1_CHANNELS,
3736 EEPROM_REGULATORY_BAND_2_CHANNELS,
3737 EEPROM_REGULATORY_BAND_3_CHANNELS,
3738 EEPROM_REGULATORY_BAND_4_CHANNELS,
3739 EEPROM_REGULATORY_BAND_5_CHANNELS,
3740 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
3741 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
3743 .verify_signature = iwlcore_eeprom_verify_signature,
3744 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
3745 .release_semaphore = iwlcore_eeprom_release_semaphore,
3746 .check_version = iwl4965_eeprom_check_version,
3747 .query_addr = iwlcore_eeprom_query_addr,
3749 .radio_kill_sw = iwl4965_radio_kill_sw,
3750 .set_power = iwl4965_set_power,
3751 .update_chain_flags = iwl4965_update_chain_flags,
3754 static struct iwl_ops iwl4965_ops = {
3755 .lib = &iwl4965_lib,
3756 .hcmd = &iwl4965_hcmd,
3757 .utils = &iwl4965_hcmd_utils,
3760 struct iwl_cfg iwl4965_agn_cfg = {
3762 .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
3763 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
3764 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
3765 .ops = &iwl4965_ops,
3766 .mod_params = &iwl4965_mod_params,
3769 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
3770 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3771 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
3772 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
3773 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
3774 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n");
3775 module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
3776 MODULE_PARM_DESC(debug, "debug output mask");
3778 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
3779 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
3781 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
3782 MODULE_PARM_DESC(queues_num, "number of hw queues.");
3785 module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
3786 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
3787 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
3788 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");