err.no Git - linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/version.h>
  30 #include <linux/init.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <net/mac80211.h>
  38 #include <linux/etherdevice.h>
  39 #include <asm/unaligned.h>
  40
  41 #include "iwl-eeprom.h"
  42 #include "iwl-dev.h"
  43 #include "iwl-core.h"
  44 #include "iwl-io.h"
  45 #include "iwl-helpers.h"
  46 #include "iwl-calib.h"
  47 #include "iwl-sta.h"
  48
  49 static int iwl4965_send_tx_power(struct iwl_priv *priv);
  50 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
  51
  52 /* module parameters */
  53 static struct iwl_mod_params iwl4965_mod_params = {
  54         .num_of_queues = IWL49_NUM_QUEUES,
  55         .enable_qos = 1,
  56         .amsdu_size_8K = 1,
  57         .restart_fw = 1,
  58         /* the rest are 0 by default */
  59 };
  60
  61 /* check contents of special bootstrap uCode SRAM */
  62 static int iwl4965_verify_bsm(struct iwl_priv *priv)
  63 {
  64         __le32 *image = priv->ucode_boot.v_addr;
  65         u32 len = priv->ucode_boot.len;
  66         u32 reg;
  67         u32 val;
  68
  69         IWL_DEBUG_INFO("Begin verify bsm\n");
  70
  71         /* verify BSM SRAM contents */
  72         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  73         for (reg = BSM_SRAM_LOWER_BOUND;
  74              reg < BSM_SRAM_LOWER_BOUND + len;
  75              reg += sizeof(u32), image++) {
  76                 val = iwl_read_prph(priv, reg);
  77                 if (val != le32_to_cpu(*image)) {
  78                         IWL_ERROR("BSM uCode verification failed at "
  79                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  80                                   BSM_SRAM_LOWER_BOUND,
  81                                   reg - BSM_SRAM_LOWER_BOUND, len,
  82                                   val, le32_to_cpu(*image));
  83                         return -EIO;
  84                 }
  85         }
  86
  87         IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  88
  89         return 0;
  90 }
  91
  92 /**
  93  * iwl4965_load_bsm - Load bootstrap instructions
  94  *
  95  * BSM operation:
  96  *
  97  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  98  * in special SRAM that does not power down during RFKILL.  When powering back
  99  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 100  * the bootstrap program into the on-board processor, and starts it.
 101  *
 102  * The bootstrap program loads (via DMA) instructions and data for a new
 103  * program from host DRAM locations indicated by the host driver in the
 104  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 105  * automatically.
 106  *
 107  * When initializing the NIC, the host driver points the BSM to the
 108  * "initialize" uCode image.  This uCode sets up some internal data, then
 109  * notifies host via "initialize alive" that it is complete.
 110  *
 111  * The host then replaces the BSM_DRAM_* pointer values to point to the
 112  * normal runtime uCode instructions and a backup uCode data cache buffer
 113  * (filled initially with starting data values for the on-board processor),
 114  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 115  * which begins normal operation.
 116  *
 117  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 118  * the backup data cache in DRAM before SRAM is powered down.
 119  *
 120  * When powering back up, the BSM loads the bootstrap program.  This reloads
 121  * the runtime uCode instructions and the backup data cache into SRAM,
 122  * and re-launches the runtime uCode from where it left off.
 123  */
 124 static int iwl4965_load_bsm(struct iwl_priv *priv)
 125 {
 126         __le32 *image = priv->ucode_boot.v_addr;
 127         u32 len = priv->ucode_boot.len;
 128         dma_addr_t pinst;
 129         dma_addr_t pdata;
 130         u32 inst_len;
 131         u32 data_len;
 132         int i;
 133         u32 done;
 134         u32 reg_offset;
 135         int ret;
 136
 137         IWL_DEBUG_INFO("Begin load bsm\n");
 138
 139         priv->ucode_type = UCODE_RT;
 140
 141         /* make sure bootstrap program is no larger than BSM's SRAM size */
 142         if (len > IWL_MAX_BSM_SIZE)
 143                 return -EINVAL;
 144
 145         /* Tell bootstrap uCode where to find the "Initialize" uCode
 146          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 147          * NOTE:  iwl_init_alive_start() will replace these values,
 148          *        after the "initialize" uCode has run, to point to
 149          *        runtime/protocol instructions and backup data cache.
 150          */
 151         pinst = priv->ucode_init.p_addr >> 4;
 152         pdata = priv->ucode_init_data.p_addr >> 4;
 153         inst_len = priv->ucode_init.len;
 154         data_len = priv->ucode_init_data.len;
 155
 156         ret = iwl_grab_nic_access(priv);
 157         if (ret)
 158                 return ret;
 159
 160         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 161         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 162         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 163         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 164
 165         /* Fill BSM memory with bootstrap instructions */
 166         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 167              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 168              reg_offset += sizeof(u32), image++)
 169                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
 170
 171         ret = iwl4965_verify_bsm(priv);
 172         if (ret) {
 173                 iwl_release_nic_access(priv);
 174                 return ret;
 175         }
 176
 177         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 178         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
 179         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
 180         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 181
 182         /* Load bootstrap code into instruction SRAM now,
 183          *   to prepare to load "initialize" uCode */
 184         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 185
 186         /* Wait for load of bootstrap uCode to finish */
 187         for (i = 0; i < 100; i++) {
 188                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
 189                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 190                         break;
 191                 udelay(10);
 192         }
 193         if (i < 100)
 194                 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
 195         else {
 196                 IWL_ERROR("BSM write did not complete!\n");
 197                 return -EIO;
 198         }
 199
 200         /* Enable future boot loads whenever power management unit triggers it
 201          *   (e.g. when powering back up after power-save shutdown) */
 202         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 203
 204         iwl_release_nic_access(priv);
 205
 206         return 0;
 207 }
 208
 209 /**
 210  * iwl4965_set_ucode_ptrs - Set uCode address location
 211  *
 212  * Tell initialization uCode where to find runtime uCode.
 213  *
 214  * BSM registers initially contain pointers to initialization uCode.
 215  * We need to replace them to load runtime uCode inst and data,
 216  * and to save runtime data when powering down.
 217  */
 218 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
 219 {
 220         dma_addr_t pinst;
 221         dma_addr_t pdata;
 222         unsigned long flags;
 223         int ret = 0;
 224
 225         /* bits 35:4 for 4965 */
 226         pinst = priv->ucode_code.p_addr >> 4;
 227         pdata = priv->ucode_data_backup.p_addr >> 4;
 228
 229         spin_lock_irqsave(&priv->lock, flags);
 230         ret = iwl_grab_nic_access(priv);
 231         if (ret) {
 232                 spin_unlock_irqrestore(&priv->lock, flags);
 233                 return ret;
 234         }
 235
 236         /* Tell bootstrap uCode where to find image to load */
 237         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 238         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 239         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
 240                                  priv->ucode_data.len);
 241
 242         /* Inst bytecount must be last to set up, bit 31 signals uCode
 243          *   that all new ptr/size info is in place */
 244         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
 245                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
 246         iwl_release_nic_access(priv);
 247
 248         spin_unlock_irqrestore(&priv->lock, flags);
 249
 250         IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
 251
 252         return ret;
 253 }
 254
 255 /**
 256  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
 257  *
 258  * Called after REPLY_ALIVE notification received from "initialize" uCode.
 259  *
 260  * The 4965 "initialize" ALIVE reply contains calibration data for:
 261  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
 262  *   (3945 does not contain this data).
 263  *
 264  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 265 */
 266 static void iwl4965_init_alive_start(struct iwl_priv *priv)
 267 {
 268         /* Check alive response for "valid" sign from uCode */
 269         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
 270                 /* We had an error bringing up the hardware, so take it
 271                  * all the way back down so we can try again */
 272                 IWL_DEBUG_INFO("Initialize Alive failed.\n");
 273                 goto restart;
 274         }
 275
 276         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 277          * This is a paranoid check, because we would not have gotten the
 278          * "initialize" alive if code weren't properly loaded.  */
 279         if (iwl_verify_ucode(priv)) {
 280                 /* Runtime instruction load was bad;
 281                  * take it all the way back down so we can try again */
 282                 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
 283                 goto restart;
 284         }
 285
 286         /* Calculate temperature */
 287         priv->temperature = iwl4965_hw_get_temperature(priv);
 288
 289         /* Send pointers to protocol/runtime uCode image ... init code will
 290          * load and launch runtime uCode, which will send us another "Alive"
 291          * notification. */
 292         IWL_DEBUG_INFO("Initialization Alive received.\n");
 293         if (iwl4965_set_ucode_ptrs(priv)) {
 294                 /* Runtime instruction load won't happen;
 295                  * take it all the way back down so we can try again */
 296                 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
 297                 goto restart;
 298         }
 299         return;
 300
 301 restart:
 302         queue_work(priv->workqueue, &priv->restart);
 303 }
 304
 305 static int is_fat_channel(__le32 rxon_flags)
 306 {
 307         return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
 308                 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
 309 }
 310
 311 /*
 312  * EEPROM handlers
 313  */
 314
 315 static int iwl4965_eeprom_check_version(struct iwl_priv *priv)
 316 {
 317         u16 eeprom_ver;
 318         u16 calib_ver;
 319
 320         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
 321
 322         calib_ver = iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
 323
 324         if (eeprom_ver < EEPROM_4965_EEPROM_VERSION ||
 325             calib_ver < EEPROM_4965_TX_POWER_VERSION)
 326                 goto err;
 327
 328         return 0;
 329 err:
 330         IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
 331                   eeprom_ver, EEPROM_4965_EEPROM_VERSION,
 332                   calib_ver, EEPROM_4965_TX_POWER_VERSION);
 333         return -EINVAL;
 334
 335 }
 336 int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 337 {
 338         int ret;
 339         unsigned long flags;
 340
 341         spin_lock_irqsave(&priv->lock, flags);
 342         ret = iwl_grab_nic_access(priv);
 343         if (ret) {
 344                 spin_unlock_irqrestore(&priv->lock, flags);
 345                 return ret;
 346         }
 347
 348         if (src == IWL_PWR_SRC_VAUX) {
 349                 u32 val;
 350                 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
 351                                             &val);
 352
 353                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
 354                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 355                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 356                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 357                 }
 358         } else {
 359                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 360                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 361                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 362         }
 363
 364         iwl_release_nic_access(priv);
 365         spin_unlock_irqrestore(&priv->lock, flags);
 366
 367         return ret;
 368 }
 369
 370 /*
 371  * Activate/Deactivat Tx DMA/FIFO channels according tx fifos mask
 372  * must be called under priv->lock and mac access
 373  */
 374 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
 375 {
 376         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
 377 }
 378
 379 static int iwl4965_apm_init(struct iwl_priv *priv)
 380 {
 381         int ret = 0;
 382
 383         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 384                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
 385
 386         /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
 387         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 388                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 389
 390         /* set "initialization complete" bit to move adapter
 391          * D0U* --> D0A* state */
 392         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 393
 394         /* wait for clock stabilization */
 395         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
 396                            CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 397                            CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 398         if (ret < 0) {
 399                 IWL_DEBUG_INFO("Failed to init the card\n");
 400                 goto out;
 401         }
 402
 403         ret = iwl_grab_nic_access(priv);
 404         if (ret)
 405                 goto out;
 406
 407         /* enable DMA */
 408         iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 409                                                 APMG_CLK_VAL_BSM_CLK_RQT);
 410
 411         udelay(20);
 412
 413         /* disable L1-Active */
 414         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 415                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 416
 417         iwl_release_nic_access(priv);
 418 out:
 419         return ret;
 420 }
 421
 422
 423 static void iwl4965_nic_config(struct iwl_priv *priv)
 424 {
 425         unsigned long flags;
 426         u32 val;
 427         u16 radio_cfg;
 428         u8 val_link;
 429
 430         spin_lock_irqsave(&priv->lock, flags);
 431
 432         if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
 433                 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
 434                 /* Enable No Snoop field */
 435                 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
 436                                        val & ~(1 << 11));
 437         }
 438
 439         pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
 440
 441         /* L1 is enabled by BIOS */
 442         if ((val_link & PCI_LINK_VAL_L1_EN) == PCI_LINK_VAL_L1_EN)
 443                 /* diable L0S disabled L1A enabled */
 444                 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 445         else
 446                 /* L0S enabled L1A disabled */
 447                 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 448
 449         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
 450
 451         /* write radio config values to register */
 452         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 453                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 454                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 455                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 456                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 457
 458         /* set CSR_HW_CONFIG_REG for uCode use */
 459         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 460                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 461                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 462
 463         priv->calib_info = (struct iwl_eeprom_calib_info *)
 464                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
 465
 466         spin_unlock_irqrestore(&priv->lock, flags);
 467 }
 468
 469 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
 470 {
 471         int ret = 0;
 472         unsigned long flags;
 473
 474         spin_lock_irqsave(&priv->lock, flags);
 475
 476         /* set stop master bit */
 477         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
 478
 479         ret = iwl_poll_bit(priv, CSR_RESET,
 480                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
 481                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
 482         if (ret < 0)
 483                 goto out;
 484
 485 out:
 486         spin_unlock_irqrestore(&priv->lock, flags);
 487         IWL_DEBUG_INFO("stop master\n");
 488
 489         return ret;
 490 }
 491
 492 static void iwl4965_apm_stop(struct iwl_priv *priv)
 493 {
 494         unsigned long flags;
 495
 496         iwl4965_apm_stop_master(priv);
 497
 498         spin_lock_irqsave(&priv->lock, flags);
 499
 500         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 501
 502         udelay(10);
 503
 504         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 505         spin_unlock_irqrestore(&priv->lock, flags);
 506 }
 507
 508 static int iwl4965_apm_reset(struct iwl_priv *priv)
 509 {
 510         int ret = 0;
 511         unsigned long flags;
 512
 513         iwl4965_apm_stop_master(priv);
 514
 515         spin_lock_irqsave(&priv->lock, flags);
 516
 517         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 518
 519         udelay(10);
 520
 521         /* FIXME: put here L1A -L0S w/a */
 522
 523         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 524
 525         ret = iwl_poll_bit(priv, CSR_RESET,
 526                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 527                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
 528
 529         if (ret)
 530                 goto out;
 531
 532         udelay(10);
 533
 534         ret = iwl_grab_nic_access(priv);
 535         if (ret)
 536                 goto out;
 537         /* Enable DMA and BSM Clock */
 538         iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 539                                               APMG_CLK_VAL_BSM_CLK_RQT);
 540
 541         udelay(10);
 542
 543         /* disable L1A */
 544         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 545                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 546
 547         iwl_release_nic_access(priv);
 548
 549         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
 550         wake_up_interruptible(&priv->wait_command_queue);
 551
 552 out:
 553         spin_unlock_irqrestore(&priv->lock, flags);
 554
 555         return ret;
 556 }
 557
 558 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 559  * Called after every association, but this runs only once!
 560  *  ... once chain noise is calibrated the first time, it's good forever.  */
 561 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
 562 {
 563         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
 564
 565         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
 566                 struct iwl4965_calibration_cmd cmd;
 567
 568                 memset(&cmd, 0, sizeof(cmd));
 569                 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
 570                 cmd.diff_gain_a = 0;
 571                 cmd.diff_gain_b = 0;
 572                 cmd.diff_gain_c = 0;
 573                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 574                                  sizeof(cmd), &cmd))
 575                         IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
 576                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
 577                 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
 578         }
 579 }
 580
 581 static void iwl4965_gain_computation(struct iwl_priv *priv,
 582                 u32 *average_noise,
 583                 u16 min_average_noise_antenna_i,
 584                 u32 min_average_noise)
 585 {
 586         int i, ret;
 587         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 588
 589         data->delta_gain_code[min_average_noise_antenna_i] = 0;
 590
 591         for (i = 0; i < NUM_RX_CHAINS; i++) {
 592                 s32 delta_g = 0;
 593
 594                 if (!(data->disconn_array[i]) &&
 595                     (data->delta_gain_code[i] ==
 596                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
 597                         delta_g = average_noise[i] - min_average_noise;
 598                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
 599                         data->delta_gain_code[i] =
 600                                 min(data->delta_gain_code[i],
 601                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
 602
 603                         data->delta_gain_code[i] =
 604                                 (data->delta_gain_code[i] | (1 << 2));
 605                 } else {
 606                         data->delta_gain_code[i] = 0;
 607                 }
 608         }
 609         IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
 610                      data->delta_gain_code[0],
 611                      data->delta_gain_code[1],
 612                      data->delta_gain_code[2]);
 613
 614         /* Differential gain gets sent to uCode only once */
 615         if (!data->radio_write) {
 616                 struct iwl4965_calibration_cmd cmd;
 617                 data->radio_write = 1;
 618
 619                 memset(&cmd, 0, sizeof(cmd));
 620                 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
 621                 cmd.diff_gain_a = data->delta_gain_code[0];
 622                 cmd.diff_gain_b = data->delta_gain_code[1];
 623                 cmd.diff_gain_c = data->delta_gain_code[2];
 624                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 625                                       sizeof(cmd), &cmd);
 626                 if (ret)
 627                         IWL_DEBUG_CALIB("fail sending cmd "
 628                                      "REPLY_PHY_CALIBRATION_CMD \n");
 629
 630                 /* TODO we might want recalculate
 631                  * rx_chain in rxon cmd */
 632
 633                 /* Mark so we run this algo only once! */
 634                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
 635         }
 636         data->chain_noise_a = 0;
 637         data->chain_noise_b = 0;
 638         data->chain_noise_c = 0;
 639         data->chain_signal_a = 0;
 640         data->chain_signal_b = 0;
 641         data->chain_signal_c = 0;
 642         data->beacon_count = 0;
 643 }
 644
 645 static void iwl4965_bg_txpower_work(struct work_struct *work)
 646 {
 647         struct iwl_priv *priv = container_of(work, struct iwl_priv,
 648                         txpower_work);
 649
 650         /* If a scan happened to start before we got here
 651          * then just return; the statistics notification will
 652          * kick off another scheduled work to compensate for
 653          * any temperature delta we missed here. */
 654         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
 655             test_bit(STATUS_SCANNING, &priv->status))
 656                 return;
 657
 658         mutex_lock(&priv->mutex);
 659
 660         /* Regardless of if we are assocaited, we must reconfigure the
 661          * TX power since frames can be sent on non-radar channels while
 662          * not associated */
 663         iwl4965_send_tx_power(priv);
 664
 665         /* Update last_temperature to keep is_calib_needed from running
 666          * when it isn't needed... */
 667         priv->last_temperature = priv->temperature;
 668
 669         mutex_unlock(&priv->mutex);
 670 }
 671
 672 /*
 673  * Acquire priv->lock before calling this function !
 674  */
 675 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
 676 {
 677         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
 678                              (index & 0xff) | (txq_id << 8));
 679         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
 680 }
 681
 682 /**
 683  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
 684  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
 685  * @scd_retry: (1) Indicates queue will be used in aggregation mode
 686  *
 687  * NOTE:  Acquire priv->lock before calling this function !
 688  */
 689 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
 690                                         struct iwl_tx_queue *txq,
 691                                         int tx_fifo_id, int scd_retry)
 692 {
 693         int txq_id = txq->q.id;
 694
 695         /* Find out whether to activate Tx queue */
 696         int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
 697
 698         /* Set up and activate */
 699         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
 700                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
 701                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
 702                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
 703                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
 704                          IWL49_SCD_QUEUE_STTS_REG_MSK);
 705
 706         txq->sched_retry = scd_retry;
 707
 708         IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
 709                        active ? "Activate" : "Deactivate",
 710                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
 711 }
 712
 713 static const u16 default_queue_to_tx_fifo[] = {
 714         IWL_TX_FIFO_AC3,
 715         IWL_TX_FIFO_AC2,
 716         IWL_TX_FIFO_AC1,
 717         IWL_TX_FIFO_AC0,
 718         IWL49_CMD_FIFO_NUM,
 719         IWL_TX_FIFO_HCCA_1,
 720         IWL_TX_FIFO_HCCA_2
 721 };
 722
 723 static int iwl4965_alive_notify(struct iwl_priv *priv)
 724 {
 725         u32 a;
 726         int i = 0;
 727         unsigned long flags;
 728         int ret;
 729
 730         spin_lock_irqsave(&priv->lock, flags);
 731
 732         ret = iwl_grab_nic_access(priv);
 733         if (ret) {
 734                 spin_unlock_irqrestore(&priv->lock, flags);
 735                 return ret;
 736         }
 737
 738         /* Clear 4965's internal Tx Scheduler data base */
 739         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
 740         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
 741         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
 742                 iwl_write_targ_mem(priv, a, 0);
 743         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
 744                 iwl_write_targ_mem(priv, a, 0);
 745         for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
 746                 iwl_write_targ_mem(priv, a, 0);
 747
 748         /* Tel 4965 where to find Tx byte count tables */
 749         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
 750                 (priv->shared_phys +
 751                  offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
 752
 753         /* Disable chain mode for all queues */
 754         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
 755
 756         /* Initialize each Tx queue (including the command queue) */
 757         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
 758
 759                 /* TFD circular buffer read/write indexes */
 760                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
 761                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
 762
 763                 /* Max Tx Window size for Scheduler-ACK mode */
 764                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 765                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
 766                                 (SCD_WIN_SIZE <<
 767                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
 768                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
 769
 770                 /* Frame limit */
 771                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 772                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
 773                                 sizeof(u32),
 774                                 (SCD_FRAME_LIMIT <<
 775                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
 776                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
 777
 778         }
 779         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
 780                                  (1 << priv->hw_params.max_txq_num) - 1);
 781
 782         /* Activate all Tx DMA/FIFO channels */
 783         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 7));
 784
 785         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 786
 787         /* Map each Tx/cmd queue to its corresponding fifo */
 788         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
 789                 int ac = default_queue_to_tx_fifo[i];
 790                 iwl_txq_ctx_activate(priv, i);
 791                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
 792         }
 793
 794         iwl_release_nic_access(priv);
 795         spin_unlock_irqrestore(&priv->lock, flags);
 796
 797         return ret;
 798 }
 799
 800 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
 801         .min_nrg_cck = 97,
 802         .max_nrg_cck = 0,
 803
 804         .auto_corr_min_ofdm = 85,
 805         .auto_corr_min_ofdm_mrc = 170,
 806         .auto_corr_min_ofdm_x1 = 105,
 807         .auto_corr_min_ofdm_mrc_x1 = 220,
 808
 809         .auto_corr_max_ofdm = 120,
 810         .auto_corr_max_ofdm_mrc = 210,
 811         .auto_corr_max_ofdm_x1 = 140,
 812         .auto_corr_max_ofdm_mrc_x1 = 270,
 813
 814         .auto_corr_min_cck = 125,
 815         .auto_corr_max_cck = 200,
 816         .auto_corr_min_cck_mrc = 200,
 817         .auto_corr_max_cck_mrc = 400,
 818
 819         .nrg_th_cck = 100,
 820         .nrg_th_ofdm = 100,
 821 };
 822
 823 /**
 824  * iwl4965_hw_set_hw_params
 825  *
 826  * Called when initializing driver
 827  */
 828 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
 829 {
 830
 831         if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
 832             (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
 833                 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
 834                           IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
 835                 return -EINVAL;
 836         }
 837
 838         priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
 839         priv->hw_params.first_ampdu_q = IWL49_FIRST_AMPDU_QUEUE;
 840         priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
 841         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
 842         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
 843         if (priv->cfg->mod_params->amsdu_size_8K)
 844                 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
 845         else
 846                 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
 847         priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
 848         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
 849         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
 850
 851         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
 852         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
 853         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 854         priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
 855
 856         priv->hw_params.tx_chains_num = 2;
 857         priv->hw_params.rx_chains_num = 2;
 858         priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
 859         priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
 860         priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
 861
 862         priv->hw_params.sens = &iwl4965_sensitivity;
 863
 864         return 0;
 865 }
 866
 867 /* set card power command */
 868 static int iwl4965_set_power(struct iwl_priv *priv,
 869                       void *cmd)
 870 {
 871         int ret = 0;
 872
 873         ret = iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD,
 874                                     sizeof(struct iwl4965_powertable_cmd),
 875                                     cmd, NULL);
 876         return ret;
 877 }
 878
 879 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
 880 {
 881         s32 sign = 1;
 882
 883         if (num < 0) {
 884                 sign = -sign;
 885                 num = -num;
 886         }
 887         if (denom < 0) {
 888                 sign = -sign;
 889                 denom = -denom;
 890         }
 891         *res = 1;
 892         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 893
 894         return 1;
 895 }
 896
 897 /**
 898  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
 899  *
 900  * Determines power supply voltage compensation for txpower calculations.
 901  * Returns number of 1/2-dB steps to subtract from gain table index,
 902  * to compensate for difference between power supply voltage during
 903  * factory measurements, vs. current power supply voltage.
 904  *
 905  * Voltage indication is higher for lower voltage.
 906  * Lower voltage requires more gain (lower gain table index).
 907  */
 908 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
 909                                             s32 current_voltage)
 910 {
 911         s32 comp = 0;
 912
 913         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
 914             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
 915                 return 0;
 916
 917         iwl4965_math_div_round(current_voltage - eeprom_voltage,
 918                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
 919
 920         if (current_voltage > eeprom_voltage)
 921                 comp *= 2;
 922         if ((comp < -2) || (comp > 2))
 923                 comp = 0;
 924
 925         return comp;
 926 }
 927
 928 static s32 iwl4965_get_tx_atten_grp(u16 channel)
 929 {
 930         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
 931             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
 932                 return CALIB_CH_GROUP_5;
 933
 934         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
 935             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
 936                 return CALIB_CH_GROUP_1;
 937
 938         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
 939             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
 940                 return CALIB_CH_GROUP_2;
 941
 942         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
 943             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
 944                 return CALIB_CH_GROUP_3;
 945
 946         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
 947             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
 948                 return CALIB_CH_GROUP_4;
 949
 950         IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
 951         return -1;
 952 }
 953
 954 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
 955 {
 956         s32 b = -1;
 957
 958         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 959                 if (priv->calib_info->band_info[b].ch_from == 0)
 960                         continue;
 961
 962                 if ((channel >= priv->calib_info->band_info[b].ch_from)
 963                     && (channel <= priv->calib_info->band_info[b].ch_to))
 964                         break;
 965         }
 966
 967         return b;
 968 }
 969
 970 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 971 {
 972         s32 val;
 973
 974         if (x2 == x1)
 975                 return y1;
 976         else {
 977                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 978                 return val + y2;
 979         }
 980 }
 981
 982 /**
 983  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
 984  *
 985  * Interpolates factory measurements from the two sample channels within a
 986  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 987  * differences in channel frequencies, which is proportional to differences
 988  * in channel number.
 989  */
 990 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
 991                                     struct iwl_eeprom_calib_ch_info *chan_info)
 992 {
 993         s32 s = -1;
 994         u32 c;
 995         u32 m;
 996         const struct iwl_eeprom_calib_measure *m1;
 997         const struct iwl_eeprom_calib_measure *m2;
 998         struct iwl_eeprom_calib_measure *omeas;
 999         u32 ch_i1;
1000         u32 ch_i2;
1001
1002         s = iwl4965_get_sub_band(priv, channel);
1003         if (s >= EEPROM_TX_POWER_BANDS) {
1004                 IWL_ERROR("Tx Power can not find channel %d ", channel);
1005                 return -1;
1006         }
1007
1008         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
1009         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
1010         chan_info->ch_num = (u8) channel;
1011
1012         IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
1013                           channel, s, ch_i1, ch_i2);
1014
1015         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
1016                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
1017                         m1 = &(priv->calib_info->band_info[s].ch1.
1018                                measurements[c][m]);
1019                         m2 = &(priv->calib_info->band_info[s].ch2.
1020                                measurements[c][m]);
1021                         omeas = &(chan_info->measurements[c][m]);
1022
1023                         omeas->actual_pow =
1024                             (u8) iwl4965_interpolate_value(channel, ch_i1,
1025                                                            m1->actual_pow,
1026                                                            ch_i2,
1027                                                            m2->actual_pow);
1028                         omeas->gain_idx =
1029                             (u8) iwl4965_interpolate_value(channel, ch_i1,
1030                                                            m1->gain_idx, ch_i2,
1031                                                            m2->gain_idx);
1032                         omeas->temperature =
1033                             (u8) iwl4965_interpolate_value(channel, ch_i1,
1034                                                            m1->temperature,
1035                                                            ch_i2,
1036                                                            m2->temperature);
1037                         omeas->pa_det =
1038                             (s8) iwl4965_interpolate_value(channel, ch_i1,
1039                                                            m1->pa_det, ch_i2,
1040                                                            m2->pa_det);
1041
1042                         IWL_DEBUG_TXPOWER
1043                             ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1044                              m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1045                         IWL_DEBUG_TXPOWER
1046                             ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1047                              m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1048                         IWL_DEBUG_TXPOWER
1049                             ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1050                              m1->pa_det, m2->pa_det, omeas->pa_det);
1051                         IWL_DEBUG_TXPOWER
1052                             ("chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
1053                              m1->temperature, m2->temperature,
1054                              omeas->temperature);
1055                 }
1056         }
1057
1058         return 0;
1059 }
1060
1061 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1062  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1063 static s32 back_off_table[] = {
1064         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1065         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1066         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1067         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1068         10                      /* CCK */
1069 };
1070
1071 /* Thermal compensation values for txpower for various frequency ranges ...
1072  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1073 static struct iwl4965_txpower_comp_entry {
1074         s32 degrees_per_05db_a;
1075         s32 degrees_per_05db_a_denom;
1076 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1077         {9, 2},                 /* group 0 5.2, ch  34-43 */
1078         {4, 1},                 /* group 1 5.2, ch  44-70 */
1079         {4, 1},                 /* group 2 5.2, ch  71-124 */
1080         {4, 1},                 /* group 3 5.2, ch 125-200 */
1081         {3, 1}                  /* group 4 2.4, ch   all */
1082 };
1083
1084 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1085 {
1086         if (!band) {
1087                 if ((rate_power_index & 7) <= 4)
1088                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1089         }
1090         return MIN_TX_GAIN_INDEX;
1091 }
1092
1093 struct gain_entry {
1094         u8 dsp;
1095         u8 radio;
1096 };
1097
1098 static const struct gain_entry gain_table[2][108] = {
1099         /* 5.2GHz power gain index table */
1100         {
1101          {123, 0x3F},           /* highest txpower */
1102          {117, 0x3F},
1103          {110, 0x3F},
1104          {104, 0x3F},
1105          {98, 0x3F},
1106          {110, 0x3E},
1107          {104, 0x3E},
1108          {98, 0x3E},
1109          {110, 0x3D},
1110          {104, 0x3D},
1111          {98, 0x3D},
1112          {110, 0x3C},
1113          {104, 0x3C},
1114          {98, 0x3C},
1115          {110, 0x3B},
1116          {104, 0x3B},
1117          {98, 0x3B},
1118          {110, 0x3A},
1119          {104, 0x3A},
1120          {98, 0x3A},
1121          {110, 0x39},
1122          {104, 0x39},
1123          {98, 0x39},
1124          {110, 0x38},
1125          {104, 0x38},
1126          {98, 0x38},
1127          {110, 0x37},
1128          {104, 0x37},
1129          {98, 0x37},
1130          {110, 0x36},
1131          {104, 0x36},
1132          {98, 0x36},
1133          {110, 0x35},
1134          {104, 0x35},
1135          {98, 0x35},
1136          {110, 0x34},
1137          {104, 0x34},
1138          {98, 0x34},
1139          {110, 0x33},
1140          {104, 0x33},
1141          {98, 0x33},
1142          {110, 0x32},
1143          {104, 0x32},
1144          {98, 0x32},
1145          {110, 0x31},
1146          {104, 0x31},
1147          {98, 0x31},
1148          {110, 0x30},
1149          {104, 0x30},
1150          {98, 0x30},
1151          {110, 0x25},
1152          {104, 0x25},
1153          {98, 0x25},
1154          {110, 0x24},
1155          {104, 0x24},
1156          {98, 0x24},
1157          {110, 0x23},
1158          {104, 0x23},
1159          {98, 0x23},
1160          {110, 0x22},
1161          {104, 0x18},
1162          {98, 0x18},
1163          {110, 0x17},
1164          {104, 0x17},
1165          {98, 0x17},
1166          {110, 0x16},
1167          {104, 0x16},
1168          {98, 0x16},
1169          {110, 0x15},
1170          {104, 0x15},
1171          {98, 0x15},
1172          {110, 0x14},
1173          {104, 0x14},
1174          {98, 0x14},
1175          {110, 0x13},
1176          {104, 0x13},
1177          {98, 0x13},
1178          {110, 0x12},
1179          {104, 0x08},
1180          {98, 0x08},
1181          {110, 0x07},
1182          {104, 0x07},
1183          {98, 0x07},
1184          {110, 0x06},
1185          {104, 0x06},
1186          {98, 0x06},
1187          {110, 0x05},
1188          {104, 0x05},
1189          {98, 0x05},
1190          {110, 0x04},
1191          {104, 0x04},
1192          {98, 0x04},
1193          {110, 0x03},
1194          {104, 0x03},
1195          {98, 0x03},
1196          {110, 0x02},
1197          {104, 0x02},
1198          {98, 0x02},
1199          {110, 0x01},
1200          {104, 0x01},
1201          {98, 0x01},
1202          {110, 0x00},
1203          {104, 0x00},
1204          {98, 0x00},
1205          {93, 0x00},
1206          {88, 0x00},
1207          {83, 0x00},
1208          {78, 0x00},
1209          },
1210         /* 2.4GHz power gain index table */
1211         {
1212          {110, 0x3f},           /* highest txpower */
1213          {104, 0x3f},
1214          {98, 0x3f},
1215          {110, 0x3e},
1216          {104, 0x3e},
1217          {98, 0x3e},
1218          {110, 0x3d},
1219          {104, 0x3d},
1220          {98, 0x3d},
1221          {110, 0x3c},
1222          {104, 0x3c},
1223          {98, 0x3c},
1224          {110, 0x3b},
1225          {104, 0x3b},
1226          {98, 0x3b},
1227          {110, 0x3a},
1228          {104, 0x3a},
1229          {98, 0x3a},
1230          {110, 0x39},
1231          {104, 0x39},
1232          {98, 0x39},
1233          {110, 0x38},
1234          {104, 0x38},
1235          {98, 0x38},
1236          {110, 0x37},
1237          {104, 0x37},
1238          {98, 0x37},
1239          {110, 0x36},
1240          {104, 0x36},
1241          {98, 0x36},
1242          {110, 0x35},
1243          {104, 0x35},
1244          {98, 0x35},
1245          {110, 0x34},
1246          {104, 0x34},
1247          {98, 0x34},
1248          {110, 0x33},
1249          {104, 0x33},
1250          {98, 0x33},
1251          {110, 0x32},
1252          {104, 0x32},
1253          {98, 0x32},
1254          {110, 0x31},
1255          {104, 0x31},
1256          {98, 0x31},
1257          {110, 0x30},
1258          {104, 0x30},
1259          {98, 0x30},
1260          {110, 0x6},
1261          {104, 0x6},
1262          {98, 0x6},
1263          {110, 0x5},
1264          {104, 0x5},
1265          {98, 0x5},
1266          {110, 0x4},
1267          {104, 0x4},
1268          {98, 0x4},
1269          {110, 0x3},
1270          {104, 0x3},
1271          {98, 0x3},
1272          {110, 0x2},
1273          {104, 0x2},
1274          {98, 0x2},
1275          {110, 0x1},
1276          {104, 0x1},
1277          {98, 0x1},
1278          {110, 0x0},
1279          {104, 0x0},
1280          {98, 0x0},
1281          {97, 0},
1282          {96, 0},
1283          {95, 0},
1284          {94, 0},
1285          {93, 0},
1286          {92, 0},
1287          {91, 0},
1288          {90, 0},
1289          {89, 0},
1290          {88, 0},
1291          {87, 0},
1292          {86, 0},
1293          {85, 0},
1294          {84, 0},
1295          {83, 0},
1296          {82, 0},
1297          {81, 0},
1298          {80, 0},
1299          {79, 0},
1300          {78, 0},
1301          {77, 0},
1302          {76, 0},
1303          {75, 0},
1304          {74, 0},
1305          {73, 0},
1306          {72, 0},
1307          {71, 0},
1308          {70, 0},
1309          {69, 0},
1310          {68, 0},
1311          {67, 0},
1312          {66, 0},
1313          {65, 0},
1314          {64, 0},
1315          {63, 0},
1316          {62, 0},
1317          {61, 0},
1318          {60, 0},
1319          {59, 0},
1320          }
1321 };
1322
1323 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1324                                     u8 is_fat, u8 ctrl_chan_high,
1325                                     struct iwl4965_tx_power_db *tx_power_tbl)
1326 {
1327         u8 saturation_power;
1328         s32 target_power;
1329         s32 user_target_power;
1330         s32 power_limit;
1331         s32 current_temp;
1332         s32 reg_limit;
1333         s32 current_regulatory;
1334         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1335         int i;
1336         int c;
1337         const struct iwl_channel_info *ch_info = NULL;
1338         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1339         const struct iwl_eeprom_calib_measure *measurement;
1340         s16 voltage;
1341         s32 init_voltage;
1342         s32 voltage_compensation;
1343         s32 degrees_per_05db_num;
1344         s32 degrees_per_05db_denom;
1345         s32 factory_temp;
1346         s32 temperature_comp[2];
1347         s32 factory_gain_index[2];
1348         s32 factory_actual_pwr[2];
1349         s32 power_index;
1350
1351         /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1352          *   are used for indexing into txpower table) */
1353         user_target_power = 2 * priv->tx_power_user_lmt;
1354
1355         /* Get current (RXON) channel, band, width */
1356         IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1357                           is_fat);
1358
1359         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1360
1361         if (!is_channel_valid(ch_info))
1362                 return -EINVAL;
1363
1364         /* get txatten group, used to select 1) thermal txpower adjustment
1365          *   and 2) mimo txpower balance between Tx chains. */
1366         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1367         if (txatten_grp < 0)
1368                 return -EINVAL;
1369
1370         IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1371                           channel, txatten_grp);
1372
1373         if (is_fat) {
1374                 if (ctrl_chan_high)
1375                         channel -= 2;
1376                 else
1377                         channel += 2;
1378         }
1379
1380         /* hardware txpower limits ...
1381          * saturation (clipping distortion) txpowers are in half-dBm */
1382         if (band)
1383                 saturation_power = priv->calib_info->saturation_power24;
1384         else
1385                 saturation_power = priv->calib_info->saturation_power52;
1386
1387         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1388             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1389                 if (band)
1390                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1391                 else
1392                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1393         }
1394
1395         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1396          *   max_power_avg values are in dBm, convert * 2 */
1397         if (is_fat)
1398                 reg_limit = ch_info->fat_max_power_avg * 2;
1399         else
1400                 reg_limit = ch_info->max_power_avg * 2;
1401
1402         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1403             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1404                 if (band)
1405                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1406                 else
1407                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1408         }
1409
1410         /* Interpolate txpower calibration values for this channel,
1411          *   based on factory calibration tests on spaced channels. */
1412         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1413
1414         /* calculate tx gain adjustment based on power supply voltage */
1415         voltage = priv->calib_info->voltage;
1416         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1417         voltage_compensation =
1418             iwl4965_get_voltage_compensation(voltage, init_voltage);
1419
1420         IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1421                           init_voltage,
1422                           voltage, voltage_compensation);
1423
1424         /* get current temperature (Celsius) */
1425         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1426         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1427         current_temp = KELVIN_TO_CELSIUS(current_temp);
1428
1429         /* select thermal txpower adjustment params, based on channel group
1430          *   (same frequency group used for mimo txatten adjustment) */
1431         degrees_per_05db_num =
1432             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1433         degrees_per_05db_denom =
1434             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1435
1436         /* get per-chain txpower values from factory measurements */
1437         for (c = 0; c < 2; c++) {
1438                 measurement = &ch_eeprom_info.measurements[c][1];
1439
1440                 /* txgain adjustment (in half-dB steps) based on difference
1441                  *   between factory and current temperature */
1442                 factory_temp = measurement->temperature;
1443                 iwl4965_math_div_round((current_temp - factory_temp) *
1444                                        degrees_per_05db_denom,
1445                                        degrees_per_05db_num,
1446                                        &temperature_comp[c]);
1447
1448                 factory_gain_index[c] = measurement->gain_idx;
1449                 factory_actual_pwr[c] = measurement->actual_pow;
1450
1451                 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1452                 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1453                                   "curr tmp %d, comp %d steps\n",
1454                                   factory_temp, current_temp,
1455                                   temperature_comp[c]);
1456
1457                 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1458                                   factory_gain_index[c],
1459                                   factory_actual_pwr[c]);
1460         }
1461
1462         /* for each of 33 bit-rates (including 1 for CCK) */
1463         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1464                 u8 is_mimo_rate;
1465                 union iwl4965_tx_power_dual_stream tx_power;
1466
1467                 /* for mimo, reduce each chain's txpower by half
1468                  * (3dB, 6 steps), so total output power is regulatory
1469                  * compliant. */
1470                 if (i & 0x8) {
1471                         current_regulatory = reg_limit -
1472                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1473                         is_mimo_rate = 1;
1474                 } else {
1475                         current_regulatory = reg_limit;
1476                         is_mimo_rate = 0;
1477                 }
1478
1479                 /* find txpower limit, either hardware or regulatory */
1480                 power_limit = saturation_power - back_off_table[i];
1481                 if (power_limit > current_regulatory)
1482                         power_limit = current_regulatory;
1483
1484                 /* reduce user's txpower request if necessary
1485                  * for this rate on this channel */
1486                 target_power = user_target_power;
1487                 if (target_power > power_limit)
1488                         target_power = power_limit;
1489
1490                 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1491                                   i, saturation_power - back_off_table[i],
1492                                   current_regulatory, user_target_power,
1493                                   target_power);
1494
1495                 /* for each of 2 Tx chains (radio transmitters) */
1496                 for (c = 0; c < 2; c++) {
1497                         s32 atten_value;
1498
1499                         if (is_mimo_rate)
1500                                 atten_value =
1501                                     (s32)le32_to_cpu(priv->card_alive_init.
1502                                     tx_atten[txatten_grp][c]);
1503                         else
1504                                 atten_value = 0;
1505
1506                         /* calculate index; higher index means lower txpower */
1507                         power_index = (u8) (factory_gain_index[c] -
1508                                             (target_power -
1509                                              factory_actual_pwr[c]) -
1510                                             temperature_comp[c] -
1511                                             voltage_compensation +
1512                                             atten_value);
1513
1514 /*                      IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1515                                                 power_index); */
1516
1517                         if (power_index < get_min_power_index(i, band))
1518                                 power_index = get_min_power_index(i, band);
1519
1520                         /* adjust 5 GHz index to support negative indexes */
1521                         if (!band)
1522                                 power_index += 9;
1523
1524                         /* CCK, rate 32, reduce txpower for CCK */
1525                         if (i == POWER_TABLE_CCK_ENTRY)
1526                                 power_index +=
1527                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1528
1529                         /* stay within the table! */
1530                         if (power_index > 107) {
1531                                 IWL_WARNING("txpower index %d > 107\n",
1532                                             power_index);
1533                                 power_index = 107;
1534                         }
1535                         if (power_index < 0) {
1536                                 IWL_WARNING("txpower index %d < 0\n",
1537                                             power_index);
1538                                 power_index = 0;
1539                         }
1540
1541                         /* fill txpower command for this rate/chain */
1542                         tx_power.s.radio_tx_gain[c] =
1543                                 gain_table[band][power_index].radio;
1544                         tx_power.s.dsp_predis_atten[c] =
1545                                 gain_table[band][power_index].dsp;
1546
1547                         IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1548                                           "gain 0x%02x dsp %d\n",
1549                                           c, atten_value, power_index,
1550                                         tx_power.s.radio_tx_gain[c],
1551                                         tx_power.s.dsp_predis_atten[c]);
1552                 }/* for each chain */
1553
1554                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1555
1556         }/* for each rate */
1557
1558         return 0;
1559 }
1560
1561 /**
1562  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1563  *
1564  * Uses the active RXON for channel, band, and characteristics (fat, high)
1565  * The power limit is taken from priv->tx_power_user_lmt.
1566  */
1567 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1568 {
1569         struct iwl4965_txpowertable_cmd cmd = { 0 };
1570         int ret;
1571         u8 band = 0;
1572         u8 is_fat = 0;
1573         u8 ctrl_chan_high = 0;
1574
1575         if (test_bit(STATUS_SCANNING, &priv->status)) {
1576                 /* If this gets hit a lot, switch it to a BUG() and catch
1577                  * the stack trace to find out who is calling this during
1578                  * a scan. */
1579                 IWL_WARNING("TX Power requested while scanning!\n");
1580                 return -EAGAIN;
1581         }
1582
1583         band = priv->band == IEEE80211_BAND_2GHZ;
1584
1585         is_fat =  is_fat_channel(priv->active_rxon.flags);
1586
1587         if (is_fat &&
1588             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1589                 ctrl_chan_high = 1;
1590
1591         cmd.band = band;
1592         cmd.channel = priv->active_rxon.channel;
1593
1594         ret = iwl4965_fill_txpower_tbl(priv, band,
1595                                 le16_to_cpu(priv->active_rxon.channel),
1596                                 is_fat, ctrl_chan_high, &cmd.tx_power);
1597         if (ret)
1598                 goto out;
1599
1600         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1601
1602 out:
1603         return ret;
1604 }
1605
1606 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1607 {
1608         int ret = 0;
1609         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1610         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1611         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1612
1613         if ((rxon1->flags == rxon2->flags) &&
1614             (rxon1->filter_flags == rxon2->filter_flags) &&
1615             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1616             (rxon1->ofdm_ht_single_stream_basic_rates ==
1617              rxon2->ofdm_ht_single_stream_basic_rates) &&
1618             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1619              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1620             (rxon1->rx_chain == rxon2->rx_chain) &&
1621             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1622                 IWL_DEBUG_INFO("Using current RXON_ASSOC.  Not resending.\n");
1623                 return 0;
1624         }
1625
1626         rxon_assoc.flags = priv->staging_rxon.flags;
1627         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1628         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1629         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1630         rxon_assoc.reserved = 0;
1631         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1632             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1633         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1634             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1635         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1636
1637         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1638                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1639         if (ret)
1640                 return ret;
1641
1642         return ret;
1643 }
1644
1645
1646 int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1647 {
1648         int rc;
1649         u8 band = 0;
1650         u8 is_fat = 0;
1651         u8 ctrl_chan_high = 0;
1652         struct iwl4965_channel_switch_cmd cmd = { 0 };
1653         const struct iwl_channel_info *ch_info;
1654
1655         band = priv->band == IEEE80211_BAND_2GHZ;
1656
1657         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1658
1659         is_fat = is_fat_channel(priv->staging_rxon.flags);
1660
1661         if (is_fat &&
1662             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1663                 ctrl_chan_high = 1;
1664
1665         cmd.band = band;
1666         cmd.expect_beacon = 0;
1667         cmd.channel = cpu_to_le16(channel);
1668         cmd.rxon_flags = priv->active_rxon.flags;
1669         cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1670         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1671         if (ch_info)
1672                 cmd.expect_beacon = is_channel_radar(ch_info);
1673         else
1674                 cmd.expect_beacon = 1;
1675
1676         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1677                                       ctrl_chan_high, &cmd.tx_power);
1678         if (rc) {
1679                 IWL_DEBUG_11H("error:%d  fill txpower_tbl\n", rc);
1680                 return rc;
1681         }
1682
1683         rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1684         return rc;
1685 }
1686
1687 static int iwl4965_shared_mem_rx_idx(struct iwl_priv *priv)
1688 {
1689         struct iwl4965_shared *s = priv->shared_virt;
1690         return le32_to_cpu(s->rb_closed) & 0xFFF;
1691 }
1692
1693 unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
1694                           struct iwl_frame *frame, u8 rate)
1695 {
1696         struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
1697         unsigned int frame_size;
1698
1699         tx_beacon_cmd = &frame->u.beacon;
1700         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
1701
1702         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
1703         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1704
1705         frame_size = iwl4965_fill_beacon_frame(priv,
1706                                 tx_beacon_cmd->frame,
1707                                 iwl_bcast_addr,
1708                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
1709
1710         BUG_ON(frame_size > MAX_MPDU_SIZE);
1711         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
1712
1713         if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
1714                 tx_beacon_cmd->tx.rate_n_flags =
1715                         iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
1716         else
1717                 tx_beacon_cmd->tx.rate_n_flags =
1718                         iwl_hw_set_rate_n_flags(rate, 0);
1719
1720         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
1721                                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
1722         return (sizeof(*tx_beacon_cmd) + frame_size);
1723 }
1724
1725 static int iwl4965_alloc_shared_mem(struct iwl_priv *priv)
1726 {
1727         priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
1728                                         sizeof(struct iwl4965_shared),
1729                                         &priv->shared_phys);
1730         if (!priv->shared_virt)
1731                 return -ENOMEM;
1732
1733         memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
1734
1735         priv->rb_closed_offset = offsetof(struct iwl4965_shared, rb_closed);
1736
1737         return 0;
1738 }
1739
1740 static void iwl4965_free_shared_mem(struct iwl_priv *priv)
1741 {
1742         if (priv->shared_virt)
1743                 pci_free_consistent(priv->pci_dev,
1744                                     sizeof(struct iwl4965_shared),
1745                                     priv->shared_virt,
1746                                     priv->shared_phys);
1747 }
1748
1749 /**
1750  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1751  */
1752 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1753                                             struct iwl_tx_queue *txq,
1754                                             u16 byte_cnt)
1755 {
1756         int len;
1757         int txq_id = txq->q.id;
1758         struct iwl4965_shared *shared_data = priv->shared_virt;
1759
1760         len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1761
1762         /* Set up byte count within first 256 entries */
1763         IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
1764                        tfd_offset[txq->q.write_ptr], byte_cnt, len);
1765
1766         /* If within first 64 entries, duplicate at end */
1767         if (txq->q.write_ptr < IWL49_MAX_WIN_SIZE)
1768                 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
1769                         tfd_offset[IWL49_QUEUE_SIZE + txq->q.write_ptr],
1770                         byte_cnt, len);
1771 }
1772
1773 /**
1774  * sign_extend - Sign extend a value using specified bit as sign-bit
1775  *
1776  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1777  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1778  *
1779  * @param oper value to sign extend
1780  * @param index 0 based bit index (0<=index<32) to sign bit
1781  */
1782 static s32 sign_extend(u32 oper, int index)
1783 {
1784         u8 shift = 31 - index;
1785
1786         return (s32)(oper << shift) >> shift;
1787 }
1788
1789 /**
1790  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1791  * @statistics: Provides the temperature reading from the uCode
1792  *
1793  * A return of <0 indicates bogus data in the statistics
1794  */
1795 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv)
1796 {
1797         s32 temperature;
1798         s32 vt;
1799         s32 R1, R2, R3;
1800         u32 R4;
1801
1802         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1803                 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1804                 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1805                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1806                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1807                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1808                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1809         } else {
1810                 IWL_DEBUG_TEMP("Running temperature calibration\n");
1811                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1812                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1813                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1814                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1815         }
1816
1817         /*
1818          * Temperature is only 23 bits, so sign extend out to 32.
1819          *
1820          * NOTE If we haven't received a statistics notification yet
1821          * with an updated temperature, use R4 provided to us in the
1822          * "initialize" ALIVE response.
1823          */
1824         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1825                 vt = sign_extend(R4, 23);
1826         else
1827                 vt = sign_extend(
1828                         le32_to_cpu(priv->statistics.general.temperature), 23);
1829
1830         IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1831
1832         if (R3 == R1) {
1833                 IWL_ERROR("Calibration conflict R1 == R3\n");
1834                 return -1;
1835         }
1836
1837         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1838          * Add offset to center the adjustment around 0 degrees Centigrade. */
1839         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1840         temperature /= (R3 - R1);
1841         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1842
1843         IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n",
1844                         temperature, KELVIN_TO_CELSIUS(temperature));
1845
1846         return temperature;
1847 }
1848
1849 /* Adjust Txpower only if temperature variance is greater than threshold. */
1850 #define IWL_TEMPERATURE_THRESHOLD   3
1851
1852 /**
1853  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1854  *
1855  * If the temperature changed has changed sufficiently, then a recalibration
1856  * is needed.
1857  *
1858  * Assumes caller will replace priv->last_temperature once calibration
1859  * executed.
1860  */
1861 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1862 {
1863         int temp_diff;
1864
1865         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1866                 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
1867                 return 0;
1868         }
1869
1870         temp_diff = priv->temperature - priv->last_temperature;
1871
1872         /* get absolute value */
1873         if (temp_diff < 0) {
1874                 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
1875                 temp_diff = -temp_diff;
1876         } else if (temp_diff == 0)
1877                 IWL_DEBUG_POWER("Same temp, \n");
1878         else
1879                 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
1880
1881         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1882                 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
1883                 return 0;
1884         }
1885
1886         IWL_DEBUG_POWER("Thermal txpower calib needed\n");
1887
1888         return 1;
1889 }
1890
1891 static void iwl4965_temperature_calib(struct iwl_priv *priv,
1892                                       struct iwl_notif_statistics *stats)
1893 {
1894         s32 temp;
1895         int change = ((priv->statistics.general.temperature !=
1896                    stats->general.temperature) ||
1897                   ((priv->statistics.flag &
1898                     STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
1899                    (stats->flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
1900
1901         /* If the hardware hasn't reported a change in
1902          * temperature then don't bother computing a
1903          * calibrated temperature value */
1904         if (!change)
1905                 return;
1906
1907         temp = iwl4965_hw_get_temperature(priv);
1908         if (temp < 0)
1909                 return;
1910
1911         if (priv->temperature != temp) {
1912                 if (priv->temperature)
1913                         IWL_DEBUG_TEMP("Temperature changed "
1914                                        "from %dC to %dC\n",
1915                                        KELVIN_TO_CELSIUS(priv->temperature),
1916                                        KELVIN_TO_CELSIUS(temp));
1917                 else
1918                         IWL_DEBUG_TEMP("Temperature "
1919                                        "initialized to %dC\n",
1920                                        KELVIN_TO_CELSIUS(temp));
1921         }
1922
1923         priv->temperature = temp;
1924         set_bit(STATUS_TEMPERATURE, &priv->status);
1925
1926         if (!priv->disable_tx_power_cal &&
1927              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1928              iwl4965_is_temp_calib_needed(priv))
1929                 queue_work(priv->workqueue, &priv->txpower_work);
1930 }
1931
1932 /**
1933  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1934  */
1935 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1936                                             u16 txq_id)
1937 {
1938         /* Simply stop the queue, but don't change any configuration;
1939          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1940         iwl_write_prph(priv,
1941                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1942                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1943                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1944 }
1945
1946 /**
1947  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1948  * priv->lock must be held by the caller
1949  */
1950 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1951                                    u16 ssn_idx, u8 tx_fifo)
1952 {
1953         int ret = 0;
1954
1955         if (IWL49_FIRST_AMPDU_QUEUE > txq_id) {
1956                 IWL_WARNING("queue number too small: %d, must be > %d\n",
1957                                 txq_id, IWL49_FIRST_AMPDU_QUEUE);
1958                 return -EINVAL;
1959         }
1960
1961         ret = iwl_grab_nic_access(priv);
1962         if (ret)
1963                 return ret;
1964
1965         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1966
1967         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1968
1969         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1970         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1971         /* supposes that ssn_idx is valid (!= 0xFFF) */
1972         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1973
1974         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1975         iwl_txq_ctx_deactivate(priv, txq_id);
1976         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1977
1978         iwl_release_nic_access(priv);
1979
1980         return 0;
1981 }
1982
1983 /**
1984  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1985  */
1986 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1987                                         u16 txq_id)
1988 {
1989         u32 tbl_dw_addr;
1990         u32 tbl_dw;
1991         u16 scd_q2ratid;
1992
1993         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1994
1995         tbl_dw_addr = priv->scd_base_addr +
1996                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1997
1998         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1999
2000         if (txq_id & 0x1)
2001                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
2002         else
2003                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
2004
2005         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
2006
2007         return 0;
2008 }
2009
2010
2011 /**
2012  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
2013  *
2014  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
2015  *        i.e. it must be one of the higher queues used for aggregation
2016  */
2017 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
2018                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
2019 {
2020         unsigned long flags;
2021         int ret;
2022         u16 ra_tid;
2023
2024         if (IWL49_FIRST_AMPDU_QUEUE > txq_id)
2025                 IWL_WARNING("queue number too small: %d, must be > %d\n",
2026                         txq_id, IWL49_FIRST_AMPDU_QUEUE);
2027
2028         ra_tid = BUILD_RAxTID(sta_id, tid);
2029
2030         /* Modify device's station table to Tx this TID */
2031         iwl_sta_modify_enable_tid_tx(priv, sta_id, tid);
2032
2033         spin_lock_irqsave(&priv->lock, flags);
2034         ret = iwl_grab_nic_access(priv);
2035         if (ret) {
2036                 spin_unlock_irqrestore(&priv->lock, flags);
2037                 return ret;
2038         }
2039
2040         /* Stop this Tx queue before configuring it */
2041         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
2042
2043         /* Map receiver-address / traffic-ID to this queue */
2044         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
2045
2046         /* Set this queue as a chain-building queue */
2047         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
2048
2049         /* Place first TFD at index corresponding to start sequence number.
2050          * Assumes that ssn_idx is valid (!= 0xFFF) */
2051         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
2052         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
2053         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
2054
2055         /* Set up Tx window size and frame limit for this queue */
2056         iwl_write_targ_mem(priv,
2057                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
2058                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
2059                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
2060
2061         iwl_write_targ_mem(priv, priv->scd_base_addr +
2062                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
2063                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
2064                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
2065
2066         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
2067
2068         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
2069         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
2070
2071         iwl_release_nic_access(priv);
2072         spin_unlock_irqrestore(&priv->lock, flags);
2073
2074         return 0;
2075 }
2076
2077 static int iwl4965_rx_agg_start(struct iwl_priv *priv,
2078                                 const u8 *addr, int tid, u16 ssn)
2079 {
2080         unsigned long flags;
2081         int sta_id;
2082
2083         sta_id = iwl_find_station(priv, addr);
2084         if (sta_id == IWL_INVALID_STATION)
2085                 return -ENXIO;
2086
2087         spin_lock_irqsave(&priv->sta_lock, flags);
2088         priv->stations[sta_id].sta.station_flags_msk = 0;
2089         priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
2090         priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
2091         priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
2092         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2093         spin_unlock_irqrestore(&priv->sta_lock, flags);
2094
2095         return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
2096                                         CMD_ASYNC);
2097 }
2098
2099 static int iwl4965_rx_agg_stop(struct iwl_priv *priv,
2100                                const u8 *addr, int tid)
2101 {
2102         unsigned long flags;
2103         int sta_id;
2104
2105         sta_id = iwl_find_station(priv, addr);
2106         if (sta_id == IWL_INVALID_STATION)
2107                 return -ENXIO;
2108
2109         spin_lock_irqsave(&priv->sta_lock, flags);
2110         priv->stations[sta_id].sta.station_flags_msk = 0;
2111         priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
2112         priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
2113         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2114         spin_unlock_irqrestore(&priv->sta_lock, flags);
2115
2116         return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
2117                                         CMD_ASYNC);
2118 }
2119
2120 int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
2121                              enum ieee80211_ampdu_mlme_action action,
2122                              const u8 *addr, u16 tid, u16 *ssn)
2123 {
2124         struct iwl_priv *priv = hw->priv;
2125         DECLARE_MAC_BUF(mac);
2126
2127         IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
2128                      print_mac(mac, addr), tid);
2129
2130         switch (action) {
2131         case IEEE80211_AMPDU_RX_START:
2132                 IWL_DEBUG_HT("start Rx\n");
2133                 return iwl4965_rx_agg_start(priv, addr, tid, *ssn);
2134         case IEEE80211_AMPDU_RX_STOP:
2135                 IWL_DEBUG_HT("stop Rx\n");
2136                 return iwl4965_rx_agg_stop(priv, addr, tid);
2137         case IEEE80211_AMPDU_TX_START:
2138                 IWL_DEBUG_HT("start Tx\n");
2139                 return iwl_tx_agg_start(priv, addr, tid, ssn);
2140         case IEEE80211_AMPDU_TX_STOP:
2141                 IWL_DEBUG_HT("stop Tx\n");
2142                 return iwl_tx_agg_stop(priv, addr, tid);
2143         default:
2144                 IWL_DEBUG_HT("unknown\n");
2145                 return -EINVAL;
2146                 break;
2147         }
2148         return 0;
2149 }
2150
2151 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
2152 {
2153         switch (cmd_id) {
2154         case REPLY_RXON:
2155                 return (u16) sizeof(struct iwl4965_rxon_cmd);
2156         default:
2157                 return len;
2158         }
2159 }
2160
2161 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
2162 {
2163         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
2164         addsta->mode = cmd->mode;
2165         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
2166         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
2167         addsta->station_flags = cmd->station_flags;
2168         addsta->station_flags_msk = cmd->station_flags_msk;
2169         addsta->tid_disable_tx = cmd->tid_disable_tx;
2170         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
2171         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
2172         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
2173         addsta->reserved1 = __constant_cpu_to_le16(0);
2174         addsta->reserved2 = __constant_cpu_to_le32(0);
2175
2176         return (u16)sizeof(struct iwl4965_addsta_cmd);
2177 }
2178
2179 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
2180 {
2181         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
2182 }
2183
2184 /**
2185  * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
2186  */
2187 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
2188                                       struct iwl_ht_agg *agg,
2189                                       struct iwl4965_tx_resp *tx_resp,
2190                                       int txq_id, u16 start_idx)
2191 {
2192         u16 status;
2193         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
2194         struct ieee80211_tx_info *info = NULL;
2195         struct ieee80211_hdr *hdr = NULL;
2196         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
2197         int i, sh, idx;
2198         u16 seq;
2199         if (agg->wait_for_ba)
2200                 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
2201
2202         agg->frame_count = tx_resp->frame_count;
2203         agg->start_idx = start_idx;
2204         agg->rate_n_flags = rate_n_flags;
2205         agg->bitmap = 0;
2206
2207         /* # frames attempted by Tx command */
2208         if (agg->frame_count == 1) {
2209                 /* Only one frame was attempted; no block-ack will arrive */
2210                 status = le16_to_cpu(frame_status[0].status);
2211                 idx = start_idx;
2212
2213                 /* FIXME: code repetition */
2214                 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2215                                    agg->frame_count, agg->start_idx, idx);
2216
2217                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
2218                 info->status.retry_count = tx_resp->failure_frame;
2219                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
2220                 info->flags |= iwl_is_tx_success(status)?
2221                         IEEE80211_TX_STAT_ACK : 0;
2222                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
2223                 /* FIXME: code repetition end */
2224
2225                 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2226                                     status & 0xff, tx_resp->failure_frame);
2227                 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
2228
2229                 agg->wait_for_ba = 0;
2230         } else {
2231                 /* Two or more frames were attempted; expect block-ack */
2232                 u64 bitmap = 0;
2233                 int start = agg->start_idx;
2234
2235                 /* Construct bit-map of pending frames within Tx window */
2236                 for (i = 0; i < agg->frame_count; i++) {
2237                         u16 sc;
2238                         status = le16_to_cpu(frame_status[i].status);
2239                         seq  = le16_to_cpu(frame_status[i].sequence);
2240                         idx = SEQ_TO_INDEX(seq);
2241                         txq_id = SEQ_TO_QUEUE(seq);
2242
2243                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2244                                       AGG_TX_STATE_ABORT_MSK))
2245                                 continue;
2246
2247                         IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2248                                            agg->frame_count, txq_id, idx);
2249
2250                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2251
2252                         sc = le16_to_cpu(hdr->seq_ctrl);
2253                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2254                                 IWL_ERROR("BUG_ON idx doesn't match seq control"
2255                                           " idx=%d, seq_idx=%d, seq=%d\n",
2256                                           idx, SEQ_TO_SN(sc),
2257                                           hdr->seq_ctrl);
2258                                 return -1;
2259                         }
2260
2261                         IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2262                                            i, idx, SEQ_TO_SN(sc));
2263
2264                         sh = idx - start;
2265                         if (sh > 64) {
2266                                 sh = (start - idx) + 0xff;
2267                                 bitmap = bitmap << sh;
2268                                 sh = 0;
2269                                 start = idx;
2270                         } else if (sh < -64)
2271                                 sh  = 0xff - (start - idx);
2272                         else if (sh < 0) {
2273                                 sh = start - idx;
2274                                 start = idx;
2275                                 bitmap = bitmap << sh;
2276                                 sh = 0;
2277                         }
2278                         bitmap |= (1 << sh);
2279                         IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
2280                                            start, (u32)(bitmap & 0xFFFFFFFF));
2281                 }
2282
2283                 agg->bitmap = bitmap;
2284                 agg->start_idx = start;
2285                 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2286                                    agg->frame_count, agg->start_idx,
2287                                    (unsigned long long)agg->bitmap);
2288
2289                 if (bitmap)
2290                         agg->wait_for_ba = 1;
2291         }
2292         return 0;
2293 }
2294
2295 /**
2296  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2297  */
2298 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2299                                 struct iwl_rx_mem_buffer *rxb)
2300 {
2301         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2302         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2303         int txq_id = SEQ_TO_QUEUE(sequence);
2304         int index = SEQ_TO_INDEX(sequence);
2305         struct iwl_tx_queue *txq = &priv->txq[txq_id];
2306         struct ieee80211_tx_info *info;
2307         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2308         u32  status = le32_to_cpu(tx_resp->u.status);
2309         int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
2310         __le16 fc;
2311         struct ieee80211_hdr *hdr;
2312         u8 *qc = NULL;
2313
2314         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2315                 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
2316                           "is out of range [0-%d] %d %d\n", txq_id,
2317                           index, txq->q.n_bd, txq->q.write_ptr,
2318                           txq->q.read_ptr);
2319                 return;
2320         }
2321
2322         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2323         memset(&info->status, 0, sizeof(info->status));
2324
2325         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2326         fc = hdr->frame_control;
2327         if (ieee80211_is_data_qos(fc)) {
2328                 qc = ieee80211_get_qos_ctl(hdr);
2329                 tid = qc[0] & 0xf;
2330         }
2331
2332         sta_id = iwl_get_ra_sta_id(priv, hdr);
2333         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2334                 IWL_ERROR("Station not known\n");
2335                 return;
2336         }
2337
2338         if (txq->sched_retry) {
2339                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2340                 struct iwl_ht_agg *agg = NULL;
2341
2342                 if (!qc)
2343                         return;
2344
2345                 agg = &priv->stations[sta_id].tid[tid].agg;
2346
2347                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2348
2349                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status)) {
2350                         /* TODO: send BAR */
2351                 }
2352
2353                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2354                         int freed, ampdu_q;
2355                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2356                         IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2357                                            "%d index %d\n", scd_ssn , index);
2358                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2359                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2360
2361                         if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
2362                             txq_id >= 0 && priv->mac80211_registered &&
2363                             agg->state != IWL_EMPTYING_HW_QUEUE_DELBA) {
2364                                 /* calculate mac80211 ampdu sw queue to wake */
2365                                 ampdu_q = txq_id - IWL49_FIRST_AMPDU_QUEUE +
2366                                           priv->hw->queues;
2367                                 if (agg->state == IWL_AGG_OFF)
2368                                         ieee80211_wake_queue(priv->hw, txq_id);
2369                                 else
2370                                         ieee80211_wake_queue(priv->hw, ampdu_q);
2371                         }
2372                         iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2373                 }
2374         } else {
2375                 info->status.retry_count = tx_resp->failure_frame;
2376                 info->flags |=
2377                         iwl_is_tx_success(status) ? IEEE80211_TX_STAT_ACK : 0;
2378                 iwl_hwrate_to_tx_control(priv,
2379                                         le32_to_cpu(tx_resp->rate_n_flags),
2380                                         info);
2381
2382                 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags "
2383                              "0x%x retries %d\n", txq_id,
2384                                 iwl_get_tx_fail_reason(status),
2385                                 status, le32_to_cpu(tx_resp->rate_n_flags),
2386                                 tx_resp->failure_frame);
2387
2388                 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
2389
2390                 if (index != -1) {
2391                     int freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2392                     if (tid != MAX_TID_COUNT)
2393                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2394                     if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
2395                         (txq_id >= 0) && priv->mac80211_registered)
2396                         ieee80211_wake_queue(priv->hw, txq_id);
2397                     if (tid != MAX_TID_COUNT)
2398                         iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2399                 }
2400         }
2401
2402         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2403                 IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
2404 }
2405
2406
2407 /* Set up 4965-specific Rx frame reply handlers */
2408 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2409 {
2410         /* Legacy Rx frames */
2411         priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2412         /* Tx response */
2413         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2414 }
2415
2416 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2417 {
2418         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2419 }
2420
2421 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2422 {
2423         cancel_work_sync(&priv->txpower_work);
2424 }
2425
2426
2427 static struct iwl_hcmd_ops iwl4965_hcmd = {
2428         .rxon_assoc = iwl4965_send_rxon_assoc,
2429 };
2430
2431 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2432         .get_hcmd_size = iwl4965_get_hcmd_size,
2433         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2434         .chain_noise_reset = iwl4965_chain_noise_reset,
2435         .gain_computation = iwl4965_gain_computation,
2436 };
2437
2438 static struct iwl_lib_ops iwl4965_lib = {
2439         .set_hw_params = iwl4965_hw_set_hw_params,
2440         .alloc_shared_mem = iwl4965_alloc_shared_mem,
2441         .free_shared_mem = iwl4965_free_shared_mem,
2442         .shared_mem_rx_idx = iwl4965_shared_mem_rx_idx,
2443         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2444         .txq_set_sched = iwl4965_txq_set_sched,
2445         .txq_agg_enable = iwl4965_txq_agg_enable,
2446         .txq_agg_disable = iwl4965_txq_agg_disable,
2447         .rx_handler_setup = iwl4965_rx_handler_setup,
2448         .setup_deferred_work = iwl4965_setup_deferred_work,
2449         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2450         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2451         .alive_notify = iwl4965_alive_notify,
2452         .init_alive_start = iwl4965_init_alive_start,
2453         .load_ucode = iwl4965_load_bsm,
2454         .apm_ops = {
2455                 .init = iwl4965_apm_init,
2456                 .reset = iwl4965_apm_reset,
2457                 .stop = iwl4965_apm_stop,
2458                 .config = iwl4965_nic_config,
2459                 .set_pwr_src = iwl4965_set_pwr_src,
2460         },
2461         .eeprom_ops = {
2462                 .regulatory_bands = {
2463                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2464                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2465                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2466                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2467                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2468                         EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
2469                         EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2470                 },
2471                 .verify_signature  = iwlcore_eeprom_verify_signature,
2472                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2473                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2474                 .check_version = iwl4965_eeprom_check_version,
2475                 .query_addr = iwlcore_eeprom_query_addr,
2476         },
2477         .set_power = iwl4965_set_power,
2478         .send_tx_power  = iwl4965_send_tx_power,
2479         .update_chain_flags = iwl4965_update_chain_flags,
2480         .temperature = iwl4965_temperature_calib,
2481 };
2482
2483 static struct iwl_ops iwl4965_ops = {
2484         .lib = &iwl4965_lib,
2485         .hcmd = &iwl4965_hcmd,
2486         .utils = &iwl4965_hcmd_utils,
2487 };
2488
2489 struct iwl_cfg iwl4965_agn_cfg = {
2490         .name = "4965AGN",
2491         .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
2492         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2493         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2494         .ops = &iwl4965_ops,
2495         .mod_params = &iwl4965_mod_params,
2496 };
2497
2498 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
2499 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2500 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
2501 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
2502 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
2503 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n");
2504 module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
2505 MODULE_PARM_DESC(debug, "debug output mask");
2506 module_param_named(
2507         disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
2508 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2509
2510 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
2511 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2512
2513 /* QoS */
2514 module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
2515 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
2516 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
2517 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2518 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
2519 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");