err.no Git - linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/version.h>
  30 #include <linux/init.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <linux/firmware.h>
  38 #include <linux/etherdevice.h>
  39 #include <asm/unaligned.h>
  40 #include <net/mac80211.h>
  41
  42 #include "iwl-3945.h"
  43 #include "iwl-helpers.h"
  44 #include "iwl-3945-rs.h"
  45
  46 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  47         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  48                                     IWL_RATE_##r##M_IEEE,   \
  49                                     IWL_RATE_##ip##M_INDEX, \
  50                                     IWL_RATE_##in##M_INDEX, \
  51                                     IWL_RATE_##rp##M_INDEX, \
  52                                     IWL_RATE_##rn##M_INDEX, \
  53                                     IWL_RATE_##pp##M_INDEX, \
  54                                     IWL_RATE_##np##M_INDEX, \
  55                                     IWL_RATE_##r##M_INDEX_TABLE, \
  56                                     IWL_RATE_##ip##M_INDEX_TABLE }
  57
  58 /*
  59  * Parameter order:
  60  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  61  *
  62  * If there isn't a valid next or previous rate then INV is used which
  63  * maps to IWL_RATE_INVALID
  64  *
  65  */
  66 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
  67         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  68         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  69         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  70         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  71         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  72         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  73         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  74         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  75         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  76         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  77         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  78         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  79 };
  80
  81 /* 1 = enable the iwl3945_disable_events() function */
  82 #define IWL_EVT_DISABLE (0)
  83 #define IWL_EVT_DISABLE_SIZE (1532/32)
  84
  85 /**
  86  * iwl3945_disable_events - Disable selected events in uCode event log
  87  *
  88  * Disable an event by writing "1"s into "disable"
  89  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
  90  *   Default values of 0 enable uCode events to be logged.
  91  * Use for only special debugging.  This function is just a placeholder as-is,
  92  *   you'll need to provide the special bits! ...
  93  *   ... and set IWL_EVT_DISABLE to 1. */
  94 void iwl3945_disable_events(struct iwl3945_priv *priv)
  95 {
  96         int ret;
  97         int i;
  98         u32 base;               /* SRAM address of event log header */
  99         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 100         u32 array_size;         /* # of u32 entries in array */
 101         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 102                 0x00000000,     /*   31 -    0  Event id numbers */
 103                 0x00000000,     /*   63 -   32 */
 104                 0x00000000,     /*   95 -   64 */
 105                 0x00000000,     /*  127 -   96 */
 106                 0x00000000,     /*  159 -  128 */
 107                 0x00000000,     /*  191 -  160 */
 108                 0x00000000,     /*  223 -  192 */
 109                 0x00000000,     /*  255 -  224 */
 110                 0x00000000,     /*  287 -  256 */
 111                 0x00000000,     /*  319 -  288 */
 112                 0x00000000,     /*  351 -  320 */
 113                 0x00000000,     /*  383 -  352 */
 114                 0x00000000,     /*  415 -  384 */
 115                 0x00000000,     /*  447 -  416 */
 116                 0x00000000,     /*  479 -  448 */
 117                 0x00000000,     /*  511 -  480 */
 118                 0x00000000,     /*  543 -  512 */
 119                 0x00000000,     /*  575 -  544 */
 120                 0x00000000,     /*  607 -  576 */
 121                 0x00000000,     /*  639 -  608 */
 122                 0x00000000,     /*  671 -  640 */
 123                 0x00000000,     /*  703 -  672 */
 124                 0x00000000,     /*  735 -  704 */
 125                 0x00000000,     /*  767 -  736 */
 126                 0x00000000,     /*  799 -  768 */
 127                 0x00000000,     /*  831 -  800 */
 128                 0x00000000,     /*  863 -  832 */
 129                 0x00000000,     /*  895 -  864 */
 130                 0x00000000,     /*  927 -  896 */
 131                 0x00000000,     /*  959 -  928 */
 132                 0x00000000,     /*  991 -  960 */
 133                 0x00000000,     /* 1023 -  992 */
 134                 0x00000000,     /* 1055 - 1024 */
 135                 0x00000000,     /* 1087 - 1056 */
 136                 0x00000000,     /* 1119 - 1088 */
 137                 0x00000000,     /* 1151 - 1120 */
 138                 0x00000000,     /* 1183 - 1152 */
 139                 0x00000000,     /* 1215 - 1184 */
 140                 0x00000000,     /* 1247 - 1216 */
 141                 0x00000000,     /* 1279 - 1248 */
 142                 0x00000000,     /* 1311 - 1280 */
 143                 0x00000000,     /* 1343 - 1312 */
 144                 0x00000000,     /* 1375 - 1344 */
 145                 0x00000000,     /* 1407 - 1376 */
 146                 0x00000000,     /* 1439 - 1408 */
 147                 0x00000000,     /* 1471 - 1440 */
 148                 0x00000000,     /* 1503 - 1472 */
 149         };
 150
 151         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 152         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
 153                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
 154                 return;
 155         }
 156
 157         ret = iwl3945_grab_nic_access(priv);
 158         if (ret) {
 159                 IWL_WARNING("Can not read from adapter at this time.\n");
 160                 return;
 161         }
 162
 163         disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
 164         array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
 165         iwl3945_release_nic_access(priv);
 166
 167         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 168                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
 169                                disable_ptr);
 170                 ret = iwl3945_grab_nic_access(priv);
 171                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 172                         iwl3945_write_targ_mem(priv,
 173                                            disable_ptr + (i * sizeof(u32)),
 174                                            evt_disable[i]);
 175
 176                 iwl3945_release_nic_access(priv);
 177         } else {
 178                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
 179                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
 180                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
 181                                disable_ptr, array_size);
 182         }
 183
 184 }
 185
 186 /**
 187  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
 188  * @priv: eeprom and antenna fields are used to determine antenna flags
 189  *
 190  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
 191  * priv->antenna specifies the antenna diversity mode:
 192  *
 193  * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
 194  * IWL_ANTENNA_MAIN      - Force MAIN antenna
 195  * IWL_ANTENNA_AUX       - Force AUX antenna
 196  */
 197 __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
 198 {
 199         switch (priv->antenna) {
 200         case IWL_ANTENNA_DIVERSITY:
 201                 return 0;
 202
 203         case IWL_ANTENNA_MAIN:
 204                 if (priv->eeprom.antenna_switch_type)
 205                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 206                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 207
 208         case IWL_ANTENNA_AUX:
 209                 if (priv->eeprom.antenna_switch_type)
 210                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 211                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 212         }
 213
 214         /* bad antenna selector value */
 215         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
 216         return 0;               /* "diversity" is default if error */
 217 }
 218
 219 /*****************************************************************************
 220  *
 221  * Intel PRO/Wireless 3945ABG/BG Network Connection
 222  *
 223  *  RX handler implementations
 224  *
 225  *  Used by iwl-base.c
 226  *
 227  *****************************************************************************/
 228
 229 void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
 230 {
 231         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 232         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 233                      (int)sizeof(struct iwl3945_notif_statistics),
 234                      le32_to_cpu(pkt->len));
 235
 236         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
 237
 238         priv->last_statistics_time = jiffies;
 239 }
 240
 241 static void iwl3945_add_radiotap(struct iwl3945_priv *priv,
 242                                  struct sk_buff *skb,
 243                                  struct iwl3945_rx_frame_hdr *rx_hdr,
 244                                  struct ieee80211_rx_status *stats)
 245 {
 246         /* First cache any information we need before we overwrite
 247          * the information provided in the skb from the hardware */
 248         s8 signal = stats->ssi;
 249         s8 noise = 0;
 250         int rate = stats->rate;
 251         u64 tsf = stats->mactime;
 252         __le16 phy_flags_hw = rx_hdr->phy_flags;
 253
 254         struct iwl3945_rt_rx_hdr {
 255                 struct ieee80211_radiotap_header rt_hdr;
 256                 __le64 rt_tsf;          /* TSF */
 257                 u8 rt_flags;            /* radiotap packet flags */
 258                 u8 rt_rate;             /* rate in 500kb/s */
 259                 __le16 rt_channelMHz;   /* channel in MHz */
 260                 __le16 rt_chbitmask;    /* channel bitfield */
 261                 s8 rt_dbmsignal;        /* signal in dBm, kluged to signed */
 262                 s8 rt_dbmnoise;
 263                 u8 rt_antenna;          /* antenna number */
 264         } __attribute__ ((packed)) *iwl3945_rt;
 265
 266         if (skb_headroom(skb) < sizeof(*iwl3945_rt)) {
 267                 if (net_ratelimit())
 268                         printk(KERN_ERR "not enough headroom [%d] for "
 269                                "radiotap head [%zd]\n",
 270                                skb_headroom(skb), sizeof(*iwl3945_rt));
 271                 return;
 272         }
 273
 274         /* put radiotap header in front of 802.11 header and data */
 275         iwl3945_rt = (void *)skb_push(skb, sizeof(*iwl3945_rt));
 276
 277         /* initialise radiotap header */
 278         iwl3945_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
 279         iwl3945_rt->rt_hdr.it_pad = 0;
 280
 281         /* total header + data */
 282         put_unaligned(cpu_to_le16(sizeof(*iwl3945_rt)),
 283                       &iwl3945_rt->rt_hdr.it_len);
 284
 285         /* Indicate all the fields we add to the radiotap header */
 286         put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
 287                                   (1 << IEEE80211_RADIOTAP_FLAGS) |
 288                                   (1 << IEEE80211_RADIOTAP_RATE) |
 289                                   (1 << IEEE80211_RADIOTAP_CHANNEL) |
 290                                   (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
 291                                   (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
 292                                   (1 << IEEE80211_RADIOTAP_ANTENNA)),
 293                       &iwl3945_rt->rt_hdr.it_present);
 294
 295         /* Zero the flags, we'll add to them as we go */
 296         iwl3945_rt->rt_flags = 0;
 297
 298         put_unaligned(cpu_to_le64(tsf), &iwl3945_rt->rt_tsf);
 299
 300         iwl3945_rt->rt_dbmsignal = signal;
 301         iwl3945_rt->rt_dbmnoise = noise;
 302
 303         /* Convert the channel frequency and set the flags */
 304         put_unaligned(cpu_to_le16(stats->freq), &iwl3945_rt->rt_channelMHz);
 305         if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
 306                 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
 307                                           IEEE80211_CHAN_5GHZ),
 308                               &iwl3945_rt->rt_chbitmask);
 309         else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
 310                 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
 311                                           IEEE80211_CHAN_2GHZ),
 312                               &iwl3945_rt->rt_chbitmask);
 313         else    /* 802.11g */
 314                 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
 315                                           IEEE80211_CHAN_2GHZ),
 316                               &iwl3945_rt->rt_chbitmask);
 317
 318         rate = iwl3945_rate_index_from_plcp(rate);
 319         if (rate == -1)
 320                 iwl3945_rt->rt_rate = 0;
 321         else
 322                 iwl3945_rt->rt_rate = iwl3945_rates[rate].ieee;
 323
 324         /* antenna number */
 325         iwl3945_rt->rt_antenna =
 326                 le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
 327
 328         /* set the preamble flag if we have it */
 329         if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
 330                 iwl3945_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
 331
 332         stats->flag |= RX_FLAG_RADIOTAP;
 333 }
 334
 335 static void iwl3945_handle_data_packet(struct iwl3945_priv *priv, int is_data,
 336                                    struct iwl3945_rx_mem_buffer *rxb,
 337                                    struct ieee80211_rx_status *stats)
 338 {
 339         struct ieee80211_hdr *hdr;
 340         struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
 341         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 342         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 343         short len = le16_to_cpu(rx_hdr->len);
 344
 345         /* We received data from the HW, so stop the watchdog */
 346         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
 347                 IWL_DEBUG_DROP("Corruption detected!\n");
 348                 return;
 349         }
 350
 351         /* We only process data packets if the interface is open */
 352         if (unlikely(!priv->is_open)) {
 353                 IWL_DEBUG_DROP_LIMIT
 354                     ("Dropping packet while interface is not open.\n");
 355                 return;
 356         }
 357
 358         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
 359         /* Set the size of the skb to the size of the frame */
 360         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
 361
 362         hdr = (void *)rxb->skb->data;
 363
 364         if (iwl3945_param_hwcrypto)
 365                 iwl3945_set_decrypted_flag(priv, rxb->skb,
 366                                        le32_to_cpu(rx_end->status), stats);
 367
 368         if (priv->add_radiotap)
 369                 iwl3945_add_radiotap(priv, rxb->skb, rx_hdr, stats);
 370
 371         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 372         rxb->skb = NULL;
 373 }
 374
 375 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
 376
 377 static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
 378                                 struct iwl3945_rx_mem_buffer *rxb)
 379 {
 380         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 381         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 382         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 383         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 384         struct ieee80211_hdr *header;
 385         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
 386         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
 387         struct ieee80211_rx_status stats = {
 388                 .mactime = le64_to_cpu(rx_end->timestamp),
 389                 .freq = ieee80211chan2mhz(le16_to_cpu(rx_hdr->channel)),
 390                 .channel = le16_to_cpu(rx_hdr->channel),
 391                 .phymode = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 392                 MODE_IEEE80211G : MODE_IEEE80211A,
 393                 .antenna = 0,
 394                 .rate = rx_hdr->rate,
 395                 .flag = 0,
 396         };
 397         u8 network_packet;
 398         int snr;
 399
 400         if ((unlikely(rx_stats->phy_count > 20))) {
 401                 IWL_DEBUG_DROP
 402                     ("dsp size out of range [0,20]: "
 403                      "%d/n", rx_stats->phy_count);
 404                 return;
 405         }
 406
 407         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 408             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 409                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 410                 return;
 411         }
 412
 413         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
 414                 iwl3945_handle_data_packet(priv, 1, rxb, &stats);
 415                 return;
 416         }
 417
 418         /* Convert 3945's rssi indicator to dBm */
 419         stats.ssi = rx_stats->rssi - IWL_RSSI_OFFSET;
 420
 421         /* Set default noise value to -127 */
 422         if (priv->last_rx_noise == 0)
 423                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 424
 425         /* 3945 provides noise info for OFDM frames only.
 426          * sig_avg and noise_diff are measured by the 3945's digital signal
 427          *   processor (DSP), and indicate linear levels of signal level and
 428          *   distortion/noise within the packet preamble after
 429          *   automatic gain control (AGC).  sig_avg should stay fairly
 430          *   constant if the radio's AGC is working well.
 431          * Since these values are linear (not dB or dBm), linear
 432          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
 433          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
 434          *   to obtain noise level in dBm.
 435          * Calculate stats.signal (quality indicator in %) based on SNR. */
 436         if (rx_stats_noise_diff) {
 437                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
 438                 stats.noise = stats.ssi - iwl3945_calc_db_from_ratio(snr);
 439                 stats.signal = iwl3945_calc_sig_qual(stats.ssi, stats.noise);
 440
 441         /* If noise info not available, calculate signal quality indicator (%)
 442          *   using just the dBm signal level. */
 443         } else {
 444                 stats.noise = priv->last_rx_noise;
 445                 stats.signal = iwl3945_calc_sig_qual(stats.ssi, 0);
 446         }
 447
 448
 449         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
 450                         stats.ssi, stats.noise, stats.signal,
 451                         rx_stats_sig_avg, rx_stats_noise_diff);
 452
 453         stats.freq = ieee80211chan2mhz(stats.channel);
 454
 455         /* can be covered by iwl3945_report_frame() in most cases */
 456 /*      IWL_DEBUG_RX("RX status: 0x%08X\n", rx_end->status); */
 457
 458         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 459
 460         network_packet = iwl3945_is_network_packet(priv, header);
 461
 462 #ifdef CONFIG_IWL3945_DEBUG
 463         if (iwl3945_debug_level & IWL_DL_STATS && net_ratelimit())
 464                 IWL_DEBUG_STATS
 465                     ("[%c] %d RSSI: %d Signal: %u, Noise: %u, Rate: %u\n",
 466                      network_packet ? '*' : ' ',
 467                      stats.channel, stats.ssi, stats.ssi,
 468                      stats.ssi, stats.rate);
 469
 470         if (iwl3945_debug_level & (IWL_DL_RX))
 471                 /* Set "1" to report good data frames in groups of 100 */
 472                 iwl3945_report_frame(priv, pkt, header, 1);
 473 #endif
 474
 475         if (network_packet) {
 476                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
 477                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
 478                 priv->last_rx_rssi = stats.ssi;
 479                 priv->last_rx_noise = stats.noise;
 480         }
 481
 482         switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
 483         case IEEE80211_FTYPE_MGMT:
 484                 switch (le16_to_cpu(header->frame_control) &
 485                         IEEE80211_FCTL_STYPE) {
 486                 case IEEE80211_STYPE_PROBE_RESP:
 487                 case IEEE80211_STYPE_BEACON:{
 488                                 /* If this is a beacon or probe response for
 489                                  * our network then cache the beacon
 490                                  * timestamp */
 491                                 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
 492                                       && !compare_ether_addr(header->addr2,
 493                                                              priv->bssid)) ||
 494                                      ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 495                                       && !compare_ether_addr(header->addr3,
 496                                                              priv->bssid)))) {
 497                                         struct ieee80211_mgmt *mgmt =
 498                                             (struct ieee80211_mgmt *)header;
 499                                         __le32 *pos;
 500                                         pos =
 501                                             (__le32 *) & mgmt->u.beacon.
 502                                             timestamp;
 503                                         priv->timestamp0 = le32_to_cpu(pos[0]);
 504                                         priv->timestamp1 = le32_to_cpu(pos[1]);
 505                                         priv->beacon_int = le16_to_cpu(
 506                                             mgmt->u.beacon.beacon_int);
 507                                         if (priv->call_post_assoc_from_beacon &&
 508                                             (priv->iw_mode ==
 509                                                 IEEE80211_IF_TYPE_STA))
 510                                                 queue_work(priv->workqueue,
 511                                                     &priv->post_associate.work);
 512
 513                                         priv->call_post_assoc_from_beacon = 0;
 514                                 }
 515
 516                                 break;
 517                         }
 518
 519                 case IEEE80211_STYPE_ACTION:
 520                         /* TODO: Parse 802.11h frames for CSA... */
 521                         break;
 522
 523                         /*
 524                          * TODO: Use the new callback function from
 525                          * mac80211 instead of sniffing these packets.
 526                          */
 527                 case IEEE80211_STYPE_ASSOC_RESP:
 528                 case IEEE80211_STYPE_REASSOC_RESP:{
 529                                 struct ieee80211_mgmt *mgnt =
 530                                     (struct ieee80211_mgmt *)header;
 531
 532                                 /* We have just associated, give some
 533                                  * time for the 4-way handshake if
 534                                  * any. Don't start scan too early. */
 535                                 priv->next_scan_jiffies = jiffies +
 536                                         IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
 537
 538                                 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
 539                                                   le16_to_cpu(mgnt->u.
 540                                                               assoc_resp.aid));
 541                                 priv->assoc_capability =
 542                                     le16_to_cpu(mgnt->u.assoc_resp.capab_info);
 543                                 if (priv->beacon_int)
 544                                         queue_work(priv->workqueue,
 545                                             &priv->post_associate.work);
 546                                 else
 547                                         priv->call_post_assoc_from_beacon = 1;
 548                                 break;
 549                         }
 550
 551                 case IEEE80211_STYPE_PROBE_REQ:{
 552                                 DECLARE_MAC_BUF(mac1);
 553                                 DECLARE_MAC_BUF(mac2);
 554                                 DECLARE_MAC_BUF(mac3);
 555                                 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 556                                         IWL_DEBUG_DROP
 557                                             ("Dropping (non network): %s"
 558                                              ", %s, %s\n",
 559                                              print_mac(mac1, header->addr1),
 560                                              print_mac(mac2, header->addr2),
 561                                              print_mac(mac3, header->addr3));
 562                                 return;
 563                         }
 564                 }
 565
 566                 iwl3945_handle_data_packet(priv, 0, rxb, &stats);
 567                 break;
 568
 569         case IEEE80211_FTYPE_CTL:
 570                 break;
 571
 572         case IEEE80211_FTYPE_DATA: {
 573                 DECLARE_MAC_BUF(mac1);
 574                 DECLARE_MAC_BUF(mac2);
 575                 DECLARE_MAC_BUF(mac3);
 576
 577                 if (unlikely(iwl3945_is_duplicate_packet(priv, header)))
 578                         IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
 579                                        print_mac(mac1, header->addr1),
 580                                        print_mac(mac2, header->addr2),
 581                                        print_mac(mac3, header->addr3));
 582                 else
 583                         iwl3945_handle_data_packet(priv, 1, rxb, &stats);
 584                 break;
 585         }
 586         }
 587 }
 588
 589 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
 590                                  dma_addr_t addr, u16 len)
 591 {
 592         int count;
 593         u32 pad;
 594         struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
 595
 596         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 597         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
 598
 599         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 600                 IWL_ERROR("Error can not send more than %d chunks\n",
 601                           NUM_TFD_CHUNKS);
 602                 return -EINVAL;
 603         }
 604
 605         tfd->pa[count].addr = cpu_to_le32(addr);
 606         tfd->pa[count].len = cpu_to_le32(len);
 607
 608         count++;
 609
 610         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 611                                          TFD_CTL_PAD_SET(pad));
 612
 613         return 0;
 614 }
 615
 616 /**
 617  * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
 618  *
 619  * Does NOT advance any indexes
 620  */
 621 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
 622 {
 623         struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
 624         struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
 625         struct pci_dev *dev = priv->pci_dev;
 626         int i;
 627         int counter;
 628
 629         /* classify bd */
 630         if (txq->q.id == IWL_CMD_QUEUE_NUM)
 631                 /* nothing to cleanup after for host commands */
 632                 return 0;
 633
 634         /* sanity check */
 635         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
 636         if (counter > NUM_TFD_CHUNKS) {
 637                 IWL_ERROR("Too many chunks: %i\n", counter);
 638                 /* @todo issue fatal error, it is quite serious situation */
 639                 return 0;
 640         }
 641
 642         /* unmap chunks if any */
 643
 644         for (i = 1; i < counter; i++) {
 645                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
 646                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
 647                 if (txq->txb[txq->q.read_ptr].skb[0]) {
 648                         struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
 649                         if (txq->txb[txq->q.read_ptr].skb[0]) {
 650                                 /* Can be called from interrupt context */
 651                                 dev_kfree_skb_any(skb);
 652                                 txq->txb[txq->q.read_ptr].skb[0] = NULL;
 653                         }
 654                 }
 655         }
 656         return 0;
 657 }
 658
 659 u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
 660 {
 661         int i;
 662         int ret = IWL_INVALID_STATION;
 663         unsigned long flags;
 664         DECLARE_MAC_BUF(mac);
 665
 666         spin_lock_irqsave(&priv->sta_lock, flags);
 667         for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
 668                 if ((priv->stations[i].used) &&
 669                     (!compare_ether_addr
 670                      (priv->stations[i].sta.sta.addr, addr))) {
 671                         ret = i;
 672                         goto out;
 673                 }
 674
 675         IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
 676                        print_mac(mac, addr), priv->num_stations);
 677  out:
 678         spin_unlock_irqrestore(&priv->sta_lock, flags);
 679         return ret;
 680 }
 681
 682 /**
 683  * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 684  *
 685 */
 686 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
 687                               struct iwl3945_cmd *cmd,
 688                               struct ieee80211_tx_control *ctrl,
 689                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
 690 {
 691         unsigned long flags;
 692         u16 rate_index = min(ctrl->tx_rate & 0xffff, IWL_RATE_COUNT - 1);
 693         u16 rate_mask;
 694         int rate;
 695         u8 rts_retry_limit;
 696         u8 data_retry_limit;
 697         __le32 tx_flags;
 698         u16 fc = le16_to_cpu(hdr->frame_control);
 699
 700         rate = iwl3945_rates[rate_index].plcp;
 701         tx_flags = cmd->cmd.tx.tx_flags;
 702
 703         /* We need to figure out how to get the sta->supp_rates while
 704          * in this running context; perhaps encoding into ctrl->tx_rate? */
 705         rate_mask = IWL_RATES_MASK;
 706
 707         spin_lock_irqsave(&priv->sta_lock, flags);
 708
 709         priv->stations[sta_id].current_rate.rate_n_flags = rate;
 710
 711         if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
 712             (sta_id != IWL3945_BROADCAST_ID) &&
 713                 (sta_id != IWL_MULTICAST_ID))
 714                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
 715
 716         spin_unlock_irqrestore(&priv->sta_lock, flags);
 717
 718         if (tx_id >= IWL_CMD_QUEUE_NUM)
 719                 rts_retry_limit = 3;
 720         else
 721                 rts_retry_limit = 7;
 722
 723         if (ieee80211_is_probe_response(fc)) {
 724                 data_retry_limit = 3;
 725                 if (data_retry_limit < rts_retry_limit)
 726                         rts_retry_limit = data_retry_limit;
 727         } else
 728                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
 729
 730         if (priv->data_retry_limit != -1)
 731                 data_retry_limit = priv->data_retry_limit;
 732
 733         if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
 734                 switch (fc & IEEE80211_FCTL_STYPE) {
 735                 case IEEE80211_STYPE_AUTH:
 736                 case IEEE80211_STYPE_DEAUTH:
 737                 case IEEE80211_STYPE_ASSOC_REQ:
 738                 case IEEE80211_STYPE_REASSOC_REQ:
 739                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
 740                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 741                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
 742                         }
 743                         break;
 744                 default:
 745                         break;
 746                 }
 747         }
 748
 749         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
 750         cmd->cmd.tx.data_retry_limit = data_retry_limit;
 751         cmd->cmd.tx.rate = rate;
 752         cmd->cmd.tx.tx_flags = tx_flags;
 753
 754         /* OFDM */
 755         cmd->cmd.tx.supp_rates[0] =
 756            ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
 757
 758         /* CCK */
 759         cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
 760
 761         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 762                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
 763                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
 764                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
 765 }
 766
 767 u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
 768 {
 769         unsigned long flags_spin;
 770         struct iwl3945_station_entry *station;
 771
 772         if (sta_id == IWL_INVALID_STATION)
 773                 return IWL_INVALID_STATION;
 774
 775         spin_lock_irqsave(&priv->sta_lock, flags_spin);
 776         station = &priv->stations[sta_id];
 777
 778         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 779         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 780         station->current_rate.rate_n_flags = tx_rate;
 781         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 782
 783         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
 784
 785         iwl3945_send_add_station(priv, &station->sta, flags);
 786         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
 787                         sta_id, tx_rate);
 788         return sta_id;
 789 }
 790
 791 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
 792 {
 793         int rc;
 794         unsigned long flags;
 795
 796         spin_lock_irqsave(&priv->lock, flags);
 797         rc = iwl3945_grab_nic_access(priv);
 798         if (rc) {
 799                 spin_unlock_irqrestore(&priv->lock, flags);
 800                 return rc;
 801         }
 802
 803         if (!pwr_max) {
 804                 u32 val;
 805
 806                 rc = pci_read_config_dword(priv->pci_dev,
 807                                 PCI_POWER_SOURCE, &val);
 808                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
 809                         iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 810                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 811                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 812                         iwl3945_release_nic_access(priv);
 813
 814                         iwl3945_poll_bit(priv, CSR_GPIO_IN,
 815                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
 816                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 817                 } else
 818                         iwl3945_release_nic_access(priv);
 819         } else {
 820                 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 821                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 822                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
 823
 824                 iwl3945_release_nic_access(priv);
 825                 iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
 826                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
 827         }
 828         spin_unlock_irqrestore(&priv->lock, flags);
 829
 830         return rc;
 831 }
 832
 833 static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
 834 {
 835         int rc;
 836         unsigned long flags;
 837
 838         spin_lock_irqsave(&priv->lock, flags);
 839         rc = iwl3945_grab_nic_access(priv);
 840         if (rc) {
 841                 spin_unlock_irqrestore(&priv->lock, flags);
 842                 return rc;
 843         }
 844
 845         iwl3945_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
 846         iwl3945_write_direct32(priv, FH_RCSR_RPTR_ADDR(0),
 847                              priv->hw_setting.shared_phys +
 848                              offsetof(struct iwl3945_shared, rx_read_ptr[0]));
 849         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), 0);
 850         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0),
 851                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
 852                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
 853                 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
 854                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
 855                 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
 856                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
 857                 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
 858                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
 859
 860         /* fake read to flush all prev I/O */
 861         iwl3945_read_direct32(priv, FH_RSSR_CTRL);
 862
 863         iwl3945_release_nic_access(priv);
 864         spin_unlock_irqrestore(&priv->lock, flags);
 865
 866         return 0;
 867 }
 868
 869 static int iwl3945_tx_reset(struct iwl3945_priv *priv)
 870 {
 871         int rc;
 872         unsigned long flags;
 873
 874         spin_lock_irqsave(&priv->lock, flags);
 875         rc = iwl3945_grab_nic_access(priv);
 876         if (rc) {
 877                 spin_unlock_irqrestore(&priv->lock, flags);
 878                 return rc;
 879         }
 880
 881         /* bypass mode */
 882         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
 883
 884         /* RA 0 is active */
 885         iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
 886
 887         /* all 6 fifo are active */
 888         iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
 889
 890         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
 891         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
 892         iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
 893         iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
 894
 895         iwl3945_write_direct32(priv, FH_TSSR_CBB_BASE,
 896                              priv->hw_setting.shared_phys);
 897
 898         iwl3945_write_direct32(priv, FH_TSSR_MSG_CONFIG,
 899                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
 900                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
 901                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
 902                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
 903                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
 904                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
 905                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
 906
 907         iwl3945_release_nic_access(priv);
 908         spin_unlock_irqrestore(&priv->lock, flags);
 909
 910         return 0;
 911 }
 912
 913 /**
 914  * iwl3945_txq_ctx_reset - Reset TX queue context
 915  *
 916  * Destroys all DMA structures and initialize them again
 917  */
 918 static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
 919 {
 920         int rc;
 921         int txq_id, slots_num;
 922
 923         iwl3945_hw_txq_ctx_free(priv);
 924
 925         /* Tx CMD queue */
 926         rc = iwl3945_tx_reset(priv);
 927         if (rc)
 928                 goto error;
 929
 930         /* Tx queue(s) */
 931         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
 932                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
 933                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
 934                 rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
 935                                 txq_id);
 936                 if (rc) {
 937                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
 938                         goto error;
 939                 }
 940         }
 941
 942         return rc;
 943
 944  error:
 945         iwl3945_hw_txq_ctx_free(priv);
 946         return rc;
 947 }
 948
 949 int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
 950 {
 951         u8 rev_id;
 952         int rc;
 953         unsigned long flags;
 954         struct iwl3945_rx_queue *rxq = &priv->rxq;
 955
 956         iwl3945_power_init_handle(priv);
 957
 958         spin_lock_irqsave(&priv->lock, flags);
 959         iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, (1 << 24));
 960         iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 961                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 962
 963         iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 964         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
 965                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 966                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 967         if (rc < 0) {
 968                 spin_unlock_irqrestore(&priv->lock, flags);
 969                 IWL_DEBUG_INFO("Failed to init the card\n");
 970                 return rc;
 971         }
 972
 973         rc = iwl3945_grab_nic_access(priv);
 974         if (rc) {
 975                 spin_unlock_irqrestore(&priv->lock, flags);
 976                 return rc;
 977         }
 978         iwl3945_write_prph(priv, APMG_CLK_EN_REG,
 979                                  APMG_CLK_VAL_DMA_CLK_RQT |
 980                                  APMG_CLK_VAL_BSM_CLK_RQT);
 981         udelay(20);
 982         iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 983                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 984         iwl3945_release_nic_access(priv);
 985         spin_unlock_irqrestore(&priv->lock, flags);
 986
 987         /* Determine HW type */
 988         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
 989         if (rc)
 990                 return rc;
 991         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
 992
 993         iwl3945_nic_set_pwr_src(priv, 1);
 994         spin_lock_irqsave(&priv->lock, flags);
 995
 996         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
 997                 IWL_DEBUG_INFO("RTP type \n");
 998         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
 999                 IWL_DEBUG_INFO("ALM-MB type\n");
1000                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1001                             CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MB);
1002         } else {
1003                 IWL_DEBUG_INFO("ALM-MM type\n");
1004                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1005                             CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MM);
1006         }
1007
1008         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
1009                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
1010                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1011                             CSR_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1012         } else
1013                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
1014
1015         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
1016                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1017                                priv->eeprom.board_revision);
1018                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1019                             CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1020         } else {
1021                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1022                                priv->eeprom.board_revision);
1023                 iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1024                               CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1025         }
1026
1027         if (priv->eeprom.almgor_m_version <= 1) {
1028                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1029                             CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1030                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
1031                                priv->eeprom.almgor_m_version);
1032         } else {
1033                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
1034                                priv->eeprom.almgor_m_version);
1035                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1036                             CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1037         }
1038         spin_unlock_irqrestore(&priv->lock, flags);
1039
1040         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1041                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
1042
1043         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1044                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
1045
1046         /* Allocate the RX queue, or reset if it is already allocated */
1047         if (!rxq->bd) {
1048                 rc = iwl3945_rx_queue_alloc(priv);
1049                 if (rc) {
1050                         IWL_ERROR("Unable to initialize Rx queue\n");
1051                         return -ENOMEM;
1052                 }
1053         } else
1054                 iwl3945_rx_queue_reset(priv, rxq);
1055
1056         iwl3945_rx_replenish(priv);
1057
1058         iwl3945_rx_init(priv, rxq);
1059
1060         spin_lock_irqsave(&priv->lock, flags);
1061
1062         /* Look at using this instead:
1063         rxq->need_update = 1;
1064         iwl3945_rx_queue_update_write_ptr(priv, rxq);
1065         */
1066
1067         rc = iwl3945_grab_nic_access(priv);
1068         if (rc) {
1069                 spin_unlock_irqrestore(&priv->lock, flags);
1070                 return rc;
1071         }
1072         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
1073         iwl3945_release_nic_access(priv);
1074
1075         spin_unlock_irqrestore(&priv->lock, flags);
1076
1077         rc = iwl3945_txq_ctx_reset(priv);
1078         if (rc)
1079                 return rc;
1080
1081         set_bit(STATUS_INIT, &priv->status);
1082
1083         return 0;
1084 }
1085
1086 /**
1087  * iwl3945_hw_txq_ctx_free - Free TXQ Context
1088  *
1089  * Destroy all TX DMA queues and structures
1090  */
1091 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1092 {
1093         int txq_id;
1094
1095         /* Tx queues */
1096         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1097                 iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1098 }
1099
1100 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1101 {
1102         int queue;
1103         unsigned long flags;
1104
1105         spin_lock_irqsave(&priv->lock, flags);
1106         if (iwl3945_grab_nic_access(priv)) {
1107                 spin_unlock_irqrestore(&priv->lock, flags);
1108                 iwl3945_hw_txq_ctx_free(priv);
1109                 return;
1110         }
1111
1112         /* stop SCD */
1113         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1114
1115         /* reset TFD queues */
1116         for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1117                 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0);
1118                 iwl3945_poll_direct_bit(priv, FH_TSSR_TX_STATUS,
1119                                 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1120                                 1000);
1121         }
1122
1123         iwl3945_release_nic_access(priv);
1124         spin_unlock_irqrestore(&priv->lock, flags);
1125
1126         iwl3945_hw_txq_ctx_free(priv);
1127 }
1128
1129 int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1130 {
1131         int rc = 0;
1132         u32 reg_val;
1133         unsigned long flags;
1134
1135         spin_lock_irqsave(&priv->lock, flags);
1136
1137         /* set stop master bit */
1138         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1139
1140         reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1141
1142         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1143             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1144                 IWL_DEBUG_INFO("Card in power save, master is already "
1145                                "stopped\n");
1146         else {
1147                 rc = iwl3945_poll_bit(priv, CSR_RESET,
1148                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
1149                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1150                 if (rc < 0) {
1151                         spin_unlock_irqrestore(&priv->lock, flags);
1152                         return rc;
1153                 }
1154         }
1155
1156         spin_unlock_irqrestore(&priv->lock, flags);
1157         IWL_DEBUG_INFO("stop master\n");
1158
1159         return rc;
1160 }
1161
1162 int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1163 {
1164         int rc;
1165         unsigned long flags;
1166
1167         iwl3945_hw_nic_stop_master(priv);
1168
1169         spin_lock_irqsave(&priv->lock, flags);
1170
1171         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1172
1173         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1174                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1175                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1176
1177         rc = iwl3945_grab_nic_access(priv);
1178         if (!rc) {
1179                 iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1180                                          APMG_CLK_VAL_BSM_CLK_RQT);
1181
1182                 udelay(10);
1183
1184                 iwl3945_set_bit(priv, CSR_GP_CNTRL,
1185                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1186
1187                 iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1188                 iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1189                                         0xFFFFFFFF);
1190
1191                 /* enable DMA */
1192                 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1193                                          APMG_CLK_VAL_DMA_CLK_RQT |
1194                                          APMG_CLK_VAL_BSM_CLK_RQT);
1195                 udelay(10);
1196
1197                 iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1198                                 APMG_PS_CTRL_VAL_RESET_REQ);
1199                 udelay(5);
1200                 iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1201                                 APMG_PS_CTRL_VAL_RESET_REQ);
1202                 iwl3945_release_nic_access(priv);
1203         }
1204
1205         /* Clear the 'host command active' bit... */
1206         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1207
1208         wake_up_interruptible(&priv->wait_command_queue);
1209         spin_unlock_irqrestore(&priv->lock, flags);
1210
1211         return rc;
1212 }
1213
1214 /**
1215  * iwl3945_hw_reg_adjust_power_by_temp
1216  * return index delta into power gain settings table
1217 */
1218 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1219 {
1220         return (new_reading - old_reading) * (-11) / 100;
1221 }
1222
1223 /**
1224  * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1225  */
1226 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1227 {
1228         return (((temperature < -260) || (temperature > 25)) ? 1 : 0);
1229 }
1230
1231 int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1232 {
1233         return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1234 }
1235
1236 /**
1237  * iwl3945_hw_reg_txpower_get_temperature
1238  * get the current temperature by reading from NIC
1239 */
1240 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1241 {
1242         int temperature;
1243
1244         temperature = iwl3945_hw_get_temperature(priv);
1245
1246         /* driver's okay range is -260 to +25.
1247          *   human readable okay range is 0 to +285 */
1248         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1249
1250         /* handle insane temp reading */
1251         if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1252                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1253
1254                 /* if really really hot(?),
1255                  *   substitute the 3rd band/group's temp measured at factory */
1256                 if (priv->last_temperature > 100)
1257                         temperature = priv->eeprom.groups[2].temperature;
1258                 else /* else use most recent "sane" value from driver */
1259                         temperature = priv->last_temperature;
1260         }
1261
1262         return temperature;     /* raw, not "human readable" */
1263 }
1264
1265 /* Adjust Txpower only if temperature variance is greater than threshold.
1266  *
1267  * Both are lower than older versions' 9 degrees */
1268 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1269
1270 /**
1271  * is_temp_calib_needed - determines if new calibration is needed
1272  *
1273  * records new temperature in tx_mgr->temperature.
1274  * replaces tx_mgr->last_temperature *only* if calib needed
1275  *    (assumes caller will actually do the calibration!). */
1276 static int is_temp_calib_needed(struct iwl3945_priv *priv)
1277 {
1278         int temp_diff;
1279
1280         priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1281         temp_diff = priv->temperature - priv->last_temperature;
1282
1283         /* get absolute value */
1284         if (temp_diff < 0) {
1285                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1286                 temp_diff = -temp_diff;
1287         } else if (temp_diff == 0)
1288                 IWL_DEBUG_POWER("Same temp,\n");
1289         else
1290                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1291
1292         /* if we don't need calibration, *don't* update last_temperature */
1293         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1294                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1295                 return 0;
1296         }
1297
1298         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1299
1300         /* assume that caller will actually do calib ...
1301          *   update the "last temperature" value */
1302         priv->last_temperature = priv->temperature;
1303         return 1;
1304 }
1305
1306 #define IWL_MAX_GAIN_ENTRIES 78
1307 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1308 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1309
1310 /* radio and DSP power table, each step is 1/2 dB.
1311  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1312 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1313         {
1314          {251, 127},            /* 2.4 GHz, highest power */
1315          {251, 127},
1316          {251, 127},
1317          {251, 127},
1318          {251, 125},
1319          {251, 110},
1320          {251, 105},
1321          {251, 98},
1322          {187, 125},
1323          {187, 115},
1324          {187, 108},
1325          {187, 99},
1326          {243, 119},
1327          {243, 111},
1328          {243, 105},
1329          {243, 97},
1330          {243, 92},
1331          {211, 106},
1332          {211, 100},
1333          {179, 120},
1334          {179, 113},
1335          {179, 107},
1336          {147, 125},
1337          {147, 119},
1338          {147, 112},
1339          {147, 106},
1340          {147, 101},
1341          {147, 97},
1342          {147, 91},
1343          {115, 107},
1344          {235, 121},
1345          {235, 115},
1346          {235, 109},
1347          {203, 127},
1348          {203, 121},
1349          {203, 115},
1350          {203, 108},
1351          {203, 102},
1352          {203, 96},
1353          {203, 92},
1354          {171, 110},
1355          {171, 104},
1356          {171, 98},
1357          {139, 116},
1358          {227, 125},
1359          {227, 119},
1360          {227, 113},
1361          {227, 107},
1362          {227, 101},
1363          {227, 96},
1364          {195, 113},
1365          {195, 106},
1366          {195, 102},
1367          {195, 95},
1368          {163, 113},
1369          {163, 106},
1370          {163, 102},
1371          {163, 95},
1372          {131, 113},
1373          {131, 106},
1374          {131, 102},
1375          {131, 95},
1376          {99, 113},
1377          {99, 106},
1378          {99, 102},
1379          {99, 95},
1380          {67, 113},
1381          {67, 106},
1382          {67, 102},
1383          {67, 95},
1384          {35, 113},
1385          {35, 106},
1386          {35, 102},
1387          {35, 95},
1388          {3, 113},
1389          {3, 106},
1390          {3, 102},
1391          {3, 95} },             /* 2.4 GHz, lowest power */
1392         {
1393          {251, 127},            /* 5.x GHz, highest power */
1394          {251, 120},
1395          {251, 114},
1396          {219, 119},
1397          {219, 101},
1398          {187, 113},
1399          {187, 102},
1400          {155, 114},
1401          {155, 103},
1402          {123, 117},
1403          {123, 107},
1404          {123, 99},
1405          {123, 92},
1406          {91, 108},
1407          {59, 125},
1408          {59, 118},
1409          {59, 109},
1410          {59, 102},
1411          {59, 96},
1412          {59, 90},
1413          {27, 104},
1414          {27, 98},
1415          {27, 92},
1416          {115, 118},
1417          {115, 111},
1418          {115, 104},
1419          {83, 126},
1420          {83, 121},
1421          {83, 113},
1422          {83, 105},
1423          {83, 99},
1424          {51, 118},
1425          {51, 111},
1426          {51, 104},
1427          {51, 98},
1428          {19, 116},
1429          {19, 109},
1430          {19, 102},
1431          {19, 98},
1432          {19, 93},
1433          {171, 113},
1434          {171, 107},
1435          {171, 99},
1436          {139, 120},
1437          {139, 113},
1438          {139, 107},
1439          {139, 99},
1440          {107, 120},
1441          {107, 113},
1442          {107, 107},
1443          {107, 99},
1444          {75, 120},
1445          {75, 113},
1446          {75, 107},
1447          {75, 99},
1448          {43, 120},
1449          {43, 113},
1450          {43, 107},
1451          {43, 99},
1452          {11, 120},
1453          {11, 113},
1454          {11, 107},
1455          {11, 99},
1456          {131, 107},
1457          {131, 99},
1458          {99, 120},
1459          {99, 113},
1460          {99, 107},
1461          {99, 99},
1462          {67, 120},
1463          {67, 113},
1464          {67, 107},
1465          {67, 99},
1466          {35, 120},
1467          {35, 113},
1468          {35, 107},
1469          {35, 99},
1470          {3, 120} }             /* 5.x GHz, lowest power */
1471 };
1472
1473 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1474 {
1475         if (index < 0)
1476                 return 0;
1477         if (index >= IWL_MAX_GAIN_ENTRIES)
1478                 return IWL_MAX_GAIN_ENTRIES - 1;
1479         return (u8) index;
1480 }
1481
1482 /* Kick off thermal recalibration check every 60 seconds */
1483 #define REG_RECALIB_PERIOD (60)
1484
1485 /**
1486  * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1487  *
1488  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1489  * or 6 Mbit (OFDM) rates.
1490  */
1491 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1492                                s32 rate_index, const s8 *clip_pwrs,
1493                                struct iwl3945_channel_info *ch_info,
1494                                int band_index)
1495 {
1496         struct iwl3945_scan_power_info *scan_power_info;
1497         s8 power;
1498         u8 power_index;
1499
1500         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1501
1502         /* use this channel group's 6Mbit clipping/saturation pwr,
1503          *   but cap at regulatory scan power restriction (set during init
1504          *   based on eeprom channel data) for this channel.  */
1505         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1506
1507         /* further limit to user's max power preference.
1508          * FIXME:  Other spectrum management power limitations do not
1509          *   seem to apply?? */
1510         power = min(power, priv->user_txpower_limit);
1511         scan_power_info->requested_power = power;
1512
1513         /* find difference between new scan *power* and current "normal"
1514          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1515          *   current "normal" temperature-compensated Tx power *index* for
1516          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1517          *   *index*. */
1518         power_index = ch_info->power_info[rate_index].power_table_index
1519             - (power - ch_info->power_info
1520                [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1521
1522         /* store reference index that we use when adjusting *all* scan
1523          *   powers.  So we can accommodate user (all channel) or spectrum
1524          *   management (single channel) power changes "between" temperature
1525          *   feedback compensation procedures.
1526          * don't force fit this reference index into gain table; it may be a
1527          *   negative number.  This will help avoid errors when we're at
1528          *   the lower bounds (highest gains, for warmest temperatures)
1529          *   of the table. */
1530
1531         /* don't exceed table bounds for "real" setting */
1532         power_index = iwl3945_hw_reg_fix_power_index(power_index);
1533
1534         scan_power_info->power_table_index = power_index;
1535         scan_power_info->tpc.tx_gain =
1536             power_gain_table[band_index][power_index].tx_gain;
1537         scan_power_info->tpc.dsp_atten =
1538             power_gain_table[band_index][power_index].dsp_atten;
1539 }
1540
1541 /**
1542  * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1543  *
1544  * Configures power settings for all rates for the current channel,
1545  * using values from channel info struct, and send to NIC
1546  */
1547 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1548 {
1549         int rate_idx, i;
1550         const struct iwl3945_channel_info *ch_info = NULL;
1551         struct iwl3945_txpowertable_cmd txpower = {
1552                 .channel = priv->active_rxon.channel,
1553         };
1554
1555         txpower.band = (priv->phymode == MODE_IEEE80211A) ? 0 : 1;
1556         ch_info = iwl3945_get_channel_info(priv,
1557                                        priv->phymode,
1558                                        le16_to_cpu(priv->active_rxon.channel));
1559         if (!ch_info) {
1560                 IWL_ERROR
1561                     ("Failed to get channel info for channel %d [%d]\n",
1562                      le16_to_cpu(priv->active_rxon.channel), priv->phymode);
1563                 return -EINVAL;
1564         }
1565
1566         if (!is_channel_valid(ch_info)) {
1567                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1568                                 "non-Tx channel.\n");
1569                 return 0;
1570         }
1571
1572         /* fill cmd with power settings for all rates for current channel */
1573         /* Fill OFDM rate */
1574         for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1575              rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1576
1577                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1578                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1579
1580                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1581                                 le16_to_cpu(txpower.channel),
1582                                 txpower.band,
1583                                 txpower.power[i].tpc.tx_gain,
1584                                 txpower.power[i].tpc.dsp_atten,
1585                                 txpower.power[i].rate);
1586         }
1587         /* Fill CCK rates */
1588         for (rate_idx = IWL_FIRST_CCK_RATE;
1589              rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1590                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1591                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1592
1593                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1594                                 le16_to_cpu(txpower.channel),
1595                                 txpower.band,
1596                                 txpower.power[i].tpc.tx_gain,
1597                                 txpower.power[i].tpc.dsp_atten,
1598                                 txpower.power[i].rate);
1599         }
1600
1601         return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1602                         sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1603
1604 }
1605
1606 /**
1607  * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1608  * @ch_info: Channel to update.  Uses power_info.requested_power.
1609  *
1610  * Replace requested_power and base_power_index ch_info fields for
1611  * one channel.
1612  *
1613  * Called if user or spectrum management changes power preferences.
1614  * Takes into account h/w and modulation limitations (clip power).
1615  *
1616  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1617  *
1618  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1619  *       properly fill out the scan powers, and actual h/w gain settings,
1620  *       and send changes to NIC
1621  */
1622 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1623                              struct iwl3945_channel_info *ch_info)
1624 {
1625         struct iwl3945_channel_power_info *power_info;
1626         int power_changed = 0;
1627         int i;
1628         const s8 *clip_pwrs;
1629         int power;
1630
1631         /* Get this chnlgrp's rate-to-max/clip-powers table */
1632         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1633
1634         /* Get this channel's rate-to-current-power settings table */
1635         power_info = ch_info->power_info;
1636
1637         /* update OFDM Txpower settings */
1638         for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1639              i++, ++power_info) {
1640                 int delta_idx;
1641
1642                 /* limit new power to be no more than h/w capability */
1643                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1644                 if (power == power_info->requested_power)
1645                         continue;
1646
1647                 /* find difference between old and new requested powers,
1648                  *    update base (non-temp-compensated) power index */
1649                 delta_idx = (power - power_info->requested_power) * 2;
1650                 power_info->base_power_index -= delta_idx;
1651
1652                 /* save new requested power value */
1653                 power_info->requested_power = power;
1654
1655                 power_changed = 1;
1656         }
1657
1658         /* update CCK Txpower settings, based on OFDM 12M setting ...
1659          *    ... all CCK power settings for a given channel are the *same*. */
1660         if (power_changed) {
1661                 power =
1662                     ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1663                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1664
1665                 /* do all CCK rates' iwl3945_channel_power_info structures */
1666                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1667                         power_info->requested_power = power;
1668                         power_info->base_power_index =
1669                             ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1670                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1671                         ++power_info;
1672                 }
1673         }
1674
1675         return 0;
1676 }
1677
1678 /**
1679  * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1680  *
1681  * NOTE: Returned power limit may be less (but not more) than requested,
1682  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1683  *       (no consideration for h/w clipping limitations).
1684  */
1685 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1686 {
1687         s8 max_power;
1688
1689 #if 0
1690         /* if we're using TGd limits, use lower of TGd or EEPROM */
1691         if (ch_info->tgd_data.max_power != 0)
1692                 max_power = min(ch_info->tgd_data.max_power,
1693                                 ch_info->eeprom.max_power_avg);
1694
1695         /* else just use EEPROM limits */
1696         else
1697 #endif
1698                 max_power = ch_info->eeprom.max_power_avg;
1699
1700         return min(max_power, ch_info->max_power_avg);
1701 }
1702
1703 /**
1704  * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1705  *
1706  * Compensate txpower settings of *all* channels for temperature.
1707  * This only accounts for the difference between current temperature
1708  *   and the factory calibration temperatures, and bases the new settings
1709  *   on the channel's base_power_index.
1710  *
1711  * If RxOn is "associated", this sends the new Txpower to NIC!
1712  */
1713 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1714 {
1715         struct iwl3945_channel_info *ch_info = NULL;
1716         int delta_index;
1717         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1718         u8 a_band;
1719         u8 rate_index;
1720         u8 scan_tbl_index;
1721         u8 i;
1722         int ref_temp;
1723         int temperature = priv->temperature;
1724
1725         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1726         for (i = 0; i < priv->channel_count; i++) {
1727                 ch_info = &priv->channel_info[i];
1728                 a_band = is_channel_a_band(ch_info);
1729
1730                 /* Get this chnlgrp's factory calibration temperature */
1731                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
1732                     temperature;
1733
1734                 /* get power index adjustment based on curr and factory
1735                  * temps */
1736                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
1737                                                               ref_temp);
1738
1739                 /* set tx power value for all rates, OFDM and CCK */
1740                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1741                      rate_index++) {
1742                         int power_idx =
1743                             ch_info->power_info[rate_index].base_power_index;
1744
1745                         /* temperature compensate */
1746                         power_idx += delta_index;
1747
1748                         /* stay within table range */
1749                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
1750                         ch_info->power_info[rate_index].
1751                             power_table_index = (u8) power_idx;
1752                         ch_info->power_info[rate_index].tpc =
1753                             power_gain_table[a_band][power_idx];
1754                 }
1755
1756                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1757                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1758
1759                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1760                 for (scan_tbl_index = 0;
1761                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1762                         s32 actual_index = (scan_tbl_index == 0) ?
1763                             IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
1764                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
1765                                            actual_index, clip_pwrs,
1766                                            ch_info, a_band);
1767                 }
1768         }
1769
1770         /* send Txpower command for current channel to ucode */
1771         return iwl3945_hw_reg_send_txpower(priv);
1772 }
1773
1774 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
1775 {
1776         struct iwl3945_channel_info *ch_info;
1777         s8 max_power;
1778         u8 a_band;
1779         u8 i;
1780
1781         if (priv->user_txpower_limit == power) {
1782                 IWL_DEBUG_POWER("Requested Tx power same as current "
1783                                 "limit: %ddBm.\n", power);
1784                 return 0;
1785         }
1786
1787         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
1788         priv->user_txpower_limit = power;
1789
1790         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1791
1792         for (i = 0; i < priv->channel_count; i++) {
1793                 ch_info = &priv->channel_info[i];
1794                 a_band = is_channel_a_band(ch_info);
1795
1796                 /* find minimum power of all user and regulatory constraints
1797                  *    (does not consider h/w clipping limitations) */
1798                 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
1799                 max_power = min(power, max_power);
1800                 if (max_power != ch_info->curr_txpow) {
1801                         ch_info->curr_txpow = max_power;
1802
1803                         /* this considers the h/w clipping limitations */
1804                         iwl3945_hw_reg_set_new_power(priv, ch_info);
1805                 }
1806         }
1807
1808         /* update txpower settings for all channels,
1809          *   send to NIC if associated. */
1810         is_temp_calib_needed(priv);
1811         iwl3945_hw_reg_comp_txpower_temp(priv);
1812
1813         return 0;
1814 }
1815
1816 /* will add 3945 channel switch cmd handling later */
1817 int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
1818 {
1819         return 0;
1820 }
1821
1822 /**
1823  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
1824  *
1825  * -- reset periodic timer
1826  * -- see if temp has changed enough to warrant re-calibration ... if so:
1827  *     -- correct coeffs for temp (can reset temp timer)
1828  *     -- save this temp as "last",
1829  *     -- send new set of gain settings to NIC
1830  * NOTE:  This should continue working, even when we're not associated,
1831  *   so we can keep our internal table of scan powers current. */
1832 void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
1833 {
1834         /* This will kick in the "brute force"
1835          * iwl3945_hw_reg_comp_txpower_temp() below */
1836         if (!is_temp_calib_needed(priv))
1837                 goto reschedule;
1838
1839         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1840          * This is based *only* on current temperature,
1841          * ignoring any previous power measurements */
1842         iwl3945_hw_reg_comp_txpower_temp(priv);
1843
1844  reschedule:
1845         queue_delayed_work(priv->workqueue,
1846                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
1847 }
1848
1849 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
1850 {
1851         struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
1852                                              thermal_periodic.work);
1853
1854         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1855                 return;
1856
1857         mutex_lock(&priv->mutex);
1858         iwl3945_reg_txpower_periodic(priv);
1859         mutex_unlock(&priv->mutex);
1860 }
1861
1862 /**
1863  * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
1864  *                                 for the channel.
1865  *
1866  * This function is used when initializing channel-info structs.
1867  *
1868  * NOTE: These channel groups do *NOT* match the bands above!
1869  *       These channel groups are based on factory-tested channels;
1870  *       on A-band, EEPROM's "group frequency" entries represent the top
1871  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
1872  */
1873 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
1874                                        const struct iwl3945_channel_info *ch_info)
1875 {
1876         struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
1877         u8 group;
1878         u16 group_index = 0;    /* based on factory calib frequencies */
1879         u8 grp_channel;
1880
1881         /* Find the group index for the channel ... don't use index 1(?) */
1882         if (is_channel_a_band(ch_info)) {
1883                 for (group = 1; group < 5; group++) {
1884                         grp_channel = ch_grp[group].group_channel;
1885                         if (ch_info->channel <= grp_channel) {
1886                                 group_index = group;
1887                                 break;
1888                         }
1889                 }
1890                 /* group 4 has a few channels *above* its factory cal freq */
1891                 if (group == 5)
1892                         group_index = 4;
1893         } else
1894                 group_index = 0;        /* 2.4 GHz, group 0 */
1895
1896         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
1897                         group_index);
1898         return group_index;
1899 }
1900
1901 /**
1902  * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
1903  *
1904  * Interpolate to get nominal (i.e. at factory calibration temperature) index
1905  *   into radio/DSP gain settings table for requested power.
1906  */
1907 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
1908                                        s8 requested_power,
1909                                        s32 setting_index, s32 *new_index)
1910 {
1911         const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
1912         s32 index0, index1;
1913         s32 power = 2 * requested_power;
1914         s32 i;
1915         const struct iwl3945_eeprom_txpower_sample *samples;
1916         s32 gains0, gains1;
1917         s32 res;
1918         s32 denominator;
1919
1920         chnl_grp = &priv->eeprom.groups[setting_index];
1921         samples = chnl_grp->samples;
1922         for (i = 0; i < 5; i++) {
1923                 if (power == samples[i].power) {
1924                         *new_index = samples[i].gain_index;
1925                         return 0;
1926                 }
1927         }
1928
1929         if (power > samples[1].power) {
1930                 index0 = 0;
1931                 index1 = 1;
1932         } else if (power > samples[2].power) {
1933                 index0 = 1;
1934                 index1 = 2;
1935         } else if (power > samples[3].power) {
1936                 index0 = 2;
1937                 index1 = 3;
1938         } else {
1939                 index0 = 3;
1940                 index1 = 4;
1941         }
1942
1943         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
1944         if (denominator == 0)
1945                 return -EINVAL;
1946         gains0 = (s32) samples[index0].gain_index * (1 << 19);
1947         gains1 = (s32) samples[index1].gain_index * (1 << 19);
1948         res = gains0 + (gains1 - gains0) *
1949             ((s32) power - (s32) samples[index0].power) / denominator +
1950             (1 << 18);
1951         *new_index = res >> 19;
1952         return 0;
1953 }
1954
1955 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
1956 {
1957         u32 i;
1958         s32 rate_index;
1959         const struct iwl3945_eeprom_txpower_group *group;
1960
1961         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
1962
1963         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
1964                 s8 *clip_pwrs;  /* table of power levels for each rate */
1965                 s8 satur_pwr;   /* saturation power for each chnl group */
1966                 group = &priv->eeprom.groups[i];
1967
1968                 /* sanity check on factory saturation power value */
1969                 if (group->saturation_power < 40) {
1970                         IWL_WARNING("Error: saturation power is %d, "
1971                                     "less than minimum expected 40\n",
1972                                     group->saturation_power);
1973                         return;
1974                 }
1975
1976                 /*
1977                  * Derive requested power levels for each rate, based on
1978                  *   hardware capabilities (saturation power for band).
1979                  * Basic value is 3dB down from saturation, with further
1980                  *   power reductions for highest 3 data rates.  These
1981                  *   backoffs provide headroom for high rate modulation
1982                  *   power peaks, without too much distortion (clipping).
1983                  */
1984                 /* we'll fill in this array with h/w max power levels */
1985                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
1986
1987                 /* divide factory saturation power by 2 to find -3dB level */
1988                 satur_pwr = (s8) (group->saturation_power >> 1);
1989
1990                 /* fill in channel group's nominal powers for each rate */
1991                 for (rate_index = 0;
1992                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
1993                         switch (rate_index) {
1994                         case IWL_RATE_36M_INDEX_TABLE:
1995                                 if (i == 0)     /* B/G */
1996                                         *clip_pwrs = satur_pwr;
1997                                 else    /* A */
1998                                         *clip_pwrs = satur_pwr - 5;
1999                                 break;
2000                         case IWL_RATE_48M_INDEX_TABLE:
2001                                 if (i == 0)
2002                                         *clip_pwrs = satur_pwr - 7;
2003                                 else
2004                                         *clip_pwrs = satur_pwr - 10;
2005                                 break;
2006                         case IWL_RATE_54M_INDEX_TABLE:
2007                                 if (i == 0)
2008                                         *clip_pwrs = satur_pwr - 9;
2009                                 else
2010                                         *clip_pwrs = satur_pwr - 12;
2011                                 break;
2012                         default:
2013                                 *clip_pwrs = satur_pwr;
2014                                 break;
2015                         }
2016                 }
2017         }
2018 }
2019
2020 /**
2021  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2022  *
2023  * Second pass (during init) to set up priv->channel_info
2024  *
2025  * Set up Tx-power settings in our channel info database for each VALID
2026  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2027  * and current temperature.
2028  *
2029  * Since this is based on current temperature (at init time), these values may
2030  * not be valid for very long, but it gives us a starting/default point,
2031  * and allows us to active (i.e. using Tx) scan.
2032  *
2033  * This does *not* write values to NIC, just sets up our internal table.
2034  */
2035 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
2036 {
2037         struct iwl3945_channel_info *ch_info = NULL;
2038         struct iwl3945_channel_power_info *pwr_info;
2039         int delta_index;
2040         u8 rate_index;
2041         u8 scan_tbl_index;
2042         const s8 *clip_pwrs;    /* array of power levels for each rate */
2043         u8 gain, dsp_atten;
2044         s8 power;
2045         u8 pwr_index, base_pwr_index, a_band;
2046         u8 i;
2047         int temperature;
2048
2049         /* save temperature reference,
2050          *   so we can determine next time to calibrate */
2051         temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2052         priv->last_temperature = temperature;
2053
2054         iwl3945_hw_reg_init_channel_groups(priv);
2055
2056         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2057         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2058              i++, ch_info++) {
2059                 a_band = is_channel_a_band(ch_info);
2060                 if (!is_channel_valid(ch_info))
2061                         continue;
2062
2063                 /* find this channel's channel group (*not* "band") index */
2064                 ch_info->group_index =
2065                         iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2066
2067                 /* Get this chnlgrp's rate->max/clip-powers table */
2068                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2069
2070                 /* calculate power index *adjustment* value according to
2071                  *  diff between current temperature and factory temperature */
2072                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2073                                 priv->eeprom.groups[ch_info->group_index].
2074                                 temperature);
2075
2076                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
2077                                 ch_info->channel, delta_index, temperature +
2078                                 IWL_TEMP_CONVERT);
2079
2080                 /* set tx power value for all OFDM rates */
2081                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2082                      rate_index++) {
2083                         s32 power_idx;
2084                         int rc;
2085
2086                         /* use channel group's clip-power table,
2087                          *   but don't exceed channel's max power */
2088                         s8 pwr = min(ch_info->max_power_avg,
2089                                      clip_pwrs[rate_index]);
2090
2091                         pwr_info = &ch_info->power_info[rate_index];
2092
2093                         /* get base (i.e. at factory-measured temperature)
2094                          *    power table index for this rate's power */
2095                         rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2096                                                          ch_info->group_index,
2097                                                          &power_idx);
2098                         if (rc) {
2099                                 IWL_ERROR("Invalid power index\n");
2100                                 return rc;
2101                         }
2102                         pwr_info->base_power_index = (u8) power_idx;
2103
2104                         /* temperature compensate */
2105                         power_idx += delta_index;
2106
2107                         /* stay within range of gain table */
2108                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2109
2110                         /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2111                         pwr_info->requested_power = pwr;
2112                         pwr_info->power_table_index = (u8) power_idx;
2113                         pwr_info->tpc.tx_gain =
2114                             power_gain_table[a_band][power_idx].tx_gain;
2115                         pwr_info->tpc.dsp_atten =
2116                             power_gain_table[a_band][power_idx].dsp_atten;
2117                 }
2118
2119                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2120                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2121                 power = pwr_info->requested_power +
2122                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2123                 pwr_index = pwr_info->power_table_index +
2124                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2125                 base_pwr_index = pwr_info->base_power_index +
2126                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2127
2128                 /* stay within table range */
2129                 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2130                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2131                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2132
2133                 /* fill each CCK rate's iwl3945_channel_power_info structure
2134                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2135                  * NOTE:  CCK rates start at end of OFDM rates! */
2136                 for (rate_index = 0;
2137                      rate_index < IWL_CCK_RATES; rate_index++) {
2138                         pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2139                         pwr_info->requested_power = power;
2140                         pwr_info->power_table_index = pwr_index;
2141                         pwr_info->base_power_index = base_pwr_index;
2142                         pwr_info->tpc.tx_gain = gain;
2143                         pwr_info->tpc.dsp_atten = dsp_atten;
2144                 }
2145
2146                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2147                 for (scan_tbl_index = 0;
2148                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2149                         s32 actual_index = (scan_tbl_index == 0) ?
2150                                 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2151                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2152                                 actual_index, clip_pwrs, ch_info, a_band);
2153                 }
2154         }
2155
2156         return 0;
2157 }
2158
2159 int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2160 {
2161         int rc;
2162         unsigned long flags;
2163
2164         spin_lock_irqsave(&priv->lock, flags);
2165         rc = iwl3945_grab_nic_access(priv);
2166         if (rc) {
2167                 spin_unlock_irqrestore(&priv->lock, flags);
2168                 return rc;
2169         }
2170
2171         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), 0);
2172         rc = iwl3945_poll_direct_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2173         if (rc < 0)
2174                 IWL_ERROR("Can't stop Rx DMA.\n");
2175
2176         iwl3945_release_nic_access(priv);
2177         spin_unlock_irqrestore(&priv->lock, flags);
2178
2179         return 0;
2180 }
2181
2182 int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2183 {
2184         int rc;
2185         unsigned long flags;
2186         int txq_id = txq->q.id;
2187
2188         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2189
2190         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2191
2192         spin_lock_irqsave(&priv->lock, flags);
2193         rc = iwl3945_grab_nic_access(priv);
2194         if (rc) {
2195                 spin_unlock_irqrestore(&priv->lock, flags);
2196                 return rc;
2197         }
2198         iwl3945_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0);
2199         iwl3945_write_direct32(priv, FH_CBCC_BASE(txq_id), 0);
2200
2201         iwl3945_write_direct32(priv, FH_TCSR_CONFIG(txq_id),
2202                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2203                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2204                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2205                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2206                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2207         iwl3945_release_nic_access(priv);
2208
2209         /* fake read to flush all prev. writes */
2210         iwl3945_read32(priv, FH_TSSR_CBB_BASE);
2211         spin_unlock_irqrestore(&priv->lock, flags);
2212
2213         return 0;
2214 }
2215
2216 int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2217 {
2218         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2219
2220         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2221 }
2222
2223 /**
2224  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2225  */
2226 int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2227 {
2228         int rc, i, index, prev_index;
2229         struct iwl3945_rate_scaling_cmd rate_cmd = {
2230                 .reserved = {0, 0, 0},
2231         };
2232         struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2233
2234         for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2235                 index = iwl3945_rates[i].table_rs_index;
2236
2237                 table[index].rate_n_flags =
2238                         iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2239                 table[index].try_cnt = priv->retry_rate;
2240                 prev_index = iwl3945_get_prev_ieee_rate(i);
2241                 table[index].next_rate_index = iwl3945_rates[prev_index].table_rs_index;
2242         }
2243
2244         switch (priv->phymode) {
2245         case MODE_IEEE80211A:
2246                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2247                 /* If one of the following CCK rates is used,
2248                  * have it fall back to the 6M OFDM rate */
2249                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++)
2250                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2251
2252                 /* Don't fall back to CCK rates */
2253                 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index = IWL_RATE_9M_INDEX_TABLE;
2254
2255                 /* Don't drop out of OFDM rates */
2256                 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2257                     iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2258                 break;
2259
2260         case MODE_IEEE80211B:
2261                 IWL_DEBUG_RATE("Select B mode rate scale\n");
2262                 /* If an OFDM rate is used, have it fall back to the
2263                  * 1M CCK rates */
2264                 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE; i++)
2265                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_CCK_RATE].table_rs_index;
2266
2267                 /* CCK shouldn't fall back to OFDM... */
2268                 table[IWL_RATE_11M_INDEX_TABLE].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2269                 break;
2270
2271         default:
2272                 IWL_DEBUG_RATE("Select G mode rate scale\n");
2273                 break;
2274         }
2275
2276         /* Update the rate scaling for control frame Tx */
2277         rate_cmd.table_id = 0;
2278         rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2279                               &rate_cmd);
2280         if (rc)
2281                 return rc;
2282
2283         /* Update the rate scaling for data frame Tx */
2284         rate_cmd.table_id = 1;
2285         return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2286                                 &rate_cmd);
2287 }
2288
2289 /* Called when initializing driver */
2290 int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2291 {
2292         memset((void *)&priv->hw_setting, 0,
2293                sizeof(struct iwl3945_driver_hw_info));
2294
2295         priv->hw_setting.shared_virt =
2296             pci_alloc_consistent(priv->pci_dev,
2297                                  sizeof(struct iwl3945_shared),
2298                                  &priv->hw_setting.shared_phys);
2299
2300         if (!priv->hw_setting.shared_virt) {
2301                 IWL_ERROR("failed to allocate pci memory\n");
2302                 mutex_unlock(&priv->mutex);
2303                 return -ENOMEM;
2304         }
2305
2306         priv->hw_setting.ac_queue_count = AC_NUM;
2307         priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE;
2308         priv->hw_setting.max_pkt_size = 2342;
2309         priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2310         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2311         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2312         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2313         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2314         return 0;
2315 }
2316
2317 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2318                           struct iwl3945_frame *frame, u8 rate)
2319 {
2320         struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2321         unsigned int frame_size;
2322
2323         tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2324         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2325
2326         tx_beacon_cmd->tx.sta_id = IWL3945_BROADCAST_ID;
2327         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2328
2329         frame_size = iwl3945_fill_beacon_frame(priv,
2330                                 tx_beacon_cmd->frame,
2331                                 iwl3945_broadcast_addr,
2332                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2333
2334         BUG_ON(frame_size > MAX_MPDU_SIZE);
2335         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2336
2337         tx_beacon_cmd->tx.rate = rate;
2338         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2339                                       TX_CMD_FLG_TSF_MSK);
2340
2341         /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2342         tx_beacon_cmd->tx.supp_rates[0] =
2343                 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2344
2345         tx_beacon_cmd->tx.supp_rates[1] =
2346                 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2347
2348         return (sizeof(struct iwl3945_tx_beacon_cmd) + frame_size);
2349 }
2350
2351 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2352 {
2353         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2354 }
2355
2356 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2357 {
2358         INIT_DELAYED_WORK(&priv->thermal_periodic,
2359                           iwl3945_bg_reg_txpower_periodic);
2360 }
2361
2362 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2363 {
2364         cancel_delayed_work(&priv->thermal_periodic);
2365 }
2366
2367 struct pci_device_id iwl3945_hw_card_ids[] = {
2368         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4222)},
2369         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4227)},
2370         {0}
2371 };
2372
2373 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);