3 * Broadcom B43legacy wireless driver
5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6 * Copyright (c) 2005 Stefano Brivio <st3@riseup.net>
7 * Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
12 * Some parts of the code in this file are derived from the ipw2200
13 * driver Copyright(c) 2003 - 2004 Intel Corporation.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING. If not, write to
27 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28 * Boston, MA 02110-1301, USA.
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/moduleparam.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/version.h>
38 #include <linux/firmware.h>
39 #include <linux/wireless.h>
40 #include <linux/workqueue.h>
41 #include <linux/skbuff.h>
42 #include <linux/dma-mapping.h>
44 #include <asm/unaligned.h>
46 #include "b43legacy.h"
57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
58 MODULE_AUTHOR("Martin Langer");
59 MODULE_AUTHOR("Stefano Brivio");
60 MODULE_AUTHOR("Michael Buesch");
61 MODULE_LICENSE("GPL");
63 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
64 static int modparam_pio;
65 module_param_named(pio, modparam_pio, int, 0444);
66 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
67 #elif defined(CONFIG_B43LEGACY_DMA)
68 # define modparam_pio 0
69 #elif defined(CONFIG_B43LEGACY_PIO)
70 # define modparam_pio 1
73 static int modparam_bad_frames_preempt;
74 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
75 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
78 static int modparam_short_retry = B43legacy_DEFAULT_SHORT_RETRY_LIMIT;
79 module_param_named(short_retry, modparam_short_retry, int, 0444);
80 MODULE_PARM_DESC(short_retry, "Short-Retry-Limit (0 - 15)");
82 static int modparam_long_retry = B43legacy_DEFAULT_LONG_RETRY_LIMIT;
83 module_param_named(long_retry, modparam_long_retry, int, 0444);
84 MODULE_PARM_DESC(long_retry, "Long-Retry-Limit (0 - 15)");
86 static char modparam_fwpostfix[16];
87 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
88 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
90 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
91 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
92 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
93 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
96 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
99 /* Channel and ratetables are shared for all devices.
100 * They can't be const, because ieee80211 puts some precalculated
101 * data in there. This data is the same for all devices, so we don't
102 * get concurrency issues */
103 #define RATETAB_ENT(_rateid, _flags) \
105 .rate = B43legacy_RATE_TO_100KBPS(_rateid), \
110 static struct ieee80211_rate __b43legacy_ratetable[] = {
111 RATETAB_ENT(B43legacy_CCK_RATE_1MB, IEEE80211_RATE_CCK),
112 RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_CCK_2),
113 RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_CCK_2),
114 RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_CCK_2),
115 RATETAB_ENT(B43legacy_OFDM_RATE_6MB, IEEE80211_RATE_OFDM),
116 RATETAB_ENT(B43legacy_OFDM_RATE_9MB, IEEE80211_RATE_OFDM),
117 RATETAB_ENT(B43legacy_OFDM_RATE_12MB, IEEE80211_RATE_OFDM),
118 RATETAB_ENT(B43legacy_OFDM_RATE_18MB, IEEE80211_RATE_OFDM),
119 RATETAB_ENT(B43legacy_OFDM_RATE_24MB, IEEE80211_RATE_OFDM),
120 RATETAB_ENT(B43legacy_OFDM_RATE_36MB, IEEE80211_RATE_OFDM),
121 RATETAB_ENT(B43legacy_OFDM_RATE_48MB, IEEE80211_RATE_OFDM),
122 RATETAB_ENT(B43legacy_OFDM_RATE_54MB, IEEE80211_RATE_OFDM),
124 #define b43legacy_a_ratetable (__b43legacy_ratetable + 4)
125 #define b43legacy_a_ratetable_size 8
126 #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
127 #define b43legacy_b_ratetable_size 4
128 #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
129 #define b43legacy_g_ratetable_size 12
131 #define CHANTAB_ENT(_chanid, _freq) \
136 .flag = IEEE80211_CHAN_W_SCAN | \
137 IEEE80211_CHAN_W_ACTIVE_SCAN | \
138 IEEE80211_CHAN_W_IBSS, \
139 .power_level = 0x0A, \
140 .antenna_max = 0xFF, \
142 static struct ieee80211_channel b43legacy_bg_chantable[] = {
143 CHANTAB_ENT(1, 2412),
144 CHANTAB_ENT(2, 2417),
145 CHANTAB_ENT(3, 2422),
146 CHANTAB_ENT(4, 2427),
147 CHANTAB_ENT(5, 2432),
148 CHANTAB_ENT(6, 2437),
149 CHANTAB_ENT(7, 2442),
150 CHANTAB_ENT(8, 2447),
151 CHANTAB_ENT(9, 2452),
152 CHANTAB_ENT(10, 2457),
153 CHANTAB_ENT(11, 2462),
154 CHANTAB_ENT(12, 2467),
155 CHANTAB_ENT(13, 2472),
156 CHANTAB_ENT(14, 2484),
158 #define b43legacy_bg_chantable_size ARRAY_SIZE(b43legacy_bg_chantable)
160 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
161 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
162 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
163 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
166 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
168 if (!wl || !wl->current_dev)
170 if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
172 /* We are up and running.
173 * Ratelimit the messages to avoid DoS over the net. */
174 return net_ratelimit();
177 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
181 if (!b43legacy_ratelimit(wl))
184 printk(KERN_INFO "b43legacy-%s: ",
185 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
190 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
194 if (!b43legacy_ratelimit(wl))
197 printk(KERN_ERR "b43legacy-%s ERROR: ",
198 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
203 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
207 if (!b43legacy_ratelimit(wl))
210 printk(KERN_WARNING "b43legacy-%s warning: ",
211 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
217 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
222 printk(KERN_DEBUG "b43legacy-%s debug: ",
223 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
229 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
234 B43legacy_WARN_ON(offset % 4 != 0);
236 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
237 if (status & B43legacy_SBF_XFER_REG_BYTESWAP)
240 b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
242 b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
246 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
247 u16 routing, u16 offset)
251 /* "offset" is the WORD offset. */
256 b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
259 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
260 u16 routing, u16 offset)
264 if (routing == B43legacy_SHM_SHARED) {
265 B43legacy_WARN_ON((offset & 0x0001) != 0);
266 if (offset & 0x0003) {
267 /* Unaligned access */
268 b43legacy_shm_control_word(dev, routing, offset >> 2);
269 ret = b43legacy_read16(dev,
270 B43legacy_MMIO_SHM_DATA_UNALIGNED);
272 b43legacy_shm_control_word(dev, routing,
274 ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
280 b43legacy_shm_control_word(dev, routing, offset);
281 ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
286 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
287 u16 routing, u16 offset)
291 if (routing == B43legacy_SHM_SHARED) {
292 B43legacy_WARN_ON((offset & 0x0001) != 0);
293 if (offset & 0x0003) {
294 /* Unaligned access */
295 b43legacy_shm_control_word(dev, routing, offset >> 2);
296 ret = b43legacy_read16(dev,
297 B43legacy_MMIO_SHM_DATA_UNALIGNED);
303 b43legacy_shm_control_word(dev, routing, offset);
304 ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
309 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
310 u16 routing, u16 offset,
313 if (routing == B43legacy_SHM_SHARED) {
314 B43legacy_WARN_ON((offset & 0x0001) != 0);
315 if (offset & 0x0003) {
316 /* Unaligned access */
317 b43legacy_shm_control_word(dev, routing, offset >> 2);
319 b43legacy_write16(dev,
320 B43legacy_MMIO_SHM_DATA_UNALIGNED,
321 (value >> 16) & 0xffff);
323 b43legacy_shm_control_word(dev, routing,
326 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
332 b43legacy_shm_control_word(dev, routing, offset);
334 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
337 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
340 if (routing == B43legacy_SHM_SHARED) {
341 B43legacy_WARN_ON((offset & 0x0001) != 0);
342 if (offset & 0x0003) {
343 /* Unaligned access */
344 b43legacy_shm_control_word(dev, routing, offset >> 2);
346 b43legacy_write16(dev,
347 B43legacy_MMIO_SHM_DATA_UNALIGNED,
353 b43legacy_shm_control_word(dev, routing, offset);
355 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
359 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
363 ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
364 B43legacy_SHM_SH_HOSTFHI);
366 ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
367 B43legacy_SHM_SH_HOSTFLO);
372 /* Write HostFlags */
373 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
375 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
376 B43legacy_SHM_SH_HOSTFLO,
377 (value & 0x0000FFFF));
378 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
379 B43legacy_SHM_SH_HOSTFHI,
380 ((value & 0xFFFF0000) >> 16));
383 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
385 /* We need to be careful. As we read the TSF from multiple
386 * registers, we should take care of register overflows.
387 * In theory, the whole tsf read process should be atomic.
388 * We try to be atomic here, by restaring the read process,
389 * if any of the high registers changed (overflew).
391 if (dev->dev->id.revision >= 3) {
397 high = b43legacy_read32(dev,
398 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
399 low = b43legacy_read32(dev,
400 B43legacy_MMIO_REV3PLUS_TSF_LOW);
401 high2 = b43legacy_read32(dev,
402 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
403 } while (unlikely(high != high2));
419 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
420 v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
421 v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
422 v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
424 test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
425 test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
426 test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
427 } while (v3 != test3 || v2 != test2 || v1 != test1);
441 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
445 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
446 status |= B43legacy_SBF_TIME_UPDATE;
447 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
451 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
455 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
456 status &= ~B43legacy_SBF_TIME_UPDATE;
457 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
460 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
462 /* Be careful with the in-progress timer.
463 * First zero out the low register, so we have a full
464 * register-overflow duration to complete the operation.
466 if (dev->dev->id.revision >= 3) {
467 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
468 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
470 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
472 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
475 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
478 u16 v0 = (tsf & 0x000000000000FFFFULL);
479 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
480 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
481 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
483 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
485 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
487 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
489 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
491 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
495 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
497 b43legacy_time_lock(dev);
498 b43legacy_tsf_write_locked(dev, tsf);
499 b43legacy_time_unlock(dev);
503 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
504 u16 offset, const u8 *mac)
506 static const u8 zero_addr[ETH_ALEN] = { 0 };
513 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
517 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
520 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
523 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
526 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
528 static const u8 zero_addr[ETH_ALEN] = { 0 };
529 const u8 *mac = dev->wl->mac_addr;
530 const u8 *bssid = dev->wl->bssid;
531 u8 mac_bssid[ETH_ALEN * 2];
540 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
542 memcpy(mac_bssid, mac, ETH_ALEN);
543 memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
545 /* Write our MAC address and BSSID to template ram */
546 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
547 tmp = (u32)(mac_bssid[i + 0]);
548 tmp |= (u32)(mac_bssid[i + 1]) << 8;
549 tmp |= (u32)(mac_bssid[i + 2]) << 16;
550 tmp |= (u32)(mac_bssid[i + 3]) << 24;
551 b43legacy_ram_write(dev, 0x20 + i, tmp);
552 b43legacy_ram_write(dev, 0x78 + i, tmp);
553 b43legacy_ram_write(dev, 0x478 + i, tmp);
557 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
559 b43legacy_write_mac_bssid_templates(dev);
560 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
564 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
567 /* slot_time is in usec. */
568 if (dev->phy.type != B43legacy_PHYTYPE_G)
570 b43legacy_write16(dev, 0x684, 510 + slot_time);
571 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
575 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
577 b43legacy_set_slot_time(dev, 9);
581 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
583 b43legacy_set_slot_time(dev, 20);
587 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
588 * Returns the _previously_ enabled IRQ mask.
590 static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
595 old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
596 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
602 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
603 * Returns the _previously_ enabled IRQ mask.
605 static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
610 old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
611 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
616 /* Synchronize IRQ top- and bottom-half.
617 * IRQs must be masked before calling this.
618 * This must not be called with the irq_lock held.
620 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
622 synchronize_irq(dev->dev->irq);
623 tasklet_kill(&dev->isr_tasklet);
626 /* DummyTransmission function, as documented on
627 * http://bcm-specs.sipsolutions.net/DummyTransmission
629 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
631 struct b43legacy_phy *phy = &dev->phy;
633 unsigned int max_loop;
644 case B43legacy_PHYTYPE_B:
645 case B43legacy_PHYTYPE_G:
647 buffer[0] = 0x000B846E;
654 for (i = 0; i < 5; i++)
655 b43legacy_ram_write(dev, i * 4, buffer[i]);
657 /* dummy read follows */
658 b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
660 b43legacy_write16(dev, 0x0568, 0x0000);
661 b43legacy_write16(dev, 0x07C0, 0x0000);
662 b43legacy_write16(dev, 0x050C, 0x0000);
663 b43legacy_write16(dev, 0x0508, 0x0000);
664 b43legacy_write16(dev, 0x050A, 0x0000);
665 b43legacy_write16(dev, 0x054C, 0x0000);
666 b43legacy_write16(dev, 0x056A, 0x0014);
667 b43legacy_write16(dev, 0x0568, 0x0826);
668 b43legacy_write16(dev, 0x0500, 0x0000);
669 b43legacy_write16(dev, 0x0502, 0x0030);
671 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
672 b43legacy_radio_write16(dev, 0x0051, 0x0017);
673 for (i = 0x00; i < max_loop; i++) {
674 value = b43legacy_read16(dev, 0x050E);
679 for (i = 0x00; i < 0x0A; i++) {
680 value = b43legacy_read16(dev, 0x050E);
685 for (i = 0x00; i < 0x0A; i++) {
686 value = b43legacy_read16(dev, 0x0690);
687 if (!(value & 0x0100))
691 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
692 b43legacy_radio_write16(dev, 0x0051, 0x0037);
695 /* Turn the Analog ON/OFF */
696 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
698 b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
701 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
706 flags |= B43legacy_TMSLOW_PHYCLKEN;
707 flags |= B43legacy_TMSLOW_PHYRESET;
708 ssb_device_enable(dev->dev, flags);
709 msleep(2); /* Wait for the PLL to turn on. */
711 /* Now take the PHY out of Reset again */
712 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
713 tmslow |= SSB_TMSLOW_FGC;
714 tmslow &= ~B43legacy_TMSLOW_PHYRESET;
715 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
716 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
718 tmslow &= ~SSB_TMSLOW_FGC;
719 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
720 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
724 b43legacy_switch_analog(dev, 1);
726 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
727 macctl &= ~B43legacy_MACCTL_GMODE;
728 if (flags & B43legacy_TMSLOW_GMODE) {
729 macctl |= B43legacy_MACCTL_GMODE;
733 macctl |= B43legacy_MACCTL_IHR_ENABLED;
734 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
737 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
742 struct b43legacy_txstatus stat;
745 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
746 if (!(v0 & 0x00000001))
748 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
750 stat.cookie = (v0 >> 16);
751 stat.seq = (v1 & 0x0000FFFF);
752 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
753 tmp = (v0 & 0x0000FFFF);
754 stat.frame_count = ((tmp & 0xF000) >> 12);
755 stat.rts_count = ((tmp & 0x0F00) >> 8);
756 stat.supp_reason = ((tmp & 0x001C) >> 2);
757 stat.pm_indicated = !!(tmp & 0x0080);
758 stat.intermediate = !!(tmp & 0x0040);
759 stat.for_ampdu = !!(tmp & 0x0020);
760 stat.acked = !!(tmp & 0x0002);
762 b43legacy_handle_txstatus(dev, &stat);
766 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
770 if (dev->dev->id.revision < 5)
772 /* Read all entries from the microcode TXstatus FIFO
773 * and throw them away.
776 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
777 if (!(dummy & 0x00000001))
779 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
783 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
787 val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
789 val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
794 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
796 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
797 (jssi & 0x0000FFFF));
798 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
799 (jssi & 0xFFFF0000) >> 16);
802 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
804 b43legacy_jssi_write(dev, 0x7F7F7F7F);
805 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
806 b43legacy_read32(dev,
807 B43legacy_MMIO_STATUS2_BITFIELD)
809 B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
813 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
815 /* Top half of Link Quality calculation. */
817 if (dev->noisecalc.calculation_running)
819 dev->noisecalc.channel_at_start = dev->phy.channel;
820 dev->noisecalc.calculation_running = 1;
821 dev->noisecalc.nr_samples = 0;
823 b43legacy_generate_noise_sample(dev);
826 static void handle_irq_noise(struct b43legacy_wldev *dev)
828 struct b43legacy_phy *phy = &dev->phy;
835 /* Bottom half of Link Quality calculation. */
837 B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
838 if (dev->noisecalc.channel_at_start != phy->channel)
839 goto drop_calculation;
840 *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
841 if (noise[0] == 0x7F || noise[1] == 0x7F ||
842 noise[2] == 0x7F || noise[3] == 0x7F)
845 /* Get the noise samples. */
846 B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
847 i = dev->noisecalc.nr_samples;
848 noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
849 noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
850 noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
851 noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
852 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
853 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
854 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
855 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
856 dev->noisecalc.nr_samples++;
857 if (dev->noisecalc.nr_samples == 8) {
858 /* Calculate the Link Quality by the noise samples. */
860 for (i = 0; i < 8; i++) {
861 for (j = 0; j < 4; j++)
862 average += dev->noisecalc.samples[i][j];
868 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
870 tmp = (tmp / 128) & 0x1F;
880 dev->stats.link_noise = average;
882 dev->noisecalc.calculation_running = 0;
886 b43legacy_generate_noise_sample(dev);
889 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
891 if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
894 if (1/*FIXME: the last PSpoll frame was sent successfully */)
895 b43legacy_power_saving_ctl_bits(dev, -1, -1);
897 dev->reg124_set_0x4 = 0;
898 if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
899 dev->reg124_set_0x4 = 1;
902 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
904 if (!dev->reg124_set_0x4) /*FIXME rename this variable*/
906 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
907 b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD)
911 static void handle_irq_pmq(struct b43legacy_wldev *dev)
918 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
919 if (!(tmp & 0x00000008))
922 /* 16bit write is odd, but correct. */
923 b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
926 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
927 const u8 *data, u16 size,
929 u16 shm_size_offset, u8 rate)
933 struct b43legacy_plcp_hdr4 plcp;
936 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
937 b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
938 ram_offset += sizeof(u32);
939 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
940 * So leave the first two bytes of the next write blank.
942 tmp = (u32)(data[0]) << 16;
943 tmp |= (u32)(data[1]) << 24;
944 b43legacy_ram_write(dev, ram_offset, tmp);
945 ram_offset += sizeof(u32);
946 for (i = 2; i < size; i += sizeof(u32)) {
947 tmp = (u32)(data[i + 0]);
949 tmp |= (u32)(data[i + 1]) << 8;
951 tmp |= (u32)(data[i + 2]) << 16;
953 tmp |= (u32)(data[i + 3]) << 24;
954 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
956 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
957 size + sizeof(struct b43legacy_plcp_hdr6));
960 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
962 u16 shm_size_offset, u8 rate)
967 B43legacy_WARN_ON(!dev->cached_beacon);
968 len = min((size_t)dev->cached_beacon->len,
969 0x200 - sizeof(struct b43legacy_plcp_hdr6));
970 data = (const u8 *)(dev->cached_beacon->data);
971 b43legacy_write_template_common(dev, data,
973 shm_size_offset, rate);
976 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
977 u16 shm_offset, u16 size,
980 struct b43legacy_plcp_hdr4 plcp;
985 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
986 dur = ieee80211_generic_frame_duration(dev->wl->hw,
989 B43legacy_RATE_TO_100KBPS(rate));
990 /* Write PLCP in two parts and timing for packet transfer */
991 tmp = le32_to_cpu(plcp.data);
992 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
994 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
996 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1000 /* Instead of using custom probe response template, this function
1001 * just patches custom beacon template by:
1002 * 1) Changing packet type
1003 * 2) Patching duration field
1006 static u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1007 u16 *dest_size, u8 rate)
1016 struct ieee80211_hdr *hdr;
1018 B43legacy_WARN_ON(!dev->cached_beacon);
1019 src_size = dev->cached_beacon->len;
1020 src_data = (const u8 *)dev->cached_beacon->data;
1022 if (unlikely(src_size < 0x24)) {
1023 b43legacydbg(dev->wl, "b43legacy_generate_probe_resp: "
1024 "invalid beacon\n");
1028 dest_data = kmalloc(src_size, GFP_ATOMIC);
1029 if (unlikely(!dest_data))
1032 /* 0x24 is offset of first variable-len Information-Element
1035 memcpy(dest_data, src_data, 0x24);
1038 for (; src_pos < src_size - 2; src_pos += elem_size) {
1039 elem_size = src_data[src_pos + 1] + 2;
1040 if (src_data[src_pos] != 0x05) { /* TIM */
1041 memcpy(dest_data + dest_pos, src_data + src_pos,
1043 dest_pos += elem_size;
1046 *dest_size = dest_pos;
1047 hdr = (struct ieee80211_hdr *)dest_data;
1049 /* Set the frame control. */
1050 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1051 IEEE80211_STYPE_PROBE_RESP);
1052 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1055 B43legacy_RATE_TO_100KBPS(rate));
1056 hdr->duration_id = dur;
1061 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1063 u16 shm_size_offset, u8 rate)
1065 u8 *probe_resp_data;
1068 B43legacy_WARN_ON(!dev->cached_beacon);
1069 size = dev->cached_beacon->len;
1070 probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1071 if (unlikely(!probe_resp_data))
1074 /* Looks like PLCP headers plus packet timings are stored for
1075 * all possible basic rates
1077 b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1078 B43legacy_CCK_RATE_1MB);
1079 b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1080 B43legacy_CCK_RATE_2MB);
1081 b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1082 B43legacy_CCK_RATE_5MB);
1083 b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1084 B43legacy_CCK_RATE_11MB);
1086 size = min((size_t)size,
1087 0x200 - sizeof(struct b43legacy_plcp_hdr6));
1088 b43legacy_write_template_common(dev, probe_resp_data,
1090 shm_size_offset, rate);
1091 kfree(probe_resp_data);
1094 static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev *dev,
1095 struct sk_buff *beacon)
1097 if (dev->cached_beacon)
1098 kfree_skb(dev->cached_beacon);
1099 dev->cached_beacon = beacon;
1104 static void b43legacy_update_templates(struct b43legacy_wldev *dev)
1108 B43legacy_WARN_ON(!dev->cached_beacon);
1110 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1111 B43legacy_CCK_RATE_1MB);
1112 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1113 B43legacy_CCK_RATE_1MB);
1114 b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1115 B43legacy_CCK_RATE_11MB);
1117 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD);
1119 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, status);
1122 static void b43legacy_refresh_templates(struct b43legacy_wldev *dev,
1123 struct sk_buff *beacon)
1127 err = b43legacy_refresh_cached_beacon(dev, beacon);
1130 b43legacy_update_templates(dev);
1133 static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
1134 const u8 *ssid, u8 ssid_len)
1140 len = min((u16)ssid_len, (u16)0x100);
1141 for (i = 0; i < len; i += sizeof(u32)) {
1142 tmp = (u32)(ssid[i + 0]);
1144 tmp |= (u32)(ssid[i + 1]) << 8;
1146 tmp |= (u32)(ssid[i + 2]) << 16;
1148 tmp |= (u32)(ssid[i + 3]) << 24;
1149 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1152 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1156 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1159 b43legacy_time_lock(dev);
1160 if (dev->dev->id.revision >= 3)
1161 b43legacy_write32(dev, 0x188, (beacon_int << 16));
1163 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1164 b43legacy_write16(dev, 0x610, beacon_int);
1166 b43legacy_time_unlock(dev);
1169 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1173 if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
1176 dev->irq_savedstate &= ~B43legacy_IRQ_BEACON;
1177 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD);
1179 if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) {
1180 /* ACK beacon IRQ. */
1181 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1182 B43legacy_IRQ_BEACON);
1183 dev->irq_savedstate |= B43legacy_IRQ_BEACON;
1184 if (dev->cached_beacon)
1185 kfree_skb(dev->cached_beacon);
1186 dev->cached_beacon = NULL;
1189 if (!(status & 0x1)) {
1190 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1191 B43legacy_CCK_RATE_1MB);
1193 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
1196 if (!(status & 0x2)) {
1197 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1198 B43legacy_CCK_RATE_1MB);
1200 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
1205 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1209 /* Interrupt handler bottom-half */
1210 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1213 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1214 u32 merged_dma_reason = 0;
1216 unsigned long flags;
1218 spin_lock_irqsave(&dev->wl->irq_lock, flags);
1220 B43legacy_WARN_ON(b43legacy_status(dev) <
1221 B43legacy_STAT_INITIALIZED);
1223 reason = dev->irq_reason;
1224 for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1225 dma_reason[i] = dev->dma_reason[i];
1226 merged_dma_reason |= dma_reason[i];
1229 if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1230 b43legacyerr(dev->wl, "MAC transmission error\n");
1232 if (unlikely(reason & B43legacy_IRQ_PHY_TXERR))
1233 b43legacyerr(dev->wl, "PHY transmission error\n");
1235 if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1236 B43legacy_DMAIRQ_NONFATALMASK))) {
1237 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1238 b43legacyerr(dev->wl, "Fatal DMA error: "
1239 "0x%08X, 0x%08X, 0x%08X, "
1240 "0x%08X, 0x%08X, 0x%08X\n",
1241 dma_reason[0], dma_reason[1],
1242 dma_reason[2], dma_reason[3],
1243 dma_reason[4], dma_reason[5]);
1244 b43legacy_controller_restart(dev, "DMA error");
1246 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1249 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1250 b43legacyerr(dev->wl, "DMA error: "
1251 "0x%08X, 0x%08X, 0x%08X, "
1252 "0x%08X, 0x%08X, 0x%08X\n",
1253 dma_reason[0], dma_reason[1],
1254 dma_reason[2], dma_reason[3],
1255 dma_reason[4], dma_reason[5]);
1258 if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1259 handle_irq_ucode_debug(dev);
1260 if (reason & B43legacy_IRQ_TBTT_INDI)
1261 handle_irq_tbtt_indication(dev);
1262 if (reason & B43legacy_IRQ_ATIM_END)
1263 handle_irq_atim_end(dev);
1264 if (reason & B43legacy_IRQ_BEACON)
1265 handle_irq_beacon(dev);
1266 if (reason & B43legacy_IRQ_PMQ)
1267 handle_irq_pmq(dev);
1268 if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1270 if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1271 handle_irq_noise(dev);
1273 /* Check the DMA reason registers for received data. */
1274 if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1275 if (b43legacy_using_pio(dev))
1276 b43legacy_pio_rx(dev->pio.queue0);
1278 b43legacy_dma_rx(dev->dma.rx_ring0);
1280 B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1281 B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1282 if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1283 if (b43legacy_using_pio(dev))
1284 b43legacy_pio_rx(dev->pio.queue3);
1286 b43legacy_dma_rx(dev->dma.rx_ring3);
1288 B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1289 B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1291 if (reason & B43legacy_IRQ_TX_OK)
1292 handle_irq_transmit_status(dev);
1294 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1296 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1299 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1300 u16 base, int queueidx)
1304 rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1305 if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1306 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1308 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1311 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1313 if (b43legacy_using_pio(dev) &&
1314 (dev->dev->id.revision < 3) &&
1315 (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1316 /* Apply a PIO specific workaround to the dma_reasons */
1317 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1318 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1319 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1320 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1323 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1325 b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1326 dev->dma_reason[0]);
1327 b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1328 dev->dma_reason[1]);
1329 b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1330 dev->dma_reason[2]);
1331 b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1332 dev->dma_reason[3]);
1333 b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1334 dev->dma_reason[4]);
1335 b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1336 dev->dma_reason[5]);
1339 /* Interrupt handler top-half */
1340 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1342 irqreturn_t ret = IRQ_NONE;
1343 struct b43legacy_wldev *dev = dev_id;
1349 spin_lock(&dev->wl->irq_lock);
1351 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
1353 reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1354 if (reason == 0xffffffff) /* shared IRQ */
1357 reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
1361 dev->dma_reason[0] = b43legacy_read32(dev,
1362 B43legacy_MMIO_DMA0_REASON)
1364 dev->dma_reason[1] = b43legacy_read32(dev,
1365 B43legacy_MMIO_DMA1_REASON)
1367 dev->dma_reason[2] = b43legacy_read32(dev,
1368 B43legacy_MMIO_DMA2_REASON)
1370 dev->dma_reason[3] = b43legacy_read32(dev,
1371 B43legacy_MMIO_DMA3_REASON)
1373 dev->dma_reason[4] = b43legacy_read32(dev,
1374 B43legacy_MMIO_DMA4_REASON)
1376 dev->dma_reason[5] = b43legacy_read32(dev,
1377 B43legacy_MMIO_DMA5_REASON)
1380 b43legacy_interrupt_ack(dev, reason);
1381 /* disable all IRQs. They are enabled again in the bottom half. */
1382 dev->irq_savedstate = b43legacy_interrupt_disable(dev,
1384 /* save the reason code and call our bottom half. */
1385 dev->irq_reason = reason;
1386 tasklet_schedule(&dev->isr_tasklet);
1389 spin_unlock(&dev->wl->irq_lock);
1394 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1396 release_firmware(dev->fw.ucode);
1397 dev->fw.ucode = NULL;
1398 release_firmware(dev->fw.pcm);
1400 release_firmware(dev->fw.initvals);
1401 dev->fw.initvals = NULL;
1402 release_firmware(dev->fw.initvals_band);
1403 dev->fw.initvals_band = NULL;
1406 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1408 b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1409 "Drivers/b43#devicefirmware "
1410 "and download the correct firmware (version 3).\n");
1413 static int do_request_fw(struct b43legacy_wldev *dev,
1415 const struct firmware **fw)
1417 char path[sizeof(modparam_fwpostfix) + 32];
1418 struct b43legacy_fw_header *hdr;
1425 snprintf(path, ARRAY_SIZE(path),
1426 "b43legacy%s/%s.fw",
1427 modparam_fwpostfix, name);
1428 err = request_firmware(fw, path, dev->dev->dev);
1430 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1431 "or load failed.\n", path);
1434 if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1436 hdr = (struct b43legacy_fw_header *)((*fw)->data);
1437 switch (hdr->type) {
1438 case B43legacy_FW_TYPE_UCODE:
1439 case B43legacy_FW_TYPE_PCM:
1440 size = be32_to_cpu(hdr->size);
1441 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1444 case B43legacy_FW_TYPE_IV:
1455 b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1459 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1461 struct b43legacy_firmware *fw = &dev->fw;
1462 const u8 rev = dev->dev->id.revision;
1463 const char *filename;
1467 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1470 filename = "ucode2";
1472 filename = "ucode4";
1474 filename = "ucode5";
1475 err = do_request_fw(dev, filename, &fw->ucode);
1484 err = do_request_fw(dev, filename, &fw->pcm);
1488 if (!fw->initvals) {
1489 switch (dev->phy.type) {
1490 case B43legacy_PHYTYPE_G:
1491 if ((rev >= 5) && (rev <= 10))
1492 filename = "b0g0initvals5";
1493 else if (rev == 2 || rev == 4)
1494 filename = "b0g0initvals2";
1496 goto err_no_initvals;
1499 goto err_no_initvals;
1501 err = do_request_fw(dev, filename, &fw->initvals);
1505 if (!fw->initvals_band) {
1506 switch (dev->phy.type) {
1507 case B43legacy_PHYTYPE_G:
1508 if ((rev >= 5) && (rev <= 10))
1509 filename = "b0g0bsinitvals5";
1512 else if (rev == 2 || rev == 4)
1515 goto err_no_initvals;
1518 goto err_no_initvals;
1520 err = do_request_fw(dev, filename, &fw->initvals_band);
1528 b43legacy_print_fw_helptext(dev->wl);
1533 b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1534 "core rev %u\n", dev->phy.type, rev);
1538 b43legacy_release_firmware(dev);
1542 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1544 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1555 /* Upload Microcode. */
1556 data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1557 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1558 b43legacy_shm_control_word(dev,
1559 B43legacy_SHM_UCODE |
1560 B43legacy_SHM_AUTOINC_W,
1562 for (i = 0; i < len; i++) {
1563 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1564 be32_to_cpu(data[i]));
1569 /* Upload PCM data. */
1570 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1571 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1572 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1573 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1574 /* No need for autoinc bit in SHM_HW */
1575 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1576 for (i = 0; i < len; i++) {
1577 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1578 be32_to_cpu(data[i]));
1583 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1585 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0x00020402);
1587 /* Wait for the microcode to load and respond */
1590 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1591 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1594 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1595 b43legacyerr(dev->wl, "Microcode not responding\n");
1596 b43legacy_print_fw_helptext(dev->wl);
1602 /* dummy read follows */
1603 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1605 /* Get and check the revisions. */
1606 fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1607 B43legacy_SHM_SH_UCODEREV);
1608 fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1609 B43legacy_SHM_SH_UCODEPATCH);
1610 fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1611 B43legacy_SHM_SH_UCODEDATE);
1612 fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1613 B43legacy_SHM_SH_UCODETIME);
1615 if (fwrev > 0x128) {
1616 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1617 " Only firmware from binary drivers version 3.x"
1618 " is supported. You must change your firmware"
1620 b43legacy_print_fw_helptext(dev->wl);
1621 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0);
1625 b43legacydbg(dev->wl, "Loading firmware version 0x%X, patch level %u "
1626 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1627 (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1628 (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, fwtime & 0x1F);
1630 dev->fw.rev = fwrev;
1631 dev->fw.patch = fwpatch;
1637 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1638 const struct b43legacy_iv *ivals,
1642 const struct b43legacy_iv *iv;
1647 BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1649 for (i = 0; i < count; i++) {
1650 if (array_size < sizeof(iv->offset_size))
1652 array_size -= sizeof(iv->offset_size);
1653 offset = be16_to_cpu(iv->offset_size);
1654 bit32 = !!(offset & B43legacy_IV_32BIT);
1655 offset &= B43legacy_IV_OFFSET_MASK;
1656 if (offset >= 0x1000)
1661 if (array_size < sizeof(iv->data.d32))
1663 array_size -= sizeof(iv->data.d32);
1665 value = be32_to_cpu(get_unaligned(&iv->data.d32));
1666 b43legacy_write32(dev, offset, value);
1668 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1674 if (array_size < sizeof(iv->data.d16))
1676 array_size -= sizeof(iv->data.d16);
1678 value = be16_to_cpu(iv->data.d16);
1679 b43legacy_write16(dev, offset, value);
1681 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1692 b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1693 b43legacy_print_fw_helptext(dev->wl);
1698 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1700 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1701 const struct b43legacy_fw_header *hdr;
1702 struct b43legacy_firmware *fw = &dev->fw;
1703 const struct b43legacy_iv *ivals;
1707 hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1708 ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1709 count = be32_to_cpu(hdr->size);
1710 err = b43legacy_write_initvals(dev, ivals, count,
1711 fw->initvals->size - hdr_len);
1714 if (fw->initvals_band) {
1715 hdr = (const struct b43legacy_fw_header *)
1716 (fw->initvals_band->data);
1717 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1719 count = be32_to_cpu(hdr->size);
1720 err = b43legacy_write_initvals(dev, ivals, count,
1721 fw->initvals_band->size - hdr_len);
1730 /* Initialize the GPIOs
1731 * http://bcm-specs.sipsolutions.net/GPIO
1733 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1735 struct ssb_bus *bus = dev->dev->bus;
1736 struct ssb_device *gpiodev, *pcidev = NULL;
1740 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1741 b43legacy_read32(dev,
1742 B43legacy_MMIO_STATUS_BITFIELD)
1745 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1746 b43legacy_read16(dev,
1747 B43legacy_MMIO_GPIO_MASK)
1752 if (dev->dev->bus->chip_id == 0x4301) {
1756 if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_PACTRL) {
1757 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1758 b43legacy_read16(dev,
1759 B43legacy_MMIO_GPIO_MASK)
1764 if (dev->dev->id.revision >= 2)
1765 mask |= 0x0010; /* FIXME: This is redundant. */
1767 #ifdef CONFIG_SSB_DRIVER_PCICORE
1768 pcidev = bus->pcicore.dev;
1770 gpiodev = bus->chipco.dev ? : pcidev;
1773 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1774 (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1780 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1781 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1783 struct ssb_bus *bus = dev->dev->bus;
1784 struct ssb_device *gpiodev, *pcidev = NULL;
1786 #ifdef CONFIG_SSB_DRIVER_PCICORE
1787 pcidev = bus->pcicore.dev;
1789 gpiodev = bus->chipco.dev ? : pcidev;
1792 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1795 /* http://bcm-specs.sipsolutions.net/EnableMac */
1796 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1798 dev->mac_suspended--;
1799 B43legacy_WARN_ON(dev->mac_suspended < 0);
1800 if (dev->mac_suspended == 0) {
1801 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1802 b43legacy_read32(dev,
1803 B43legacy_MMIO_STATUS_BITFIELD)
1804 | B43legacy_SBF_MAC_ENABLED);
1805 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1806 B43legacy_IRQ_MAC_SUSPENDED);
1807 /* the next two are dummy reads */
1808 b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
1809 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1810 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1814 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1815 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1820 B43legacy_WARN_ON(dev->mac_suspended < 0);
1821 if (dev->mac_suspended == 0) {
1822 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1823 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1824 b43legacy_read32(dev,
1825 B43legacy_MMIO_STATUS_BITFIELD)
1826 & ~B43legacy_SBF_MAC_ENABLED);
1827 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1828 for (i = 10000; i; i--) {
1829 tmp = b43legacy_read32(dev,
1830 B43legacy_MMIO_GEN_IRQ_REASON);
1831 if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1835 b43legacyerr(dev->wl, "MAC suspend failed\n");
1838 dev->mac_suspended++;
1841 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1843 struct b43legacy_wl *wl = dev->wl;
1847 ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1848 /* Reset status to STA infrastructure mode. */
1849 ctl &= ~B43legacy_MACCTL_AP;
1850 ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1851 ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1852 ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1853 ctl &= ~B43legacy_MACCTL_PROMISC;
1854 ctl &= ~B43legacy_MACCTL_BEACPROMISC;
1855 ctl |= B43legacy_MACCTL_INFRA;
1857 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
1858 ctl |= B43legacy_MACCTL_AP;
1859 else if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_IBSS))
1860 ctl &= ~B43legacy_MACCTL_INFRA;
1862 if (wl->filter_flags & FIF_CONTROL)
1863 ctl |= B43legacy_MACCTL_KEEP_CTL;
1864 if (wl->filter_flags & FIF_FCSFAIL)
1865 ctl |= B43legacy_MACCTL_KEEP_BAD;
1866 if (wl->filter_flags & FIF_PLCPFAIL)
1867 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1868 if (wl->filter_flags & FIF_PROMISC_IN_BSS)
1869 ctl |= B43legacy_MACCTL_PROMISC;
1870 if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
1871 ctl |= B43legacy_MACCTL_BEACPROMISC;
1873 /* Workaround: On old hardware the HW-MAC-address-filter
1874 * doesn't work properly, so always run promisc in filter
1875 * it in software. */
1876 if (dev->dev->id.revision <= 4)
1877 ctl |= B43legacy_MACCTL_PROMISC;
1879 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
1882 if ((ctl & B43legacy_MACCTL_INFRA) &&
1883 !(ctl & B43legacy_MACCTL_AP)) {
1884 if (dev->dev->bus->chip_id == 0x4306 &&
1885 dev->dev->bus->chip_rev == 3)
1890 b43legacy_write16(dev, 0x612, cfp_pretbtt);
1893 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
1901 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
1904 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
1906 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
1907 b43legacy_shm_read16(dev,
1908 B43legacy_SHM_SHARED, offset));
1911 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
1913 switch (dev->phy.type) {
1914 case B43legacy_PHYTYPE_G:
1915 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
1916 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
1917 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
1918 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
1919 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
1920 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
1921 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
1923 case B43legacy_PHYTYPE_B:
1924 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
1925 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
1926 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
1927 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
1930 B43legacy_BUG_ON(1);
1934 /* Set the TX-Antenna for management frames sent by firmware. */
1935 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
1942 case B43legacy_ANTENNA0:
1943 ant |= B43legacy_TX4_PHY_ANT0;
1945 case B43legacy_ANTENNA1:
1946 ant |= B43legacy_TX4_PHY_ANT1;
1948 case B43legacy_ANTENNA_AUTO:
1949 ant |= B43legacy_TX4_PHY_ANTLAST;
1952 B43legacy_BUG_ON(1);
1955 /* FIXME We also need to set the other flags of the PHY control
1956 * field somewhere. */
1959 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1960 B43legacy_SHM_SH_BEACPHYCTL);
1961 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1962 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1963 B43legacy_SHM_SH_BEACPHYCTL, tmp);
1965 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1966 B43legacy_SHM_SH_ACKCTSPHYCTL);
1967 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1968 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1969 B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
1970 /* For Probe Resposes */
1971 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1972 B43legacy_SHM_SH_PRPHYCTL);
1973 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1974 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1975 B43legacy_SHM_SH_PRPHYCTL, tmp);
1978 /* Returns TRUE, if the radio is enabled in hardware. */
1979 static bool b43legacy_is_hw_radio_enabled(struct b43legacy_wldev *dev)
1981 if (dev->phy.rev >= 3) {
1982 if (!(b43legacy_read32(dev, B43legacy_MMIO_RADIO_HWENABLED_HI)
1983 & B43legacy_MMIO_RADIO_HWENABLED_HI_MASK))
1986 if (b43legacy_read16(dev, B43legacy_MMIO_RADIO_HWENABLED_LO)
1987 & B43legacy_MMIO_RADIO_HWENABLED_LO_MASK)
1993 /* This is the opposite of b43legacy_chip_init() */
1994 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
1996 b43legacy_radio_turn_off(dev);
1997 b43legacy_leds_exit(dev);
1998 b43legacy_gpio_cleanup(dev);
1999 /* firmware is released later */
2002 /* Initialize the chip
2003 * http://bcm-specs.sipsolutions.net/ChipInit
2005 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2007 struct b43legacy_phy *phy = &dev->phy;
2013 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
2014 B43legacy_SBF_CORE_READY
2015 | B43legacy_SBF_400);
2017 err = b43legacy_request_firmware(dev);
2020 err = b43legacy_upload_microcode(dev);
2022 goto out; /* firmware is released later */
2024 err = b43legacy_gpio_init(dev);
2026 goto out; /* firmware is released later */
2027 b43legacy_leds_init(dev);
2029 err = b43legacy_upload_initvals(dev);
2032 b43legacy_radio_turn_on(dev);
2034 b43legacy_write16(dev, 0x03E6, 0x0000);
2035 err = b43legacy_phy_init(dev);
2039 /* Select initial Interference Mitigation. */
2040 tmp = phy->interfmode;
2041 phy->interfmode = B43legacy_INTERFMODE_NONE;
2042 b43legacy_radio_set_interference_mitigation(dev, tmp);
2044 b43legacy_phy_set_antenna_diversity(dev);
2045 b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2047 if (phy->type == B43legacy_PHYTYPE_B) {
2048 value16 = b43legacy_read16(dev, 0x005E);
2050 b43legacy_write16(dev, 0x005E, value16);
2052 b43legacy_write32(dev, 0x0100, 0x01000000);
2053 if (dev->dev->id.revision < 5)
2054 b43legacy_write32(dev, 0x010C, 0x01000000);
2056 value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
2057 value32 &= ~B43legacy_SBF_MODE_NOTADHOC;
2058 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
2059 value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
2060 value32 |= B43legacy_SBF_MODE_NOTADHOC;
2061 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
2063 if (b43legacy_using_pio(dev)) {
2064 b43legacy_write32(dev, 0x0210, 0x00000100);
2065 b43legacy_write32(dev, 0x0230, 0x00000100);
2066 b43legacy_write32(dev, 0x0250, 0x00000100);
2067 b43legacy_write32(dev, 0x0270, 0x00000100);
2068 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2072 /* Probe Response Timeout value */
2073 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2074 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2076 /* Initially set the wireless operation mode. */
2077 b43legacy_adjust_opmode(dev);
2079 if (dev->dev->id.revision < 3) {
2080 b43legacy_write16(dev, 0x060E, 0x0000);
2081 b43legacy_write16(dev, 0x0610, 0x8000);
2082 b43legacy_write16(dev, 0x0604, 0x0000);
2083 b43legacy_write16(dev, 0x0606, 0x0200);
2085 b43legacy_write32(dev, 0x0188, 0x80000000);
2086 b43legacy_write32(dev, 0x018C, 0x02000000);
2088 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2089 b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2090 b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2091 b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2092 b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2093 b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2094 b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2096 value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2097 value32 |= 0x00100000;
2098 ssb_write32(dev->dev, SSB_TMSLOW, value32);
2100 b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2101 dev->dev->bus->chipco.fast_pwrup_delay);
2103 B43legacy_WARN_ON(err != 0);
2104 b43legacydbg(dev->wl, "Chip initialized\n");
2109 b43legacy_radio_turn_off(dev);
2111 b43legacy_leds_exit(dev);
2112 b43legacy_gpio_cleanup(dev);
2116 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2118 struct b43legacy_phy *phy = &dev->phy;
2120 if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2123 b43legacy_mac_suspend(dev);
2124 b43legacy_phy_lo_g_measure(dev);
2125 b43legacy_mac_enable(dev);
2128 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2130 b43legacy_phy_lo_mark_all_unused(dev);
2131 if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_RSSI) {
2132 b43legacy_mac_suspend(dev);
2133 b43legacy_calc_nrssi_slope(dev);
2134 b43legacy_mac_enable(dev);
2138 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2140 /* Update device statistics. */
2141 b43legacy_calculate_link_quality(dev);
2144 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2146 b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2149 static void b43legacy_periodic_every1sec(struct b43legacy_wldev *dev)
2151 bool radio_hw_enable;
2153 /* check if radio hardware enabled status changed */
2154 radio_hw_enable = b43legacy_is_hw_radio_enabled(dev);
2155 if (unlikely(dev->radio_hw_enable != radio_hw_enable)) {
2156 dev->radio_hw_enable = radio_hw_enable;
2157 b43legacyinfo(dev->wl, "Radio hardware status changed to %s\n",
2158 (radio_hw_enable) ? "enabled" : "disabled");
2162 static void do_periodic_work(struct b43legacy_wldev *dev)
2166 state = dev->periodic_state;
2167 if (state % 120 == 0)
2168 b43legacy_periodic_every120sec(dev);
2169 if (state % 60 == 0)
2170 b43legacy_periodic_every60sec(dev);
2171 if (state % 30 == 0)
2172 b43legacy_periodic_every30sec(dev);
2173 if (state % 15 == 0)
2174 b43legacy_periodic_every15sec(dev);
2175 b43legacy_periodic_every1sec(dev);
2178 /* Estimate a "Badness" value based on the periodic work
2179 * state-machine state. "Badness" is worse (bigger), if the
2180 * periodic work will take longer.
2182 static int estimate_periodic_work_badness(unsigned int state)
2186 if (state % 120 == 0) /* every 120 sec */
2188 if (state % 60 == 0) /* every 60 sec */
2190 if (state % 30 == 0) /* every 30 sec */
2192 if (state % 15 == 0) /* every 15 sec */
2195 #define BADNESS_LIMIT 4
2199 static void b43legacy_periodic_work_handler(struct work_struct *work)
2201 struct b43legacy_wldev *dev =
2202 container_of(work, struct b43legacy_wldev,
2203 periodic_work.work);
2204 unsigned long flags;
2205 unsigned long delay;
2209 mutex_lock(&dev->wl->mutex);
2211 if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2213 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2216 badness = estimate_periodic_work_badness(dev->periodic_state);
2217 if (badness > BADNESS_LIMIT) {
2218 spin_lock_irqsave(&dev->wl->irq_lock, flags);
2219 /* Suspend TX as we don't want to transmit packets while
2220 * we recalibrate the hardware. */
2221 b43legacy_tx_suspend(dev);
2222 savedirqs = b43legacy_interrupt_disable(dev,
2224 /* Periodic work will take a long time, so we want it to
2225 * be preemtible and release the spinlock. */
2226 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
2227 b43legacy_synchronize_irq(dev);
2229 do_periodic_work(dev);
2231 spin_lock_irqsave(&dev->wl->irq_lock, flags);
2232 b43legacy_interrupt_enable(dev, savedirqs);
2233 b43legacy_tx_resume(dev);
2235 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
2237 /* Take the global driver lock. This will lock any operation. */
2238 spin_lock_irqsave(&dev->wl->irq_lock, flags);
2240 do_periodic_work(dev);
2243 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
2245 dev->periodic_state++;
2247 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2248 delay = msecs_to_jiffies(50);
2250 delay = round_jiffies_relative(HZ);
2251 queue_delayed_work(dev->wl->hw->workqueue,
2252 &dev->periodic_work, delay);
2254 mutex_unlock(&dev->wl->mutex);
2257 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2259 struct delayed_work *work = &dev->periodic_work;
2261 dev->periodic_state = 0;
2262 INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2263 queue_delayed_work(dev->wl->hw->workqueue, work, 0);
2266 /* Validate access to the chip (SHM) */
2267 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2272 shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2273 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2274 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2277 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2278 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2281 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2283 value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2284 if ((value | B43legacy_MACCTL_GMODE) !=
2285 (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2288 value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2294 b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2298 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2300 dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2301 B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2302 dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2304 /* KTP is a word address, but we address SHM bytewise.
2305 * So multiply by two.
2308 if (dev->dev->id.revision >= 5)
2309 /* Number of RCMTA address slots */
2310 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2311 dev->max_nr_keys - 8);
2314 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2316 struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2317 unsigned long flags;
2319 /* Don't take wl->mutex here, as it could deadlock with
2320 * hwrng internal locking. It's not needed to take
2321 * wl->mutex here, anyway. */
2323 spin_lock_irqsave(&wl->irq_lock, flags);
2324 *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2325 spin_unlock_irqrestore(&wl->irq_lock, flags);
2327 return (sizeof(u16));
2330 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2332 if (wl->rng_initialized)
2333 hwrng_unregister(&wl->rng);
2336 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2340 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2341 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2342 wl->rng.name = wl->rng_name;
2343 wl->rng.data_read = b43legacy_rng_read;
2344 wl->rng.priv = (unsigned long)wl;
2345 wl->rng_initialized = 1;
2346 err = hwrng_register(&wl->rng);
2348 wl->rng_initialized = 0;
2349 b43legacyerr(wl, "Failed to register the random "
2350 "number generator (%d)\n", err);
2356 static int b43legacy_tx(struct ieee80211_hw *hw,
2357 struct sk_buff *skb,
2358 struct ieee80211_tx_control *ctl)
2360 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2361 struct b43legacy_wldev *dev = wl->current_dev;
2363 unsigned long flags;
2367 if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2369 /* DMA-TX is done without a global lock. */
2370 if (b43legacy_using_pio(dev)) {
2371 spin_lock_irqsave(&wl->irq_lock, flags);
2372 err = b43legacy_pio_tx(dev, skb, ctl);
2373 spin_unlock_irqrestore(&wl->irq_lock, flags);
2375 err = b43legacy_dma_tx(dev, skb, ctl);
2378 return NETDEV_TX_BUSY;
2379 return NETDEV_TX_OK;
2382 static int b43legacy_conf_tx(struct ieee80211_hw *hw,
2384 const struct ieee80211_tx_queue_params *params)
2389 static int b43legacy_get_tx_stats(struct ieee80211_hw *hw,
2390 struct ieee80211_tx_queue_stats *stats)
2392 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2393 struct b43legacy_wldev *dev = wl->current_dev;
2394 unsigned long flags;
2399 spin_lock_irqsave(&wl->irq_lock, flags);
2400 if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2401 if (b43legacy_using_pio(dev))
2402 b43legacy_pio_get_tx_stats(dev, stats);
2404 b43legacy_dma_get_tx_stats(dev, stats);
2407 spin_unlock_irqrestore(&wl->irq_lock, flags);
2412 static int b43legacy_get_stats(struct ieee80211_hw *hw,
2413 struct ieee80211_low_level_stats *stats)
2415 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2416 unsigned long flags;
2418 spin_lock_irqsave(&wl->irq_lock, flags);
2419 memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2420 spin_unlock_irqrestore(&wl->irq_lock, flags);
2425 static const char *phymode_to_string(unsigned int phymode)
2428 case B43legacy_PHYMODE_B:
2430 case B43legacy_PHYMODE_G:
2433 B43legacy_BUG_ON(1);
2438 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2439 unsigned int phymode,
2440 struct b43legacy_wldev **dev,
2443 struct b43legacy_wldev *d;
2445 list_for_each_entry(d, &wl->devlist, list) {
2446 if (d->phy.possible_phymodes & phymode) {
2447 /* Ok, this device supports the PHY-mode.
2448 * Set the gmode bit. */
2459 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2461 struct ssb_device *sdev = dev->dev;
2464 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2465 tmslow &= ~B43legacy_TMSLOW_GMODE;
2466 tmslow |= B43legacy_TMSLOW_PHYRESET;
2467 tmslow |= SSB_TMSLOW_FGC;
2468 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2471 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2472 tmslow &= ~SSB_TMSLOW_FGC;
2473 tmslow |= B43legacy_TMSLOW_PHYRESET;
2474 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2478 /* Expects wl->mutex locked */
2479 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2480 unsigned int new_mode)
2482 struct b43legacy_wldev *up_dev;
2483 struct b43legacy_wldev *down_dev;
2488 err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2490 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2491 phymode_to_string(new_mode));
2494 if ((up_dev == wl->current_dev) &&
2495 (!!wl->current_dev->phy.gmode == !!gmode))
2496 /* This device is already running. */
2498 b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2499 phymode_to_string(new_mode));
2500 down_dev = wl->current_dev;
2502 prev_status = b43legacy_status(down_dev);
2503 /* Shutdown the currently running core. */
2504 if (prev_status >= B43legacy_STAT_STARTED)
2505 b43legacy_wireless_core_stop(down_dev);
2506 if (prev_status >= B43legacy_STAT_INITIALIZED)
2507 b43legacy_wireless_core_exit(down_dev);
2509 if (down_dev != up_dev)
2510 /* We switch to a different core, so we put PHY into
2511 * RESET on the old core. */
2512 b43legacy_put_phy_into_reset(down_dev);
2514 /* Now start the new core. */
2515 up_dev->phy.gmode = gmode;
2516 if (prev_status >= B43legacy_STAT_INITIALIZED) {
2517 err = b43legacy_wireless_core_init(up_dev);
2519 b43legacyerr(wl, "Fatal: Could not initialize device"
2520 " for newly selected %s-PHY mode\n",
2521 phymode_to_string(new_mode));
2525 if (prev_status >= B43legacy_STAT_STARTED) {
2526 err = b43legacy_wireless_core_start(up_dev);
2528 b43legacyerr(wl, "Fatal: Coult not start device for "
2529 "newly selected %s-PHY mode\n",
2530 phymode_to_string(new_mode));
2531 b43legacy_wireless_core_exit(up_dev);
2535 B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2537 b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2539 wl->current_dev = up_dev;
2543 /* Whoops, failed to init the new core. No core is operating now. */
2544 wl->current_dev = NULL;
2548 static int b43legacy_antenna_from_ieee80211(u8 antenna)
2551 case 0: /* default/diversity */
2552 return B43legacy_ANTENNA_DEFAULT;
2553 case 1: /* Antenna 0 */
2554 return B43legacy_ANTENNA0;
2555 case 2: /* Antenna 1 */
2556 return B43legacy_ANTENNA1;
2558 return B43legacy_ANTENNA_DEFAULT;
2562 static int b43legacy_dev_config(struct ieee80211_hw *hw,
2563 struct ieee80211_conf *conf)
2565 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2566 struct b43legacy_wldev *dev;
2567 struct b43legacy_phy *phy;
2568 unsigned long flags;
2569 unsigned int new_phymode = 0xFFFF;
2575 antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx);
2576 antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx);
2578 mutex_lock(&wl->mutex);
2580 /* Switch the PHY mode (if necessary). */
2581 switch (conf->phymode) {
2582 case MODE_IEEE80211B:
2583 new_phymode = B43legacy_PHYMODE_B;
2585 case MODE_IEEE80211G:
2586 new_phymode = B43legacy_PHYMODE_G;
2589 B43legacy_WARN_ON(1);
2591 err = b43legacy_switch_phymode(wl, new_phymode);
2593 goto out_unlock_mutex;
2594 dev = wl->current_dev;
2597 /* Disable IRQs while reconfiguring the device.
2598 * This makes it possible to drop the spinlock throughout
2599 * the reconfiguration process. */
2600 spin_lock_irqsave(&wl->irq_lock, flags);
2601 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2602 spin_unlock_irqrestore(&wl->irq_lock, flags);
2603 goto out_unlock_mutex;
2605 savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
2606 spin_unlock_irqrestore(&wl->irq_lock, flags);
2607 b43legacy_synchronize_irq(dev);
2609 /* Switch to the requested channel.
2610 * The firmware takes care of races with the TX handler. */
2611 if (conf->channel_val != phy->channel)
2612 b43legacy_radio_selectchannel(dev, conf->channel_val, 0);
2614 /* Enable/Disable ShortSlot timing. */
2615 if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
2616 != dev->short_slot) {
2617 B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
2618 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
2619 b43legacy_short_slot_timing_enable(dev);
2621 b43legacy_short_slot_timing_disable(dev);
2624 /* Adjust the desired TX power level. */
2625 if (conf->power_level != 0) {
2626 if (conf->power_level != phy->power_level) {
2627 phy->power_level = conf->power_level;
2628 b43legacy_phy_xmitpower(dev);
2632 /* Antennas for RX and management frame TX. */
2633 b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2635 /* Update templates for AP mode. */
2636 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
2637 b43legacy_set_beacon_int(dev, conf->beacon_int);
2640 if (!!conf->radio_enabled != phy->radio_on) {
2641 if (conf->radio_enabled) {
2642 b43legacy_radio_turn_on(dev);
2643 b43legacyinfo(dev->wl, "Radio turned on by software\n");
2644 if (!dev->radio_hw_enable)
2645 b43legacyinfo(dev->wl, "The hardware RF-kill"
2646 " button still turns the radio"
2647 " physically off. Press the"
2648 " button to turn it on.\n");
2650 b43legacy_radio_turn_off(dev);
2651 b43legacyinfo(dev->wl, "Radio turned off by"
2656 spin_lock_irqsave(&wl->irq_lock, flags);
2657 b43legacy_interrupt_enable(dev, savedirqs);
2659 spin_unlock_irqrestore(&wl->irq_lock, flags);
2661 mutex_unlock(&wl->mutex);
2666 static int b43legacy_dev_set_key(struct ieee80211_hw *hw,
2667 enum set_key_cmd cmd,
2668 const u8 *local_addr, const u8 *addr,
2669 struct ieee80211_key_conf *key)
2671 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2672 struct b43legacy_wldev *dev = wl->current_dev;
2673 unsigned long flags;
2674 int err = -EOPNOTSUPP;
2675 DECLARE_MAC_BUF(mac);
2679 mutex_lock(&wl->mutex);
2680 spin_lock_irqsave(&wl->irq_lock, flags);
2682 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
2685 spin_unlock_irqrestore(&wl->irq_lock, flags);
2686 mutex_unlock(&wl->mutex);
2687 b43legacydbg(wl, "Using software based encryption for "
2688 "mac: %s\n", print_mac(mac, addr));
2692 static void b43legacy_configure_filter(struct ieee80211_hw *hw,
2693 unsigned int changed,
2694 unsigned int *fflags,
2696 struct dev_addr_list *mc_list)
2698 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2699 struct b43legacy_wldev *dev = wl->current_dev;
2700 unsigned long flags;
2707 spin_lock_irqsave(&wl->irq_lock, flags);
2708 *fflags &= FIF_PROMISC_IN_BSS |
2714 FIF_BCN_PRBRESP_PROMISC;
2716 changed &= FIF_PROMISC_IN_BSS |
2722 FIF_BCN_PRBRESP_PROMISC;
2724 wl->filter_flags = *fflags;
2726 if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2727 b43legacy_adjust_opmode(dev);
2728 spin_unlock_irqrestore(&wl->irq_lock, flags);
2731 static int b43legacy_config_interface(struct ieee80211_hw *hw,
2733 struct ieee80211_if_conf *conf)
2735 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2736 struct b43legacy_wldev *dev = wl->current_dev;
2737 unsigned long flags;
2741 mutex_lock(&wl->mutex);
2742 spin_lock_irqsave(&wl->irq_lock, flags);
2743 B43legacy_WARN_ON(wl->if_id != if_id);
2745 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2747 memset(wl->bssid, 0, ETH_ALEN);
2748 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2749 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) {
2750 B43legacy_WARN_ON(conf->type != IEEE80211_IF_TYPE_AP);
2751 b43legacy_set_ssid(dev, conf->ssid, conf->ssid_len);
2753 b43legacy_refresh_templates(dev, conf->beacon);
2755 b43legacy_write_mac_bssid_templates(dev);
2757 spin_unlock_irqrestore(&wl->irq_lock, flags);
2758 mutex_unlock(&wl->mutex);
2763 /* Locking: wl->mutex */
2764 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2766 struct b43legacy_wl *wl = dev->wl;
2767 unsigned long flags;
2769 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2772 /* Disable and sync interrupts. We must do this before than
2773 * setting the status to INITIALIZED, as the interrupt handler
2774 * won't care about IRQs then. */
2775 spin_lock_irqsave(&wl->irq_lock, flags);
2776 dev->irq_savedstate = b43legacy_interrupt_disable(dev,
2778 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2779 spin_unlock_irqrestore(&wl->irq_lock, flags);
2780 b43legacy_synchronize_irq(dev);
2782 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2784 mutex_unlock(&wl->mutex);
2785 /* Must unlock as it would otherwise deadlock. No races here.
2786 * Cancel the possibly running self-rearming periodic work. */
2787 cancel_delayed_work_sync(&dev->periodic_work);
2788 mutex_lock(&wl->mutex);
2790 ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2792 b43legacy_mac_suspend(dev);
2793 free_irq(dev->dev->irq, dev);
2794 b43legacydbg(wl, "Wireless interface stopped\n");
2797 /* Locking: wl->mutex */
2798 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2802 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2804 drain_txstatus_queue(dev);
2805 err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2806 IRQF_SHARED, KBUILD_MODNAME, dev);
2808 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2812 /* We are ready to run. */
2813 b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2815 /* Start data flow (TX/RX) */
2816 b43legacy_mac_enable(dev);
2817 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
2818 ieee80211_start_queues(dev->wl->hw);
2820 /* Start maintenance work */
2821 b43legacy_periodic_tasks_setup(dev);
2823 b43legacydbg(dev->wl, "Wireless interface started\n");
2828 /* Get PHY and RADIO versioning numbers */
2829 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2831 struct b43legacy_phy *phy = &dev->phy;
2839 int unsupported = 0;
2841 /* Get PHY versioning */
2842 tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2843 analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2844 >> B43legacy_PHYVER_ANALOG_SHIFT;
2845 phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2846 phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2848 case B43legacy_PHYTYPE_B:
2849 if (phy_rev != 2 && phy_rev != 4
2850 && phy_rev != 6 && phy_rev != 7)
2853 case B43legacy_PHYTYPE_G:
2861 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2862 "(Analog %u, Type %u, Revision %u)\n",
2863 analog_type, phy_type, phy_rev);
2866 b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2867 analog_type, phy_type, phy_rev);
2870 /* Get RADIO versioning */
2871 if (dev->dev->bus->chip_id == 0x4317) {
2872 if (dev->dev->bus->chip_rev == 0)
2874 else if (dev->dev->bus->chip_rev == 1)
2879 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2880 B43legacy_RADIOCTL_ID);
2881 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2883 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2884 B43legacy_RADIOCTL_ID);
2885 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2887 radio_manuf = (tmp & 0x00000FFF);
2888 radio_ver = (tmp & 0x0FFFF000) >> 12;
2889 radio_rev = (tmp & 0xF0000000) >> 28;
2891 case B43legacy_PHYTYPE_B:
2892 if ((radio_ver & 0xFFF0) != 0x2050)
2895 case B43legacy_PHYTYPE_G:
2896 if (radio_ver != 0x2050)
2900 B43legacy_BUG_ON(1);
2903 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
2904 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2905 radio_manuf, radio_ver, radio_rev);
2908 b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
2909 " Revision %u\n", radio_manuf, radio_ver, radio_rev);
2912 phy->radio_manuf = radio_manuf;
2913 phy->radio_ver = radio_ver;
2914 phy->radio_rev = radio_rev;
2916 phy->analog = analog_type;
2917 phy->type = phy_type;
2923 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
2924 struct b43legacy_phy *phy)
2926 struct b43legacy_lopair *lo;
2929 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2930 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2934 /* Assume the radio is enabled. If it's not enabled, the state will
2935 * immediately get fixed on the first periodic work run. */
2936 dev->radio_hw_enable = 1;
2938 phy->savedpctlreg = 0xFFFF;
2939 phy->aci_enable = 0;
2940 phy->aci_wlan_automatic = 0;
2941 phy->aci_hw_rssi = 0;
2943 lo = phy->_lo_pairs;
2945 memset(lo, 0, sizeof(struct b43legacy_lopair) *
2946 B43legacy_LO_COUNT);
2947 phy->max_lb_gain = 0;
2948 phy->trsw_rx_gain = 0;
2950 /* Set default attenuation values. */
2951 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2952 phy->rfatt = b43legacy_default_radio_attenuation(dev);
2953 phy->txctl1 = b43legacy_default_txctl1(dev);
2954 phy->txpwr_offset = 0;
2957 phy->nrssislope = 0;
2958 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2959 phy->nrssi[i] = -1000;
2960 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2961 phy->nrssi_lt[i] = i;
2963 phy->lofcal = 0xFFFF;
2964 phy->initval = 0xFFFF;
2966 spin_lock_init(&phy->lock);
2967 phy->interfmode = B43legacy_INTERFMODE_NONE;
2968 phy->channel = 0xFF;
2971 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
2974 dev->reg124_set_0x4 = 0;
2977 memset(&dev->stats, 0, sizeof(dev->stats));
2979 setup_struct_phy_for_init(dev, &dev->phy);
2981 /* IRQ related flags */
2982 dev->irq_reason = 0;
2983 memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
2984 dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
2986 dev->mac_suspended = 1;
2988 /* Noise calculation context */
2989 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
2992 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
2994 #ifdef CONFIG_SSB_DRIVER_PCICORE
2995 struct ssb_bus *bus = dev->dev->bus;
2998 if (bus->pcicore.dev &&
2999 bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
3000 bus->pcicore.dev->id.revision <= 5) {
3001 /* IMCFGLO timeouts workaround. */
3002 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
3003 tmp &= ~SSB_IMCFGLO_REQTO;
3004 tmp &= ~SSB_IMCFGLO_SERTO;
3005 switch (bus->bustype) {
3006 case SSB_BUSTYPE_PCI:
3007 case SSB_BUSTYPE_PCMCIA:
3010 case SSB_BUSTYPE_SSB:
3014 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
3016 #endif /* CONFIG_SSB_DRIVER_PCICORE */
3019 /* Shutdown a wireless core */
3020 /* Locking: wl->mutex */
3021 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3023 struct b43legacy_wl *wl = dev->wl;
3024 struct b43legacy_phy *phy = &dev->phy;
3026 B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3027 if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3029 b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3031 mutex_unlock(&wl->mutex);
3032 /* Must unlock as it would otherwise deadlock. No races here.
3033 * Cancel possibly pending workqueues. */
3034 cancel_work_sync(&dev->restart_work);
3035 mutex_lock(&wl->mutex);
3037 b43legacy_rng_exit(dev->wl);
3038 b43legacy_pio_free(dev);
3039 b43legacy_dma_free(dev);
3040 b43legacy_chip_exit(dev);
3041 b43legacy_radio_turn_off(dev);
3042 b43legacy_switch_analog(dev, 0);
3043 if (phy->dyn_tssi_tbl)
3044 kfree(phy->tssi2dbm);
3045 kfree(phy->lo_control);
3046 phy->lo_control = NULL;
3047 ssb_device_disable(dev->dev, 0);
3048 ssb_bus_may_powerdown(dev->dev->bus);
3051 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3053 struct b43legacy_phy *phy = &dev->phy;
3056 /* Set default attenuation values. */
3057 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3058 phy->rfatt = b43legacy_default_radio_attenuation(dev);
3059 phy->txctl1 = b43legacy_default_txctl1(dev);
3060 phy->txctl2 = 0xFFFF;
3061 phy->txpwr_offset = 0;
3064 phy->nrssislope = 0;
3065 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3066 phy->nrssi[i] = -1000;
3067 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3068 phy->nrssi_lt[i] = i;
3070 phy->lofcal = 0xFFFF;
3071 phy->initval = 0xFFFF;
3073 phy->aci_enable = 0;
3074 phy->aci_wlan_automatic = 0;
3075 phy->aci_hw_rssi = 0;
3077 phy->antenna_diversity = 0xFFFF;
3078 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3079 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3082 phy->calibrated = 0;
3086 memset(phy->_lo_pairs, 0,
3087 sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3088 memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3091 /* Initialize a wireless core */
3092 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3094 struct b43legacy_wl *wl = dev->wl;
3095 struct ssb_bus *bus = dev->dev->bus;
3096 struct b43legacy_phy *phy = &dev->phy;
3097 struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3102 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3104 err = ssb_bus_powerup(bus, 0);
3107 if (!ssb_device_is_enabled(dev->dev)) {
3108 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3109 b43legacy_wireless_core_reset(dev, tmp);
3112 if ((phy->type == B43legacy_PHYTYPE_B) ||
3113 (phy->type == B43legacy_PHYTYPE_G)) {
3114 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3115 * B43legacy_LO_COUNT,
3117 if (!phy->_lo_pairs)
3120 setup_struct_wldev_for_init(dev);
3122 err = b43legacy_phy_init_tssi2dbm_table(dev);
3124 goto err_kfree_lo_control;
3126 /* Enable IRQ routing to this device. */
3127 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3129 b43legacy_imcfglo_timeouts_workaround(dev);
3130 prepare_phy_data_for_init(dev);
3131 b43legacy_phy_calibrate(dev);
3132 err = b43legacy_chip_init(dev);
3134 goto err_kfree_tssitbl;
3135 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3136 B43legacy_SHM_SH_WLCOREREV,
3137 dev->dev->id.revision);
3138 hf = b43legacy_hf_read(dev);
3139 if (phy->type == B43legacy_PHYTYPE_G) {
3140 hf |= B43legacy_HF_SYMW;
3142 hf |= B43legacy_HF_GDCW;
3143 if (sprom->r1.boardflags_lo & B43legacy_BFL_PACTRL)
3144 hf |= B43legacy_HF_OFDMPABOOST;
3145 } else if (phy->type == B43legacy_PHYTYPE_B) {
3146 hf |= B43legacy_HF_SYMW;
3147 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3148 hf &= ~B43legacy_HF_GDCW;
3150 b43legacy_hf_write(dev, hf);
3152 /* Short/Long Retry Limit.
3153 * The retry-limit is a 4-bit counter. Enforce this to avoid overflowing
3154 * the chip-internal counter.
3156 tmp = limit_value(modparam_short_retry, 0, 0xF);
3157 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3159 tmp = limit_value(modparam_long_retry, 0, 0xF);
3160 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3163 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3165 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3168 /* Disable sending probe responses from firmware.
3169 * Setting the MaxTime to one usec will always trigger
3170 * a timeout, so we never send any probe resp.
3171 * A timeout of zero is infinite. */
3172 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3173 B43legacy_SHM_SH_PRMAXTIME, 1);
3175 b43legacy_rate_memory_init(dev);
3177 /* Minimum Contention Window */
3178 if (phy->type == B43legacy_PHYTYPE_B)
3179 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3182 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3184 /* Maximum Contention Window */
3185 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3189 if (b43legacy_using_pio(dev))
3190 err = b43legacy_pio_init(dev);
3192 err = b43legacy_dma_init(dev);
3194 b43legacy_qos_init(dev);
3196 } while (err == -EAGAIN);
3200 b43legacy_write16(dev, 0x0612, 0x0050);
3201 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0416, 0x0050);
3202 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4);
3204 ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3205 memset(wl->bssid, 0, ETH_ALEN);
3206 memset(wl->mac_addr, 0, ETH_ALEN);
3207 b43legacy_upload_card_macaddress(dev);
3208 b43legacy_security_init(dev);
3209 b43legacy_rng_init(wl);
3211 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3217 b43legacy_chip_exit(dev);
3219 if (phy->dyn_tssi_tbl)
3220 kfree(phy->tssi2dbm);
3221 err_kfree_lo_control:
3222 kfree(phy->lo_control);
3223 phy->lo_control = NULL;
3224 ssb_bus_may_powerdown(bus);
3225 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3229 static int b43legacy_add_interface(struct ieee80211_hw *hw,
3230 struct ieee80211_if_init_conf *conf)
3232 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3233 struct b43legacy_wldev *dev;
3234 unsigned long flags;
3235 int err = -EOPNOTSUPP;
3237 /* TODO: allow WDS/AP devices to coexist */
3239 if (conf->type != IEEE80211_IF_TYPE_AP &&
3240 conf->type != IEEE80211_IF_TYPE_STA &&
3241 conf->type != IEEE80211_IF_TYPE_WDS &&
3242 conf->type != IEEE80211_IF_TYPE_IBSS)
3245 mutex_lock(&wl->mutex);
3247 goto out_mutex_unlock;
3249 b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
3251 dev = wl->current_dev;
3253 wl->if_id = conf->if_id;
3254 wl->if_type = conf->type;
3255 memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN);
3257 spin_lock_irqsave(&wl->irq_lock, flags);
3258 b43legacy_adjust_opmode(dev);
3259 b43legacy_upload_card_macaddress(dev);
3260 spin_unlock_irqrestore(&wl->irq_lock, flags);
3264 mutex_unlock(&wl->mutex);
3269 static void b43legacy_remove_interface(struct ieee80211_hw *hw,
3270 struct ieee80211_if_init_conf *conf)
3272 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3273 struct b43legacy_wldev *dev = wl->current_dev;
3274 unsigned long flags;
3276 b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
3278 mutex_lock(&wl->mutex);
3280 B43legacy_WARN_ON(!wl->operating);
3281 B43legacy_WARN_ON(wl->if_id != conf->if_id);
3285 spin_lock_irqsave(&wl->irq_lock, flags);
3286 b43legacy_adjust_opmode(dev);
3287 memset(wl->mac_addr, 0, ETH_ALEN);
3288 b43legacy_upload_card_macaddress(dev);
3289 spin_unlock_irqrestore(&wl->irq_lock, flags);
3291 mutex_unlock(&wl->mutex);
3294 static int b43legacy_start(struct ieee80211_hw *hw)
3296 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3297 struct b43legacy_wldev *dev = wl->current_dev;
3301 mutex_lock(&wl->mutex);
3303 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3304 err = b43legacy_wireless_core_init(dev);
3306 goto out_mutex_unlock;
3310 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3311 err = b43legacy_wireless_core_start(dev);
3314 b43legacy_wireless_core_exit(dev);
3315 goto out_mutex_unlock;
3320 mutex_unlock(&wl->mutex);
3325 static void b43legacy_stop(struct ieee80211_hw *hw)
3327 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3328 struct b43legacy_wldev *dev = wl->current_dev;
3330 mutex_lock(&wl->mutex);
3331 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3332 b43legacy_wireless_core_stop(dev);
3333 b43legacy_wireless_core_exit(dev);
3334 mutex_unlock(&wl->mutex);
3338 static const struct ieee80211_ops b43legacy_hw_ops = {
3340 .conf_tx = b43legacy_conf_tx,
3341 .add_interface = b43legacy_add_interface,
3342 .remove_interface = b43legacy_remove_interface,
3343 .config = b43legacy_dev_config,
3344 .config_interface = b43legacy_config_interface,
3345 .set_key = b43legacy_dev_set_key,
3346 .configure_filter = b43legacy_configure_filter,
3347 .get_stats = b43legacy_get_stats,
3348 .get_tx_stats = b43legacy_get_tx_stats,
3349 .start = b43legacy_start,
3350 .stop = b43legacy_stop,
3353 /* Hard-reset the chip. Do not call this directly.
3354 * Use b43legacy_controller_restart()
3356 static void b43legacy_chip_reset(struct work_struct *work)
3358 struct b43legacy_wldev *dev =
3359 container_of(work, struct b43legacy_wldev, restart_work);
3360 struct b43legacy_wl *wl = dev->wl;
3364 mutex_lock(&wl->mutex);
3366 prev_status = b43legacy_status(dev);
3367 /* Bring the device down... */
3368 if (prev_status >= B43legacy_STAT_STARTED)
3369 b43legacy_wireless_core_stop(dev);
3370 if (prev_status >= B43legacy_STAT_INITIALIZED)
3371 b43legacy_wireless_core_exit(dev);
3373 /* ...and up again. */
3374 if (prev_status >= B43legacy_STAT_INITIALIZED) {
3375 err = b43legacy_wireless_core_init(dev);
3379 if (prev_status >= B43legacy_STAT_STARTED) {
3380 err = b43legacy_wireless_core_start(dev);
3382 b43legacy_wireless_core_exit(dev);
3387 mutex_unlock(&wl->mutex);
3389 b43legacyerr(wl, "Controller restart FAILED\n");
3391 b43legacyinfo(wl, "Controller restarted\n");
3394 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3398 struct ieee80211_hw *hw = dev->wl->hw;
3399 struct ieee80211_hw_mode *mode;
3400 struct b43legacy_phy *phy = &dev->phy;
3404 phy->possible_phymodes = 0;
3407 B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3408 mode = &phy->hwmodes[cnt];
3410 mode->mode = MODE_IEEE80211B;
3411 mode->num_channels = b43legacy_bg_chantable_size;
3412 mode->channels = b43legacy_bg_chantable;
3413 mode->num_rates = b43legacy_b_ratetable_size;
3414 mode->rates = b43legacy_b_ratetable;
3415 err = ieee80211_register_hwmode(hw, mode);
3419 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3424 B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3425 mode = &phy->hwmodes[cnt];
3427 mode->mode = MODE_IEEE80211G;
3428 mode->num_channels = b43legacy_bg_chantable_size;
3429 mode->channels = b43legacy_bg_chantable;
3430 mode->num_rates = b43legacy_g_ratetable_size;
3431 mode->rates = b43legacy_g_ratetable;
3432 err = ieee80211_register_hwmode(hw, mode);
3436 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3446 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3448 /* We release firmware that late to not be required to re-request
3449 * is all the time when we reinit the core. */
3450 b43legacy_release_firmware(dev);
3453 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3455 struct b43legacy_wl *wl = dev->wl;
3456 struct ssb_bus *bus = dev->dev->bus;
3457 struct pci_dev *pdev = bus->host_pci;
3463 /* Do NOT do any device initialization here.
3464 * Do it in wireless_core_init() instead.
3465 * This function is for gathering basic information about the HW, only.
3466 * Also some structs may be set up here. But most likely you want to
3467 * have that in core_init(), too.
3470 err = ssb_bus_powerup(bus, 0);
3472 b43legacyerr(wl, "Bus powerup failed\n");
3475 /* Get the PHY type. */
3476 if (dev->dev->id.revision >= 5) {
3479 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3480 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3483 } else if (dev->dev->id.revision == 4)
3488 dev->phy.gmode = (have_gphy || have_bphy);
3489 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3490 b43legacy_wireless_core_reset(dev, tmp);
3492 err = b43legacy_phy_versioning(dev);
3495 /* Check if this device supports multiband. */
3497 (pdev->device != 0x4312 &&
3498 pdev->device != 0x4319 &&
3499 pdev->device != 0x4324)) {
3500 /* No multiband support. */
3503 switch (dev->phy.type) {
3504 case B43legacy_PHYTYPE_B:
3507 case B43legacy_PHYTYPE_G:
3511 B43legacy_BUG_ON(1);
3514 dev->phy.gmode = (have_gphy || have_bphy);
3515 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3516 b43legacy_wireless_core_reset(dev, tmp);
3518 err = b43legacy_validate_chipaccess(dev);
3521 err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3525 /* Now set some default "current_dev" */
3526 if (!wl->current_dev)
3527 wl->current_dev = dev;
3528 INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3530 b43legacy_radio_turn_off(dev);
3531 b43legacy_switch_analog(dev, 0);
3532 ssb_device_disable(dev->dev, 0);
3533 ssb_bus_may_powerdown(bus);
3539 ssb_bus_may_powerdown(bus);
3543 static void b43legacy_one_core_detach(struct ssb_device *dev)
3545 struct b43legacy_wldev *wldev;
3546 struct b43legacy_wl *wl;
3548 wldev = ssb_get_drvdata(dev);
3550 cancel_work_sync(&wldev->restart_work);
3551 b43legacy_debugfs_remove_device(wldev);
3552 b43legacy_wireless_core_detach(wldev);
3553 list_del(&wldev->list);
3555 ssb_set_drvdata(dev, NULL);
3559 static int b43legacy_one_core_attach(struct ssb_device *dev,
3560 struct b43legacy_wl *wl)
3562 struct b43legacy_wldev *wldev;
3563 struct pci_dev *pdev;
3566 if (!list_empty(&wl->devlist)) {
3567 /* We are not the first core on this chip. */
3568 pdev = dev->bus->host_pci;
3569 /* Only special chips support more than one wireless
3570 * core, although some of the other chips have more than
3571 * one wireless core as well. Check for this and
3575 ((pdev->device != 0x4321) &&
3576 (pdev->device != 0x4313) &&
3577 (pdev->device != 0x431A))) {
3578 b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3583 wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3589 b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3590 wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3591 tasklet_init(&wldev->isr_tasklet,
3592 (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3593 (unsigned long)wldev);
3595 wldev->__using_pio = 1;
3596 INIT_LIST_HEAD(&wldev->list);
3598 err = b43legacy_wireless_core_attach(wldev);
3600 goto err_kfree_wldev;
3602 list_add(&wldev->list, &wl->devlist);
3604 ssb_set_drvdata(dev, wldev);
3605 b43legacy_debugfs_add_device(wldev);
3614 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3616 /* boardflags workarounds */
3617 if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3618 bus->boardinfo.type == 0x4E &&
3619 bus->boardinfo.rev > 0x40)
3620 bus->sprom.r1.boardflags_lo |= B43legacy_BFL_PACTRL;
3622 /* Convert Antennagain values to Q5.2 */
3623 if (bus->sprom.r1.antenna_gain_bg == 0xFF)
3624 bus->sprom.r1.antenna_gain_bg = 2; /* if unset, use 2 dBm */
3625 bus->sprom.r1.antenna_gain_bg <<= 2;
3628 static void b43legacy_wireless_exit(struct ssb_device *dev,
3629 struct b43legacy_wl *wl)
3631 struct ieee80211_hw *hw = wl->hw;
3633 ssb_set_devtypedata(dev, NULL);
3634 ieee80211_free_hw(hw);
3637 static int b43legacy_wireless_init(struct ssb_device *dev)
3639 struct ssb_sprom *sprom = &dev->bus->sprom;
3640 struct ieee80211_hw *hw;
3641 struct b43legacy_wl *wl;
3644 b43legacy_sprom_fixup(dev->bus);
3646 hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3648 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3653 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
3654 IEEE80211_HW_RX_INCLUDES_FCS;
3655 hw->max_signal = 100;
3656 hw->max_rssi = -110;
3657 hw->max_noise = -110;
3658 hw->queues = 1; /* FIXME: hardware has more queues */
3659 SET_IEEE80211_DEV(hw, dev->dev);
3660 if (is_valid_ether_addr(sprom->r1.et1mac))
3661 SET_IEEE80211_PERM_ADDR(hw, sprom->r1.et1mac);
3663 SET_IEEE80211_PERM_ADDR(hw, sprom->r1.il0mac);
3665 /* Get and initialize struct b43legacy_wl */
3666 wl = hw_to_b43legacy_wl(hw);
3667 memset(wl, 0, sizeof(*wl));
3669 spin_lock_init(&wl->irq_lock);
3670 spin_lock_init(&wl->leds_lock);
3671 mutex_init(&wl->mutex);
3672 INIT_LIST_HEAD(&wl->devlist);
3674 ssb_set_devtypedata(dev, wl);
3675 b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3681 static int b43legacy_probe(struct ssb_device *dev,
3682 const struct ssb_device_id *id)
3684 struct b43legacy_wl *wl;
3688 wl = ssb_get_devtypedata(dev);
3690 /* Probing the first core - setup common struct b43legacy_wl */
3692 err = b43legacy_wireless_init(dev);
3695 wl = ssb_get_devtypedata(dev);
3696 B43legacy_WARN_ON(!wl);
3698 err = b43legacy_one_core_attach(dev, wl);
3700 goto err_wireless_exit;
3703 err = ieee80211_register_hw(wl->hw);
3705 goto err_one_core_detach;
3711 err_one_core_detach:
3712 b43legacy_one_core_detach(dev);
3715 b43legacy_wireless_exit(dev, wl);
3719 static void b43legacy_remove(struct ssb_device *dev)
3721 struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3722 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3724 B43legacy_WARN_ON(!wl);
3725 if (wl->current_dev == wldev)
3726 ieee80211_unregister_hw(wl->hw);
3728 b43legacy_one_core_detach(dev);
3730 if (list_empty(&wl->devlist))
3731 /* Last core on the chip unregistered.
3732 * We can destroy common struct b43legacy_wl.
3734 b43legacy_wireless_exit(dev, wl);
3737 /* Perform a hardware reset. This can be called from any context. */
3738 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3741 /* Must avoid requeueing, if we are in shutdown. */
3742 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3744 b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3745 queue_work(dev->wl->hw->workqueue, &dev->restart_work);
3750 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3752 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3753 struct b43legacy_wl *wl = wldev->wl;
3755 b43legacydbg(wl, "Suspending...\n");
3757 mutex_lock(&wl->mutex);
3758 wldev->suspend_init_status = b43legacy_status(wldev);
3759 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3760 b43legacy_wireless_core_stop(wldev);
3761 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3762 b43legacy_wireless_core_exit(wldev);
3763 mutex_unlock(&wl->mutex);
3765 b43legacydbg(wl, "Device suspended.\n");
3770 static int b43legacy_resume(struct ssb_device *dev)
3772 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3773 struct b43legacy_wl *wl = wldev->wl;
3776 b43legacydbg(wl, "Resuming...\n");
3778 mutex_lock(&wl->mutex);
3779 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3780 err = b43legacy_wireless_core_init(wldev);
3782 b43legacyerr(wl, "Resume failed at core init\n");
3786 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3787 err = b43legacy_wireless_core_start(wldev);
3789 b43legacy_wireless_core_exit(wldev);
3790 b43legacyerr(wl, "Resume failed at core start\n");
3794 mutex_unlock(&wl->mutex);
3796 b43legacydbg(wl, "Device resumed.\n");
3801 #else /* CONFIG_PM */
3802 # define b43legacy_suspend NULL
3803 # define b43legacy_resume NULL
3804 #endif /* CONFIG_PM */
3806 static struct ssb_driver b43legacy_ssb_driver = {
3807 .name = KBUILD_MODNAME,
3808 .id_table = b43legacy_ssb_tbl,
3809 .probe = b43legacy_probe,
3810 .remove = b43legacy_remove,
3811 .suspend = b43legacy_suspend,
3812 .resume = b43legacy_resume,
3815 static int __init b43legacy_init(void)
3819 b43legacy_debugfs_init();
3821 err = ssb_driver_register(&b43legacy_ssb_driver);
3828 b43legacy_debugfs_exit();
3832 static void __exit b43legacy_exit(void)
3834 ssb_driver_unregister(&b43legacy_ssb_driver);
3835 b43legacy_debugfs_exit();
3838 module_init(b43legacy_init)
3839 module_exit(b43legacy_exit)