err.no Git - linux-2.6/blob - drivers/net/wireless/b43legacy/main.c

   1 /*
   2  *
   3  *  Broadcom B43legacy wireless driver
   4  *
   5  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
   6  *  Copyright (c) 2005 Stefano Brivio <st3@riseup.net>
   7  *  Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
   8  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
   9  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  10  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  11  *
  12  *  Some parts of the code in this file are derived from the ipw2200
  13  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
  14
  15  *  This program is free software; you can redistribute it and/or modify
  16  *  it under the terms of the GNU General Public License as published by
  17  *  the Free Software Foundation; either version 2 of the License, or
  18  *  (at your option) any later version.
  19  *
  20  *  This program is distributed in the hope that it will be useful,
  21  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *  GNU General Public License for more details.
  24  *
  25  *  You should have received a copy of the GNU General Public License
  26  *  along with this program; see the file COPYING.  If not, write to
  27  *  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  28  *  Boston, MA 02110-1301, USA.
  29  *
  30  */
  31
  32 #include <linux/delay.h>
  33 #include <linux/init.h>
  34 #include <linux/moduleparam.h>
  35 #include <linux/if_arp.h>
  36 #include <linux/etherdevice.h>
  37 #include <linux/version.h>
  38 #include <linux/firmware.h>
  39 #include <linux/wireless.h>
  40 #include <linux/workqueue.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/dma-mapping.h>
  43 #include <net/dst.h>
  44 #include <asm/unaligned.h>
  45
  46 #include "b43legacy.h"
  47 #include "main.h"
  48 #include "debugfs.h"
  49 #include "phy.h"
  50 #include "dma.h"
  51 #include "pio.h"
  52 #include "sysfs.h"
  53 #include "xmit.h"
  54 #include "radio.h"
  55
  56
  57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
  58 MODULE_AUTHOR("Martin Langer");
  59 MODULE_AUTHOR("Stefano Brivio");
  60 MODULE_AUTHOR("Michael Buesch");
  61 MODULE_LICENSE("GPL");
  62
  63 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
  64 static int modparam_pio;
  65 module_param_named(pio, modparam_pio, int, 0444);
  66 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
  67 #elif defined(CONFIG_B43LEGACY_DMA)
  68 # define modparam_pio   0
  69 #elif defined(CONFIG_B43LEGACY_PIO)
  70 # define modparam_pio   1
  71 #endif
  72
  73 static int modparam_bad_frames_preempt;
  74 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  75 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
  76                  " Preemption");
  77
  78 static int modparam_short_retry = B43legacy_DEFAULT_SHORT_RETRY_LIMIT;
  79 module_param_named(short_retry, modparam_short_retry, int, 0444);
  80 MODULE_PARM_DESC(short_retry, "Short-Retry-Limit (0 - 15)");
  81
  82 static int modparam_long_retry = B43legacy_DEFAULT_LONG_RETRY_LIMIT;
  83 module_param_named(long_retry, modparam_long_retry, int, 0444);
  84 MODULE_PARM_DESC(long_retry, "Long-Retry-Limit (0 - 15)");
  85
  86 static char modparam_fwpostfix[16];
  87 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
  88 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
  89
  90 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
  91 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
  92         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
  93         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
  94         SSB_DEVTABLE_END
  95 };
  96 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
  97
  98
  99 /* Channel and ratetables are shared for all devices.
 100  * They can't be const, because ieee80211 puts some precalculated
 101  * data in there. This data is the same for all devices, so we don't
 102  * get concurrency issues */
 103 #define RATETAB_ENT(_rateid, _flags) \
 104         {                                                       \
 105                 .rate   = B43legacy_RATE_TO_100KBPS(_rateid),   \
 106                 .val    = (_rateid),                            \
 107                 .val2   = (_rateid),                            \
 108                 .flags  = (_flags),                             \
 109         }
 110 static struct ieee80211_rate __b43legacy_ratetable[] = {
 111         RATETAB_ENT(B43legacy_CCK_RATE_1MB, IEEE80211_RATE_CCK),
 112         RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_CCK_2),
 113         RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_CCK_2),
 114         RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_CCK_2),
 115         RATETAB_ENT(B43legacy_OFDM_RATE_6MB, IEEE80211_RATE_OFDM),
 116         RATETAB_ENT(B43legacy_OFDM_RATE_9MB, IEEE80211_RATE_OFDM),
 117         RATETAB_ENT(B43legacy_OFDM_RATE_12MB, IEEE80211_RATE_OFDM),
 118         RATETAB_ENT(B43legacy_OFDM_RATE_18MB, IEEE80211_RATE_OFDM),
 119         RATETAB_ENT(B43legacy_OFDM_RATE_24MB, IEEE80211_RATE_OFDM),
 120         RATETAB_ENT(B43legacy_OFDM_RATE_36MB, IEEE80211_RATE_OFDM),
 121         RATETAB_ENT(B43legacy_OFDM_RATE_48MB, IEEE80211_RATE_OFDM),
 122         RATETAB_ENT(B43legacy_OFDM_RATE_54MB, IEEE80211_RATE_OFDM),
 123 };
 124 #define b43legacy_a_ratetable           (__b43legacy_ratetable + 4)
 125 #define b43legacy_a_ratetable_size      8
 126 #define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
 127 #define b43legacy_b_ratetable_size      4
 128 #define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
 129 #define b43legacy_g_ratetable_size      12
 130
 131 #define CHANTAB_ENT(_chanid, _freq) \
 132         {                                                       \
 133                 .chan   = (_chanid),                            \
 134                 .freq   = (_freq),                              \
 135                 .val    = (_chanid),                            \
 136                 .flag   = IEEE80211_CHAN_W_SCAN |               \
 137                           IEEE80211_CHAN_W_ACTIVE_SCAN |        \
 138                           IEEE80211_CHAN_W_IBSS,                \
 139                 .power_level    = 0x0A,                         \
 140                 .antenna_max    = 0xFF,                         \
 141         }
 142 static struct ieee80211_channel b43legacy_bg_chantable[] = {
 143         CHANTAB_ENT(1, 2412),
 144         CHANTAB_ENT(2, 2417),
 145         CHANTAB_ENT(3, 2422),
 146         CHANTAB_ENT(4, 2427),
 147         CHANTAB_ENT(5, 2432),
 148         CHANTAB_ENT(6, 2437),
 149         CHANTAB_ENT(7, 2442),
 150         CHANTAB_ENT(8, 2447),
 151         CHANTAB_ENT(9, 2452),
 152         CHANTAB_ENT(10, 2457),
 153         CHANTAB_ENT(11, 2462),
 154         CHANTAB_ENT(12, 2467),
 155         CHANTAB_ENT(13, 2472),
 156         CHANTAB_ENT(14, 2484),
 157 };
 158 #define b43legacy_bg_chantable_size     ARRAY_SIZE(b43legacy_bg_chantable)
 159
 160 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
 161 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
 162 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
 163 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
 164
 165
 166 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
 167 {
 168         if (!wl || !wl->current_dev)
 169                 return 1;
 170         if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
 171                 return 1;
 172         /* We are up and running.
 173          * Ratelimit the messages to avoid DoS over the net. */
 174         return net_ratelimit();
 175 }
 176
 177 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
 178 {
 179         va_list args;
 180
 181         if (!b43legacy_ratelimit(wl))
 182                 return;
 183         va_start(args, fmt);
 184         printk(KERN_INFO "b43legacy-%s: ",
 185                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 186         vprintk(fmt, args);
 187         va_end(args);
 188 }
 189
 190 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
 191 {
 192         va_list args;
 193
 194         if (!b43legacy_ratelimit(wl))
 195                 return;
 196         va_start(args, fmt);
 197         printk(KERN_ERR "b43legacy-%s ERROR: ",
 198                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 199         vprintk(fmt, args);
 200         va_end(args);
 201 }
 202
 203 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
 204 {
 205         va_list args;
 206
 207         if (!b43legacy_ratelimit(wl))
 208                 return;
 209         va_start(args, fmt);
 210         printk(KERN_WARNING "b43legacy-%s warning: ",
 211                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 212         vprintk(fmt, args);
 213         va_end(args);
 214 }
 215
 216 #if B43legacy_DEBUG
 217 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
 218 {
 219         va_list args;
 220
 221         va_start(args, fmt);
 222         printk(KERN_DEBUG "b43legacy-%s debug: ",
 223                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 224         vprintk(fmt, args);
 225         va_end(args);
 226 }
 227 #endif /* DEBUG */
 228
 229 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
 230                                 u32 val)
 231 {
 232         u32 status;
 233
 234         B43legacy_WARN_ON(offset % 4 != 0);
 235
 236         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
 237         if (status & B43legacy_SBF_XFER_REG_BYTESWAP)
 238                 val = swab32(val);
 239
 240         b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
 241         mmiowb();
 242         b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
 243 }
 244
 245 static inline
 246 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
 247                                 u16 routing, u16 offset)
 248 {
 249         u32 control;
 250
 251         /* "offset" is the WORD offset. */
 252
 253         control = routing;
 254         control <<= 16;
 255         control |= offset;
 256         b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
 257 }
 258
 259 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
 260                        u16 routing, u16 offset)
 261 {
 262         u32 ret;
 263
 264         if (routing == B43legacy_SHM_SHARED) {
 265                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 266                 if (offset & 0x0003) {
 267                         /* Unaligned access */
 268                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 269                         ret = b43legacy_read16(dev,
 270                                 B43legacy_MMIO_SHM_DATA_UNALIGNED);
 271                         ret <<= 16;
 272                         b43legacy_shm_control_word(dev, routing,
 273                                                      (offset >> 2) + 1);
 274                         ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 275
 276                         return ret;
 277                 }
 278                 offset >>= 2;
 279         }
 280         b43legacy_shm_control_word(dev, routing, offset);
 281         ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
 282
 283         return ret;
 284 }
 285
 286 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
 287                            u16 routing, u16 offset)
 288 {
 289         u16 ret;
 290
 291         if (routing == B43legacy_SHM_SHARED) {
 292                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 293                 if (offset & 0x0003) {
 294                         /* Unaligned access */
 295                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 296                         ret = b43legacy_read16(dev,
 297                                              B43legacy_MMIO_SHM_DATA_UNALIGNED);
 298
 299                         return ret;
 300                 }
 301                 offset >>= 2;
 302         }
 303         b43legacy_shm_control_word(dev, routing, offset);
 304         ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 305
 306         return ret;
 307 }
 308
 309 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
 310                            u16 routing, u16 offset,
 311                            u32 value)
 312 {
 313         if (routing == B43legacy_SHM_SHARED) {
 314                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 315                 if (offset & 0x0003) {
 316                         /* Unaligned access */
 317                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 318                         mmiowb();
 319                         b43legacy_write16(dev,
 320                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 321                                           (value >> 16) & 0xffff);
 322                         mmiowb();
 323                         b43legacy_shm_control_word(dev, routing,
 324                                                    (offset >> 2) + 1);
 325                         mmiowb();
 326                         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
 327                                           value & 0xffff);
 328                         return;
 329                 }
 330                 offset >>= 2;
 331         }
 332         b43legacy_shm_control_word(dev, routing, offset);
 333         mmiowb();
 334         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
 335 }
 336
 337 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
 338                            u16 value)
 339 {
 340         if (routing == B43legacy_SHM_SHARED) {
 341                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 342                 if (offset & 0x0003) {
 343                         /* Unaligned access */
 344                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 345                         mmiowb();
 346                         b43legacy_write16(dev,
 347                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 348                                           value);
 349                         return;
 350                 }
 351                 offset >>= 2;
 352         }
 353         b43legacy_shm_control_word(dev, routing, offset);
 354         mmiowb();
 355         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
 356 }
 357
 358 /* Read HostFlags */
 359 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
 360 {
 361         u32 ret;
 362
 363         ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 364                                    B43legacy_SHM_SH_HOSTFHI);
 365         ret <<= 16;
 366         ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 367                                     B43legacy_SHM_SH_HOSTFLO);
 368
 369         return ret;
 370 }
 371
 372 /* Write HostFlags */
 373 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
 374 {
 375         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 376                               B43legacy_SHM_SH_HOSTFLO,
 377                               (value & 0x0000FFFF));
 378         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 379                               B43legacy_SHM_SH_HOSTFHI,
 380                               ((value & 0xFFFF0000) >> 16));
 381 }
 382
 383 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
 384 {
 385         /* We need to be careful. As we read the TSF from multiple
 386          * registers, we should take care of register overflows.
 387          * In theory, the whole tsf read process should be atomic.
 388          * We try to be atomic here, by restaring the read process,
 389          * if any of the high registers changed (overflew).
 390          */
 391         if (dev->dev->id.revision >= 3) {
 392                 u32 low;
 393                 u32 high;
 394                 u32 high2;
 395
 396                 do {
 397                         high = b43legacy_read32(dev,
 398                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 399                         low = b43legacy_read32(dev,
 400                                         B43legacy_MMIO_REV3PLUS_TSF_LOW);
 401                         high2 = b43legacy_read32(dev,
 402                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 403                 } while (unlikely(high != high2));
 404
 405                 *tsf = high;
 406                 *tsf <<= 32;
 407                 *tsf |= low;
 408         } else {
 409                 u64 tmp;
 410                 u16 v0;
 411                 u16 v1;
 412                 u16 v2;
 413                 u16 v3;
 414                 u16 test1;
 415                 u16 test2;
 416                 u16 test3;
 417
 418                 do {
 419                         v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 420                         v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 421                         v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 422                         v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
 423
 424                         test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 425                         test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 426                         test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 427                 } while (v3 != test3 || v2 != test2 || v1 != test1);
 428
 429                 *tsf = v3;
 430                 *tsf <<= 48;
 431                 tmp = v2;
 432                 tmp <<= 32;
 433                 *tsf |= tmp;
 434                 tmp = v1;
 435                 tmp <<= 16;
 436                 *tsf |= tmp;
 437                 *tsf |= v0;
 438         }
 439 }
 440
 441 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
 442 {
 443         u32 status;
 444
 445         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
 446         status |= B43legacy_SBF_TIME_UPDATE;
 447         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
 448         mmiowb();
 449 }
 450
 451 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
 452 {
 453         u32 status;
 454
 455         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
 456         status &= ~B43legacy_SBF_TIME_UPDATE;
 457         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
 458 }
 459
 460 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
 461 {
 462         /* Be careful with the in-progress timer.
 463          * First zero out the low register, so we have a full
 464          * register-overflow duration to complete the operation.
 465          */
 466         if (dev->dev->id.revision >= 3) {
 467                 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
 468                 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
 469
 470                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
 471                 mmiowb();
 472                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
 473                                     hi);
 474                 mmiowb();
 475                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
 476                                     lo);
 477         } else {
 478                 u16 v0 = (tsf & 0x000000000000FFFFULL);
 479                 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
 480                 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
 481                 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
 482
 483                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
 484                 mmiowb();
 485                 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
 486                 mmiowb();
 487                 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
 488                 mmiowb();
 489                 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
 490                 mmiowb();
 491                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
 492         }
 493 }
 494
 495 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
 496 {
 497         b43legacy_time_lock(dev);
 498         b43legacy_tsf_write_locked(dev, tsf);
 499         b43legacy_time_unlock(dev);
 500 }
 501
 502 static
 503 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
 504                              u16 offset, const u8 *mac)
 505 {
 506         static const u8 zero_addr[ETH_ALEN] = { 0 };
 507         u16 data;
 508
 509         if (!mac)
 510                 mac = zero_addr;
 511
 512         offset |= 0x0020;
 513         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
 514
 515         data = mac[0];
 516         data |= mac[1] << 8;
 517         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 518         data = mac[2];
 519         data |= mac[3] << 8;
 520         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 521         data = mac[4];
 522         data |= mac[5] << 8;
 523         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 524 }
 525
 526 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
 527 {
 528         static const u8 zero_addr[ETH_ALEN] = { 0 };
 529         const u8 *mac = dev->wl->mac_addr;
 530         const u8 *bssid = dev->wl->bssid;
 531         u8 mac_bssid[ETH_ALEN * 2];
 532         int i;
 533         u32 tmp;
 534
 535         if (!bssid)
 536                 bssid = zero_addr;
 537         if (!mac)
 538                 mac = zero_addr;
 539
 540         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
 541
 542         memcpy(mac_bssid, mac, ETH_ALEN);
 543         memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
 544
 545         /* Write our MAC address and BSSID to template ram */
 546         for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
 547                 tmp =  (u32)(mac_bssid[i + 0]);
 548                 tmp |= (u32)(mac_bssid[i + 1]) << 8;
 549                 tmp |= (u32)(mac_bssid[i + 2]) << 16;
 550                 tmp |= (u32)(mac_bssid[i + 3]) << 24;
 551                 b43legacy_ram_write(dev, 0x20 + i, tmp);
 552                 b43legacy_ram_write(dev, 0x78 + i, tmp);
 553                 b43legacy_ram_write(dev, 0x478 + i, tmp);
 554         }
 555 }
 556
 557 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
 558 {
 559         b43legacy_write_mac_bssid_templates(dev);
 560         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
 561                                 dev->wl->mac_addr);
 562 }
 563
 564 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
 565                                     u16 slot_time)
 566 {
 567         /* slot_time is in usec. */
 568         if (dev->phy.type != B43legacy_PHYTYPE_G)
 569                 return;
 570         b43legacy_write16(dev, 0x684, 510 + slot_time);
 571         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
 572                               slot_time);
 573 }
 574
 575 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
 576 {
 577         b43legacy_set_slot_time(dev, 9);
 578         dev->short_slot = 1;
 579 }
 580
 581 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
 582 {
 583         b43legacy_set_slot_time(dev, 20);
 584         dev->short_slot = 0;
 585 }
 586
 587 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
 588  * Returns the _previously_ enabled IRQ mask.
 589  */
 590 static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
 591                                              u32 mask)
 592 {
 593         u32 old_mask;
 594
 595         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
 596         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
 597                           mask);
 598
 599         return old_mask;
 600 }
 601
 602 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
 603  * Returns the _previously_ enabled IRQ mask.
 604  */
 605 static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
 606                                               u32 mask)
 607 {
 608         u32 old_mask;
 609
 610         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
 611         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
 612
 613         return old_mask;
 614 }
 615
 616 /* Synchronize IRQ top- and bottom-half.
 617  * IRQs must be masked before calling this.
 618  * This must not be called with the irq_lock held.
 619  */
 620 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
 621 {
 622         synchronize_irq(dev->dev->irq);
 623         tasklet_kill(&dev->isr_tasklet);
 624 }
 625
 626 /* DummyTransmission function, as documented on
 627  * http://bcm-specs.sipsolutions.net/DummyTransmission
 628  */
 629 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
 630 {
 631         struct b43legacy_phy *phy = &dev->phy;
 632         unsigned int i;
 633         unsigned int max_loop;
 634         u16 value;
 635         u32 buffer[5] = {
 636                 0x00000000,
 637                 0x00D40000,
 638                 0x00000000,
 639                 0x01000000,
 640                 0x00000000,
 641         };
 642
 643         switch (phy->type) {
 644         case B43legacy_PHYTYPE_B:
 645         case B43legacy_PHYTYPE_G:
 646                 max_loop = 0xFA;
 647                 buffer[0] = 0x000B846E;
 648                 break;
 649         default:
 650                 B43legacy_BUG_ON(1);
 651                 return;
 652         }
 653
 654         for (i = 0; i < 5; i++)
 655                 b43legacy_ram_write(dev, i * 4, buffer[i]);
 656
 657         /* dummy read follows */
 658         b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
 659
 660         b43legacy_write16(dev, 0x0568, 0x0000);
 661         b43legacy_write16(dev, 0x07C0, 0x0000);
 662         b43legacy_write16(dev, 0x050C, 0x0000);
 663         b43legacy_write16(dev, 0x0508, 0x0000);
 664         b43legacy_write16(dev, 0x050A, 0x0000);
 665         b43legacy_write16(dev, 0x054C, 0x0000);
 666         b43legacy_write16(dev, 0x056A, 0x0014);
 667         b43legacy_write16(dev, 0x0568, 0x0826);
 668         b43legacy_write16(dev, 0x0500, 0x0000);
 669         b43legacy_write16(dev, 0x0502, 0x0030);
 670
 671         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 672                 b43legacy_radio_write16(dev, 0x0051, 0x0017);
 673         for (i = 0x00; i < max_loop; i++) {
 674                 value = b43legacy_read16(dev, 0x050E);
 675                 if (value & 0x0080)
 676                         break;
 677                 udelay(10);
 678         }
 679         for (i = 0x00; i < 0x0A; i++) {
 680                 value = b43legacy_read16(dev, 0x050E);
 681                 if (value & 0x0400)
 682                         break;
 683                 udelay(10);
 684         }
 685         for (i = 0x00; i < 0x0A; i++) {
 686                 value = b43legacy_read16(dev, 0x0690);
 687                 if (!(value & 0x0100))
 688                         break;
 689                 udelay(10);
 690         }
 691         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 692                 b43legacy_radio_write16(dev, 0x0051, 0x0037);
 693 }
 694
 695 /* Turn the Analog ON/OFF */
 696 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
 697 {
 698         b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
 699 }
 700
 701 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
 702 {
 703         u32 tmslow;
 704         u32 macctl;
 705
 706         flags |= B43legacy_TMSLOW_PHYCLKEN;
 707         flags |= B43legacy_TMSLOW_PHYRESET;
 708         ssb_device_enable(dev->dev, flags);
 709         msleep(2); /* Wait for the PLL to turn on. */
 710
 711         /* Now take the PHY out of Reset again */
 712         tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
 713         tmslow |= SSB_TMSLOW_FGC;
 714         tmslow &= ~B43legacy_TMSLOW_PHYRESET;
 715         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 716         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 717         msleep(1);
 718         tmslow &= ~SSB_TMSLOW_FGC;
 719         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 720         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 721         msleep(1);
 722
 723         /* Turn Analog ON */
 724         b43legacy_switch_analog(dev, 1);
 725
 726         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 727         macctl &= ~B43legacy_MACCTL_GMODE;
 728         if (flags & B43legacy_TMSLOW_GMODE) {
 729                 macctl |= B43legacy_MACCTL_GMODE;
 730                 dev->phy.gmode = 1;
 731         } else
 732                 dev->phy.gmode = 0;
 733         macctl |= B43legacy_MACCTL_IHR_ENABLED;
 734         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
 735 }
 736
 737 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
 738 {
 739         u32 v0;
 740         u32 v1;
 741         u16 tmp;
 742         struct b43legacy_txstatus stat;
 743
 744         while (1) {
 745                 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 746                 if (!(v0 & 0x00000001))
 747                         break;
 748                 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 749
 750                 stat.cookie = (v0 >> 16);
 751                 stat.seq = (v1 & 0x0000FFFF);
 752                 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
 753                 tmp = (v0 & 0x0000FFFF);
 754                 stat.frame_count = ((tmp & 0xF000) >> 12);
 755                 stat.rts_count = ((tmp & 0x0F00) >> 8);
 756                 stat.supp_reason = ((tmp & 0x001C) >> 2);
 757                 stat.pm_indicated = !!(tmp & 0x0080);
 758                 stat.intermediate = !!(tmp & 0x0040);
 759                 stat.for_ampdu = !!(tmp & 0x0020);
 760                 stat.acked = !!(tmp & 0x0002);
 761
 762                 b43legacy_handle_txstatus(dev, &stat);
 763         }
 764 }
 765
 766 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
 767 {
 768         u32 dummy;
 769
 770         if (dev->dev->id.revision < 5)
 771                 return;
 772         /* Read all entries from the microcode TXstatus FIFO
 773          * and throw them away.
 774          */
 775         while (1) {
 776                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 777                 if (!(dummy & 0x00000001))
 778                         break;
 779                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 780         }
 781 }
 782
 783 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
 784 {
 785         u32 val = 0;
 786
 787         val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
 788         val <<= 16;
 789         val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
 790
 791         return val;
 792 }
 793
 794 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
 795 {
 796         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
 797                               (jssi & 0x0000FFFF));
 798         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
 799                               (jssi & 0xFFFF0000) >> 16);
 800 }
 801
 802 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
 803 {
 804         b43legacy_jssi_write(dev, 0x7F7F7F7F);
 805         b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
 806                           b43legacy_read32(dev,
 807                           B43legacy_MMIO_STATUS2_BITFIELD)
 808                           | (1 << 4));
 809         B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
 810                             dev->phy.channel);
 811 }
 812
 813 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
 814 {
 815         /* Top half of Link Quality calculation. */
 816
 817         if (dev->noisecalc.calculation_running)
 818                 return;
 819         dev->noisecalc.channel_at_start = dev->phy.channel;
 820         dev->noisecalc.calculation_running = 1;
 821         dev->noisecalc.nr_samples = 0;
 822
 823         b43legacy_generate_noise_sample(dev);
 824 }
 825
 826 static void handle_irq_noise(struct b43legacy_wldev *dev)
 827 {
 828         struct b43legacy_phy *phy = &dev->phy;
 829         u16 tmp;
 830         u8 noise[4];
 831         u8 i;
 832         u8 j;
 833         s32 average;
 834
 835         /* Bottom half of Link Quality calculation. */
 836
 837         B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
 838         if (dev->noisecalc.channel_at_start != phy->channel)
 839                 goto drop_calculation;
 840         *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
 841         if (noise[0] == 0x7F || noise[1] == 0x7F ||
 842             noise[2] == 0x7F || noise[3] == 0x7F)
 843                 goto generate_new;
 844
 845         /* Get the noise samples. */
 846         B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
 847         i = dev->noisecalc.nr_samples;
 848         noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 849         noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 850         noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 851         noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 852         dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
 853         dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
 854         dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
 855         dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
 856         dev->noisecalc.nr_samples++;
 857         if (dev->noisecalc.nr_samples == 8) {
 858                 /* Calculate the Link Quality by the noise samples. */
 859                 average = 0;
 860                 for (i = 0; i < 8; i++) {
 861                         for (j = 0; j < 4; j++)
 862                                 average += dev->noisecalc.samples[i][j];
 863                 }
 864                 average /= (8 * 4);
 865                 average *= 125;
 866                 average += 64;
 867                 average /= 128;
 868                 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 869                                              0x40C);
 870                 tmp = (tmp / 128) & 0x1F;
 871                 if (tmp >= 8)
 872                         average += 2;
 873                 else
 874                         average -= 25;
 875                 if (tmp == 8)
 876                         average -= 72;
 877                 else
 878                         average -= 48;
 879
 880                 dev->stats.link_noise = average;
 881 drop_calculation:
 882                 dev->noisecalc.calculation_running = 0;
 883                 return;
 884         }
 885 generate_new:
 886         b43legacy_generate_noise_sample(dev);
 887 }
 888
 889 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
 890 {
 891         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
 892                 /* TODO: PS TBTT */
 893         } else {
 894                 if (1/*FIXME: the last PSpoll frame was sent successfully */)
 895                         b43legacy_power_saving_ctl_bits(dev, -1, -1);
 896         }
 897         dev->reg124_set_0x4 = 0;
 898         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
 899                 dev->reg124_set_0x4 = 1;
 900 }
 901
 902 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
 903 {
 904         if (!dev->reg124_set_0x4) /*FIXME rename this variable*/
 905                 return;
 906         b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
 907                           b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD)
 908                           | 0x4);
 909 }
 910
 911 static void handle_irq_pmq(struct b43legacy_wldev *dev)
 912 {
 913         u32 tmp;
 914
 915         /* TODO: AP mode. */
 916
 917         while (1) {
 918                 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
 919                 if (!(tmp & 0x00000008))
 920                         break;
 921         }
 922         /* 16bit write is odd, but correct. */
 923         b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
 924 }
 925
 926 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
 927                                             const u8 *data, u16 size,
 928                                             u16 ram_offset,
 929                                             u16 shm_size_offset, u8 rate)
 930 {
 931         u32 i;
 932         u32 tmp;
 933         struct b43legacy_plcp_hdr4 plcp;
 934
 935         plcp.data = 0;
 936         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 937         b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
 938         ram_offset += sizeof(u32);
 939         /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
 940          * So leave the first two bytes of the next write blank.
 941          */
 942         tmp = (u32)(data[0]) << 16;
 943         tmp |= (u32)(data[1]) << 24;
 944         b43legacy_ram_write(dev, ram_offset, tmp);
 945         ram_offset += sizeof(u32);
 946         for (i = 2; i < size; i += sizeof(u32)) {
 947                 tmp = (u32)(data[i + 0]);
 948                 if (i + 1 < size)
 949                         tmp |= (u32)(data[i + 1]) << 8;
 950                 if (i + 2 < size)
 951                         tmp |= (u32)(data[i + 2]) << 16;
 952                 if (i + 3 < size)
 953                         tmp |= (u32)(data[i + 3]) << 24;
 954                 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
 955         }
 956         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
 957                               size + sizeof(struct b43legacy_plcp_hdr6));
 958 }
 959
 960 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
 961                                             u16 ram_offset,
 962                                             u16 shm_size_offset, u8 rate)
 963 {
 964         int len;
 965         const u8 *data;
 966
 967         B43legacy_WARN_ON(!dev->cached_beacon);
 968         len = min((size_t)dev->cached_beacon->len,
 969                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
 970         data = (const u8 *)(dev->cached_beacon->data);
 971         b43legacy_write_template_common(dev, data,
 972                                         len, ram_offset,
 973                                         shm_size_offset, rate);
 974 }
 975
 976 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
 977                                             u16 shm_offset, u16 size,
 978                                             u8 rate)
 979 {
 980         struct b43legacy_plcp_hdr4 plcp;
 981         u32 tmp;
 982         __le16 dur;
 983
 984         plcp.data = 0;
 985         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 986         dur = ieee80211_generic_frame_duration(dev->wl->hw,
 987                                                dev->wl->if_id,
 988                                                size,
 989                                                B43legacy_RATE_TO_100KBPS(rate));
 990         /* Write PLCP in two parts and timing for packet transfer */
 991         tmp = le32_to_cpu(plcp.data);
 992         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
 993                               tmp & 0xFFFF);
 994         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
 995                               tmp >> 16);
 996         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
 997                               le16_to_cpu(dur));
 998 }
 999
1000 /* Instead of using custom probe response template, this function
1001  * just patches custom beacon template by:
1002  * 1) Changing packet type
1003  * 2) Patching duration field
1004  * 3) Stripping TIM
1005  */
1006 static u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1007                                          u16 *dest_size, u8 rate)
1008 {
1009         const u8 *src_data;
1010         u8 *dest_data;
1011         u16 src_size;
1012         u16 elem_size;
1013         u16 src_pos;
1014         u16 dest_pos;
1015         __le16 dur;
1016         struct ieee80211_hdr *hdr;
1017
1018         B43legacy_WARN_ON(!dev->cached_beacon);
1019         src_size = dev->cached_beacon->len;
1020         src_data = (const u8 *)dev->cached_beacon->data;
1021
1022         if (unlikely(src_size < 0x24)) {
1023                 b43legacydbg(dev->wl, "b43legacy_generate_probe_resp: "
1024                        "invalid beacon\n");
1025                 return NULL;
1026         }
1027
1028         dest_data = kmalloc(src_size, GFP_ATOMIC);
1029         if (unlikely(!dest_data))
1030                 return NULL;
1031
1032         /* 0x24 is offset of first variable-len Information-Element
1033          * in beacon frame.
1034          */
1035         memcpy(dest_data, src_data, 0x24);
1036         src_pos = 0x24;
1037         dest_pos = 0x24;
1038         for (; src_pos < src_size - 2; src_pos += elem_size) {
1039                 elem_size = src_data[src_pos + 1] + 2;
1040                 if (src_data[src_pos] != 0x05) { /* TIM */
1041                         memcpy(dest_data + dest_pos, src_data + src_pos,
1042                                elem_size);
1043                         dest_pos += elem_size;
1044                 }
1045         }
1046         *dest_size = dest_pos;
1047         hdr = (struct ieee80211_hdr *)dest_data;
1048
1049         /* Set the frame control. */
1050         hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1051                                          IEEE80211_STYPE_PROBE_RESP);
1052         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1053                                                dev->wl->if_id,
1054                                                *dest_size,
1055                                                B43legacy_RATE_TO_100KBPS(rate));
1056         hdr->duration_id = dur;
1057
1058         return dest_data;
1059 }
1060
1061 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1062                                                 u16 ram_offset,
1063                                                 u16 shm_size_offset, u8 rate)
1064 {
1065         u8 *probe_resp_data;
1066         u16 size;
1067
1068         B43legacy_WARN_ON(!dev->cached_beacon);
1069         size = dev->cached_beacon->len;
1070         probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1071         if (unlikely(!probe_resp_data))
1072                 return;
1073
1074         /* Looks like PLCP headers plus packet timings are stored for
1075          * all possible basic rates
1076          */
1077         b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1078                                         B43legacy_CCK_RATE_1MB);
1079         b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1080                                         B43legacy_CCK_RATE_2MB);
1081         b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1082                                         B43legacy_CCK_RATE_5MB);
1083         b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1084                                         B43legacy_CCK_RATE_11MB);
1085
1086         size = min((size_t)size,
1087                    0x200 - sizeof(struct b43legacy_plcp_hdr6));
1088         b43legacy_write_template_common(dev, probe_resp_data,
1089                                         size, ram_offset,
1090                                         shm_size_offset, rate);
1091         kfree(probe_resp_data);
1092 }
1093
1094 static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev *dev,
1095                                            struct sk_buff *beacon)
1096 {
1097         if (dev->cached_beacon)
1098                 kfree_skb(dev->cached_beacon);
1099         dev->cached_beacon = beacon;
1100
1101         return 0;
1102 }
1103
1104 static void b43legacy_update_templates(struct b43legacy_wldev *dev)
1105 {
1106         u32 status;
1107
1108         B43legacy_WARN_ON(!dev->cached_beacon);
1109
1110         b43legacy_write_beacon_template(dev, 0x68, 0x18,
1111                                         B43legacy_CCK_RATE_1MB);
1112         b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1113                                         B43legacy_CCK_RATE_1MB);
1114         b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1115                                             B43legacy_CCK_RATE_11MB);
1116
1117         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD);
1118         status |= 0x03;
1119         b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, status);
1120 }
1121
1122 static void b43legacy_refresh_templates(struct b43legacy_wldev *dev,
1123                                         struct sk_buff *beacon)
1124 {
1125         int err;
1126
1127         err = b43legacy_refresh_cached_beacon(dev, beacon);
1128         if (unlikely(err))
1129                 return;
1130         b43legacy_update_templates(dev);
1131 }
1132
1133 static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
1134                                const u8 *ssid, u8 ssid_len)
1135 {
1136         u32 tmp;
1137         u16 i;
1138         u16 len;
1139
1140         len = min((u16)ssid_len, (u16)0x100);
1141         for (i = 0; i < len; i += sizeof(u32)) {
1142                 tmp = (u32)(ssid[i + 0]);
1143                 if (i + 1 < len)
1144                         tmp |= (u32)(ssid[i + 1]) << 8;
1145                 if (i + 2 < len)
1146                         tmp |= (u32)(ssid[i + 2]) << 16;
1147                 if (i + 3 < len)
1148                         tmp |= (u32)(ssid[i + 3]) << 24;
1149                 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1150                                       0x380 + i, tmp);
1151         }
1152         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1153                               0x48, len);
1154 }
1155
1156 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1157                                      u16 beacon_int)
1158 {
1159         b43legacy_time_lock(dev);
1160         if (dev->dev->id.revision >= 3)
1161                 b43legacy_write32(dev, 0x188, (beacon_int << 16));
1162         else {
1163                 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1164                 b43legacy_write16(dev, 0x610, beacon_int);
1165         }
1166         b43legacy_time_unlock(dev);
1167 }
1168
1169 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1170 {
1171         u32 status;
1172
1173         if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
1174                 return;
1175
1176         dev->irq_savedstate &= ~B43legacy_IRQ_BEACON;
1177         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD);
1178
1179         if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) {
1180                 /* ACK beacon IRQ. */
1181                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1182                                   B43legacy_IRQ_BEACON);
1183                 dev->irq_savedstate |= B43legacy_IRQ_BEACON;
1184                 if (dev->cached_beacon)
1185                         kfree_skb(dev->cached_beacon);
1186                 dev->cached_beacon = NULL;
1187                 return;
1188         }
1189         if (!(status & 0x1)) {
1190                 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1191                                                 B43legacy_CCK_RATE_1MB);
1192                 status |= 0x1;
1193                 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
1194                                   status);
1195         }
1196         if (!(status & 0x2)) {
1197                 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1198                                                 B43legacy_CCK_RATE_1MB);
1199                 status |= 0x2;
1200                 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
1201                                   status);
1202         }
1203 }
1204
1205 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1206 {
1207 }
1208
1209 /* Interrupt handler bottom-half */
1210 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1211 {
1212         u32 reason;
1213         u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1214         u32 merged_dma_reason = 0;
1215         int i;
1216         unsigned long flags;
1217
1218         spin_lock_irqsave(&dev->wl->irq_lock, flags);
1219
1220         B43legacy_WARN_ON(b43legacy_status(dev) <
1221                           B43legacy_STAT_INITIALIZED);
1222
1223         reason = dev->irq_reason;
1224         for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1225                 dma_reason[i] = dev->dma_reason[i];
1226                 merged_dma_reason |= dma_reason[i];
1227         }
1228
1229         if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1230                 b43legacyerr(dev->wl, "MAC transmission error\n");
1231
1232         if (unlikely(reason & B43legacy_IRQ_PHY_TXERR))
1233                 b43legacyerr(dev->wl, "PHY transmission error\n");
1234
1235         if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1236                                           B43legacy_DMAIRQ_NONFATALMASK))) {
1237                 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1238                         b43legacyerr(dev->wl, "Fatal DMA error: "
1239                                "0x%08X, 0x%08X, 0x%08X, "
1240                                "0x%08X, 0x%08X, 0x%08X\n",
1241                                dma_reason[0], dma_reason[1],
1242                                dma_reason[2], dma_reason[3],
1243                                dma_reason[4], dma_reason[5]);
1244                         b43legacy_controller_restart(dev, "DMA error");
1245                         mmiowb();
1246                         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1247                         return;
1248                 }
1249                 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1250                         b43legacyerr(dev->wl, "DMA error: "
1251                                "0x%08X, 0x%08X, 0x%08X, "
1252                                "0x%08X, 0x%08X, 0x%08X\n",
1253                                dma_reason[0], dma_reason[1],
1254                                dma_reason[2], dma_reason[3],
1255                                dma_reason[4], dma_reason[5]);
1256         }
1257
1258         if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1259                 handle_irq_ucode_debug(dev);
1260         if (reason & B43legacy_IRQ_TBTT_INDI)
1261                 handle_irq_tbtt_indication(dev);
1262         if (reason & B43legacy_IRQ_ATIM_END)
1263                 handle_irq_atim_end(dev);
1264         if (reason & B43legacy_IRQ_BEACON)
1265                 handle_irq_beacon(dev);
1266         if (reason & B43legacy_IRQ_PMQ)
1267                 handle_irq_pmq(dev);
1268         if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1269                 ;/*TODO*/
1270         if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1271                 handle_irq_noise(dev);
1272
1273         /* Check the DMA reason registers for received data. */
1274         if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1275                 if (b43legacy_using_pio(dev))
1276                         b43legacy_pio_rx(dev->pio.queue0);
1277                 else
1278                         b43legacy_dma_rx(dev->dma.rx_ring0);
1279         }
1280         B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1281         B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1282         if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1283                 if (b43legacy_using_pio(dev))
1284                         b43legacy_pio_rx(dev->pio.queue3);
1285                 else
1286                         b43legacy_dma_rx(dev->dma.rx_ring3);
1287         }
1288         B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1289         B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1290
1291         if (reason & B43legacy_IRQ_TX_OK)
1292                 handle_irq_transmit_status(dev);
1293
1294         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1295         mmiowb();
1296         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1297 }
1298
1299 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1300                                u16 base, int queueidx)
1301 {
1302         u16 rxctl;
1303
1304         rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1305         if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1306                 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1307         else
1308                 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1309 }
1310
1311 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1312 {
1313         if (b43legacy_using_pio(dev) &&
1314             (dev->dev->id.revision < 3) &&
1315             (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1316                 /* Apply a PIO specific workaround to the dma_reasons */
1317                 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1318                 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1319                 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1320                 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1321         }
1322
1323         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1324
1325         b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1326                           dev->dma_reason[0]);
1327         b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1328                           dev->dma_reason[1]);
1329         b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1330                           dev->dma_reason[2]);
1331         b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1332                           dev->dma_reason[3]);
1333         b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1334                           dev->dma_reason[4]);
1335         b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1336                           dev->dma_reason[5]);
1337 }
1338
1339 /* Interrupt handler top-half */
1340 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1341 {
1342         irqreturn_t ret = IRQ_NONE;
1343         struct b43legacy_wldev *dev = dev_id;
1344         u32 reason;
1345
1346         if (!dev)
1347                 return IRQ_NONE;
1348
1349         spin_lock(&dev->wl->irq_lock);
1350
1351         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
1352                 goto out;
1353         reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1354         if (reason == 0xffffffff) /* shared IRQ */
1355                 goto out;
1356         ret = IRQ_HANDLED;
1357         reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
1358         if (!reason)
1359                 goto out;
1360
1361         dev->dma_reason[0] = b43legacy_read32(dev,
1362                                               B43legacy_MMIO_DMA0_REASON)
1363                                               & 0x0001DC00;
1364         dev->dma_reason[1] = b43legacy_read32(dev,
1365                                               B43legacy_MMIO_DMA1_REASON)
1366                                               & 0x0000DC00;
1367         dev->dma_reason[2] = b43legacy_read32(dev,
1368                                               B43legacy_MMIO_DMA2_REASON)
1369                                               & 0x0000DC00;
1370         dev->dma_reason[3] = b43legacy_read32(dev,
1371                                               B43legacy_MMIO_DMA3_REASON)
1372                                               & 0x0001DC00;
1373         dev->dma_reason[4] = b43legacy_read32(dev,
1374                                               B43legacy_MMIO_DMA4_REASON)
1375                                               & 0x0000DC00;
1376         dev->dma_reason[5] = b43legacy_read32(dev,
1377                                               B43legacy_MMIO_DMA5_REASON)
1378                                               & 0x0000DC00;
1379
1380         b43legacy_interrupt_ack(dev, reason);
1381         /* disable all IRQs. They are enabled again in the bottom half. */
1382         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
1383                                                           B43legacy_IRQ_ALL);
1384         /* save the reason code and call our bottom half. */
1385         dev->irq_reason = reason;
1386         tasklet_schedule(&dev->isr_tasklet);
1387 out:
1388         mmiowb();
1389         spin_unlock(&dev->wl->irq_lock);
1390
1391         return ret;
1392 }
1393
1394 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1395 {
1396         release_firmware(dev->fw.ucode);
1397         dev->fw.ucode = NULL;
1398         release_firmware(dev->fw.pcm);
1399         dev->fw.pcm = NULL;
1400         release_firmware(dev->fw.initvals);
1401         dev->fw.initvals = NULL;
1402         release_firmware(dev->fw.initvals_band);
1403         dev->fw.initvals_band = NULL;
1404 }
1405
1406 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1407 {
1408         b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1409                      "Drivers/b43#devicefirmware "
1410                      "and download the correct firmware (version 3).\n");
1411 }
1412
1413 static int do_request_fw(struct b43legacy_wldev *dev,
1414                          const char *name,
1415                          const struct firmware **fw)
1416 {
1417         char path[sizeof(modparam_fwpostfix) + 32];
1418         struct b43legacy_fw_header *hdr;
1419         u32 size;
1420         int err;
1421
1422         if (!name)
1423                 return 0;
1424
1425         snprintf(path, ARRAY_SIZE(path),
1426                  "b43legacy%s/%s.fw",
1427                  modparam_fwpostfix, name);
1428         err = request_firmware(fw, path, dev->dev->dev);
1429         if (err) {
1430                 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1431                        "or load failed.\n", path);
1432                 return err;
1433         }
1434         if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1435                 goto err_format;
1436         hdr = (struct b43legacy_fw_header *)((*fw)->data);
1437         switch (hdr->type) {
1438         case B43legacy_FW_TYPE_UCODE:
1439         case B43legacy_FW_TYPE_PCM:
1440                 size = be32_to_cpu(hdr->size);
1441                 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1442                         goto err_format;
1443                 /* fallthrough */
1444         case B43legacy_FW_TYPE_IV:
1445                 if (hdr->ver != 1)
1446                         goto err_format;
1447                 break;
1448         default:
1449                 goto err_format;
1450         }
1451
1452         return err;
1453
1454 err_format:
1455         b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1456         return -EPROTO;
1457 }
1458
1459 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1460 {
1461         struct b43legacy_firmware *fw = &dev->fw;
1462         const u8 rev = dev->dev->id.revision;
1463         const char *filename;
1464         u32 tmshigh;
1465         int err;
1466
1467         tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1468         if (!fw->ucode) {
1469                 if (rev == 2)
1470                         filename = "ucode2";
1471                 else if (rev == 4)
1472                         filename = "ucode4";
1473                 else
1474                         filename = "ucode5";
1475                 err = do_request_fw(dev, filename, &fw->ucode);
1476                 if (err)
1477                         goto err_load;
1478         }
1479         if (!fw->pcm) {
1480                 if (rev < 5)
1481                         filename = "pcm4";
1482                 else
1483                         filename = "pcm5";
1484                 err = do_request_fw(dev, filename, &fw->pcm);
1485                 if (err)
1486                         goto err_load;
1487         }
1488         if (!fw->initvals) {
1489                 switch (dev->phy.type) {
1490                 case B43legacy_PHYTYPE_G:
1491                         if ((rev >= 5) && (rev <= 10))
1492                                 filename = "b0g0initvals5";
1493                         else if (rev == 2 || rev == 4)
1494                                 filename = "b0g0initvals2";
1495                         else
1496                                 goto err_no_initvals;
1497                         break;
1498                 default:
1499                         goto err_no_initvals;
1500                 }
1501                 err = do_request_fw(dev, filename, &fw->initvals);
1502                 if (err)
1503                         goto err_load;
1504         }
1505         if (!fw->initvals_band) {
1506                 switch (dev->phy.type) {
1507                 case B43legacy_PHYTYPE_G:
1508                         if ((rev >= 5) && (rev <= 10))
1509                                 filename = "b0g0bsinitvals5";
1510                         else if (rev >= 11)
1511                                 filename = NULL;
1512                         else if (rev == 2 || rev == 4)
1513                                 filename = NULL;
1514                         else
1515                                 goto err_no_initvals;
1516                         break;
1517                 default:
1518                         goto err_no_initvals;
1519                 }
1520                 err = do_request_fw(dev, filename, &fw->initvals_band);
1521                 if (err)
1522                         goto err_load;
1523         }
1524
1525         return 0;
1526
1527 err_load:
1528         b43legacy_print_fw_helptext(dev->wl);
1529         goto error;
1530
1531 err_no_initvals:
1532         err = -ENODEV;
1533         b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1534                "core rev %u\n", dev->phy.type, rev);
1535         goto error;
1536
1537 error:
1538         b43legacy_release_firmware(dev);
1539         return err;
1540 }
1541
1542 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1543 {
1544         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1545         const __be32 *data;
1546         unsigned int i;
1547         unsigned int len;
1548         u16 fwrev;
1549         u16 fwpatch;
1550         u16 fwdate;
1551         u16 fwtime;
1552         u32 tmp;
1553         int err = 0;
1554
1555         /* Upload Microcode. */
1556         data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1557         len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1558         b43legacy_shm_control_word(dev,
1559                                    B43legacy_SHM_UCODE |
1560                                    B43legacy_SHM_AUTOINC_W,
1561                                    0x0000);
1562         for (i = 0; i < len; i++) {
1563                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1564                                     be32_to_cpu(data[i]));
1565                 udelay(10);
1566         }
1567
1568         if (dev->fw.pcm) {
1569                 /* Upload PCM data. */
1570                 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1571                 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1572                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1573                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1574                 /* No need for autoinc bit in SHM_HW */
1575                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1576                 for (i = 0; i < len; i++) {
1577                         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1578                                           be32_to_cpu(data[i]));
1579                         udelay(10);
1580                 }
1581         }
1582
1583         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1584                           B43legacy_IRQ_ALL);
1585         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0x00020402);
1586
1587         /* Wait for the microcode to load and respond */
1588         i = 0;
1589         while (1) {
1590                 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1591                 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1592                         break;
1593                 i++;
1594                 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1595                         b43legacyerr(dev->wl, "Microcode not responding\n");
1596                         b43legacy_print_fw_helptext(dev->wl);
1597                         err = -ENODEV;
1598                         goto out;
1599                 }
1600                 udelay(10);
1601         }
1602         /* dummy read follows */
1603         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1604
1605         /* Get and check the revisions. */
1606         fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1607                                      B43legacy_SHM_SH_UCODEREV);
1608         fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1609                                        B43legacy_SHM_SH_UCODEPATCH);
1610         fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1611                                       B43legacy_SHM_SH_UCODEDATE);
1612         fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1613                                       B43legacy_SHM_SH_UCODETIME);
1614
1615         if (fwrev > 0x128) {
1616                 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1617                              " Only firmware from binary drivers version 3.x"
1618                              " is supported. You must change your firmware"
1619                              " files.\n");
1620                 b43legacy_print_fw_helptext(dev->wl);
1621                 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0);
1622                 err = -EOPNOTSUPP;
1623                 goto out;
1624         }
1625         b43legacydbg(dev->wl, "Loading firmware version 0x%X, patch level %u "
1626                "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1627                (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1628                (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, fwtime & 0x1F);
1629
1630         dev->fw.rev = fwrev;
1631         dev->fw.patch = fwpatch;
1632
1633 out:
1634         return err;
1635 }
1636
1637 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1638                                     const struct b43legacy_iv *ivals,
1639                                     size_t count,
1640                                     size_t array_size)
1641 {
1642         const struct b43legacy_iv *iv;
1643         u16 offset;
1644         size_t i;
1645         bool bit32;
1646
1647         BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1648         iv = ivals;
1649         for (i = 0; i < count; i++) {
1650                 if (array_size < sizeof(iv->offset_size))
1651                         goto err_format;
1652                 array_size -= sizeof(iv->offset_size);
1653                 offset = be16_to_cpu(iv->offset_size);
1654                 bit32 = !!(offset & B43legacy_IV_32BIT);
1655                 offset &= B43legacy_IV_OFFSET_MASK;
1656                 if (offset >= 0x1000)
1657                         goto err_format;
1658                 if (bit32) {
1659                         u32 value;
1660
1661                         if (array_size < sizeof(iv->data.d32))
1662                                 goto err_format;
1663                         array_size -= sizeof(iv->data.d32);
1664
1665                         value = be32_to_cpu(get_unaligned(&iv->data.d32));
1666                         b43legacy_write32(dev, offset, value);
1667
1668                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1669                                                         sizeof(__be16) +
1670                                                         sizeof(__be32));
1671                 } else {
1672                         u16 value;
1673
1674                         if (array_size < sizeof(iv->data.d16))
1675                                 goto err_format;
1676                         array_size -= sizeof(iv->data.d16);
1677
1678                         value = be16_to_cpu(iv->data.d16);
1679                         b43legacy_write16(dev, offset, value);
1680
1681                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1682                                                         sizeof(__be16) +
1683                                                         sizeof(__be16));
1684                 }
1685         }
1686         if (array_size)
1687                 goto err_format;
1688
1689         return 0;
1690
1691 err_format:
1692         b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1693         b43legacy_print_fw_helptext(dev->wl);
1694
1695         return -EPROTO;
1696 }
1697
1698 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1699 {
1700         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1701         const struct b43legacy_fw_header *hdr;
1702         struct b43legacy_firmware *fw = &dev->fw;
1703         const struct b43legacy_iv *ivals;
1704         size_t count;
1705         int err;
1706
1707         hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1708         ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1709         count = be32_to_cpu(hdr->size);
1710         err = b43legacy_write_initvals(dev, ivals, count,
1711                                  fw->initvals->size - hdr_len);
1712         if (err)
1713                 goto out;
1714         if (fw->initvals_band) {
1715                 hdr = (const struct b43legacy_fw_header *)
1716                       (fw->initvals_band->data);
1717                 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1718                         + hdr_len);
1719                 count = be32_to_cpu(hdr->size);
1720                 err = b43legacy_write_initvals(dev, ivals, count,
1721                                          fw->initvals_band->size - hdr_len);
1722                 if (err)
1723                         goto out;
1724         }
1725 out:
1726
1727         return err;
1728 }
1729
1730 /* Initialize the GPIOs
1731  * http://bcm-specs.sipsolutions.net/GPIO
1732  */
1733 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1734 {
1735         struct ssb_bus *bus = dev->dev->bus;
1736         struct ssb_device *gpiodev, *pcidev = NULL;
1737         u32 mask;
1738         u32 set;
1739
1740         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1741                           b43legacy_read32(dev,
1742                           B43legacy_MMIO_STATUS_BITFIELD)
1743                           & 0xFFFF3FFF);
1744
1745         b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1746                           b43legacy_read16(dev,
1747                           B43legacy_MMIO_GPIO_MASK)
1748                           | 0x000F);
1749
1750         mask = 0x0000001F;
1751         set = 0x0000000F;
1752         if (dev->dev->bus->chip_id == 0x4301) {
1753                 mask |= 0x0060;
1754                 set |= 0x0060;
1755         }
1756         if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_PACTRL) {
1757                 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1758                                   b43legacy_read16(dev,
1759                                   B43legacy_MMIO_GPIO_MASK)
1760                                   | 0x0200);
1761                 mask |= 0x0200;
1762                 set |= 0x0200;
1763         }
1764         if (dev->dev->id.revision >= 2)
1765                 mask  |= 0x0010; /* FIXME: This is redundant. */
1766
1767 #ifdef CONFIG_SSB_DRIVER_PCICORE
1768         pcidev = bus->pcicore.dev;
1769 #endif
1770         gpiodev = bus->chipco.dev ? : pcidev;
1771         if (!gpiodev)
1772                 return 0;
1773         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1774                     (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1775                      & mask) | set);
1776
1777         return 0;
1778 }
1779
1780 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1781 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1782 {
1783         struct ssb_bus *bus = dev->dev->bus;
1784         struct ssb_device *gpiodev, *pcidev = NULL;
1785
1786 #ifdef CONFIG_SSB_DRIVER_PCICORE
1787         pcidev = bus->pcicore.dev;
1788 #endif
1789         gpiodev = bus->chipco.dev ? : pcidev;
1790         if (!gpiodev)
1791                 return;
1792         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1793 }
1794
1795 /* http://bcm-specs.sipsolutions.net/EnableMac */
1796 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1797 {
1798         dev->mac_suspended--;
1799         B43legacy_WARN_ON(dev->mac_suspended < 0);
1800         B43legacy_WARN_ON(irqs_disabled());
1801         if (dev->mac_suspended == 0) {
1802                 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1803                                   b43legacy_read32(dev,
1804                                   B43legacy_MMIO_STATUS_BITFIELD)
1805                                   | B43legacy_SBF_MAC_ENABLED);
1806                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1807                                   B43legacy_IRQ_MAC_SUSPENDED);
1808                 /* the next two are dummy reads */
1809                 b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
1810                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1811                 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1812
1813                 /* Re-enable IRQs. */
1814                 spin_lock_irq(&dev->wl->irq_lock);
1815                 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1816                 spin_unlock_irq(&dev->wl->irq_lock);
1817         }
1818 }
1819
1820 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1821 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1822 {
1823         int i;
1824         u32 tmp;
1825
1826         might_sleep();
1827         B43legacy_WARN_ON(irqs_disabled());
1828         B43legacy_WARN_ON(dev->mac_suspended < 0);
1829
1830         if (dev->mac_suspended == 0) {
1831                 /* Mask IRQs before suspending MAC. Otherwise
1832                  * the MAC stays busy and won't suspend. */
1833                 spin_lock_irq(&dev->wl->irq_lock);
1834                 tmp = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
1835                 spin_unlock_irq(&dev->wl->irq_lock);
1836                 b43legacy_synchronize_irq(dev);
1837                 dev->irq_savedstate = tmp;
1838
1839                 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1840                 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1841                                   b43legacy_read32(dev,
1842                                   B43legacy_MMIO_STATUS_BITFIELD)
1843                                   & ~B43legacy_SBF_MAC_ENABLED);
1844                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1845                 for (i = 40; i; i--) {
1846                         tmp = b43legacy_read32(dev,
1847                                                B43legacy_MMIO_GEN_IRQ_REASON);
1848                         if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1849                                 goto out;
1850                         msleep(1);
1851                 }
1852                 b43legacyerr(dev->wl, "MAC suspend failed\n");
1853         }
1854 out:
1855         dev->mac_suspended++;
1856 }
1857
1858 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1859 {
1860         struct b43legacy_wl *wl = dev->wl;
1861         u32 ctl;
1862         u16 cfp_pretbtt;
1863
1864         ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1865         /* Reset status to STA infrastructure mode. */
1866         ctl &= ~B43legacy_MACCTL_AP;
1867         ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1868         ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1869         ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1870         ctl &= ~B43legacy_MACCTL_PROMISC;
1871         ctl &= ~B43legacy_MACCTL_BEACPROMISC;
1872         ctl |= B43legacy_MACCTL_INFRA;
1873
1874         if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
1875                 ctl |= B43legacy_MACCTL_AP;
1876         else if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_IBSS))
1877                 ctl &= ~B43legacy_MACCTL_INFRA;
1878
1879         if (wl->filter_flags & FIF_CONTROL)
1880                 ctl |= B43legacy_MACCTL_KEEP_CTL;
1881         if (wl->filter_flags & FIF_FCSFAIL)
1882                 ctl |= B43legacy_MACCTL_KEEP_BAD;
1883         if (wl->filter_flags & FIF_PLCPFAIL)
1884                 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1885         if (wl->filter_flags & FIF_PROMISC_IN_BSS)
1886                 ctl |= B43legacy_MACCTL_PROMISC;
1887         if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
1888                 ctl |= B43legacy_MACCTL_BEACPROMISC;
1889
1890         /* Workaround: On old hardware the HW-MAC-address-filter
1891          * doesn't work properly, so always run promisc in filter
1892          * it in software. */
1893         if (dev->dev->id.revision <= 4)
1894                 ctl |= B43legacy_MACCTL_PROMISC;
1895
1896         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
1897
1898         cfp_pretbtt = 2;
1899         if ((ctl & B43legacy_MACCTL_INFRA) &&
1900             !(ctl & B43legacy_MACCTL_AP)) {
1901                 if (dev->dev->bus->chip_id == 0x4306 &&
1902                     dev->dev->bus->chip_rev == 3)
1903                         cfp_pretbtt = 100;
1904                 else
1905                         cfp_pretbtt = 50;
1906         }
1907         b43legacy_write16(dev, 0x612, cfp_pretbtt);
1908 }
1909
1910 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
1911                                         u16 rate,
1912                                         int is_ofdm)
1913 {
1914         u16 offset;
1915
1916         if (is_ofdm) {
1917                 offset = 0x480;
1918                 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
1919         } else {
1920                 offset = 0x4C0;
1921                 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
1922         }
1923         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
1924                               b43legacy_shm_read16(dev,
1925                               B43legacy_SHM_SHARED, offset));
1926 }
1927
1928 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
1929 {
1930         switch (dev->phy.type) {
1931         case B43legacy_PHYTYPE_G:
1932                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
1933                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
1934                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
1935                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
1936                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
1937                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
1938                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
1939                 /* fallthrough */
1940         case B43legacy_PHYTYPE_B:
1941                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
1942                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
1943                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
1944                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
1945                 break;
1946         default:
1947                 B43legacy_BUG_ON(1);
1948         }
1949 }
1950
1951 /* Set the TX-Antenna for management frames sent by firmware. */
1952 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
1953                                           int antenna)
1954 {
1955         u16 ant = 0;
1956         u16 tmp;
1957
1958         switch (antenna) {
1959         case B43legacy_ANTENNA0:
1960                 ant |= B43legacy_TX4_PHY_ANT0;
1961                 break;
1962         case B43legacy_ANTENNA1:
1963                 ant |= B43legacy_TX4_PHY_ANT1;
1964                 break;
1965         case B43legacy_ANTENNA_AUTO:
1966                 ant |= B43legacy_TX4_PHY_ANTLAST;
1967                 break;
1968         default:
1969                 B43legacy_BUG_ON(1);
1970         }
1971
1972         /* FIXME We also need to set the other flags of the PHY control
1973          * field somewhere. */
1974
1975         /* For Beacons */
1976         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1977                                    B43legacy_SHM_SH_BEACPHYCTL);
1978         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1979         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1980                               B43legacy_SHM_SH_BEACPHYCTL, tmp);
1981         /* For ACK/CTS */
1982         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1983                                    B43legacy_SHM_SH_ACKCTSPHYCTL);
1984         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1985         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1986                               B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
1987         /* For Probe Resposes */
1988         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1989                                    B43legacy_SHM_SH_PRPHYCTL);
1990         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1991         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1992                               B43legacy_SHM_SH_PRPHYCTL, tmp);
1993 }
1994
1995 /* This is the opposite of b43legacy_chip_init() */
1996 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
1997 {
1998         b43legacy_radio_turn_off(dev, 1);
1999         b43legacy_leds_exit(dev);
2000         b43legacy_gpio_cleanup(dev);
2001         /* firmware is released later */
2002 }
2003
2004 /* Initialize the chip
2005  * http://bcm-specs.sipsolutions.net/ChipInit
2006  */
2007 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2008 {
2009         struct b43legacy_phy *phy = &dev->phy;
2010         int err;
2011         int tmp;
2012         u32 value32;
2013         u16 value16;
2014
2015         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
2016                           B43legacy_SBF_CORE_READY
2017                           | B43legacy_SBF_400);
2018
2019         err = b43legacy_request_firmware(dev);
2020         if (err)
2021                 goto out;
2022         err = b43legacy_upload_microcode(dev);
2023         if (err)
2024                 goto out; /* firmware is released later */
2025
2026         err = b43legacy_gpio_init(dev);
2027         if (err)
2028                 goto out; /* firmware is released later */
2029         b43legacy_leds_init(dev);
2030
2031         err = b43legacy_upload_initvals(dev);
2032         if (err)
2033                 goto err_leds_exit;
2034         b43legacy_radio_turn_on(dev);
2035
2036         b43legacy_write16(dev, 0x03E6, 0x0000);
2037         err = b43legacy_phy_init(dev);
2038         if (err)
2039                 goto err_radio_off;
2040
2041         /* Select initial Interference Mitigation. */
2042         tmp = phy->interfmode;
2043         phy->interfmode = B43legacy_INTERFMODE_NONE;
2044         b43legacy_radio_set_interference_mitigation(dev, tmp);
2045
2046         b43legacy_phy_set_antenna_diversity(dev);
2047         b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2048
2049         if (phy->type == B43legacy_PHYTYPE_B) {
2050                 value16 = b43legacy_read16(dev, 0x005E);
2051                 value16 |= 0x0004;
2052                 b43legacy_write16(dev, 0x005E, value16);
2053         }
2054         b43legacy_write32(dev, 0x0100, 0x01000000);
2055         if (dev->dev->id.revision < 5)
2056                 b43legacy_write32(dev, 0x010C, 0x01000000);
2057
2058         value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
2059         value32 &= ~B43legacy_SBF_MODE_NOTADHOC;
2060         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
2061         value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
2062         value32 |= B43legacy_SBF_MODE_NOTADHOC;
2063         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
2064
2065         if (b43legacy_using_pio(dev)) {
2066                 b43legacy_write32(dev, 0x0210, 0x00000100);
2067                 b43legacy_write32(dev, 0x0230, 0x00000100);
2068                 b43legacy_write32(dev, 0x0250, 0x00000100);
2069                 b43legacy_write32(dev, 0x0270, 0x00000100);
2070                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2071                                       0x0000);
2072         }
2073
2074         /* Probe Response Timeout value */
2075         /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2076         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2077
2078         /* Initially set the wireless operation mode. */
2079         b43legacy_adjust_opmode(dev);
2080
2081         if (dev->dev->id.revision < 3) {
2082                 b43legacy_write16(dev, 0x060E, 0x0000);
2083                 b43legacy_write16(dev, 0x0610, 0x8000);
2084                 b43legacy_write16(dev, 0x0604, 0x0000);
2085                 b43legacy_write16(dev, 0x0606, 0x0200);
2086         } else {
2087                 b43legacy_write32(dev, 0x0188, 0x80000000);
2088                 b43legacy_write32(dev, 0x018C, 0x02000000);
2089         }
2090         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2091         b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2092         b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2093         b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2094         b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2095         b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2096         b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2097
2098         value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2099         value32 |= 0x00100000;
2100         ssb_write32(dev->dev, SSB_TMSLOW, value32);
2101
2102         b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2103                           dev->dev->bus->chipco.fast_pwrup_delay);
2104
2105         B43legacy_WARN_ON(err != 0);
2106         b43legacydbg(dev->wl, "Chip initialized\n");
2107 out:
2108         return err;
2109
2110 err_radio_off:
2111         b43legacy_radio_turn_off(dev, 1);
2112 err_leds_exit:
2113         b43legacy_leds_exit(dev);
2114         b43legacy_gpio_cleanup(dev);
2115         goto out;
2116 }
2117
2118 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2119 {
2120         struct b43legacy_phy *phy = &dev->phy;
2121
2122         if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2123                 return;
2124
2125         b43legacy_mac_suspend(dev);
2126         b43legacy_phy_lo_g_measure(dev);
2127         b43legacy_mac_enable(dev);
2128 }
2129
2130 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2131 {
2132         b43legacy_phy_lo_mark_all_unused(dev);
2133         if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_RSSI) {
2134                 b43legacy_mac_suspend(dev);
2135                 b43legacy_calc_nrssi_slope(dev);
2136                 b43legacy_mac_enable(dev);
2137         }
2138 }
2139
2140 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2141 {
2142         /* Update device statistics. */
2143         b43legacy_calculate_link_quality(dev);
2144 }
2145
2146 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2147 {
2148         b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2149 }
2150
2151 static void do_periodic_work(struct b43legacy_wldev *dev)
2152 {
2153         unsigned int state;
2154
2155         state = dev->periodic_state;
2156         if (state % 8 == 0)
2157                 b43legacy_periodic_every120sec(dev);
2158         if (state % 4 == 0)
2159                 b43legacy_periodic_every60sec(dev);
2160         if (state % 2 == 0)
2161                 b43legacy_periodic_every30sec(dev);
2162         b43legacy_periodic_every15sec(dev);
2163 }
2164
2165 /* Periodic work locking policy:
2166  *      The whole periodic work handler is protected by
2167  *      wl->mutex. If another lock is needed somewhere in the
2168  *      pwork callchain, it's aquired in-place, where it's needed.
2169  */
2170 static void b43legacy_periodic_work_handler(struct work_struct *work)
2171 {
2172         struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2173                                              periodic_work.work);
2174         struct b43legacy_wl *wl = dev->wl;
2175         unsigned long delay;
2176
2177         mutex_lock(&wl->mutex);
2178
2179         if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2180                 goto out;
2181         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2182                 goto out_requeue;
2183
2184         do_periodic_work(dev);
2185
2186         dev->periodic_state++;
2187 out_requeue:
2188         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2189                 delay = msecs_to_jiffies(50);
2190         else
2191                 delay = round_jiffies_relative(HZ * 15);
2192         queue_delayed_work(wl->hw->workqueue, &dev->periodic_work, delay);
2193 out:
2194         mutex_unlock(&wl->mutex);
2195 }
2196
2197 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2198 {
2199         struct delayed_work *work = &dev->periodic_work;
2200
2201         dev->periodic_state = 0;
2202         INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2203         queue_delayed_work(dev->wl->hw->workqueue, work, 0);
2204 }
2205
2206 /* Validate access to the chip (SHM) */
2207 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2208 {
2209         u32 value;
2210         u32 shm_backup;
2211
2212         shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2213         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2214         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2215                                  0xAA5555AA)
2216                 goto error;
2217         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2218         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2219                                  0x55AAAA55)
2220                 goto error;
2221         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2222
2223         value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2224         if ((value | B43legacy_MACCTL_GMODE) !=
2225             (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2226                 goto error;
2227
2228         value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2229         if (value)
2230                 goto error;
2231
2232         return 0;
2233 error:
2234         b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2235         return -ENODEV;
2236 }
2237
2238 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2239 {
2240         dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2241         B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2242         dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2243                                         0x0056);
2244         /* KTP is a word address, but we address SHM bytewise.
2245          * So multiply by two.
2246          */
2247         dev->ktp *= 2;
2248         if (dev->dev->id.revision >= 5)
2249                 /* Number of RCMTA address slots */
2250                 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2251                                   dev->max_nr_keys - 8);
2252 }
2253
2254 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2255 {
2256         struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2257         unsigned long flags;
2258
2259         /* Don't take wl->mutex here, as it could deadlock with
2260          * hwrng internal locking. It's not needed to take
2261          * wl->mutex here, anyway. */
2262
2263         spin_lock_irqsave(&wl->irq_lock, flags);
2264         *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2265         spin_unlock_irqrestore(&wl->irq_lock, flags);
2266
2267         return (sizeof(u16));
2268 }
2269
2270 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2271 {
2272         if (wl->rng_initialized)
2273                 hwrng_unregister(&wl->rng);
2274 }
2275
2276 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2277 {
2278         int err;
2279
2280         snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2281                  "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2282         wl->rng.name = wl->rng_name;
2283         wl->rng.data_read = b43legacy_rng_read;
2284         wl->rng.priv = (unsigned long)wl;
2285         wl->rng_initialized = 1;
2286         err = hwrng_register(&wl->rng);
2287         if (err) {
2288                 wl->rng_initialized = 0;
2289                 b43legacyerr(wl, "Failed to register the random "
2290                        "number generator (%d)\n", err);
2291         }
2292
2293         return err;
2294 }
2295
2296 static int b43legacy_tx(struct ieee80211_hw *hw,
2297                         struct sk_buff *skb,
2298                         struct ieee80211_tx_control *ctl)
2299 {
2300         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2301         struct b43legacy_wldev *dev = wl->current_dev;
2302         int err = -ENODEV;
2303         unsigned long flags;
2304
2305         if (unlikely(!dev))
2306                 goto out;
2307         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2308                 goto out;
2309         /* DMA-TX is done without a global lock. */
2310         if (b43legacy_using_pio(dev)) {
2311                 spin_lock_irqsave(&wl->irq_lock, flags);
2312                 err = b43legacy_pio_tx(dev, skb, ctl);
2313                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2314         } else
2315                 err = b43legacy_dma_tx(dev, skb, ctl);
2316 out:
2317         if (unlikely(err))
2318                 return NETDEV_TX_BUSY;
2319         return NETDEV_TX_OK;
2320 }
2321
2322 static int b43legacy_conf_tx(struct ieee80211_hw *hw,
2323                              int queue,
2324                              const struct ieee80211_tx_queue_params *params)
2325 {
2326         return 0;
2327 }
2328
2329 static int b43legacy_get_tx_stats(struct ieee80211_hw *hw,
2330                                   struct ieee80211_tx_queue_stats *stats)
2331 {
2332         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2333         struct b43legacy_wldev *dev = wl->current_dev;
2334         unsigned long flags;
2335         int err = -ENODEV;
2336
2337         if (!dev)
2338                 goto out;
2339         spin_lock_irqsave(&wl->irq_lock, flags);
2340         if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2341                 if (b43legacy_using_pio(dev))
2342                         b43legacy_pio_get_tx_stats(dev, stats);
2343                 else
2344                         b43legacy_dma_get_tx_stats(dev, stats);
2345                 err = 0;
2346         }
2347         spin_unlock_irqrestore(&wl->irq_lock, flags);
2348 out:
2349         return err;
2350 }
2351
2352 static int b43legacy_get_stats(struct ieee80211_hw *hw,
2353                                struct ieee80211_low_level_stats *stats)
2354 {
2355         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2356         unsigned long flags;
2357
2358         spin_lock_irqsave(&wl->irq_lock, flags);
2359         memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2360         spin_unlock_irqrestore(&wl->irq_lock, flags);
2361
2362         return 0;
2363 }
2364
2365 static const char *phymode_to_string(unsigned int phymode)
2366 {
2367         switch (phymode) {
2368         case B43legacy_PHYMODE_B:
2369                 return "B";
2370         case B43legacy_PHYMODE_G:
2371                 return "G";
2372         default:
2373                 B43legacy_BUG_ON(1);
2374         }
2375         return "";
2376 }
2377
2378 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2379                                   unsigned int phymode,
2380                                   struct b43legacy_wldev **dev,
2381                                   bool *gmode)
2382 {
2383         struct b43legacy_wldev *d;
2384
2385         list_for_each_entry(d, &wl->devlist, list) {
2386                 if (d->phy.possible_phymodes & phymode) {
2387                         /* Ok, this device supports the PHY-mode.
2388                          * Set the gmode bit. */
2389                         *gmode = 1;
2390                         *dev = d;
2391
2392                         return 0;
2393                 }
2394         }
2395
2396         return -ESRCH;
2397 }
2398
2399 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2400 {
2401         struct ssb_device *sdev = dev->dev;
2402         u32 tmslow;
2403
2404         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2405         tmslow &= ~B43legacy_TMSLOW_GMODE;
2406         tmslow |= B43legacy_TMSLOW_PHYRESET;
2407         tmslow |= SSB_TMSLOW_FGC;
2408         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2409         msleep(1);
2410
2411         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2412         tmslow &= ~SSB_TMSLOW_FGC;
2413         tmslow |= B43legacy_TMSLOW_PHYRESET;
2414         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2415         msleep(1);
2416 }
2417
2418 /* Expects wl->mutex locked */
2419 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2420                                       unsigned int new_mode)
2421 {
2422         struct b43legacy_wldev *up_dev;
2423         struct b43legacy_wldev *down_dev;
2424         int err;
2425         bool gmode = 0;
2426         int prev_status;
2427
2428         err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2429         if (err) {
2430                 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2431                        phymode_to_string(new_mode));
2432                 return err;
2433         }
2434         if ((up_dev == wl->current_dev) &&
2435             (!!wl->current_dev->phy.gmode == !!gmode))
2436                 /* This device is already running. */
2437                 return 0;
2438         b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2439                phymode_to_string(new_mode));
2440         down_dev = wl->current_dev;
2441
2442         prev_status = b43legacy_status(down_dev);
2443         /* Shutdown the currently running core. */
2444         if (prev_status >= B43legacy_STAT_STARTED)
2445                 b43legacy_wireless_core_stop(down_dev);
2446         if (prev_status >= B43legacy_STAT_INITIALIZED)
2447                 b43legacy_wireless_core_exit(down_dev);
2448
2449         if (down_dev != up_dev)
2450                 /* We switch to a different core, so we put PHY into
2451                  * RESET on the old core. */
2452                 b43legacy_put_phy_into_reset(down_dev);
2453
2454         /* Now start the new core. */
2455         up_dev->phy.gmode = gmode;
2456         if (prev_status >= B43legacy_STAT_INITIALIZED) {
2457                 err = b43legacy_wireless_core_init(up_dev);
2458                 if (err) {
2459                         b43legacyerr(wl, "Fatal: Could not initialize device"
2460                                      " for newly selected %s-PHY mode\n",
2461                                      phymode_to_string(new_mode));
2462                         goto init_failure;
2463                 }
2464         }
2465         if (prev_status >= B43legacy_STAT_STARTED) {
2466                 err = b43legacy_wireless_core_start(up_dev);
2467                 if (err) {
2468                         b43legacyerr(wl, "Fatal: Coult not start device for "
2469                                "newly selected %s-PHY mode\n",
2470                                phymode_to_string(new_mode));
2471                         b43legacy_wireless_core_exit(up_dev);
2472                         goto init_failure;
2473                 }
2474         }
2475         B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2476
2477         b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2478
2479         wl->current_dev = up_dev;
2480
2481         return 0;
2482 init_failure:
2483         /* Whoops, failed to init the new core. No core is operating now. */
2484         wl->current_dev = NULL;
2485         return err;
2486 }
2487
2488 static int b43legacy_antenna_from_ieee80211(u8 antenna)
2489 {
2490         switch (antenna) {
2491         case 0: /* default/diversity */
2492                 return B43legacy_ANTENNA_DEFAULT;
2493         case 1: /* Antenna 0 */
2494                 return B43legacy_ANTENNA0;
2495         case 2: /* Antenna 1 */
2496                 return B43legacy_ANTENNA1;
2497         default:
2498                 return B43legacy_ANTENNA_DEFAULT;
2499         }
2500 }
2501
2502 static int b43legacy_dev_config(struct ieee80211_hw *hw,
2503                                 struct ieee80211_conf *conf)
2504 {
2505         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2506         struct b43legacy_wldev *dev;
2507         struct b43legacy_phy *phy;
2508         unsigned long flags;
2509         unsigned int new_phymode = 0xFFFF;
2510         int antenna_tx;
2511         int antenna_rx;
2512         int err = 0;
2513         u32 savedirqs;
2514
2515         antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx);
2516         antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx);
2517
2518         mutex_lock(&wl->mutex);
2519
2520         /* Switch the PHY mode (if necessary). */
2521         switch (conf->phymode) {
2522         case MODE_IEEE80211B:
2523                 new_phymode = B43legacy_PHYMODE_B;
2524                 break;
2525         case MODE_IEEE80211G:
2526                 new_phymode = B43legacy_PHYMODE_G;
2527                 break;
2528         default:
2529                 B43legacy_WARN_ON(1);
2530         }
2531         err = b43legacy_switch_phymode(wl, new_phymode);
2532         if (err)
2533                 goto out_unlock_mutex;
2534         dev = wl->current_dev;
2535         phy = &dev->phy;
2536
2537         /* Disable IRQs while reconfiguring the device.
2538          * This makes it possible to drop the spinlock throughout
2539          * the reconfiguration process. */
2540         spin_lock_irqsave(&wl->irq_lock, flags);
2541         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2542                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2543                 goto out_unlock_mutex;
2544         }
2545         savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
2546         spin_unlock_irqrestore(&wl->irq_lock, flags);
2547         b43legacy_synchronize_irq(dev);
2548
2549         /* Switch to the requested channel.
2550          * The firmware takes care of races with the TX handler. */
2551         if (conf->channel_val != phy->channel)
2552                 b43legacy_radio_selectchannel(dev, conf->channel_val, 0);
2553
2554         /* Enable/Disable ShortSlot timing. */
2555         if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
2556              != dev->short_slot) {
2557                 B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
2558                 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
2559                         b43legacy_short_slot_timing_enable(dev);
2560                 else
2561                         b43legacy_short_slot_timing_disable(dev);
2562         }
2563
2564         /* Adjust the desired TX power level. */
2565         if (conf->power_level != 0) {
2566                 if (conf->power_level != phy->power_level) {
2567                         phy->power_level = conf->power_level;
2568                         b43legacy_phy_xmitpower(dev);
2569                 }
2570         }
2571
2572         /* Antennas for RX and management frame TX. */
2573         b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2574
2575         /* Update templates for AP mode. */
2576         if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
2577                 b43legacy_set_beacon_int(dev, conf->beacon_int);
2578
2579
2580         if (!!conf->radio_enabled != phy->radio_on) {
2581                 if (conf->radio_enabled) {
2582                         b43legacy_radio_turn_on(dev);
2583                         b43legacyinfo(dev->wl, "Radio turned on by software\n");
2584                         if (!dev->radio_hw_enable)
2585                                 b43legacyinfo(dev->wl, "The hardware RF-kill"
2586                                               " button still turns the radio"
2587                                               " physically off. Press the"
2588                                               " button to turn it on.\n");
2589                 } else {
2590                         b43legacy_radio_turn_off(dev, 0);
2591                         b43legacyinfo(dev->wl, "Radio turned off by"
2592                                       " software\n");
2593                 }
2594         }
2595
2596         spin_lock_irqsave(&wl->irq_lock, flags);
2597         b43legacy_interrupt_enable(dev, savedirqs);
2598         mmiowb();
2599         spin_unlock_irqrestore(&wl->irq_lock, flags);
2600 out_unlock_mutex:
2601         mutex_unlock(&wl->mutex);
2602
2603         return err;
2604 }
2605
2606 static void b43legacy_configure_filter(struct ieee80211_hw *hw,
2607                                        unsigned int changed,
2608                                        unsigned int *fflags,
2609                                        int mc_count,
2610                                        struct dev_addr_list *mc_list)
2611 {
2612         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2613         struct b43legacy_wldev *dev = wl->current_dev;
2614         unsigned long flags;
2615
2616         if (!dev) {
2617                 *fflags = 0;
2618                 return;
2619         }
2620
2621         spin_lock_irqsave(&wl->irq_lock, flags);
2622         *fflags &= FIF_PROMISC_IN_BSS |
2623                   FIF_ALLMULTI |
2624                   FIF_FCSFAIL |
2625                   FIF_PLCPFAIL |
2626                   FIF_CONTROL |
2627                   FIF_OTHER_BSS |
2628                   FIF_BCN_PRBRESP_PROMISC;
2629
2630         changed &= FIF_PROMISC_IN_BSS |
2631                    FIF_ALLMULTI |
2632                    FIF_FCSFAIL |
2633                    FIF_PLCPFAIL |
2634                    FIF_CONTROL |
2635                    FIF_OTHER_BSS |
2636                    FIF_BCN_PRBRESP_PROMISC;
2637
2638         wl->filter_flags = *fflags;
2639
2640         if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2641                 b43legacy_adjust_opmode(dev);
2642         spin_unlock_irqrestore(&wl->irq_lock, flags);
2643 }
2644
2645 static int b43legacy_config_interface(struct ieee80211_hw *hw,
2646                                       int if_id,
2647                                       struct ieee80211_if_conf *conf)
2648 {
2649         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2650         struct b43legacy_wldev *dev = wl->current_dev;
2651         unsigned long flags;
2652
2653         if (!dev)
2654                 return -ENODEV;
2655         mutex_lock(&wl->mutex);
2656         spin_lock_irqsave(&wl->irq_lock, flags);
2657         B43legacy_WARN_ON(wl->if_id != if_id);
2658         if (conf->bssid)
2659                 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2660         else
2661                 memset(wl->bssid, 0, ETH_ALEN);
2662         if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2663                 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) {
2664                         B43legacy_WARN_ON(conf->type != IEEE80211_IF_TYPE_AP);
2665                         b43legacy_set_ssid(dev, conf->ssid, conf->ssid_len);
2666                         if (conf->beacon)
2667                                 b43legacy_refresh_templates(dev, conf->beacon);
2668                 }
2669                 b43legacy_write_mac_bssid_templates(dev);
2670         }
2671         spin_unlock_irqrestore(&wl->irq_lock, flags);
2672         mutex_unlock(&wl->mutex);
2673
2674         return 0;
2675 }
2676
2677 /* Locking: wl->mutex */
2678 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2679 {
2680         struct b43legacy_wl *wl = dev->wl;
2681         unsigned long flags;
2682
2683         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2684                 return;
2685
2686         /* Disable and sync interrupts. We must do this before than
2687          * setting the status to INITIALIZED, as the interrupt handler
2688          * won't care about IRQs then. */
2689         spin_lock_irqsave(&wl->irq_lock, flags);
2690         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
2691                                                           B43legacy_IRQ_ALL);
2692         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2693         spin_unlock_irqrestore(&wl->irq_lock, flags);
2694         b43legacy_synchronize_irq(dev);
2695
2696         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2697
2698         mutex_unlock(&wl->mutex);
2699         /* Must unlock as it would otherwise deadlock. No races here.
2700          * Cancel the possibly running self-rearming periodic work. */
2701         cancel_delayed_work_sync(&dev->periodic_work);
2702         mutex_lock(&wl->mutex);
2703
2704         ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2705
2706         b43legacy_mac_suspend(dev);
2707         free_irq(dev->dev->irq, dev);
2708         b43legacydbg(wl, "Wireless interface stopped\n");
2709 }
2710
2711 /* Locking: wl->mutex */
2712 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2713 {
2714         int err;
2715
2716         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2717
2718         drain_txstatus_queue(dev);
2719         err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2720                           IRQF_SHARED, KBUILD_MODNAME, dev);
2721         if (err) {
2722                 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2723                        dev->dev->irq);
2724                 goto out;
2725         }
2726         /* We are ready to run. */
2727         b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2728
2729         /* Start data flow (TX/RX) */
2730         b43legacy_mac_enable(dev);
2731         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
2732         ieee80211_start_queues(dev->wl->hw);
2733
2734         /* Start maintenance work */
2735         b43legacy_periodic_tasks_setup(dev);
2736
2737         b43legacydbg(dev->wl, "Wireless interface started\n");
2738 out:
2739         return err;
2740 }
2741
2742 /* Get PHY and RADIO versioning numbers */
2743 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2744 {
2745         struct b43legacy_phy *phy = &dev->phy;
2746         u32 tmp;
2747         u8 analog_type;
2748         u8 phy_type;
2749         u8 phy_rev;
2750         u16 radio_manuf;
2751         u16 radio_ver;
2752         u16 radio_rev;
2753         int unsupported = 0;
2754
2755         /* Get PHY versioning */
2756         tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2757         analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2758                       >> B43legacy_PHYVER_ANALOG_SHIFT;
2759         phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2760         phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2761         switch (phy_type) {
2762         case B43legacy_PHYTYPE_B:
2763                 if (phy_rev != 2 && phy_rev != 4
2764                     && phy_rev != 6 && phy_rev != 7)
2765                         unsupported = 1;
2766                 break;
2767         case B43legacy_PHYTYPE_G:
2768                 if (phy_rev > 8)
2769                         unsupported = 1;
2770                 break;
2771         default:
2772                 unsupported = 1;
2773         };
2774         if (unsupported) {
2775                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2776                        "(Analog %u, Type %u, Revision %u)\n",
2777                        analog_type, phy_type, phy_rev);
2778                 return -EOPNOTSUPP;
2779         }
2780         b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2781                analog_type, phy_type, phy_rev);
2782
2783
2784         /* Get RADIO versioning */
2785         if (dev->dev->bus->chip_id == 0x4317) {
2786                 if (dev->dev->bus->chip_rev == 0)
2787                         tmp = 0x3205017F;
2788                 else if (dev->dev->bus->chip_rev == 1)
2789                         tmp = 0x4205017F;
2790                 else
2791                         tmp = 0x5205017F;
2792         } else {
2793                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2794                                   B43legacy_RADIOCTL_ID);
2795                 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2796                 tmp <<= 16;
2797                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2798                                   B43legacy_RADIOCTL_ID);
2799                 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2800         }
2801         radio_manuf = (tmp & 0x00000FFF);
2802         radio_ver = (tmp & 0x0FFFF000) >> 12;
2803         radio_rev = (tmp & 0xF0000000) >> 28;
2804         switch (phy_type) {
2805         case B43legacy_PHYTYPE_B:
2806                 if ((radio_ver & 0xFFF0) != 0x2050)
2807                         unsupported = 1;
2808                 break;
2809         case B43legacy_PHYTYPE_G:
2810                 if (radio_ver != 0x2050)
2811                         unsupported = 1;
2812                 break;
2813         default:
2814                 B43legacy_BUG_ON(1);
2815         }
2816         if (unsupported) {
2817                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
2818                        "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2819                        radio_manuf, radio_ver, radio_rev);
2820                 return -EOPNOTSUPP;
2821         }
2822         b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
2823                      " Revision %u\n", radio_manuf, radio_ver, radio_rev);
2824
2825
2826         phy->radio_manuf = radio_manuf;
2827         phy->radio_ver = radio_ver;
2828         phy->radio_rev = radio_rev;
2829
2830         phy->analog = analog_type;
2831         phy->type = phy_type;
2832         phy->rev = phy_rev;
2833
2834         return 0;
2835 }
2836
2837 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
2838                                       struct b43legacy_phy *phy)
2839 {
2840         struct b43legacy_lopair *lo;
2841         int i;
2842
2843         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2844         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2845
2846         /* Flags */
2847         phy->locked = 0;
2848         /* Assume the radio is enabled. If it's not enabled, the state will
2849          * immediately get fixed on the first periodic work run. */
2850         dev->radio_hw_enable = 1;
2851
2852         phy->savedpctlreg = 0xFFFF;
2853         phy->aci_enable = 0;
2854         phy->aci_wlan_automatic = 0;
2855         phy->aci_hw_rssi = 0;
2856
2857         lo = phy->_lo_pairs;
2858         if (lo)
2859                 memset(lo, 0, sizeof(struct b43legacy_lopair) *
2860                                      B43legacy_LO_COUNT);
2861         phy->max_lb_gain = 0;
2862         phy->trsw_rx_gain = 0;
2863
2864         /* Set default attenuation values. */
2865         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2866         phy->rfatt = b43legacy_default_radio_attenuation(dev);
2867         phy->txctl1 = b43legacy_default_txctl1(dev);
2868         phy->txpwr_offset = 0;
2869
2870         /* NRSSI */
2871         phy->nrssislope = 0;
2872         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2873                 phy->nrssi[i] = -1000;
2874         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2875                 phy->nrssi_lt[i] = i;
2876
2877         phy->lofcal = 0xFFFF;
2878         phy->initval = 0xFFFF;
2879
2880         spin_lock_init(&phy->lock);
2881         phy->interfmode = B43legacy_INTERFMODE_NONE;
2882         phy->channel = 0xFF;
2883 }
2884
2885 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
2886 {
2887         /* Flags */
2888         dev->reg124_set_0x4 = 0;
2889
2890         /* Stats */
2891         memset(&dev->stats, 0, sizeof(dev->stats));
2892
2893         setup_struct_phy_for_init(dev, &dev->phy);
2894
2895         /* IRQ related flags */
2896         dev->irq_reason = 0;
2897         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
2898         dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
2899
2900         dev->mac_suspended = 1;
2901
2902         /* Noise calculation context */
2903         memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
2904 }
2905
2906 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
2907 {
2908 #ifdef CONFIG_SSB_DRIVER_PCICORE
2909         struct ssb_bus *bus = dev->dev->bus;
2910         u32 tmp;
2911
2912         if (bus->pcicore.dev &&
2913             bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
2914             bus->pcicore.dev->id.revision <= 5) {
2915                 /* IMCFGLO timeouts workaround. */
2916                 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
2917                 tmp &= ~SSB_IMCFGLO_REQTO;
2918                 tmp &= ~SSB_IMCFGLO_SERTO;
2919                 switch (bus->bustype) {
2920                 case SSB_BUSTYPE_PCI:
2921                 case SSB_BUSTYPE_PCMCIA:
2922                         tmp |= 0x32;
2923                         break;
2924                 case SSB_BUSTYPE_SSB:
2925                         tmp |= 0x53;
2926                         break;
2927                 }
2928                 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
2929         }
2930 #endif /* CONFIG_SSB_DRIVER_PCICORE */
2931 }
2932
2933 /* Shutdown a wireless core */
2934 /* Locking: wl->mutex */
2935 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
2936 {
2937         struct b43legacy_wl *wl = dev->wl;
2938         struct b43legacy_phy *phy = &dev->phy;
2939
2940         B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
2941         if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
2942                 return;
2943         b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
2944
2945         mutex_unlock(&wl->mutex);
2946         /* Must unlock as it would otherwise deadlock. No races here.
2947          * Cancel possibly pending workqueues. */
2948         cancel_work_sync(&dev->restart_work);
2949         mutex_lock(&wl->mutex);
2950
2951         mutex_unlock(&dev->wl->mutex);
2952         b43legacy_rfkill_exit(dev);
2953         mutex_lock(&dev->wl->mutex);
2954
2955         b43legacy_rng_exit(dev->wl);
2956         b43legacy_pio_free(dev);
2957         b43legacy_dma_free(dev);
2958         b43legacy_chip_exit(dev);
2959         b43legacy_radio_turn_off(dev, 1);
2960         b43legacy_switch_analog(dev, 0);
2961         if (phy->dyn_tssi_tbl)
2962                 kfree(phy->tssi2dbm);
2963         kfree(phy->lo_control);
2964         phy->lo_control = NULL;
2965         ssb_device_disable(dev->dev, 0);
2966         ssb_bus_may_powerdown(dev->dev->bus);
2967 }
2968
2969 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
2970 {
2971         struct b43legacy_phy *phy = &dev->phy;
2972         int i;
2973
2974         /* Set default attenuation values. */
2975         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2976         phy->rfatt = b43legacy_default_radio_attenuation(dev);
2977         phy->txctl1 = b43legacy_default_txctl1(dev);
2978         phy->txctl2 = 0xFFFF;
2979         phy->txpwr_offset = 0;
2980
2981         /* NRSSI */
2982         phy->nrssislope = 0;
2983         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2984                 phy->nrssi[i] = -1000;
2985         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2986                 phy->nrssi_lt[i] = i;
2987
2988         phy->lofcal = 0xFFFF;
2989         phy->initval = 0xFFFF;
2990
2991         phy->aci_enable = 0;
2992         phy->aci_wlan_automatic = 0;
2993         phy->aci_hw_rssi = 0;
2994
2995         phy->antenna_diversity = 0xFFFF;
2996         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2997         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2998
2999         /* Flags */
3000         phy->calibrated = 0;
3001         phy->locked = 0;
3002
3003         if (phy->_lo_pairs)
3004                 memset(phy->_lo_pairs, 0,
3005                        sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3006         memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3007 }
3008
3009 /* Initialize a wireless core */
3010 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3011 {
3012         struct b43legacy_wl *wl = dev->wl;
3013         struct ssb_bus *bus = dev->dev->bus;
3014         struct b43legacy_phy *phy = &dev->phy;
3015         struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3016         int err;
3017         u32 hf;
3018         u32 tmp;
3019
3020         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3021
3022         err = ssb_bus_powerup(bus, 0);
3023         if (err)
3024                 goto out;
3025         if (!ssb_device_is_enabled(dev->dev)) {
3026                 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3027                 b43legacy_wireless_core_reset(dev, tmp);
3028         }
3029
3030         if ((phy->type == B43legacy_PHYTYPE_B) ||
3031             (phy->type == B43legacy_PHYTYPE_G)) {
3032                 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3033                                          * B43legacy_LO_COUNT,
3034                                          GFP_KERNEL);
3035                 if (!phy->_lo_pairs)
3036                         return -ENOMEM;
3037         }
3038         setup_struct_wldev_for_init(dev);
3039
3040         err = b43legacy_phy_init_tssi2dbm_table(dev);
3041         if (err)
3042                 goto err_kfree_lo_control;
3043
3044         /* Enable IRQ routing to this device. */
3045         ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3046
3047         b43legacy_imcfglo_timeouts_workaround(dev);
3048         prepare_phy_data_for_init(dev);
3049         b43legacy_phy_calibrate(dev);
3050         err = b43legacy_chip_init(dev);
3051         if (err)
3052                 goto err_kfree_tssitbl;
3053         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3054                               B43legacy_SHM_SH_WLCOREREV,
3055                               dev->dev->id.revision);
3056         hf = b43legacy_hf_read(dev);
3057         if (phy->type == B43legacy_PHYTYPE_G) {
3058                 hf |= B43legacy_HF_SYMW;
3059                 if (phy->rev == 1)
3060                         hf |= B43legacy_HF_GDCW;
3061                 if (sprom->r1.boardflags_lo & B43legacy_BFL_PACTRL)
3062                         hf |= B43legacy_HF_OFDMPABOOST;
3063         } else if (phy->type == B43legacy_PHYTYPE_B) {
3064                 hf |= B43legacy_HF_SYMW;
3065                 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3066                         hf &= ~B43legacy_HF_GDCW;
3067         }
3068         b43legacy_hf_write(dev, hf);
3069
3070         /* Short/Long Retry Limit.
3071          * The retry-limit is a 4-bit counter. Enforce this to avoid overflowing
3072          * the chip-internal counter.
3073          */
3074         tmp = limit_value(modparam_short_retry, 0, 0xF);
3075         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3076                               0x0006, tmp);
3077         tmp = limit_value(modparam_long_retry, 0, 0xF);
3078         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3079                               0x0007, tmp);
3080
3081         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3082                               0x0044, 3);
3083         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3084                               0x0046, 2);
3085
3086         /* Disable sending probe responses from firmware.
3087          * Setting the MaxTime to one usec will always trigger
3088          * a timeout, so we never send any probe resp.
3089          * A timeout of zero is infinite. */
3090         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3091                               B43legacy_SHM_SH_PRMAXTIME, 1);
3092
3093         b43legacy_rate_memory_init(dev);
3094
3095         /* Minimum Contention Window */
3096         if (phy->type == B43legacy_PHYTYPE_B)
3097                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3098                                       0x0003, 31);
3099         else
3100                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3101                                       0x0003, 15);
3102         /* Maximum Contention Window */
3103         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3104                               0x0004, 1023);
3105
3106         do {
3107                 if (b43legacy_using_pio(dev))
3108                         err = b43legacy_pio_init(dev);
3109                 else {
3110                         err = b43legacy_dma_init(dev);
3111                         if (!err)
3112                                 b43legacy_qos_init(dev);
3113                 }
3114         } while (err == -EAGAIN);
3115         if (err)
3116                 goto err_chip_exit;
3117
3118         b43legacy_write16(dev, 0x0612, 0x0050);
3119         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0416, 0x0050);
3120         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4);
3121
3122         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3123         memset(wl->bssid, 0, ETH_ALEN);
3124         memset(wl->mac_addr, 0, ETH_ALEN);
3125         b43legacy_upload_card_macaddress(dev);
3126         b43legacy_security_init(dev);
3127         b43legacy_rfkill_init(dev);
3128         b43legacy_rng_init(wl);
3129
3130         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3131
3132 out:
3133         return err;
3134
3135 err_chip_exit:
3136         b43legacy_chip_exit(dev);
3137 err_kfree_tssitbl:
3138         if (phy->dyn_tssi_tbl)
3139                 kfree(phy->tssi2dbm);
3140 err_kfree_lo_control:
3141         kfree(phy->lo_control);
3142         phy->lo_control = NULL;
3143         ssb_bus_may_powerdown(bus);
3144         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3145         return err;
3146 }
3147
3148 static int b43legacy_add_interface(struct ieee80211_hw *hw,
3149                                    struct ieee80211_if_init_conf *conf)
3150 {
3151         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3152         struct b43legacy_wldev *dev;
3153         unsigned long flags;
3154         int err = -EOPNOTSUPP;
3155
3156         /* TODO: allow WDS/AP devices to coexist */
3157
3158         if (conf->type != IEEE80211_IF_TYPE_AP &&
3159             conf->type != IEEE80211_IF_TYPE_STA &&
3160             conf->type != IEEE80211_IF_TYPE_WDS &&
3161             conf->type != IEEE80211_IF_TYPE_IBSS)
3162                 return -EOPNOTSUPP;
3163
3164         mutex_lock(&wl->mutex);
3165         if (wl->operating)
3166                 goto out_mutex_unlock;
3167
3168         b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
3169
3170         dev = wl->current_dev;
3171         wl->operating = 1;
3172         wl->if_id = conf->if_id;
3173         wl->if_type = conf->type;
3174         memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN);
3175
3176         spin_lock_irqsave(&wl->irq_lock, flags);
3177         b43legacy_adjust_opmode(dev);
3178         b43legacy_upload_card_macaddress(dev);
3179         spin_unlock_irqrestore(&wl->irq_lock, flags);
3180
3181         err = 0;
3182  out_mutex_unlock:
3183         mutex_unlock(&wl->mutex);
3184
3185         return err;
3186 }
3187
3188 static void b43legacy_remove_interface(struct ieee80211_hw *hw,
3189                                        struct ieee80211_if_init_conf *conf)
3190 {
3191         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3192         struct b43legacy_wldev *dev = wl->current_dev;
3193         unsigned long flags;
3194
3195         b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
3196
3197         mutex_lock(&wl->mutex);
3198
3199         B43legacy_WARN_ON(!wl->operating);
3200         B43legacy_WARN_ON(wl->if_id != conf->if_id);
3201
3202         wl->operating = 0;
3203
3204         spin_lock_irqsave(&wl->irq_lock, flags);
3205         b43legacy_adjust_opmode(dev);
3206         memset(wl->mac_addr, 0, ETH_ALEN);
3207         b43legacy_upload_card_macaddress(dev);
3208         spin_unlock_irqrestore(&wl->irq_lock, flags);
3209
3210         mutex_unlock(&wl->mutex);
3211 }
3212
3213 static int b43legacy_start(struct ieee80211_hw *hw)
3214 {
3215         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3216         struct b43legacy_wldev *dev = wl->current_dev;
3217         int did_init = 0;
3218         int err = 0;
3219
3220         mutex_lock(&wl->mutex);
3221
3222         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3223                 err = b43legacy_wireless_core_init(dev);
3224                 if (err)
3225                         goto out_mutex_unlock;
3226                 did_init = 1;
3227         }
3228
3229         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3230                 err = b43legacy_wireless_core_start(dev);
3231                 if (err) {
3232                         if (did_init)
3233                                 b43legacy_wireless_core_exit(dev);
3234                         goto out_mutex_unlock;
3235                 }
3236         }
3237
3238 out_mutex_unlock:
3239         mutex_unlock(&wl->mutex);
3240
3241         return err;
3242 }
3243
3244 static void b43legacy_stop(struct ieee80211_hw *hw)
3245 {
3246         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3247         struct b43legacy_wldev *dev = wl->current_dev;
3248
3249         mutex_lock(&wl->mutex);
3250         if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3251                 b43legacy_wireless_core_stop(dev);
3252         b43legacy_wireless_core_exit(dev);
3253         mutex_unlock(&wl->mutex);
3254 }
3255
3256
3257 static const struct ieee80211_ops b43legacy_hw_ops = {
3258         .tx = b43legacy_tx,
3259         .conf_tx = b43legacy_conf_tx,
3260         .add_interface = b43legacy_add_interface,
3261         .remove_interface = b43legacy_remove_interface,
3262         .config = b43legacy_dev_config,
3263         .config_interface = b43legacy_config_interface,
3264         .configure_filter = b43legacy_configure_filter,
3265         .get_stats = b43legacy_get_stats,
3266         .get_tx_stats = b43legacy_get_tx_stats,
3267         .start = b43legacy_start,
3268         .stop = b43legacy_stop,
3269 };
3270
3271 /* Hard-reset the chip. Do not call this directly.
3272  * Use b43legacy_controller_restart()
3273  */
3274 static void b43legacy_chip_reset(struct work_struct *work)
3275 {
3276         struct b43legacy_wldev *dev =
3277                 container_of(work, struct b43legacy_wldev, restart_work);
3278         struct b43legacy_wl *wl = dev->wl;
3279         int err = 0;
3280         int prev_status;
3281
3282         mutex_lock(&wl->mutex);
3283
3284         prev_status = b43legacy_status(dev);
3285         /* Bring the device down... */
3286         if (prev_status >= B43legacy_STAT_STARTED)
3287                 b43legacy_wireless_core_stop(dev);
3288         if (prev_status >= B43legacy_STAT_INITIALIZED)
3289                 b43legacy_wireless_core_exit(dev);
3290
3291         /* ...and up again. */
3292         if (prev_status >= B43legacy_STAT_INITIALIZED) {
3293                 err = b43legacy_wireless_core_init(dev);
3294                 if (err)
3295                         goto out;
3296         }
3297         if (prev_status >= B43legacy_STAT_STARTED) {
3298                 err = b43legacy_wireless_core_start(dev);
3299                 if (err) {
3300                         b43legacy_wireless_core_exit(dev);
3301                         goto out;
3302                 }
3303         }
3304 out:
3305         mutex_unlock(&wl->mutex);
3306         if (err)
3307                 b43legacyerr(wl, "Controller restart FAILED\n");
3308         else
3309                 b43legacyinfo(wl, "Controller restarted\n");
3310 }
3311
3312 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3313                                  int have_bphy,
3314                                  int have_gphy)
3315 {
3316         struct ieee80211_hw *hw = dev->wl->hw;
3317         struct ieee80211_hw_mode *mode;
3318         struct b43legacy_phy *phy = &dev->phy;
3319         int cnt = 0;
3320         int err;
3321
3322         phy->possible_phymodes = 0;
3323         for (; 1; cnt++) {
3324                 if (have_bphy) {
3325                         B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3326                         mode = &phy->hwmodes[cnt];
3327
3328                         mode->mode = MODE_IEEE80211B;
3329                         mode->num_channels = b43legacy_bg_chantable_size;
3330                         mode->channels = b43legacy_bg_chantable;
3331                         mode->num_rates = b43legacy_b_ratetable_size;
3332                         mode->rates = b43legacy_b_ratetable;
3333                         err = ieee80211_register_hwmode(hw, mode);
3334                         if (err)
3335                                 return err;
3336
3337                         phy->possible_phymodes |= B43legacy_PHYMODE_B;
3338                         have_bphy = 0;
3339                         continue;
3340                 }
3341                 if (have_gphy) {
3342                         B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3343                         mode = &phy->hwmodes[cnt];
3344
3345                         mode->mode = MODE_IEEE80211G;
3346                         mode->num_channels = b43legacy_bg_chantable_size;
3347                         mode->channels = b43legacy_bg_chantable;
3348                         mode->num_rates = b43legacy_g_ratetable_size;
3349                         mode->rates = b43legacy_g_ratetable;
3350                         err = ieee80211_register_hwmode(hw, mode);
3351                         if (err)
3352                                 return err;
3353
3354                         phy->possible_phymodes |= B43legacy_PHYMODE_G;
3355                         have_gphy = 0;
3356                         continue;
3357                 }
3358                 break;
3359         }
3360
3361         return 0;
3362 }
3363
3364 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3365 {
3366         b43legacy_rfkill_free(dev);
3367         /* We release firmware that late to not be required to re-request
3368          * is all the time when we reinit the core. */
3369         b43legacy_release_firmware(dev);
3370 }
3371
3372 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3373 {
3374         struct b43legacy_wl *wl = dev->wl;
3375         struct ssb_bus *bus = dev->dev->bus;
3376         struct pci_dev *pdev = bus->host_pci;
3377         int err;
3378         int have_bphy = 0;
3379         int have_gphy = 0;
3380         u32 tmp;
3381
3382         /* Do NOT do any device initialization here.
3383          * Do it in wireless_core_init() instead.
3384          * This function is for gathering basic information about the HW, only.
3385          * Also some structs may be set up here. But most likely you want to
3386          * have that in core_init(), too.
3387          */
3388
3389         err = ssb_bus_powerup(bus, 0);
3390         if (err) {
3391                 b43legacyerr(wl, "Bus powerup failed\n");
3392                 goto out;
3393         }
3394         /* Get the PHY type. */
3395         if (dev->dev->id.revision >= 5) {
3396                 u32 tmshigh;
3397
3398                 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3399                 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3400                 if (!have_gphy)
3401                         have_bphy = 1;
3402         } else if (dev->dev->id.revision == 4)
3403                 have_gphy = 1;
3404         else
3405                 have_bphy = 1;
3406
3407         dev->phy.gmode = (have_gphy || have_bphy);
3408         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3409         b43legacy_wireless_core_reset(dev, tmp);
3410
3411         err = b43legacy_phy_versioning(dev);
3412         if (err)
3413                 goto err_powerdown;
3414         /* Check if this device supports multiband. */
3415         if (!pdev ||
3416             (pdev->device != 0x4312 &&
3417              pdev->device != 0x4319 &&
3418              pdev->device != 0x4324)) {
3419                 /* No multiband support. */
3420                 have_bphy = 0;
3421                 have_gphy = 0;
3422                 switch (dev->phy.type) {
3423                 case B43legacy_PHYTYPE_B:
3424                         have_bphy = 1;
3425                         break;
3426                 case B43legacy_PHYTYPE_G:
3427                         have_gphy = 1;
3428                         break;
3429                 default:
3430                         B43legacy_BUG_ON(1);
3431                 }
3432         }
3433         dev->phy.gmode = (have_gphy || have_bphy);
3434         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3435         b43legacy_wireless_core_reset(dev, tmp);
3436
3437         err = b43legacy_validate_chipaccess(dev);
3438         if (err)
3439                 goto err_powerdown;
3440         err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3441         if (err)
3442                 goto err_powerdown;
3443
3444         /* Now set some default "current_dev" */
3445         if (!wl->current_dev)
3446                 wl->current_dev = dev;
3447         INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3448         b43legacy_rfkill_alloc(dev);
3449
3450         b43legacy_radio_turn_off(dev, 1);
3451         b43legacy_switch_analog(dev, 0);
3452         ssb_device_disable(dev->dev, 0);
3453         ssb_bus_may_powerdown(bus);
3454
3455 out:
3456         return err;
3457
3458 err_powerdown:
3459         ssb_bus_may_powerdown(bus);
3460         return err;
3461 }
3462
3463 static void b43legacy_one_core_detach(struct ssb_device *dev)
3464 {
3465         struct b43legacy_wldev *wldev;
3466         struct b43legacy_wl *wl;
3467
3468         wldev = ssb_get_drvdata(dev);
3469         wl = wldev->wl;
3470         cancel_work_sync(&wldev->restart_work);
3471         b43legacy_debugfs_remove_device(wldev);
3472         b43legacy_wireless_core_detach(wldev);
3473         list_del(&wldev->list);
3474         wl->nr_devs--;
3475         ssb_set_drvdata(dev, NULL);
3476         kfree(wldev);
3477 }
3478
3479 static int b43legacy_one_core_attach(struct ssb_device *dev,
3480                                      struct b43legacy_wl *wl)
3481 {
3482         struct b43legacy_wldev *wldev;
3483         struct pci_dev *pdev;
3484         int err = -ENOMEM;
3485
3486         if (!list_empty(&wl->devlist)) {
3487                 /* We are not the first core on this chip. */
3488                 pdev = dev->bus->host_pci;
3489                 /* Only special chips support more than one wireless
3490                  * core, although some of the other chips have more than
3491                  * one wireless core as well. Check for this and
3492                  * bail out early.
3493                  */
3494                 if (!pdev ||
3495                     ((pdev->device != 0x4321) &&
3496                      (pdev->device != 0x4313) &&
3497                      (pdev->device != 0x431A))) {
3498                         b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3499                         return -ENODEV;
3500                 }
3501         }
3502
3503         wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3504         if (!wldev)
3505                 goto out;
3506
3507         wldev->dev = dev;
3508         wldev->wl = wl;
3509         b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3510         wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3511         tasklet_init(&wldev->isr_tasklet,
3512                      (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3513                      (unsigned long)wldev);
3514         if (modparam_pio)
3515                 wldev->__using_pio = 1;
3516         INIT_LIST_HEAD(&wldev->list);
3517
3518         err = b43legacy_wireless_core_attach(wldev);
3519         if (err)
3520                 goto err_kfree_wldev;
3521
3522         list_add(&wldev->list, &wl->devlist);
3523         wl->nr_devs++;
3524         ssb_set_drvdata(dev, wldev);
3525         b43legacy_debugfs_add_device(wldev);
3526 out:
3527         return err;
3528
3529 err_kfree_wldev:
3530         kfree(wldev);
3531         return err;
3532 }
3533
3534 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3535 {
3536         /* boardflags workarounds */
3537         if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3538             bus->boardinfo.type == 0x4E &&
3539             bus->boardinfo.rev > 0x40)
3540                 bus->sprom.r1.boardflags_lo |= B43legacy_BFL_PACTRL;
3541
3542         /* Convert Antennagain values to Q5.2 */
3543         if (bus->sprom.r1.antenna_gain_bg == 0xFF)
3544                 bus->sprom.r1.antenna_gain_bg = 2; /* if unset, use 2 dBm */
3545         bus->sprom.r1.antenna_gain_bg <<= 2;
3546 }
3547
3548 static void b43legacy_wireless_exit(struct ssb_device *dev,
3549                                   struct b43legacy_wl *wl)
3550 {
3551         struct ieee80211_hw *hw = wl->hw;
3552
3553         ssb_set_devtypedata(dev, NULL);
3554         ieee80211_free_hw(hw);
3555 }
3556
3557 static int b43legacy_wireless_init(struct ssb_device *dev)
3558 {
3559         struct ssb_sprom *sprom = &dev->bus->sprom;
3560         struct ieee80211_hw *hw;
3561         struct b43legacy_wl *wl;
3562         int err = -ENOMEM;
3563
3564         b43legacy_sprom_fixup(dev->bus);
3565
3566         hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3567         if (!hw) {
3568                 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3569                 goto out;
3570         }
3571
3572         /* fill hw info */
3573         hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
3574                     IEEE80211_HW_RX_INCLUDES_FCS;
3575         hw->max_signal = 100;
3576         hw->max_rssi = -110;
3577         hw->max_noise = -110;
3578         hw->queues = 1; /* FIXME: hardware has more queues */
3579         SET_IEEE80211_DEV(hw, dev->dev);
3580         if (is_valid_ether_addr(sprom->r1.et1mac))
3581                 SET_IEEE80211_PERM_ADDR(hw, sprom->r1.et1mac);
3582         else
3583                 SET_IEEE80211_PERM_ADDR(hw, sprom->r1.il0mac);
3584
3585         /* Get and initialize struct b43legacy_wl */
3586         wl = hw_to_b43legacy_wl(hw);
3587         memset(wl, 0, sizeof(*wl));
3588         wl->hw = hw;
3589         spin_lock_init(&wl->irq_lock);
3590         spin_lock_init(&wl->leds_lock);
3591         mutex_init(&wl->mutex);
3592         INIT_LIST_HEAD(&wl->devlist);
3593
3594         ssb_set_devtypedata(dev, wl);
3595         b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3596         err = 0;
3597 out:
3598         return err;
3599 }
3600
3601 static int b43legacy_probe(struct ssb_device *dev,
3602                          const struct ssb_device_id *id)
3603 {
3604         struct b43legacy_wl *wl;
3605         int err;
3606         int first = 0;
3607
3608         wl = ssb_get_devtypedata(dev);
3609         if (!wl) {
3610                 /* Probing the first core - setup common struct b43legacy_wl */
3611                 first = 1;
3612                 err = b43legacy_wireless_init(dev);
3613                 if (err)
3614                         goto out;
3615                 wl = ssb_get_devtypedata(dev);
3616                 B43legacy_WARN_ON(!wl);
3617         }
3618         err = b43legacy_one_core_attach(dev, wl);
3619         if (err)
3620                 goto err_wireless_exit;
3621
3622         if (first) {
3623                 err = ieee80211_register_hw(wl->hw);
3624                 if (err)
3625                         goto err_one_core_detach;
3626         }
3627
3628 out:
3629         return err;
3630
3631 err_one_core_detach:
3632         b43legacy_one_core_detach(dev);
3633 err_wireless_exit:
3634         if (first)
3635                 b43legacy_wireless_exit(dev, wl);
3636         return err;
3637 }
3638
3639 static void b43legacy_remove(struct ssb_device *dev)
3640 {
3641         struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3642         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3643
3644         B43legacy_WARN_ON(!wl);
3645         if (wl->current_dev == wldev)
3646                 ieee80211_unregister_hw(wl->hw);
3647
3648         b43legacy_one_core_detach(dev);
3649
3650         if (list_empty(&wl->devlist))
3651                 /* Last core on the chip unregistered.
3652                  * We can destroy common struct b43legacy_wl.
3653                  */
3654                 b43legacy_wireless_exit(dev, wl);
3655 }
3656
3657 /* Perform a hardware reset. This can be called from any context. */
3658 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3659                                   const char *reason)
3660 {
3661         /* Must avoid requeueing, if we are in shutdown. */
3662         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3663                 return;
3664         b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3665         queue_work(dev->wl->hw->workqueue, &dev->restart_work);
3666 }
3667
3668 #ifdef CONFIG_PM
3669
3670 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3671 {
3672         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3673         struct b43legacy_wl *wl = wldev->wl;
3674
3675         b43legacydbg(wl, "Suspending...\n");
3676
3677         mutex_lock(&wl->mutex);
3678         wldev->suspend_init_status = b43legacy_status(wldev);
3679         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3680                 b43legacy_wireless_core_stop(wldev);
3681         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3682                 b43legacy_wireless_core_exit(wldev);
3683         mutex_unlock(&wl->mutex);
3684
3685         b43legacydbg(wl, "Device suspended.\n");
3686
3687         return 0;
3688 }
3689
3690 static int b43legacy_resume(struct ssb_device *dev)
3691 {
3692         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3693         struct b43legacy_wl *wl = wldev->wl;
3694         int err = 0;
3695
3696         b43legacydbg(wl, "Resuming...\n");
3697
3698         mutex_lock(&wl->mutex);
3699         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3700                 err = b43legacy_wireless_core_init(wldev);
3701                 if (err) {
3702                         b43legacyerr(wl, "Resume failed at core init\n");
3703                         goto out;
3704                 }
3705         }
3706         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3707                 err = b43legacy_wireless_core_start(wldev);
3708                 if (err) {
3709                         b43legacy_wireless_core_exit(wldev);
3710                         b43legacyerr(wl, "Resume failed at core start\n");
3711                         goto out;
3712                 }
3713         }
3714         mutex_unlock(&wl->mutex);
3715
3716         b43legacydbg(wl, "Device resumed.\n");
3717 out:
3718         return err;
3719 }
3720
3721 #else   /* CONFIG_PM */
3722 # define b43legacy_suspend      NULL
3723 # define b43legacy_resume               NULL
3724 #endif  /* CONFIG_PM */
3725
3726 static struct ssb_driver b43legacy_ssb_driver = {
3727         .name           = KBUILD_MODNAME,
3728         .id_table       = b43legacy_ssb_tbl,
3729         .probe          = b43legacy_probe,
3730         .remove         = b43legacy_remove,
3731         .suspend        = b43legacy_suspend,
3732         .resume         = b43legacy_resume,
3733 };
3734
3735 static int __init b43legacy_init(void)
3736 {
3737         int err;
3738
3739         b43legacy_debugfs_init();
3740
3741         err = ssb_driver_register(&b43legacy_ssb_driver);
3742         if (err)
3743                 goto err_dfs_exit;
3744
3745         return err;
3746
3747 err_dfs_exit:
3748         b43legacy_debugfs_exit();
3749         return err;
3750 }
3751
3752 static void __exit b43legacy_exit(void)
3753 {
3754         ssb_driver_unregister(&b43legacy_ssb_driver);
3755         b43legacy_debugfs_exit();
3756 }
3757
3758 module_init(b43legacy_init)
3759 module_exit(b43legacy_exit)