2 =========================================================================
3 r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
4 --------------------------------------------------------------------
7 Feb 4 2002 - created initially by ShuChen <shuchen@realtek.com.tw>.
8 May 20 2002 - Add link status force-mode and TBI mode support.
9 2004 - Massive updates. See kernel SCM system for details.
10 =========================================================================
11 1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
12 Command: 'insmod r8169 media = SET_MEDIA'
13 Ex: 'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
23 =========================================================================
24 VERSION 1.1 <2002/10/4>
26 The bit4:0 of MII register 4 is called "selector field", and have to be
27 00001b to indicate support of IEEE std 802.3 during NWay process of
28 exchanging Link Code Word (FLP).
30 VERSION 1.2 <2002/11/30>
33 - Use ether_crc in stock kernel (linux/crc32.h)
34 - Copy mc_filter setup code from 8139cp
35 (includes an optimization, and avoids set_bit use)
37 VERSION 1.6LK <2004/04/14>
39 - Merge of Realtek's version 1.6
40 - Conversion to DMA API
45 VERSION 2.2LK <2005/01/25>
47 - RX csum, TX csum/SG, TSO
49 - baby (< 7200) Jumbo frames support
50 - Merge of Realtek's version 2.2 (new phy)
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/pci.h>
56 #include <linux/netdevice.h>
57 #include <linux/etherdevice.h>
58 #include <linux/delay.h>
59 #include <linux/ethtool.h>
60 #include <linux/mii.h>
61 #include <linux/if_vlan.h>
62 #include <linux/crc32.h>
65 #include <linux/tcp.h>
66 #include <linux/init.h>
67 #include <linux/dma-mapping.h>
72 #ifdef CONFIG_R8169_NAPI
73 #define NAPI_SUFFIX "-NAPI"
75 #define NAPI_SUFFIX ""
78 #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
79 #define MODULENAME "r8169"
80 #define PFX MODULENAME ": "
83 #define assert(expr) \
85 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
86 #expr,__FILE__,__FUNCTION__,__LINE__); \
88 #define dprintk(fmt, args...) do { printk(PFX fmt, ## args); } while (0)
90 #define assert(expr) do {} while (0)
91 #define dprintk(fmt, args...) do {} while (0)
92 #endif /* RTL8169_DEBUG */
94 #define TX_BUFFS_AVAIL(tp) \
95 (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
97 #ifdef CONFIG_R8169_NAPI
98 #define rtl8169_rx_skb netif_receive_skb
99 #define rtl8169_rx_hwaccel_skb vlan_hwaccel_rx
100 #define rtl8169_rx_quota(count, quota) min(count, quota)
102 #define rtl8169_rx_skb netif_rx
103 #define rtl8169_rx_hwaccel_skb vlan_hwaccel_receive_skb
104 #define rtl8169_rx_quota(count, quota) count
109 static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
110 static int num_media = 0;
112 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
113 static int max_interrupt_work = 20;
115 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
116 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
117 static int multicast_filter_limit = 32;
119 /* MAC address length */
120 #define MAC_ADDR_LEN 6
122 #define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
123 #define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
124 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
125 #define EarlyTxThld 0x3F /* 0x3F means NO early transmit */
126 #define RxPacketMaxSize 0x3FE8 /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
127 #define SafeMtu 0x1c20 /* ... actually life sucks beyond ~7k */
128 #define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
130 #define R8169_REGS_SIZE 256
131 #define R8169_NAPI_WEIGHT 64
132 #define NUM_TX_DESC 64 /* Number of Tx descriptor registers */
133 #define NUM_RX_DESC 256 /* Number of Rx descriptor registers */
134 #define RX_BUF_SIZE 1536 /* Rx Buffer size */
135 #define R8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
136 #define R8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
138 #define RTL8169_TX_TIMEOUT (6*HZ)
139 #define RTL8169_PHY_TIMEOUT (10*HZ)
141 /* write/read MMIO register */
142 #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
143 #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
144 #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
145 #define RTL_R8(reg) readb (ioaddr + (reg))
146 #define RTL_R16(reg) readw (ioaddr + (reg))
147 #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
150 RTL_GIGA_MAC_VER_B = 0x00,
151 /* RTL_GIGA_MAC_VER_C = 0x03, */
152 RTL_GIGA_MAC_VER_D = 0x01,
153 RTL_GIGA_MAC_VER_E = 0x02,
154 RTL_GIGA_MAC_VER_X = 0x04 /* Greater than RTL_GIGA_MAC_VER_E */
158 RTL_GIGA_PHY_VER_C = 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
159 RTL_GIGA_PHY_VER_D = 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
160 RTL_GIGA_PHY_VER_E = 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
161 RTL_GIGA_PHY_VER_F = 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
162 RTL_GIGA_PHY_VER_G = 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
163 RTL_GIGA_PHY_VER_H = 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
167 #define _R(NAME,MAC,MASK) \
168 { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
170 const static struct {
173 u32 RxConfigMask; /* Clears the bits supported by this chip */
174 } rtl_chip_info[] = {
175 _R("RTL8169", RTL_GIGA_MAC_VER_B, 0xff7e1880),
176 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_D, 0xff7e1880),
177 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_E, 0xff7e1880),
178 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_X, 0xff7e1880),
182 static struct pci_device_id rtl8169_pci_tbl[] = {
183 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8169), },
184 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4300), },
185 { PCI_DEVICE(0x16ec, 0x0116), },
189 MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
191 static int rx_copybreak = 200;
194 enum RTL8169_registers {
195 MAC0 = 0, /* Ethernet hardware address. */
196 MAR0 = 8, /* Multicast filter. */
197 TxDescStartAddrLow = 0x20,
198 TxDescStartAddrHigh = 0x24,
199 TxHDescStartAddrLow = 0x28,
200 TxHDescStartAddrHigh = 0x2c,
226 RxDescAddrLow = 0xE4,
227 RxDescAddrHigh = 0xE8,
230 FuncEventMask = 0xF4,
231 FuncPresetState = 0xF8,
232 FuncForceEvent = 0xFC,
235 enum RTL8169_register_content {
236 /* InterruptStatusBits */
240 TxDescUnavail = 0x80,
263 Cfg9346_Unlock = 0xC0,
268 AcceptBroadcast = 0x08,
269 AcceptMulticast = 0x04,
271 AcceptAllPhys = 0x01,
278 TxInterFrameGapShift = 24,
279 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
282 TBIReset = 0x80000000,
283 TBILoopback = 0x40000000,
284 TBINwEnable = 0x20000000,
285 TBINwRestart = 0x10000000,
286 TBILinkOk = 0x02000000,
287 TBINwComplete = 0x01000000,
295 /* rtl8169_PHYstatus */
305 /* GIGABIT_PHY_registers */
308 PHY_AUTO_NEGO_REG = 4,
309 PHY_1000_CTRL_REG = 9,
311 /* GIGABIT_PHY_REG_BIT */
312 PHY_Restart_Auto_Nego = 0x0200,
313 PHY_Enable_Auto_Nego = 0x1000,
315 /* PHY_STAT_REG = 1 */
316 PHY_Auto_Neco_Comp = 0x0020,
318 /* PHY_AUTO_NEGO_REG = 4 */
319 PHY_Cap_10_Half = 0x0020,
320 PHY_Cap_10_Full = 0x0040,
321 PHY_Cap_100_Half = 0x0080,
322 PHY_Cap_100_Full = 0x0100,
324 /* PHY_1000_CTRL_REG = 9 */
325 PHY_Cap_1000_Full = 0x0200,
337 TBILinkOK = 0x02000000,
340 enum _DescStatusBit {
341 DescOwn = (1 << 31), /* Descriptor is owned by NIC */
342 RingEnd = (1 << 30), /* End of descriptor ring */
343 FirstFrag = (1 << 29), /* First segment of a packet */
344 LastFrag = (1 << 28), /* Final segment of a packet */
347 LargeSend = (1 << 27), /* TCP Large Send Offload (TSO) */
348 MSSShift = 16, /* MSS value position */
349 MSSMask = 0xfff, /* MSS value + LargeSend bit: 12 bits */
350 IPCS = (1 << 18), /* Calculate IP checksum */
351 UDPCS = (1 << 17), /* Calculate UDP/IP checksum */
352 TCPCS = (1 << 16), /* Calculate TCP/IP checksum */
353 TxVlanTag = (1 << 17), /* Add VLAN tag */
356 PID1 = (1 << 18), /* Protocol ID bit 1/2 */
357 PID0 = (1 << 17), /* Protocol ID bit 2/2 */
359 #define RxProtoUDP (PID1)
360 #define RxProtoTCP (PID0)
361 #define RxProtoIP (PID1 | PID0)
362 #define RxProtoMask RxProtoIP
364 IPFail = (1 << 16), /* IP checksum failed */
365 UDPFail = (1 << 15), /* UDP/IP checksum failed */
366 TCPFail = (1 << 14), /* TCP/IP checksum failed */
367 RxVlanTag = (1 << 16), /* VLAN tag available */
370 #define RsvdMask 0x3fffc000
387 u8 __pad[sizeof(void *) - sizeof(u32)];
390 struct rtl8169_private {
391 void __iomem *mmio_addr; /* memory map physical address */
392 struct pci_dev *pci_dev; /* Index of PCI device */
393 struct net_device_stats stats; /* statistics of net device */
394 spinlock_t lock; /* spin lock flag */
398 u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
399 u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
402 struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
403 struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
404 dma_addr_t TxPhyAddr;
405 dma_addr_t RxPhyAddr;
406 struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */
407 struct ring_info tx_skb[NUM_TX_DESC]; /* Tx data buffers */
409 struct timer_list timer;
412 int phy_auto_nego_reg;
413 int phy_1000_ctrl_reg;
414 #ifdef CONFIG_R8169_VLAN
415 struct vlan_group *vlgrp;
417 int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex);
418 void (*get_settings)(struct net_device *, struct ethtool_cmd *);
419 void (*phy_reset_enable)(void __iomem *);
420 unsigned int (*phy_reset_pending)(void __iomem *);
421 unsigned int (*link_ok)(void __iomem *);
422 struct work_struct task;
425 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@oss.sgi.com>");
426 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
427 module_param_array(media, int, &num_media, 0);
428 module_param(rx_copybreak, int, 0);
429 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
430 module_param(use_dac, int, 0);
431 MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
432 MODULE_LICENSE("GPL");
433 MODULE_VERSION(RTL8169_VERSION);
435 static int rtl8169_open(struct net_device *dev);
436 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev);
437 static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance,
438 struct pt_regs *regs);
439 static int rtl8169_init_ring(struct net_device *dev);
440 static void rtl8169_hw_start(struct net_device *dev);
441 static int rtl8169_close(struct net_device *dev);
442 static void rtl8169_set_rx_mode(struct net_device *dev);
443 static void rtl8169_tx_timeout(struct net_device *dev);
444 static struct net_device_stats *rtl8169_get_stats(struct net_device *netdev);
445 static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *,
447 static int rtl8169_change_mtu(struct net_device *netdev, int new_mtu);
448 static void rtl8169_down(struct net_device *dev);
450 #ifdef CONFIG_R8169_NAPI
451 static int rtl8169_poll(struct net_device *dev, int *budget);
454 static const u16 rtl8169_intr_mask =
455 SYSErr | LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
456 static const u16 rtl8169_napi_event =
457 RxOK | RxOverflow | RxFIFOOver | TxOK | TxErr;
458 static const unsigned int rtl8169_rx_config =
459 (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
461 #define PHY_Cap_10_Half_Or_Less PHY_Cap_10_Half
462 #define PHY_Cap_10_Full_Or_Less PHY_Cap_10_Full | PHY_Cap_10_Half_Or_Less
463 #define PHY_Cap_100_Half_Or_Less PHY_Cap_100_Half | PHY_Cap_10_Full_Or_Less
464 #define PHY_Cap_100_Full_Or_Less PHY_Cap_100_Full | PHY_Cap_100_Half_Or_Less
466 static void mdio_write(void __iomem *ioaddr, int RegAddr, int value)
470 RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);
473 for (i = 2000; i > 0; i--) {
474 /* Check if the RTL8169 has completed writing to the specified MII register */
475 if (!(RTL_R32(PHYAR) & 0x80000000))
481 static int mdio_read(void __iomem *ioaddr, int RegAddr)
485 RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);
488 for (i = 2000; i > 0; i--) {
489 /* Check if the RTL8169 has completed retrieving data from the specified MII register */
490 if (RTL_R32(PHYAR) & 0x80000000) {
491 value = (int) (RTL_R32(PHYAR) & 0xFFFF);
499 static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
501 RTL_W16(IntrMask, 0x0000);
503 RTL_W16(IntrStatus, 0xffff);
506 static void rtl8169_asic_down(void __iomem *ioaddr)
508 RTL_W8(ChipCmd, 0x00);
509 rtl8169_irq_mask_and_ack(ioaddr);
513 static unsigned int rtl8169_tbi_reset_pending(void __iomem *ioaddr)
515 return RTL_R32(TBICSR) & TBIReset;
518 static unsigned int rtl8169_xmii_reset_pending(void __iomem *ioaddr)
520 return mdio_read(ioaddr, 0) & 0x8000;
523 static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr)
525 return RTL_R32(TBICSR) & TBILinkOk;
528 static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr)
530 return RTL_R8(PHYstatus) & LinkStatus;
533 static void rtl8169_tbi_reset_enable(void __iomem *ioaddr)
535 RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
538 static void rtl8169_xmii_reset_enable(void __iomem *ioaddr)
542 val = (mdio_read(ioaddr, PHY_CTRL_REG) | 0x8000) & 0xffff;
543 mdio_write(ioaddr, PHY_CTRL_REG, val);
546 static void rtl8169_check_link_status(struct net_device *dev,
547 struct rtl8169_private *tp, void __iomem *ioaddr)
551 spin_lock_irqsave(&tp->lock, flags);
552 if (tp->link_ok(ioaddr)) {
553 netif_carrier_on(dev);
554 printk(KERN_INFO PFX "%s: link up\n", dev->name);
556 netif_carrier_off(dev);
557 spin_unlock_irqrestore(&tp->lock, flags);
560 static void rtl8169_link_option(int idx, u8 *autoneg, u16 *speed, u8 *duplex)
567 } link_settings[] = {
568 { SPEED_10, DUPLEX_HALF, AUTONEG_DISABLE, _10_Half },
569 { SPEED_10, DUPLEX_FULL, AUTONEG_DISABLE, _10_Full },
570 { SPEED_100, DUPLEX_HALF, AUTONEG_DISABLE, _100_Half },
571 { SPEED_100, DUPLEX_FULL, AUTONEG_DISABLE, _100_Full },
572 { SPEED_1000, DUPLEX_FULL, AUTONEG_DISABLE, _1000_Full },
574 { SPEED_1000, DUPLEX_FULL, AUTONEG_ENABLE, 0xff }
576 unsigned char option;
578 option = ((idx < MAX_UNITS) && (idx >= 0)) ? media[idx] : 0xff;
580 if ((option != 0xff) && !idx)
581 printk(KERN_WARNING PFX "media option is deprecated.\n");
583 for (p = link_settings; p->media != 0xff; p++) {
584 if (p->media == option)
587 *autoneg = p->autoneg;
592 static void rtl8169_get_drvinfo(struct net_device *dev,
593 struct ethtool_drvinfo *info)
595 struct rtl8169_private *tp = netdev_priv(dev);
597 strcpy(info->driver, MODULENAME);
598 strcpy(info->version, RTL8169_VERSION);
599 strcpy(info->bus_info, pci_name(tp->pci_dev));
602 static int rtl8169_get_regs_len(struct net_device *dev)
604 return R8169_REGS_SIZE;
607 static int rtl8169_set_speed_tbi(struct net_device *dev,
608 u8 autoneg, u16 speed, u8 duplex)
610 struct rtl8169_private *tp = netdev_priv(dev);
611 void __iomem *ioaddr = tp->mmio_addr;
615 reg = RTL_R32(TBICSR);
616 if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
617 (duplex == DUPLEX_FULL)) {
618 RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
619 } else if (autoneg == AUTONEG_ENABLE)
620 RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
622 printk(KERN_WARNING PFX
623 "%s: incorrect speed setting refused in TBI mode\n",
631 static int rtl8169_set_speed_xmii(struct net_device *dev,
632 u8 autoneg, u16 speed, u8 duplex)
634 struct rtl8169_private *tp = netdev_priv(dev);
635 void __iomem *ioaddr = tp->mmio_addr;
636 int auto_nego, giga_ctrl;
638 auto_nego = mdio_read(ioaddr, PHY_AUTO_NEGO_REG);
639 auto_nego &= ~(PHY_Cap_10_Half | PHY_Cap_10_Full |
640 PHY_Cap_100_Half | PHY_Cap_100_Full);
641 giga_ctrl = mdio_read(ioaddr, PHY_1000_CTRL_REG);
642 giga_ctrl &= ~(PHY_Cap_1000_Full | PHY_Cap_Null);
644 if (autoneg == AUTONEG_ENABLE) {
645 auto_nego |= (PHY_Cap_10_Half | PHY_Cap_10_Full |
646 PHY_Cap_100_Half | PHY_Cap_100_Full);
647 giga_ctrl |= PHY_Cap_1000_Full;
649 if (speed == SPEED_10)
650 auto_nego |= PHY_Cap_10_Half | PHY_Cap_10_Full;
651 else if (speed == SPEED_100)
652 auto_nego |= PHY_Cap_100_Half | PHY_Cap_100_Full;
653 else if (speed == SPEED_1000)
654 giga_ctrl |= PHY_Cap_1000_Full;
656 if (duplex == DUPLEX_HALF)
657 auto_nego &= ~(PHY_Cap_10_Full | PHY_Cap_100_Full);
660 tp->phy_auto_nego_reg = auto_nego;
661 tp->phy_1000_ctrl_reg = giga_ctrl;
663 mdio_write(ioaddr, PHY_AUTO_NEGO_REG, auto_nego);
664 mdio_write(ioaddr, PHY_1000_CTRL_REG, giga_ctrl);
665 mdio_write(ioaddr, PHY_CTRL_REG, PHY_Enable_Auto_Nego |
666 PHY_Restart_Auto_Nego);
670 static int rtl8169_set_speed(struct net_device *dev,
671 u8 autoneg, u16 speed, u8 duplex)
673 struct rtl8169_private *tp = netdev_priv(dev);
676 ret = tp->set_speed(dev, autoneg, speed, duplex);
678 if (netif_running(dev) && (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full))
679 mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
684 static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
686 struct rtl8169_private *tp = netdev_priv(dev);
690 spin_lock_irqsave(&tp->lock, flags);
691 ret = rtl8169_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex);
692 spin_unlock_irqrestore(&tp->lock, flags);
697 static u32 rtl8169_get_rx_csum(struct net_device *dev)
699 struct rtl8169_private *tp = netdev_priv(dev);
701 return tp->cp_cmd & RxChkSum;
704 static int rtl8169_set_rx_csum(struct net_device *dev, u32 data)
706 struct rtl8169_private *tp = netdev_priv(dev);
707 void __iomem *ioaddr = tp->mmio_addr;
710 spin_lock_irqsave(&tp->lock, flags);
713 tp->cp_cmd |= RxChkSum;
715 tp->cp_cmd &= ~RxChkSum;
717 RTL_W16(CPlusCmd, tp->cp_cmd);
720 spin_unlock_irqrestore(&tp->lock, flags);
725 #ifdef CONFIG_R8169_VLAN
727 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
730 return (tp->vlgrp && vlan_tx_tag_present(skb)) ?
731 TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
734 static void rtl8169_vlan_rx_register(struct net_device *dev,
735 struct vlan_group *grp)
737 struct rtl8169_private *tp = netdev_priv(dev);
738 void __iomem *ioaddr = tp->mmio_addr;
741 spin_lock_irqsave(&tp->lock, flags);
744 tp->cp_cmd |= RxVlan;
746 tp->cp_cmd &= ~RxVlan;
747 RTL_W16(CPlusCmd, tp->cp_cmd);
749 spin_unlock_irqrestore(&tp->lock, flags);
752 static void rtl8169_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
754 struct rtl8169_private *tp = netdev_priv(dev);
757 spin_lock_irqsave(&tp->lock, flags);
759 tp->vlgrp->vlan_devices[vid] = NULL;
760 spin_unlock_irqrestore(&tp->lock, flags);
763 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
766 u32 opts2 = le32_to_cpu(desc->opts2);
769 if (tp->vlgrp && (opts2 & RxVlanTag)) {
770 rtl8169_rx_hwaccel_skb(skb, tp->vlgrp,
771 swab16(opts2 & 0xffff));
779 #else /* !CONFIG_R8169_VLAN */
781 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
787 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
795 static void rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
797 struct rtl8169_private *tp = netdev_priv(dev);
798 void __iomem *ioaddr = tp->mmio_addr;
802 SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
803 cmd->port = PORT_FIBRE;
804 cmd->transceiver = XCVR_INTERNAL;
806 status = RTL_R32(TBICSR);
807 cmd->advertising = (status & TBINwEnable) ? ADVERTISED_Autoneg : 0;
808 cmd->autoneg = !!(status & TBINwEnable);
810 cmd->speed = SPEED_1000;
811 cmd->duplex = DUPLEX_FULL; /* Always set */
814 static void rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
816 struct rtl8169_private *tp = netdev_priv(dev);
817 void __iomem *ioaddr = tp->mmio_addr;
820 cmd->supported = SUPPORTED_10baseT_Half |
821 SUPPORTED_10baseT_Full |
822 SUPPORTED_100baseT_Half |
823 SUPPORTED_100baseT_Full |
824 SUPPORTED_1000baseT_Full |
829 cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
831 if (tp->phy_auto_nego_reg & PHY_Cap_10_Half)
832 cmd->advertising |= ADVERTISED_10baseT_Half;
833 if (tp->phy_auto_nego_reg & PHY_Cap_10_Full)
834 cmd->advertising |= ADVERTISED_10baseT_Full;
835 if (tp->phy_auto_nego_reg & PHY_Cap_100_Half)
836 cmd->advertising |= ADVERTISED_100baseT_Half;
837 if (tp->phy_auto_nego_reg & PHY_Cap_100_Full)
838 cmd->advertising |= ADVERTISED_100baseT_Full;
839 if (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full)
840 cmd->advertising |= ADVERTISED_1000baseT_Full;
842 status = RTL_R8(PHYstatus);
844 if (status & _1000bpsF)
845 cmd->speed = SPEED_1000;
846 else if (status & _100bps)
847 cmd->speed = SPEED_100;
848 else if (status & _10bps)
849 cmd->speed = SPEED_10;
851 cmd->duplex = ((status & _1000bpsF) || (status & FullDup)) ?
852 DUPLEX_FULL : DUPLEX_HALF;
855 static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
857 struct rtl8169_private *tp = netdev_priv(dev);
860 spin_lock_irqsave(&tp->lock, flags);
862 tp->get_settings(dev, cmd);
864 spin_unlock_irqrestore(&tp->lock, flags);
868 static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
871 struct rtl8169_private *tp = netdev_priv(dev);
874 if (regs->len > R8169_REGS_SIZE)
875 regs->len = R8169_REGS_SIZE;
877 spin_lock_irqsave(&tp->lock, flags);
878 memcpy_fromio(p, tp->mmio_addr, regs->len);
879 spin_unlock_irqrestore(&tp->lock, flags);
882 static struct ethtool_ops rtl8169_ethtool_ops = {
883 .get_drvinfo = rtl8169_get_drvinfo,
884 .get_regs_len = rtl8169_get_regs_len,
885 .get_link = ethtool_op_get_link,
886 .get_settings = rtl8169_get_settings,
887 .set_settings = rtl8169_set_settings,
888 .get_rx_csum = rtl8169_get_rx_csum,
889 .set_rx_csum = rtl8169_set_rx_csum,
890 .get_tx_csum = ethtool_op_get_tx_csum,
891 .set_tx_csum = ethtool_op_set_tx_csum,
892 .get_sg = ethtool_op_get_sg,
893 .set_sg = ethtool_op_set_sg,
894 .get_tso = ethtool_op_get_tso,
895 .set_tso = ethtool_op_set_tso,
896 .get_regs = rtl8169_get_regs,
899 static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum,
904 val = mdio_read(ioaddr, reg);
905 val = (bitval == 1) ?
906 val | (bitval << bitnum) : val & ~(0x0001 << bitnum);
907 mdio_write(ioaddr, reg, val & 0xffff);
910 static void rtl8169_get_mac_version(struct rtl8169_private *tp, void __iomem *ioaddr)
916 { 0x1 << 28, RTL_GIGA_MAC_VER_X },
917 { 0x1 << 26, RTL_GIGA_MAC_VER_E },
918 { 0x1 << 23, RTL_GIGA_MAC_VER_D },
919 { 0x00000000, RTL_GIGA_MAC_VER_B } /* Catch-all */
923 reg = RTL_R32(TxConfig) & 0x7c800000;
924 while ((reg & p->mask) != p->mask)
926 tp->mac_version = p->mac_version;
929 static void rtl8169_print_mac_version(struct rtl8169_private *tp)
935 { RTL_GIGA_MAC_VER_E, "RTL_GIGA_MAC_VER_E" },
936 { RTL_GIGA_MAC_VER_D, "RTL_GIGA_MAC_VER_D" },
937 { RTL_GIGA_MAC_VER_B, "RTL_GIGA_MAC_VER_B" },
941 for (p = mac_print; p->msg; p++) {
942 if (tp->mac_version == p->version) {
943 dprintk("mac_version == %s (%04d)\n", p->msg,
948 dprintk("mac_version == Unknown\n");
951 static void rtl8169_get_phy_version(struct rtl8169_private *tp, void __iomem *ioaddr)
958 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G },
959 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F },
960 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E },
961 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D } /* Catch-all */
965 reg = mdio_read(ioaddr, 3) & 0xffff;
966 while ((reg & p->mask) != p->set)
968 tp->phy_version = p->phy_version;
971 static void rtl8169_print_phy_version(struct rtl8169_private *tp)
978 { RTL_GIGA_PHY_VER_G, "RTL_GIGA_PHY_VER_G", 0x0002 },
979 { RTL_GIGA_PHY_VER_F, "RTL_GIGA_PHY_VER_F", 0x0001 },
980 { RTL_GIGA_PHY_VER_E, "RTL_GIGA_PHY_VER_E", 0x0000 },
981 { RTL_GIGA_PHY_VER_D, "RTL_GIGA_PHY_VER_D", 0x0000 },
985 for (p = phy_print; p->msg; p++) {
986 if (tp->phy_version == p->version) {
987 dprintk("phy_version == %s (%04x)\n", p->msg, p->reg);
991 dprintk("phy_version == Unknown\n");
994 static void rtl8169_hw_phy_config(struct net_device *dev)
996 struct rtl8169_private *tp = netdev_priv(dev);
997 void __iomem *ioaddr = tp->mmio_addr;
999 u16 regs[5]; /* Beware of bit-sign propagation */
1000 } phy_magic[5] = { {
1001 { 0x0000, //w 4 15 12 0
1002 0x00a1, //w 3 15 0 00a1
1003 0x0008, //w 2 15 0 0008
1004 0x1020, //w 1 15 0 1020
1005 0x1000 } },{ //w 0 15 0 1000
1006 { 0x7000, //w 4 15 12 7
1007 0xff41, //w 3 15 0 ff41
1008 0xde60, //w 2 15 0 de60
1009 0x0140, //w 1 15 0 0140
1010 0x0077 } },{ //w 0 15 0 0077
1011 { 0xa000, //w 4 15 12 a
1012 0xdf01, //w 3 15 0 df01
1013 0xdf20, //w 2 15 0 df20
1014 0xff95, //w 1 15 0 ff95
1015 0xfa00 } },{ //w 0 15 0 fa00
1016 { 0xb000, //w 4 15 12 b
1017 0xff41, //w 3 15 0 ff41
1018 0xde20, //w 2 15 0 de20
1019 0x0140, //w 1 15 0 0140
1020 0x00bb } },{ //w 0 15 0 00bb
1021 { 0xf000, //w 4 15 12 f
1022 0xdf01, //w 3 15 0 df01
1023 0xdf20, //w 2 15 0 df20
1024 0xff95, //w 1 15 0 ff95
1025 0xbf00 } //w 0 15 0 bf00
1030 rtl8169_print_mac_version(tp);
1031 rtl8169_print_phy_version(tp);
1033 if (tp->mac_version <= RTL_GIGA_MAC_VER_B)
1035 if (tp->phy_version >= RTL_GIGA_PHY_VER_H)
1038 dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1039 dprintk("Do final_reg2.cfg\n");
1043 if (tp->mac_version == RTL_GIGA_MAC_VER_X) {
1044 mdio_write(ioaddr, 31, 0x0001);
1045 mdio_write(ioaddr, 9, 0x273a);
1046 mdio_write(ioaddr, 14, 0x7bfb);
1047 mdio_write(ioaddr, 27, 0x841e);
1049 mdio_write(ioaddr, 31, 0x0002);
1050 mdio_write(ioaddr, 1, 0x90d0);
1051 mdio_write(ioaddr, 31, 0x0000);
1055 /* phy config for RTL8169s mac_version C chip */
1056 mdio_write(ioaddr, 31, 0x0001); //w 31 2 0 1
1057 mdio_write(ioaddr, 21, 0x1000); //w 21 15 0 1000
1058 mdio_write(ioaddr, 24, 0x65c7); //w 24 15 0 65c7
1059 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
1061 for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) {
1064 val = (mdio_read(ioaddr, pos) & 0x0fff) | (p->regs[0] & 0xffff);
1065 mdio_write(ioaddr, pos, val);
1067 mdio_write(ioaddr, pos, p->regs[4 - pos] & 0xffff);
1068 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1
1069 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
1071 mdio_write(ioaddr, 31, 0x0000); //w 31 2 0 0
1074 static void rtl8169_phy_timer(unsigned long __opaque)
1076 struct net_device *dev = (struct net_device *)__opaque;
1077 struct rtl8169_private *tp = netdev_priv(dev);
1078 struct timer_list *timer = &tp->timer;
1079 void __iomem *ioaddr = tp->mmio_addr;
1080 unsigned long timeout = RTL8169_PHY_TIMEOUT;
1082 assert(tp->mac_version > RTL_GIGA_MAC_VER_B);
1083 assert(tp->phy_version < RTL_GIGA_PHY_VER_H);
1085 if (!(tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full))
1088 spin_lock_irq(&tp->lock);
1090 if (tp->phy_reset_pending(ioaddr)) {
1092 * A busy loop could burn quite a few cycles on nowadays CPU.
1093 * Let's delay the execution of the timer for a few ticks.
1099 if (tp->link_ok(ioaddr))
1102 printk(KERN_WARNING PFX "%s: PHY reset until link up\n", dev->name);
1104 tp->phy_reset_enable(ioaddr);
1107 mod_timer(timer, jiffies + timeout);
1109 spin_unlock_irq(&tp->lock);
1112 static inline void rtl8169_delete_timer(struct net_device *dev)
1114 struct rtl8169_private *tp = netdev_priv(dev);
1115 struct timer_list *timer = &tp->timer;
1117 if ((tp->mac_version <= RTL_GIGA_MAC_VER_B) ||
1118 (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1121 del_timer_sync(timer);
1124 static inline void rtl8169_request_timer(struct net_device *dev)
1126 struct rtl8169_private *tp = netdev_priv(dev);
1127 struct timer_list *timer = &tp->timer;
1129 if ((tp->mac_version <= RTL_GIGA_MAC_VER_B) ||
1130 (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1134 timer->expires = jiffies + RTL8169_PHY_TIMEOUT;
1135 timer->data = (unsigned long)(dev);
1136 timer->function = rtl8169_phy_timer;
1140 #ifdef CONFIG_NET_POLL_CONTROLLER
1142 * Polling 'interrupt' - used by things like netconsole to send skbs
1143 * without having to re-enable interrupts. It's not called while
1144 * the interrupt routine is executing.
1146 static void rtl8169_netpoll(struct net_device *dev)
1148 struct rtl8169_private *tp = netdev_priv(dev);
1149 struct pci_dev *pdev = tp->pci_dev;
1151 disable_irq(pdev->irq);
1152 rtl8169_interrupt(pdev->irq, dev, NULL);
1153 enable_irq(pdev->irq);
1157 static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev,
1158 void __iomem *ioaddr)
1161 pci_release_regions(pdev);
1162 pci_disable_device(pdev);
1166 static int __devinit
1167 rtl8169_init_board(struct pci_dev *pdev, struct net_device **dev_out,
1168 void __iomem **ioaddr_out)
1170 void __iomem *ioaddr;
1171 struct net_device *dev;
1172 struct rtl8169_private *tp;
1173 int rc = -ENOMEM, i, acpi_idle_state = 0, pm_cap;
1175 assert(ioaddr_out != NULL);
1177 /* dev zeroed in alloc_etherdev */
1178 dev = alloc_etherdev(sizeof (*tp));
1180 printk(KERN_ERR PFX "unable to alloc new ethernet\n");
1184 SET_MODULE_OWNER(dev);
1185 SET_NETDEV_DEV(dev, &pdev->dev);
1186 tp = netdev_priv(dev);
1188 /* enable device (incl. PCI PM wakeup and hotplug setup) */
1189 rc = pci_enable_device(pdev);
1191 printk(KERN_ERR PFX "%s: enable failure\n", pci_name(pdev));
1192 goto err_out_free_dev;
1195 rc = pci_set_mwi(pdev);
1197 goto err_out_disable;
1199 /* save power state before pci_enable_device overwrites it */
1200 pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
1204 pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command);
1205 acpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
1208 "Cannot find PowerManagement capability, aborting.\n");
1212 /* make sure PCI base addr 1 is MMIO */
1213 if (!(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
1215 "region #1 not an MMIO resource, aborting\n");
1219 /* check for weird/broken PCI region reporting */
1220 if (pci_resource_len(pdev, 1) < R8169_REGS_SIZE) {
1221 printk(KERN_ERR PFX "Invalid PCI region size(s), aborting\n");
1226 rc = pci_request_regions(pdev, MODULENAME);
1228 printk(KERN_ERR PFX "%s: could not request regions.\n",
1233 tp->cp_cmd = PCIMulRW | RxChkSum;
1235 if ((sizeof(dma_addr_t) > 4) &&
1236 !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) {
1237 tp->cp_cmd |= PCIDAC;
1238 dev->features |= NETIF_F_HIGHDMA;
1240 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1242 printk(KERN_ERR PFX "DMA configuration failed.\n");
1243 goto err_out_free_res;
1247 pci_set_master(pdev);
1249 /* ioremap MMIO region */
1250 ioaddr = ioremap(pci_resource_start(pdev, 1), R8169_REGS_SIZE);
1251 if (ioaddr == NULL) {
1252 printk(KERN_ERR PFX "cannot remap MMIO, aborting\n");
1254 goto err_out_free_res;
1257 /* Unneeded ? Don't mess with Mrs. Murphy. */
1258 rtl8169_irq_mask_and_ack(ioaddr);
1260 /* Soft reset the chip. */
1261 RTL_W8(ChipCmd, CmdReset);
1263 /* Check that the chip has finished the reset. */
1264 for (i = 1000; i > 0; i--) {
1265 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1270 /* Identify chip attached to board */
1271 rtl8169_get_mac_version(tp, ioaddr);
1272 rtl8169_get_phy_version(tp, ioaddr);
1274 rtl8169_print_mac_version(tp);
1275 rtl8169_print_phy_version(tp);
1277 for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
1278 if (tp->mac_version == rtl_chip_info[i].mac_version)
1282 /* Unknown chip: assume array element #0, original RTL-8169 */
1283 printk(KERN_DEBUG PFX
1284 "PCI device %s: unknown chip version, assuming %s\n",
1285 pci_name(pdev), rtl_chip_info[0].name);
1290 *ioaddr_out = ioaddr;
1296 pci_release_regions(pdev);
1299 pci_clear_mwi(pdev);
1302 pci_disable_device(pdev);
1312 static int __devinit
1313 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1315 struct net_device *dev = NULL;
1316 struct rtl8169_private *tp;
1317 void __iomem *ioaddr = NULL;
1318 static int board_idx = -1;
1319 static int printed_version = 0;
1324 assert(pdev != NULL);
1325 assert(ent != NULL);
1329 if (!printed_version) {
1330 printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
1331 MODULENAME, RTL8169_VERSION);
1332 printed_version = 1;
1335 rc = rtl8169_init_board(pdev, &dev, &ioaddr);
1339 tp = netdev_priv(dev);
1340 assert(ioaddr != NULL);
1342 if (RTL_R8(PHYstatus) & TBI_Enable) {
1343 tp->set_speed = rtl8169_set_speed_tbi;
1344 tp->get_settings = rtl8169_gset_tbi;
1345 tp->phy_reset_enable = rtl8169_tbi_reset_enable;
1346 tp->phy_reset_pending = rtl8169_tbi_reset_pending;
1347 tp->link_ok = rtl8169_tbi_link_ok;
1349 tp->phy_1000_ctrl_reg = PHY_Cap_1000_Full; /* Implied by TBI */
1351 tp->set_speed = rtl8169_set_speed_xmii;
1352 tp->get_settings = rtl8169_gset_xmii;
1353 tp->phy_reset_enable = rtl8169_xmii_reset_enable;
1354 tp->phy_reset_pending = rtl8169_xmii_reset_pending;
1355 tp->link_ok = rtl8169_xmii_link_ok;
1358 /* Get MAC address. FIXME: read EEPROM */
1359 for (i = 0; i < MAC_ADDR_LEN; i++)
1360 dev->dev_addr[i] = RTL_R8(MAC0 + i);
1362 dev->open = rtl8169_open;
1363 dev->hard_start_xmit = rtl8169_start_xmit;
1364 dev->get_stats = rtl8169_get_stats;
1365 SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
1366 dev->stop = rtl8169_close;
1367 dev->tx_timeout = rtl8169_tx_timeout;
1368 dev->set_multicast_list = rtl8169_set_rx_mode;
1369 dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
1370 dev->irq = pdev->irq;
1371 dev->base_addr = (unsigned long) ioaddr;
1372 dev->change_mtu = rtl8169_change_mtu;
1374 #ifdef CONFIG_R8169_NAPI
1375 dev->poll = rtl8169_poll;
1376 dev->weight = R8169_NAPI_WEIGHT;
1379 #ifdef CONFIG_R8169_VLAN
1380 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1381 dev->vlan_rx_register = rtl8169_vlan_rx_register;
1382 dev->vlan_rx_kill_vid = rtl8169_vlan_rx_kill_vid;
1385 #ifdef CONFIG_NET_POLL_CONTROLLER
1386 dev->poll_controller = rtl8169_netpoll;
1389 tp->intr_mask = 0xffff;
1391 tp->mmio_addr = ioaddr;
1393 spin_lock_init(&tp->lock);
1395 rc = register_netdev(dev);
1397 rtl8169_release_board(pdev, dev, ioaddr);
1401 printk(KERN_DEBUG "%s: Identified chip type is '%s'.\n", dev->name,
1402 rtl_chip_info[tp->chipset].name);
1404 pci_set_drvdata(pdev, dev);
1406 printk(KERN_INFO "%s: %s at 0x%lx, "
1407 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1410 rtl_chip_info[ent->driver_data].name,
1412 dev->dev_addr[0], dev->dev_addr[1],
1413 dev->dev_addr[2], dev->dev_addr[3],
1414 dev->dev_addr[4], dev->dev_addr[5], dev->irq);
1416 rtl8169_hw_phy_config(dev);
1418 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1421 if (tp->mac_version < RTL_GIGA_MAC_VER_E) {
1422 dprintk("Set PCI Latency=0x40\n");
1423 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);
1426 if (tp->mac_version == RTL_GIGA_MAC_VER_D) {
1427 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1429 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1430 mdio_write(ioaddr, 0x0b, 0x0000); //w 0x0b 15 0 0
1433 rtl8169_link_option(board_idx, &autoneg, &speed, &duplex);
1435 rtl8169_set_speed(dev, autoneg, speed, duplex);
1437 if (RTL_R8(PHYstatus) & TBI_Enable)
1438 printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name);
1443 static void __devexit
1444 rtl8169_remove_one(struct pci_dev *pdev)
1446 struct net_device *dev = pci_get_drvdata(pdev);
1447 struct rtl8169_private *tp = netdev_priv(dev);
1449 assert(dev != NULL);
1452 unregister_netdev(dev);
1453 rtl8169_release_board(pdev, dev, tp->mmio_addr);
1454 pci_set_drvdata(pdev, NULL);
1459 static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
1461 struct net_device *dev = pci_get_drvdata(pdev);
1462 struct rtl8169_private *tp = netdev_priv(dev);
1463 void __iomem *ioaddr = tp->mmio_addr;
1464 unsigned long flags;
1466 if (!netif_running(dev))
1469 netif_device_detach(dev);
1470 netif_stop_queue(dev);
1471 spin_lock_irqsave(&tp->lock, flags);
1473 /* Disable interrupts, stop Rx and Tx */
1474 RTL_W16(IntrMask, 0);
1477 /* Update the error counts. */
1478 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
1479 RTL_W32(RxMissed, 0);
1480 spin_unlock_irqrestore(&tp->lock, flags);
1485 static int rtl8169_resume(struct pci_dev *pdev)
1487 struct net_device *dev = pci_get_drvdata(pdev);
1489 if (!netif_running(dev))
1492 netif_device_attach(dev);
1493 rtl8169_hw_start(dev);
1498 #endif /* CONFIG_PM */
1500 static void rtl8169_set_rxbufsize(struct rtl8169_private *tp,
1501 struct net_device *dev)
1503 unsigned int mtu = dev->mtu;
1505 tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
1508 static int rtl8169_open(struct net_device *dev)
1510 struct rtl8169_private *tp = netdev_priv(dev);
1511 struct pci_dev *pdev = tp->pci_dev;
1514 rtl8169_set_rxbufsize(tp, dev);
1517 request_irq(dev->irq, rtl8169_interrupt, SA_SHIRQ, dev->name, dev);
1524 * Rx and Tx desscriptors needs 256 bytes alignment.
1525 * pci_alloc_consistent provides more.
1527 tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES,
1529 if (!tp->TxDescArray)
1532 tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES,
1534 if (!tp->RxDescArray)
1537 retval = rtl8169_init_ring(dev);
1541 INIT_WORK(&tp->task, NULL, dev);
1543 rtl8169_hw_start(dev);
1545 rtl8169_request_timer(dev);
1547 rtl8169_check_link_status(dev, tp, tp->mmio_addr);
1552 pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
1555 pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
1558 free_irq(dev->irq, dev);
1562 static void rtl8169_hw_reset(void __iomem *ioaddr)
1564 /* Disable interrupts */
1565 rtl8169_irq_mask_and_ack(ioaddr);
1567 /* Reset the chipset */
1568 RTL_W8(ChipCmd, CmdReset);
1575 rtl8169_hw_start(struct net_device *dev)
1577 struct rtl8169_private *tp = netdev_priv(dev);
1578 void __iomem *ioaddr = tp->mmio_addr;
1581 /* Soft reset the chip. */
1582 RTL_W8(ChipCmd, CmdReset);
1584 /* Check that the chip has finished the reset. */
1585 for (i = 1000; i > 0; i--) {
1586 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1591 RTL_W8(Cfg9346, Cfg9346_Unlock);
1592 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1593 RTL_W8(EarlyTxThres, EarlyTxThld);
1595 /* Low hurts. Let's disable the filtering. */
1596 RTL_W16(RxMaxSize, 16383);
1598 /* Set Rx Config register */
1599 i = rtl8169_rx_config |
1600 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
1601 RTL_W32(RxConfig, i);
1603 /* Set DMA burst size and Interframe Gap Time */
1605 (TX_DMA_BURST << TxDMAShift) | (InterFrameGap <<
1606 TxInterFrameGapShift));
1607 tp->cp_cmd |= RTL_R16(CPlusCmd);
1608 RTL_W16(CPlusCmd, tp->cp_cmd);
1610 if ((tp->mac_version == RTL_GIGA_MAC_VER_D) ||
1611 (tp->mac_version == RTL_GIGA_MAC_VER_E)) {
1612 dprintk(KERN_INFO PFX "Set MAC Reg C+CR Offset 0xE0. "
1613 "Bit-3 and bit-14 MUST be 1\n");
1614 tp->cp_cmd |= (1 << 14) | PCIMulRW;
1615 RTL_W16(CPlusCmd, tp->cp_cmd);
1619 * Undocumented corner. Supposedly:
1620 * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1622 RTL_W16(IntrMitigate, 0x0000);
1624 RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
1625 RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
1626 RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
1627 RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
1628 RTL_W8(Cfg9346, Cfg9346_Lock);
1631 RTL_W32(RxMissed, 0);
1633 rtl8169_set_rx_mode(dev);
1635 /* no early-rx interrupts */
1636 RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
1638 /* Enable all known interrupts by setting the interrupt mask. */
1639 RTL_W16(IntrMask, rtl8169_intr_mask);
1641 netif_start_queue(dev);
1644 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
1646 struct rtl8169_private *tp = netdev_priv(dev);
1649 if (new_mtu < ETH_ZLEN || new_mtu > SafeMtu)
1654 if (!netif_running(dev))
1659 rtl8169_set_rxbufsize(tp, dev);
1661 ret = rtl8169_init_ring(dev);
1665 netif_poll_enable(dev);
1667 rtl8169_hw_start(dev);
1669 rtl8169_request_timer(dev);
1675 static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
1677 desc->addr = 0x0badbadbadbadbadull;
1678 desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
1681 static void rtl8169_free_rx_skb(struct rtl8169_private *tp,
1682 struct sk_buff **sk_buff, struct RxDesc *desc)
1684 struct pci_dev *pdev = tp->pci_dev;
1686 pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz,
1687 PCI_DMA_FROMDEVICE);
1688 dev_kfree_skb(*sk_buff);
1690 rtl8169_make_unusable_by_asic(desc);
1693 static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
1695 u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
1697 desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
1700 static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
1703 desc->addr = cpu_to_le64(mapping);
1705 rtl8169_mark_to_asic(desc, rx_buf_sz);
1708 static int rtl8169_alloc_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
1709 struct RxDesc *desc, int rx_buf_sz)
1711 struct sk_buff *skb;
1715 skb = dev_alloc_skb(rx_buf_sz + NET_IP_ALIGN);
1719 skb_reserve(skb, NET_IP_ALIGN);
1722 mapping = pci_map_single(pdev, skb->tail, rx_buf_sz,
1723 PCI_DMA_FROMDEVICE);
1725 rtl8169_map_to_asic(desc, mapping, rx_buf_sz);
1732 rtl8169_make_unusable_by_asic(desc);
1736 static void rtl8169_rx_clear(struct rtl8169_private *tp)
1740 for (i = 0; i < NUM_RX_DESC; i++) {
1741 if (tp->Rx_skbuff[i]) {
1742 rtl8169_free_rx_skb(tp, tp->Rx_skbuff + i,
1743 tp->RxDescArray + i);
1748 static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev,
1753 for (cur = start; end - cur > 0; cur++) {
1754 int ret, i = cur % NUM_RX_DESC;
1756 if (tp->Rx_skbuff[i])
1759 ret = rtl8169_alloc_rx_skb(tp->pci_dev, tp->Rx_skbuff + i,
1760 tp->RxDescArray + i, tp->rx_buf_sz);
1767 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
1769 desc->opts1 |= cpu_to_le32(RingEnd);
1772 static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
1774 tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
1777 static int rtl8169_init_ring(struct net_device *dev)
1779 struct rtl8169_private *tp = netdev_priv(dev);
1781 rtl8169_init_ring_indexes(tp);
1783 memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
1784 memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
1786 if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
1789 rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
1794 rtl8169_rx_clear(tp);
1798 static void rtl8169_unmap_tx_skb(struct pci_dev *pdev, struct ring_info *tx_skb,
1799 struct TxDesc *desc)
1801 unsigned int len = tx_skb->len;
1803 pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
1810 static void rtl8169_tx_clear(struct rtl8169_private *tp)
1814 for (i = tp->dirty_tx; i < tp->dirty_tx + NUM_TX_DESC; i++) {
1815 unsigned int entry = i % NUM_TX_DESC;
1816 struct ring_info *tx_skb = tp->tx_skb + entry;
1817 unsigned int len = tx_skb->len;
1820 struct sk_buff *skb = tx_skb->skb;
1822 rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb,
1823 tp->TxDescArray + entry);
1828 tp->stats.tx_dropped++;
1831 tp->cur_tx = tp->dirty_tx = 0;
1834 static void rtl8169_schedule_work(struct net_device *dev, void (*task)(void *))
1836 struct rtl8169_private *tp = netdev_priv(dev);
1838 PREPARE_WORK(&tp->task, task, dev);
1839 schedule_delayed_work(&tp->task, 4);
1842 static void rtl8169_wait_for_quiescence(struct net_device *dev)
1844 struct rtl8169_private *tp = netdev_priv(dev);
1845 void __iomem *ioaddr = tp->mmio_addr;
1847 synchronize_irq(dev->irq);
1849 /* Wait for any pending NAPI task to complete */
1850 netif_poll_disable(dev);
1852 rtl8169_irq_mask_and_ack(ioaddr);
1854 netif_poll_enable(dev);
1857 static void rtl8169_reinit_task(void *_data)
1859 struct net_device *dev = _data;
1862 if (netif_running(dev)) {
1863 rtl8169_wait_for_quiescence(dev);
1867 ret = rtl8169_open(dev);
1868 if (unlikely(ret < 0)) {
1869 if (net_ratelimit()) {
1870 printk(PFX KERN_ERR "%s: reinit failure (status = %d)."
1871 " Rescheduling.\n", dev->name, ret);
1873 rtl8169_schedule_work(dev, rtl8169_reinit_task);
1877 static void rtl8169_reset_task(void *_data)
1879 struct net_device *dev = _data;
1880 struct rtl8169_private *tp = netdev_priv(dev);
1882 if (!netif_running(dev))
1885 rtl8169_wait_for_quiescence(dev);
1887 rtl8169_rx_interrupt(dev, tp, tp->mmio_addr);
1888 rtl8169_tx_clear(tp);
1890 if (tp->dirty_rx == tp->cur_rx) {
1891 rtl8169_init_ring_indexes(tp);
1892 rtl8169_hw_start(dev);
1893 netif_wake_queue(dev);
1895 if (net_ratelimit()) {
1896 printk(PFX KERN_EMERG "%s: Rx buffers shortage\n",
1899 rtl8169_schedule_work(dev, rtl8169_reset_task);
1903 static void rtl8169_tx_timeout(struct net_device *dev)
1905 struct rtl8169_private *tp = netdev_priv(dev);
1907 rtl8169_hw_reset(tp->mmio_addr);
1909 /* Let's wait a bit while any (async) irq lands on */
1910 rtl8169_schedule_work(dev, rtl8169_reset_task);
1913 static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb,
1916 struct skb_shared_info *info = skb_shinfo(skb);
1917 unsigned int cur_frag, entry;
1921 for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
1922 skb_frag_t *frag = info->frags + cur_frag;
1927 entry = (entry + 1) % NUM_TX_DESC;
1929 txd = tp->TxDescArray + entry;
1931 addr = ((void *) page_address(frag->page)) + frag->page_offset;
1932 mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
1934 /* anti gcc 2.95.3 bugware (sic) */
1935 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
1937 txd->opts1 = cpu_to_le32(status);
1938 txd->addr = cpu_to_le64(mapping);
1940 tp->tx_skb[entry].len = len;
1944 tp->tx_skb[entry].skb = skb;
1945 txd->opts1 |= cpu_to_le32(LastFrag);
1951 static inline u32 rtl8169_tso_csum(struct sk_buff *skb, struct net_device *dev)
1953 if (dev->features & NETIF_F_TSO) {
1954 u32 mss = skb_shinfo(skb)->tso_size;
1957 return LargeSend | ((mss & MSSMask) << MSSShift);
1959 if (skb->ip_summed == CHECKSUM_HW) {
1960 const struct iphdr *ip = skb->nh.iph;
1962 if (ip->protocol == IPPROTO_TCP)
1963 return IPCS | TCPCS;
1964 else if (ip->protocol == IPPROTO_UDP)
1965 return IPCS | UDPCS;
1966 WARN_ON(1); /* we need a WARN() */
1971 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
1973 struct rtl8169_private *tp = netdev_priv(dev);
1974 unsigned int frags, entry = tp->cur_tx % NUM_TX_DESC;
1975 struct TxDesc *txd = tp->TxDescArray + entry;
1976 void __iomem *ioaddr = tp->mmio_addr;
1982 if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) {
1983 printk(KERN_ERR PFX "%s: BUG! Tx Ring full when queue awake!\n",
1988 if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
1991 opts1 = DescOwn | rtl8169_tso_csum(skb, dev);
1993 frags = rtl8169_xmit_frags(tp, skb, opts1);
1995 len = skb_headlen(skb);
2000 if (unlikely(len < ETH_ZLEN)) {
2001 skb = skb_padto(skb, ETH_ZLEN);
2003 goto err_update_stats;
2007 opts1 |= FirstFrag | LastFrag;
2008 tp->tx_skb[entry].skb = skb;
2011 mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
2013 tp->tx_skb[entry].len = len;
2014 txd->addr = cpu_to_le64(mapping);
2015 txd->opts2 = cpu_to_le32(rtl8169_tx_vlan_tag(tp, skb));
2019 /* anti gcc 2.95.3 bugware (sic) */
2020 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2021 txd->opts1 = cpu_to_le32(status);
2023 dev->trans_start = jiffies;
2025 tp->cur_tx += frags + 1;
2029 RTL_W8(TxPoll, 0x40); /* set polling bit */
2031 if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) {
2032 netif_stop_queue(dev);
2034 if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)
2035 netif_wake_queue(dev);
2042 netif_stop_queue(dev);
2045 tp->stats.tx_dropped++;
2049 static void rtl8169_pcierr_interrupt(struct net_device *dev)
2051 struct rtl8169_private *tp = netdev_priv(dev);
2052 struct pci_dev *pdev = tp->pci_dev;
2053 void __iomem *ioaddr = tp->mmio_addr;
2054 u16 pci_status, pci_cmd;
2056 pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
2057 pci_read_config_word(pdev, PCI_STATUS, &pci_status);
2059 printk(KERN_ERR PFX "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2060 dev->name, pci_cmd, pci_status);
2063 * The recovery sequence below admits a very elaborated explanation:
2064 * - it seems to work;
2065 * - I did not see what else could be done.
2067 * Feel free to adjust to your needs.
2069 pci_write_config_word(pdev, PCI_COMMAND,
2070 pci_cmd | PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
2072 pci_write_config_word(pdev, PCI_STATUS,
2073 pci_status & (PCI_STATUS_DETECTED_PARITY |
2074 PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
2075 PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));
2077 /* The infamous DAC f*ckup only happens at boot time */
2078 if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) {
2079 printk(KERN_INFO PFX "%s: disabling PCI DAC.\n", dev->name);
2080 tp->cp_cmd &= ~PCIDAC;
2081 RTL_W16(CPlusCmd, tp->cp_cmd);
2082 dev->features &= ~NETIF_F_HIGHDMA;
2083 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2086 rtl8169_hw_reset(ioaddr);
2090 rtl8169_tx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2091 void __iomem *ioaddr)
2093 unsigned int dirty_tx, tx_left;
2095 assert(dev != NULL);
2097 assert(ioaddr != NULL);
2099 dirty_tx = tp->dirty_tx;
2101 tx_left = tp->cur_tx - dirty_tx;
2103 while (tx_left > 0) {
2104 unsigned int entry = dirty_tx % NUM_TX_DESC;
2105 struct ring_info *tx_skb = tp->tx_skb + entry;
2106 u32 len = tx_skb->len;
2110 status = le32_to_cpu(tp->TxDescArray[entry].opts1);
2111 if (status & DescOwn)
2114 tp->stats.tx_bytes += len;
2115 tp->stats.tx_packets++;
2117 rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb, tp->TxDescArray + entry);
2119 if (status & LastFrag) {
2120 dev_kfree_skb_irq(tx_skb->skb);
2127 if (tp->dirty_tx != dirty_tx) {
2128 tp->dirty_tx = dirty_tx;
2130 if (netif_queue_stopped(dev) &&
2131 (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) {
2132 netif_wake_queue(dev);
2137 static inline int rtl8169_fragmented_frame(u32 status)
2139 return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
2142 static inline void rtl8169_rx_csum(struct sk_buff *skb, struct RxDesc *desc)
2144 u32 opts1 = le32_to_cpu(desc->opts1);
2145 u32 status = opts1 & RxProtoMask;
2147 if (((status == RxProtoTCP) && !(opts1 & TCPFail)) ||
2148 ((status == RxProtoUDP) && !(opts1 & UDPFail)) ||
2149 ((status == RxProtoIP) && !(opts1 & IPFail)))
2150 skb->ip_summed = CHECKSUM_UNNECESSARY;
2152 skb->ip_summed = CHECKSUM_NONE;
2155 static inline int rtl8169_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
2156 struct RxDesc *desc, int rx_buf_sz)
2160 if (pkt_size < rx_copybreak) {
2161 struct sk_buff *skb;
2163 skb = dev_alloc_skb(pkt_size + NET_IP_ALIGN);
2165 skb_reserve(skb, NET_IP_ALIGN);
2166 eth_copy_and_sum(skb, sk_buff[0]->tail, pkt_size, 0);
2168 rtl8169_mark_to_asic(desc, rx_buf_sz);
2176 rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2177 void __iomem *ioaddr)
2179 unsigned int cur_rx, rx_left;
2180 unsigned int delta, count;
2182 assert(dev != NULL);
2184 assert(ioaddr != NULL);
2186 cur_rx = tp->cur_rx;
2187 rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
2188 rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota);
2190 while (rx_left > 0) {
2191 unsigned int entry = cur_rx % NUM_RX_DESC;
2192 struct RxDesc *desc = tp->RxDescArray + entry;
2196 status = le32_to_cpu(desc->opts1);
2198 if (status & DescOwn)
2200 if (status & RxRES) {
2201 printk(KERN_INFO "%s: Rx ERROR. status = %08x\n",
2203 tp->stats.rx_errors++;
2204 if (status & (RxRWT | RxRUNT))
2205 tp->stats.rx_length_errors++;
2207 tp->stats.rx_crc_errors++;
2208 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2210 struct sk_buff *skb = tp->Rx_skbuff[entry];
2211 int pkt_size = (status & 0x00001FFF) - 4;
2212 void (*pci_action)(struct pci_dev *, dma_addr_t,
2213 size_t, int) = pci_dma_sync_single_for_device;
2216 * The driver does not support incoming fragmented
2217 * frames. They are seen as a symptom of over-mtu
2220 if (unlikely(rtl8169_fragmented_frame(status))) {
2221 tp->stats.rx_dropped++;
2222 tp->stats.rx_length_errors++;
2223 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2227 rtl8169_rx_csum(skb, desc);
2229 pci_dma_sync_single_for_cpu(tp->pci_dev,
2230 le64_to_cpu(desc->addr), tp->rx_buf_sz,
2231 PCI_DMA_FROMDEVICE);
2233 if (rtl8169_try_rx_copy(&skb, pkt_size, desc,
2235 pci_action = pci_unmap_single;
2236 tp->Rx_skbuff[entry] = NULL;
2239 pci_action(tp->pci_dev, le64_to_cpu(desc->addr),
2240 tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
2243 skb_put(skb, pkt_size);
2244 skb->protocol = eth_type_trans(skb, dev);
2246 if (rtl8169_rx_vlan_skb(tp, desc, skb) < 0)
2247 rtl8169_rx_skb(skb);
2249 dev->last_rx = jiffies;
2250 tp->stats.rx_bytes += pkt_size;
2251 tp->stats.rx_packets++;
2258 count = cur_rx - tp->cur_rx;
2259 tp->cur_rx = cur_rx;
2261 delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
2262 if (!delta && count)
2263 printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name);
2264 tp->dirty_rx += delta;
2267 * FIXME: until there is periodic timer to try and refill the ring,
2268 * a temporary shortage may definitely kill the Rx process.
2269 * - disable the asic to try and avoid an overflow and kick it again
2271 * - how do others driver handle this condition (Uh oh...).
2273 if (tp->dirty_rx + NUM_RX_DESC == tp->cur_rx)
2274 printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name);
2279 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
2281 rtl8169_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
2283 struct net_device *dev = (struct net_device *) dev_instance;
2284 struct rtl8169_private *tp = netdev_priv(dev);
2285 int boguscnt = max_interrupt_work;
2286 void __iomem *ioaddr = tp->mmio_addr;
2291 status = RTL_R16(IntrStatus);
2293 /* hotplug/major error/no more work/shared irq */
2294 if ((status == 0xFFFF) || !status)
2299 if (unlikely(!netif_running(dev))) {
2300 rtl8169_asic_down(ioaddr);
2304 status &= tp->intr_mask;
2306 (status & RxFIFOOver) ? (status | RxOverflow) : status);
2308 if (!(status & rtl8169_intr_mask))
2311 if (unlikely(status & SYSErr)) {
2312 rtl8169_pcierr_interrupt(dev);
2316 if (status & LinkChg)
2317 rtl8169_check_link_status(dev, tp, ioaddr);
2319 #ifdef CONFIG_R8169_NAPI
2320 RTL_W16(IntrMask, rtl8169_intr_mask & ~rtl8169_napi_event);
2321 tp->intr_mask = ~rtl8169_napi_event;
2323 if (likely(netif_rx_schedule_prep(dev)))
2324 __netif_rx_schedule(dev);
2326 printk(KERN_INFO "%s: interrupt %04x taken in poll\n",
2332 if (status & (RxOK | RxOverflow | RxFIFOOver)) {
2333 rtl8169_rx_interrupt(dev, tp, ioaddr);
2336 if (status & (TxOK | TxErr))
2337 rtl8169_tx_interrupt(dev, tp, ioaddr);
2341 } while (boguscnt > 0);
2343 if (boguscnt <= 0) {
2344 printk(KERN_WARNING "%s: Too much work at interrupt!\n",
2346 /* Clear all interrupt sources. */
2347 RTL_W16(IntrStatus, 0xffff);
2350 return IRQ_RETVAL(handled);
2353 #ifdef CONFIG_R8169_NAPI
2354 static int rtl8169_poll(struct net_device *dev, int *budget)
2356 unsigned int work_done, work_to_do = min(*budget, dev->quota);
2357 struct rtl8169_private *tp = netdev_priv(dev);
2358 void __iomem *ioaddr = tp->mmio_addr;
2360 work_done = rtl8169_rx_interrupt(dev, tp, ioaddr);
2361 rtl8169_tx_interrupt(dev, tp, ioaddr);
2363 *budget -= work_done;
2364 dev->quota -= work_done;
2366 if (work_done < work_to_do) {
2367 netif_rx_complete(dev);
2368 tp->intr_mask = 0xffff;
2370 * 20040426: the barrier is not strictly required but the
2371 * behavior of the irq handler could be less predictable
2372 * without it. Btw, the lack of flush for the posted pci
2373 * write is safe - FR
2376 RTL_W16(IntrMask, rtl8169_intr_mask);
2379 return (work_done >= work_to_do);
2383 static void rtl8169_down(struct net_device *dev)
2385 struct rtl8169_private *tp = netdev_priv(dev);
2386 void __iomem *ioaddr = tp->mmio_addr;
2387 unsigned int poll_locked = 0;
2389 rtl8169_delete_timer(dev);
2391 netif_stop_queue(dev);
2393 flush_scheduled_work();
2396 spin_lock_irq(&tp->lock);
2398 rtl8169_asic_down(ioaddr);
2400 /* Update the error counts. */
2401 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2402 RTL_W32(RxMissed, 0);
2404 spin_unlock_irq(&tp->lock);
2406 synchronize_irq(dev->irq);
2409 netif_poll_disable(dev);
2413 /* Give a racing hard_start_xmit a few cycles to complete. */
2414 synchronize_sched(); /* FIXME: should this be synchronize_irq()? */
2417 * And now for the 50k$ question: are IRQ disabled or not ?
2419 * Two paths lead here:
2421 * -> netif_running() is available to sync the current code and the
2422 * IRQ handler. See rtl8169_interrupt for details.
2423 * 2) dev->change_mtu
2424 * -> rtl8169_poll can not be issued again and re-enable the
2425 * interruptions. Let's simply issue the IRQ down sequence again.
2427 if (RTL_R16(IntrMask))
2430 rtl8169_tx_clear(tp);
2432 rtl8169_rx_clear(tp);
2435 static int rtl8169_close(struct net_device *dev)
2437 struct rtl8169_private *tp = netdev_priv(dev);
2438 struct pci_dev *pdev = tp->pci_dev;
2442 free_irq(dev->irq, dev);
2444 netif_poll_enable(dev);
2446 pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
2448 pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
2450 tp->TxDescArray = NULL;
2451 tp->RxDescArray = NULL;
2457 rtl8169_set_rx_mode(struct net_device *dev)
2459 struct rtl8169_private *tp = netdev_priv(dev);
2460 void __iomem *ioaddr = tp->mmio_addr;
2461 unsigned long flags;
2462 u32 mc_filter[2]; /* Multicast hash filter */
2466 if (dev->flags & IFF_PROMISC) {
2467 /* Unconditionally log net taps. */
2468 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
2471 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
2473 mc_filter[1] = mc_filter[0] = 0xffffffff;
2474 } else if ((dev->mc_count > multicast_filter_limit)
2475 || (dev->flags & IFF_ALLMULTI)) {
2476 /* Too many to filter perfectly -- accept all multicasts. */
2477 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
2478 mc_filter[1] = mc_filter[0] = 0xffffffff;
2480 struct dev_mc_list *mclist;
2481 rx_mode = AcceptBroadcast | AcceptMyPhys;
2482 mc_filter[1] = mc_filter[0] = 0;
2483 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
2484 i++, mclist = mclist->next) {
2485 int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
2486 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2487 rx_mode |= AcceptMulticast;
2491 spin_lock_irqsave(&tp->lock, flags);
2493 tmp = rtl8169_rx_config | rx_mode |
2494 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
2496 RTL_W32(RxConfig, tmp);
2497 RTL_W32(MAR0 + 0, mc_filter[0]);
2498 RTL_W32(MAR0 + 4, mc_filter[1]);
2500 spin_unlock_irqrestore(&tp->lock, flags);
2504 * rtl8169_get_stats - Get rtl8169 read/write statistics
2505 * @dev: The Ethernet Device to get statistics for
2507 * Get TX/RX statistics for rtl8169
2509 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
2511 struct rtl8169_private *tp = netdev_priv(dev);
2512 void __iomem *ioaddr = tp->mmio_addr;
2513 unsigned long flags;
2515 if (netif_running(dev)) {
2516 spin_lock_irqsave(&tp->lock, flags);
2517 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2518 RTL_W32(RxMissed, 0);
2519 spin_unlock_irqrestore(&tp->lock, flags);
2525 static struct pci_driver rtl8169_pci_driver = {
2527 .id_table = rtl8169_pci_tbl,
2528 .probe = rtl8169_init_one,
2529 .remove = __devexit_p(rtl8169_remove_one),
2531 .suspend = rtl8169_suspend,
2532 .resume = rtl8169_resume,
2537 rtl8169_init_module(void)
2539 return pci_module_init(&rtl8169_pci_driver);
2543 rtl8169_cleanup_module(void)
2545 pci_unregister_driver(&rtl8169_pci_driver);
2548 module_init(rtl8169_init_module);
2549 module_exit(rtl8169_cleanup_module);