2 * drivers/net/mv643xx_eth.c - Driver for MV643XX ethernet ports
3 * Copyright (C) 2002 Matthew Dharm <mdharm@momenco.com>
5 * Based on the 64360 driver from:
6 * Copyright (C) 2002 rabeeh@galileo.co.il
8 * Copyright (C) 2003 PMC-Sierra, Inc.,
9 * written by Manish Lachwani
11 * Copyright (C) 2003 Ralf Baechle <ralf@linux-mips.org>
13 * Copyright (C) 2004-2006 MontaVista Software, Inc.
14 * Dale Farnsworth <dale@farnsworth.org>
16 * Copyright (C) 2004 Steven J. Hill <sjhill1@rockwellcollins.com>
17 * <sjhill@realitydiluted.com>
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version 2
22 * of the License, or (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
33 #include <linux/init.h>
34 #include <linux/dma-mapping.h>
37 #include <linux/tcp.h>
38 #include <linux/udp.h>
39 #include <linux/etherdevice.h>
41 #include <linux/bitops.h>
42 #include <linux/delay.h>
43 #include <linux/ethtool.h>
44 #include <linux/platform_device.h>
47 #include <asm/types.h>
48 #include <asm/pgtable.h>
49 #include <asm/system.h>
50 #include <asm/delay.h>
51 #include "mv643xx_eth.h"
53 /* Static function declarations */
54 static void eth_port_uc_addr_get(struct net_device *dev,
55 unsigned char *MacAddr);
56 static void eth_port_set_multicast_list(struct net_device *);
57 static void mv643xx_eth_port_enable_tx(unsigned int port_num,
59 static void mv643xx_eth_port_enable_rx(unsigned int port_num,
61 static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num);
62 static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num);
63 static int mv643xx_eth_open(struct net_device *);
64 static int mv643xx_eth_stop(struct net_device *);
65 static int mv643xx_eth_change_mtu(struct net_device *, int);
66 static struct net_device_stats *mv643xx_eth_get_stats(struct net_device *);
67 static void eth_port_init_mac_tables(unsigned int eth_port_num);
69 static int mv643xx_poll(struct net_device *dev, int *budget);
71 static int ethernet_phy_get(unsigned int eth_port_num);
72 static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr);
73 static int ethernet_phy_detect(unsigned int eth_port_num);
74 static int mv643xx_mdio_read(struct net_device *dev, int phy_id, int location);
75 static void mv643xx_mdio_write(struct net_device *dev, int phy_id, int location, int val);
76 static int mv643xx_eth_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
77 static struct ethtool_ops mv643xx_ethtool_ops;
79 static char mv643xx_driver_name[] = "mv643xx_eth";
80 static char mv643xx_driver_version[] = "1.0";
82 static void __iomem *mv643xx_eth_shared_base;
84 /* used to protect MV643XX_ETH_SMI_REG, which is shared across ports */
85 static DEFINE_SPINLOCK(mv643xx_eth_phy_lock);
87 static inline u32 mv_read(int offset)
89 void __iomem *reg_base;
91 reg_base = mv643xx_eth_shared_base - MV643XX_ETH_SHARED_REGS;
93 return readl(reg_base + offset);
96 static inline void mv_write(int offset, u32 data)
98 void __iomem *reg_base;
100 reg_base = mv643xx_eth_shared_base - MV643XX_ETH_SHARED_REGS;
101 writel(data, reg_base + offset);
105 * Changes MTU (maximum transfer unit) of the gigabit ethenret port
107 * Input : pointer to ethernet interface network device structure
109 * Output : 0 upon success, -EINVAL upon failure
111 static int mv643xx_eth_change_mtu(struct net_device *dev, int new_mtu)
113 if ((new_mtu > 9500) || (new_mtu < 64))
118 * Stop then re-open the interface. This will allocate RX skb's with
120 * There is a possible danger that the open will not successed, due
121 * to memory is full, which might fail the open function.
123 if (netif_running(dev)) {
124 mv643xx_eth_stop(dev);
125 if (mv643xx_eth_open(dev))
127 "%s: Fatal error on opening device\n",
135 * mv643xx_eth_rx_task
137 * Fills / refills RX queue on a certain gigabit ethernet port
139 * Input : pointer to ethernet interface network device structure
142 static void mv643xx_eth_rx_task(void *data)
144 struct net_device *dev = (struct net_device *)data;
145 struct mv643xx_private *mp = netdev_priv(dev);
146 struct pkt_info pkt_info;
150 if (test_and_set_bit(0, &mp->rx_task_busy))
151 panic("%s: Error in test_set_bit / clear_bit", dev->name);
153 while (mp->rx_desc_count < (mp->rx_ring_size - 5)) {
154 skb = dev_alloc_skb(ETH_RX_SKB_SIZE + ETH_DMA_ALIGN);
158 unaligned = (u32)skb->data & (ETH_DMA_ALIGN - 1);
160 skb_reserve(skb, ETH_DMA_ALIGN - unaligned);
161 pkt_info.cmd_sts = ETH_RX_ENABLE_INTERRUPT;
162 pkt_info.byte_cnt = ETH_RX_SKB_SIZE;
163 pkt_info.buf_ptr = dma_map_single(NULL, skb->data,
164 ETH_RX_SKB_SIZE, DMA_FROM_DEVICE);
165 pkt_info.return_info = skb;
166 if (eth_rx_return_buff(mp, &pkt_info) != ETH_OK) {
168 "%s: Error allocating RX Ring\n", dev->name);
171 skb_reserve(skb, ETH_HW_IP_ALIGN);
173 clear_bit(0, &mp->rx_task_busy);
175 * If RX ring is empty of SKB, set a timer to try allocating
176 * again in a later time .
178 if ((mp->rx_desc_count == 0) && (mp->rx_timer_flag == 0)) {
179 printk(KERN_INFO "%s: Rx ring is empty\n", dev->name);
181 mp->timeout.expires = jiffies + (HZ / 10);
182 add_timer(&mp->timeout);
183 mp->rx_timer_flag = 1;
185 #ifdef MV643XX_RX_QUEUE_FILL_ON_TASK
187 /* Return interrupts */
188 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(mp->port_num),
195 * mv643xx_eth_rx_task_timer_wrapper
197 * Timer routine to wake up RX queue filling task. This function is
198 * used only in case the RX queue is empty, and all alloc_skb has
199 * failed (due to out of memory event).
201 * Input : pointer to ethernet interface network device structure
204 static void mv643xx_eth_rx_task_timer_wrapper(unsigned long data)
206 struct net_device *dev = (struct net_device *)data;
207 struct mv643xx_private *mp = netdev_priv(dev);
209 mp->rx_timer_flag = 0;
210 mv643xx_eth_rx_task((void *)data);
214 * mv643xx_eth_update_mac_address
216 * Update the MAC address of the port in the address table
218 * Input : pointer to ethernet interface network device structure
221 static void mv643xx_eth_update_mac_address(struct net_device *dev)
223 struct mv643xx_private *mp = netdev_priv(dev);
224 unsigned int port_num = mp->port_num;
226 eth_port_init_mac_tables(port_num);
227 eth_port_uc_addr_set(port_num, dev->dev_addr);
231 * mv643xx_eth_set_rx_mode
233 * Change from promiscuos to regular rx mode
235 * Input : pointer to ethernet interface network device structure
238 static void mv643xx_eth_set_rx_mode(struct net_device *dev)
240 struct mv643xx_private *mp = netdev_priv(dev);
243 config_reg = mv_read(MV643XX_ETH_PORT_CONFIG_REG(mp->port_num));
244 if (dev->flags & IFF_PROMISC)
245 config_reg |= (u32) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE;
247 config_reg &= ~(u32) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE;
248 mv_write(MV643XX_ETH_PORT_CONFIG_REG(mp->port_num), config_reg);
250 eth_port_set_multicast_list(dev);
254 * mv643xx_eth_set_mac_address
256 * Change the interface's mac address.
257 * No special hardware thing should be done because interface is always
258 * put in promiscuous mode.
260 * Input : pointer to ethernet interface network device structure and
261 * a pointer to the designated entry to be added to the cache.
262 * Output : zero upon success, negative upon failure
264 static int mv643xx_eth_set_mac_address(struct net_device *dev, void *addr)
268 for (i = 0; i < 6; i++)
269 /* +2 is for the offset of the HW addr type */
270 dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
271 mv643xx_eth_update_mac_address(dev);
276 * mv643xx_eth_tx_timeout
278 * Called upon a timeout on transmitting a packet
280 * Input : pointer to ethernet interface network device structure.
283 static void mv643xx_eth_tx_timeout(struct net_device *dev)
285 struct mv643xx_private *mp = netdev_priv(dev);
287 printk(KERN_INFO "%s: TX timeout ", dev->name);
289 /* Do the reset outside of interrupt context */
290 schedule_work(&mp->tx_timeout_task);
294 * mv643xx_eth_tx_timeout_task
296 * Actual routine to reset the adapter when a timeout on Tx has occurred
298 static void mv643xx_eth_tx_timeout_task(struct net_device *dev)
300 struct mv643xx_private *mp = netdev_priv(dev);
302 netif_device_detach(dev);
303 eth_port_reset(mp->port_num);
305 netif_device_attach(dev);
309 * mv643xx_eth_free_tx_descs - Free the tx desc data for completed descriptors
311 * If force is non-zero, frees uncompleted descriptors as well
313 int mv643xx_eth_free_tx_descs(struct net_device *dev, int force)
315 struct mv643xx_private *mp = netdev_priv(dev);
316 struct eth_tx_desc *desc;
325 while (mp->tx_desc_count > 0) {
326 spin_lock_irqsave(&mp->lock, flags);
327 tx_index = mp->tx_used_desc_q;
328 desc = &mp->p_tx_desc_area[tx_index];
329 cmd_sts = desc->cmd_sts;
331 if (!force && (cmd_sts & ETH_BUFFER_OWNED_BY_DMA)) {
332 spin_unlock_irqrestore(&mp->lock, flags);
336 mp->tx_used_desc_q = (tx_index + 1) % mp->tx_ring_size;
339 addr = desc->buf_ptr;
340 count = desc->byte_cnt;
341 skb = mp->tx_skb[tx_index];
343 mp->tx_skb[tx_index] = NULL;
345 spin_unlock_irqrestore(&mp->lock, flags);
347 if (cmd_sts & ETH_ERROR_SUMMARY) {
348 printk("%s: Error in TX\n", dev->name);
349 mp->stats.tx_errors++;
352 if (cmd_sts & ETH_TX_FIRST_DESC)
353 dma_unmap_single(NULL, addr, count, DMA_TO_DEVICE);
355 dma_unmap_page(NULL, addr, count, DMA_TO_DEVICE);
358 dev_kfree_skb_irq(skb);
366 static void mv643xx_eth_free_completed_tx_descs(struct net_device *dev)
368 struct mv643xx_private *mp = netdev_priv(dev);
370 if (mv643xx_eth_free_tx_descs(dev, 0) &&
371 mp->tx_ring_size - mp->tx_desc_count >= MAX_DESCS_PER_SKB)
372 netif_wake_queue(dev);
375 static void mv643xx_eth_free_all_tx_descs(struct net_device *dev)
377 mv643xx_eth_free_tx_descs(dev, 1);
381 * mv643xx_eth_receive
383 * This function is forward packets that are received from the port's
384 * queues toward kernel core or FastRoute them to another interface.
386 * Input : dev - a pointer to the required interface
387 * max - maximum number to receive (0 means unlimted)
389 * Output : number of served packets
392 static int mv643xx_eth_receive_queue(struct net_device *dev, int budget)
394 static int mv643xx_eth_receive_queue(struct net_device *dev)
397 struct mv643xx_private *mp = netdev_priv(dev);
398 struct net_device_stats *stats = &mp->stats;
399 unsigned int received_packets = 0;
401 struct pkt_info pkt_info;
404 while (budget-- > 0 && eth_port_receive(mp, &pkt_info) == ETH_OK) {
406 while (eth_port_receive(mp, &pkt_info) == ETH_OK) {
411 /* Update statistics. Note byte count includes 4 byte CRC count */
413 stats->rx_bytes += pkt_info.byte_cnt;
414 skb = pkt_info.return_info;
416 * In case received a packet without first / last bits on OR
417 * the error summary bit is on, the packets needs to be dropeed.
419 if (((pkt_info.cmd_sts
420 & (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC)) !=
421 (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC))
422 || (pkt_info.cmd_sts & ETH_ERROR_SUMMARY)) {
424 if ((pkt_info.cmd_sts & (ETH_RX_FIRST_DESC |
425 ETH_RX_LAST_DESC)) !=
426 (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC)) {
429 "%s: Received packet spread "
430 "on multiple descriptors\n",
433 if (pkt_info.cmd_sts & ETH_ERROR_SUMMARY)
436 dev_kfree_skb_irq(skb);
439 * The -4 is for the CRC in the trailer of the
442 skb_put(skb, pkt_info.byte_cnt - 4);
445 if (pkt_info.cmd_sts & ETH_LAYER_4_CHECKSUM_OK) {
446 skb->ip_summed = CHECKSUM_UNNECESSARY;
448 (pkt_info.cmd_sts & 0x0007fff8) >> 3);
450 skb->protocol = eth_type_trans(skb, dev);
452 netif_receive_skb(skb);
457 dev->last_rx = jiffies;
460 return received_packets;
463 /* Set the mv643xx port configuration register for the speed/duplex mode. */
464 static void mv643xx_eth_update_pscr(struct net_device *dev,
465 struct ethtool_cmd *ecmd)
467 struct mv643xx_private *mp = netdev_priv(dev);
468 int port_num = mp->port_num;
472 o_pscr = mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num));
475 /* clear speed, duplex and rx buffer size fields */
476 n_pscr &= ~(MV643XX_ETH_SET_MII_SPEED_TO_100 |
477 MV643XX_ETH_SET_GMII_SPEED_TO_1000 |
478 MV643XX_ETH_SET_FULL_DUPLEX_MODE |
479 MV643XX_ETH_MAX_RX_PACKET_MASK);
481 if (ecmd->duplex == DUPLEX_FULL)
482 n_pscr |= MV643XX_ETH_SET_FULL_DUPLEX_MODE;
484 if (ecmd->speed == SPEED_1000)
485 n_pscr |= MV643XX_ETH_SET_GMII_SPEED_TO_1000 |
486 MV643XX_ETH_MAX_RX_PACKET_9700BYTE;
488 if (ecmd->speed == SPEED_100)
489 n_pscr |= MV643XX_ETH_SET_MII_SPEED_TO_100;
490 n_pscr |= MV643XX_ETH_MAX_RX_PACKET_1522BYTE;
493 if (n_pscr != o_pscr) {
494 if ((o_pscr & MV643XX_ETH_SERIAL_PORT_ENABLE) == 0)
495 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
498 queues = mv643xx_eth_port_disable_tx(port_num);
500 o_pscr &= ~MV643XX_ETH_SERIAL_PORT_ENABLE;
501 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
503 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
505 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
508 mv643xx_eth_port_enable_tx(port_num, queues);
514 * mv643xx_eth_int_handler
516 * Main interrupt handler for the gigbit ethernet ports
518 * Input : irq - irq number (not used)
519 * dev_id - a pointer to the required interface's data structure
524 static irqreturn_t mv643xx_eth_int_handler(int irq, void *dev_id,
525 struct pt_regs *regs)
527 struct net_device *dev = (struct net_device *)dev_id;
528 struct mv643xx_private *mp = netdev_priv(dev);
529 u32 eth_int_cause, eth_int_cause_ext = 0;
530 unsigned int port_num = mp->port_num;
532 /* Read interrupt cause registers */
533 eth_int_cause = mv_read(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num)) &
536 if (eth_int_cause & BIT1)
537 eth_int_cause_ext = mv_read(
538 MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num)) &
539 ETH_INT_UNMASK_ALL_EXT;
542 if (!(eth_int_cause & 0x0007fffd)) {
543 /* Dont ack the Rx interrupt */
546 * Clear specific ethernet port intrerrupt registers by
547 * acknowleding relevant bits.
549 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num),
551 if (eth_int_cause_ext != 0x0) {
552 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG
553 (port_num), ~eth_int_cause_ext);
554 /* UDP change : We may need this */
555 if (eth_int_cause_ext & (BIT0 | BIT8))
556 mv643xx_eth_free_completed_tx_descs(dev);
560 if (netif_rx_schedule_prep(dev)) {
561 /* Mask all the interrupts */
562 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num),
564 /* wait for previous write to complete */
565 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num));
566 __netif_rx_schedule(dev);
569 if (eth_int_cause & (BIT2 | BIT11))
570 mv643xx_eth_receive_queue(dev, 0);
573 * After forwarded received packets to upper layer, add a task
574 * in an interrupts enabled context that refills the RX ring
577 #ifdef MV643XX_RX_QUEUE_FILL_ON_TASK
578 /* Mask all interrupts on ethernet port */
579 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num),
581 /* wait for previous write to take effect */
582 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num));
584 queue_task(&mp->rx_task, &tq_immediate);
585 mark_bh(IMMEDIATE_BH);
587 mp->rx_task.func(dev);
592 /* PHY status changed */
593 if (eth_int_cause_ext & (BIT16 | BIT20)) {
594 struct ethtool_cmd cmd;
596 if (mii_link_ok(&mp->mii)) {
597 mii_ethtool_gset(&mp->mii, &cmd);
598 mv643xx_eth_update_pscr(dev, &cmd);
599 mv643xx_eth_port_enable_tx(port_num,
600 ETH_TX_QUEUES_ENABLED);
601 if (!netif_carrier_ok(dev)) {
602 netif_carrier_on(dev);
603 if (mp->tx_ring_size - mp->tx_desc_count >=
605 netif_wake_queue(dev);
607 } else if (netif_carrier_ok(dev)) {
608 netif_stop_queue(dev);
609 netif_carrier_off(dev);
614 * If no real interrupt occured, exit.
615 * This can happen when using gigE interrupt coalescing mechanism.
617 if ((eth_int_cause == 0x0) && (eth_int_cause_ext == 0x0))
626 * eth_port_set_rx_coal - Sets coalescing interrupt mechanism on RX path
629 * This routine sets the RX coalescing interrupt mechanism parameter.
630 * This parameter is a timeout counter, that counts in 64 t_clk
631 * chunks ; that when timeout event occurs a maskable interrupt
633 * The parameter is calculated using the tClk of the MV-643xx chip
634 * , and the required delay of the interrupt in usec.
637 * unsigned int eth_port_num Ethernet port number
638 * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
639 * unsigned int delay Delay in usec
642 * Interrupt coalescing mechanism value is set in MV-643xx chip.
645 * The interrupt coalescing value set in the gigE port.
648 static unsigned int eth_port_set_rx_coal(unsigned int eth_port_num,
649 unsigned int t_clk, unsigned int delay)
651 unsigned int coal = ((t_clk / 1000000) * delay) / 64;
653 /* Set RX Coalescing mechanism */
654 mv_write(MV643XX_ETH_SDMA_CONFIG_REG(eth_port_num),
655 ((coal & 0x3fff) << 8) |
656 (mv_read(MV643XX_ETH_SDMA_CONFIG_REG(eth_port_num))
664 * eth_port_set_tx_coal - Sets coalescing interrupt mechanism on TX path
667 * This routine sets the TX coalescing interrupt mechanism parameter.
668 * This parameter is a timeout counter, that counts in 64 t_clk
669 * chunks ; that when timeout event occurs a maskable interrupt
671 * The parameter is calculated using the t_cLK frequency of the
672 * MV-643xx chip and the required delay in the interrupt in uSec
675 * unsigned int eth_port_num Ethernet port number
676 * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
677 * unsigned int delay Delay in uSeconds
680 * Interrupt coalescing mechanism value is set in MV-643xx chip.
683 * The interrupt coalescing value set in the gigE port.
686 static unsigned int eth_port_set_tx_coal(unsigned int eth_port_num,
687 unsigned int t_clk, unsigned int delay)
690 coal = ((t_clk / 1000000) * delay) / 64;
691 /* Set TX Coalescing mechanism */
692 mv_write(MV643XX_ETH_TX_FIFO_URGENT_THRESHOLD_REG(eth_port_num),
698 * ether_init_rx_desc_ring - Curve a Rx chain desc list and buffer in memory.
701 * This function prepares a Rx chained list of descriptors and packet
702 * buffers in a form of a ring. The routine must be called after port
703 * initialization routine and before port start routine.
704 * The Ethernet SDMA engine uses CPU bus addresses to access the various
705 * devices in the system (i.e. DRAM). This function uses the ethernet
706 * struct 'virtual to physical' routine (set by the user) to set the ring
707 * with physical addresses.
710 * struct mv643xx_private *mp Ethernet Port Control srtuct.
713 * The routine updates the Ethernet port control struct with information
714 * regarding the Rx descriptors and buffers.
719 static void ether_init_rx_desc_ring(struct mv643xx_private *mp)
721 volatile struct eth_rx_desc *p_rx_desc;
722 int rx_desc_num = mp->rx_ring_size;
725 /* initialize the next_desc_ptr links in the Rx descriptors ring */
726 p_rx_desc = (struct eth_rx_desc *)mp->p_rx_desc_area;
727 for (i = 0; i < rx_desc_num; i++) {
728 p_rx_desc[i].next_desc_ptr = mp->rx_desc_dma +
729 ((i + 1) % rx_desc_num) * sizeof(struct eth_rx_desc);
732 /* Save Rx desc pointer to driver struct. */
733 mp->rx_curr_desc_q = 0;
734 mp->rx_used_desc_q = 0;
736 mp->rx_desc_area_size = rx_desc_num * sizeof(struct eth_rx_desc);
740 * ether_init_tx_desc_ring - Curve a Tx chain desc list and buffer in memory.
743 * This function prepares a Tx chained list of descriptors and packet
744 * buffers in a form of a ring. The routine must be called after port
745 * initialization routine and before port start routine.
746 * The Ethernet SDMA engine uses CPU bus addresses to access the various
747 * devices in the system (i.e. DRAM). This function uses the ethernet
748 * struct 'virtual to physical' routine (set by the user) to set the ring
749 * with physical addresses.
752 * struct mv643xx_private *mp Ethernet Port Control srtuct.
755 * The routine updates the Ethernet port control struct with information
756 * regarding the Tx descriptors and buffers.
761 static void ether_init_tx_desc_ring(struct mv643xx_private *mp)
763 int tx_desc_num = mp->tx_ring_size;
764 struct eth_tx_desc *p_tx_desc;
767 /* Initialize the next_desc_ptr links in the Tx descriptors ring */
768 p_tx_desc = (struct eth_tx_desc *)mp->p_tx_desc_area;
769 for (i = 0; i < tx_desc_num; i++) {
770 p_tx_desc[i].next_desc_ptr = mp->tx_desc_dma +
771 ((i + 1) % tx_desc_num) * sizeof(struct eth_tx_desc);
774 mp->tx_curr_desc_q = 0;
775 mp->tx_used_desc_q = 0;
777 mp->tx_desc_area_size = tx_desc_num * sizeof(struct eth_tx_desc);
780 static int mv643xx_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
782 struct mv643xx_private *mp = netdev_priv(dev);
785 spin_lock_irq(&mp->lock);
786 err = mii_ethtool_sset(&mp->mii, cmd);
787 spin_unlock_irq(&mp->lock);
792 static int mv643xx_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
794 struct mv643xx_private *mp = netdev_priv(dev);
797 spin_lock_irq(&mp->lock);
798 err = mii_ethtool_gset(&mp->mii, cmd);
799 spin_unlock_irq(&mp->lock);
801 /* The PHY may support 1000baseT_Half, but the mv643xx does not */
802 cmd->supported &= ~SUPPORTED_1000baseT_Half;
803 cmd->advertising &= ~ADVERTISED_1000baseT_Half;
811 * This function is called when openning the network device. The function
812 * should initialize all the hardware, initialize cyclic Rx/Tx
813 * descriptors chain and buffers and allocate an IRQ to the network
816 * Input : a pointer to the network device structure
818 * Output : zero of success , nonzero if fails.
821 static int mv643xx_eth_open(struct net_device *dev)
823 struct mv643xx_private *mp = netdev_priv(dev);
824 unsigned int port_num = mp->port_num;
828 err = request_irq(dev->irq, mv643xx_eth_int_handler,
829 SA_SHIRQ | SA_SAMPLE_RANDOM, dev->name, dev);
831 printk(KERN_ERR "Can not assign IRQ number to MV643XX_eth%d\n",
838 INIT_WORK(&mp->rx_task, (void (*)(void *))mv643xx_eth_rx_task, dev);
840 memset(&mp->timeout, 0, sizeof(struct timer_list));
841 mp->timeout.function = mv643xx_eth_rx_task_timer_wrapper;
842 mp->timeout.data = (unsigned long)dev;
844 mp->rx_task_busy = 0;
845 mp->rx_timer_flag = 0;
847 /* Allocate RX and TX skb rings */
848 mp->rx_skb = kmalloc(sizeof(*mp->rx_skb) * mp->rx_ring_size,
851 printk(KERN_ERR "%s: Cannot allocate Rx skb ring\n", dev->name);
855 mp->tx_skb = kmalloc(sizeof(*mp->tx_skb) * mp->tx_ring_size,
858 printk(KERN_ERR "%s: Cannot allocate Tx skb ring\n", dev->name);
860 goto out_free_rx_skb;
863 /* Allocate TX ring */
864 mp->tx_desc_count = 0;
865 size = mp->tx_ring_size * sizeof(struct eth_tx_desc);
866 mp->tx_desc_area_size = size;
868 if (mp->tx_sram_size) {
869 mp->p_tx_desc_area = ioremap(mp->tx_sram_addr,
871 mp->tx_desc_dma = mp->tx_sram_addr;
873 mp->p_tx_desc_area = dma_alloc_coherent(NULL, size,
877 if (!mp->p_tx_desc_area) {
878 printk(KERN_ERR "%s: Cannot allocate Tx Ring (size %d bytes)\n",
881 goto out_free_tx_skb;
883 BUG_ON((u32) mp->p_tx_desc_area & 0xf); /* check 16-byte alignment */
884 memset((void *)mp->p_tx_desc_area, 0, mp->tx_desc_area_size);
886 ether_init_tx_desc_ring(mp);
888 /* Allocate RX ring */
889 mp->rx_desc_count = 0;
890 size = mp->rx_ring_size * sizeof(struct eth_rx_desc);
891 mp->rx_desc_area_size = size;
893 if (mp->rx_sram_size) {
894 mp->p_rx_desc_area = ioremap(mp->rx_sram_addr,
896 mp->rx_desc_dma = mp->rx_sram_addr;
898 mp->p_rx_desc_area = dma_alloc_coherent(NULL, size,
902 if (!mp->p_rx_desc_area) {
903 printk(KERN_ERR "%s: Cannot allocate Rx ring (size %d bytes)\n",
905 printk(KERN_ERR "%s: Freeing previously allocated TX queues...",
907 if (mp->rx_sram_size)
908 iounmap(mp->p_tx_desc_area);
910 dma_free_coherent(NULL, mp->tx_desc_area_size,
911 mp->p_tx_desc_area, mp->tx_desc_dma);
913 goto out_free_tx_skb;
915 memset((void *)mp->p_rx_desc_area, 0, size);
917 ether_init_rx_desc_ring(mp);
919 mv643xx_eth_rx_task(dev); /* Fill RX ring with skb's */
921 /* Clear any pending ethernet port interrupts */
922 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num), 0);
923 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num), 0);
927 /* Interrupt Coalescing */
931 eth_port_set_rx_coal(port_num, 133000000, MV643XX_RX_COAL);
935 eth_port_set_tx_coal(port_num, 133000000, MV643XX_TX_COAL);
937 /* Unmask phy and link status changes interrupts */
938 mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num),
939 ETH_INT_UNMASK_ALL_EXT);
941 /* Unmask RX buffer and TX end interrupt */
942 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), ETH_INT_UNMASK_ALL);
951 free_irq(dev->irq, dev);
956 static void mv643xx_eth_free_tx_rings(struct net_device *dev)
958 struct mv643xx_private *mp = netdev_priv(dev);
961 mv643xx_eth_port_disable_tx(mp->port_num);
963 /* Free outstanding skb's on TX ring */
964 mv643xx_eth_free_all_tx_descs(dev);
966 BUG_ON(mp->tx_used_desc_q != mp->tx_curr_desc_q);
969 if (mp->tx_sram_size)
970 iounmap(mp->p_tx_desc_area);
972 dma_free_coherent(NULL, mp->tx_desc_area_size,
973 mp->p_tx_desc_area, mp->tx_desc_dma);
976 static void mv643xx_eth_free_rx_rings(struct net_device *dev)
978 struct mv643xx_private *mp = netdev_priv(dev);
979 unsigned int port_num = mp->port_num;
983 mv643xx_eth_port_disable_rx(port_num);
985 /* Free preallocated skb's on RX rings */
986 for (curr = 0; mp->rx_desc_count && curr < mp->rx_ring_size; curr++) {
987 if (mp->rx_skb[curr]) {
988 dev_kfree_skb(mp->rx_skb[curr]);
993 if (mp->rx_desc_count)
995 "%s: Error in freeing Rx Ring. %d skb's still"
996 " stuck in RX Ring - ignoring them\n", dev->name,
999 if (mp->rx_sram_size)
1000 iounmap(mp->p_rx_desc_area);
1002 dma_free_coherent(NULL, mp->rx_desc_area_size,
1003 mp->p_rx_desc_area, mp->rx_desc_dma);
1009 * This function is used when closing the network device.
1010 * It updates the hardware,
1011 * release all memory that holds buffers and descriptors and release the IRQ.
1012 * Input : a pointer to the device structure
1013 * Output : zero if success , nonzero if fails
1016 static int mv643xx_eth_stop(struct net_device *dev)
1018 struct mv643xx_private *mp = netdev_priv(dev);
1019 unsigned int port_num = mp->port_num;
1021 /* Mask all interrupts on ethernet port */
1022 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), ETH_INT_MASK_ALL);
1023 /* wait for previous write to complete */
1024 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num));
1027 netif_poll_disable(dev);
1029 netif_carrier_off(dev);
1030 netif_stop_queue(dev);
1032 eth_port_reset(mp->port_num);
1034 mv643xx_eth_free_tx_rings(dev);
1035 mv643xx_eth_free_rx_rings(dev);
1038 netif_poll_enable(dev);
1041 free_irq(dev->irq, dev);
1050 * This function is used in case of NAPI
1052 static int mv643xx_poll(struct net_device *dev, int *budget)
1054 struct mv643xx_private *mp = netdev_priv(dev);
1055 int done = 1, orig_budget, work_done;
1056 unsigned int port_num = mp->port_num;
1058 #ifdef MV643XX_TX_FAST_REFILL
1059 if (++mp->tx_clean_threshold > 5) {
1060 mv643xx_eth_free_completed_tx_descs(dev);
1061 mp->tx_clean_threshold = 0;
1065 if ((mv_read(MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port_num)))
1066 != (u32) mp->rx_used_desc_q) {
1067 orig_budget = *budget;
1068 if (orig_budget > dev->quota)
1069 orig_budget = dev->quota;
1070 work_done = mv643xx_eth_receive_queue(dev, orig_budget);
1071 mp->rx_task.func(dev);
1072 *budget -= work_done;
1073 dev->quota -= work_done;
1074 if (work_done >= orig_budget)
1079 netif_rx_complete(dev);
1080 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num), 0);
1081 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num), 0);
1082 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num),
1083 ETH_INT_UNMASK_ALL);
1086 return done ? 0 : 1;
1091 * has_tiny_unaligned_frags - check if skb has any small, unaligned fragments
1093 * Hardware can't handle unaligned fragments smaller than 9 bytes.
1094 * This helper function detects that case.
1097 static inline unsigned int has_tiny_unaligned_frags(struct sk_buff *skb)
1102 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
1103 fragp = &skb_shinfo(skb)->frags[frag];
1104 if (fragp->size <= 8 && fragp->page_offset & 0x7)
1111 * eth_alloc_tx_desc_index - return the index of the next available tx desc
1113 static int eth_alloc_tx_desc_index(struct mv643xx_private *mp)
1117 BUG_ON(mp->tx_desc_count >= mp->tx_ring_size);
1119 tx_desc_curr = mp->tx_curr_desc_q;
1120 mp->tx_curr_desc_q = (tx_desc_curr + 1) % mp->tx_ring_size;
1122 BUG_ON(mp->tx_curr_desc_q == mp->tx_used_desc_q);
1124 return tx_desc_curr;
1128 * eth_tx_fill_frag_descs - fill tx hw descriptors for an skb's fragments.
1130 * Ensure the data for each fragment to be transmitted is mapped properly,
1131 * then fill in descriptors in the tx hw queue.
1133 static void eth_tx_fill_frag_descs(struct mv643xx_private *mp,
1134 struct sk_buff *skb)
1138 struct eth_tx_desc *desc;
1140 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
1141 skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
1143 tx_index = eth_alloc_tx_desc_index(mp);
1144 desc = &mp->p_tx_desc_area[tx_index];
1146 desc->cmd_sts = ETH_BUFFER_OWNED_BY_DMA;
1147 /* Last Frag enables interrupt and frees the skb */
1148 if (frag == (skb_shinfo(skb)->nr_frags - 1)) {
1149 desc->cmd_sts |= ETH_ZERO_PADDING |
1151 ETH_TX_ENABLE_INTERRUPT;
1152 mp->tx_skb[tx_index] = skb;
1154 mp->tx_skb[tx_index] = 0;
1156 desc = &mp->p_tx_desc_area[tx_index];
1158 desc->byte_cnt = this_frag->size;
1159 desc->buf_ptr = dma_map_page(NULL, this_frag->page,
1160 this_frag->page_offset,
1167 * eth_tx_submit_descs_for_skb - submit data from an skb to the tx hw
1169 * Ensure the data for an skb to be transmitted is mapped properly,
1170 * then fill in descriptors in the tx hw queue and start the hardware.
1172 static void eth_tx_submit_descs_for_skb(struct mv643xx_private *mp,
1173 struct sk_buff *skb)
1176 struct eth_tx_desc *desc;
1179 int nr_frags = skb_shinfo(skb)->nr_frags;
1181 cmd_sts = ETH_TX_FIRST_DESC | ETH_GEN_CRC | ETH_BUFFER_OWNED_BY_DMA;
1183 tx_index = eth_alloc_tx_desc_index(mp);
1184 desc = &mp->p_tx_desc_area[tx_index];
1187 eth_tx_fill_frag_descs(mp, skb);
1189 length = skb_headlen(skb);
1190 mp->tx_skb[tx_index] = 0;
1192 cmd_sts |= ETH_ZERO_PADDING |
1194 ETH_TX_ENABLE_INTERRUPT;
1196 mp->tx_skb[tx_index] = skb;
1199 desc->byte_cnt = length;
1200 desc->buf_ptr = dma_map_single(NULL, skb->data, length, DMA_TO_DEVICE);
1202 if (skb->ip_summed == CHECKSUM_HW) {
1203 BUG_ON(skb->protocol != ETH_P_IP);
1205 cmd_sts |= ETH_GEN_TCP_UDP_CHECKSUM |
1206 ETH_GEN_IP_V_4_CHECKSUM |
1207 skb->nh.iph->ihl << ETH_TX_IHL_SHIFT;
1209 switch (skb->nh.iph->protocol) {
1211 cmd_sts |= ETH_UDP_FRAME;
1212 desc->l4i_chk = skb->h.uh->check;
1215 desc->l4i_chk = skb->h.th->check;
1221 /* Errata BTS #50, IHL must be 5 if no HW checksum */
1222 cmd_sts |= 5 << ETH_TX_IHL_SHIFT;
1226 /* ensure all other descriptors are written before first cmd_sts */
1228 desc->cmd_sts = cmd_sts;
1230 /* ensure all descriptors are written before poking hardware */
1232 mv643xx_eth_port_enable_tx(mp->port_num, ETH_TX_QUEUES_ENABLED);
1234 mp->tx_desc_count += nr_frags + 1;
1238 * mv643xx_eth_start_xmit - queue an skb to the hardware for transmission
1241 static int mv643xx_eth_start_xmit(struct sk_buff *skb, struct net_device *dev)
1243 struct mv643xx_private *mp = netdev_priv(dev);
1244 struct net_device_stats *stats = &mp->stats;
1245 unsigned long flags;
1247 BUG_ON(netif_queue_stopped(dev));
1248 BUG_ON(skb == NULL);
1249 BUG_ON(mp->tx_ring_size - mp->tx_desc_count < MAX_DESCS_PER_SKB);
1251 if (has_tiny_unaligned_frags(skb)) {
1252 if ((skb_linearize(skb, GFP_ATOMIC) != 0)) {
1253 stats->tx_dropped++;
1254 printk(KERN_DEBUG "%s: failed to linearize tiny "
1255 "unaligned fragment\n", dev->name);
1260 spin_lock_irqsave(&mp->lock, flags);
1262 eth_tx_submit_descs_for_skb(mp, skb);
1263 stats->tx_bytes = skb->len;
1264 stats->tx_packets++;
1265 dev->trans_start = jiffies;
1267 if (mp->tx_ring_size - mp->tx_desc_count < MAX_DESCS_PER_SKB)
1268 netif_stop_queue(dev);
1270 spin_unlock_irqrestore(&mp->lock, flags);
1272 return 0; /* success */
1276 * mv643xx_eth_get_stats
1278 * Returns a pointer to the interface statistics.
1280 * Input : dev - a pointer to the required interface
1282 * Output : a pointer to the interface's statistics
1285 static struct net_device_stats *mv643xx_eth_get_stats(struct net_device *dev)
1287 struct mv643xx_private *mp = netdev_priv(dev);
1292 #ifdef CONFIG_NET_POLL_CONTROLLER
1293 static void mv643xx_netpoll(struct net_device *netdev)
1295 struct mv643xx_private *mp = netdev_priv(netdev);
1296 int port_num = mp->port_num;
1298 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), ETH_INT_MASK_ALL);
1299 /* wait for previous write to complete */
1300 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num));
1302 mv643xx_eth_int_handler(netdev->irq, netdev, NULL);
1304 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), ETH_INT_UNMASK_ALL);
1308 static void mv643xx_init_ethtool_cmd(struct net_device *dev, int phy_address,
1309 int speed, int duplex,
1310 struct ethtool_cmd *cmd)
1312 struct mv643xx_private *mp = netdev_priv(dev);
1314 memset(cmd, 0, sizeof(*cmd));
1316 cmd->port = PORT_MII;
1317 cmd->transceiver = XCVR_INTERNAL;
1318 cmd->phy_address = phy_address;
1321 cmd->autoneg = AUTONEG_ENABLE;
1322 /* mii lib checks, but doesn't use speed on AUTONEG_ENABLE */
1323 cmd->speed = SPEED_100;
1324 cmd->advertising = ADVERTISED_10baseT_Half |
1325 ADVERTISED_10baseT_Full |
1326 ADVERTISED_100baseT_Half |
1327 ADVERTISED_100baseT_Full;
1328 if (mp->mii.supports_gmii)
1329 cmd->advertising |= ADVERTISED_1000baseT_Full;
1331 cmd->autoneg = AUTONEG_DISABLE;
1333 cmd->duplex = duplex;
1340 * First function called after registering the network device.
1341 * It's purpose is to initialize the device as an ethernet device,
1342 * fill the ethernet device structure with pointers * to functions,
1343 * and set the MAC address of the interface
1345 * Input : struct device *
1346 * Output : -ENOMEM if failed , 0 if success
1348 static int mv643xx_eth_probe(struct platform_device *pdev)
1350 struct mv643xx_eth_platform_data *pd;
1351 int port_num = pdev->id;
1352 struct mv643xx_private *mp;
1353 struct net_device *dev;
1355 struct resource *res;
1357 struct ethtool_cmd cmd;
1358 int duplex = DUPLEX_HALF;
1359 int speed = 0; /* default to auto-negotiation */
1361 dev = alloc_etherdev(sizeof(struct mv643xx_private));
1365 platform_set_drvdata(pdev, dev);
1367 mp = netdev_priv(dev);
1369 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1371 dev->irq = res->start;
1373 mp->port_num = port_num;
1375 dev->open = mv643xx_eth_open;
1376 dev->stop = mv643xx_eth_stop;
1377 dev->hard_start_xmit = mv643xx_eth_start_xmit;
1378 dev->get_stats = mv643xx_eth_get_stats;
1379 dev->set_mac_address = mv643xx_eth_set_mac_address;
1380 dev->set_multicast_list = mv643xx_eth_set_rx_mode;
1382 /* No need to Tx Timeout */
1383 dev->tx_timeout = mv643xx_eth_tx_timeout;
1385 dev->poll = mv643xx_poll;
1389 #ifdef CONFIG_NET_POLL_CONTROLLER
1390 dev->poll_controller = mv643xx_netpoll;
1393 dev->watchdog_timeo = 2 * HZ;
1394 dev->tx_queue_len = mp->tx_ring_size;
1396 dev->change_mtu = mv643xx_eth_change_mtu;
1397 dev->do_ioctl = mv643xx_eth_do_ioctl;
1398 SET_ETHTOOL_OPS(dev, &mv643xx_ethtool_ops);
1400 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
1401 #ifdef MAX_SKB_FRAGS
1403 * Zero copy can only work if we use Discovery II memory. Else, we will
1404 * have to map the buffers to ISA memory which is only 16 MB
1406 dev->features = NETIF_F_SG | NETIF_F_IP_CSUM;
1410 /* Configure the timeout task */
1411 INIT_WORK(&mp->tx_timeout_task,
1412 (void (*)(void *))mv643xx_eth_tx_timeout_task, dev);
1414 spin_lock_init(&mp->lock);
1416 /* set default config values */
1417 eth_port_uc_addr_get(dev, dev->dev_addr);
1418 mp->rx_ring_size = MV643XX_ETH_PORT_DEFAULT_RECEIVE_QUEUE_SIZE;
1419 mp->tx_ring_size = MV643XX_ETH_PORT_DEFAULT_TRANSMIT_QUEUE_SIZE;
1421 pd = pdev->dev.platform_data;
1424 memcpy(dev->dev_addr, pd->mac_addr, 6);
1426 if (pd->phy_addr || pd->force_phy_addr)
1427 ethernet_phy_set(port_num, pd->phy_addr);
1429 if (pd->rx_queue_size)
1430 mp->rx_ring_size = pd->rx_queue_size;
1432 if (pd->tx_queue_size)
1433 mp->tx_ring_size = pd->tx_queue_size;
1435 if (pd->tx_sram_size) {
1436 mp->tx_sram_size = pd->tx_sram_size;
1437 mp->tx_sram_addr = pd->tx_sram_addr;
1440 if (pd->rx_sram_size) {
1441 mp->rx_sram_size = pd->rx_sram_size;
1442 mp->rx_sram_addr = pd->rx_sram_addr;
1445 duplex = pd->duplex;
1449 /* Hook up MII support for ethtool */
1451 mp->mii.mdio_read = mv643xx_mdio_read;
1452 mp->mii.mdio_write = mv643xx_mdio_write;
1453 mp->mii.phy_id = ethernet_phy_get(port_num);
1454 mp->mii.phy_id_mask = 0x3f;
1455 mp->mii.reg_num_mask = 0x1f;
1457 err = ethernet_phy_detect(port_num);
1459 pr_debug("MV643xx ethernet port %d: "
1460 "No PHY detected at addr %d\n",
1461 port_num, ethernet_phy_get(port_num));
1465 ethernet_phy_reset(port_num);
1466 mp->mii.supports_gmii = mii_check_gmii_support(&mp->mii);
1467 mv643xx_init_ethtool_cmd(dev, mp->mii.phy_id, speed, duplex, &cmd);
1468 mv643xx_eth_update_pscr(dev, &cmd);
1469 mv643xx_set_settings(dev, &cmd);
1471 err = register_netdev(dev);
1477 "%s: port %d with MAC address %02x:%02x:%02x:%02x:%02x:%02x\n",
1478 dev->name, port_num, p[0], p[1], p[2], p[3], p[4], p[5]);
1480 if (dev->features & NETIF_F_SG)
1481 printk(KERN_NOTICE "%s: Scatter Gather Enabled\n", dev->name);
1483 if (dev->features & NETIF_F_IP_CSUM)
1484 printk(KERN_NOTICE "%s: TX TCP/IP Checksumming Supported\n",
1487 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
1488 printk(KERN_NOTICE "%s: RX TCP/UDP Checksum Offload ON \n", dev->name);
1492 printk(KERN_NOTICE "%s: TX and RX Interrupt Coalescing ON \n",
1497 printk(KERN_NOTICE "%s: RX NAPI Enabled \n", dev->name);
1500 if (mp->tx_sram_size > 0)
1501 printk(KERN_NOTICE "%s: Using SRAM\n", dev->name);
1511 static int mv643xx_eth_remove(struct platform_device *pdev)
1513 struct net_device *dev = platform_get_drvdata(pdev);
1515 unregister_netdev(dev);
1516 flush_scheduled_work();
1519 platform_set_drvdata(pdev, NULL);
1523 static int mv643xx_eth_shared_probe(struct platform_device *pdev)
1525 struct resource *res;
1527 printk(KERN_NOTICE "MV-643xx 10/100/1000 Ethernet Driver\n");
1529 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1533 mv643xx_eth_shared_base = ioremap(res->start,
1534 MV643XX_ETH_SHARED_REGS_SIZE);
1535 if (mv643xx_eth_shared_base == NULL)
1542 static int mv643xx_eth_shared_remove(struct platform_device *pdev)
1544 iounmap(mv643xx_eth_shared_base);
1545 mv643xx_eth_shared_base = NULL;
1550 static struct platform_driver mv643xx_eth_driver = {
1551 .probe = mv643xx_eth_probe,
1552 .remove = mv643xx_eth_remove,
1554 .name = MV643XX_ETH_NAME,
1558 static struct platform_driver mv643xx_eth_shared_driver = {
1559 .probe = mv643xx_eth_shared_probe,
1560 .remove = mv643xx_eth_shared_remove,
1562 .name = MV643XX_ETH_SHARED_NAME,
1567 * mv643xx_init_module
1569 * Registers the network drivers into the Linux kernel
1575 static int __init mv643xx_init_module(void)
1579 rc = platform_driver_register(&mv643xx_eth_shared_driver);
1581 rc = platform_driver_register(&mv643xx_eth_driver);
1583 platform_driver_unregister(&mv643xx_eth_shared_driver);
1589 * mv643xx_cleanup_module
1591 * Registers the network drivers into the Linux kernel
1597 static void __exit mv643xx_cleanup_module(void)
1599 platform_driver_unregister(&mv643xx_eth_driver);
1600 platform_driver_unregister(&mv643xx_eth_shared_driver);
1603 module_init(mv643xx_init_module);
1604 module_exit(mv643xx_cleanup_module);
1606 MODULE_LICENSE("GPL");
1607 MODULE_AUTHOR( "Rabeeh Khoury, Assaf Hoffman, Matthew Dharm, Manish Lachwani"
1608 " and Dale Farnsworth");
1609 MODULE_DESCRIPTION("Ethernet driver for Marvell MV643XX");
1612 * The second part is the low level driver of the gigE ethernet ports.
1616 * Marvell's Gigabit Ethernet controller low level driver
1619 * This file introduce low level API to Marvell's Gigabit Ethernet
1620 * controller. This Gigabit Ethernet Controller driver API controls
1621 * 1) Operations (i.e. port init, start, reset etc').
1622 * 2) Data flow (i.e. port send, receive etc').
1623 * Each Gigabit Ethernet port is controlled via
1624 * struct mv643xx_private.
1625 * This struct includes user configuration information as well as
1626 * driver internal data needed for its operations.
1628 * Supported Features:
1629 * - This low level driver is OS independent. Allocating memory for
1630 * the descriptor rings and buffers are not within the scope of
1632 * - The user is free from Rx/Tx queue managing.
1633 * - This low level driver introduce functionality API that enable
1634 * the to operate Marvell's Gigabit Ethernet Controller in a
1636 * - Simple Gigabit Ethernet port operation API.
1637 * - Simple Gigabit Ethernet port data flow API.
1638 * - Data flow and operation API support per queue functionality.
1639 * - Support cached descriptors for better performance.
1640 * - Enable access to all four DRAM banks and internal SRAM memory
1642 * - PHY access and control API.
1643 * - Port control register configuration API.
1644 * - Full control over Unicast and Multicast MAC configurations.
1648 * Initialization phase
1649 * This phase complete the initialization of the the
1650 * mv643xx_private struct.
1651 * User information regarding port configuration has to be set
1652 * prior to calling the port initialization routine.
1654 * In this phase any port Tx/Rx activity is halted, MIB counters
1655 * are cleared, PHY address is set according to user parameter and
1656 * access to DRAM and internal SRAM memory spaces.
1658 * Driver ring initialization
1659 * Allocating memory for the descriptor rings and buffers is not
1660 * within the scope of this driver. Thus, the user is required to
1661 * allocate memory for the descriptors ring and buffers. Those
1662 * memory parameters are used by the Rx and Tx ring initialization
1663 * routines in order to curve the descriptor linked list in a form
1665 * Note: Pay special attention to alignment issues when using
1666 * cached descriptors/buffers. In this phase the driver store
1667 * information in the mv643xx_private struct regarding each queue
1671 * This phase prepares the Ethernet port for Rx and Tx activity.
1672 * It uses the information stored in the mv643xx_private struct to
1673 * initialize the various port registers.
1676 * All packet references to/from the driver are done using
1678 * This struct is a unified struct used with Rx and Tx operations.
1679 * This way the user is not required to be familiar with neither
1680 * Tx nor Rx descriptors structures.
1681 * The driver's descriptors rings are management by indexes.
1682 * Those indexes controls the ring resources and used to indicate
1683 * a SW resource error:
1685 * This index points to the current available resource for use. For
1686 * example in Rx process this index will point to the descriptor
1687 * that will be passed to the user upon calling the receive
1688 * routine. In Tx process, this index will point to the descriptor
1689 * that will be assigned with the user packet info and transmitted.
1691 * This index points to the descriptor that need to restore its
1692 * resources. For example in Rx process, using the Rx buffer return
1693 * API will attach the buffer returned in packet info to the
1694 * descriptor pointed by 'used'. In Tx process, using the Tx
1695 * descriptor return will merely return the user packet info with
1696 * the command status of the transmitted buffer pointed by the
1697 * 'used' index. Nevertheless, it is essential to use this routine
1698 * to update the 'used' index.
1700 * This index supports Tx Scatter-Gather. It points to the first
1701 * descriptor of a packet assembled of multiple buffers. For
1702 * example when in middle of Such packet we have a Tx resource
1703 * error the 'curr' index get the value of 'first' to indicate
1704 * that the ring returned to its state before trying to transmit
1707 * Receive operation:
1708 * The eth_port_receive API set the packet information struct,
1709 * passed by the caller, with received information from the
1710 * 'current' SDMA descriptor.
1711 * It is the user responsibility to return this resource back
1712 * to the Rx descriptor ring to enable the reuse of this source.
1713 * Return Rx resource is done using the eth_rx_return_buff API.
1715 * Prior to calling the initialization routine eth_port_init() the user
1716 * must set the following fields under mv643xx_private struct:
1717 * port_num User Ethernet port number.
1718 * port_config User port configuration value.
1719 * port_config_extend User port config extend value.
1720 * port_sdma_config User port SDMA config value.
1721 * port_serial_control User port serial control value.
1723 * This driver data flow is done using the struct pkt_info which
1724 * is a unified struct for Rx and Tx operations:
1726 * byte_cnt Tx/Rx descriptor buffer byte count.
1727 * l4i_chk CPU provided TCP Checksum. For Tx operation
1729 * cmd_sts Tx/Rx descriptor command status.
1730 * buf_ptr Tx/Rx descriptor buffer pointer.
1731 * return_info Tx/Rx user resource return information.
1735 static int ethernet_phy_get(unsigned int eth_port_num);
1736 static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr);
1738 /* Ethernet Port routines */
1739 static void eth_port_set_filter_table_entry(int table, unsigned char entry);
1742 * eth_port_init - Initialize the Ethernet port driver
1745 * This function prepares the ethernet port to start its activity:
1746 * 1) Completes the ethernet port driver struct initialization toward port
1748 * 2) Resets the device to a quiescent state in case of warm reboot.
1749 * 3) Enable SDMA access to all four DRAM banks as well as internal SRAM.
1750 * 4) Clean MAC tables. The reset status of those tables is unknown.
1751 * 5) Set PHY address.
1752 * Note: Call this routine prior to eth_port_start routine and after
1753 * setting user values in the user fields of Ethernet port control
1757 * struct mv643xx_private *mp Ethernet port control struct
1765 static void eth_port_init(struct mv643xx_private *mp)
1767 mp->rx_resource_err = 0;
1769 eth_port_reset(mp->port_num);
1771 eth_port_init_mac_tables(mp->port_num);
1775 * eth_port_start - Start the Ethernet port activity.
1778 * This routine prepares the Ethernet port for Rx and Tx activity:
1779 * 1. Initialize Tx and Rx Current Descriptor Pointer for each queue that
1780 * has been initialized a descriptor's ring (using
1781 * ether_init_tx_desc_ring for Tx and ether_init_rx_desc_ring for Rx)
1782 * 2. Initialize and enable the Ethernet configuration port by writing to
1783 * the port's configuration and command registers.
1784 * 3. Initialize and enable the SDMA by writing to the SDMA's
1785 * configuration and command registers. After completing these steps,
1786 * the ethernet port SDMA can starts to perform Rx and Tx activities.
1788 * Note: Each Rx and Tx queue descriptor's list must be initialized prior
1789 * to calling this function (use ether_init_tx_desc_ring for Tx queues
1790 * and ether_init_rx_desc_ring for Rx queues).
1793 * dev - a pointer to the required interface
1796 * Ethernet port is ready to receive and transmit.
1801 static void eth_port_start(struct net_device *dev)
1803 struct mv643xx_private *mp = netdev_priv(dev);
1804 unsigned int port_num = mp->port_num;
1805 int tx_curr_desc, rx_curr_desc;
1807 struct ethtool_cmd ethtool_cmd;
1809 /* Assignment of Tx CTRP of given queue */
1810 tx_curr_desc = mp->tx_curr_desc_q;
1811 mv_write(MV643XX_ETH_TX_CURRENT_QUEUE_DESC_PTR_0(port_num),
1812 (u32)((struct eth_tx_desc *)mp->tx_desc_dma + tx_curr_desc));
1814 /* Assignment of Rx CRDP of given queue */
1815 rx_curr_desc = mp->rx_curr_desc_q;
1816 mv_write(MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port_num),
1817 (u32)((struct eth_rx_desc *)mp->rx_desc_dma + rx_curr_desc));
1819 /* Add the assigned Ethernet address to the port's address table */
1820 eth_port_uc_addr_set(port_num, dev->dev_addr);
1822 /* Assign port configuration and command. */
1823 mv_write(MV643XX_ETH_PORT_CONFIG_REG(port_num),
1824 MV643XX_ETH_PORT_CONFIG_DEFAULT_VALUE);
1826 mv_write(MV643XX_ETH_PORT_CONFIG_EXTEND_REG(port_num),
1827 MV643XX_ETH_PORT_CONFIG_EXTEND_DEFAULT_VALUE);
1829 pscr = mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num));
1831 pscr &= ~(MV643XX_ETH_SERIAL_PORT_ENABLE | MV643XX_ETH_FORCE_LINK_PASS);
1832 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), pscr);
1834 pscr |= MV643XX_ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL |
1835 MV643XX_ETH_DISABLE_AUTO_NEG_SPEED_GMII |
1836 MV643XX_ETH_DISABLE_AUTO_NEG_FOR_DUPLX |
1837 MV643XX_ETH_DO_NOT_FORCE_LINK_FAIL |
1838 MV643XX_ETH_SERIAL_PORT_CONTROL_RESERVED;
1840 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), pscr);
1842 pscr |= MV643XX_ETH_SERIAL_PORT_ENABLE;
1843 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), pscr);
1845 /* Assign port SDMA configuration */
1846 mv_write(MV643XX_ETH_SDMA_CONFIG_REG(port_num),
1847 MV643XX_ETH_PORT_SDMA_CONFIG_DEFAULT_VALUE);
1849 /* Enable port Rx. */
1850 mv643xx_eth_port_enable_rx(port_num, ETH_RX_QUEUES_ENABLED);
1852 /* Disable port bandwidth limits by clearing MTU register */
1853 mv_write(MV643XX_ETH_MAXIMUM_TRANSMIT_UNIT(port_num), 0);
1855 /* save phy settings across reset */
1856 mv643xx_get_settings(dev, ðtool_cmd);
1857 ethernet_phy_reset(mp->port_num);
1858 mv643xx_set_settings(dev, ðtool_cmd);
1862 * eth_port_uc_addr_set - This function Set the port Unicast address.
1865 * This function Set the port Ethernet MAC address.
1868 * unsigned int eth_port_num Port number.
1869 * char * p_addr Address to be set
1872 * Set MAC address low and high registers. also calls
1873 * eth_port_set_filter_table_entry() to set the unicast
1874 * table with the proper information.
1880 static void eth_port_uc_addr_set(unsigned int eth_port_num,
1881 unsigned char *p_addr)
1887 mac_l = (p_addr[4] << 8) | (p_addr[5]);
1888 mac_h = (p_addr[0] << 24) | (p_addr[1] << 16) | (p_addr[2] << 8) |
1891 mv_write(MV643XX_ETH_MAC_ADDR_LOW(eth_port_num), mac_l);
1892 mv_write(MV643XX_ETH_MAC_ADDR_HIGH(eth_port_num), mac_h);
1894 /* Accept frames of this address */
1895 table = MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE(eth_port_num);
1896 eth_port_set_filter_table_entry(table, p_addr[5] & 0x0f);
1900 * eth_port_uc_addr_get - This function retrieves the port Unicast address
1901 * (MAC address) from the ethernet hw registers.
1904 * This function retrieves the port Ethernet MAC address.
1907 * unsigned int eth_port_num Port number.
1908 * char *MacAddr pointer where the MAC address is stored
1911 * Copy the MAC address to the location pointed to by MacAddr
1917 static void eth_port_uc_addr_get(struct net_device *dev, unsigned char *p_addr)
1919 struct mv643xx_private *mp = netdev_priv(dev);
1923 mac_h = mv_read(MV643XX_ETH_MAC_ADDR_HIGH(mp->port_num));
1924 mac_l = mv_read(MV643XX_ETH_MAC_ADDR_LOW(mp->port_num));
1926 p_addr[0] = (mac_h >> 24) & 0xff;
1927 p_addr[1] = (mac_h >> 16) & 0xff;
1928 p_addr[2] = (mac_h >> 8) & 0xff;
1929 p_addr[3] = mac_h & 0xff;
1930 p_addr[4] = (mac_l >> 8) & 0xff;
1931 p_addr[5] = mac_l & 0xff;
1935 * The entries in each table are indexed by a hash of a packet's MAC
1936 * address. One bit in each entry determines whether the packet is
1937 * accepted. There are 4 entries (each 8 bits wide) in each register
1938 * of the table. The bits in each entry are defined as follows:
1939 * 0 Accept=1, Drop=0
1940 * 3-1 Queue (ETH_Q0=0)
1943 static void eth_port_set_filter_table_entry(int table, unsigned char entry)
1945 unsigned int table_reg;
1946 unsigned int tbl_offset;
1947 unsigned int reg_offset;
1949 tbl_offset = (entry / 4) * 4; /* Register offset of DA table entry */
1950 reg_offset = entry % 4; /* Entry offset within the register */
1952 /* Set "accepts frame bit" at specified table entry */
1953 table_reg = mv_read(table + tbl_offset);
1954 table_reg |= 0x01 << (8 * reg_offset);
1955 mv_write(table + tbl_offset, table_reg);
1959 * eth_port_mc_addr - Multicast address settings.
1961 * The MV device supports multicast using two tables:
1962 * 1) Special Multicast Table for MAC addresses of the form
1963 * 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_FF).
1964 * The MAC DA[7:0] bits are used as a pointer to the Special Multicast
1965 * Table entries in the DA-Filter table.
1966 * 2) Other Multicast Table for multicast of another type. A CRC-8bit
1967 * is used as an index to the Other Multicast Table entries in the
1968 * DA-Filter table. This function calculates the CRC-8bit value.
1969 * In either case, eth_port_set_filter_table_entry() is then called
1970 * to set to set the actual table entry.
1972 static void eth_port_mc_addr(unsigned int eth_port_num, unsigned char *p_addr)
1976 unsigned char crc_result = 0;
1982 if ((p_addr[0] == 0x01) && (p_addr[1] == 0x00) &&
1983 (p_addr[2] == 0x5E) && (p_addr[3] == 0x00) && (p_addr[4] == 0x00)) {
1984 table = MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
1986 eth_port_set_filter_table_entry(table, p_addr[5]);
1990 /* Calculate CRC-8 out of the given address */
1991 mac_h = (p_addr[0] << 8) | (p_addr[1]);
1992 mac_l = (p_addr[2] << 24) | (p_addr[3] << 16) |
1993 (p_addr[4] << 8) | (p_addr[5] << 0);
1995 for (i = 0; i < 32; i++)
1996 mac_array[i] = (mac_l >> i) & 0x1;
1997 for (i = 32; i < 48; i++)
1998 mac_array[i] = (mac_h >> (i - 32)) & 0x1;
2000 crc[0] = mac_array[45] ^ mac_array[43] ^ mac_array[40] ^ mac_array[39] ^
2001 mac_array[35] ^ mac_array[34] ^ mac_array[31] ^ mac_array[30] ^
2002 mac_array[28] ^ mac_array[23] ^ mac_array[21] ^ mac_array[19] ^
2003 mac_array[18] ^ mac_array[16] ^ mac_array[14] ^ mac_array[12] ^
2004 mac_array[8] ^ mac_array[7] ^ mac_array[6] ^ mac_array[0];
2006 crc[1] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^ mac_array[43] ^
2007 mac_array[41] ^ mac_array[39] ^ mac_array[36] ^ mac_array[34] ^
2008 mac_array[32] ^ mac_array[30] ^ mac_array[29] ^ mac_array[28] ^
2009 mac_array[24] ^ mac_array[23] ^ mac_array[22] ^ mac_array[21] ^
2010 mac_array[20] ^ mac_array[18] ^ mac_array[17] ^ mac_array[16] ^
2011 mac_array[15] ^ mac_array[14] ^ mac_array[13] ^ mac_array[12] ^
2012 mac_array[9] ^ mac_array[6] ^ mac_array[1] ^ mac_array[0];
2014 crc[2] = mac_array[47] ^ mac_array[46] ^ mac_array[44] ^ mac_array[43] ^
2015 mac_array[42] ^ mac_array[39] ^ mac_array[37] ^ mac_array[34] ^
2016 mac_array[33] ^ mac_array[29] ^ mac_array[28] ^ mac_array[25] ^
2017 mac_array[24] ^ mac_array[22] ^ mac_array[17] ^ mac_array[15] ^
2018 mac_array[13] ^ mac_array[12] ^ mac_array[10] ^ mac_array[8] ^
2019 mac_array[6] ^ mac_array[2] ^ mac_array[1] ^ mac_array[0];
2021 crc[3] = mac_array[47] ^ mac_array[45] ^ mac_array[44] ^ mac_array[43] ^
2022 mac_array[40] ^ mac_array[38] ^ mac_array[35] ^ mac_array[34] ^
2023 mac_array[30] ^ mac_array[29] ^ mac_array[26] ^ mac_array[25] ^
2024 mac_array[23] ^ mac_array[18] ^ mac_array[16] ^ mac_array[14] ^
2025 mac_array[13] ^ mac_array[11] ^ mac_array[9] ^ mac_array[7] ^
2026 mac_array[3] ^ mac_array[2] ^ mac_array[1];
2028 crc[4] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^ mac_array[41] ^
2029 mac_array[39] ^ mac_array[36] ^ mac_array[35] ^ mac_array[31] ^
2030 mac_array[30] ^ mac_array[27] ^ mac_array[26] ^ mac_array[24] ^
2031 mac_array[19] ^ mac_array[17] ^ mac_array[15] ^ mac_array[14] ^
2032 mac_array[12] ^ mac_array[10] ^ mac_array[8] ^ mac_array[4] ^
2033 mac_array[3] ^ mac_array[2];
2035 crc[5] = mac_array[47] ^ mac_array[46] ^ mac_array[45] ^ mac_array[42] ^
2036 mac_array[40] ^ mac_array[37] ^ mac_array[36] ^ mac_array[32] ^
2037 mac_array[31] ^ mac_array[28] ^ mac_array[27] ^ mac_array[25] ^
2038 mac_array[20] ^ mac_array[18] ^ mac_array[16] ^ mac_array[15] ^
2039 mac_array[13] ^ mac_array[11] ^ mac_array[9] ^ mac_array[5] ^
2040 mac_array[4] ^ mac_array[3];
2042 crc[6] = mac_array[47] ^ mac_array[46] ^ mac_array[43] ^ mac_array[41] ^
2043 mac_array[38] ^ mac_array[37] ^ mac_array[33] ^ mac_array[32] ^
2044 mac_array[29] ^ mac_array[28] ^ mac_array[26] ^ mac_array[21] ^
2045 mac_array[19] ^ mac_array[17] ^ mac_array[16] ^ mac_array[14] ^
2046 mac_array[12] ^ mac_array[10] ^ mac_array[6] ^ mac_array[5] ^
2049 crc[7] = mac_array[47] ^ mac_array[44] ^ mac_array[42] ^ mac_array[39] ^
2050 mac_array[38] ^ mac_array[34] ^ mac_array[33] ^ mac_array[30] ^
2051 mac_array[29] ^ mac_array[27] ^ mac_array[22] ^ mac_array[20] ^
2052 mac_array[18] ^ mac_array[17] ^ mac_array[15] ^ mac_array[13] ^
2053 mac_array[11] ^ mac_array[7] ^ mac_array[6] ^ mac_array[5];
2055 for (i = 0; i < 8; i++)
2056 crc_result = crc_result | (crc[i] << i);
2058 table = MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num);
2059 eth_port_set_filter_table_entry(table, crc_result);
2063 * Set the entire multicast list based on dev->mc_list.
2065 static void eth_port_set_multicast_list(struct net_device *dev)
2068 struct dev_mc_list *mc_list;
2071 struct mv643xx_private *mp = netdev_priv(dev);
2072 unsigned int eth_port_num = mp->port_num;
2074 /* If the device is in promiscuous mode or in all multicast mode,
2075 * we will fully populate both multicast tables with accept.
2076 * This is guaranteed to yield a match on all multicast addresses...
2078 if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI)) {
2079 for (table_index = 0; table_index <= 0xFC; table_index += 4) {
2080 /* Set all entries in DA filter special multicast
2082 * Set for ETH_Q0 for now
2084 * 0 Accept=1, Drop=0
2085 * 3-1 Queue ETH_Q0=0
2088 mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(eth_port_num) + table_index, 0x01010101);
2090 /* Set all entries in DA filter other multicast
2092 * Set for ETH_Q0 for now
2094 * 0 Accept=1, Drop=0
2095 * 3-1 Queue ETH_Q0=0
2098 mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num) + table_index, 0x01010101);
2103 /* We will clear out multicast tables every time we get the list.
2104 * Then add the entire new list...
2106 for (table_index = 0; table_index <= 0xFC; table_index += 4) {
2107 /* Clear DA filter special multicast table (Ex_dFSMT) */
2108 mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
2109 (eth_port_num) + table_index, 0);
2111 /* Clear DA filter other multicast table (Ex_dFOMT) */
2112 mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE
2113 (eth_port_num) + table_index, 0);
2116 /* Get pointer to net_device multicast list and add each one... */
2117 for (i = 0, mc_list = dev->mc_list;
2118 (i < 256) && (mc_list != NULL) && (i < dev->mc_count);
2119 i++, mc_list = mc_list->next)
2120 if (mc_list->dmi_addrlen == 6)
2121 eth_port_mc_addr(eth_port_num, mc_list->dmi_addr);
2125 * eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
2128 * Go through all the DA filter tables (Unicast, Special Multicast &
2129 * Other Multicast) and set each entry to 0.
2132 * unsigned int eth_port_num Ethernet Port number.
2135 * Multicast and Unicast packets are rejected.
2140 static void eth_port_init_mac_tables(unsigned int eth_port_num)
2144 /* Clear DA filter unicast table (Ex_dFUT) */
2145 for (table_index = 0; table_index <= 0xC; table_index += 4)
2146 mv_write(MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE
2147 (eth_port_num) + table_index, 0);
2149 for (table_index = 0; table_index <= 0xFC; table_index += 4) {
2150 /* Clear DA filter special multicast table (Ex_dFSMT) */
2151 mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
2152 (eth_port_num) + table_index, 0);
2153 /* Clear DA filter other multicast table (Ex_dFOMT) */
2154 mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE
2155 (eth_port_num) + table_index, 0);
2160 * eth_clear_mib_counters - Clear all MIB counters
2163 * This function clears all MIB counters of a specific ethernet port.
2164 * A read from the MIB counter will reset the counter.
2167 * unsigned int eth_port_num Ethernet Port number.
2170 * After reading all MIB counters, the counters resets.
2173 * MIB counter value.
2176 static void eth_clear_mib_counters(unsigned int eth_port_num)
2180 /* Perform dummy reads from MIB counters */
2181 for (i = ETH_MIB_GOOD_OCTETS_RECEIVED_LOW; i < ETH_MIB_LATE_COLLISION;
2183 mv_read(MV643XX_ETH_MIB_COUNTERS_BASE(eth_port_num) + i);
2186 static inline u32 read_mib(struct mv643xx_private *mp, int offset)
2188 return mv_read(MV643XX_ETH_MIB_COUNTERS_BASE(mp->port_num) + offset);
2191 static void eth_update_mib_counters(struct mv643xx_private *mp)
2193 struct mv643xx_mib_counters *p = &mp->mib_counters;
2196 p->good_octets_received +=
2197 read_mib(mp, ETH_MIB_GOOD_OCTETS_RECEIVED_LOW);
2198 p->good_octets_received +=
2199 (u64)read_mib(mp, ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH) << 32;
2201 for (offset = ETH_MIB_BAD_OCTETS_RECEIVED;
2202 offset <= ETH_MIB_FRAMES_1024_TO_MAX_OCTETS;
2204 *(u32 *)((char *)p + offset) = read_mib(mp, offset);
2206 p->good_octets_sent += read_mib(mp, ETH_MIB_GOOD_OCTETS_SENT_LOW);
2207 p->good_octets_sent +=
2208 (u64)read_mib(mp, ETH_MIB_GOOD_OCTETS_SENT_HIGH) << 32;
2210 for (offset = ETH_MIB_GOOD_FRAMES_SENT;
2211 offset <= ETH_MIB_LATE_COLLISION;
2213 *(u32 *)((char *)p + offset) = read_mib(mp, offset);
2217 * ethernet_phy_detect - Detect whether a phy is present
2220 * This function tests whether there is a PHY present on
2221 * the specified port.
2224 * unsigned int eth_port_num Ethernet Port number.
2231 * -ENODEV on failure
2234 static int ethernet_phy_detect(unsigned int port_num)
2236 unsigned int phy_reg_data0;
2239 eth_port_read_smi_reg(port_num, 0, &phy_reg_data0);
2240 auto_neg = phy_reg_data0 & 0x1000;
2241 phy_reg_data0 ^= 0x1000; /* invert auto_neg */
2242 eth_port_write_smi_reg(port_num, 0, phy_reg_data0);
2244 eth_port_read_smi_reg(port_num, 0, &phy_reg_data0);
2245 if ((phy_reg_data0 & 0x1000) == auto_neg)
2246 return -ENODEV; /* change didn't take */
2248 phy_reg_data0 ^= 0x1000;
2249 eth_port_write_smi_reg(port_num, 0, phy_reg_data0);
2254 * ethernet_phy_get - Get the ethernet port PHY address.
2257 * This routine returns the given ethernet port PHY address.
2260 * unsigned int eth_port_num Ethernet Port number.
2269 static int ethernet_phy_get(unsigned int eth_port_num)
2271 unsigned int reg_data;
2273 reg_data = mv_read(MV643XX_ETH_PHY_ADDR_REG);
2275 return ((reg_data >> (5 * eth_port_num)) & 0x1f);
2279 * ethernet_phy_set - Set the ethernet port PHY address.
2282 * This routine sets the given ethernet port PHY address.
2285 * unsigned int eth_port_num Ethernet Port number.
2286 * int phy_addr PHY address.
2295 static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr)
2298 int addr_shift = 5 * eth_port_num;
2300 reg_data = mv_read(MV643XX_ETH_PHY_ADDR_REG);
2301 reg_data &= ~(0x1f << addr_shift);
2302 reg_data |= (phy_addr & 0x1f) << addr_shift;
2303 mv_write(MV643XX_ETH_PHY_ADDR_REG, reg_data);
2307 * ethernet_phy_reset - Reset Ethernet port PHY.
2310 * This routine utilizes the SMI interface to reset the ethernet port PHY.
2313 * unsigned int eth_port_num Ethernet Port number.
2322 static void ethernet_phy_reset(unsigned int eth_port_num)
2324 unsigned int phy_reg_data;
2327 eth_port_read_smi_reg(eth_port_num, 0, &phy_reg_data);
2328 phy_reg_data |= 0x8000; /* Set bit 15 to reset the PHY */
2329 eth_port_write_smi_reg(eth_port_num, 0, phy_reg_data);
2331 /* wait for PHY to come out of reset */
2334 eth_port_read_smi_reg(eth_port_num, 0, &phy_reg_data);
2335 } while (phy_reg_data & 0x8000);
2338 static void mv643xx_eth_port_enable_tx(unsigned int port_num,
2339 unsigned int queues)
2341 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num), queues);
2344 static void mv643xx_eth_port_enable_rx(unsigned int port_num,
2345 unsigned int queues)
2347 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num), queues);
2350 static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num)
2354 /* Stop Tx port activity. Check port Tx activity. */
2355 queues = mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num))
2358 /* Issue stop command for active queues only */
2359 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num),
2362 /* Wait for all Tx activity to terminate. */
2363 /* Check port cause register that all Tx queues are stopped */
2364 while (mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num))
2366 udelay(PHY_WAIT_MICRO_SECONDS);
2368 /* Wait for Tx FIFO to empty */
2369 while (mv_read(MV643XX_ETH_PORT_STATUS_REG(port_num)) &
2370 ETH_PORT_TX_FIFO_EMPTY)
2371 udelay(PHY_WAIT_MICRO_SECONDS);
2377 static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num)
2381 /* Stop Rx port activity. Check port Rx activity. */
2382 queues = mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num))
2385 /* Issue stop command for active queues only */
2386 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num),
2389 /* Wait for all Rx activity to terminate. */
2390 /* Check port cause register that all Rx queues are stopped */
2391 while (mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num))
2393 udelay(PHY_WAIT_MICRO_SECONDS);
2400 * eth_port_reset - Reset Ethernet port
2403 * This routine resets the chip by aborting any SDMA engine activity and
2404 * clearing the MIB counters. The Receiver and the Transmit unit are in
2405 * idle state after this command is performed and the port is disabled.
2408 * unsigned int eth_port_num Ethernet Port number.
2411 * Channel activity is halted.
2417 static void eth_port_reset(unsigned int port_num)
2419 unsigned int reg_data;
2421 mv643xx_eth_port_disable_tx(port_num);
2422 mv643xx_eth_port_disable_rx(port_num);
2424 /* Clear all MIB counters */
2425 eth_clear_mib_counters(port_num);
2427 /* Reset the Enable bit in the Configuration Register */
2428 reg_data = mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num));
2429 reg_data &= ~(MV643XX_ETH_SERIAL_PORT_ENABLE |
2430 MV643XX_ETH_DO_NOT_FORCE_LINK_FAIL |
2431 MV643XX_ETH_FORCE_LINK_PASS);
2432 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), reg_data);
2437 * eth_port_read_smi_reg - Read PHY registers
2440 * This routine utilize the SMI interface to interact with the PHY in
2441 * order to perform PHY register read.
2444 * unsigned int port_num Ethernet Port number.
2445 * unsigned int phy_reg PHY register address offset.
2446 * unsigned int *value Register value buffer.
2449 * Write the value of a specified PHY register into given buffer.
2452 * false if the PHY is busy or read data is not in valid state.
2456 static void eth_port_read_smi_reg(unsigned int port_num,
2457 unsigned int phy_reg, unsigned int *value)
2459 int phy_addr = ethernet_phy_get(port_num);
2460 unsigned long flags;
2463 /* the SMI register is a shared resource */
2464 spin_lock_irqsave(&mv643xx_eth_phy_lock, flags);
2466 /* wait for the SMI register to become available */
2467 for (i = 0; mv_read(MV643XX_ETH_SMI_REG) & ETH_SMI_BUSY; i++) {
2468 if (i == PHY_WAIT_ITERATIONS) {
2469 printk("mv643xx PHY busy timeout, port %d\n", port_num);
2472 udelay(PHY_WAIT_MICRO_SECONDS);
2475 mv_write(MV643XX_ETH_SMI_REG,
2476 (phy_addr << 16) | (phy_reg << 21) | ETH_SMI_OPCODE_READ);
2478 /* now wait for the data to be valid */
2479 for (i = 0; !(mv_read(MV643XX_ETH_SMI_REG) & ETH_SMI_READ_VALID); i++) {
2480 if (i == PHY_WAIT_ITERATIONS) {
2481 printk("mv643xx PHY read timeout, port %d\n", port_num);
2484 udelay(PHY_WAIT_MICRO_SECONDS);
2487 *value = mv_read(MV643XX_ETH_SMI_REG) & 0xffff;
2489 spin_unlock_irqrestore(&mv643xx_eth_phy_lock, flags);
2493 * eth_port_write_smi_reg - Write to PHY registers
2496 * This routine utilize the SMI interface to interact with the PHY in
2497 * order to perform writes to PHY registers.
2500 * unsigned int eth_port_num Ethernet Port number.
2501 * unsigned int phy_reg PHY register address offset.
2502 * unsigned int value Register value.
2505 * Write the given value to the specified PHY register.
2508 * false if the PHY is busy.
2512 static void eth_port_write_smi_reg(unsigned int eth_port_num,
2513 unsigned int phy_reg, unsigned int value)
2517 unsigned long flags;
2519 phy_addr = ethernet_phy_get(eth_port_num);
2521 /* the SMI register is a shared resource */
2522 spin_lock_irqsave(&mv643xx_eth_phy_lock, flags);
2524 /* wait for the SMI register to become available */
2525 for (i = 0; mv_read(MV643XX_ETH_SMI_REG) & ETH_SMI_BUSY; i++) {
2526 if (i == PHY_WAIT_ITERATIONS) {
2527 printk("mv643xx PHY busy timeout, port %d\n",
2531 udelay(PHY_WAIT_MICRO_SECONDS);
2534 mv_write(MV643XX_ETH_SMI_REG, (phy_addr << 16) | (phy_reg << 21) |
2535 ETH_SMI_OPCODE_WRITE | (value & 0xffff));
2537 spin_unlock_irqrestore(&mv643xx_eth_phy_lock, flags);
2541 * Wrappers for MII support library.
2543 static int mv643xx_mdio_read(struct net_device *dev, int phy_id, int location)
2546 struct mv643xx_private *mp = netdev_priv(dev);
2548 eth_port_read_smi_reg(mp->port_num, location, &val);
2552 static void mv643xx_mdio_write(struct net_device *dev, int phy_id, int location, int val)
2554 struct mv643xx_private *mp = netdev_priv(dev);
2555 eth_port_write_smi_reg(mp->port_num, location, val);
2559 * eth_port_receive - Get received information from Rx ring.
2562 * This routine returns the received data to the caller. There is no
2563 * data copying during routine operation. All information is returned
2564 * using pointer to packet information struct passed from the caller.
2565 * If the routine exhausts Rx ring resources then the resource error flag
2569 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2570 * struct pkt_info *p_pkt_info User packet buffer.
2573 * Rx ring current and used indexes are updated.
2576 * ETH_ERROR in case the routine can not access Rx desc ring.
2577 * ETH_QUEUE_FULL if Rx ring resources are exhausted.
2578 * ETH_END_OF_JOB if there is no received data.
2581 static ETH_FUNC_RET_STATUS eth_port_receive(struct mv643xx_private *mp,
2582 struct pkt_info *p_pkt_info)
2584 int rx_next_curr_desc, rx_curr_desc, rx_used_desc;
2585 volatile struct eth_rx_desc *p_rx_desc;
2586 unsigned int command_status;
2587 unsigned long flags;
2589 /* Do not process Rx ring in case of Rx ring resource error */
2590 if (mp->rx_resource_err)
2591 return ETH_QUEUE_FULL;
2593 spin_lock_irqsave(&mp->lock, flags);
2595 /* Get the Rx Desc ring 'curr and 'used' indexes */
2596 rx_curr_desc = mp->rx_curr_desc_q;
2597 rx_used_desc = mp->rx_used_desc_q;
2599 p_rx_desc = &mp->p_rx_desc_area[rx_curr_desc];
2601 /* The following parameters are used to save readings from memory */
2602 command_status = p_rx_desc->cmd_sts;
2605 /* Nothing to receive... */
2606 if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) {
2607 spin_unlock_irqrestore(&mp->lock, flags);
2608 return ETH_END_OF_JOB;
2611 p_pkt_info->byte_cnt = (p_rx_desc->byte_cnt) - RX_BUF_OFFSET;
2612 p_pkt_info->cmd_sts = command_status;
2613 p_pkt_info->buf_ptr = (p_rx_desc->buf_ptr) + RX_BUF_OFFSET;
2614 p_pkt_info->return_info = mp->rx_skb[rx_curr_desc];
2615 p_pkt_info->l4i_chk = p_rx_desc->buf_size;
2618 * Clean the return info field to indicate that the
2619 * packet has been moved to the upper layers
2621 mp->rx_skb[rx_curr_desc] = NULL;
2623 /* Update current index in data structure */
2624 rx_next_curr_desc = (rx_curr_desc + 1) % mp->rx_ring_size;
2625 mp->rx_curr_desc_q = rx_next_curr_desc;
2627 /* Rx descriptors exhausted. Set the Rx ring resource error flag */
2628 if (rx_next_curr_desc == rx_used_desc)
2629 mp->rx_resource_err = 1;
2631 spin_unlock_irqrestore(&mp->lock, flags);
2637 * eth_rx_return_buff - Returns a Rx buffer back to the Rx ring.
2640 * This routine returns a Rx buffer back to the Rx ring. It retrieves the
2641 * next 'used' descriptor and attached the returned buffer to it.
2642 * In case the Rx ring was in "resource error" condition, where there are
2643 * no available Rx resources, the function resets the resource error flag.
2646 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2647 * struct pkt_info *p_pkt_info Information on returned buffer.
2650 * New available Rx resource in Rx descriptor ring.
2653 * ETH_ERROR in case the routine can not access Rx desc ring.
2656 static ETH_FUNC_RET_STATUS eth_rx_return_buff(struct mv643xx_private *mp,
2657 struct pkt_info *p_pkt_info)
2659 int used_rx_desc; /* Where to return Rx resource */
2660 volatile struct eth_rx_desc *p_used_rx_desc;
2661 unsigned long flags;
2663 spin_lock_irqsave(&mp->lock, flags);
2665 /* Get 'used' Rx descriptor */
2666 used_rx_desc = mp->rx_used_desc_q;
2667 p_used_rx_desc = &mp->p_rx_desc_area[used_rx_desc];
2669 p_used_rx_desc->buf_ptr = p_pkt_info->buf_ptr;
2670 p_used_rx_desc->buf_size = p_pkt_info->byte_cnt;
2671 mp->rx_skb[used_rx_desc] = p_pkt_info->return_info;
2673 /* Flush the write pipe */
2675 /* Return the descriptor to DMA ownership */
2677 p_used_rx_desc->cmd_sts =
2678 ETH_BUFFER_OWNED_BY_DMA | ETH_RX_ENABLE_INTERRUPT;
2681 /* Move the used descriptor pointer to the next descriptor */
2682 mp->rx_used_desc_q = (used_rx_desc + 1) % mp->rx_ring_size;
2684 /* Any Rx return cancels the Rx resource error status */
2685 mp->rx_resource_err = 0;
2687 spin_unlock_irqrestore(&mp->lock, flags);
2692 /************* Begin ethtool support *************************/
2694 struct mv643xx_stats {
2695 char stat_string[ETH_GSTRING_LEN];
2700 #define MV643XX_STAT(m) sizeof(((struct mv643xx_private *)0)->m), \
2701 offsetof(struct mv643xx_private, m)
2703 static const struct mv643xx_stats mv643xx_gstrings_stats[] = {
2704 { "rx_packets", MV643XX_STAT(stats.rx_packets) },
2705 { "tx_packets", MV643XX_STAT(stats.tx_packets) },
2706 { "rx_bytes", MV643XX_STAT(stats.rx_bytes) },
2707 { "tx_bytes", MV643XX_STAT(stats.tx_bytes) },
2708 { "rx_errors", MV643XX_STAT(stats.rx_errors) },
2709 { "tx_errors", MV643XX_STAT(stats.tx_errors) },
2710 { "rx_dropped", MV643XX_STAT(stats.rx_dropped) },
2711 { "tx_dropped", MV643XX_STAT(stats.tx_dropped) },
2712 { "good_octets_received", MV643XX_STAT(mib_counters.good_octets_received) },
2713 { "bad_octets_received", MV643XX_STAT(mib_counters.bad_octets_received) },
2714 { "internal_mac_transmit_err", MV643XX_STAT(mib_counters.internal_mac_transmit_err) },
2715 { "good_frames_received", MV643XX_STAT(mib_counters.good_frames_received) },
2716 { "bad_frames_received", MV643XX_STAT(mib_counters.bad_frames_received) },
2717 { "broadcast_frames_received", MV643XX_STAT(mib_counters.broadcast_frames_received) },
2718 { "multicast_frames_received", MV643XX_STAT(mib_counters.multicast_frames_received) },
2719 { "frames_64_octets", MV643XX_STAT(mib_counters.frames_64_octets) },
2720 { "frames_65_to_127_octets", MV643XX_STAT(mib_counters.frames_65_to_127_octets) },
2721 { "frames_128_to_255_octets", MV643XX_STAT(mib_counters.frames_128_to_255_octets) },
2722 { "frames_256_to_511_octets", MV643XX_STAT(mib_counters.frames_256_to_511_octets) },
2723 { "frames_512_to_1023_octets", MV643XX_STAT(mib_counters.frames_512_to_1023_octets) },
2724 { "frames_1024_to_max_octets", MV643XX_STAT(mib_counters.frames_1024_to_max_octets) },
2725 { "good_octets_sent", MV643XX_STAT(mib_counters.good_octets_sent) },
2726 { "good_frames_sent", MV643XX_STAT(mib_counters.good_frames_sent) },
2727 { "excessive_collision", MV643XX_STAT(mib_counters.excessive_collision) },
2728 { "multicast_frames_sent", MV643XX_STAT(mib_counters.multicast_frames_sent) },
2729 { "broadcast_frames_sent", MV643XX_STAT(mib_counters.broadcast_frames_sent) },
2730 { "unrec_mac_control_received", MV643XX_STAT(mib_counters.unrec_mac_control_received) },
2731 { "fc_sent", MV643XX_STAT(mib_counters.fc_sent) },
2732 { "good_fc_received", MV643XX_STAT(mib_counters.good_fc_received) },
2733 { "bad_fc_received", MV643XX_STAT(mib_counters.bad_fc_received) },
2734 { "undersize_received", MV643XX_STAT(mib_counters.undersize_received) },
2735 { "fragments_received", MV643XX_STAT(mib_counters.fragments_received) },
2736 { "oversize_received", MV643XX_STAT(mib_counters.oversize_received) },
2737 { "jabber_received", MV643XX_STAT(mib_counters.jabber_received) },
2738 { "mac_receive_error", MV643XX_STAT(mib_counters.mac_receive_error) },
2739 { "bad_crc_event", MV643XX_STAT(mib_counters.bad_crc_event) },
2740 { "collision", MV643XX_STAT(mib_counters.collision) },
2741 { "late_collision", MV643XX_STAT(mib_counters.late_collision) },
2744 #define MV643XX_STATS_LEN \
2745 sizeof(mv643xx_gstrings_stats) / sizeof(struct mv643xx_stats)
2747 static void mv643xx_get_drvinfo(struct net_device *netdev,
2748 struct ethtool_drvinfo *drvinfo)
2750 strncpy(drvinfo->driver, mv643xx_driver_name, 32);
2751 strncpy(drvinfo->version, mv643xx_driver_version, 32);
2752 strncpy(drvinfo->fw_version, "N/A", 32);
2753 strncpy(drvinfo->bus_info, "mv643xx", 32);
2754 drvinfo->n_stats = MV643XX_STATS_LEN;
2757 static int mv643xx_get_stats_count(struct net_device *netdev)
2759 return MV643XX_STATS_LEN;
2762 static void mv643xx_get_ethtool_stats(struct net_device *netdev,
2763 struct ethtool_stats *stats, uint64_t *data)
2765 struct mv643xx_private *mp = netdev->priv;
2768 eth_update_mib_counters(mp);
2770 for (i = 0; i < MV643XX_STATS_LEN; i++) {
2771 char *p = (char *)mp+mv643xx_gstrings_stats[i].stat_offset;
2772 data[i] = (mv643xx_gstrings_stats[i].sizeof_stat ==
2773 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
2777 static void mv643xx_get_strings(struct net_device *netdev, uint32_t stringset,
2784 for (i=0; i < MV643XX_STATS_LEN; i++) {
2785 memcpy(data + i * ETH_GSTRING_LEN,
2786 mv643xx_gstrings_stats[i].stat_string,
2793 static u32 mv643xx_eth_get_link(struct net_device *dev)
2795 struct mv643xx_private *mp = netdev_priv(dev);
2797 return mii_link_ok(&mp->mii);
2800 static int mv643xx_eth_nway_restart(struct net_device *dev)
2802 struct mv643xx_private *mp = netdev_priv(dev);
2804 return mii_nway_restart(&mp->mii);
2807 static int mv643xx_eth_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2809 struct mv643xx_private *mp = netdev_priv(dev);
2811 return generic_mii_ioctl(&mp->mii, if_mii(ifr), cmd, NULL);
2814 static struct ethtool_ops mv643xx_ethtool_ops = {
2815 .get_settings = mv643xx_get_settings,
2816 .set_settings = mv643xx_set_settings,
2817 .get_drvinfo = mv643xx_get_drvinfo,
2818 .get_link = mv643xx_eth_get_link,
2819 .get_sg = ethtool_op_get_sg,
2820 .set_sg = ethtool_op_set_sg,
2821 .get_strings = mv643xx_get_strings,
2822 .get_stats_count = mv643xx_get_stats_count,
2823 .get_ethtool_stats = mv643xx_get_ethtool_stats,
2824 .get_strings = mv643xx_get_strings,
2825 .get_stats_count = mv643xx_get_stats_count,
2826 .get_ethtool_stats = mv643xx_get_ethtool_stats,
2827 .nway_reset = mv643xx_eth_nway_restart,
2830 /************* End ethtool support *************************/