1 /*********************************************************************
2 * $Id: smsc-ircc2.c,v 1.19.2.5 2002/10/27 11:34:26 dip Exp $
4 * Description: Driver for the SMC Infrared Communications Controller
5 * Status: Experimental.
6 * Author: Daniele Peri (peri@csai.unipa.it)
11 * Copyright (c) 2002 Daniele Peri
12 * All Rights Reserved.
13 * Copyright (c) 2002 Jean Tourrilhes
16 * Based on smc-ircc.c:
18 * Copyright (c) 2001 Stefani Seibold
19 * Copyright (c) 1999-2001 Dag Brattli
20 * Copyright (c) 1998-1999 Thomas Davis,
24 * Copyright (c) 1997, 1998, 1999-2000 Dag Brattli, All Rights Reserved.
27 * This program is free software; you can redistribute it and/or
28 * modify it under the terms of the GNU General Public License as
29 * published by the Free Software Foundation; either version 2 of
30 * the License, or (at your option) any later version.
32 * This program is distributed in the hope that it will be useful,
33 * but WITHOUT ANY WARRANTY; without even the implied warranty of
34 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
35 * GNU General Public License for more details.
37 * You should have received a copy of the GNU General Public License
38 * along with this program; if not, write to the Free Software
39 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
42 ********************************************************************/
44 #include <linux/module.h>
45 #include <linux/kernel.h>
46 #include <linux/types.h>
47 #include <linux/skbuff.h>
48 #include <linux/netdevice.h>
49 #include <linux/ioport.h>
50 #include <linux/delay.h>
51 #include <linux/slab.h>
52 #include <linux/init.h>
53 #include <linux/rtnetlink.h>
54 #include <linux/serial_reg.h>
55 #include <linux/dma-mapping.h>
59 #include <asm/byteorder.h>
61 #include <linux/spinlock.h>
64 #include <net/irda/wrapper.h>
65 #include <net/irda/irda.h>
66 #include <net/irda/irda_device.h>
68 #include "smsc-ircc2.h"
72 MODULE_AUTHOR("Daniele Peri <peri@csai.unipa.it>");
73 MODULE_DESCRIPTION("SMC IrCC SIR/FIR controller driver");
74 MODULE_LICENSE("GPL");
76 static int ircc_dma = 255;
77 module_param(ircc_dma, int, 0);
78 MODULE_PARM_DESC(ircc_dma, "DMA channel");
80 static int ircc_irq = 255;
81 module_param(ircc_irq, int, 0);
82 MODULE_PARM_DESC(ircc_irq, "IRQ line");
85 module_param(ircc_fir, int, 0);
86 MODULE_PARM_DESC(ircc_fir, "FIR Base Address");
89 module_param(ircc_sir, int, 0);
90 MODULE_PARM_DESC(ircc_sir, "SIR Base Address");
93 module_param(ircc_cfg, int, 0);
94 MODULE_PARM_DESC(ircc_cfg, "Configuration register base address");
96 static int ircc_transceiver;
97 module_param(ircc_transceiver, int, 0);
98 MODULE_PARM_DESC(ircc_transceiver, "Transceiver type");
102 struct smsc_transceiver {
104 void (*set_for_speed)(int fir_base, u32 speed);
105 int (*probe)(int fir_base);
118 struct smsc_chip_address {
119 unsigned int cfg_base;
123 /* Private data for each instance */
124 struct smsc_ircc_cb {
125 struct net_device *netdev; /* Yes! we are some kind of netdevice */
126 struct net_device_stats stats;
127 struct irlap_cb *irlap; /* The link layer we are binded to */
129 chipio_t io; /* IrDA controller information */
130 iobuff_t tx_buff; /* Transmit buffer */
131 iobuff_t rx_buff; /* Receive buffer */
132 dma_addr_t tx_buff_dma;
133 dma_addr_t rx_buff_dma;
135 struct qos_info qos; /* QoS capabilities for this device */
137 spinlock_t lock; /* For serializing operations */
140 __u32 flags; /* Interface flags */
142 int tx_buff_offsets[10]; /* Offsets between frames in tx_buff */
143 int tx_len; /* Number of frames in tx_buff */
146 struct platform_device *pldev;
151 #define SMSC_IRCC2_DRIVER_NAME "smsc-ircc2"
153 #define SMSC_IRCC2_C_IRDA_FALLBACK_SPEED 9600
154 #define SMSC_IRCC2_C_DEFAULT_TRANSCEIVER 1
155 #define SMSC_IRCC2_C_NET_TIMEOUT 0
156 #define SMSC_IRCC2_C_SIR_STOP 0
158 static const char *driver_name = SMSC_IRCC2_DRIVER_NAME;
162 static int smsc_ircc_open(unsigned int firbase, unsigned int sirbase, u8 dma, u8 irq);
163 static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base);
164 static void smsc_ircc_setup_io(struct smsc_ircc_cb *self, unsigned int fir_base, unsigned int sir_base, u8 dma, u8 irq);
165 static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self);
166 static void smsc_ircc_init_chip(struct smsc_ircc_cb *self);
167 static int __exit smsc_ircc_close(struct smsc_ircc_cb *self);
168 static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self);
169 static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self);
170 static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self);
171 static int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
172 static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
173 static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int bofs);
174 static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self);
175 static void smsc_ircc_change_speed(struct smsc_ircc_cb *self, u32 speed);
176 static void smsc_ircc_set_sir_speed(struct smsc_ircc_cb *self, u32 speed);
177 static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
178 static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev);
179 static void smsc_ircc_sir_start(struct smsc_ircc_cb *self);
180 #if SMSC_IRCC2_C_SIR_STOP
181 static void smsc_ircc_sir_stop(struct smsc_ircc_cb *self);
183 static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self);
184 static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len);
185 static int smsc_ircc_net_open(struct net_device *dev);
186 static int smsc_ircc_net_close(struct net_device *dev);
187 static int smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
188 #if SMSC_IRCC2_C_NET_TIMEOUT
189 static void smsc_ircc_timeout(struct net_device *dev);
191 static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev);
192 static int smsc_ircc_is_receiving(struct smsc_ircc_cb *self);
193 static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self);
194 static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed);
195 static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self);
198 static int __init smsc_ircc_look_for_chips(void);
199 static const struct smsc_chip * __init smsc_ircc_probe(unsigned short cfg_base, u8 reg, const struct smsc_chip *chip, char *type);
200 static int __init smsc_superio_flat(const struct smsc_chip *chips, unsigned short cfg_base, char *type);
201 static int __init smsc_superio_paged(const struct smsc_chip *chips, unsigned short cfg_base, char *type);
202 static int __init smsc_superio_fdc(unsigned short cfg_base);
203 static int __init smsc_superio_lpc(unsigned short cfg_base);
205 /* Transceivers specific functions */
207 static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed);
208 static int smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base);
209 static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed);
210 static int smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base);
211 static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed);
212 static int smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base);
214 /* Power Management */
216 static int smsc_ircc_suspend(struct device *dev, pm_message_t state);
217 static int smsc_ircc_resume(struct device *dev);
219 static struct device_driver smsc_ircc_driver = {
220 .name = SMSC_IRCC2_DRIVER_NAME,
221 .bus = &platform_bus_type,
222 .suspend = smsc_ircc_suspend,
223 .resume = smsc_ircc_resume,
226 /* Transceivers for SMSC-ircc */
228 static struct smsc_transceiver smsc_transceivers[] =
230 { "Toshiba Satellite 1800 (GP data pin select)", smsc_ircc_set_transceiver_toshiba_sat1800, smsc_ircc_probe_transceiver_toshiba_sat1800 },
231 { "Fast pin select", smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select, smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select },
232 { "ATC IRMode", smsc_ircc_set_transceiver_smsc_ircc_atc, smsc_ircc_probe_transceiver_smsc_ircc_atc },
235 #define SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS (ARRAY_SIZE(smsc_transceivers) - 1)
237 /* SMC SuperIO chipsets definitions */
239 #define KEY55_1 0 /* SuperIO Configuration mode with Key <0x55> */
240 #define KEY55_2 1 /* SuperIO Configuration mode with Key <0x55,0x55> */
241 #define NoIRDA 2 /* SuperIO Chip has no IRDA Port */
242 #define SIR 0 /* SuperIO Chip has only slow IRDA */
243 #define FIR 4 /* SuperIO Chip has fast IRDA */
244 #define SERx4 8 /* SuperIO Chip supports 115,2 KBaud * 4=460,8 KBaud */
246 static struct smsc_chip __initdata fdc_chips_flat[] =
248 /* Base address 0x3f0 or 0x370 */
249 { "37C44", KEY55_1|NoIRDA, 0x00, 0x00 }, /* This chip cannot be detected */
250 { "37C665GT", KEY55_2|NoIRDA, 0x65, 0x01 },
251 { "37C665GT", KEY55_2|NoIRDA, 0x66, 0x01 },
252 { "37C669", KEY55_2|SIR|SERx4, 0x03, 0x02 },
253 { "37C669", KEY55_2|SIR|SERx4, 0x04, 0x02 }, /* ID? */
254 { "37C78", KEY55_2|NoIRDA, 0x78, 0x00 },
255 { "37N769", KEY55_1|FIR|SERx4, 0x28, 0x00 },
256 { "37N869", KEY55_1|FIR|SERx4, 0x29, 0x00 },
260 static struct smsc_chip __initdata fdc_chips_paged[] =
262 /* Base address 0x3f0 or 0x370 */
263 { "37B72X", KEY55_1|SIR|SERx4, 0x4c, 0x00 },
264 { "37B77X", KEY55_1|SIR|SERx4, 0x43, 0x00 },
265 { "37B78X", KEY55_1|SIR|SERx4, 0x44, 0x00 },
266 { "37B80X", KEY55_1|SIR|SERx4, 0x42, 0x00 },
267 { "37C67X", KEY55_1|FIR|SERx4, 0x40, 0x00 },
268 { "37C93X", KEY55_2|SIR|SERx4, 0x02, 0x01 },
269 { "37C93XAPM", KEY55_1|SIR|SERx4, 0x30, 0x01 },
270 { "37C93XFR", KEY55_2|FIR|SERx4, 0x03, 0x01 },
271 { "37M707", KEY55_1|SIR|SERx4, 0x42, 0x00 },
272 { "37M81X", KEY55_1|SIR|SERx4, 0x4d, 0x00 },
273 { "37N958FR", KEY55_1|FIR|SERx4, 0x09, 0x04 },
274 { "37N971", KEY55_1|FIR|SERx4, 0x0a, 0x00 },
275 { "37N972", KEY55_1|FIR|SERx4, 0x0b, 0x00 },
279 static struct smsc_chip __initdata lpc_chips_flat[] =
281 /* Base address 0x2E or 0x4E */
282 { "47N227", KEY55_1|FIR|SERx4, 0x5a, 0x00 },
283 { "47N267", KEY55_1|FIR|SERx4, 0x5e, 0x00 },
287 static struct smsc_chip __initdata lpc_chips_paged[] =
289 /* Base address 0x2E or 0x4E */
290 { "47B27X", KEY55_1|SIR|SERx4, 0x51, 0x00 },
291 { "47B37X", KEY55_1|SIR|SERx4, 0x52, 0x00 },
292 { "47M10X", KEY55_1|SIR|SERx4, 0x59, 0x00 },
293 { "47M120", KEY55_1|NoIRDA|SERx4, 0x5c, 0x00 },
294 { "47M13X", KEY55_1|SIR|SERx4, 0x59, 0x00 },
295 { "47M14X", KEY55_1|SIR|SERx4, 0x5f, 0x00 },
296 { "47N252", KEY55_1|FIR|SERx4, 0x0e, 0x00 },
297 { "47S42X", KEY55_1|SIR|SERx4, 0x57, 0x00 },
301 #define SMSCSIO_TYPE_FDC 1
302 #define SMSCSIO_TYPE_LPC 2
303 #define SMSCSIO_TYPE_FLAT 4
304 #define SMSCSIO_TYPE_PAGED 8
306 static struct smsc_chip_address __initdata possible_addresses[] =
308 { 0x3f0, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
309 { 0x370, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
310 { 0xe0, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
311 { 0x2e, SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
312 { 0x4e, SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
318 static struct smsc_ircc_cb *dev_self[] = { NULL, NULL };
319 static unsigned short dev_count;
321 static inline void register_bank(int iobase, int bank)
323 outb(((inb(iobase + IRCC_MASTER) & 0xf0) | (bank & 0x07)),
324 iobase + IRCC_MASTER);
328 /*******************************************************************************
334 *******************************************************************************/
337 * Function smsc_ircc_init ()
339 * Initialize chip. Just try to find out how many chips we are dealing with
342 static int __init smsc_ircc_init(void)
346 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
348 ret = driver_register(&smsc_ircc_driver);
350 IRDA_ERROR("%s, Can't register driver!\n", driver_name);
356 if (ircc_fir > 0 && ircc_sir > 0) {
357 IRDA_MESSAGE(" Overriding FIR address 0x%04x\n", ircc_fir);
358 IRDA_MESSAGE(" Overriding SIR address 0x%04x\n", ircc_sir);
360 if (smsc_ircc_open(ircc_fir, ircc_sir, ircc_dma, ircc_irq))
365 /* try user provided configuration register base address */
367 IRDA_MESSAGE(" Overriding configuration address "
368 "0x%04x\n", ircc_cfg);
369 if (!smsc_superio_fdc(ircc_cfg))
371 if (!smsc_superio_lpc(ircc_cfg))
375 if (smsc_ircc_look_for_chips() > 0)
380 driver_unregister(&smsc_ircc_driver);
386 * Function smsc_ircc_open (firbase, sirbase, dma, irq)
388 * Try to open driver instance
391 static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u8 dma, u8 irq)
393 struct smsc_ircc_cb *self;
394 struct net_device *dev;
397 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
399 err = smsc_ircc_present(fir_base, sir_base);
404 if (dev_count >= ARRAY_SIZE(dev_self)) {
405 IRDA_WARNING("%s(), too many devices!\n", __FUNCTION__);
410 * Allocate new instance of the driver
412 dev = alloc_irdadev(sizeof(struct smsc_ircc_cb));
414 IRDA_WARNING("%s() can't allocate net device\n", __FUNCTION__);
418 SET_MODULE_OWNER(dev);
420 dev->hard_start_xmit = smsc_ircc_hard_xmit_sir;
421 #if SMSC_IRCC2_C_NET_TIMEOUT
422 dev->tx_timeout = smsc_ircc_timeout;
423 dev->watchdog_timeo = HZ * 2; /* Allow enough time for speed change */
425 dev->open = smsc_ircc_net_open;
426 dev->stop = smsc_ircc_net_close;
427 dev->do_ioctl = smsc_ircc_net_ioctl;
428 dev->get_stats = smsc_ircc_net_get_stats;
430 self = netdev_priv(dev);
433 /* Make ifconfig display some details */
434 dev->base_addr = self->io.fir_base = fir_base;
435 dev->irq = self->io.irq = irq;
437 /* Need to store self somewhere */
438 dev_self[dev_count] = self;
439 spin_lock_init(&self->lock);
441 self->rx_buff.truesize = SMSC_IRCC2_RX_BUFF_TRUESIZE;
442 self->tx_buff.truesize = SMSC_IRCC2_TX_BUFF_TRUESIZE;
445 dma_alloc_coherent(NULL, self->rx_buff.truesize,
446 &self->rx_buff_dma, GFP_KERNEL);
447 if (self->rx_buff.head == NULL) {
448 IRDA_ERROR("%s, Can't allocate memory for receive buffer!\n",
454 dma_alloc_coherent(NULL, self->tx_buff.truesize,
455 &self->tx_buff_dma, GFP_KERNEL);
456 if (self->tx_buff.head == NULL) {
457 IRDA_ERROR("%s, Can't allocate memory for transmit buffer!\n",
462 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
463 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
465 self->rx_buff.in_frame = FALSE;
466 self->rx_buff.state = OUTSIDE_FRAME;
467 self->tx_buff.data = self->tx_buff.head;
468 self->rx_buff.data = self->rx_buff.head;
470 smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq);
471 smsc_ircc_setup_qos(self);
472 smsc_ircc_init_chip(self);
474 if (ircc_transceiver > 0 &&
475 ircc_transceiver < SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS)
476 self->transceiver = ircc_transceiver;
478 smsc_ircc_probe_transceiver(self);
480 err = register_netdev(self->netdev);
482 IRDA_ERROR("%s, Network device registration failed!\n",
487 self->pldev = platform_device_register_simple(SMSC_IRCC2_DRIVER_NAME,
489 if (IS_ERR(self->pldev)) {
490 err = PTR_ERR(self->pldev);
493 dev_set_drvdata(&self->pldev->dev, self);
495 IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
501 unregister_netdev(self->netdev);
504 dma_free_coherent(NULL, self->tx_buff.truesize,
505 self->tx_buff.head, self->tx_buff_dma);
507 dma_free_coherent(NULL, self->rx_buff.truesize,
508 self->rx_buff.head, self->rx_buff_dma);
510 free_netdev(self->netdev);
511 dev_self[dev_count] = NULL;
513 release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
514 release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT);
520 * Function smsc_ircc_present(fir_base, sir_base)
522 * Check the smsc-ircc chip presence
525 static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base)
527 unsigned char low, high, chip, config, dma, irq, version;
529 if (!request_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT,
531 IRDA_WARNING("%s: can't get fir_base of 0x%03x\n",
532 __FUNCTION__, fir_base);
536 if (!request_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT,
538 IRDA_WARNING("%s: can't get sir_base of 0x%03x\n",
539 __FUNCTION__, sir_base);
543 register_bank(fir_base, 3);
545 high = inb(fir_base + IRCC_ID_HIGH);
546 low = inb(fir_base + IRCC_ID_LOW);
547 chip = inb(fir_base + IRCC_CHIP_ID);
548 version = inb(fir_base + IRCC_VERSION);
549 config = inb(fir_base + IRCC_INTERFACE);
550 dma = config & IRCC_INTERFACE_DMA_MASK;
551 irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4;
553 if (high != 0x10 || low != 0xb8 || (chip != 0xf1 && chip != 0xf2)) {
554 IRDA_WARNING("%s(), addr 0x%04x - no device found!\n",
555 __FUNCTION__, fir_base);
558 IRDA_MESSAGE("SMsC IrDA Controller found\n IrCC version %d.%d, "
559 "firport 0x%03x, sirport 0x%03x dma=%d, irq=%d\n",
560 chip & 0x0f, version, fir_base, sir_base, dma, irq);
565 release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT);
567 release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
573 * Function smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq)
578 static void smsc_ircc_setup_io(struct smsc_ircc_cb *self,
579 unsigned int fir_base, unsigned int sir_base,
582 unsigned char config, chip_dma, chip_irq;
584 register_bank(fir_base, 3);
585 config = inb(fir_base + IRCC_INTERFACE);
586 chip_dma = config & IRCC_INTERFACE_DMA_MASK;
587 chip_irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4;
589 self->io.fir_base = fir_base;
590 self->io.sir_base = sir_base;
591 self->io.fir_ext = SMSC_IRCC2_FIR_CHIP_IO_EXTENT;
592 self->io.sir_ext = SMSC_IRCC2_SIR_CHIP_IO_EXTENT;
593 self->io.fifo_size = SMSC_IRCC2_FIFO_SIZE;
594 self->io.speed = SMSC_IRCC2_C_IRDA_FALLBACK_SPEED;
598 IRDA_MESSAGE("%s, Overriding IRQ - chip says %d, using %d\n",
599 driver_name, chip_irq, irq);
602 self->io.irq = chip_irq;
606 IRDA_MESSAGE("%s, Overriding DMA - chip says %d, using %d\n",
607 driver_name, chip_dma, dma);
610 self->io.dma = chip_dma;
615 * Function smsc_ircc_setup_qos(self)
620 static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self)
622 /* Initialize QoS for this device */
623 irda_init_max_qos_capabilies(&self->qos);
625 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
626 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
628 self->qos.min_turn_time.bits = SMSC_IRCC2_MIN_TURN_TIME;
629 self->qos.window_size.bits = SMSC_IRCC2_WINDOW_SIZE;
630 irda_qos_bits_to_value(&self->qos);
634 * Function smsc_ircc_init_chip(self)
639 static void smsc_ircc_init_chip(struct smsc_ircc_cb *self)
641 int iobase = self->io.fir_base;
643 register_bank(iobase, 0);
644 outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER);
645 outb(0x00, iobase + IRCC_MASTER);
647 register_bank(iobase, 1);
648 outb(((inb(iobase + IRCC_SCE_CFGA) & 0x87) | IRCC_CFGA_IRDA_SIR_A),
649 iobase + IRCC_SCE_CFGA);
651 #ifdef smsc_669 /* Uses pin 88/89 for Rx/Tx */
652 outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
653 iobase + IRCC_SCE_CFGB);
655 outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
656 iobase + IRCC_SCE_CFGB);
658 (void) inb(iobase + IRCC_FIFO_THRESHOLD);
659 outb(SMSC_IRCC2_FIFO_THRESHOLD, iobase + IRCC_FIFO_THRESHOLD);
661 register_bank(iobase, 4);
662 outb((inb(iobase + IRCC_CONTROL) & 0x30), iobase + IRCC_CONTROL);
664 register_bank(iobase, 0);
665 outb(0, iobase + IRCC_LCR_A);
667 smsc_ircc_set_sir_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
669 /* Power on device */
670 outb(0x00, iobase + IRCC_MASTER);
674 * Function smsc_ircc_net_ioctl (dev, rq, cmd)
676 * Process IOCTL commands for this device
679 static int smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
681 struct if_irda_req *irq = (struct if_irda_req *) rq;
682 struct smsc_ircc_cb *self;
686 IRDA_ASSERT(dev != NULL, return -1;);
688 self = netdev_priv(dev);
690 IRDA_ASSERT(self != NULL, return -1;);
692 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
695 case SIOCSBANDWIDTH: /* Set bandwidth */
696 if (!capable(CAP_NET_ADMIN))
699 /* Make sure we are the only one touching
700 * self->io.speed and the hardware - Jean II */
701 spin_lock_irqsave(&self->lock, flags);
702 smsc_ircc_change_speed(self, irq->ifr_baudrate);
703 spin_unlock_irqrestore(&self->lock, flags);
706 case SIOCSMEDIABUSY: /* Set media busy */
707 if (!capable(CAP_NET_ADMIN)) {
712 irda_device_set_media_busy(self->netdev, TRUE);
714 case SIOCGRECEIVING: /* Check if we are receiving right now */
715 irq->ifr_receiving = smsc_ircc_is_receiving(self);
719 if (!capable(CAP_NET_ADMIN)) {
723 smsc_ircc_sir_set_dtr_rts(dev, irq->ifr_dtr, irq->ifr_rts);
733 static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev)
735 struct smsc_ircc_cb *self = netdev_priv(dev);
740 #if SMSC_IRCC2_C_NET_TIMEOUT
742 * Function smsc_ircc_timeout (struct net_device *dev)
744 * The networking timeout management.
748 static void smsc_ircc_timeout(struct net_device *dev)
750 struct smsc_ircc_cb *self = netdev_priv(dev);
753 IRDA_WARNING("%s: transmit timed out, changing speed to: %d\n",
754 dev->name, self->io.speed);
755 spin_lock_irqsave(&self->lock, flags);
756 smsc_ircc_sir_start(self);
757 smsc_ircc_change_speed(self, self->io.speed);
758 dev->trans_start = jiffies;
759 netif_wake_queue(dev);
760 spin_unlock_irqrestore(&self->lock, flags);
765 * Function smsc_ircc_hard_xmit_sir (struct sk_buff *skb, struct net_device *dev)
767 * Transmits the current frame until FIFO is full, then
768 * waits until the next transmit interrupt, and continues until the
769 * frame is transmitted.
771 int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
773 struct smsc_ircc_cb *self;
777 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
779 IRDA_ASSERT(dev != NULL, return 0;);
781 self = netdev_priv(dev);
782 IRDA_ASSERT(self != NULL, return 0;);
784 netif_stop_queue(dev);
786 /* Make sure test of self->io.speed & speed change are atomic */
787 spin_lock_irqsave(&self->lock, flags);
789 /* Check if we need to change the speed */
790 speed = irda_get_next_speed(skb);
791 if (speed != self->io.speed && speed != -1) {
792 /* Check for empty frame */
795 * We send frames one by one in SIR mode (no
796 * pipelining), so at this point, if we were sending
797 * a previous frame, we just received the interrupt
798 * telling us it is finished (UART_IIR_THRI).
799 * Therefore, waiting for the transmitter to really
800 * finish draining the fifo won't take too long.
801 * And the interrupt handler is not expected to run.
803 smsc_ircc_sir_wait_hw_transmitter_finish(self);
804 smsc_ircc_change_speed(self, speed);
805 spin_unlock_irqrestore(&self->lock, flags);
809 self->new_speed = speed;
813 self->tx_buff.data = self->tx_buff.head;
815 /* Copy skb to tx_buff while wrapping, stuffing and making CRC */
816 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
817 self->tx_buff.truesize);
819 self->stats.tx_bytes += self->tx_buff.len;
821 /* Turn on transmit finished interrupt. Will fire immediately! */
822 outb(UART_IER_THRI, self->io.sir_base + UART_IER);
824 spin_unlock_irqrestore(&self->lock, flags);
832 * Function smsc_ircc_set_fir_speed (self, baud)
834 * Change the speed of the device
837 static void smsc_ircc_set_fir_speed(struct smsc_ircc_cb *self, u32 speed)
839 int fir_base, ir_mode, ctrl, fast;
841 IRDA_ASSERT(self != NULL, return;);
842 fir_base = self->io.fir_base;
844 self->io.speed = speed;
849 ir_mode = IRCC_CFGA_IRDA_HDLC;
852 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
855 ir_mode = IRCC_CFGA_IRDA_HDLC;
856 ctrl = IRCC_1152 | IRCC_CRC;
857 fast = IRCC_LCR_A_FAST | IRCC_LCR_A_GP_DATA;
858 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n",
862 ir_mode = IRCC_CFGA_IRDA_4PPM;
864 fast = IRCC_LCR_A_FAST;
865 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n",
871 /* This causes an interrupt */
872 register_bank(fir_base, 0);
873 outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast, fir_base + IRCC_LCR_A);
876 register_bank(fir_base, 1);
877 outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | ir_mode), fir_base + IRCC_SCE_CFGA);
879 register_bank(fir_base, 4);
880 outb((inb(fir_base + IRCC_CONTROL) & 0x30) | ctrl, fir_base + IRCC_CONTROL);
884 * Function smsc_ircc_fir_start(self)
886 * Change the speed of the device
889 static void smsc_ircc_fir_start(struct smsc_ircc_cb *self)
891 struct net_device *dev;
894 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
896 IRDA_ASSERT(self != NULL, return;);
898 IRDA_ASSERT(dev != NULL, return;);
900 fir_base = self->io.fir_base;
902 /* Reset everything */
904 /* Install FIR transmit handler */
905 dev->hard_start_xmit = smsc_ircc_hard_xmit_fir;
908 outb(inb(fir_base + IRCC_LCR_A) | IRCC_LCR_A_FIFO_RESET, fir_base + IRCC_LCR_A);
910 /* Enable interrupt */
911 /*outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, fir_base + IRCC_IER);*/
913 register_bank(fir_base, 1);
915 /* Select the TX/RX interface */
916 #ifdef SMSC_669 /* Uses pin 88/89 for Rx/Tx */
917 outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
918 fir_base + IRCC_SCE_CFGB);
920 outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
921 fir_base + IRCC_SCE_CFGB);
923 (void) inb(fir_base + IRCC_FIFO_THRESHOLD);
925 /* Enable SCE interrupts */
926 outb(0, fir_base + IRCC_MASTER);
927 register_bank(fir_base, 0);
928 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, fir_base + IRCC_IER);
929 outb(IRCC_MASTER_INT_EN, fir_base + IRCC_MASTER);
933 * Function smsc_ircc_fir_stop(self, baud)
935 * Change the speed of the device
938 static void smsc_ircc_fir_stop(struct smsc_ircc_cb *self)
942 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
944 IRDA_ASSERT(self != NULL, return;);
946 fir_base = self->io.fir_base;
947 register_bank(fir_base, 0);
948 /*outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);*/
949 outb(inb(fir_base + IRCC_LCR_B) & IRCC_LCR_B_SIP_ENABLE, fir_base + IRCC_LCR_B);
954 * Function smsc_ircc_change_speed(self, baud)
956 * Change the speed of the device
958 * This function *must* be called with spinlock held, because it may
959 * be called from the irq handler. - Jean II
961 static void smsc_ircc_change_speed(struct smsc_ircc_cb *self, u32 speed)
963 struct net_device *dev;
964 int last_speed_was_sir;
966 IRDA_DEBUG(0, "%s() changing speed to: %d\n", __FUNCTION__, speed);
968 IRDA_ASSERT(self != NULL, return;);
971 last_speed_was_sir = self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED;
976 self->io.speed = speed;
977 last_speed_was_sir = 0;
978 smsc_ircc_fir_start(self);
981 if (self->io.speed == 0)
982 smsc_ircc_sir_start(self);
985 if (!last_speed_was_sir) speed = self->io.speed;
988 if (self->io.speed != speed)
989 smsc_ircc_set_transceiver_for_speed(self, speed);
991 self->io.speed = speed;
993 if (speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
994 if (!last_speed_was_sir) {
995 smsc_ircc_fir_stop(self);
996 smsc_ircc_sir_start(self);
998 smsc_ircc_set_sir_speed(self, speed);
1000 if (last_speed_was_sir) {
1001 #if SMSC_IRCC2_C_SIR_STOP
1002 smsc_ircc_sir_stop(self);
1004 smsc_ircc_fir_start(self);
1006 smsc_ircc_set_fir_speed(self, speed);
1009 self->tx_buff.len = 10;
1010 self->tx_buff.data = self->tx_buff.head;
1012 smsc_ircc_dma_xmit(self, 4000);
1014 /* Be ready for incoming frames */
1015 smsc_ircc_dma_receive(self);
1018 netif_wake_queue(dev);
1022 * Function smsc_ircc_set_sir_speed (self, speed)
1024 * Set speed of IrDA port to specified baudrate
1027 void smsc_ircc_set_sir_speed(struct smsc_ircc_cb *self, __u32 speed)
1030 int fcr; /* FIFO control reg */
1031 int lcr; /* Line control reg */
1034 IRDA_DEBUG(0, "%s(), Setting speed to: %d\n", __FUNCTION__, speed);
1036 IRDA_ASSERT(self != NULL, return;);
1037 iobase = self->io.sir_base;
1039 /* Update accounting for new speed */
1040 self->io.speed = speed;
1042 /* Turn off interrupts */
1043 outb(0, iobase + UART_IER);
1045 divisor = SMSC_IRCC2_MAX_SIR_SPEED / speed;
1047 fcr = UART_FCR_ENABLE_FIFO;
1050 * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and
1051 * almost 1,7 ms at 19200 bps. At speeds above that we can just forget
1052 * about this timeout since it will always be fast enough.
1054 fcr |= self->io.speed < 38400 ?
1055 UART_FCR_TRIGGER_1 : UART_FCR_TRIGGER_14;
1057 /* IrDA ports use 8N1 */
1058 lcr = UART_LCR_WLEN8;
1060 outb(UART_LCR_DLAB | lcr, iobase + UART_LCR); /* Set DLAB */
1061 outb(divisor & 0xff, iobase + UART_DLL); /* Set speed */
1062 outb(divisor >> 8, iobase + UART_DLM);
1063 outb(lcr, iobase + UART_LCR); /* Set 8N1 */
1064 outb(fcr, iobase + UART_FCR); /* Enable FIFO's */
1066 /* Turn on interrups */
1067 outb(UART_IER_RLSI | UART_IER_RDI | UART_IER_THRI, iobase + UART_IER);
1069 IRDA_DEBUG(2, "%s() speed changed to: %d\n", __FUNCTION__, speed);
1074 * Function smsc_ircc_hard_xmit_fir (skb, dev)
1076 * Transmit the frame!
1079 static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1081 struct smsc_ircc_cb *self;
1082 unsigned long flags;
1086 IRDA_ASSERT(dev != NULL, return 0;);
1087 self = netdev_priv(dev);
1088 IRDA_ASSERT(self != NULL, return 0;);
1090 netif_stop_queue(dev);
1092 /* Make sure test of self->io.speed & speed change are atomic */
1093 spin_lock_irqsave(&self->lock, flags);
1095 /* Check if we need to change the speed after this frame */
1096 speed = irda_get_next_speed(skb);
1097 if (speed != self->io.speed && speed != -1) {
1098 /* Check for empty frame */
1100 /* Note : you should make sure that speed changes
1101 * are not going to corrupt any outgoing frame.
1102 * Look at nsc-ircc for the gory details - Jean II */
1103 smsc_ircc_change_speed(self, speed);
1104 spin_unlock_irqrestore(&self->lock, flags);
1109 self->new_speed = speed;
1112 memcpy(self->tx_buff.head, skb->data, skb->len);
1114 self->tx_buff.len = skb->len;
1115 self->tx_buff.data = self->tx_buff.head;
1117 mtt = irda_get_mtt(skb);
1122 * Compute how many BOFs (STA or PA's) we need to waste the
1123 * min turn time given the speed of the link.
1125 bofs = mtt * (self->io.speed / 1000) / 8000;
1129 smsc_ircc_dma_xmit(self, bofs);
1131 /* Transmit frame */
1132 smsc_ircc_dma_xmit(self, 0);
1135 spin_unlock_irqrestore(&self->lock, flags);
1142 * Function smsc_ircc_dma_xmit (self, bofs)
1144 * Transmit data using DMA
1147 static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int bofs)
1149 int iobase = self->io.fir_base;
1152 IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1155 register_bank(iobase, 0);
1156 outb(0x00, iobase + IRCC_LCR_B);
1158 register_bank(iobase, 1);
1159 outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1160 iobase + IRCC_SCE_CFGB);
1162 self->io.direction = IO_XMIT;
1164 /* Set BOF additional count for generating the min turn time */
1165 register_bank(iobase, 4);
1166 outb(bofs & 0xff, iobase + IRCC_BOF_COUNT_LO);
1167 ctrl = inb(iobase + IRCC_CONTROL) & 0xf0;
1168 outb(ctrl | ((bofs >> 8) & 0x0f), iobase + IRCC_BOF_COUNT_HI);
1170 /* Set max Tx frame size */
1171 outb(self->tx_buff.len >> 8, iobase + IRCC_TX_SIZE_HI);
1172 outb(self->tx_buff.len & 0xff, iobase + IRCC_TX_SIZE_LO);
1174 /*outb(UART_MCR_OUT2, self->io.sir_base + UART_MCR);*/
1176 /* Enable burst mode chip Tx DMA */
1177 register_bank(iobase, 1);
1178 outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
1179 IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB);
1181 /* Setup DMA controller (must be done after enabling chip DMA) */
1182 irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
1185 /* Enable interrupt */
1187 register_bank(iobase, 0);
1188 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1189 outb(IRCC_MASTER_INT_EN, iobase + IRCC_MASTER);
1191 /* Enable transmit */
1192 outb(IRCC_LCR_B_SCE_TRANSMIT | IRCC_LCR_B_SIP_ENABLE, iobase + IRCC_LCR_B);
1196 * Function smsc_ircc_dma_xmit_complete (self)
1198 * The transfer of a frame in finished. This function will only be called
1199 * by the interrupt handler
1202 static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self)
1204 int iobase = self->io.fir_base;
1206 IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1209 register_bank(iobase, 0);
1210 outb(0x00, iobase + IRCC_LCR_B);
1212 register_bank(iobase, 1);
1213 outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1214 iobase + IRCC_SCE_CFGB);
1216 /* Check for underrun! */
1217 register_bank(iobase, 0);
1218 if (inb(iobase + IRCC_LSR) & IRCC_LSR_UNDERRUN) {
1219 self->stats.tx_errors++;
1220 self->stats.tx_fifo_errors++;
1222 /* Reset error condition */
1223 register_bank(iobase, 0);
1224 outb(IRCC_MASTER_ERROR_RESET, iobase + IRCC_MASTER);
1225 outb(0x00, iobase + IRCC_MASTER);
1227 self->stats.tx_packets++;
1228 self->stats.tx_bytes += self->tx_buff.len;
1231 /* Check if it's time to change the speed */
1232 if (self->new_speed) {
1233 smsc_ircc_change_speed(self, self->new_speed);
1234 self->new_speed = 0;
1237 netif_wake_queue(self->netdev);
1241 * Function smsc_ircc_dma_receive(self)
1243 * Get ready for receiving a frame. The device will initiate a DMA
1244 * if it starts to receive a frame.
1247 static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self)
1249 int iobase = self->io.fir_base;
1251 /* Turn off chip DMA */
1252 register_bank(iobase, 1);
1253 outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1254 iobase + IRCC_SCE_CFGB);
1258 register_bank(iobase, 0);
1259 outb(0x00, iobase + IRCC_LCR_B);
1261 /* Turn off chip DMA */
1262 register_bank(iobase, 1);
1263 outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1264 iobase + IRCC_SCE_CFGB);
1266 self->io.direction = IO_RECV;
1267 self->rx_buff.data = self->rx_buff.head;
1269 /* Set max Rx frame size */
1270 register_bank(iobase, 4);
1271 outb((2050 >> 8) & 0x0f, iobase + IRCC_RX_SIZE_HI);
1272 outb(2050 & 0xff, iobase + IRCC_RX_SIZE_LO);
1274 /* Setup DMA controller */
1275 irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1278 /* Enable burst mode chip Rx DMA */
1279 register_bank(iobase, 1);
1280 outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
1281 IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB);
1283 /* Enable interrupt */
1284 register_bank(iobase, 0);
1285 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1286 outb(IRCC_MASTER_INT_EN, iobase + IRCC_MASTER);
1288 /* Enable receiver */
1289 register_bank(iobase, 0);
1290 outb(IRCC_LCR_B_SCE_RECEIVE | IRCC_LCR_B_SIP_ENABLE,
1291 iobase + IRCC_LCR_B);
1297 * Function smsc_ircc_dma_receive_complete(self)
1299 * Finished with receiving frames
1302 static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self)
1304 struct sk_buff *skb;
1305 int len, msgcnt, lsr;
1306 int iobase = self->io.fir_base;
1308 register_bank(iobase, 0);
1310 IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1313 register_bank(iobase, 0);
1314 outb(0x00, iobase + IRCC_LCR_B);
1316 register_bank(iobase, 0);
1317 outb(inb(iobase + IRCC_LSAR) & ~IRCC_LSAR_ADDRESS_MASK, iobase + IRCC_LSAR);
1318 lsr= inb(iobase + IRCC_LSR);
1319 msgcnt = inb(iobase + IRCC_LCR_B) & 0x08;
1321 IRDA_DEBUG(2, "%s: dma count = %d\n", __FUNCTION__,
1322 get_dma_residue(self->io.dma));
1324 len = self->rx_buff.truesize - get_dma_residue(self->io.dma);
1326 /* Look for errors */
1327 if (lsr & (IRCC_LSR_FRAME_ERROR | IRCC_LSR_CRC_ERROR | IRCC_LSR_SIZE_ERROR)) {
1328 self->stats.rx_errors++;
1329 if (lsr & IRCC_LSR_FRAME_ERROR)
1330 self->stats.rx_frame_errors++;
1331 if (lsr & IRCC_LSR_CRC_ERROR)
1332 self->stats.rx_crc_errors++;
1333 if (lsr & IRCC_LSR_SIZE_ERROR)
1334 self->stats.rx_length_errors++;
1335 if (lsr & (IRCC_LSR_UNDERRUN | IRCC_LSR_OVERRUN))
1336 self->stats.rx_length_errors++;
1341 len -= self->io.speed < 4000000 ? 2 : 4;
1343 if (len < 2 || len > 2050) {
1344 IRDA_WARNING("%s(), bogus len=%d\n", __FUNCTION__, len);
1347 IRDA_DEBUG(2, "%s: msgcnt = %d, len=%d\n", __FUNCTION__, msgcnt, len);
1349 skb = dev_alloc_skb(len + 1);
1351 IRDA_WARNING("%s(), memory squeeze, dropping frame.\n",
1355 /* Make sure IP header gets aligned */
1356 skb_reserve(skb, 1);
1358 memcpy(skb_put(skb, len), self->rx_buff.data, len);
1359 self->stats.rx_packets++;
1360 self->stats.rx_bytes += len;
1362 skb->dev = self->netdev;
1363 skb->mac.raw = skb->data;
1364 skb->protocol = htons(ETH_P_IRDA);
1369 * Function smsc_ircc_sir_receive (self)
1371 * Receive one frame from the infrared port
1374 static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self)
1379 IRDA_ASSERT(self != NULL, return;);
1381 iobase = self->io.sir_base;
1384 * Receive all characters in Rx FIFO, unwrap and unstuff them.
1385 * async_unwrap_char will deliver all found frames
1388 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1389 inb(iobase + UART_RX));
1391 /* Make sure we don't stay here to long */
1392 if (boguscount++ > 32) {
1393 IRDA_DEBUG(2, "%s(), breaking!\n", __FUNCTION__);
1396 } while (inb(iobase + UART_LSR) & UART_LSR_DR);
1401 * Function smsc_ircc_interrupt (irq, dev_id, regs)
1403 * An interrupt from the chip has arrived. Time to do some work
1406 static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1408 struct net_device *dev = (struct net_device *) dev_id;
1409 struct smsc_ircc_cb *self;
1410 int iobase, iir, lcra, lsr;
1411 irqreturn_t ret = IRQ_NONE;
1414 printk(KERN_WARNING "%s: irq %d for unknown device.\n",
1419 self = netdev_priv(dev);
1420 IRDA_ASSERT(self != NULL, return IRQ_NONE;);
1422 /* Serialise the interrupt handler in various CPUs, stop Tx path */
1423 spin_lock(&self->lock);
1425 /* Check if we should use the SIR interrupt handler */
1426 if (self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
1427 ret = smsc_ircc_interrupt_sir(dev);
1428 goto irq_ret_unlock;
1431 iobase = self->io.fir_base;
1433 register_bank(iobase, 0);
1434 iir = inb(iobase + IRCC_IIR);
1436 goto irq_ret_unlock;
1439 /* Disable interrupts */
1440 outb(0, iobase + IRCC_IER);
1441 lcra = inb(iobase + IRCC_LCR_A);
1442 lsr = inb(iobase + IRCC_LSR);
1444 IRDA_DEBUG(2, "%s(), iir = 0x%02x\n", __FUNCTION__, iir);
1446 if (iir & IRCC_IIR_EOM) {
1447 if (self->io.direction == IO_RECV)
1448 smsc_ircc_dma_receive_complete(self);
1450 smsc_ircc_dma_xmit_complete(self);
1452 smsc_ircc_dma_receive(self);
1455 if (iir & IRCC_IIR_ACTIVE_FRAME) {
1456 /*printk(KERN_WARNING "%s(): Active Frame\n", __FUNCTION__);*/
1459 /* Enable interrupts again */
1461 register_bank(iobase, 0);
1462 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1465 spin_unlock(&self->lock);
1471 * Function irport_interrupt_sir (irq, dev_id, regs)
1473 * Interrupt handler for SIR modes
1475 static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev)
1477 struct smsc_ircc_cb *self = netdev_priv(dev);
1482 /* Already locked comming here in smsc_ircc_interrupt() */
1483 /*spin_lock(&self->lock);*/
1485 iobase = self->io.sir_base;
1487 iir = inb(iobase + UART_IIR) & UART_IIR_ID;
1491 /* Clear interrupt */
1492 lsr = inb(iobase + UART_LSR);
1494 IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n",
1495 __FUNCTION__, iir, lsr, iobase);
1499 IRDA_DEBUG(2, "%s(), RLSI\n", __FUNCTION__);
1502 /* Receive interrupt */
1503 smsc_ircc_sir_receive(self);
1506 if (lsr & UART_LSR_THRE)
1507 /* Transmitter ready for data */
1508 smsc_ircc_sir_write_wakeup(self);
1511 IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n",
1516 /* Make sure we don't stay here to long */
1517 if (boguscount++ > 100)
1520 iir = inb(iobase + UART_IIR) & UART_IIR_ID;
1522 /*spin_unlock(&self->lock);*/
1529 * Function ircc_is_receiving (self)
1531 * Return TRUE is we are currently receiving a frame
1534 static int ircc_is_receiving(struct smsc_ircc_cb *self)
1539 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1541 IRDA_ASSERT(self != NULL, return FALSE;);
1543 IRDA_DEBUG(0, "%s: dma count = %d\n", __FUNCTION__,
1544 get_dma_residue(self->io.dma));
1546 status = (self->rx_buff.state != OUTSIDE_FRAME);
1552 static int smsc_ircc_request_irq(struct smsc_ircc_cb *self)
1556 error = request_irq(self->io.irq, smsc_ircc_interrupt, 0,
1557 self->netdev->name, self->netdev);
1559 IRDA_DEBUG(0, "%s(), unable to allocate irq=%d, err=%d\n",
1560 __FUNCTION__, self->io.irq, error);
1565 static void smsc_ircc_start_interrupts(struct smsc_ircc_cb *self)
1567 unsigned long flags;
1569 spin_lock_irqsave(&self->lock, flags);
1572 smsc_ircc_change_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
1574 spin_unlock_irqrestore(&self->lock, flags);
1577 static void smsc_ircc_stop_interrupts(struct smsc_ircc_cb *self)
1579 int iobase = self->io.fir_base;
1580 unsigned long flags;
1582 spin_lock_irqsave(&self->lock, flags);
1584 register_bank(iobase, 0);
1585 outb(0, iobase + IRCC_IER);
1586 outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER);
1587 outb(0x00, iobase + IRCC_MASTER);
1589 spin_unlock_irqrestore(&self->lock, flags);
1594 * Function smsc_ircc_net_open (dev)
1599 static int smsc_ircc_net_open(struct net_device *dev)
1601 struct smsc_ircc_cb *self;
1604 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1606 IRDA_ASSERT(dev != NULL, return -1;);
1607 self = netdev_priv(dev);
1608 IRDA_ASSERT(self != NULL, return 0;);
1610 if (self->io.suspended) {
1611 IRDA_DEBUG(0, "%s(), device is suspended\n", __FUNCTION__);
1615 if (request_irq(self->io.irq, smsc_ircc_interrupt, 0, dev->name,
1617 IRDA_DEBUG(0, "%s(), unable to allocate irq=%d\n",
1618 __FUNCTION__, self->io.irq);
1622 smsc_ircc_start_interrupts(self);
1624 /* Give self a hardware name */
1625 /* It would be cool to offer the chip revision here - Jean II */
1626 sprintf(hwname, "SMSC @ 0x%03x", self->io.fir_base);
1629 * Open new IrLAP layer instance, now that everything should be
1630 * initialized properly
1632 self->irlap = irlap_open(dev, &self->qos, hwname);
1635 * Always allocate the DMA channel after the IRQ,
1636 * and clean up on failure.
1638 if (request_dma(self->io.dma, dev->name)) {
1639 smsc_ircc_net_close(dev);
1641 IRDA_WARNING("%s(), unable to allocate DMA=%d\n",
1642 __FUNCTION__, self->io.dma);
1646 netif_start_queue(dev);
1652 * Function smsc_ircc_net_close (dev)
1657 static int smsc_ircc_net_close(struct net_device *dev)
1659 struct smsc_ircc_cb *self;
1661 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1663 IRDA_ASSERT(dev != NULL, return -1;);
1664 self = netdev_priv(dev);
1665 IRDA_ASSERT(self != NULL, return 0;);
1668 netif_stop_queue(dev);
1670 /* Stop and remove instance of IrLAP */
1672 irlap_close(self->irlap);
1675 smsc_ircc_stop_interrupts(self);
1677 /* if we are called from smsc_ircc_resume we don't have IRQ reserved */
1678 if (!self->io.suspended)
1679 free_irq(self->io.irq, dev);
1681 disable_dma(self->io.dma);
1682 free_dma(self->io.dma);
1687 static int smsc_ircc_suspend(struct device *dev, pm_message_t state)
1689 struct smsc_ircc_cb *self = dev_get_drvdata(dev);
1691 if (!self->io.suspended) {
1692 IRDA_DEBUG(1, "%s, Suspending\n", driver_name);
1695 if (netif_running(self->netdev)) {
1696 netif_device_detach(self->netdev);
1697 smsc_ircc_stop_interrupts(self);
1698 free_irq(self->io.irq, self->netdev);
1699 disable_dma(self->io.dma);
1701 self->io.suspended = 1;
1708 static int smsc_ircc_resume(struct device *dev)
1710 struct smsc_ircc_cb *self = dev_get_drvdata(dev);
1712 if (self->io.suspended) {
1713 IRDA_DEBUG(1, "%s, Waking up\n", driver_name);
1716 smsc_ircc_init_chip(self);
1717 if (netif_running(self->netdev)) {
1718 if (smsc_ircc_request_irq(self)) {
1720 * Don't fail resume process, just kill this
1723 unregister_netdevice(self->netdev);
1725 enable_dma(self->io.dma);
1726 smsc_ircc_start_interrupts(self);
1727 netif_device_attach(self->netdev);
1730 self->io.suspended = 0;
1737 * Function smsc_ircc_close (self)
1739 * Close driver instance
1742 static int __exit smsc_ircc_close(struct smsc_ircc_cb *self)
1744 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1746 IRDA_ASSERT(self != NULL, return -1;);
1748 platform_device_unregister(self->pldev);
1750 /* Remove netdevice */
1751 unregister_netdev(self->netdev);
1753 smsc_ircc_stop_interrupts(self);
1755 /* Release the PORTS that this driver is using */
1756 IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __FUNCTION__,
1759 release_region(self->io.fir_base, self->io.fir_ext);
1761 IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __FUNCTION__,
1764 release_region(self->io.sir_base, self->io.sir_ext);
1766 if (self->tx_buff.head)
1767 dma_free_coherent(NULL, self->tx_buff.truesize,
1768 self->tx_buff.head, self->tx_buff_dma);
1770 if (self->rx_buff.head)
1771 dma_free_coherent(NULL, self->rx_buff.truesize,
1772 self->rx_buff.head, self->rx_buff_dma);
1774 free_netdev(self->netdev);
1779 static void __exit smsc_ircc_cleanup(void)
1783 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1785 for (i = 0; i < 2; i++) {
1787 smsc_ircc_close(dev_self[i]);
1790 driver_unregister(&smsc_ircc_driver);
1794 * Start SIR operations
1796 * This function *must* be called with spinlock held, because it may
1797 * be called from the irq handler (via smsc_ircc_change_speed()). - Jean II
1799 void smsc_ircc_sir_start(struct smsc_ircc_cb *self)
1801 struct net_device *dev;
1802 int fir_base, sir_base;
1804 IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1806 IRDA_ASSERT(self != NULL, return;);
1808 IRDA_ASSERT(dev != NULL, return;);
1809 dev->hard_start_xmit = &smsc_ircc_hard_xmit_sir;
1811 fir_base = self->io.fir_base;
1812 sir_base = self->io.sir_base;
1814 /* Reset everything */
1815 outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);
1817 #if SMSC_IRCC2_C_SIR_STOP
1818 /*smsc_ircc_sir_stop(self);*/
1821 register_bank(fir_base, 1);
1822 outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | IRCC_CFGA_IRDA_SIR_A), fir_base + IRCC_SCE_CFGA);
1824 /* Initialize UART */
1825 outb(UART_LCR_WLEN8, sir_base + UART_LCR); /* Reset DLAB */
1826 outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), sir_base + UART_MCR);
1828 /* Turn on interrups */
1829 outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, sir_base + UART_IER);
1831 IRDA_DEBUG(3, "%s() - exit\n", __FUNCTION__);
1833 outb(0x00, fir_base + IRCC_MASTER);
1836 #if SMSC_IRCC2_C_SIR_STOP
1837 void smsc_ircc_sir_stop(struct smsc_ircc_cb *self)
1841 IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1842 iobase = self->io.sir_base;
1845 outb(0, iobase + UART_MCR);
1847 /* Turn off interrupts */
1848 outb(0, iobase + UART_IER);
1853 * Function smsc_sir_write_wakeup (self)
1855 * Called by the SIR interrupt handler when there's room for more data.
1856 * If we have more packets to send, we send them here.
1859 static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self)
1865 IRDA_ASSERT(self != NULL, return;);
1867 IRDA_DEBUG(4, "%s\n", __FUNCTION__);
1869 iobase = self->io.sir_base;
1871 /* Finished with frame? */
1872 if (self->tx_buff.len > 0) {
1873 /* Write data left in transmit buffer */
1874 actual = smsc_ircc_sir_write(iobase, self->io.fifo_size,
1875 self->tx_buff.data, self->tx_buff.len);
1876 self->tx_buff.data += actual;
1877 self->tx_buff.len -= actual;
1880 /*if (self->tx_buff.len ==0) {*/
1883 * Now serial buffer is almost free & we can start
1884 * transmission of another packet. But first we must check
1885 * if we need to change the speed of the hardware
1887 if (self->new_speed) {
1888 IRDA_DEBUG(5, "%s(), Changing speed to %d.\n",
1889 __FUNCTION__, self->new_speed);
1890 smsc_ircc_sir_wait_hw_transmitter_finish(self);
1891 smsc_ircc_change_speed(self, self->new_speed);
1892 self->new_speed = 0;
1894 /* Tell network layer that we want more frames */
1895 netif_wake_queue(self->netdev);
1897 self->stats.tx_packets++;
1899 if (self->io.speed <= 115200) {
1901 * Reset Rx FIFO to make sure that all reflected transmit data
1902 * is discarded. This is needed for half duplex operation
1904 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR;
1905 fcr |= self->io.speed < 38400 ?
1906 UART_FCR_TRIGGER_1 : UART_FCR_TRIGGER_14;
1908 outb(fcr, iobase + UART_FCR);
1910 /* Turn on receive interrupts */
1911 outb(UART_IER_RDI, iobase + UART_IER);
1917 * Function smsc_ircc_sir_write (iobase, fifo_size, buf, len)
1919 * Fill Tx FIFO with transmit data
1922 static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len)
1926 /* Tx FIFO should be empty! */
1927 if (!(inb(iobase + UART_LSR) & UART_LSR_THRE)) {
1928 IRDA_WARNING("%s(), failed, fifo not empty!\n", __FUNCTION__);
1932 /* Fill FIFO with current frame */
1933 while (fifo_size-- > 0 && actual < len) {
1934 /* Transmit next byte */
1935 outb(buf[actual], iobase + UART_TX);
1942 * Function smsc_ircc_is_receiving (self)
1944 * Returns true is we are currently receiving data
1947 static int smsc_ircc_is_receiving(struct smsc_ircc_cb *self)
1949 return (self->rx_buff.state != OUTSIDE_FRAME);
1954 * Function smsc_ircc_probe_transceiver(self)
1956 * Tries to find the used Transceiver
1959 static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self)
1963 IRDA_ASSERT(self != NULL, return;);
1965 for (i = 0; smsc_transceivers[i].name != NULL; i++)
1966 if (smsc_transceivers[i].probe(self->io.fir_base)) {
1967 IRDA_MESSAGE(" %s transceiver found\n",
1968 smsc_transceivers[i].name);
1969 self->transceiver= i + 1;
1973 IRDA_MESSAGE("No transceiver found. Defaulting to %s\n",
1974 smsc_transceivers[SMSC_IRCC2_C_DEFAULT_TRANSCEIVER].name);
1976 self->transceiver = SMSC_IRCC2_C_DEFAULT_TRANSCEIVER;
1981 * Function smsc_ircc_set_transceiver_for_speed(self, speed)
1983 * Set the transceiver according to the speed
1986 static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed)
1990 trx = self->transceiver;
1992 smsc_transceivers[trx - 1].set_for_speed(self->io.fir_base, speed);
1996 * Function smsc_ircc_wait_hw_transmitter_finish ()
1998 * Wait for the real end of HW transmission
2000 * The UART is a strict FIFO, and we get called only when we have finished
2001 * pushing data to the FIFO, so the maximum amount of time we must wait
2002 * is only for the FIFO to drain out.
2004 * We use a simple calibrated loop. We may need to adjust the loop
2005 * delay (udelay) to balance I/O traffic and latency. And we also need to
2006 * adjust the maximum timeout.
2007 * It would probably be better to wait for the proper interrupt,
2008 * but it doesn't seem to be available.
2010 * We can't use jiffies or kernel timers because :
2011 * 1) We are called from the interrupt handler, which disable softirqs,
2012 * so jiffies won't be increased
2013 * 2) Jiffies granularity is usually very coarse (10ms), and we don't
2014 * want to wait that long to detect stuck hardware.
2018 static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self)
2020 int iobase = self->io.sir_base;
2021 int count = SMSC_IRCC2_HW_TRANSMITTER_TIMEOUT_US;
2023 /* Calibrated busy loop */
2024 while (count-- > 0 && !(inb(iobase + UART_LSR) & UART_LSR_TEMT))
2028 IRDA_DEBUG(0, "%s(): stuck transmitter\n", __FUNCTION__);
2037 static int __init smsc_ircc_look_for_chips(void)
2039 struct smsc_chip_address *address;
2041 unsigned int cfg_base, found;
2044 address = possible_addresses;
2046 while (address->cfg_base) {
2047 cfg_base = address->cfg_base;
2049 /*printk(KERN_WARNING "%s(): probing: 0x%02x for: 0x%02x\n", __FUNCTION__, cfg_base, address->type);*/
2051 if (address->type & SMSCSIO_TYPE_FDC) {
2053 if (address->type & SMSCSIO_TYPE_FLAT)
2054 if (!smsc_superio_flat(fdc_chips_flat, cfg_base, type))
2057 if (address->type & SMSCSIO_TYPE_PAGED)
2058 if (!smsc_superio_paged(fdc_chips_paged, cfg_base, type))
2061 if (address->type & SMSCSIO_TYPE_LPC) {
2063 if (address->type & SMSCSIO_TYPE_FLAT)
2064 if (!smsc_superio_flat(lpc_chips_flat, cfg_base, type))
2067 if (address->type & SMSCSIO_TYPE_PAGED)
2068 if (!smsc_superio_paged(lpc_chips_paged, cfg_base, type))
2077 * Function smsc_superio_flat (chip, base, type)
2079 * Try to get configuration of a smc SuperIO chip with flat register model
2082 static int __init smsc_superio_flat(const struct smsc_chip *chips, unsigned short cfgbase, char *type)
2084 unsigned short firbase, sirbase;
2088 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2090 if (smsc_ircc_probe(cfgbase, SMSCSIOFLAT_DEVICEID_REG, chips, type) == NULL)
2093 outb(SMSCSIOFLAT_UARTMODE0C_REG, cfgbase);
2094 mode = inb(cfgbase + 1);
2096 /*printk(KERN_WARNING "%s(): mode: 0x%02x\n", __FUNCTION__, mode);*/
2098 if (!(mode & SMSCSIOFLAT_UART2MODE_VAL_IRDA))
2099 IRDA_WARNING("%s(): IrDA not enabled\n", __FUNCTION__);
2101 outb(SMSCSIOFLAT_UART2BASEADDR_REG, cfgbase);
2102 sirbase = inb(cfgbase + 1) << 2;
2105 outb(SMSCSIOFLAT_FIRBASEADDR_REG, cfgbase);
2106 firbase = inb(cfgbase + 1) << 3;
2109 outb(SMSCSIOFLAT_FIRDMASELECT_REG, cfgbase);
2110 dma = inb(cfgbase + 1) & SMSCSIOFLAT_FIRDMASELECT_MASK;
2113 outb(SMSCSIOFLAT_UARTIRQSELECT_REG, cfgbase);
2114 irq = inb(cfgbase + 1) & SMSCSIOFLAT_UART2IRQSELECT_MASK;
2116 IRDA_MESSAGE("%s(): fir: 0x%02x, sir: 0x%02x, dma: %02d, irq: %d, mode: 0x%02x\n", __FUNCTION__, firbase, sirbase, dma, irq, mode);
2118 if (firbase && smsc_ircc_open(firbase, sirbase, dma, irq) == 0)
2121 /* Exit configuration */
2122 outb(SMSCSIO_CFGEXITKEY, cfgbase);
2128 * Function smsc_superio_paged (chip, base, type)
2130 * Try to get configuration of a smc SuperIO chip with paged register model
2133 static int __init smsc_superio_paged(const struct smsc_chip *chips, unsigned short cfg_base, char *type)
2135 unsigned short fir_io, sir_io;
2138 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2140 if (smsc_ircc_probe(cfg_base, 0x20, chips, type) == NULL)
2143 /* Select logical device (UART2) */
2144 outb(0x07, cfg_base);
2145 outb(0x05, cfg_base + 1);
2148 outb(0x60, cfg_base);
2149 sir_io = inb(cfg_base + 1) << 8;
2150 outb(0x61, cfg_base);
2151 sir_io |= inb(cfg_base + 1);
2154 outb(0x62, cfg_base);
2155 fir_io = inb(cfg_base + 1) << 8;
2156 outb(0x63, cfg_base);
2157 fir_io |= inb(cfg_base + 1);
2158 outb(0x2b, cfg_base); /* ??? */
2160 if (fir_io && smsc_ircc_open(fir_io, sir_io, ircc_dma, ircc_irq) == 0)
2163 /* Exit configuration */
2164 outb(SMSCSIO_CFGEXITKEY, cfg_base);
2170 static int __init smsc_access(unsigned short cfg_base, unsigned char reg)
2172 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2174 outb(reg, cfg_base);
2175 return inb(cfg_base) != reg ? -1 : 0;
2178 static const struct smsc_chip * __init smsc_ircc_probe(unsigned short cfg_base, u8 reg, const struct smsc_chip *chip, char *type)
2180 u8 devid, xdevid, rev;
2182 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2184 /* Leave configuration */
2186 outb(SMSCSIO_CFGEXITKEY, cfg_base);
2188 if (inb(cfg_base) == SMSCSIO_CFGEXITKEY) /* not a smc superio chip */
2191 outb(reg, cfg_base);
2193 xdevid = inb(cfg_base + 1);
2195 /* Enter configuration */
2197 outb(SMSCSIO_CFGACCESSKEY, cfg_base);
2200 if (smsc_access(cfg_base,0x55)) /* send second key and check */
2204 /* probe device ID */
2206 if (smsc_access(cfg_base, reg))
2209 devid = inb(cfg_base + 1);
2211 if (devid == 0 || devid == 0xff) /* typical values for unused port */
2214 /* probe revision ID */
2216 if (smsc_access(cfg_base, reg + 1))
2219 rev = inb(cfg_base + 1);
2221 if (rev >= 128) /* i think this will make no sense */
2224 if (devid == xdevid) /* protection against false positives */
2227 /* Check for expected device ID; are there others? */
2229 while (chip->devid != devid) {
2233 if (chip->name == NULL)
2237 IRDA_MESSAGE("found SMC SuperIO Chip (devid=0x%02x rev=%02X base=0x%04x): %s%s\n",
2238 devid, rev, cfg_base, type, chip->name);
2240 if (chip->rev > rev) {
2241 IRDA_MESSAGE("Revision higher than expected\n");
2245 if (chip->flags & NoIRDA)
2246 IRDA_MESSAGE("chipset does not support IRDA\n");
2251 static int __init smsc_superio_fdc(unsigned short cfg_base)
2255 if (!request_region(cfg_base, 2, driver_name)) {
2256 IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n",
2257 __FUNCTION__, cfg_base);
2259 if (!smsc_superio_flat(fdc_chips_flat, cfg_base, "FDC") ||
2260 !smsc_superio_paged(fdc_chips_paged, cfg_base, "FDC"))
2263 release_region(cfg_base, 2);
2269 static int __init smsc_superio_lpc(unsigned short cfg_base)
2273 if (!request_region(cfg_base, 2, driver_name)) {
2274 IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n",
2275 __FUNCTION__, cfg_base);
2277 if (!smsc_superio_flat(lpc_chips_flat, cfg_base, "LPC") ||
2278 !smsc_superio_paged(lpc_chips_paged, cfg_base, "LPC"))
2281 release_region(cfg_base, 2);
2286 /************************************************
2288 * Transceivers specific functions
2290 ************************************************/
2294 * Function smsc_ircc_set_transceiver_smsc_ircc_atc(fir_base, speed)
2296 * Program transceiver through smsc-ircc ATC circuitry
2300 static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed)
2302 unsigned long jiffies_now, jiffies_timeout;
2305 jiffies_now = jiffies;
2306 jiffies_timeout = jiffies + SMSC_IRCC2_ATC_PROGRAMMING_TIMEOUT_JIFFIES;
2309 register_bank(fir_base, 4);
2310 outb((inb(fir_base + IRCC_ATC) & IRCC_ATC_MASK) | IRCC_ATC_nPROGREADY|IRCC_ATC_ENABLE,
2311 fir_base + IRCC_ATC);
2313 while ((val = (inb(fir_base + IRCC_ATC) & IRCC_ATC_nPROGREADY)) &&
2314 !time_after(jiffies, jiffies_timeout))
2318 IRDA_WARNING("%s(): ATC: 0x%02x\n", __FUNCTION__,
2319 inb(fir_base + IRCC_ATC));
2323 * Function smsc_ircc_probe_transceiver_smsc_ircc_atc(fir_base)
2325 * Probe transceiver smsc-ircc ATC circuitry
2329 static int smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base)
2335 * Function smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(self, speed)
2341 static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed)
2352 fast_mode = IRCC_LCR_A_FAST;
2355 register_bank(fir_base, 0);
2356 outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2360 * Function smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(fir_base)
2366 static int smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base)
2372 * Function smsc_ircc_set_transceiver_toshiba_sat1800(fir_base, speed)
2378 static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed)
2389 fast_mode = /*IRCC_LCR_A_FAST |*/ IRCC_LCR_A_GP_DATA;
2393 /* This causes an interrupt */
2394 register_bank(fir_base, 0);
2395 outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2399 * Function smsc_ircc_probe_transceiver_toshiba_sat1800(fir_base)
2405 static int smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base)
2411 module_init(smsc_ircc_init);
2412 module_exit(smsc_ircc_cleanup);