err.no Git - linux-2.6/blob - drivers/net/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/module.h>
  29 #include <linux/types.h>
  30 #include <linux/init.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/pagemap.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/ipv6.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/mii.h>
  38 #include <linux/ethtool.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/pci.h>
  41 #include <linux/delay.h>
  42 #include <linux/interrupt.h>
  43 #include <linux/if_ether.h>
  44 #ifdef CONFIG_DCA
  45 #include <linux/dca.h>
  46 #endif
  47 #include "igb.h"
  48
  49 #define DRV_VERSION "1.2.45-k2"
  50 char igb_driver_name[] = "igb";
  51 char igb_driver_version[] = DRV_VERSION;
  52 static const char igb_driver_string[] =
  53                                 "Intel(R) Gigabit Ethernet Network Driver";
  54 static const char igb_copyright[] = "Copyright (c) 2008 Intel Corporation.";
  55
  56 static const struct e1000_info *igb_info_tbl[] = {
  57         [board_82575] = &e1000_82575_info,
  58 };
  59
  60 static struct pci_device_id igb_pci_tbl[] = {
  61         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
  62         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
  63         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
  64         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
  65         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
  66         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
  67         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
  68         /* required last entry */
  69         {0, }
  70 };
  71
  72 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
  73
  74 void igb_reset(struct igb_adapter *);
  75 static int igb_setup_all_tx_resources(struct igb_adapter *);
  76 static int igb_setup_all_rx_resources(struct igb_adapter *);
  77 static void igb_free_all_tx_resources(struct igb_adapter *);
  78 static void igb_free_all_rx_resources(struct igb_adapter *);
  79 static void igb_free_tx_resources(struct igb_ring *);
  80 static void igb_free_rx_resources(struct igb_ring *);
  81 void igb_update_stats(struct igb_adapter *);
  82 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
  83 static void __devexit igb_remove(struct pci_dev *pdev);
  84 static int igb_sw_init(struct igb_adapter *);
  85 static int igb_open(struct net_device *);
  86 static int igb_close(struct net_device *);
  87 static void igb_configure_tx(struct igb_adapter *);
  88 static void igb_configure_rx(struct igb_adapter *);
  89 static void igb_setup_rctl(struct igb_adapter *);
  90 static void igb_clean_all_tx_rings(struct igb_adapter *);
  91 static void igb_clean_all_rx_rings(struct igb_adapter *);
  92 static void igb_clean_tx_ring(struct igb_ring *);
  93 static void igb_clean_rx_ring(struct igb_ring *);
  94 static void igb_set_multi(struct net_device *);
  95 static void igb_update_phy_info(unsigned long);
  96 static void igb_watchdog(unsigned long);
  97 static void igb_watchdog_task(struct work_struct *);
  98 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
  99                                   struct igb_ring *);
 100 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
 101 static struct net_device_stats *igb_get_stats(struct net_device *);
 102 static int igb_change_mtu(struct net_device *, int);
 103 static int igb_set_mac(struct net_device *, void *);
 104 static irqreturn_t igb_intr(int irq, void *);
 105 static irqreturn_t igb_intr_msi(int irq, void *);
 106 static irqreturn_t igb_msix_other(int irq, void *);
 107 static irqreturn_t igb_msix_rx(int irq, void *);
 108 static irqreturn_t igb_msix_tx(int irq, void *);
 109 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
 110 #ifdef CONFIG_DCA
 111 static void igb_update_rx_dca(struct igb_ring *);
 112 static void igb_update_tx_dca(struct igb_ring *);
 113 static void igb_setup_dca(struct igb_adapter *);
 114 #endif /* CONFIG_DCA */
 115 static bool igb_clean_tx_irq(struct igb_ring *);
 116 static int igb_poll(struct napi_struct *, int);
 117 static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
 118 static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
 119 #ifdef CONFIG_IGB_LRO
 120 static int igb_get_skb_hdr(struct sk_buff *skb, void **, void **, u64 *, void *);
 121 #endif
 122 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 123 static void igb_tx_timeout(struct net_device *);
 124 static void igb_reset_task(struct work_struct *);
 125 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
 126 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 127 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 128 static void igb_restore_vlan(struct igb_adapter *);
 129
 130 static int igb_suspend(struct pci_dev *, pm_message_t);
 131 #ifdef CONFIG_PM
 132 static int igb_resume(struct pci_dev *);
 133 #endif
 134 static void igb_shutdown(struct pci_dev *);
 135 #ifdef CONFIG_DCA
 136 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 137 static struct notifier_block dca_notifier = {
 138         .notifier_call  = igb_notify_dca,
 139         .next           = NULL,
 140         .priority       = 0
 141 };
 142 #endif
 143
 144 #ifdef CONFIG_NET_POLL_CONTROLLER
 145 /* for netdump / net console */
 146 static void igb_netpoll(struct net_device *);
 147 #endif
 148
 149 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 150                      pci_channel_state_t);
 151 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 152 static void igb_io_resume(struct pci_dev *);
 153
 154 static struct pci_error_handlers igb_err_handler = {
 155         .error_detected = igb_io_error_detected,
 156         .slot_reset = igb_io_slot_reset,
 157         .resume = igb_io_resume,
 158 };
 159
 160
 161 static struct pci_driver igb_driver = {
 162         .name     = igb_driver_name,
 163         .id_table = igb_pci_tbl,
 164         .probe    = igb_probe,
 165         .remove   = __devexit_p(igb_remove),
 166 #ifdef CONFIG_PM
 167         /* Power Managment Hooks */
 168         .suspend  = igb_suspend,
 169         .resume   = igb_resume,
 170 #endif
 171         .shutdown = igb_shutdown,
 172         .err_handler = &igb_err_handler
 173 };
 174
 175 static int global_quad_port_a; /* global quad port a indication */
 176
 177 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 178 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 179 MODULE_LICENSE("GPL");
 180 MODULE_VERSION(DRV_VERSION);
 181
 182 #ifdef DEBUG
 183 /**
 184  * igb_get_hw_dev_name - return device name string
 185  * used by hardware layer to print debugging information
 186  **/
 187 char *igb_get_hw_dev_name(struct e1000_hw *hw)
 188 {
 189         struct igb_adapter *adapter = hw->back;
 190         return adapter->netdev->name;
 191 }
 192 #endif
 193
 194 /**
 195  * igb_init_module - Driver Registration Routine
 196  *
 197  * igb_init_module is the first routine called when the driver is
 198  * loaded. All it does is register with the PCI subsystem.
 199  **/
 200 static int __init igb_init_module(void)
 201 {
 202         int ret;
 203         printk(KERN_INFO "%s - version %s\n",
 204                igb_driver_string, igb_driver_version);
 205
 206         printk(KERN_INFO "%s\n", igb_copyright);
 207
 208         global_quad_port_a = 0;
 209
 210         ret = pci_register_driver(&igb_driver);
 211 #ifdef CONFIG_DCA
 212         dca_register_notify(&dca_notifier);
 213 #endif
 214         return ret;
 215 }
 216
 217 module_init(igb_init_module);
 218
 219 /**
 220  * igb_exit_module - Driver Exit Cleanup Routine
 221  *
 222  * igb_exit_module is called just before the driver is removed
 223  * from memory.
 224  **/
 225 static void __exit igb_exit_module(void)
 226 {
 227 #ifdef CONFIG_DCA
 228         dca_unregister_notify(&dca_notifier);
 229 #endif
 230         pci_unregister_driver(&igb_driver);
 231 }
 232
 233 module_exit(igb_exit_module);
 234
 235 /**
 236  * igb_alloc_queues - Allocate memory for all rings
 237  * @adapter: board private structure to initialize
 238  *
 239  * We allocate one ring per queue at run-time since we don't know the
 240  * number of queues at compile-time.
 241  **/
 242 static int igb_alloc_queues(struct igb_adapter *adapter)
 243 {
 244         int i;
 245
 246         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
 247                                    sizeof(struct igb_ring), GFP_KERNEL);
 248         if (!adapter->tx_ring)
 249                 return -ENOMEM;
 250
 251         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
 252                                    sizeof(struct igb_ring), GFP_KERNEL);
 253         if (!adapter->rx_ring) {
 254                 kfree(adapter->tx_ring);
 255                 return -ENOMEM;
 256         }
 257
 258         for (i = 0; i < adapter->num_tx_queues; i++) {
 259                 struct igb_ring *ring = &(adapter->tx_ring[i]);
 260                 ring->adapter = adapter;
 261                 ring->queue_index = i;
 262         }
 263         for (i = 0; i < adapter->num_rx_queues; i++) {
 264                 struct igb_ring *ring = &(adapter->rx_ring[i]);
 265                 ring->adapter = adapter;
 266                 ring->queue_index = i;
 267                 ring->itr_register = E1000_ITR;
 268
 269                 /* set a default napi handler for each rx_ring */
 270                 netif_napi_add(adapter->netdev, &ring->napi, igb_poll, 64);
 271         }
 272         return 0;
 273 }
 274
 275 static void igb_free_queues(struct igb_adapter *adapter)
 276 {
 277         int i;
 278
 279         for (i = 0; i < adapter->num_rx_queues; i++)
 280                 netif_napi_del(&adapter->rx_ring[i].napi);
 281
 282         kfree(adapter->tx_ring);
 283         kfree(adapter->rx_ring);
 284 }
 285
 286 #define IGB_N0_QUEUE -1
 287 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
 288                               int tx_queue, int msix_vector)
 289 {
 290         u32 msixbm = 0;
 291         struct e1000_hw *hw = &adapter->hw;
 292         u32 ivar, index;
 293
 294         switch (hw->mac.type) {
 295         case e1000_82575:
 296                 /* The 82575 assigns vectors using a bitmask, which matches the
 297                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 298                    or more queues to a vector, we write the appropriate bits
 299                    into the MSIXBM register for that vector. */
 300                 if (rx_queue > IGB_N0_QUEUE) {
 301                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 302                         adapter->rx_ring[rx_queue].eims_value = msixbm;
 303                 }
 304                 if (tx_queue > IGB_N0_QUEUE) {
 305                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 306                         adapter->tx_ring[tx_queue].eims_value =
 307                                   E1000_EICR_TX_QUEUE0 << tx_queue;
 308                 }
 309                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 310                 break;
 311         case e1000_82576:
 312                 /* Kawela uses a table-based method for assigning vectors.
 313                    Each queue has a single entry in the table to which we write
 314                    a vector number along with a "valid" bit.  Sadly, the layout
 315                    of the table is somewhat counterintuitive. */
 316                 if (rx_queue > IGB_N0_QUEUE) {
 317                         index = (rx_queue & 0x7);
 318                         ivar = array_rd32(E1000_IVAR0, index);
 319                         if (rx_queue < 8) {
 320                                 /* vector goes into low byte of register */
 321                                 ivar = ivar & 0xFFFFFF00;
 322                                 ivar |= msix_vector | E1000_IVAR_VALID;
 323                         } else {
 324                                 /* vector goes into third byte of register */
 325                                 ivar = ivar & 0xFF00FFFF;
 326                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
 327                         }
 328                         adapter->rx_ring[rx_queue].eims_value= 1 << msix_vector;
 329                         array_wr32(E1000_IVAR0, index, ivar);
 330                 }
 331                 if (tx_queue > IGB_N0_QUEUE) {
 332                         index = (tx_queue & 0x7);
 333                         ivar = array_rd32(E1000_IVAR0, index);
 334                         if (tx_queue < 8) {
 335                                 /* vector goes into second byte of register */
 336                                 ivar = ivar & 0xFFFF00FF;
 337                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
 338                         } else {
 339                                 /* vector goes into high byte of register */
 340                                 ivar = ivar & 0x00FFFFFF;
 341                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
 342                         }
 343                         adapter->tx_ring[tx_queue].eims_value= 1 << msix_vector;
 344                         array_wr32(E1000_IVAR0, index, ivar);
 345                 }
 346                 break;
 347         default:
 348                 BUG();
 349                 break;
 350         }
 351 }
 352
 353 /**
 354  * igb_configure_msix - Configure MSI-X hardware
 355  *
 356  * igb_configure_msix sets up the hardware to properly
 357  * generate MSI-X interrupts.
 358  **/
 359 static void igb_configure_msix(struct igb_adapter *adapter)
 360 {
 361         u32 tmp;
 362         int i, vector = 0;
 363         struct e1000_hw *hw = &adapter->hw;
 364
 365         adapter->eims_enable_mask = 0;
 366         if (hw->mac.type == e1000_82576)
 367                 /* Turn on MSI-X capability first, or our settings
 368                  * won't stick.  And it will take days to debug. */
 369                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 370                                    E1000_GPIE_PBA | E1000_GPIE_EIAME |
 371                                    E1000_GPIE_NSICR);
 372
 373         for (i = 0; i < adapter->num_tx_queues; i++) {
 374                 struct igb_ring *tx_ring = &adapter->tx_ring[i];
 375                 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
 376                 adapter->eims_enable_mask |= tx_ring->eims_value;
 377                 if (tx_ring->itr_val)
 378                         writel(1000000000 / (tx_ring->itr_val * 256),
 379                                hw->hw_addr + tx_ring->itr_register);
 380                 else
 381                         writel(1, hw->hw_addr + tx_ring->itr_register);
 382         }
 383
 384         for (i = 0; i < adapter->num_rx_queues; i++) {
 385                 struct igb_ring *rx_ring = &adapter->rx_ring[i];
 386                 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
 387                 adapter->eims_enable_mask |= rx_ring->eims_value;
 388                 if (rx_ring->itr_val)
 389                         writel(1000000000 / (rx_ring->itr_val * 256),
 390                                hw->hw_addr + rx_ring->itr_register);
 391                 else
 392                         writel(1, hw->hw_addr + rx_ring->itr_register);
 393         }
 394
 395
 396         /* set vector for other causes, i.e. link changes */
 397         switch (hw->mac.type) {
 398         case e1000_82575:
 399                 array_wr32(E1000_MSIXBM(0), vector++,
 400                                       E1000_EIMS_OTHER);
 401
 402                 tmp = rd32(E1000_CTRL_EXT);
 403                 /* enable MSI-X PBA support*/
 404                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 405
 406                 /* Auto-Mask interrupts upon ICR read. */
 407                 tmp |= E1000_CTRL_EXT_EIAME;
 408                 tmp |= E1000_CTRL_EXT_IRCA;
 409
 410                 wr32(E1000_CTRL_EXT, tmp);
 411                 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
 412                 adapter->eims_other = E1000_EIMS_OTHER;
 413
 414                 break;
 415
 416         case e1000_82576:
 417                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 418                 wr32(E1000_IVAR_MISC, tmp);
 419
 420                 adapter->eims_enable_mask = (1 << (vector)) - 1;
 421                 adapter->eims_other = 1 << (vector - 1);
 422                 break;
 423         default:
 424                 /* do nothing, since nothing else supports MSI-X */
 425                 break;
 426         } /* switch (hw->mac.type) */
 427         wrfl();
 428 }
 429
 430 /**
 431  * igb_request_msix - Initialize MSI-X interrupts
 432  *
 433  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 434  * kernel.
 435  **/
 436 static int igb_request_msix(struct igb_adapter *adapter)
 437 {
 438         struct net_device *netdev = adapter->netdev;
 439         int i, err = 0, vector = 0;
 440
 441         vector = 0;
 442
 443         for (i = 0; i < adapter->num_tx_queues; i++) {
 444                 struct igb_ring *ring = &(adapter->tx_ring[i]);
 445                 sprintf(ring->name, "%s-tx%d", netdev->name, i);
 446                 err = request_irq(adapter->msix_entries[vector].vector,
 447                                   &igb_msix_tx, 0, ring->name,
 448                                   &(adapter->tx_ring[i]));
 449                 if (err)
 450                         goto out;
 451                 ring->itr_register = E1000_EITR(0) + (vector << 2);
 452                 ring->itr_val = adapter->itr;
 453                 vector++;
 454         }
 455         for (i = 0; i < adapter->num_rx_queues; i++) {
 456                 struct igb_ring *ring = &(adapter->rx_ring[i]);
 457                 if (strlen(netdev->name) < (IFNAMSIZ - 5))
 458                         sprintf(ring->name, "%s-rx%d", netdev->name, i);
 459                 else
 460                         memcpy(ring->name, netdev->name, IFNAMSIZ);
 461                 err = request_irq(adapter->msix_entries[vector].vector,
 462                                   &igb_msix_rx, 0, ring->name,
 463                                   &(adapter->rx_ring[i]));
 464                 if (err)
 465                         goto out;
 466                 ring->itr_register = E1000_EITR(0) + (vector << 2);
 467                 ring->itr_val = adapter->itr;
 468                 /* overwrite the poll routine for MSIX, we've already done
 469                  * netif_napi_add */
 470                 ring->napi.poll = &igb_clean_rx_ring_msix;
 471                 vector++;
 472         }
 473
 474         err = request_irq(adapter->msix_entries[vector].vector,
 475                           &igb_msix_other, 0, netdev->name, netdev);
 476         if (err)
 477                 goto out;
 478
 479         igb_configure_msix(adapter);
 480         return 0;
 481 out:
 482         return err;
 483 }
 484
 485 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 486 {
 487         if (adapter->msix_entries) {
 488                 pci_disable_msix(adapter->pdev);
 489                 kfree(adapter->msix_entries);
 490                 adapter->msix_entries = NULL;
 491         } else if (adapter->flags & IGB_FLAG_HAS_MSI)
 492                 pci_disable_msi(adapter->pdev);
 493         return;
 494 }
 495
 496
 497 /**
 498  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 499  *
 500  * Attempt to configure interrupts using the best available
 501  * capabilities of the hardware and kernel.
 502  **/
 503 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
 504 {
 505         int err;
 506         int numvecs, i;
 507
 508         numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
 509         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
 510                                         GFP_KERNEL);
 511         if (!adapter->msix_entries)
 512                 goto msi_only;
 513
 514         for (i = 0; i < numvecs; i++)
 515                 adapter->msix_entries[i].entry = i;
 516
 517         err = pci_enable_msix(adapter->pdev,
 518                               adapter->msix_entries,
 519                               numvecs);
 520         if (err == 0)
 521                 return;
 522
 523         igb_reset_interrupt_capability(adapter);
 524
 525         /* If we can't do MSI-X, try MSI */
 526 msi_only:
 527         adapter->num_rx_queues = 1;
 528         adapter->num_tx_queues = 1;
 529         if (!pci_enable_msi(adapter->pdev))
 530                 adapter->flags |= IGB_FLAG_HAS_MSI;
 531
 532 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
 533         /* Notify the stack of the (possibly) reduced Tx Queue count. */
 534         adapter->netdev->egress_subqueue_count = adapter->num_tx_queues;
 535 #endif
 536         return;
 537 }
 538
 539 /**
 540  * igb_request_irq - initialize interrupts
 541  *
 542  * Attempts to configure interrupts using the best available
 543  * capabilities of the hardware and kernel.
 544  **/
 545 static int igb_request_irq(struct igb_adapter *adapter)
 546 {
 547         struct net_device *netdev = adapter->netdev;
 548         struct e1000_hw *hw = &adapter->hw;
 549         int err = 0;
 550
 551         if (adapter->msix_entries) {
 552                 err = igb_request_msix(adapter);
 553                 if (!err)
 554                         goto request_done;
 555                 /* fall back to MSI */
 556                 igb_reset_interrupt_capability(adapter);
 557                 if (!pci_enable_msi(adapter->pdev))
 558                         adapter->flags |= IGB_FLAG_HAS_MSI;
 559                 igb_free_all_tx_resources(adapter);
 560                 igb_free_all_rx_resources(adapter);
 561                 adapter->num_rx_queues = 1;
 562                 igb_alloc_queues(adapter);
 563         } else {
 564                 switch (hw->mac.type) {
 565                 case e1000_82575:
 566                         wr32(E1000_MSIXBM(0),
 567                              (E1000_EICR_RX_QUEUE0 | E1000_EIMS_OTHER));
 568                         break;
 569                 case e1000_82576:
 570                         wr32(E1000_IVAR0, E1000_IVAR_VALID);
 571                         break;
 572                 default:
 573                         break;
 574                 }
 575         }
 576
 577         if (adapter->flags & IGB_FLAG_HAS_MSI) {
 578                 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
 579                                   netdev->name, netdev);
 580                 if (!err)
 581                         goto request_done;
 582                 /* fall back to legacy interrupts */
 583                 igb_reset_interrupt_capability(adapter);
 584                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
 585         }
 586
 587         err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
 588                           netdev->name, netdev);
 589
 590         if (err)
 591                 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
 592                         err);
 593
 594 request_done:
 595         return err;
 596 }
 597
 598 static void igb_free_irq(struct igb_adapter *adapter)
 599 {
 600         struct net_device *netdev = adapter->netdev;
 601
 602         if (adapter->msix_entries) {
 603                 int vector = 0, i;
 604
 605                 for (i = 0; i < adapter->num_tx_queues; i++)
 606                         free_irq(adapter->msix_entries[vector++].vector,
 607                                 &(adapter->tx_ring[i]));
 608                 for (i = 0; i < adapter->num_rx_queues; i++)
 609                         free_irq(adapter->msix_entries[vector++].vector,
 610                                 &(adapter->rx_ring[i]));
 611
 612                 free_irq(adapter->msix_entries[vector++].vector, netdev);
 613                 return;
 614         }
 615
 616         free_irq(adapter->pdev->irq, netdev);
 617 }
 618
 619 /**
 620  * igb_irq_disable - Mask off interrupt generation on the NIC
 621  * @adapter: board private structure
 622  **/
 623 static void igb_irq_disable(struct igb_adapter *adapter)
 624 {
 625         struct e1000_hw *hw = &adapter->hw;
 626
 627         if (adapter->msix_entries) {
 628                 wr32(E1000_EIAM, 0);
 629                 wr32(E1000_EIMC, ~0);
 630                 wr32(E1000_EIAC, 0);
 631         }
 632
 633         wr32(E1000_IAM, 0);
 634         wr32(E1000_IMC, ~0);
 635         wrfl();
 636         synchronize_irq(adapter->pdev->irq);
 637 }
 638
 639 /**
 640  * igb_irq_enable - Enable default interrupt generation settings
 641  * @adapter: board private structure
 642  **/
 643 static void igb_irq_enable(struct igb_adapter *adapter)
 644 {
 645         struct e1000_hw *hw = &adapter->hw;
 646
 647         if (adapter->msix_entries) {
 648                 wr32(E1000_EIAC, adapter->eims_enable_mask);
 649                 wr32(E1000_EIAM, adapter->eims_enable_mask);
 650                 wr32(E1000_EIMS, adapter->eims_enable_mask);
 651                 wr32(E1000_IMS, E1000_IMS_LSC);
 652         } else {
 653                 wr32(E1000_IMS, IMS_ENABLE_MASK);
 654                 wr32(E1000_IAM, IMS_ENABLE_MASK);
 655         }
 656 }
 657
 658 static void igb_update_mng_vlan(struct igb_adapter *adapter)
 659 {
 660         struct net_device *netdev = adapter->netdev;
 661         u16 vid = adapter->hw.mng_cookie.vlan_id;
 662         u16 old_vid = adapter->mng_vlan_id;
 663         if (adapter->vlgrp) {
 664                 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
 665                         if (adapter->hw.mng_cookie.status &
 666                                 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
 667                                 igb_vlan_rx_add_vid(netdev, vid);
 668                                 adapter->mng_vlan_id = vid;
 669                         } else
 670                                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
 671
 672                         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
 673                                         (vid != old_vid) &&
 674                             !vlan_group_get_device(adapter->vlgrp, old_vid))
 675                                 igb_vlan_rx_kill_vid(netdev, old_vid);
 676                 } else
 677                         adapter->mng_vlan_id = vid;
 678         }
 679 }
 680
 681 /**
 682  * igb_release_hw_control - release control of the h/w to f/w
 683  * @adapter: address of board private structure
 684  *
 685  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
 686  * For ASF and Pass Through versions of f/w this means that the
 687  * driver is no longer loaded.
 688  *
 689  **/
 690 static void igb_release_hw_control(struct igb_adapter *adapter)
 691 {
 692         struct e1000_hw *hw = &adapter->hw;
 693         u32 ctrl_ext;
 694
 695         /* Let firmware take over control of h/w */
 696         ctrl_ext = rd32(E1000_CTRL_EXT);
 697         wr32(E1000_CTRL_EXT,
 698                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
 699 }
 700
 701
 702 /**
 703  * igb_get_hw_control - get control of the h/w from f/w
 704  * @adapter: address of board private structure
 705  *
 706  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
 707  * For ASF and Pass Through versions of f/w this means that
 708  * the driver is loaded.
 709  *
 710  **/
 711 static void igb_get_hw_control(struct igb_adapter *adapter)
 712 {
 713         struct e1000_hw *hw = &adapter->hw;
 714         u32 ctrl_ext;
 715
 716         /* Let firmware know the driver has taken over */
 717         ctrl_ext = rd32(E1000_CTRL_EXT);
 718         wr32(E1000_CTRL_EXT,
 719                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
 720 }
 721
 722 static void igb_init_manageability(struct igb_adapter *adapter)
 723 {
 724         struct e1000_hw *hw = &adapter->hw;
 725
 726         if (adapter->en_mng_pt) {
 727                 u32 manc2h = rd32(E1000_MANC2H);
 728                 u32 manc = rd32(E1000_MANC);
 729
 730                 /* enable receiving management packets to the host */
 731                 /* this will probably generate destination unreachable messages
 732                  * from the host OS, but the packets will be handled on SMBUS */
 733                 manc |= E1000_MANC_EN_MNG2HOST;
 734 #define E1000_MNG2HOST_PORT_623 (1 << 5)
 735 #define E1000_MNG2HOST_PORT_664 (1 << 6)
 736                 manc2h |= E1000_MNG2HOST_PORT_623;
 737                 manc2h |= E1000_MNG2HOST_PORT_664;
 738                 wr32(E1000_MANC2H, manc2h);
 739
 740                 wr32(E1000_MANC, manc);
 741         }
 742 }
 743
 744 /**
 745  * igb_configure - configure the hardware for RX and TX
 746  * @adapter: private board structure
 747  **/
 748 static void igb_configure(struct igb_adapter *adapter)
 749 {
 750         struct net_device *netdev = adapter->netdev;
 751         int i;
 752
 753         igb_get_hw_control(adapter);
 754         igb_set_multi(netdev);
 755
 756         igb_restore_vlan(adapter);
 757         igb_init_manageability(adapter);
 758
 759         igb_configure_tx(adapter);
 760         igb_setup_rctl(adapter);
 761         igb_configure_rx(adapter);
 762
 763         igb_rx_fifo_flush_82575(&adapter->hw);
 764
 765         /* call IGB_DESC_UNUSED which always leaves
 766          * at least 1 descriptor unused to make sure
 767          * next_to_use != next_to_clean */
 768         for (i = 0; i < adapter->num_rx_queues; i++) {
 769                 struct igb_ring *ring = &adapter->rx_ring[i];
 770                 igb_alloc_rx_buffers_adv(ring, IGB_DESC_UNUSED(ring));
 771         }
 772
 773
 774         adapter->tx_queue_len = netdev->tx_queue_len;
 775 }
 776
 777
 778 /**
 779  * igb_up - Open the interface and prepare it to handle traffic
 780  * @adapter: board private structure
 781  **/
 782
 783 int igb_up(struct igb_adapter *adapter)
 784 {
 785         struct e1000_hw *hw = &adapter->hw;
 786         int i;
 787
 788         /* hardware has been reset, we need to reload some things */
 789         igb_configure(adapter);
 790
 791         clear_bit(__IGB_DOWN, &adapter->state);
 792
 793         for (i = 0; i < adapter->num_rx_queues; i++)
 794                 napi_enable(&adapter->rx_ring[i].napi);
 795         if (adapter->msix_entries)
 796                 igb_configure_msix(adapter);
 797
 798         /* Clear any pending interrupts. */
 799         rd32(E1000_ICR);
 800         igb_irq_enable(adapter);
 801
 802         /* Fire a link change interrupt to start the watchdog. */
 803         wr32(E1000_ICS, E1000_ICS_LSC);
 804         return 0;
 805 }
 806
 807 void igb_down(struct igb_adapter *adapter)
 808 {
 809         struct e1000_hw *hw = &adapter->hw;
 810         struct net_device *netdev = adapter->netdev;
 811         u32 tctl, rctl;
 812         int i;
 813
 814         /* signal that we're down so the interrupt handler does not
 815          * reschedule our watchdog timer */
 816         set_bit(__IGB_DOWN, &adapter->state);
 817
 818         /* disable receives in the hardware */
 819         rctl = rd32(E1000_RCTL);
 820         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
 821         /* flush and sleep below */
 822
 823         netif_stop_queue(netdev);
 824 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
 825         for (i = 0; i < adapter->num_tx_queues; i++)
 826                 netif_stop_subqueue(netdev, i);
 827 #endif
 828
 829         /* disable transmits in the hardware */
 830         tctl = rd32(E1000_TCTL);
 831         tctl &= ~E1000_TCTL_EN;
 832         wr32(E1000_TCTL, tctl);
 833         /* flush both disables and wait for them to finish */
 834         wrfl();
 835         msleep(10);
 836
 837         for (i = 0; i < adapter->num_rx_queues; i++)
 838                 napi_disable(&adapter->rx_ring[i].napi);
 839
 840         igb_irq_disable(adapter);
 841
 842         del_timer_sync(&adapter->watchdog_timer);
 843         del_timer_sync(&adapter->phy_info_timer);
 844
 845         netdev->tx_queue_len = adapter->tx_queue_len;
 846         netif_carrier_off(netdev);
 847         adapter->link_speed = 0;
 848         adapter->link_duplex = 0;
 849
 850         if (!pci_channel_offline(adapter->pdev))
 851                 igb_reset(adapter);
 852         igb_clean_all_tx_rings(adapter);
 853         igb_clean_all_rx_rings(adapter);
 854 }
 855
 856 void igb_reinit_locked(struct igb_adapter *adapter)
 857 {
 858         WARN_ON(in_interrupt());
 859         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 860                 msleep(1);
 861         igb_down(adapter);
 862         igb_up(adapter);
 863         clear_bit(__IGB_RESETTING, &adapter->state);
 864 }
 865
 866 void igb_reset(struct igb_adapter *adapter)
 867 {
 868         struct e1000_hw *hw = &adapter->hw;
 869         struct e1000_mac_info *mac = &hw->mac;
 870         struct e1000_fc_info *fc = &hw->fc;
 871         u32 pba = 0, tx_space, min_tx_space, min_rx_space;
 872         u16 hwm;
 873
 874         /* Repartition Pba for greater than 9k mtu
 875          * To take effect CTRL.RST is required.
 876          */
 877         if (mac->type != e1000_82576) {
 878         pba = E1000_PBA_34K;
 879         }
 880         else {
 881                 pba = E1000_PBA_64K;
 882         }
 883
 884         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
 885             (mac->type < e1000_82576)) {
 886                 /* adjust PBA for jumbo frames */
 887                 wr32(E1000_PBA, pba);
 888
 889                 /* To maintain wire speed transmits, the Tx FIFO should be
 890                  * large enough to accommodate two full transmit packets,
 891                  * rounded up to the next 1KB and expressed in KB.  Likewise,
 892                  * the Rx FIFO should be large enough to accommodate at least
 893                  * one full receive packet and is similarly rounded up and
 894                  * expressed in KB. */
 895                 pba = rd32(E1000_PBA);
 896                 /* upper 16 bits has Tx packet buffer allocation size in KB */
 897                 tx_space = pba >> 16;
 898                 /* lower 16 bits has Rx packet buffer allocation size in KB */
 899                 pba &= 0xffff;
 900                 /* the tx fifo also stores 16 bytes of information about the tx
 901                  * but don't include ethernet FCS because hardware appends it */
 902                 min_tx_space = (adapter->max_frame_size +
 903                                 sizeof(struct e1000_tx_desc) -
 904                                 ETH_FCS_LEN) * 2;
 905                 min_tx_space = ALIGN(min_tx_space, 1024);
 906                 min_tx_space >>= 10;
 907                 /* software strips receive CRC, so leave room for it */
 908                 min_rx_space = adapter->max_frame_size;
 909                 min_rx_space = ALIGN(min_rx_space, 1024);
 910                 min_rx_space >>= 10;
 911
 912                 /* If current Tx allocation is less than the min Tx FIFO size,
 913                  * and the min Tx FIFO size is less than the current Rx FIFO
 914                  * allocation, take space away from current Rx allocation */
 915                 if (tx_space < min_tx_space &&
 916                     ((min_tx_space - tx_space) < pba)) {
 917                         pba = pba - (min_tx_space - tx_space);
 918
 919                         /* if short on rx space, rx wins and must trump tx
 920                          * adjustment */
 921                         if (pba < min_rx_space)
 922                                 pba = min_rx_space;
 923                 }
 924                 wr32(E1000_PBA, pba);
 925         }
 926
 927         /* flow control settings */
 928         /* The high water mark must be low enough to fit one full frame
 929          * (or the size used for early receive) above it in the Rx FIFO.
 930          * Set it to the lower of:
 931          * - 90% of the Rx FIFO size, or
 932          * - the full Rx FIFO size minus one full frame */
 933         hwm = min(((pba << 10) * 9 / 10),
 934                         ((pba << 10) - 2 * adapter->max_frame_size));
 935
 936         if (mac->type < e1000_82576) {
 937                 fc->high_water = hwm & 0xFFF8;  /* 8-byte granularity */
 938                 fc->low_water = fc->high_water - 8;
 939         } else {
 940                 fc->high_water = hwm & 0xFFF0;  /* 16-byte granularity */
 941                 fc->low_water = fc->high_water - 16;
 942         }
 943         fc->pause_time = 0xFFFF;
 944         fc->send_xon = 1;
 945         fc->type = fc->original_type;
 946
 947         /* Allow time for pending master requests to run */
 948         adapter->hw.mac.ops.reset_hw(&adapter->hw);
 949         wr32(E1000_WUC, 0);
 950
 951         if (adapter->hw.mac.ops.init_hw(&adapter->hw))
 952                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
 953
 954         igb_update_mng_vlan(adapter);
 955
 956         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
 957         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
 958
 959         igb_reset_adaptive(&adapter->hw);
 960         if (adapter->hw.phy.ops.get_phy_info)
 961                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
 962 }
 963
 964 /**
 965  * igb_is_need_ioport - determine if an adapter needs ioport resources or not
 966  * @pdev: PCI device information struct
 967  *
 968  * Returns true if an adapter needs ioport resources
 969  **/
 970 static int igb_is_need_ioport(struct pci_dev *pdev)
 971 {
 972         switch (pdev->device) {
 973         /* Currently there are no adapters that need ioport resources */
 974         default:
 975                 return false;
 976         }
 977 }
 978
 979 /**
 980  * igb_probe - Device Initialization Routine
 981  * @pdev: PCI device information struct
 982  * @ent: entry in igb_pci_tbl
 983  *
 984  * Returns 0 on success, negative on failure
 985  *
 986  * igb_probe initializes an adapter identified by a pci_dev structure.
 987  * The OS initialization, configuring of the adapter private structure,
 988  * and a hardware reset occur.
 989  **/
 990 static int __devinit igb_probe(struct pci_dev *pdev,
 991                                const struct pci_device_id *ent)
 992 {
 993         struct net_device *netdev;
 994         struct igb_adapter *adapter;
 995         struct e1000_hw *hw;
 996         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
 997         unsigned long mmio_start, mmio_len;
 998         int i, err, pci_using_dac;
 999         u16 eeprom_data = 0;
1000         u16 eeprom_apme_mask = IGB_EEPROM_APME;
1001         u32 part_num;
1002         int bars, need_ioport;
1003
1004         /* do not allocate ioport bars when not needed */
1005         need_ioport = igb_is_need_ioport(pdev);
1006         if (need_ioport) {
1007                 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
1008                 err = pci_enable_device(pdev);
1009         } else {
1010                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
1011                 err = pci_enable_device_mem(pdev);
1012         }
1013         if (err)
1014                 return err;
1015
1016         pci_using_dac = 0;
1017         err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1018         if (!err) {
1019                 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1020                 if (!err)
1021                         pci_using_dac = 1;
1022         } else {
1023                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1024                 if (err) {
1025                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1026                         if (err) {
1027                                 dev_err(&pdev->dev, "No usable DMA "
1028                                         "configuration, aborting\n");
1029                                 goto err_dma;
1030                         }
1031                 }
1032         }
1033
1034         err = pci_request_selected_regions(pdev, bars, igb_driver_name);
1035         if (err)
1036                 goto err_pci_reg;
1037
1038         pci_set_master(pdev);
1039         pci_save_state(pdev);
1040
1041         err = -ENOMEM;
1042 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1043         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter), IGB_MAX_TX_QUEUES);
1044 #else
1045         netdev = alloc_etherdev(sizeof(struct igb_adapter));
1046 #endif /* CONFIG_NETDEVICES_MULTIQUEUE */
1047         if (!netdev)
1048                 goto err_alloc_etherdev;
1049
1050         SET_NETDEV_DEV(netdev, &pdev->dev);
1051
1052         pci_set_drvdata(pdev, netdev);
1053         adapter = netdev_priv(netdev);
1054         adapter->netdev = netdev;
1055         adapter->pdev = pdev;
1056         hw = &adapter->hw;
1057         hw->back = adapter;
1058         adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
1059         adapter->bars = bars;
1060         adapter->need_ioport = need_ioport;
1061
1062         mmio_start = pci_resource_start(pdev, 0);
1063         mmio_len = pci_resource_len(pdev, 0);
1064
1065         err = -EIO;
1066         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
1067         if (!adapter->hw.hw_addr)
1068                 goto err_ioremap;
1069
1070         netdev->open = &igb_open;
1071         netdev->stop = &igb_close;
1072         netdev->get_stats = &igb_get_stats;
1073         netdev->set_multicast_list = &igb_set_multi;
1074         netdev->set_mac_address = &igb_set_mac;
1075         netdev->change_mtu = &igb_change_mtu;
1076         netdev->do_ioctl = &igb_ioctl;
1077         igb_set_ethtool_ops(netdev);
1078         netdev->tx_timeout = &igb_tx_timeout;
1079         netdev->watchdog_timeo = 5 * HZ;
1080         netdev->vlan_rx_register = igb_vlan_rx_register;
1081         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
1082         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
1083 #ifdef CONFIG_NET_POLL_CONTROLLER
1084         netdev->poll_controller = igb_netpoll;
1085 #endif
1086         netdev->hard_start_xmit = &igb_xmit_frame_adv;
1087
1088         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1089
1090         netdev->mem_start = mmio_start;
1091         netdev->mem_end = mmio_start + mmio_len;
1092
1093         /* PCI config space info */
1094         hw->vendor_id = pdev->vendor;
1095         hw->device_id = pdev->device;
1096         hw->revision_id = pdev->revision;
1097         hw->subsystem_vendor_id = pdev->subsystem_vendor;
1098         hw->subsystem_device_id = pdev->subsystem_device;
1099
1100         /* setup the private structure */
1101         hw->back = adapter;
1102         /* Copy the default MAC, PHY and NVM function pointers */
1103         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1104         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1105         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1106         /* Initialize skew-specific constants */
1107         err = ei->get_invariants(hw);
1108         if (err)
1109                 goto err_hw_init;
1110
1111         err = igb_sw_init(adapter);
1112         if (err)
1113                 goto err_sw_init;
1114
1115         igb_get_bus_info_pcie(hw);
1116
1117         /* set flags */
1118         switch (hw->mac.type) {
1119         case e1000_82576:
1120         case e1000_82575:
1121                 adapter->flags |= IGB_FLAG_HAS_DCA;
1122                 adapter->flags |= IGB_FLAG_NEED_CTX_IDX;
1123                 break;
1124         default:
1125                 break;
1126         }
1127
1128         hw->phy.autoneg_wait_to_complete = false;
1129         hw->mac.adaptive_ifs = true;
1130
1131         /* Copper options */
1132         if (hw->phy.media_type == e1000_media_type_copper) {
1133                 hw->phy.mdix = AUTO_ALL_MODES;
1134                 hw->phy.disable_polarity_correction = false;
1135                 hw->phy.ms_type = e1000_ms_hw_default;
1136         }
1137
1138         if (igb_check_reset_block(hw))
1139                 dev_info(&pdev->dev,
1140                         "PHY reset is blocked due to SOL/IDER session.\n");
1141
1142         netdev->features = NETIF_F_SG |
1143                            NETIF_F_HW_CSUM |
1144                            NETIF_F_HW_VLAN_TX |
1145                            NETIF_F_HW_VLAN_RX |
1146                            NETIF_F_HW_VLAN_FILTER;
1147
1148         netdev->features |= NETIF_F_TSO;
1149         netdev->features |= NETIF_F_TSO6;
1150
1151 #ifdef CONFIG_IGB_LRO
1152         netdev->features |= NETIF_F_LRO;
1153 #endif
1154
1155         netdev->vlan_features |= NETIF_F_TSO;
1156         netdev->vlan_features |= NETIF_F_TSO6;
1157         netdev->vlan_features |= NETIF_F_HW_CSUM;
1158         netdev->vlan_features |= NETIF_F_SG;
1159
1160         if (pci_using_dac)
1161                 netdev->features |= NETIF_F_HIGHDMA;
1162
1163 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1164         netdev->features |= NETIF_F_MULTI_QUEUE;
1165 #endif
1166
1167         netdev->features |= NETIF_F_LLTX;
1168         adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1169
1170         /* before reading the NVM, reset the controller to put the device in a
1171          * known good starting state */
1172         hw->mac.ops.reset_hw(hw);
1173
1174         /* make sure the NVM is good */
1175         if (igb_validate_nvm_checksum(hw) < 0) {
1176                 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1177                 err = -EIO;
1178                 goto err_eeprom;
1179         }
1180
1181         /* copy the MAC address out of the NVM */
1182         if (hw->mac.ops.read_mac_addr(hw))
1183                 dev_err(&pdev->dev, "NVM Read Error\n");
1184
1185         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1186         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1187
1188         if (!is_valid_ether_addr(netdev->perm_addr)) {
1189                 dev_err(&pdev->dev, "Invalid MAC Address\n");
1190                 err = -EIO;
1191                 goto err_eeprom;
1192         }
1193
1194         init_timer(&adapter->watchdog_timer);
1195         adapter->watchdog_timer.function = &igb_watchdog;
1196         adapter->watchdog_timer.data = (unsigned long) adapter;
1197
1198         init_timer(&adapter->phy_info_timer);
1199         adapter->phy_info_timer.function = &igb_update_phy_info;
1200         adapter->phy_info_timer.data = (unsigned long) adapter;
1201
1202         INIT_WORK(&adapter->reset_task, igb_reset_task);
1203         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1204
1205         /* Initialize link & ring properties that are user-changeable */
1206         adapter->tx_ring->count = 256;
1207         for (i = 0; i < adapter->num_tx_queues; i++)
1208                 adapter->tx_ring[i].count = adapter->tx_ring->count;
1209         adapter->rx_ring->count = 256;
1210         for (i = 0; i < adapter->num_rx_queues; i++)
1211                 adapter->rx_ring[i].count = adapter->rx_ring->count;
1212
1213         adapter->fc_autoneg = true;
1214         hw->mac.autoneg = true;
1215         hw->phy.autoneg_advertised = 0x2f;
1216
1217         hw->fc.original_type = e1000_fc_default;
1218         hw->fc.type = e1000_fc_default;
1219
1220         adapter->itr_setting = 3;
1221         adapter->itr = IGB_START_ITR;
1222
1223         igb_validate_mdi_setting(hw);
1224
1225         adapter->rx_csum = 1;
1226
1227         /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1228          * enable the ACPI Magic Packet filter
1229          */
1230
1231         if (hw->bus.func == 0 ||
1232             hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1233                 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1234                                      &eeprom_data);
1235
1236         if (eeprom_data & eeprom_apme_mask)
1237                 adapter->eeprom_wol |= E1000_WUFC_MAG;
1238
1239         /* now that we have the eeprom settings, apply the special cases where
1240          * the eeprom may be wrong or the board simply won't support wake on
1241          * lan on a particular port */
1242         switch (pdev->device) {
1243         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1244                 adapter->eeprom_wol = 0;
1245                 break;
1246         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1247         case E1000_DEV_ID_82576_FIBER:
1248         case E1000_DEV_ID_82576_SERDES:
1249                 /* Wake events only supported on port A for dual fiber
1250                  * regardless of eeprom setting */
1251                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1252                         adapter->eeprom_wol = 0;
1253                 break;
1254         case E1000_DEV_ID_82576_QUAD_COPPER:
1255                 /* if quad port adapter, disable WoL on all but port A */
1256                 if (global_quad_port_a != 0)
1257                         adapter->eeprom_wol = 0;
1258                 else
1259                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
1260                 /* Reset for multiple quad port adapters */
1261                 if (++global_quad_port_a == 4)
1262                         global_quad_port_a = 0;
1263                 break;
1264         }
1265
1266         /* initialize the wol settings based on the eeprom settings */
1267         adapter->wol = adapter->eeprom_wol;
1268
1269         /* reset the hardware with the new settings */
1270         igb_reset(adapter);
1271
1272         /* let the f/w know that the h/w is now under the control of the
1273          * driver. */
1274         igb_get_hw_control(adapter);
1275
1276         /* tell the stack to leave us alone until igb_open() is called */
1277         netif_carrier_off(netdev);
1278         netif_stop_queue(netdev);
1279 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1280         for (i = 0; i < adapter->num_tx_queues; i++)
1281                 netif_stop_subqueue(netdev, i);
1282 #endif
1283
1284         strcpy(netdev->name, "eth%d");
1285         err = register_netdev(netdev);
1286         if (err)
1287                 goto err_register;
1288
1289 #ifdef CONFIG_DCA
1290         if ((adapter->flags & IGB_FLAG_HAS_DCA) &&
1291             (dca_add_requester(&pdev->dev) == 0)) {
1292                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
1293                 dev_info(&pdev->dev, "DCA enabled\n");
1294                 /* Always use CB2 mode, difference is masked
1295                  * in the CB driver. */
1296                 wr32(E1000_DCA_CTRL, 2);
1297                 igb_setup_dca(adapter);
1298         }
1299 #endif
1300
1301         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1302         /* print bus type/speed/width info */
1303         dev_info(&pdev->dev,
1304                  "%s: (PCIe:%s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
1305                  netdev->name,
1306                  ((hw->bus.speed == e1000_bus_speed_2500)
1307                   ? "2.5Gb/s" : "unknown"),
1308                  ((hw->bus.width == e1000_bus_width_pcie_x4)
1309                   ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1310                   ? "Width x1" : "unknown"),
1311                  netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
1312                  netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
1313
1314         igb_read_part_num(hw, &part_num);
1315         dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1316                 (part_num >> 8), (part_num & 0xff));
1317
1318         dev_info(&pdev->dev,
1319                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1320                 adapter->msix_entries ? "MSI-X" :
1321                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
1322                 adapter->num_rx_queues, adapter->num_tx_queues);
1323
1324         return 0;
1325
1326 err_register:
1327         igb_release_hw_control(adapter);
1328 err_eeprom:
1329         if (!igb_check_reset_block(hw))
1330                 hw->phy.ops.reset_phy(hw);
1331
1332         if (hw->flash_address)
1333                 iounmap(hw->flash_address);
1334
1335         igb_remove_device(hw);
1336         igb_free_queues(adapter);
1337 err_sw_init:
1338 err_hw_init:
1339         iounmap(hw->hw_addr);
1340 err_ioremap:
1341         free_netdev(netdev);
1342 err_alloc_etherdev:
1343         pci_release_selected_regions(pdev, bars);
1344 err_pci_reg:
1345 err_dma:
1346         pci_disable_device(pdev);
1347         return err;
1348 }
1349
1350 /**
1351  * igb_remove - Device Removal Routine
1352  * @pdev: PCI device information struct
1353  *
1354  * igb_remove is called by the PCI subsystem to alert the driver
1355  * that it should release a PCI device.  The could be caused by a
1356  * Hot-Plug event, or because the driver is going to be removed from
1357  * memory.
1358  **/
1359 static void __devexit igb_remove(struct pci_dev *pdev)
1360 {
1361         struct net_device *netdev = pci_get_drvdata(pdev);
1362         struct igb_adapter *adapter = netdev_priv(netdev);
1363         struct e1000_hw *hw = &adapter->hw;
1364
1365         /* flush_scheduled work may reschedule our watchdog task, so
1366          * explicitly disable watchdog tasks from being rescheduled  */
1367         set_bit(__IGB_DOWN, &adapter->state);
1368         del_timer_sync(&adapter->watchdog_timer);
1369         del_timer_sync(&adapter->phy_info_timer);
1370
1371         flush_scheduled_work();
1372
1373 #ifdef CONFIG_DCA
1374         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
1375                 dev_info(&pdev->dev, "DCA disabled\n");
1376                 dca_remove_requester(&pdev->dev);
1377                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
1378                 wr32(E1000_DCA_CTRL, 1);
1379         }
1380 #endif
1381
1382         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
1383          * would have already happened in close and is redundant. */
1384         igb_release_hw_control(adapter);
1385
1386         unregister_netdev(netdev);
1387
1388         if (!igb_check_reset_block(&adapter->hw))
1389                 adapter->hw.phy.ops.reset_phy(&adapter->hw);
1390
1391         igb_remove_device(&adapter->hw);
1392         igb_reset_interrupt_capability(adapter);
1393
1394         igb_free_queues(adapter);
1395
1396         iounmap(adapter->hw.hw_addr);
1397         if (adapter->hw.flash_address)
1398                 iounmap(adapter->hw.flash_address);
1399         pci_release_selected_regions(pdev, adapter->bars);
1400
1401         free_netdev(netdev);
1402
1403         pci_disable_device(pdev);
1404 }
1405
1406 /**
1407  * igb_sw_init - Initialize general software structures (struct igb_adapter)
1408  * @adapter: board private structure to initialize
1409  *
1410  * igb_sw_init initializes the Adapter private data structure.
1411  * Fields are initialized based on PCI device information and
1412  * OS network device settings (MTU size).
1413  **/
1414 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1415 {
1416         struct e1000_hw *hw = &adapter->hw;
1417         struct net_device *netdev = adapter->netdev;
1418         struct pci_dev *pdev = adapter->pdev;
1419
1420         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1421
1422         adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1423         adapter->rx_ps_hdr_size = 0; /* disable packet split */
1424         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1425         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1426
1427         /* Number of supported queues. */
1428         /* Having more queues than CPUs doesn't make sense. */
1429         adapter->num_rx_queues = min((u32)IGB_MAX_RX_QUEUES, (u32)num_online_cpus());
1430 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1431         adapter->num_tx_queues = min(IGB_MAX_TX_QUEUES, num_online_cpus());
1432 #else
1433         adapter->num_tx_queues = 1;
1434 #endif /* CONFIG_NET_MULTI_QUEUE_DEVICE */
1435
1436         /* This call may decrease the number of queues depending on
1437          * interrupt mode. */
1438         igb_set_interrupt_capability(adapter);
1439
1440         if (igb_alloc_queues(adapter)) {
1441                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1442                 return -ENOMEM;
1443         }
1444
1445         /* Explicitly disable IRQ since the NIC can be in any state. */
1446         igb_irq_disable(adapter);
1447
1448         set_bit(__IGB_DOWN, &adapter->state);
1449         return 0;
1450 }
1451
1452 /**
1453  * igb_open - Called when a network interface is made active
1454  * @netdev: network interface device structure
1455  *
1456  * Returns 0 on success, negative value on failure
1457  *
1458  * The open entry point is called when a network interface is made
1459  * active by the system (IFF_UP).  At this point all resources needed
1460  * for transmit and receive operations are allocated, the interrupt
1461  * handler is registered with the OS, the watchdog timer is started,
1462  * and the stack is notified that the interface is ready.
1463  **/
1464 static int igb_open(struct net_device *netdev)
1465 {
1466         struct igb_adapter *adapter = netdev_priv(netdev);
1467         struct e1000_hw *hw = &adapter->hw;
1468         int err;
1469         int i;
1470
1471         /* disallow open during test */
1472         if (test_bit(__IGB_TESTING, &adapter->state))
1473                 return -EBUSY;
1474
1475         /* allocate transmit descriptors */
1476         err = igb_setup_all_tx_resources(adapter);
1477         if (err)
1478                 goto err_setup_tx;
1479
1480         /* allocate receive descriptors */
1481         err = igb_setup_all_rx_resources(adapter);
1482         if (err)
1483                 goto err_setup_rx;
1484
1485         /* e1000_power_up_phy(adapter); */
1486
1487         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1488         if ((adapter->hw.mng_cookie.status &
1489              E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1490                 igb_update_mng_vlan(adapter);
1491
1492         /* before we allocate an interrupt, we must be ready to handle it.
1493          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1494          * as soon as we call pci_request_irq, so we have to setup our
1495          * clean_rx handler before we do so.  */
1496         igb_configure(adapter);
1497
1498         err = igb_request_irq(adapter);
1499         if (err)
1500                 goto err_req_irq;
1501
1502         /* From here on the code is the same as igb_up() */
1503         clear_bit(__IGB_DOWN, &adapter->state);
1504
1505         for (i = 0; i < adapter->num_rx_queues; i++)
1506                 napi_enable(&adapter->rx_ring[i].napi);
1507
1508         /* Clear any pending interrupts. */
1509         rd32(E1000_ICR);
1510
1511         igb_irq_enable(adapter);
1512
1513         /* Fire a link status change interrupt to start the watchdog. */
1514         wr32(E1000_ICS, E1000_ICS_LSC);
1515
1516         return 0;
1517
1518 err_req_irq:
1519         igb_release_hw_control(adapter);
1520         /* e1000_power_down_phy(adapter); */
1521         igb_free_all_rx_resources(adapter);
1522 err_setup_rx:
1523         igb_free_all_tx_resources(adapter);
1524 err_setup_tx:
1525         igb_reset(adapter);
1526
1527         return err;
1528 }
1529
1530 /**
1531  * igb_close - Disables a network interface
1532  * @netdev: network interface device structure
1533  *
1534  * Returns 0, this is not allowed to fail
1535  *
1536  * The close entry point is called when an interface is de-activated
1537  * by the OS.  The hardware is still under the driver's control, but
1538  * needs to be disabled.  A global MAC reset is issued to stop the
1539  * hardware, and all transmit and receive resources are freed.
1540  **/
1541 static int igb_close(struct net_device *netdev)
1542 {
1543         struct igb_adapter *adapter = netdev_priv(netdev);
1544
1545         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1546         igb_down(adapter);
1547
1548         igb_free_irq(adapter);
1549
1550         igb_free_all_tx_resources(adapter);
1551         igb_free_all_rx_resources(adapter);
1552
1553         /* kill manageability vlan ID if supported, but not if a vlan with
1554          * the same ID is registered on the host OS (let 8021q kill it) */
1555         if ((adapter->hw.mng_cookie.status &
1556                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1557              !(adapter->vlgrp &&
1558                vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1559                 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1560
1561         return 0;
1562 }
1563
1564 /**
1565  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1566  * @adapter: board private structure
1567  * @tx_ring: tx descriptor ring (for a specific queue) to setup
1568  *
1569  * Return 0 on success, negative on failure
1570  **/
1571
1572 int igb_setup_tx_resources(struct igb_adapter *adapter,
1573                            struct igb_ring *tx_ring)
1574 {
1575         struct pci_dev *pdev = adapter->pdev;
1576         int size;
1577
1578         size = sizeof(struct igb_buffer) * tx_ring->count;
1579         tx_ring->buffer_info = vmalloc(size);
1580         if (!tx_ring->buffer_info)
1581                 goto err;
1582         memset(tx_ring->buffer_info, 0, size);
1583
1584         /* round up to nearest 4K */
1585         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1586                         + sizeof(u32);
1587         tx_ring->size = ALIGN(tx_ring->size, 4096);
1588
1589         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1590                                              &tx_ring->dma);
1591
1592         if (!tx_ring->desc)
1593                 goto err;
1594
1595         tx_ring->adapter = adapter;
1596         tx_ring->next_to_use = 0;
1597         tx_ring->next_to_clean = 0;
1598         return 0;
1599
1600 err:
1601         vfree(tx_ring->buffer_info);
1602         dev_err(&adapter->pdev->dev,
1603                 "Unable to allocate memory for the transmit descriptor ring\n");
1604         return -ENOMEM;
1605 }
1606
1607 /**
1608  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1609  *                                (Descriptors) for all queues
1610  * @adapter: board private structure
1611  *
1612  * Return 0 on success, negative on failure
1613  **/
1614 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1615 {
1616         int i, err = 0;
1617 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1618         int r_idx;
1619 #endif
1620
1621         for (i = 0; i < adapter->num_tx_queues; i++) {
1622                 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1623                 if (err) {
1624                         dev_err(&adapter->pdev->dev,
1625                                 "Allocation for Tx Queue %u failed\n", i);
1626                         for (i--; i >= 0; i--)
1627                                 igb_free_tx_resources(&adapter->tx_ring[i]);
1628                         break;
1629                 }
1630         }
1631
1632 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1633         for (i = 0; i < IGB_MAX_TX_QUEUES; i++) {
1634                 r_idx = i % adapter->num_tx_queues;
1635                 adapter->multi_tx_table[i] = &adapter->tx_ring[r_idx];
1636         }
1637 #endif
1638         return err;
1639 }
1640
1641 /**
1642  * igb_configure_tx - Configure transmit Unit after Reset
1643  * @adapter: board private structure
1644  *
1645  * Configure the Tx unit of the MAC after a reset.
1646  **/
1647 static void igb_configure_tx(struct igb_adapter *adapter)
1648 {
1649         u64 tdba, tdwba;
1650         struct e1000_hw *hw = &adapter->hw;
1651         u32 tctl;
1652         u32 txdctl, txctrl;
1653         int i;
1654
1655         for (i = 0; i < adapter->num_tx_queues; i++) {
1656                 struct igb_ring *ring = &(adapter->tx_ring[i]);
1657
1658                 wr32(E1000_TDLEN(i),
1659                                 ring->count * sizeof(struct e1000_tx_desc));
1660                 tdba = ring->dma;
1661                 wr32(E1000_TDBAL(i),
1662                                 tdba & 0x00000000ffffffffULL);
1663                 wr32(E1000_TDBAH(i), tdba >> 32);
1664
1665                 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1666                 tdwba |= 1; /* enable head wb */
1667                 wr32(E1000_TDWBAL(i),
1668                                 tdwba & 0x00000000ffffffffULL);
1669                 wr32(E1000_TDWBAH(i), tdwba >> 32);
1670
1671                 ring->head = E1000_TDH(i);
1672                 ring->tail = E1000_TDT(i);
1673                 writel(0, hw->hw_addr + ring->tail);
1674                 writel(0, hw->hw_addr + ring->head);
1675                 txdctl = rd32(E1000_TXDCTL(i));
1676                 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1677                 wr32(E1000_TXDCTL(i), txdctl);
1678
1679                 /* Turn off Relaxed Ordering on head write-backs.  The
1680                  * writebacks MUST be delivered in order or it will
1681                  * completely screw up our bookeeping.
1682                  */
1683                 txctrl = rd32(E1000_DCA_TXCTRL(i));
1684                 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1685                 wr32(E1000_DCA_TXCTRL(i), txctrl);
1686         }
1687
1688
1689
1690         /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1691
1692         /* Program the Transmit Control Register */
1693
1694         tctl = rd32(E1000_TCTL);
1695         tctl &= ~E1000_TCTL_CT;
1696         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1697                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1698
1699         igb_config_collision_dist(hw);
1700
1701         /* Setup Transmit Descriptor Settings for eop descriptor */
1702         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1703
1704         /* Enable transmits */
1705         tctl |= E1000_TCTL_EN;
1706
1707         wr32(E1000_TCTL, tctl);
1708 }
1709
1710 /**
1711  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1712  * @adapter: board private structure
1713  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
1714  *
1715  * Returns 0 on success, negative on failure
1716  **/
1717
1718 int igb_setup_rx_resources(struct igb_adapter *adapter,
1719                            struct igb_ring *rx_ring)
1720 {
1721         struct pci_dev *pdev = adapter->pdev;
1722         int size, desc_len;
1723
1724 #ifdef CONFIG_IGB_LRO
1725         size = sizeof(struct net_lro_desc) * MAX_LRO_DESCRIPTORS;
1726         rx_ring->lro_mgr.lro_arr = vmalloc(size);
1727         if (!rx_ring->lro_mgr.lro_arr)
1728                 goto err;
1729         memset(rx_ring->lro_mgr.lro_arr, 0, size);
1730 #endif
1731
1732         size = sizeof(struct igb_buffer) * rx_ring->count;
1733         rx_ring->buffer_info = vmalloc(size);
1734         if (!rx_ring->buffer_info)
1735                 goto err;
1736         memset(rx_ring->buffer_info, 0, size);
1737
1738         desc_len = sizeof(union e1000_adv_rx_desc);
1739
1740         /* Round up to nearest 4K */
1741         rx_ring->size = rx_ring->count * desc_len;
1742         rx_ring->size = ALIGN(rx_ring->size, 4096);
1743
1744         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1745                                              &rx_ring->dma);
1746
1747         if (!rx_ring->desc)
1748                 goto err;
1749
1750         rx_ring->next_to_clean = 0;
1751         rx_ring->next_to_use = 0;
1752
1753         rx_ring->adapter = adapter;
1754
1755         return 0;
1756
1757 err:
1758 #ifdef CONFIG_IGB_LRO
1759         vfree(rx_ring->lro_mgr.lro_arr);
1760         rx_ring->lro_mgr.lro_arr = NULL;
1761 #endif
1762         vfree(rx_ring->buffer_info);
1763         dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1764                 "the receive descriptor ring\n");
1765         return -ENOMEM;
1766 }
1767
1768 /**
1769  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1770  *                                (Descriptors) for all queues
1771  * @adapter: board private structure
1772  *
1773  * Return 0 on success, negative on failure
1774  **/
1775 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1776 {
1777         int i, err = 0;
1778
1779         for (i = 0; i < adapter->num_rx_queues; i++) {
1780                 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1781                 if (err) {
1782                         dev_err(&adapter->pdev->dev,
1783                                 "Allocation for Rx Queue %u failed\n", i);
1784                         for (i--; i >= 0; i--)
1785                                 igb_free_rx_resources(&adapter->rx_ring[i]);
1786                         break;
1787                 }
1788         }
1789
1790         return err;
1791 }
1792
1793 /**
1794  * igb_setup_rctl - configure the receive control registers
1795  * @adapter: Board private structure
1796  **/
1797 static void igb_setup_rctl(struct igb_adapter *adapter)
1798 {
1799         struct e1000_hw *hw = &adapter->hw;
1800         u32 rctl;
1801         u32 srrctl = 0;
1802         int i;
1803
1804         rctl = rd32(E1000_RCTL);
1805
1806         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1807
1808         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1809                 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1810                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1811
1812         /*
1813          * enable stripping of CRC. It's unlikely this will break BMC
1814          * redirection as it did with e1000. Newer features require
1815          * that the HW strips the CRC.
1816         */
1817         rctl |= E1000_RCTL_SECRC;
1818
1819         rctl &= ~E1000_RCTL_SBP;
1820
1821         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1822                 rctl &= ~E1000_RCTL_LPE;
1823         else
1824                 rctl |= E1000_RCTL_LPE;
1825         if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) {
1826                 /* Setup buffer sizes */
1827                 rctl &= ~E1000_RCTL_SZ_4096;
1828                 rctl |= E1000_RCTL_BSEX;
1829                 switch (adapter->rx_buffer_len) {
1830                 case IGB_RXBUFFER_256:
1831                         rctl |= E1000_RCTL_SZ_256;
1832                         rctl &= ~E1000_RCTL_BSEX;
1833                         break;
1834                 case IGB_RXBUFFER_512:
1835                         rctl |= E1000_RCTL_SZ_512;
1836                         rctl &= ~E1000_RCTL_BSEX;
1837                         break;
1838                 case IGB_RXBUFFER_1024:
1839                         rctl |= E1000_RCTL_SZ_1024;
1840                         rctl &= ~E1000_RCTL_BSEX;
1841                         break;
1842                 case IGB_RXBUFFER_2048:
1843                 default:
1844                         rctl |= E1000_RCTL_SZ_2048;
1845                         rctl &= ~E1000_RCTL_BSEX;
1846                         break;
1847                 }
1848         } else {
1849                 rctl &= ~E1000_RCTL_BSEX;
1850                 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1851         }
1852
1853         /* 82575 and greater support packet-split where the protocol
1854          * header is placed in skb->data and the packet data is
1855          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1856          * In the case of a non-split, skb->data is linearly filled,
1857          * followed by the page buffers.  Therefore, skb->data is
1858          * sized to hold the largest protocol header.
1859          */
1860         /* allocations using alloc_page take too long for regular MTU
1861          * so only enable packet split for jumbo frames */
1862         if (rctl & E1000_RCTL_LPE) {
1863                 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1864                 srrctl |= adapter->rx_ps_hdr_size <<
1865                          E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1866                 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1867         } else {
1868                 adapter->rx_ps_hdr_size = 0;
1869                 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1870         }
1871
1872         for (i = 0; i < adapter->num_rx_queues; i++)
1873                 wr32(E1000_SRRCTL(i), srrctl);
1874
1875         wr32(E1000_RCTL, rctl);
1876 }
1877
1878 /**
1879  * igb_configure_rx - Configure receive Unit after Reset
1880  * @adapter: board private structure
1881  *
1882  * Configure the Rx unit of the MAC after a reset.
1883  **/
1884 static void igb_configure_rx(struct igb_adapter *adapter)
1885 {
1886         u64 rdba;
1887         struct e1000_hw *hw = &adapter->hw;
1888         u32 rctl, rxcsum;
1889         u32 rxdctl;
1890         int i;
1891
1892         /* disable receives while setting up the descriptors */
1893         rctl = rd32(E1000_RCTL);
1894         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1895         wrfl();
1896         mdelay(10);
1897
1898         if (adapter->itr_setting > 3)
1899                 wr32(E1000_ITR,
1900                                 1000000000 / (adapter->itr * 256));
1901
1902         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1903          * the Base and Length of the Rx Descriptor Ring */
1904         for (i = 0; i < adapter->num_rx_queues; i++) {
1905                 struct igb_ring *ring = &(adapter->rx_ring[i]);
1906                 rdba = ring->dma;
1907                 wr32(E1000_RDBAL(i),
1908                                 rdba & 0x00000000ffffffffULL);
1909                 wr32(E1000_RDBAH(i), rdba >> 32);
1910                 wr32(E1000_RDLEN(i),
1911                                ring->count * sizeof(union e1000_adv_rx_desc));
1912
1913                 ring->head = E1000_RDH(i);
1914                 ring->tail = E1000_RDT(i);
1915                 writel(0, hw->hw_addr + ring->tail);
1916                 writel(0, hw->hw_addr + ring->head);
1917
1918                 rxdctl = rd32(E1000_RXDCTL(i));
1919                 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1920                 rxdctl &= 0xFFF00000;
1921                 rxdctl |= IGB_RX_PTHRESH;
1922                 rxdctl |= IGB_RX_HTHRESH << 8;
1923                 rxdctl |= IGB_RX_WTHRESH << 16;
1924                 wr32(E1000_RXDCTL(i), rxdctl);
1925 #ifdef CONFIG_IGB_LRO
1926                 /* Intitial LRO Settings */
1927                 ring->lro_mgr.max_aggr = MAX_LRO_AGGR;
1928                 ring->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS;
1929                 ring->lro_mgr.get_skb_header = igb_get_skb_hdr;
1930                 ring->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1931                 ring->lro_mgr.dev = adapter->netdev;
1932                 ring->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1933                 ring->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1934 #endif
1935         }
1936
1937         if (adapter->num_rx_queues > 1) {
1938                 u32 random[10];
1939                 u32 mrqc;
1940                 u32 j, shift;
1941                 union e1000_reta {
1942                         u32 dword;
1943                         u8  bytes[4];
1944                 } reta;
1945
1946                 get_random_bytes(&random[0], 40);
1947
1948                 if (hw->mac.type >= e1000_82576)
1949                         shift = 0;
1950                 else
1951                         shift = 6;
1952                 for (j = 0; j < (32 * 4); j++) {
1953                         reta.bytes[j & 3] =
1954                                 (j % adapter->num_rx_queues) << shift;
1955                         if ((j & 3) == 3)
1956                                 writel(reta.dword,
1957                                        hw->hw_addr + E1000_RETA(0) + (j & ~3));
1958                 }
1959                 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1960
1961                 /* Fill out hash function seeds */
1962                 for (j = 0; j < 10; j++)
1963                         array_wr32(E1000_RSSRK(0), j, random[j]);
1964
1965                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1966                          E1000_MRQC_RSS_FIELD_IPV4_TCP);
1967                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1968                          E1000_MRQC_RSS_FIELD_IPV6_TCP);
1969                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1970                          E1000_MRQC_RSS_FIELD_IPV6_UDP);
1971                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1972                          E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1973
1974
1975                 wr32(E1000_MRQC, mrqc);
1976
1977                 /* Multiqueue and raw packet checksumming are mutually
1978                  * exclusive.  Note that this not the same as TCP/IP
1979                  * checksumming, which works fine. */
1980                 rxcsum = rd32(E1000_RXCSUM);
1981                 rxcsum |= E1000_RXCSUM_PCSD;
1982                 wr32(E1000_RXCSUM, rxcsum);
1983         } else {
1984                 /* Enable Receive Checksum Offload for TCP and UDP */
1985                 rxcsum = rd32(E1000_RXCSUM);
1986                 if (adapter->rx_csum) {
1987                         rxcsum |= E1000_RXCSUM_TUOFL;
1988
1989                         /* Enable IPv4 payload checksum for UDP fragments
1990                          * Must be used in conjunction with packet-split. */
1991                         if (adapter->rx_ps_hdr_size)
1992                                 rxcsum |= E1000_RXCSUM_IPPCSE;
1993                 } else {
1994                         rxcsum &= ~E1000_RXCSUM_TUOFL;
1995                         /* don't need to clear IPPCSE as it defaults to 0 */
1996                 }
1997                 wr32(E1000_RXCSUM, rxcsum);
1998         }
1999
2000         if (adapter->vlgrp)
2001                 wr32(E1000_RLPML,
2002                                 adapter->max_frame_size + VLAN_TAG_SIZE);
2003         else
2004                 wr32(E1000_RLPML, adapter->max_frame_size);
2005
2006         /* Enable Receives */
2007         wr32(E1000_RCTL, rctl);
2008 }
2009
2010 /**
2011  * igb_free_tx_resources - Free Tx Resources per Queue
2012  * @adapter: board private structure
2013  * @tx_ring: Tx descriptor ring for a specific queue
2014  *
2015  * Free all transmit software resources
2016  **/
2017 static void igb_free_tx_resources(struct igb_ring *tx_ring)
2018 {
2019         struct pci_dev *pdev = tx_ring->adapter->pdev;
2020
2021         igb_clean_tx_ring(tx_ring);
2022
2023         vfree(tx_ring->buffer_info);
2024         tx_ring->buffer_info = NULL;
2025
2026         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2027
2028         tx_ring->desc = NULL;
2029 }
2030
2031 /**
2032  * igb_free_all_tx_resources - Free Tx Resources for All Queues
2033  * @adapter: board private structure
2034  *
2035  * Free all transmit software resources
2036  **/
2037 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
2038 {
2039         int i;
2040
2041         for (i = 0; i < adapter->num_tx_queues; i++)
2042                 igb_free_tx_resources(&adapter->tx_ring[i]);
2043 }
2044
2045 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
2046                                            struct igb_buffer *buffer_info)
2047 {
2048         if (buffer_info->dma) {
2049                 pci_unmap_page(adapter->pdev,
2050                                 buffer_info->dma,
2051                                 buffer_info->length,
2052                                 PCI_DMA_TODEVICE);
2053                 buffer_info->dma = 0;
2054         }
2055         if (buffer_info->skb) {
2056                 dev_kfree_skb_any(buffer_info->skb);
2057                 buffer_info->skb = NULL;
2058         }
2059         buffer_info->time_stamp = 0;
2060         /* buffer_info must be completely set up in the transmit path */
2061 }
2062
2063 /**
2064  * igb_clean_tx_ring - Free Tx Buffers
2065  * @adapter: board private structure
2066  * @tx_ring: ring to be cleaned
2067  **/
2068 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
2069 {
2070         struct igb_adapter *adapter = tx_ring->adapter;
2071         struct igb_buffer *buffer_info;
2072         unsigned long size;
2073         unsigned int i;
2074
2075         if (!tx_ring->buffer_info)
2076                 return;
2077         /* Free all the Tx ring sk_buffs */
2078
2079         for (i = 0; i < tx_ring->count; i++) {
2080                 buffer_info = &tx_ring->buffer_info[i];
2081                 igb_unmap_and_free_tx_resource(adapter, buffer_info);
2082         }
2083
2084         size = sizeof(struct igb_buffer) * tx_ring->count;
2085         memset(tx_ring->buffer_info, 0, size);
2086
2087         /* Zero out the descriptor ring */
2088
2089         memset(tx_ring->desc, 0, tx_ring->size);
2090
2091         tx_ring->next_to_use = 0;
2092         tx_ring->next_to_clean = 0;
2093
2094         writel(0, adapter->hw.hw_addr + tx_ring->head);
2095         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2096 }
2097
2098 /**
2099  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2100  * @adapter: board private structure
2101  **/
2102 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
2103 {
2104         int i;
2105
2106         for (i = 0; i < adapter->num_tx_queues; i++)
2107                 igb_clean_tx_ring(&adapter->tx_ring[i]);
2108 }
2109
2110 /**
2111  * igb_free_rx_resources - Free Rx Resources
2112  * @adapter: board private structure
2113  * @rx_ring: ring to clean the resources from
2114  *
2115  * Free all receive software resources
2116  **/
2117 static void igb_free_rx_resources(struct igb_ring *rx_ring)
2118 {
2119         struct pci_dev *pdev = rx_ring->adapter->pdev;
2120
2121         igb_clean_rx_ring(rx_ring);
2122
2123         vfree(rx_ring->buffer_info);
2124         rx_ring->buffer_info = NULL;
2125
2126 #ifdef CONFIG_IGB_LRO
2127         vfree(rx_ring->lro_mgr.lro_arr);
2128         rx_ring->lro_mgr.lro_arr = NULL;
2129 #endif
2130
2131         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2132
2133         rx_ring->desc = NULL;
2134 }
2135
2136 /**
2137  * igb_free_all_rx_resources - Free Rx Resources for All Queues
2138  * @adapter: board private structure
2139  *
2140  * Free all receive software resources
2141  **/
2142 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
2143 {
2144         int i;
2145
2146         for (i = 0; i < adapter->num_rx_queues; i++)
2147                 igb_free_rx_resources(&adapter->rx_ring[i]);
2148 }
2149
2150 /**
2151  * igb_clean_rx_ring - Free Rx Buffers per Queue
2152  * @adapter: board private structure
2153  * @rx_ring: ring to free buffers from
2154  **/
2155 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
2156 {
2157         struct igb_adapter *adapter = rx_ring->adapter;
2158         struct igb_buffer *buffer_info;
2159         struct pci_dev *pdev = adapter->pdev;
2160         unsigned long size;
2161         unsigned int i;
2162
2163         if (!rx_ring->buffer_info)
2164                 return;
2165         /* Free all the Rx ring sk_buffs */
2166         for (i = 0; i < rx_ring->count; i++) {
2167                 buffer_info = &rx_ring->buffer_info[i];
2168                 if (buffer_info->dma) {
2169                         if (adapter->rx_ps_hdr_size)
2170                                 pci_unmap_single(pdev, buffer_info->dma,
2171                                                  adapter->rx_ps_hdr_size,
2172                                                  PCI_DMA_FROMDEVICE);
2173                         else
2174                                 pci_unmap_single(pdev, buffer_info->dma,
2175                                                  adapter->rx_buffer_len,
2176                                                  PCI_DMA_FROMDEVICE);
2177                         buffer_info->dma = 0;
2178                 }
2179
2180                 if (buffer_info->skb) {
2181                         dev_kfree_skb(buffer_info->skb);
2182                         buffer_info->skb = NULL;
2183                 }
2184                 if (buffer_info->page) {
2185                         if (buffer_info->page_dma)
2186                                 pci_unmap_page(pdev, buffer_info->page_dma,
2187                                                PAGE_SIZE / 2,
2188                                                PCI_DMA_FROMDEVICE);
2189                         put_page(buffer_info->page);
2190                         buffer_info->page = NULL;
2191                         buffer_info->page_dma = 0;
2192                         buffer_info->page_offset = 0;
2193                 }
2194         }
2195
2196         size = sizeof(struct igb_buffer) * rx_ring->count;
2197         memset(rx_ring->buffer_info, 0, size);
2198
2199         /* Zero out the descriptor ring */
2200         memset(rx_ring->desc, 0, rx_ring->size);
2201
2202         rx_ring->next_to_clean = 0;
2203         rx_ring->next_to_use = 0;
2204
2205         writel(0, adapter->hw.hw_addr + rx_ring->head);
2206         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2207 }
2208
2209 /**
2210  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2211  * @adapter: board private structure
2212  **/
2213 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
2214 {
2215         int i;
2216
2217         for (i = 0; i < adapter->num_rx_queues; i++)
2218                 igb_clean_rx_ring(&adapter->rx_ring[i]);
2219 }
2220
2221 /**
2222  * igb_set_mac - Change the Ethernet Address of the NIC
2223  * @netdev: network interface device structure
2224  * @p: pointer to an address structure
2225  *
2226  * Returns 0 on success, negative on failure
2227  **/
2228 static int igb_set_mac(struct net_device *netdev, void *p)
2229 {
2230         struct igb_adapter *adapter = netdev_priv(netdev);
2231         struct sockaddr *addr = p;
2232
2233         if (!is_valid_ether_addr(addr->sa_data))
2234                 return -EADDRNOTAVAIL;
2235
2236         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2237         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2238
2239         adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2240
2241         return 0;
2242 }
2243
2244 /**
2245  * igb_set_multi - Multicast and Promiscuous mode set
2246  * @netdev: network interface device structure
2247  *
2248  * The set_multi entry point is called whenever the multicast address
2249  * list or the network interface flags are updated.  This routine is
2250  * responsible for configuring the hardware for proper multicast,
2251  * promiscuous mode, and all-multi behavior.
2252  **/
2253 static void igb_set_multi(struct net_device *netdev)
2254 {
2255         struct igb_adapter *adapter = netdev_priv(netdev);
2256         struct e1000_hw *hw = &adapter->hw;
2257         struct e1000_mac_info *mac = &hw->mac;
2258         struct dev_mc_list *mc_ptr;
2259         u8  *mta_list;
2260         u32 rctl;
2261         int i;
2262
2263         /* Check for Promiscuous and All Multicast modes */
2264
2265         rctl = rd32(E1000_RCTL);
2266
2267         if (netdev->flags & IFF_PROMISC)
2268                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2269         else if (netdev->flags & IFF_ALLMULTI) {
2270                 rctl |= E1000_RCTL_MPE;
2271                 rctl &= ~E1000_RCTL_UPE;
2272         } else
2273                 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2274
2275         wr32(E1000_RCTL, rctl);
2276
2277         if (!netdev->mc_count) {
2278                 /* nothing to program, so clear mc list */
2279                 igb_update_mc_addr_list_82575(hw, NULL, 0, 1,
2280                                           mac->rar_entry_count);
2281                 return;
2282         }
2283
2284         mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2285         if (!mta_list)
2286                 return;
2287
2288         /* The shared function expects a packed array of only addresses. */
2289         mc_ptr = netdev->mc_list;
2290
2291         for (i = 0; i < netdev->mc_count; i++) {
2292                 if (!mc_ptr)
2293                         break;
2294                 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2295                 mc_ptr = mc_ptr->next;
2296         }
2297         igb_update_mc_addr_list_82575(hw, mta_list, i, 1,
2298                                       mac->rar_entry_count);
2299         kfree(mta_list);
2300 }
2301
2302 /* Need to wait a few seconds after link up to get diagnostic information from
2303  * the phy */
2304 static void igb_update_phy_info(unsigned long data)
2305 {
2306         struct igb_adapter *adapter = (struct igb_adapter *) data;
2307         if (adapter->hw.phy.ops.get_phy_info)
2308                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
2309 }
2310
2311 /**
2312  * igb_watchdog - Timer Call-back
2313  * @data: pointer to adapter cast into an unsigned long
2314  **/
2315 static void igb_watchdog(unsigned long data)
2316 {
2317         struct igb_adapter *adapter = (struct igb_adapter *)data;
2318         /* Do the rest outside of interrupt context */
2319         schedule_work(&adapter->watchdog_task);
2320 }
2321
2322 static void igb_watchdog_task(struct work_struct *work)
2323 {
2324         struct igb_adapter *adapter = container_of(work,
2325                                         struct igb_adapter, watchdog_task);
2326         struct e1000_hw *hw = &adapter->hw;
2327
2328         struct net_device *netdev = adapter->netdev;
2329         struct igb_ring *tx_ring = adapter->tx_ring;
2330         struct e1000_mac_info *mac = &adapter->hw.mac;
2331         u32 link;
2332         s32 ret_val;
2333 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2334         int i;
2335 #endif
2336
2337         if ((netif_carrier_ok(netdev)) &&
2338             (rd32(E1000_STATUS) & E1000_STATUS_LU))
2339                 goto link_up;
2340
2341         ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2342         if ((ret_val == E1000_ERR_PHY) &&
2343             (hw->phy.type == e1000_phy_igp_3) &&
2344             (rd32(E1000_CTRL) &
2345              E1000_PHY_CTRL_GBE_DISABLE))
2346                 dev_info(&adapter->pdev->dev,
2347                          "Gigabit has been disabled, downgrading speed\n");
2348
2349         if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2350             !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2351                 link = mac->serdes_has_link;
2352         else
2353                 link = rd32(E1000_STATUS) &
2354                                       E1000_STATUS_LU;
2355
2356         if (link) {
2357                 if (!netif_carrier_ok(netdev)) {
2358                         u32 ctrl;
2359                         hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2360                                                    &adapter->link_speed,
2361                                                    &adapter->link_duplex);
2362
2363                         ctrl = rd32(E1000_CTRL);
2364                         dev_info(&adapter->pdev->dev,
2365                                  "NIC Link is Up %d Mbps %s, "
2366                                  "Flow Control: %s\n",
2367                                  adapter->link_speed,
2368                                  adapter->link_duplex == FULL_DUPLEX ?
2369                                  "Full Duplex" : "Half Duplex",
2370                                  ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2371                                  E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2372                                  E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2373                                  E1000_CTRL_TFCE) ? "TX" : "None")));
2374
2375                         /* tweak tx_queue_len according to speed/duplex and
2376                          * adjust the timeout factor */
2377                         netdev->tx_queue_len = adapter->tx_queue_len;
2378                         adapter->tx_timeout_factor = 1;
2379                         switch (adapter->link_speed) {
2380                         case SPEED_10:
2381                                 netdev->tx_queue_len = 10;
2382                                 adapter->tx_timeout_factor = 14;
2383                                 break;
2384                         case SPEED_100:
2385                                 netdev->tx_queue_len = 100;
2386                                 /* maybe add some timeout factor ? */
2387                                 break;
2388                         }
2389
2390                         netif_carrier_on(netdev);
2391                         netif_wake_queue(netdev);
2392 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2393                         for (i = 0; i < adapter->num_tx_queues; i++)
2394                                 netif_wake_subqueue(netdev, i);
2395 #endif
2396
2397                         if (!test_bit(__IGB_DOWN, &adapter->state))
2398                                 mod_timer(&adapter->phy_info_timer,
2399                                           round_jiffies(jiffies + 2 * HZ));
2400                 }
2401         } else {
2402                 if (netif_carrier_ok(netdev)) {
2403                         adapter->link_speed = 0;
2404                         adapter->link_duplex = 0;
2405                         dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2406                         netif_carrier_off(netdev);
2407                         netif_stop_queue(netdev);
2408 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2409                         for (i = 0; i < adapter->num_tx_queues; i++)
2410                                 netif_stop_subqueue(netdev, i);
2411 #endif
2412                         if (!test_bit(__IGB_DOWN, &adapter->state))
2413                                 mod_timer(&adapter->phy_info_timer,
2414                                           round_jiffies(jiffies + 2 * HZ));
2415                 }
2416         }
2417
2418 link_up:
2419         igb_update_stats(adapter);
2420
2421         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2422         adapter->tpt_old = adapter->stats.tpt;
2423         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2424         adapter->colc_old = adapter->stats.colc;
2425
2426         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2427         adapter->gorc_old = adapter->stats.gorc;
2428         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2429         adapter->gotc_old = adapter->stats.gotc;
2430
2431         igb_update_adaptive(&adapter->hw);
2432
2433         if (!netif_carrier_ok(netdev)) {
2434                 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2435                         /* We've lost link, so the controller stops DMA,
2436                          * but we've got queued Tx work that's never going
2437                          * to get done, so reset controller to flush Tx.
2438                          * (Do the reset outside of interrupt context). */
2439                         adapter->tx_timeout_count++;
2440                         schedule_work(&adapter->reset_task);
2441                 }
2442         }
2443
2444         /* Cause software interrupt to ensure rx ring is cleaned */
2445         wr32(E1000_ICS, E1000_ICS_RXDMT0);
2446
2447         /* Force detection of hung controller every watchdog period */
2448         tx_ring->detect_tx_hung = true;
2449
2450         /* Reset the timer */
2451         if (!test_bit(__IGB_DOWN, &adapter->state))
2452                 mod_timer(&adapter->watchdog_timer,
2453                           round_jiffies(jiffies + 2 * HZ));
2454 }
2455
2456 enum latency_range {
2457         lowest_latency = 0,
2458         low_latency = 1,
2459         bulk_latency = 2,
2460         latency_invalid = 255
2461 };
2462
2463
2464 static void igb_lower_rx_eitr(struct igb_adapter *adapter,
2465                               struct igb_ring *rx_ring)
2466 {
2467         struct e1000_hw *hw = &adapter->hw;
2468         int new_val;
2469
2470         new_val = rx_ring->itr_val / 2;
2471         if (new_val < IGB_MIN_DYN_ITR)
2472                 new_val = IGB_MIN_DYN_ITR;
2473
2474         if (new_val != rx_ring->itr_val) {
2475                 rx_ring->itr_val = new_val;
2476                 wr32(rx_ring->itr_register,
2477                                 1000000000 / (new_val * 256));
2478         }
2479 }
2480
2481 static void igb_raise_rx_eitr(struct igb_adapter *adapter,
2482                               struct igb_ring *rx_ring)
2483 {
2484         struct e1000_hw *hw = &adapter->hw;
2485         int new_val;
2486
2487         new_val = rx_ring->itr_val * 2;
2488         if (new_val > IGB_MAX_DYN_ITR)
2489                 new_val = IGB_MAX_DYN_ITR;
2490
2491         if (new_val != rx_ring->itr_val) {
2492                 rx_ring->itr_val = new_val;
2493                 wr32(rx_ring->itr_register,
2494                                 1000000000 / (new_val * 256));
2495         }
2496 }
2497
2498 /**
2499  * igb_update_itr - update the dynamic ITR value based on statistics
2500  *      Stores a new ITR value based on packets and byte
2501  *      counts during the last interrupt.  The advantage of per interrupt
2502  *      computation is faster updates and more accurate ITR for the current
2503  *      traffic pattern.  Constants in this function were computed
2504  *      based on theoretical maximum wire speed and thresholds were set based
2505  *      on testing data as well as attempting to minimize response time
2506  *      while increasing bulk throughput.
2507  *      this functionality is controlled by the InterruptThrottleRate module
2508  *      parameter (see igb_param.c)
2509  *      NOTE:  These calculations are only valid when operating in a single-
2510  *             queue environment.
2511  * @adapter: pointer to adapter
2512  * @itr_setting: current adapter->itr
2513  * @packets: the number of packets during this measurement interval
2514  * @bytes: the number of bytes during this measurement interval
2515  **/
2516 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2517                                    int packets, int bytes)
2518 {
2519         unsigned int retval = itr_setting;
2520
2521         if (packets == 0)
2522                 goto update_itr_done;
2523
2524         switch (itr_setting) {
2525         case lowest_latency:
2526                 /* handle TSO and jumbo frames */
2527                 if (bytes/packets > 8000)
2528                         retval = bulk_latency;
2529                 else if ((packets < 5) && (bytes > 512))
2530                         retval = low_latency;
2531                 break;
2532         case low_latency:  /* 50 usec aka 20000 ints/s */
2533                 if (bytes > 10000) {
2534                         /* this if handles the TSO accounting */
2535                         if (bytes/packets > 8000) {
2536                                 retval = bulk_latency;
2537                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2538                                 retval = bulk_latency;
2539                         } else if ((packets > 35)) {
2540                                 retval = lowest_latency;
2541                         }
2542                 } else if (bytes/packets > 2000) {
2543                         retval = bulk_latency;
2544                 } else if (packets <= 2 && bytes < 512) {
2545                         retval = lowest_latency;
2546                 }
2547                 break;
2548         case bulk_latency: /* 250 usec aka 4000 ints/s */
2549                 if (bytes > 25000) {
2550                         if (packets > 35)
2551                                 retval = low_latency;
2552                 } else if (bytes < 6000) {
2553                         retval = low_latency;
2554                 }
2555                 break;
2556         }
2557
2558 update_itr_done:
2559         return retval;
2560 }
2561
2562 static void igb_set_itr(struct igb_adapter *adapter, u16 itr_register,
2563                         int rx_only)
2564 {
2565         u16 current_itr;
2566         u32 new_itr = adapter->itr;
2567
2568         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2569         if (adapter->link_speed != SPEED_1000) {
2570                 current_itr = 0;
2571                 new_itr = 4000;
2572                 goto set_itr_now;
2573         }
2574
2575         adapter->rx_itr = igb_update_itr(adapter,
2576                                     adapter->rx_itr,
2577                                     adapter->rx_ring->total_packets,
2578                                     adapter->rx_ring->total_bytes);
2579         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2580         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2581                 adapter->rx_itr = low_latency;
2582
2583         if (!rx_only) {
2584                 adapter->tx_itr = igb_update_itr(adapter,
2585                                             adapter->tx_itr,
2586                                             adapter->tx_ring->total_packets,
2587                                             adapter->tx_ring->total_bytes);
2588                 /* conservative mode (itr 3) eliminates the
2589                  * lowest_latency setting */
2590                 if (adapter->itr_setting == 3 &&
2591                     adapter->tx_itr == lowest_latency)
2592                         adapter->tx_itr = low_latency;
2593
2594                 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2595         } else {
2596                 current_itr = adapter->rx_itr;
2597         }
2598
2599         switch (current_itr) {
2600         /* counts and packets in update_itr are dependent on these numbers */
2601         case lowest_latency:
2602                 new_itr = 70000;
2603                 break;
2604         case low_latency:
2605                 new_itr = 20000; /* aka hwitr = ~200 */
2606                 break;
2607         case bulk_latency:
2608                 new_itr = 4000;
2609                 break;
2610         default:
2611                 break;
2612         }
2613
2614 set_itr_now:
2615         if (new_itr != adapter->itr) {
2616                 /* this attempts to bias the interrupt rate towards Bulk
2617                  * by adding intermediate steps when interrupt rate is
2618                  * increasing */
2619                 new_itr = new_itr > adapter->itr ?
2620                              min(adapter->itr + (new_itr >> 2), new_itr) :
2621                              new_itr;
2622                 /* Don't write the value here; it resets the adapter's
2623                  * internal timer, and causes us to delay far longer than
2624                  * we should between interrupts.  Instead, we write the ITR
2625                  * value at the beginning of the next interrupt so the timing
2626                  * ends up being correct.
2627                  */
2628                 adapter->itr = new_itr;
2629                 adapter->set_itr = 1;
2630         }
2631
2632         return;
2633 }
2634
2635
2636 #define IGB_TX_FLAGS_CSUM               0x00000001
2637 #define IGB_TX_FLAGS_VLAN               0x00000002
2638 #define IGB_TX_FLAGS_TSO                0x00000004
2639 #define IGB_TX_FLAGS_IPV4               0x00000008
2640 #define IGB_TX_FLAGS_VLAN_MASK  0xffff0000
2641 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2642
2643 static inline int igb_tso_adv(struct igb_adapter *adapter,
2644                               struct igb_ring *tx_ring,
2645                               struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2646 {
2647         struct e1000_adv_tx_context_desc *context_desc;
2648         unsigned int i;
2649         int err;
2650         struct igb_buffer *buffer_info;
2651         u32 info = 0, tu_cmd = 0;
2652         u32 mss_l4len_idx, l4len;
2653         *hdr_len = 0;
2654
2655         if (skb_header_cloned(skb)) {
2656                 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2657                 if (err)
2658                         return err;
2659         }
2660
2661         l4len = tcp_hdrlen(skb);
2662         *hdr_len += l4len;
2663
2664         if (skb->protocol == htons(ETH_P_IP)) {
2665                 struct iphdr *iph = ip_hdr(skb);
2666                 iph->tot_len = 0;
2667                 iph->check = 0;
2668                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2669                                                          iph->daddr, 0,
2670                                                          IPPROTO_TCP,
2671                                                          0);
2672         } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2673                 ipv6_hdr(skb)->payload_len = 0;
2674                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2675                                                        &ipv6_hdr(skb)->daddr,
2676                                                        0, IPPROTO_TCP, 0);
2677         }
2678
2679         i = tx_ring->next_to_use;
2680
2681         buffer_info = &tx_ring->buffer_info[i];
2682         context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2683         /* VLAN MACLEN IPLEN */
2684         if (tx_flags & IGB_TX_FLAGS_VLAN)
2685                 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2686         info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2687         *hdr_len += skb_network_offset(skb);
2688         info |= skb_network_header_len(skb);
2689         *hdr_len += skb_network_header_len(skb);
2690         context_desc->vlan_macip_lens = cpu_to_le32(info);
2691
2692         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2693         tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2694
2695         if (skb->protocol == htons(ETH_P_IP))
2696                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2697         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2698
2699         context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2700
2701         /* MSS L4LEN IDX */
2702         mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2703         mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2704
2705         /* Context index must be unique per ring. */
2706         if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2707                 mss_l4len_idx |= tx_ring->queue_index << 4;
2708
2709         context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2710         context_desc->seqnum_seed = 0;
2711
2712         buffer_info->time_stamp = jiffies;
2713         buffer_info->dma = 0;
2714         i++;
2715         if (i == tx_ring->count)
2716                 i = 0;
2717
2718         tx_ring->next_to_use = i;
2719
2720         return true;
2721 }
2722
2723 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2724                                         struct igb_ring *tx_ring,
2725                                         struct sk_buff *skb, u32 tx_flags)
2726 {
2727         struct e1000_adv_tx_context_desc *context_desc;
2728         unsigned int i;
2729         struct igb_buffer *buffer_info;
2730         u32 info = 0, tu_cmd = 0;
2731
2732         if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2733             (tx_flags & IGB_TX_FLAGS_VLAN)) {
2734                 i = tx_ring->next_to_use;
2735                 buffer_info = &tx_ring->buffer_info[i];
2736                 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2737
2738                 if (tx_flags & IGB_TX_FLAGS_VLAN)
2739                         info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2740                 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2741                 if (skb->ip_summed == CHECKSUM_PARTIAL)
2742                         info |= skb_network_header_len(skb);
2743
2744                 context_desc->vlan_macip_lens = cpu_to_le32(info);
2745
2746                 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2747
2748                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2749                         switch (skb->protocol) {
2750                         case __constant_htons(ETH_P_IP):
2751                                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2752                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2753                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2754                                 break;
2755                         case __constant_htons(ETH_P_IPV6):
2756                                 /* XXX what about other V6 headers?? */
2757                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2758                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2759                                 break;
2760                         default:
2761                                 if (unlikely(net_ratelimit()))
2762                                         dev_warn(&adapter->pdev->dev,
2763                                             "partial checksum but proto=%x!\n",
2764                                             skb->protocol);
2765                                 break;
2766                         }
2767                 }
2768
2769                 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2770                 context_desc->seqnum_seed = 0;
2771                 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2772                         context_desc->mss_l4len_idx =
2773                                 cpu_to_le32(tx_ring->queue_index << 4);
2774
2775                 buffer_info->time_stamp = jiffies;
2776                 buffer_info->dma = 0;
2777
2778                 i++;
2779                 if (i == tx_ring->count)
2780                         i = 0;
2781                 tx_ring->next_to_use = i;
2782
2783                 return true;
2784         }
2785
2786
2787         return false;
2788 }
2789
2790 #define IGB_MAX_TXD_PWR 16
2791 #define IGB_MAX_DATA_PER_TXD    (1<<IGB_MAX_TXD_PWR)
2792
2793 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2794                                  struct igb_ring *tx_ring,
2795                                  struct sk_buff *skb)
2796 {
2797         struct igb_buffer *buffer_info;
2798         unsigned int len = skb_headlen(skb);
2799         unsigned int count = 0, i;
2800         unsigned int f;
2801
2802         i = tx_ring->next_to_use;
2803
2804         buffer_info = &tx_ring->buffer_info[i];
2805         BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2806         buffer_info->length = len;
2807         /* set time_stamp *before* dma to help avoid a possible race */
2808         buffer_info->time_stamp = jiffies;
2809         buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2810                                           PCI_DMA_TODEVICE);
2811         count++;
2812         i++;
2813         if (i == tx_ring->count)
2814                 i = 0;
2815
2816         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2817                 struct skb_frag_struct *frag;
2818
2819                 frag = &skb_shinfo(skb)->frags[f];
2820                 len = frag->size;
2821
2822                 buffer_info = &tx_ring->buffer_info[i];
2823                 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2824                 buffer_info->length = len;
2825                 buffer_info->time_stamp = jiffies;
2826                 buffer_info->dma = pci_map_page(adapter->pdev,
2827                                                 frag->page,
2828                                                 frag->page_offset,
2829                                                 len,
2830                                                 PCI_DMA_TODEVICE);
2831
2832                 count++;
2833                 i++;
2834                 if (i == tx_ring->count)
2835                         i = 0;
2836         }
2837
2838         i = (i == 0) ? tx_ring->count - 1 : i - 1;
2839         tx_ring->buffer_info[i].skb = skb;
2840
2841         return count;
2842 }
2843
2844 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2845                                     struct igb_ring *tx_ring,
2846                                     int tx_flags, int count, u32 paylen,
2847                                     u8 hdr_len)
2848 {
2849         union e1000_adv_tx_desc *tx_desc = NULL;
2850         struct igb_buffer *buffer_info;
2851         u32 olinfo_status = 0, cmd_type_len;
2852         unsigned int i;
2853
2854         cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2855                         E1000_ADVTXD_DCMD_DEXT);
2856
2857         if (tx_flags & IGB_TX_FLAGS_VLAN)
2858                 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2859
2860         if (tx_flags & IGB_TX_FLAGS_TSO) {
2861                 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2862
2863                 /* insert tcp checksum */
2864                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2865
2866                 /* insert ip checksum */
2867                 if (tx_flags & IGB_TX_FLAGS_IPV4)
2868                         olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2869
2870         } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2871                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2872         }
2873
2874         if ((adapter->flags & IGB_FLAG_NEED_CTX_IDX) &&
2875             (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2876                          IGB_TX_FLAGS_VLAN)))
2877                 olinfo_status |= tx_ring->queue_index << 4;
2878
2879         olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2880
2881         i = tx_ring->next_to_use;
2882         while (count--) {
2883                 buffer_info = &tx_ring->buffer_info[i];
2884                 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2885                 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2886                 tx_desc->read.cmd_type_len =
2887                         cpu_to_le32(cmd_type_len | buffer_info->length);
2888                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2889                 i++;
2890                 if (i == tx_ring->count)
2891                         i = 0;
2892         }
2893
2894         tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2895         /* Force memory writes to complete before letting h/w
2896          * know there are new descriptors to fetch.  (Only
2897          * applicable for weak-ordered memory model archs,
2898          * such as IA-64). */
2899         wmb();
2900
2901         tx_ring->next_to_use = i;
2902         writel(i, adapter->hw.hw_addr + tx_ring->tail);
2903         /* we need this if more than one processor can write to our tail
2904          * at a time, it syncronizes IO on IA64/Altix systems */
2905         mmiowb();
2906 }
2907
2908 static int __igb_maybe_stop_tx(struct net_device *netdev,
2909                                struct igb_ring *tx_ring, int size)
2910 {
2911         struct igb_adapter *adapter = netdev_priv(netdev);
2912
2913 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2914         netif_stop_subqueue(netdev, tx_ring->queue_index);
2915 #else
2916         netif_stop_queue(netdev);
2917 #endif
2918
2919         /* Herbert's original patch had:
2920          *  smp_mb__after_netif_stop_queue();
2921          * but since that doesn't exist yet, just open code it. */
2922         smp_mb();
2923
2924         /* We need to check again in a case another CPU has just
2925          * made room available. */
2926         if (IGB_DESC_UNUSED(tx_ring) < size)
2927                 return -EBUSY;
2928
2929         /* A reprieve! */
2930 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2931         netif_wake_subqueue(netdev, tx_ring->queue_index);
2932 #else
2933         netif_wake_queue(netdev);
2934 #endif
2935         ++adapter->restart_queue;
2936         return 0;
2937 }
2938
2939 static int igb_maybe_stop_tx(struct net_device *netdev,
2940                              struct igb_ring *tx_ring, int size)
2941 {
2942         if (IGB_DESC_UNUSED(tx_ring) >= size)
2943                 return 0;
2944         return __igb_maybe_stop_tx(netdev, tx_ring, size);
2945 }
2946
2947 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2948
2949 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2950                                    struct net_device *netdev,
2951                                    struct igb_ring *tx_ring)
2952 {
2953         struct igb_adapter *adapter = netdev_priv(netdev);
2954         unsigned int tx_flags = 0;
2955         unsigned int len;
2956         u8 hdr_len = 0;
2957         int tso = 0;
2958
2959         len = skb_headlen(skb);
2960
2961         if (test_bit(__IGB_DOWN, &adapter->state)) {
2962                 dev_kfree_skb_any(skb);
2963                 return NETDEV_TX_OK;
2964         }
2965
2966         if (skb->len <= 0) {
2967                 dev_kfree_skb_any(skb);
2968                 return NETDEV_TX_OK;
2969         }
2970
2971         /* need: 1 descriptor per page,
2972          *       + 2 desc gap to keep tail from touching head,
2973          *       + 1 desc for skb->data,
2974          *       + 1 desc for context descriptor,
2975          * otherwise try next time */
2976         if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2977                 /* this is a hard error */
2978                 return NETDEV_TX_BUSY;
2979         }
2980
2981         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2982                 tx_flags |= IGB_TX_FLAGS_VLAN;
2983                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2984         }
2985
2986         if (skb->protocol == htons(ETH_P_IP))
2987                 tx_flags |= IGB_TX_FLAGS_IPV4;
2988
2989         tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2990                                               &hdr_len) : 0;
2991
2992         if (tso < 0) {
2993                 dev_kfree_skb_any(skb);
2994                 return NETDEV_TX_OK;
2995         }
2996
2997         if (tso)
2998                 tx_flags |= IGB_TX_FLAGS_TSO;
2999         else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
3000                         if (skb->ip_summed == CHECKSUM_PARTIAL)
3001                                 tx_flags |= IGB_TX_FLAGS_CSUM;
3002
3003         igb_tx_queue_adv(adapter, tx_ring, tx_flags,
3004                          igb_tx_map_adv(adapter, tx_ring, skb),
3005                          skb->len, hdr_len);
3006
3007         netdev->trans_start = jiffies;
3008
3009         /* Make sure there is space in the ring for the next send. */
3010         igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
3011
3012         return NETDEV_TX_OK;
3013 }
3014
3015 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
3016 {
3017         struct igb_adapter *adapter = netdev_priv(netdev);
3018         struct igb_ring *tx_ring;
3019
3020 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3021         int r_idx = 0;
3022         r_idx = skb->queue_mapping & (IGB_MAX_TX_QUEUES - 1);
3023         tx_ring = adapter->multi_tx_table[r_idx];
3024 #else
3025         tx_ring = &adapter->tx_ring[0];
3026 #endif
3027
3028
3029         /* This goes back to the question of how to logically map a tx queue
3030          * to a flow.  Right now, performance is impacted slightly negatively
3031          * if using multiple tx queues.  If the stack breaks away from a
3032          * single qdisc implementation, we can look at this again. */
3033         return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
3034 }
3035
3036 /**
3037  * igb_tx_timeout - Respond to a Tx Hang
3038  * @netdev: network interface device structure
3039  **/
3040 static void igb_tx_timeout(struct net_device *netdev)
3041 {
3042         struct igb_adapter *adapter = netdev_priv(netdev);
3043         struct e1000_hw *hw = &adapter->hw;
3044
3045         /* Do the reset outside of interrupt context */
3046         adapter->tx_timeout_count++;
3047         schedule_work(&adapter->reset_task);
3048         wr32(E1000_EICS, adapter->eims_enable_mask &
3049                 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
3050 }
3051
3052 static void igb_reset_task(struct work_struct *work)
3053 {
3054         struct igb_adapter *adapter;
3055         adapter = container_of(work, struct igb_adapter, reset_task);
3056
3057         igb_reinit_locked(adapter);
3058 }
3059
3060 /**
3061  * igb_get_stats - Get System Network Statistics
3062  * @netdev: network interface device structure
3063  *
3064  * Returns the address of the device statistics structure.
3065  * The statistics are actually updated from the timer callback.
3066  **/
3067 static struct net_device_stats *
3068 igb_get_stats(struct net_device *netdev)
3069 {
3070         struct igb_adapter *adapter = netdev_priv(netdev);
3071
3072         /* only return the current stats */
3073         return &adapter->net_stats;
3074 }
3075
3076 /**
3077  * igb_change_mtu - Change the Maximum Transfer Unit
3078  * @netdev: network interface device structure
3079  * @new_mtu: new value for maximum frame size
3080  *
3081  * Returns 0 on success, negative on failure
3082  **/
3083 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
3084 {
3085         struct igb_adapter *adapter = netdev_priv(netdev);
3086         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3087
3088         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
3089             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3090                 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
3091                 return -EINVAL;
3092         }
3093
3094 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3095         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3096                 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
3097                 return -EINVAL;
3098         }
3099
3100         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
3101                 msleep(1);
3102         /* igb_down has a dependency on max_frame_size */
3103         adapter->max_frame_size = max_frame;
3104         if (netif_running(netdev))
3105                 igb_down(adapter);
3106
3107         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3108          * means we reserve 2 more, this pushes us to allocate from the next
3109          * larger slab size.
3110          * i.e. RXBUFFER_2048 --> size-4096 slab
3111          */
3112
3113         if (max_frame <= IGB_RXBUFFER_256)
3114                 adapter->rx_buffer_len = IGB_RXBUFFER_256;
3115         else if (max_frame <= IGB_RXBUFFER_512)
3116                 adapter->rx_buffer_len = IGB_RXBUFFER_512;
3117         else if (max_frame <= IGB_RXBUFFER_1024)
3118                 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
3119         else if (max_frame <= IGB_RXBUFFER_2048)
3120                 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
3121         else
3122 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3123                 adapter->rx_buffer_len = IGB_RXBUFFER_16384;
3124 #else
3125                 adapter->rx_buffer_len = PAGE_SIZE / 2;
3126 #endif
3127         /* adjust allocation if LPE protects us, and we aren't using SBP */
3128         if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
3129              (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
3130                 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3131
3132         dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
3133                  netdev->mtu, new_mtu);
3134         netdev->mtu = new_mtu;
3135
3136         if (netif_running(netdev))
3137                 igb_up(adapter);
3138         else
3139                 igb_reset(adapter);
3140
3141         clear_bit(__IGB_RESETTING, &adapter->state);
3142
3143         return 0;
3144 }
3145
3146 /**
3147  * igb_update_stats - Update the board statistics counters
3148  * @adapter: board private structure
3149  **/
3150
3151 void igb_update_stats(struct igb_adapter *adapter)
3152 {
3153         struct e1000_hw *hw = &adapter->hw;
3154         struct pci_dev *pdev = adapter->pdev;
3155         u16 phy_tmp;
3156
3157 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3158
3159         /*
3160          * Prevent stats update while adapter is being reset, or if the pci
3161          * connection is down.
3162          */
3163         if (adapter->link_speed == 0)
3164                 return;
3165         if (pci_channel_offline(pdev))
3166                 return;
3167
3168         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
3169         adapter->stats.gprc += rd32(E1000_GPRC);
3170         adapter->stats.gorc += rd32(E1000_GORCL);
3171         rd32(E1000_GORCH); /* clear GORCL */
3172         adapter->stats.bprc += rd32(E1000_BPRC);
3173         adapter->stats.mprc += rd32(E1000_MPRC);
3174         adapter->stats.roc += rd32(E1000_ROC);
3175
3176         adapter->stats.prc64 += rd32(E1000_PRC64);
3177         adapter->stats.prc127 += rd32(E1000_PRC127);
3178         adapter->stats.prc255 += rd32(E1000_PRC255);
3179         adapter->stats.prc511 += rd32(E1000_PRC511);
3180         adapter->stats.prc1023 += rd32(E1000_PRC1023);
3181         adapter->stats.prc1522 += rd32(E1000_PRC1522);
3182         adapter->stats.symerrs += rd32(E1000_SYMERRS);
3183         adapter->stats.sec += rd32(E1000_SEC);
3184
3185         adapter->stats.mpc += rd32(E1000_MPC);
3186         adapter->stats.scc += rd32(E1000_SCC);
3187         adapter->stats.ecol += rd32(E1000_ECOL);
3188         adapter->stats.mcc += rd32(E1000_MCC);
3189         adapter->stats.latecol += rd32(E1000_LATECOL);
3190         adapter->stats.dc += rd32(E1000_DC);
3191         adapter->stats.rlec += rd32(E1000_RLEC);
3192         adapter->stats.xonrxc += rd32(E1000_XONRXC);
3193         adapter->stats.xontxc += rd32(E1000_XONTXC);
3194         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
3195         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
3196         adapter->stats.fcruc += rd32(E1000_FCRUC);
3197         adapter->stats.gptc += rd32(E1000_GPTC);
3198         adapter->stats.gotc += rd32(E1000_GOTCL);
3199         rd32(E1000_GOTCH); /* clear GOTCL */
3200         adapter->stats.rnbc += rd32(E1000_RNBC);
3201         adapter->stats.ruc += rd32(E1000_RUC);
3202         adapter->stats.rfc += rd32(E1000_RFC);
3203         adapter->stats.rjc += rd32(E1000_RJC);
3204         adapter->stats.tor += rd32(E1000_TORH);
3205         adapter->stats.tot += rd32(E1000_TOTH);
3206         adapter->stats.tpr += rd32(E1000_TPR);
3207
3208         adapter->stats.ptc64 += rd32(E1000_PTC64);
3209         adapter->stats.ptc127 += rd32(E1000_PTC127);
3210         adapter->stats.ptc255 += rd32(E1000_PTC255);
3211         adapter->stats.ptc511 += rd32(E1000_PTC511);
3212         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
3213         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
3214
3215         adapter->stats.mptc += rd32(E1000_MPTC);
3216         adapter->stats.bptc += rd32(E1000_BPTC);
3217
3218         /* used for adaptive IFS */
3219
3220         hw->mac.tx_packet_delta = rd32(E1000_TPT);
3221         adapter->stats.tpt += hw->mac.tx_packet_delta;
3222         hw->mac.collision_delta = rd32(E1000_COLC);
3223         adapter->stats.colc += hw->mac.collision_delta;
3224
3225         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
3226         adapter->stats.rxerrc += rd32(E1000_RXERRC);
3227         adapter->stats.tncrs += rd32(E1000_TNCRS);
3228         adapter->stats.tsctc += rd32(E1000_TSCTC);
3229         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
3230
3231         adapter->stats.iac += rd32(E1000_IAC);
3232         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
3233         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
3234         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
3235         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
3236         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
3237         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
3238         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
3239         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
3240
3241         /* Fill out the OS statistics structure */
3242         adapter->net_stats.multicast = adapter->stats.mprc;
3243         adapter->net_stats.collisions = adapter->stats.colc;
3244
3245         /* Rx Errors */
3246
3247         /* RLEC on some newer hardware can be incorrect so build
3248         * our own version based on RUC and ROC */
3249         adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3250                 adapter->stats.crcerrs + adapter->stats.algnerrc +
3251                 adapter->stats.ruc + adapter->stats.roc +
3252                 adapter->stats.cexterr;
3253         adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3254                                               adapter->stats.roc;
3255         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3256         adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3257         adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3258
3259         /* Tx Errors */
3260         adapter->net_stats.tx_errors = adapter->stats.ecol +
3261                                        adapter->stats.latecol;
3262         adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3263         adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3264         adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3265
3266         /* Tx Dropped needs to be maintained elsewhere */
3267
3268         /* Phy Stats */
3269         if (hw->phy.media_type == e1000_media_type_copper) {
3270                 if ((adapter->link_speed == SPEED_1000) &&
3271                    (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS,
3272                                               &phy_tmp))) {
3273                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3274                         adapter->phy_stats.idle_errors += phy_tmp;
3275                 }
3276         }
3277
3278         /* Management Stats */
3279         adapter->stats.mgptc += rd32(E1000_MGTPTC);
3280         adapter->stats.mgprc += rd32(E1000_MGTPRC);
3281         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3282 }
3283
3284
3285 static irqreturn_t igb_msix_other(int irq, void *data)
3286 {
3287         struct net_device *netdev = data;
3288         struct igb_adapter *adapter = netdev_priv(netdev);
3289         struct e1000_hw *hw = &adapter->hw;
3290         u32 icr = rd32(E1000_ICR);
3291
3292         /* reading ICR causes bit 31 of EICR to be cleared */
3293         if (!(icr & E1000_ICR_LSC))
3294                 goto no_link_interrupt;
3295         hw->mac.get_link_status = 1;
3296         /* guard against interrupt when we're going down */
3297         if (!test_bit(__IGB_DOWN, &adapter->state))
3298                 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3299
3300 no_link_interrupt:
3301         wr32(E1000_IMS, E1000_IMS_LSC);
3302         wr32(E1000_EIMS, adapter->eims_other);
3303
3304         return IRQ_HANDLED;
3305 }
3306
3307 static irqreturn_t igb_msix_tx(int irq, void *data)
3308 {
3309         struct igb_ring *tx_ring = data;
3310         struct igb_adapter *adapter = tx_ring->adapter;
3311         struct e1000_hw *hw = &adapter->hw;
3312
3313         if (!tx_ring->itr_val)
3314                 wr32(E1000_EIMC, tx_ring->eims_value);
3315 #ifdef CONFIG_DCA
3316         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3317                 igb_update_tx_dca(tx_ring);
3318 #endif
3319         tx_ring->total_bytes = 0;
3320         tx_ring->total_packets = 0;
3321
3322         /* auto mask will automatically reenable the interrupt when we write
3323          * EICS */
3324         if (!igb_clean_tx_irq(tx_ring))
3325                 /* Ring was not completely cleaned, so fire another interrupt */
3326                 wr32(E1000_EICS, tx_ring->eims_value);
3327         else
3328                 wr32(E1000_EIMS, tx_ring->eims_value);
3329
3330         return IRQ_HANDLED;
3331 }
3332
3333 static irqreturn_t igb_msix_rx(int irq, void *data)
3334 {
3335         struct igb_ring *rx_ring = data;
3336         struct igb_adapter *adapter = rx_ring->adapter;
3337         struct e1000_hw *hw = &adapter->hw;
3338
3339         /* Write the ITR value calculated at the end of the
3340          * previous interrupt.
3341          */
3342
3343         if (adapter->set_itr) {
3344                 wr32(rx_ring->itr_register,
3345                      1000000000 / (rx_ring->itr_val * 256));
3346                 adapter->set_itr = 0;
3347         }
3348
3349         if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi))
3350                 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3351
3352 #ifdef CONFIG_DCA
3353         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3354                 igb_update_rx_dca(rx_ring);
3355 #endif
3356                 return IRQ_HANDLED;
3357 }
3358
3359 #ifdef CONFIG_DCA
3360 static void igb_update_rx_dca(struct igb_ring *rx_ring)
3361 {
3362         u32 dca_rxctrl;
3363         struct igb_adapter *adapter = rx_ring->adapter;
3364         struct e1000_hw *hw = &adapter->hw;
3365         int cpu = get_cpu();
3366         int q = rx_ring - adapter->rx_ring;
3367
3368         if (rx_ring->cpu != cpu) {
3369                 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
3370                 if (hw->mac.type == e1000_82576) {
3371                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
3372                         dca_rxctrl |= dca_get_tag(cpu) <<
3373                                       E1000_DCA_RXCTRL_CPUID_SHIFT;
3374                 } else {
3375                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
3376                         dca_rxctrl |= dca_get_tag(cpu);
3377                 }
3378                 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
3379                 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
3380                 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
3381                 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
3382                 rx_ring->cpu = cpu;
3383         }
3384         put_cpu();
3385 }
3386
3387 static void igb_update_tx_dca(struct igb_ring *tx_ring)
3388 {
3389         u32 dca_txctrl;
3390         struct igb_adapter *adapter = tx_ring->adapter;
3391         struct e1000_hw *hw = &adapter->hw;
3392         int cpu = get_cpu();
3393         int q = tx_ring - adapter->tx_ring;
3394
3395         if (tx_ring->cpu != cpu) {
3396                 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
3397                 if (hw->mac.type == e1000_82576) {
3398                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
3399                         dca_txctrl |= dca_get_tag(cpu) <<
3400                                       E1000_DCA_TXCTRL_CPUID_SHIFT;
3401                 } else {
3402                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
3403                         dca_txctrl |= dca_get_tag(cpu);
3404                 }
3405                 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
3406                 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
3407                 tx_ring->cpu = cpu;
3408         }
3409         put_cpu();
3410 }
3411
3412 static void igb_setup_dca(struct igb_adapter *adapter)
3413 {
3414         int i;
3415
3416         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
3417                 return;
3418
3419         for (i = 0; i < adapter->num_tx_queues; i++) {
3420                 adapter->tx_ring[i].cpu = -1;
3421                 igb_update_tx_dca(&adapter->tx_ring[i]);
3422         }
3423         for (i = 0; i < adapter->num_rx_queues; i++) {
3424                 adapter->rx_ring[i].cpu = -1;
3425                 igb_update_rx_dca(&adapter->rx_ring[i]);
3426         }
3427 }
3428
3429 static int __igb_notify_dca(struct device *dev, void *data)
3430 {
3431         struct net_device *netdev = dev_get_drvdata(dev);
3432         struct igb_adapter *adapter = netdev_priv(netdev);
3433         struct e1000_hw *hw = &adapter->hw;
3434         unsigned long event = *(unsigned long *)data;
3435
3436         if (!(adapter->flags & IGB_FLAG_HAS_DCA))
3437                 goto out;
3438
3439         switch (event) {
3440         case DCA_PROVIDER_ADD:
3441                 /* if already enabled, don't do it again */
3442                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3443                         break;
3444                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3445                 /* Always use CB2 mode, difference is masked
3446                  * in the CB driver. */
3447                 wr32(E1000_DCA_CTRL, 2);
3448                 if (dca_add_requester(dev) == 0) {
3449                         dev_info(&adapter->pdev->dev, "DCA enabled\n");
3450                         igb_setup_dca(adapter);
3451                         break;
3452                 }
3453                 /* Fall Through since DCA is disabled. */
3454         case DCA_PROVIDER_REMOVE:
3455                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3456                         /* without this a class_device is left
3457                          * hanging around in the sysfs model */
3458                         dca_remove_requester(dev);
3459                         dev_info(&adapter->pdev->dev, "DCA disabled\n");
3460                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3461                         wr32(E1000_DCA_CTRL, 1);
3462                 }
3463                 break;
3464         }
3465 out:
3466         return 0;
3467 }
3468
3469 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
3470                           void *p)
3471 {
3472         int ret_val;
3473
3474         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
3475                                          __igb_notify_dca);
3476
3477         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3478 }
3479 #endif /* CONFIG_DCA */
3480
3481 /**
3482  * igb_intr_msi - Interrupt Handler
3483  * @irq: interrupt number
3484  * @data: pointer to a network interface device structure
3485  **/
3486 static irqreturn_t igb_intr_msi(int irq, void *data)
3487 {
3488         struct net_device *netdev = data;
3489         struct igb_adapter *adapter = netdev_priv(netdev);
3490         struct e1000_hw *hw = &adapter->hw;
3491         /* read ICR disables interrupts using IAM */
3492         u32 icr = rd32(E1000_ICR);
3493
3494         /* Write the ITR value calculated at the end of the
3495          * previous interrupt.
3496          */
3497         if (adapter->set_itr) {
3498                 wr32(E1000_ITR, 1000000000 / (adapter->itr * 256));
3499                 adapter->set_itr = 0;
3500         }
3501
3502         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3503                 hw->mac.get_link_status = 1;
3504                 if (!test_bit(__IGB_DOWN, &adapter->state))
3505                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3506         }
3507
3508         netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3509
3510         return IRQ_HANDLED;
3511 }
3512
3513 /**
3514  * igb_intr - Interrupt Handler
3515  * @irq: interrupt number
3516  * @data: pointer to a network interface device structure
3517  **/
3518 static irqreturn_t igb_intr(int irq, void *data)
3519 {
3520         struct net_device *netdev = data;
3521         struct igb_adapter *adapter = netdev_priv(netdev);
3522         struct e1000_hw *hw = &adapter->hw;
3523         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
3524          * need for the IMC write */
3525         u32 icr = rd32(E1000_ICR);
3526         u32 eicr = 0;
3527         if (!icr)
3528                 return IRQ_NONE;  /* Not our interrupt */
3529
3530         /* Write the ITR value calculated at the end of the
3531          * previous interrupt.
3532          */
3533         if (adapter->set_itr) {
3534                 wr32(E1000_ITR, 1000000000 / (adapter->itr * 256));
3535                 adapter->set_itr = 0;
3536         }
3537
3538         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3539          * not set, then the adapter didn't send an interrupt */
3540         if (!(icr & E1000_ICR_INT_ASSERTED))
3541                 return IRQ_NONE;
3542
3543         eicr = rd32(E1000_EICR);
3544
3545         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3546                 hw->mac.get_link_status = 1;
3547                 /* guard against interrupt when we're going down */
3548                 if (!test_bit(__IGB_DOWN, &adapter->state))
3549                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3550         }
3551
3552         netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3553
3554         return IRQ_HANDLED;
3555 }
3556
3557 /**
3558  * igb_poll - NAPI Rx polling callback
3559  * @napi: napi polling structure
3560  * @budget: count of how many packets we should handle
3561  **/
3562 static int igb_poll(struct napi_struct *napi, int budget)
3563 {
3564         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3565         struct igb_adapter *adapter = rx_ring->adapter;
3566         struct net_device *netdev = adapter->netdev;
3567         int tx_clean_complete, work_done = 0;
3568
3569         /* this poll routine only supports one tx and one rx queue */
3570 #ifdef CONFIG_DCA
3571         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3572                 igb_update_tx_dca(&adapter->tx_ring[0]);
3573 #endif
3574         tx_clean_complete = igb_clean_tx_irq(&adapter->tx_ring[0]);
3575
3576 #ifdef CONFIG_DCA
3577         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3578                 igb_update_rx_dca(&adapter->rx_ring[0]);
3579 #endif
3580         igb_clean_rx_irq_adv(&adapter->rx_ring[0], &work_done, budget);
3581
3582         /* If no Tx and not enough Rx work done, exit the polling mode */
3583         if ((tx_clean_complete && (work_done < budget)) ||
3584             !netif_running(netdev)) {
3585                 if (adapter->itr_setting & 3)
3586                         igb_set_itr(adapter, E1000_ITR, false);
3587                 netif_rx_complete(netdev, napi);
3588                 if (!test_bit(__IGB_DOWN, &adapter->state))
3589                         igb_irq_enable(adapter);
3590                 return 0;
3591         }
3592
3593         return 1;
3594 }
3595
3596 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3597 {
3598         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3599         struct igb_adapter *adapter = rx_ring->adapter;
3600         struct e1000_hw *hw = &adapter->hw;
3601         struct net_device *netdev = adapter->netdev;
3602         int work_done = 0;
3603
3604         /* Keep link state information with original netdev */
3605         if (!netif_carrier_ok(netdev))
3606                 goto quit_polling;
3607
3608 #ifdef CONFIG_DCA
3609         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3610                 igb_update_rx_dca(rx_ring);
3611 #endif
3612         igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
3613
3614
3615         /* If not enough Rx work done, exit the polling mode */
3616         if ((work_done == 0) || !netif_running(netdev)) {
3617 quit_polling:
3618                 netif_rx_complete(netdev, napi);
3619
3620                 wr32(E1000_EIMS, rx_ring->eims_value);
3621                 if ((adapter->itr_setting & 3) && !rx_ring->no_itr_adjust &&
3622                     (rx_ring->total_packets > IGB_DYN_ITR_PACKET_THRESHOLD)) {
3623                         int mean_size = rx_ring->total_bytes /
3624                                         rx_ring->total_packets;
3625                         if (mean_size < IGB_DYN_ITR_LENGTH_LOW)
3626                                 igb_raise_rx_eitr(adapter, rx_ring);
3627                         else if (mean_size > IGB_DYN_ITR_LENGTH_HIGH)
3628                                 igb_lower_rx_eitr(adapter, rx_ring);
3629                 }
3630
3631                 if (!test_bit(__IGB_DOWN, &adapter->state))
3632                         wr32(E1000_EIMS, rx_ring->eims_value);
3633
3634                 return 0;
3635         }
3636
3637         return 1;
3638 }
3639
3640 static inline u32 get_head(struct igb_ring *tx_ring)
3641 {
3642         void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
3643         return le32_to_cpu(*(volatile __le32 *)end);
3644 }
3645
3646 /**
3647  * igb_clean_tx_irq - Reclaim resources after transmit completes
3648  * @adapter: board private structure
3649  * returns true if ring is completely cleaned
3650  **/
3651 static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
3652 {
3653         struct igb_adapter *adapter = tx_ring->adapter;
3654         struct e1000_hw *hw = &adapter->hw;
3655         struct net_device *netdev = adapter->netdev;
3656         struct e1000_tx_desc *tx_desc;
3657         struct igb_buffer *buffer_info;
3658         struct sk_buff *skb;
3659         unsigned int i;
3660         u32 head, oldhead;
3661         unsigned int count = 0;
3662         bool cleaned = false;
3663         bool retval = true;
3664         unsigned int total_bytes = 0, total_packets = 0;
3665
3666         rmb();
3667         head = get_head(tx_ring);
3668         i = tx_ring->next_to_clean;
3669         while (1) {
3670                 while (i != head) {
3671                         cleaned = true;
3672                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3673                         buffer_info = &tx_ring->buffer_info[i];
3674                         skb = buffer_info->skb;
3675
3676                         if (skb) {
3677                                 unsigned int segs, bytecount;
3678                                 /* gso_segs is currently only valid for tcp */
3679                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
3680                                 /* multiply data chunks by size of headers */
3681                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
3682                                             skb->len;
3683                                 total_packets += segs;
3684                                 total_bytes += bytecount;
3685                         }
3686
3687                         igb_unmap_and_free_tx_resource(adapter, buffer_info);
3688                         tx_desc->upper.data = 0;
3689
3690                         i++;
3691                         if (i == tx_ring->count)
3692                                 i = 0;
3693
3694                         count++;
3695                         if (count == IGB_MAX_TX_CLEAN) {
3696                                 retval = false;
3697                                 goto done_cleaning;
3698                         }
3699                 }
3700                 oldhead = head;
3701                 rmb();
3702                 head = get_head(tx_ring);
3703                 if (head == oldhead)
3704                         goto done_cleaning;
3705         }  /* while (1) */
3706
3707 done_cleaning:
3708         tx_ring->next_to_clean = i;
3709
3710         if (unlikely(cleaned &&
3711                      netif_carrier_ok(netdev) &&
3712                      IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3713                 /* Make sure that anybody stopping the queue after this
3714                  * sees the new next_to_clean.
3715                  */
3716                 smp_mb();
3717 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3718                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
3719                     !(test_bit(__IGB_DOWN, &adapter->state))) {
3720                         netif_wake_subqueue(netdev, tx_ring->queue_index);
3721                         ++adapter->restart_queue;
3722                 }
3723 #else
3724                 if (netif_queue_stopped(netdev) &&
3725                     !(test_bit(__IGB_DOWN, &adapter->state))) {
3726                         netif_wake_queue(netdev);
3727                         ++adapter->restart_queue;
3728                 }
3729 #endif
3730         }
3731
3732         if (tx_ring->detect_tx_hung) {
3733                 /* Detect a transmit hang in hardware, this serializes the
3734                  * check with the clearing of time_stamp and movement of i */
3735                 tx_ring->detect_tx_hung = false;
3736                 if (tx_ring->buffer_info[i].time_stamp &&
3737                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3738                                (adapter->tx_timeout_factor * HZ))
3739                     && !(rd32(E1000_STATUS) &
3740                          E1000_STATUS_TXOFF)) {
3741
3742                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3743                         /* detected Tx unit hang */
3744                         dev_err(&adapter->pdev->dev,
3745                                 "Detected Tx Unit Hang\n"
3746                                 "  Tx Queue             <%d>\n"
3747                                 "  TDH                  <%x>\n"
3748                                 "  TDT                  <%x>\n"
3749                                 "  next_to_use          <%x>\n"
3750                                 "  next_to_clean        <%x>\n"
3751                                 "  head (WB)            <%x>\n"
3752                                 "buffer_info[next_to_clean]\n"
3753                                 "  time_stamp           <%lx>\n"
3754                                 "  jiffies              <%lx>\n"
3755                                 "  desc.status          <%x>\n",
3756                                 tx_ring->queue_index,
3757                                 readl(adapter->hw.hw_addr + tx_ring->head),
3758                                 readl(adapter->hw.hw_addr + tx_ring->tail),
3759                                 tx_ring->next_to_use,
3760                                 tx_ring->next_to_clean,
3761                                 head,
3762                                 tx_ring->buffer_info[i].time_stamp,
3763                                 jiffies,
3764                                 tx_desc->upper.fields.status);
3765 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3766                         netif_stop_subqueue(netdev, tx_ring->queue_index);
3767 #else
3768                         netif_stop_queue(netdev);
3769 #endif
3770                 }
3771         }
3772         tx_ring->total_bytes += total_bytes;
3773         tx_ring->total_packets += total_packets;
3774         tx_ring->tx_stats.bytes += total_bytes;
3775         tx_ring->tx_stats.packets += total_packets;
3776         adapter->net_stats.tx_bytes += total_bytes;
3777         adapter->net_stats.tx_packets += total_packets;
3778         return retval;
3779 }
3780
3781 #ifdef CONFIG_IGB_LRO
3782  /**
3783  * igb_get_skb_hdr - helper function for LRO header processing
3784  * @skb: pointer to sk_buff to be added to LRO packet
3785  * @iphdr: pointer to ip header structure
3786  * @tcph: pointer to tcp header structure
3787  * @hdr_flags: pointer to header flags
3788  * @priv: pointer to the receive descriptor for the current sk_buff
3789  **/
3790 static int igb_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
3791                            u64 *hdr_flags, void *priv)
3792 {
3793         union e1000_adv_rx_desc *rx_desc = priv;
3794         u16 pkt_type = rx_desc->wb.lower.lo_dword.pkt_info &
3795                        (E1000_RXDADV_PKTTYPE_IPV4 | E1000_RXDADV_PKTTYPE_TCP);
3796
3797         /* Verify that this is a valid IPv4 TCP packet */
3798         if (pkt_type != (E1000_RXDADV_PKTTYPE_IPV4 |
3799                           E1000_RXDADV_PKTTYPE_TCP))
3800                 return -1;
3801
3802         /* Set network headers */
3803         skb_reset_network_header(skb);
3804         skb_set_transport_header(skb, ip_hdrlen(skb));
3805         *iphdr = ip_hdr(skb);
3806         *tcph = tcp_hdr(skb);
3807         *hdr_flags = LRO_IPV4 | LRO_TCP;
3808
3809         return 0;
3810
3811 }
3812 #endif /* CONFIG_IGB_LRO */
3813
3814 /**
3815  * igb_receive_skb - helper function to handle rx indications
3816  * @ring: pointer to receive ring receving this packet
3817  * @status: descriptor status field as written by hardware
3818  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3819  * @skb: pointer to sk_buff to be indicated to stack
3820  **/
3821 static void igb_receive_skb(struct igb_ring *ring, u8 status,
3822                             union e1000_adv_rx_desc * rx_desc,
3823                             struct sk_buff *skb)
3824 {
3825         struct igb_adapter * adapter = ring->adapter;
3826         bool vlan_extracted = (adapter->vlgrp && (status & E1000_RXD_STAT_VP));
3827
3828 #ifdef CONFIG_IGB_LRO
3829         if (adapter->netdev->features & NETIF_F_LRO &&
3830             skb->ip_summed == CHECKSUM_UNNECESSARY) {
3831                 if (vlan_extracted)
3832                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
3833                                            adapter->vlgrp,
3834                                            le16_to_cpu(rx_desc->wb.upper.vlan),
3835                                            rx_desc);
3836                 else
3837                         lro_receive_skb(&ring->lro_mgr,skb, rx_desc);
3838                 ring->lro_used = 1;
3839         } else {
3840 #endif
3841                 if (vlan_extracted)
3842                         vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3843                                           le16_to_cpu(rx_desc->wb.upper.vlan));
3844                 else
3845
3846                         netif_receive_skb(skb);
3847 #ifdef CONFIG_IGB_LRO
3848         }
3849 #endif
3850 }
3851
3852
3853 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3854                                        u32 status_err, struct sk_buff *skb)
3855 {
3856         skb->ip_summed = CHECKSUM_NONE;
3857
3858         /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3859         if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3860                 return;
3861         /* TCP/UDP checksum error bit is set */
3862         if (status_err &
3863             (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3864                 /* let the stack verify checksum errors */
3865                 adapter->hw_csum_err++;
3866                 return;
3867         }
3868         /* It must be a TCP or UDP packet with a valid checksum */
3869         if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3870                 skb->ip_summed = CHECKSUM_UNNECESSARY;
3871
3872         adapter->hw_csum_good++;
3873 }
3874
3875 static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
3876                                  int *work_done, int budget)
3877 {
3878         struct igb_adapter *adapter = rx_ring->adapter;
3879         struct net_device *netdev = adapter->netdev;
3880         struct pci_dev *pdev = adapter->pdev;
3881         union e1000_adv_rx_desc *rx_desc , *next_rxd;
3882         struct igb_buffer *buffer_info , *next_buffer;
3883         struct sk_buff *skb;
3884         unsigned int i;
3885         u32 length, hlen, staterr;
3886         bool cleaned = false;
3887         int cleaned_count = 0;
3888         unsigned int total_bytes = 0, total_packets = 0;
3889
3890         i = rx_ring->next_to_clean;
3891         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3892         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3893
3894         while (staterr & E1000_RXD_STAT_DD) {
3895                 if (*work_done >= budget)
3896                         break;
3897                 (*work_done)++;
3898                 buffer_info = &rx_ring->buffer_info[i];
3899
3900                 /* HW will not DMA in data larger than the given buffer, even
3901                  * if it parses the (NFS, of course) header to be larger.  In
3902                  * that case, it fills the header buffer and spills the rest
3903                  * into the page.
3904                  */
3905                 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3906                   E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
3907                 if (hlen > adapter->rx_ps_hdr_size)
3908                         hlen = adapter->rx_ps_hdr_size;
3909
3910                 length = le16_to_cpu(rx_desc->wb.upper.length);
3911                 cleaned = true;
3912                 cleaned_count++;
3913
3914                 skb = buffer_info->skb;
3915                 prefetch(skb->data - NET_IP_ALIGN);
3916                 buffer_info->skb = NULL;
3917                 if (!adapter->rx_ps_hdr_size) {
3918                         pci_unmap_single(pdev, buffer_info->dma,
3919                                          adapter->rx_buffer_len +
3920                                            NET_IP_ALIGN,
3921                                          PCI_DMA_FROMDEVICE);
3922                         skb_put(skb, length);
3923                         goto send_up;
3924                 }
3925
3926                 if (!skb_shinfo(skb)->nr_frags) {
3927                         pci_unmap_single(pdev, buffer_info->dma,
3928                                          adapter->rx_ps_hdr_size +
3929                                            NET_IP_ALIGN,
3930                                          PCI_DMA_FROMDEVICE);
3931                         skb_put(skb, hlen);
3932                 }
3933
3934                 if (length) {
3935                         pci_unmap_page(pdev, buffer_info->page_dma,
3936                                        PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
3937                         buffer_info->page_dma = 0;
3938
3939                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
3940                                                 buffer_info->page,
3941                                                 buffer_info->page_offset,
3942                                                 length);
3943
3944                         if ((adapter->rx_buffer_len > (PAGE_SIZE / 2)) ||
3945                             (page_count(buffer_info->page) != 1))
3946                                 buffer_info->page = NULL;
3947                         else
3948                                 get_page(buffer_info->page);
3949
3950                         skb->len += length;
3951                         skb->data_len += length;
3952
3953                         skb->truesize += length;
3954                 }
3955 send_up:
3956                 i++;
3957                 if (i == rx_ring->count)
3958                         i = 0;
3959                 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3960                 prefetch(next_rxd);
3961                 next_buffer = &rx_ring->buffer_info[i];
3962
3963                 if (!(staterr & E1000_RXD_STAT_EOP)) {
3964                         buffer_info->skb = xchg(&next_buffer->skb, skb);
3965                         buffer_info->dma = xchg(&next_buffer->dma, 0);
3966                         goto next_desc;
3967                 }
3968
3969                 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3970                         dev_kfree_skb_irq(skb);
3971                         goto next_desc;
3972                 }
3973                 rx_ring->no_itr_adjust |= (staterr & E1000_RXD_STAT_DYNINT);
3974
3975                 total_bytes += skb->len;
3976                 total_packets++;
3977
3978                 igb_rx_checksum_adv(adapter, staterr, skb);
3979
3980                 skb->protocol = eth_type_trans(skb, netdev);
3981
3982                 igb_receive_skb(rx_ring, staterr, rx_desc, skb);
3983
3984                 netdev->last_rx = jiffies;
3985
3986 next_desc:
3987                 rx_desc->wb.upper.status_error = 0;
3988
3989                 /* return some buffers to hardware, one at a time is too slow */
3990                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
3991                         igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3992                         cleaned_count = 0;
3993                 }
3994
3995                 /* use prefetched values */
3996                 rx_desc = next_rxd;
3997                 buffer_info = next_buffer;
3998
3999                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
4000         }
4001
4002         rx_ring->next_to_clean = i;
4003         cleaned_count = IGB_DESC_UNUSED(rx_ring);
4004
4005 #ifdef CONFIG_IGB_LRO
4006         if (rx_ring->lro_used) {
4007                 lro_flush_all(&rx_ring->lro_mgr);
4008                 rx_ring->lro_used = 0;
4009         }
4010 #endif
4011
4012         if (cleaned_count)
4013                 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
4014
4015         rx_ring->total_packets += total_packets;
4016         rx_ring->total_bytes += total_bytes;
4017         rx_ring->rx_stats.packets += total_packets;
4018         rx_ring->rx_stats.bytes += total_bytes;
4019         adapter->net_stats.rx_bytes += total_bytes;
4020         adapter->net_stats.rx_packets += total_packets;
4021         return cleaned;
4022 }
4023
4024
4025 /**
4026  * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
4027  * @adapter: address of board private structure
4028  **/
4029 static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
4030                                      int cleaned_count)
4031 {
4032         struct igb_adapter *adapter = rx_ring->adapter;
4033         struct net_device *netdev = adapter->netdev;
4034         struct pci_dev *pdev = adapter->pdev;
4035         union e1000_adv_rx_desc *rx_desc;
4036         struct igb_buffer *buffer_info;
4037         struct sk_buff *skb;
4038         unsigned int i;
4039
4040         i = rx_ring->next_to_use;
4041         buffer_info = &rx_ring->buffer_info[i];
4042
4043         while (cleaned_count--) {
4044                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
4045
4046                 if (adapter->rx_ps_hdr_size && !buffer_info->page_dma) {
4047                         if (!buffer_info->page) {
4048                                 buffer_info->page = alloc_page(GFP_ATOMIC);
4049                                 if (!buffer_info->page) {
4050                                         adapter->alloc_rx_buff_failed++;
4051                                         goto no_buffers;
4052                                 }
4053                                 buffer_info->page_offset = 0;
4054                         } else {
4055                                 buffer_info->page_offset ^= PAGE_SIZE / 2;
4056                         }
4057                         buffer_info->page_dma =
4058                                 pci_map_page(pdev,
4059                                              buffer_info->page,
4060                                              buffer_info->page_offset,
4061                                              PAGE_SIZE / 2,
4062                                              PCI_DMA_FROMDEVICE);
4063                 }
4064
4065                 if (!buffer_info->skb) {
4066                         int bufsz;
4067
4068                         if (adapter->rx_ps_hdr_size)
4069                                 bufsz = adapter->rx_ps_hdr_size;
4070                         else
4071                                 bufsz = adapter->rx_buffer_len;
4072                         bufsz += NET_IP_ALIGN;
4073                         skb = netdev_alloc_skb(netdev, bufsz);
4074
4075                         if (!skb) {
4076                                 adapter->alloc_rx_buff_failed++;
4077                                 goto no_buffers;
4078                         }
4079
4080                         /* Make buffer alignment 2 beyond a 16 byte boundary
4081                          * this will result in a 16 byte aligned IP header after
4082                          * the 14 byte MAC header is removed
4083                          */
4084                         skb_reserve(skb, NET_IP_ALIGN);
4085
4086                         buffer_info->skb = skb;
4087                         buffer_info->dma = pci_map_single(pdev, skb->data,
4088                                                           bufsz,
4089                                                           PCI_DMA_FROMDEVICE);
4090
4091                 }
4092                 /* Refresh the desc even if buffer_addrs didn't change because
4093                  * each write-back erases this info. */
4094                 if (adapter->rx_ps_hdr_size) {
4095                         rx_desc->read.pkt_addr =
4096                              cpu_to_le64(buffer_info->page_dma);
4097                         rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
4098                 } else {
4099                         rx_desc->read.pkt_addr =
4100                              cpu_to_le64(buffer_info->dma);
4101                         rx_desc->read.hdr_addr = 0;
4102                 }
4103
4104                 i++;
4105                 if (i == rx_ring->count)
4106                         i = 0;
4107                 buffer_info = &rx_ring->buffer_info[i];
4108         }
4109
4110 no_buffers:
4111         if (rx_ring->next_to_use != i) {
4112                 rx_ring->next_to_use = i;
4113                 if (i == 0)
4114                         i = (rx_ring->count - 1);
4115                 else
4116                         i--;
4117
4118                 /* Force memory writes to complete before letting h/w
4119                  * know there are new descriptors to fetch.  (Only
4120                  * applicable for weak-ordered memory model archs,
4121                  * such as IA-64). */
4122                 wmb();
4123                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
4124         }
4125 }
4126
4127 /**
4128  * igb_mii_ioctl -
4129  * @netdev:
4130  * @ifreq:
4131  * @cmd:
4132  **/
4133 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4134 {
4135         struct igb_adapter *adapter = netdev_priv(netdev);
4136         struct mii_ioctl_data *data = if_mii(ifr);
4137
4138         if (adapter->hw.phy.media_type != e1000_media_type_copper)
4139                 return -EOPNOTSUPP;
4140
4141         switch (cmd) {
4142         case SIOCGMIIPHY:
4143                 data->phy_id = adapter->hw.phy.addr;
4144                 break;
4145         case SIOCGMIIREG:
4146                 if (!capable(CAP_NET_ADMIN))
4147                         return -EPERM;
4148                 if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw,
4149                                                      data->reg_num
4150                                                      & 0x1F, &data->val_out))
4151                         return -EIO;
4152                 break;
4153         case SIOCSMIIREG:
4154         default:
4155                 return -EOPNOTSUPP;
4156         }
4157         return 0;
4158 }
4159
4160 /**
4161  * igb_ioctl -
4162  * @netdev:
4163  * @ifreq:
4164  * @cmd:
4165  **/
4166 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4167 {
4168         switch (cmd) {
4169         case SIOCGMIIPHY:
4170         case SIOCGMIIREG:
4171         case SIOCSMIIREG:
4172                 return igb_mii_ioctl(netdev, ifr, cmd);
4173         default:
4174                 return -EOPNOTSUPP;
4175         }
4176 }
4177
4178 static void igb_vlan_rx_register(struct net_device *netdev,
4179                                  struct vlan_group *grp)
4180 {
4181         struct igb_adapter *adapter = netdev_priv(netdev);
4182         struct e1000_hw *hw = &adapter->hw;
4183         u32 ctrl, rctl;
4184
4185         igb_irq_disable(adapter);
4186         adapter->vlgrp = grp;
4187
4188         if (grp) {
4189                 /* enable VLAN tag insert/strip */
4190                 ctrl = rd32(E1000_CTRL);
4191                 ctrl |= E1000_CTRL_VME;
4192                 wr32(E1000_CTRL, ctrl);
4193
4194                 /* enable VLAN receive filtering */
4195                 rctl = rd32(E1000_RCTL);
4196                 rctl |= E1000_RCTL_VFE;
4197                 rctl &= ~E1000_RCTL_CFIEN;
4198                 wr32(E1000_RCTL, rctl);
4199                 igb_update_mng_vlan(adapter);
4200                 wr32(E1000_RLPML,
4201                                 adapter->max_frame_size + VLAN_TAG_SIZE);
4202         } else {
4203                 /* disable VLAN tag insert/strip */
4204                 ctrl = rd32(E1000_CTRL);
4205                 ctrl &= ~E1000_CTRL_VME;
4206                 wr32(E1000_CTRL, ctrl);
4207
4208                 /* disable VLAN filtering */
4209                 rctl = rd32(E1000_RCTL);
4210                 rctl &= ~E1000_RCTL_VFE;
4211                 wr32(E1000_RCTL, rctl);
4212                 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
4213                         igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4214                         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
4215                 }
4216                 wr32(E1000_RLPML,
4217                                 adapter->max_frame_size);
4218         }
4219
4220         if (!test_bit(__IGB_DOWN, &adapter->state))
4221                 igb_irq_enable(adapter);
4222 }
4223
4224 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4225 {
4226         struct igb_adapter *adapter = netdev_priv(netdev);
4227         struct e1000_hw *hw = &adapter->hw;
4228         u32 vfta, index;
4229
4230         if ((adapter->hw.mng_cookie.status &
4231              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4232             (vid == adapter->mng_vlan_id))
4233                 return;
4234         /* add VID to filter table */
4235         index = (vid >> 5) & 0x7F;
4236         vfta = array_rd32(E1000_VFTA, index);
4237         vfta |= (1 << (vid & 0x1F));
4238         igb_write_vfta(&adapter->hw, index, vfta);
4239 }
4240
4241 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4242 {
4243         struct igb_adapter *adapter = netdev_priv(netdev);
4244         struct e1000_hw *hw = &adapter->hw;
4245         u32 vfta, index;
4246
4247         igb_irq_disable(adapter);
4248         vlan_group_set_device(adapter->vlgrp, vid, NULL);
4249
4250         if (!test_bit(__IGB_DOWN, &adapter->state))
4251                 igb_irq_enable(adapter);
4252
4253         if ((adapter->hw.mng_cookie.status &
4254              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4255             (vid == adapter->mng_vlan_id)) {
4256                 /* release control to f/w */
4257                 igb_release_hw_control(adapter);
4258                 return;
4259         }
4260
4261         /* remove VID from filter table */
4262         index = (vid >> 5) & 0x7F;
4263         vfta = array_rd32(E1000_VFTA, index);
4264         vfta &= ~(1 << (vid & 0x1F));
4265         igb_write_vfta(&adapter->hw, index, vfta);
4266 }
4267
4268 static void igb_restore_vlan(struct igb_adapter *adapter)
4269 {
4270         igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4271
4272         if (adapter->vlgrp) {
4273                 u16 vid;
4274                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4275                         if (!vlan_group_get_device(adapter->vlgrp, vid))
4276                                 continue;
4277                         igb_vlan_rx_add_vid(adapter->netdev, vid);
4278                 }
4279         }
4280 }
4281
4282 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
4283 {
4284         struct e1000_mac_info *mac = &adapter->hw.mac;
4285
4286         mac->autoneg = 0;
4287
4288         /* Fiber NICs only allow 1000 gbps Full duplex */
4289         if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
4290                 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4291                 dev_err(&adapter->pdev->dev,
4292                         "Unsupported Speed/Duplex configuration\n");
4293                 return -EINVAL;
4294         }
4295
4296         switch (spddplx) {
4297         case SPEED_10 + DUPLEX_HALF:
4298                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
4299                 break;
4300         case SPEED_10 + DUPLEX_FULL:
4301                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
4302                 break;
4303         case SPEED_100 + DUPLEX_HALF:
4304                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
4305                 break;
4306         case SPEED_100 + DUPLEX_FULL:
4307                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
4308                 break;
4309         case SPEED_1000 + DUPLEX_FULL:
4310                 mac->autoneg = 1;
4311                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
4312                 break;
4313         case SPEED_1000 + DUPLEX_HALF: /* not supported */
4314         default:
4315                 dev_err(&adapter->pdev->dev,
4316                         "Unsupported Speed/Duplex configuration\n");
4317                 return -EINVAL;
4318         }
4319         return 0;
4320 }
4321
4322
4323 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
4324 {
4325         struct net_device *netdev = pci_get_drvdata(pdev);
4326         struct igb_adapter *adapter = netdev_priv(netdev);
4327         struct e1000_hw *hw = &adapter->hw;
4328         u32 ctrl, rctl, status;
4329         u32 wufc = adapter->wol;
4330 #ifdef CONFIG_PM
4331         int retval = 0;
4332 #endif
4333
4334         netif_device_detach(netdev);
4335
4336         if (netif_running(netdev))
4337                 igb_close(netdev);
4338
4339         igb_reset_interrupt_capability(adapter);
4340
4341         igb_free_queues(adapter);
4342
4343 #ifdef CONFIG_PM
4344         retval = pci_save_state(pdev);
4345         if (retval)
4346                 return retval;
4347 #endif
4348
4349         status = rd32(E1000_STATUS);
4350         if (status & E1000_STATUS_LU)
4351                 wufc &= ~E1000_WUFC_LNKC;
4352
4353         if (wufc) {
4354                 igb_setup_rctl(adapter);
4355                 igb_set_multi(netdev);
4356
4357                 /* turn on all-multi mode if wake on multicast is enabled */
4358                 if (wufc & E1000_WUFC_MC) {
4359                         rctl = rd32(E1000_RCTL);
4360                         rctl |= E1000_RCTL_MPE;
4361                         wr32(E1000_RCTL, rctl);
4362                 }
4363
4364                 ctrl = rd32(E1000_CTRL);
4365                 /* advertise wake from D3Cold */
4366                 #define E1000_CTRL_ADVD3WUC 0x00100000
4367                 /* phy power management enable */
4368                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4369                 ctrl |= E1000_CTRL_ADVD3WUC;
4370                 wr32(E1000_CTRL, ctrl);
4371
4372                 /* Allow time for pending master requests to run */
4373                 igb_disable_pcie_master(&adapter->hw);
4374
4375                 wr32(E1000_WUC, E1000_WUC_PME_EN);
4376                 wr32(E1000_WUFC, wufc);
4377         } else {
4378                 wr32(E1000_WUC, 0);
4379                 wr32(E1000_WUFC, 0);
4380         }
4381
4382         /* make sure adapter isn't asleep if manageability/wol is enabled */
4383         if (wufc || adapter->en_mng_pt) {
4384                 pci_enable_wake(pdev, PCI_D3hot, 1);
4385                 pci_enable_wake(pdev, PCI_D3cold, 1);
4386         } else {
4387                 igb_shutdown_fiber_serdes_link_82575(hw);
4388                 pci_enable_wake(pdev, PCI_D3hot, 0);
4389                 pci_enable_wake(pdev, PCI_D3cold, 0);
4390         }
4391
4392         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
4393          * would have already happened in close and is redundant. */
4394         igb_release_hw_control(adapter);
4395
4396         pci_disable_device(pdev);
4397
4398         pci_set_power_state(pdev, pci_choose_state(pdev, state));
4399
4400         return 0;
4401 }
4402
4403 #ifdef CONFIG_PM
4404 static int igb_resume(struct pci_dev *pdev)
4405 {
4406         struct net_device *netdev = pci_get_drvdata(pdev);
4407         struct igb_adapter *adapter = netdev_priv(netdev);
4408         struct e1000_hw *hw = &adapter->hw;
4409         u32 err;
4410
4411         pci_set_power_state(pdev, PCI_D0);
4412         pci_restore_state(pdev);
4413
4414         if (adapter->need_ioport)
4415                 err = pci_enable_device(pdev);
4416         else
4417                 err = pci_enable_device_mem(pdev);
4418         if (err) {
4419                 dev_err(&pdev->dev,
4420                         "igb: Cannot enable PCI device from suspend\n");
4421                 return err;
4422         }
4423         pci_set_master(pdev);
4424
4425         pci_enable_wake(pdev, PCI_D3hot, 0);
4426         pci_enable_wake(pdev, PCI_D3cold, 0);
4427
4428         igb_set_interrupt_capability(adapter);
4429
4430         if (igb_alloc_queues(adapter)) {
4431                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4432                 return -ENOMEM;
4433         }
4434
4435         /* e1000_power_up_phy(adapter); */
4436
4437         igb_reset(adapter);
4438         wr32(E1000_WUS, ~0);
4439
4440         if (netif_running(netdev)) {
4441                 err = igb_open(netdev);
4442                 if (err)
4443                         return err;
4444         }
4445
4446         netif_device_attach(netdev);
4447
4448         /* let the f/w know that the h/w is now under the control of the
4449          * driver. */
4450         igb_get_hw_control(adapter);
4451
4452         return 0;
4453 }
4454 #endif
4455
4456 static void igb_shutdown(struct pci_dev *pdev)
4457 {
4458         igb_suspend(pdev, PMSG_SUSPEND);
4459 }
4460
4461 #ifdef CONFIG_NET_POLL_CONTROLLER
4462 /*
4463  * Polling 'interrupt' - used by things like netconsole to send skbs
4464  * without having to re-enable interrupts. It's not called while
4465  * the interrupt routine is executing.
4466  */
4467 static void igb_netpoll(struct net_device *netdev)
4468 {
4469         struct igb_adapter *adapter = netdev_priv(netdev);
4470         int i;
4471         int work_done = 0;
4472
4473         igb_irq_disable(adapter);
4474         adapter->flags |= IGB_FLAG_IN_NETPOLL;
4475
4476         for (i = 0; i < adapter->num_tx_queues; i++)
4477                 igb_clean_tx_irq(&adapter->tx_ring[i]);
4478
4479         for (i = 0; i < adapter->num_rx_queues; i++)
4480                 igb_clean_rx_irq_adv(&adapter->rx_ring[i],
4481                                      &work_done,
4482                                      adapter->rx_ring[i].napi.weight);
4483
4484         adapter->flags &= ~IGB_FLAG_IN_NETPOLL;
4485         igb_irq_enable(adapter);
4486 }
4487 #endif /* CONFIG_NET_POLL_CONTROLLER */
4488
4489 /**
4490  * igb_io_error_detected - called when PCI error is detected
4491  * @pdev: Pointer to PCI device
4492  * @state: The current pci connection state
4493  *
4494  * This function is called after a PCI bus error affecting
4495  * this device has been detected.
4496  */
4497 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4498                                               pci_channel_state_t state)
4499 {
4500         struct net_device *netdev = pci_get_drvdata(pdev);
4501         struct igb_adapter *adapter = netdev_priv(netdev);
4502
4503         netif_device_detach(netdev);
4504
4505         if (netif_running(netdev))
4506                 igb_down(adapter);
4507         pci_disable_device(pdev);
4508
4509         /* Request a slot slot reset. */
4510         return PCI_ERS_RESULT_NEED_RESET;
4511 }
4512
4513 /**
4514  * igb_io_slot_reset - called after the pci bus has been reset.
4515  * @pdev: Pointer to PCI device
4516  *
4517  * Restart the card from scratch, as if from a cold-boot. Implementation
4518  * resembles the first-half of the igb_resume routine.
4519  */
4520 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4521 {
4522         struct net_device *netdev = pci_get_drvdata(pdev);
4523         struct igb_adapter *adapter = netdev_priv(netdev);
4524         struct e1000_hw *hw = &adapter->hw;
4525         int err;
4526
4527         if (adapter->need_ioport)
4528                 err = pci_enable_device(pdev);
4529         else
4530                 err = pci_enable_device_mem(pdev);
4531         if (err) {
4532                 dev_err(&pdev->dev,
4533                         "Cannot re-enable PCI device after reset.\n");
4534                 return PCI_ERS_RESULT_DISCONNECT;
4535         }
4536         pci_set_master(pdev);
4537         pci_restore_state(pdev);
4538
4539         pci_enable_wake(pdev, PCI_D3hot, 0);
4540         pci_enable_wake(pdev, PCI_D3cold, 0);
4541
4542         igb_reset(adapter);
4543         wr32(E1000_WUS, ~0);
4544
4545         return PCI_ERS_RESULT_RECOVERED;
4546 }
4547
4548 /**
4549  * igb_io_resume - called when traffic can start flowing again.
4550  * @pdev: Pointer to PCI device
4551  *
4552  * This callback is called when the error recovery driver tells us that
4553  * its OK to resume normal operation. Implementation resembles the
4554  * second-half of the igb_resume routine.
4555  */
4556 static void igb_io_resume(struct pci_dev *pdev)
4557 {
4558         struct net_device *netdev = pci_get_drvdata(pdev);
4559         struct igb_adapter *adapter = netdev_priv(netdev);
4560
4561         igb_init_manageability(adapter);
4562
4563         if (netif_running(netdev)) {
4564                 if (igb_up(adapter)) {
4565                         dev_err(&pdev->dev, "igb_up failed after reset\n");
4566                         return;
4567                 }
4568         }
4569
4570         netif_device_attach(netdev);
4571
4572         /* let the f/w know that the h/w is now under the control of the
4573          * driver. */
4574         igb_get_hw_control(adapter);
4575
4576 }
4577
4578 /* igb_main.c */