1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/mii.h>
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/pci.h>
41 #include <linux/delay.h>
42 #include <linux/interrupt.h>
43 #include <linux/if_ether.h>
47 #define DRV_VERSION "1.0.8-k2"
48 char igb_driver_name[] = "igb";
49 char igb_driver_version[] = DRV_VERSION;
50 static const char igb_driver_string[] =
51 "Intel(R) Gigabit Ethernet Network Driver";
52 static const char igb_copyright[] = "Copyright (c) 2007 Intel Corporation.";
55 static const struct e1000_info *igb_info_tbl[] = {
56 [board_82575] = &e1000_82575_info,
59 static struct pci_device_id igb_pci_tbl[] = {
60 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
61 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
62 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
63 /* required last entry */
67 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
69 void igb_reset(struct igb_adapter *);
70 static int igb_setup_all_tx_resources(struct igb_adapter *);
71 static int igb_setup_all_rx_resources(struct igb_adapter *);
72 static void igb_free_all_tx_resources(struct igb_adapter *);
73 static void igb_free_all_rx_resources(struct igb_adapter *);
74 static void igb_free_tx_resources(struct igb_ring *);
75 static void igb_free_rx_resources(struct igb_ring *);
76 void igb_update_stats(struct igb_adapter *);
77 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
78 static void __devexit igb_remove(struct pci_dev *pdev);
79 static int igb_sw_init(struct igb_adapter *);
80 static int igb_open(struct net_device *);
81 static int igb_close(struct net_device *);
82 static void igb_configure_tx(struct igb_adapter *);
83 static void igb_configure_rx(struct igb_adapter *);
84 static void igb_setup_rctl(struct igb_adapter *);
85 static void igb_clean_all_tx_rings(struct igb_adapter *);
86 static void igb_clean_all_rx_rings(struct igb_adapter *);
87 static void igb_clean_tx_ring(struct igb_ring *);
88 static void igb_clean_rx_ring(struct igb_ring *);
89 static void igb_set_multi(struct net_device *);
90 static void igb_update_phy_info(unsigned long);
91 static void igb_watchdog(unsigned long);
92 static void igb_watchdog_task(struct work_struct *);
93 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
95 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
96 static struct net_device_stats *igb_get_stats(struct net_device *);
97 static int igb_change_mtu(struct net_device *, int);
98 static int igb_set_mac(struct net_device *, void *);
99 static irqreturn_t igb_intr(int irq, void *);
100 static irqreturn_t igb_intr_msi(int irq, void *);
101 static irqreturn_t igb_msix_other(int irq, void *);
102 static irqreturn_t igb_msix_rx(int irq, void *);
103 static irqreturn_t igb_msix_tx(int irq, void *);
104 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
105 static bool igb_clean_tx_irq(struct igb_ring *);
106 static int igb_clean(struct napi_struct *, int);
107 static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
108 static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
109 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
110 static void igb_tx_timeout(struct net_device *);
111 static void igb_reset_task(struct work_struct *);
112 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
113 static void igb_vlan_rx_add_vid(struct net_device *, u16);
114 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
115 static void igb_restore_vlan(struct igb_adapter *);
117 static int igb_suspend(struct pci_dev *, pm_message_t);
119 static int igb_resume(struct pci_dev *);
121 static void igb_shutdown(struct pci_dev *);
123 #ifdef CONFIG_NET_POLL_CONTROLLER
124 /* for netdump / net console */
125 static void igb_netpoll(struct net_device *);
128 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
129 pci_channel_state_t);
130 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
131 static void igb_io_resume(struct pci_dev *);
133 static struct pci_error_handlers igb_err_handler = {
134 .error_detected = igb_io_error_detected,
135 .slot_reset = igb_io_slot_reset,
136 .resume = igb_io_resume,
140 static struct pci_driver igb_driver = {
141 .name = igb_driver_name,
142 .id_table = igb_pci_tbl,
144 .remove = __devexit_p(igb_remove),
146 /* Power Managment Hooks */
147 .suspend = igb_suspend,
148 .resume = igb_resume,
150 .shutdown = igb_shutdown,
151 .err_handler = &igb_err_handler
154 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
155 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
156 MODULE_LICENSE("GPL");
157 MODULE_VERSION(DRV_VERSION);
161 * igb_get_hw_dev_name - return device name string
162 * used by hardware layer to print debugging information
164 char *igb_get_hw_dev_name(struct e1000_hw *hw)
166 struct igb_adapter *adapter = hw->back;
167 return adapter->netdev->name;
172 * igb_init_module - Driver Registration Routine
174 * igb_init_module is the first routine called when the driver is
175 * loaded. All it does is register with the PCI subsystem.
177 static int __init igb_init_module(void)
180 printk(KERN_INFO "%s - version %s\n",
181 igb_driver_string, igb_driver_version);
183 printk(KERN_INFO "%s\n", igb_copyright);
185 ret = pci_register_driver(&igb_driver);
189 module_init(igb_init_module);
192 * igb_exit_module - Driver Exit Cleanup Routine
194 * igb_exit_module is called just before the driver is removed
197 static void __exit igb_exit_module(void)
199 pci_unregister_driver(&igb_driver);
202 module_exit(igb_exit_module);
205 * igb_alloc_queues - Allocate memory for all rings
206 * @adapter: board private structure to initialize
208 * We allocate one ring per queue at run-time since we don't know the
209 * number of queues at compile-time.
211 static int igb_alloc_queues(struct igb_adapter *adapter)
215 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
216 sizeof(struct igb_ring), GFP_KERNEL);
217 if (!adapter->tx_ring)
220 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
221 sizeof(struct igb_ring), GFP_KERNEL);
222 if (!adapter->rx_ring) {
223 kfree(adapter->tx_ring);
227 for (i = 0; i < adapter->num_rx_queues; i++) {
228 struct igb_ring *ring = &(adapter->rx_ring[i]);
229 ring->adapter = adapter;
230 ring->itr_register = E1000_ITR;
232 if (!ring->napi.poll)
233 netif_napi_add(adapter->netdev, &ring->napi, igb_clean,
234 adapter->napi.weight /
235 adapter->num_rx_queues);
240 #define IGB_N0_QUEUE -1
241 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
242 int tx_queue, int msix_vector)
245 struct e1000_hw *hw = &adapter->hw;
246 /* The 82575 assigns vectors using a bitmask, which matches the
247 bitmask for the EICR/EIMS/EIMC registers. To assign one
248 or more queues to a vector, we write the appropriate bits
249 into the MSIXBM register for that vector. */
250 if (rx_queue > IGB_N0_QUEUE) {
251 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
252 adapter->rx_ring[rx_queue].eims_value = msixbm;
254 if (tx_queue > IGB_N0_QUEUE) {
255 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
256 adapter->tx_ring[tx_queue].eims_value =
257 E1000_EICR_TX_QUEUE0 << tx_queue;
259 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
263 * igb_configure_msix - Configure MSI-X hardware
265 * igb_configure_msix sets up the hardware to properly
266 * generate MSI-X interrupts.
268 static void igb_configure_msix(struct igb_adapter *adapter)
272 struct e1000_hw *hw = &adapter->hw;
274 adapter->eims_enable_mask = 0;
276 for (i = 0; i < adapter->num_tx_queues; i++) {
277 struct igb_ring *tx_ring = &adapter->tx_ring[i];
278 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
279 adapter->eims_enable_mask |= tx_ring->eims_value;
280 if (tx_ring->itr_val)
281 writel(1000000000 / (tx_ring->itr_val * 256),
282 hw->hw_addr + tx_ring->itr_register);
284 writel(1, hw->hw_addr + tx_ring->itr_register);
287 for (i = 0; i < adapter->num_rx_queues; i++) {
288 struct igb_ring *rx_ring = &adapter->rx_ring[i];
289 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
290 adapter->eims_enable_mask |= rx_ring->eims_value;
291 if (rx_ring->itr_val)
292 writel(1000000000 / (rx_ring->itr_val * 256),
293 hw->hw_addr + rx_ring->itr_register);
295 writel(1, hw->hw_addr + rx_ring->itr_register);
299 /* set vector for other causes, i.e. link changes */
300 array_wr32(E1000_MSIXBM(0), vector++,
303 /* disable IAM for ICR interrupt bits */
306 tmp = rd32(E1000_CTRL_EXT);
307 /* enable MSI-X PBA support*/
308 tmp |= E1000_CTRL_EXT_PBA_CLR;
310 /* Auto-Mask interrupts upon ICR read. */
311 tmp |= E1000_CTRL_EXT_EIAME;
312 tmp |= E1000_CTRL_EXT_IRCA;
314 wr32(E1000_CTRL_EXT, tmp);
315 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
321 * igb_request_msix - Initialize MSI-X interrupts
323 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
326 static int igb_request_msix(struct igb_adapter *adapter)
328 struct net_device *netdev = adapter->netdev;
329 int i, err = 0, vector = 0;
333 for (i = 0; i < adapter->num_tx_queues; i++) {
334 struct igb_ring *ring = &(adapter->tx_ring[i]);
335 sprintf(ring->name, "%s-tx%d", netdev->name, i);
336 err = request_irq(adapter->msix_entries[vector].vector,
337 &igb_msix_tx, 0, ring->name,
338 &(adapter->tx_ring[i]));
341 ring->itr_register = E1000_EITR(0) + (vector << 2);
342 ring->itr_val = adapter->itr;
345 for (i = 0; i < adapter->num_rx_queues; i++) {
346 struct igb_ring *ring = &(adapter->rx_ring[i]);
347 if (strlen(netdev->name) < (IFNAMSIZ - 5))
348 sprintf(ring->name, "%s-rx%d", netdev->name, i);
350 memcpy(ring->name, netdev->name, IFNAMSIZ);
351 err = request_irq(adapter->msix_entries[vector].vector,
352 &igb_msix_rx, 0, ring->name,
353 &(adapter->rx_ring[i]));
356 ring->itr_register = E1000_EITR(0) + (vector << 2);
357 ring->itr_val = adapter->itr;
361 err = request_irq(adapter->msix_entries[vector].vector,
362 &igb_msix_other, 0, netdev->name, netdev);
366 adapter->napi.poll = igb_clean_rx_ring_msix;
367 for (i = 0; i < adapter->num_rx_queues; i++)
368 adapter->rx_ring[i].napi.poll = adapter->napi.poll;
369 igb_configure_msix(adapter);
375 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
377 if (adapter->msix_entries) {
378 pci_disable_msix(adapter->pdev);
379 kfree(adapter->msix_entries);
380 adapter->msix_entries = NULL;
381 } else if (adapter->msi_enabled)
382 pci_disable_msi(adapter->pdev);
388 * igb_set_interrupt_capability - set MSI or MSI-X if supported
390 * Attempt to configure interrupts using the best available
391 * capabilities of the hardware and kernel.
393 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
398 numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
399 adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
401 if (!adapter->msix_entries)
404 for (i = 0; i < numvecs; i++)
405 adapter->msix_entries[i].entry = i;
407 err = pci_enable_msix(adapter->pdev,
408 adapter->msix_entries,
413 igb_reset_interrupt_capability(adapter);
415 /* If we can't do MSI-X, try MSI */
417 adapter->num_rx_queues = 1;
418 if (!pci_enable_msi(adapter->pdev))
419 adapter->msi_enabled = 1;
424 * igb_request_irq - initialize interrupts
426 * Attempts to configure interrupts using the best available
427 * capabilities of the hardware and kernel.
429 static int igb_request_irq(struct igb_adapter *adapter)
431 struct net_device *netdev = adapter->netdev;
432 struct e1000_hw *hw = &adapter->hw;
435 if (adapter->msix_entries) {
436 err = igb_request_msix(adapter);
438 /* enable IAM, auto-mask,
439 * DO NOT USE EIAM or IAM in legacy mode */
440 wr32(E1000_IAM, IMS_ENABLE_MASK);
443 /* fall back to MSI */
444 igb_reset_interrupt_capability(adapter);
445 if (!pci_enable_msi(adapter->pdev))
446 adapter->msi_enabled = 1;
447 igb_free_all_tx_resources(adapter);
448 igb_free_all_rx_resources(adapter);
449 adapter->num_rx_queues = 1;
450 igb_alloc_queues(adapter);
452 if (adapter->msi_enabled) {
453 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
454 netdev->name, netdev);
457 /* fall back to legacy interrupts */
458 igb_reset_interrupt_capability(adapter);
459 adapter->msi_enabled = 0;
462 err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
463 netdev->name, netdev);
466 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
473 static void igb_free_irq(struct igb_adapter *adapter)
475 struct net_device *netdev = adapter->netdev;
477 if (adapter->msix_entries) {
480 for (i = 0; i < adapter->num_tx_queues; i++)
481 free_irq(adapter->msix_entries[vector++].vector,
482 &(adapter->tx_ring[i]));
483 for (i = 0; i < adapter->num_rx_queues; i++)
484 free_irq(adapter->msix_entries[vector++].vector,
485 &(adapter->rx_ring[i]));
487 free_irq(adapter->msix_entries[vector++].vector, netdev);
491 free_irq(adapter->pdev->irq, netdev);
495 * igb_irq_disable - Mask off interrupt generation on the NIC
496 * @adapter: board private structure
498 static void igb_irq_disable(struct igb_adapter *adapter)
500 struct e1000_hw *hw = &adapter->hw;
502 if (adapter->msix_entries) {
503 wr32(E1000_EIMC, ~0);
508 synchronize_irq(adapter->pdev->irq);
512 * igb_irq_enable - Enable default interrupt generation settings
513 * @adapter: board private structure
515 static void igb_irq_enable(struct igb_adapter *adapter)
517 struct e1000_hw *hw = &adapter->hw;
519 if (adapter->msix_entries) {
521 adapter->eims_enable_mask);
523 adapter->eims_enable_mask);
524 wr32(E1000_IMS, E1000_IMS_LSC);
526 wr32(E1000_IMS, IMS_ENABLE_MASK);
529 static void igb_update_mng_vlan(struct igb_adapter *adapter)
531 struct net_device *netdev = adapter->netdev;
532 u16 vid = adapter->hw.mng_cookie.vlan_id;
533 u16 old_vid = adapter->mng_vlan_id;
534 if (adapter->vlgrp) {
535 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
536 if (adapter->hw.mng_cookie.status &
537 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
538 igb_vlan_rx_add_vid(netdev, vid);
539 adapter->mng_vlan_id = vid;
541 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
543 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
545 !vlan_group_get_device(adapter->vlgrp, old_vid))
546 igb_vlan_rx_kill_vid(netdev, old_vid);
548 adapter->mng_vlan_id = vid;
553 * igb_release_hw_control - release control of the h/w to f/w
554 * @adapter: address of board private structure
556 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
557 * For ASF and Pass Through versions of f/w this means that the
558 * driver is no longer loaded.
561 static void igb_release_hw_control(struct igb_adapter *adapter)
563 struct e1000_hw *hw = &adapter->hw;
566 /* Let firmware take over control of h/w */
567 ctrl_ext = rd32(E1000_CTRL_EXT);
569 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
574 * igb_get_hw_control - get control of the h/w from f/w
575 * @adapter: address of board private structure
577 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
578 * For ASF and Pass Through versions of f/w this means that
579 * the driver is loaded.
582 static void igb_get_hw_control(struct igb_adapter *adapter)
584 struct e1000_hw *hw = &adapter->hw;
587 /* Let firmware know the driver has taken over */
588 ctrl_ext = rd32(E1000_CTRL_EXT);
590 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
593 static void igb_init_manageability(struct igb_adapter *adapter)
595 struct e1000_hw *hw = &adapter->hw;
597 if (adapter->en_mng_pt) {
598 u32 manc2h = rd32(E1000_MANC2H);
599 u32 manc = rd32(E1000_MANC);
601 /* enable receiving management packets to the host */
602 /* this will probably generate destination unreachable messages
603 * from the host OS, but the packets will be handled on SMBUS */
604 manc |= E1000_MANC_EN_MNG2HOST;
605 #define E1000_MNG2HOST_PORT_623 (1 << 5)
606 #define E1000_MNG2HOST_PORT_664 (1 << 6)
607 manc2h |= E1000_MNG2HOST_PORT_623;
608 manc2h |= E1000_MNG2HOST_PORT_664;
609 wr32(E1000_MANC2H, manc2h);
611 wr32(E1000_MANC, manc);
616 * igb_configure - configure the hardware for RX and TX
617 * @adapter: private board structure
619 static void igb_configure(struct igb_adapter *adapter)
621 struct net_device *netdev = adapter->netdev;
624 igb_get_hw_control(adapter);
625 igb_set_multi(netdev);
627 igb_restore_vlan(adapter);
628 igb_init_manageability(adapter);
630 igb_configure_tx(adapter);
631 igb_setup_rctl(adapter);
632 igb_configure_rx(adapter);
634 igb_rx_fifo_flush_82575(&adapter->hw);
636 /* call IGB_DESC_UNUSED which always leaves
637 * at least 1 descriptor unused to make sure
638 * next_to_use != next_to_clean */
639 for (i = 0; i < adapter->num_rx_queues; i++) {
640 struct igb_ring *ring = &adapter->rx_ring[i];
641 igb_alloc_rx_buffers_adv(ring, IGB_DESC_UNUSED(ring));
645 adapter->tx_queue_len = netdev->tx_queue_len;
650 * igb_up - Open the interface and prepare it to handle traffic
651 * @adapter: board private structure
654 int igb_up(struct igb_adapter *adapter)
656 struct e1000_hw *hw = &adapter->hw;
659 /* hardware has been reset, we need to reload some things */
660 igb_configure(adapter);
662 clear_bit(__IGB_DOWN, &adapter->state);
664 napi_enable(&adapter->napi);
666 if (adapter->msix_entries) {
667 for (i = 0; i < adapter->num_rx_queues; i++)
668 napi_enable(&adapter->rx_ring[i].napi);
669 igb_configure_msix(adapter);
672 /* Clear any pending interrupts. */
674 igb_irq_enable(adapter);
676 /* Fire a link change interrupt to start the watchdog. */
677 wr32(E1000_ICS, E1000_ICS_LSC);
681 void igb_down(struct igb_adapter *adapter)
683 struct e1000_hw *hw = &adapter->hw;
684 struct net_device *netdev = adapter->netdev;
688 /* signal that we're down so the interrupt handler does not
689 * reschedule our watchdog timer */
690 set_bit(__IGB_DOWN, &adapter->state);
692 /* disable receives in the hardware */
693 rctl = rd32(E1000_RCTL);
694 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
695 /* flush and sleep below */
697 netif_stop_queue(netdev);
699 /* disable transmits in the hardware */
700 tctl = rd32(E1000_TCTL);
701 tctl &= ~E1000_TCTL_EN;
702 wr32(E1000_TCTL, tctl);
703 /* flush both disables and wait for them to finish */
707 napi_disable(&adapter->napi);
709 if (adapter->msix_entries)
710 for (i = 0; i < adapter->num_rx_queues; i++)
711 napi_disable(&adapter->rx_ring[i].napi);
712 igb_irq_disable(adapter);
714 del_timer_sync(&adapter->watchdog_timer);
715 del_timer_sync(&adapter->phy_info_timer);
717 netdev->tx_queue_len = adapter->tx_queue_len;
718 netif_carrier_off(netdev);
719 adapter->link_speed = 0;
720 adapter->link_duplex = 0;
722 if (!pci_channel_offline(adapter->pdev))
724 igb_clean_all_tx_rings(adapter);
725 igb_clean_all_rx_rings(adapter);
728 void igb_reinit_locked(struct igb_adapter *adapter)
730 WARN_ON(in_interrupt());
731 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
735 clear_bit(__IGB_RESETTING, &adapter->state);
738 void igb_reset(struct igb_adapter *adapter)
740 struct e1000_hw *hw = &adapter->hw;
741 struct e1000_fc_info *fc = &adapter->hw.fc;
742 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
745 /* Repartition Pba for greater than 9k mtu
746 * To take effect CTRL.RST is required.
750 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
751 /* adjust PBA for jumbo frames */
752 wr32(E1000_PBA, pba);
754 /* To maintain wire speed transmits, the Tx FIFO should be
755 * large enough to accommodate two full transmit packets,
756 * rounded up to the next 1KB and expressed in KB. Likewise,
757 * the Rx FIFO should be large enough to accommodate at least
758 * one full receive packet and is similarly rounded up and
759 * expressed in KB. */
760 pba = rd32(E1000_PBA);
761 /* upper 16 bits has Tx packet buffer allocation size in KB */
762 tx_space = pba >> 16;
763 /* lower 16 bits has Rx packet buffer allocation size in KB */
765 /* the tx fifo also stores 16 bytes of information about the tx
766 * but don't include ethernet FCS because hardware appends it */
767 min_tx_space = (adapter->max_frame_size +
768 sizeof(struct e1000_tx_desc) -
770 min_tx_space = ALIGN(min_tx_space, 1024);
772 /* software strips receive CRC, so leave room for it */
773 min_rx_space = adapter->max_frame_size;
774 min_rx_space = ALIGN(min_rx_space, 1024);
777 /* If current Tx allocation is less than the min Tx FIFO size,
778 * and the min Tx FIFO size is less than the current Rx FIFO
779 * allocation, take space away from current Rx allocation */
780 if (tx_space < min_tx_space &&
781 ((min_tx_space - tx_space) < pba)) {
782 pba = pba - (min_tx_space - tx_space);
784 /* if short on rx space, rx wins and must trump tx
786 if (pba < min_rx_space)
790 wr32(E1000_PBA, pba);
792 /* flow control settings */
793 /* The high water mark must be low enough to fit one full frame
794 * (or the size used for early receive) above it in the Rx FIFO.
795 * Set it to the lower of:
796 * - 90% of the Rx FIFO size, or
797 * - the full Rx FIFO size minus one full frame */
798 hwm = min(((pba << 10) * 9 / 10),
799 ((pba << 10) - adapter->max_frame_size));
801 fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */
802 fc->low_water = fc->high_water - 8;
803 fc->pause_time = 0xFFFF;
805 fc->type = fc->original_type;
807 /* Allow time for pending master requests to run */
808 adapter->hw.mac.ops.reset_hw(&adapter->hw);
811 if (adapter->hw.mac.ops.init_hw(&adapter->hw))
812 dev_err(&adapter->pdev->dev, "Hardware Error\n");
814 igb_update_mng_vlan(adapter);
816 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
817 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
819 igb_reset_adaptive(&adapter->hw);
820 if (adapter->hw.phy.ops.get_phy_info)
821 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
825 * igb_is_need_ioport - determine if an adapter needs ioport resources or not
826 * @pdev: PCI device information struct
828 * Returns true if an adapter needs ioport resources
830 static int igb_is_need_ioport(struct pci_dev *pdev)
832 switch (pdev->device) {
833 /* Currently there are no adapters that need ioport resources */
840 * igb_probe - Device Initialization Routine
841 * @pdev: PCI device information struct
842 * @ent: entry in igb_pci_tbl
844 * Returns 0 on success, negative on failure
846 * igb_probe initializes an adapter identified by a pci_dev structure.
847 * The OS initialization, configuring of the adapter private structure,
848 * and a hardware reset occur.
850 static int __devinit igb_probe(struct pci_dev *pdev,
851 const struct pci_device_id *ent)
853 struct net_device *netdev;
854 struct igb_adapter *adapter;
856 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
857 unsigned long mmio_start, mmio_len;
858 int i, err, pci_using_dac;
860 u16 eeprom_apme_mask = IGB_EEPROM_APME;
862 int bars, need_ioport;
864 /* do not allocate ioport bars when not needed */
865 need_ioport = igb_is_need_ioport(pdev);
867 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
868 err = pci_enable_device(pdev);
870 bars = pci_select_bars(pdev, IORESOURCE_MEM);
871 err = pci_enable_device_mem(pdev);
877 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
879 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
883 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
885 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
887 dev_err(&pdev->dev, "No usable DMA "
888 "configuration, aborting\n");
894 err = pci_request_selected_regions(pdev, bars, igb_driver_name);
898 pci_set_master(pdev);
899 pci_save_state(pdev);
902 netdev = alloc_etherdev(sizeof(struct igb_adapter));
904 goto err_alloc_etherdev;
906 SET_NETDEV_DEV(netdev, &pdev->dev);
908 pci_set_drvdata(pdev, netdev);
909 adapter = netdev_priv(netdev);
910 adapter->netdev = netdev;
911 adapter->pdev = pdev;
914 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
915 adapter->bars = bars;
916 adapter->need_ioport = need_ioport;
918 mmio_start = pci_resource_start(pdev, 0);
919 mmio_len = pci_resource_len(pdev, 0);
922 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
923 if (!adapter->hw.hw_addr)
926 netdev->open = &igb_open;
927 netdev->stop = &igb_close;
928 netdev->get_stats = &igb_get_stats;
929 netdev->set_multicast_list = &igb_set_multi;
930 netdev->set_mac_address = &igb_set_mac;
931 netdev->change_mtu = &igb_change_mtu;
932 netdev->do_ioctl = &igb_ioctl;
933 igb_set_ethtool_ops(netdev);
934 netdev->tx_timeout = &igb_tx_timeout;
935 netdev->watchdog_timeo = 5 * HZ;
936 netif_napi_add(netdev, &adapter->napi, igb_clean, 64);
937 netdev->vlan_rx_register = igb_vlan_rx_register;
938 netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
939 netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
940 #ifdef CONFIG_NET_POLL_CONTROLLER
941 netdev->poll_controller = igb_netpoll;
943 netdev->hard_start_xmit = &igb_xmit_frame_adv;
945 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
947 netdev->mem_start = mmio_start;
948 netdev->mem_end = mmio_start + mmio_len;
950 /* PCI config space info */
951 hw->vendor_id = pdev->vendor;
952 hw->device_id = pdev->device;
953 hw->revision_id = pdev->revision;
954 hw->subsystem_vendor_id = pdev->subsystem_vendor;
955 hw->subsystem_device_id = pdev->subsystem_device;
957 /* setup the private structure */
959 /* Copy the default MAC, PHY and NVM function pointers */
960 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
961 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
962 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
963 /* Initialize skew-specific constants */
964 err = ei->get_invariants(hw);
968 err = igb_sw_init(adapter);
972 igb_get_bus_info_pcie(hw);
974 hw->phy.autoneg_wait_to_complete = false;
975 hw->mac.adaptive_ifs = true;
978 if (hw->phy.media_type == e1000_media_type_copper) {
979 hw->phy.mdix = AUTO_ALL_MODES;
980 hw->phy.disable_polarity_correction = false;
981 hw->phy.ms_type = e1000_ms_hw_default;
984 if (igb_check_reset_block(hw))
986 "PHY reset is blocked due to SOL/IDER session.\n");
988 netdev->features = NETIF_F_SG |
992 NETIF_F_HW_VLAN_FILTER;
994 netdev->features |= NETIF_F_TSO;
995 netdev->features |= NETIF_F_TSO6;
997 netdev->vlan_features |= NETIF_F_TSO;
998 netdev->vlan_features |= NETIF_F_TSO6;
999 netdev->vlan_features |= NETIF_F_HW_CSUM;
1000 netdev->vlan_features |= NETIF_F_SG;
1003 netdev->features |= NETIF_F_HIGHDMA;
1005 netdev->features |= NETIF_F_LLTX;
1006 adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1008 /* before reading the NVM, reset the controller to put the device in a
1009 * known good starting state */
1010 hw->mac.ops.reset_hw(hw);
1012 /* make sure the NVM is good */
1013 if (igb_validate_nvm_checksum(hw) < 0) {
1014 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1019 /* copy the MAC address out of the NVM */
1020 if (hw->mac.ops.read_mac_addr(hw))
1021 dev_err(&pdev->dev, "NVM Read Error\n");
1023 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1024 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1026 if (!is_valid_ether_addr(netdev->perm_addr)) {
1027 dev_err(&pdev->dev, "Invalid MAC Address\n");
1032 init_timer(&adapter->watchdog_timer);
1033 adapter->watchdog_timer.function = &igb_watchdog;
1034 adapter->watchdog_timer.data = (unsigned long) adapter;
1036 init_timer(&adapter->phy_info_timer);
1037 adapter->phy_info_timer.function = &igb_update_phy_info;
1038 adapter->phy_info_timer.data = (unsigned long) adapter;
1040 INIT_WORK(&adapter->reset_task, igb_reset_task);
1041 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1043 /* Initialize link & ring properties that are user-changeable */
1044 adapter->tx_ring->count = 256;
1045 for (i = 0; i < adapter->num_tx_queues; i++)
1046 adapter->tx_ring[i].count = adapter->tx_ring->count;
1047 adapter->rx_ring->count = 256;
1048 for (i = 0; i < adapter->num_rx_queues; i++)
1049 adapter->rx_ring[i].count = adapter->rx_ring->count;
1051 adapter->fc_autoneg = true;
1052 hw->mac.autoneg = true;
1053 hw->phy.autoneg_advertised = 0x2f;
1055 hw->fc.original_type = e1000_fc_default;
1056 hw->fc.type = e1000_fc_default;
1058 adapter->itr_setting = 3;
1059 adapter->itr = IGB_START_ITR;
1061 igb_validate_mdi_setting(hw);
1063 adapter->rx_csum = 1;
1065 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1066 * enable the ACPI Magic Packet filter
1069 if (hw->bus.func == 0 ||
1070 hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1071 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1074 if (eeprom_data & eeprom_apme_mask)
1075 adapter->eeprom_wol |= E1000_WUFC_MAG;
1077 /* now that we have the eeprom settings, apply the special cases where
1078 * the eeprom may be wrong or the board simply won't support wake on
1079 * lan on a particular port */
1080 switch (pdev->device) {
1081 case E1000_DEV_ID_82575GB_QUAD_COPPER:
1082 adapter->eeprom_wol = 0;
1084 case E1000_DEV_ID_82575EB_FIBER_SERDES:
1085 /* Wake events only supported on port A for dual fiber
1086 * regardless of eeprom setting */
1087 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1088 adapter->eeprom_wol = 0;
1092 /* initialize the wol settings based on the eeprom settings */
1093 adapter->wol = adapter->eeprom_wol;
1095 /* reset the hardware with the new settings */
1098 /* let the f/w know that the h/w is now under the control of the
1100 igb_get_hw_control(adapter);
1102 /* tell the stack to leave us alone until igb_open() is called */
1103 netif_carrier_off(netdev);
1104 netif_stop_queue(netdev);
1106 strcpy(netdev->name, "eth%d");
1107 err = register_netdev(netdev);
1111 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1112 /* print bus type/speed/width info */
1113 dev_info(&pdev->dev,
1114 "%s: (PCIe:%s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
1116 ((hw->bus.speed == e1000_bus_speed_2500)
1117 ? "2.5Gb/s" : "unknown"),
1118 ((hw->bus.width == e1000_bus_width_pcie_x4)
1119 ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1120 ? "Width x1" : "unknown"),
1121 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
1122 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
1124 igb_read_part_num(hw, &part_num);
1125 dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1126 (part_num >> 8), (part_num & 0xff));
1128 dev_info(&pdev->dev,
1129 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1130 adapter->msix_entries ? "MSI-X" :
1131 adapter->msi_enabled ? "MSI" : "legacy",
1132 adapter->num_rx_queues, adapter->num_tx_queues);
1137 igb_release_hw_control(adapter);
1139 if (!igb_check_reset_block(hw))
1140 hw->phy.ops.reset_phy(hw);
1142 if (hw->flash_address)
1143 iounmap(hw->flash_address);
1145 igb_remove_device(hw);
1146 kfree(adapter->tx_ring);
1147 kfree(adapter->rx_ring);
1150 iounmap(hw->hw_addr);
1152 free_netdev(netdev);
1154 pci_release_selected_regions(pdev, bars);
1157 pci_disable_device(pdev);
1162 * igb_remove - Device Removal Routine
1163 * @pdev: PCI device information struct
1165 * igb_remove is called by the PCI subsystem to alert the driver
1166 * that it should release a PCI device. The could be caused by a
1167 * Hot-Plug event, or because the driver is going to be removed from
1170 static void __devexit igb_remove(struct pci_dev *pdev)
1172 struct net_device *netdev = pci_get_drvdata(pdev);
1173 struct igb_adapter *adapter = netdev_priv(netdev);
1175 /* flush_scheduled work may reschedule our watchdog task, so
1176 * explicitly disable watchdog tasks from being rescheduled */
1177 set_bit(__IGB_DOWN, &adapter->state);
1178 del_timer_sync(&adapter->watchdog_timer);
1179 del_timer_sync(&adapter->phy_info_timer);
1181 flush_scheduled_work();
1183 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1184 * would have already happened in close and is redundant. */
1185 igb_release_hw_control(adapter);
1187 unregister_netdev(netdev);
1189 if (!igb_check_reset_block(&adapter->hw))
1190 adapter->hw.phy.ops.reset_phy(&adapter->hw);
1192 igb_remove_device(&adapter->hw);
1193 igb_reset_interrupt_capability(adapter);
1195 kfree(adapter->tx_ring);
1196 kfree(adapter->rx_ring);
1198 iounmap(adapter->hw.hw_addr);
1199 if (adapter->hw.flash_address)
1200 iounmap(adapter->hw.flash_address);
1201 pci_release_selected_regions(pdev, adapter->bars);
1203 free_netdev(netdev);
1205 pci_disable_device(pdev);
1209 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1210 * @adapter: board private structure to initialize
1212 * igb_sw_init initializes the Adapter private data structure.
1213 * Fields are initialized based on PCI device information and
1214 * OS network device settings (MTU size).
1216 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1218 struct e1000_hw *hw = &adapter->hw;
1219 struct net_device *netdev = adapter->netdev;
1220 struct pci_dev *pdev = adapter->pdev;
1222 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1224 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1225 adapter->rx_ps_hdr_size = 0; /* disable packet split */
1226 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1227 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1229 /* Number of supported queues. */
1230 /* Having more queues than CPUs doesn't make sense. */
1231 adapter->num_tx_queues = 1;
1232 adapter->num_rx_queues = min(IGB_MAX_RX_QUEUES, num_online_cpus());
1234 igb_set_interrupt_capability(adapter);
1236 if (igb_alloc_queues(adapter)) {
1237 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1241 /* Explicitly disable IRQ since the NIC can be in any state. */
1242 igb_irq_disable(adapter);
1244 set_bit(__IGB_DOWN, &adapter->state);
1249 * igb_open - Called when a network interface is made active
1250 * @netdev: network interface device structure
1252 * Returns 0 on success, negative value on failure
1254 * The open entry point is called when a network interface is made
1255 * active by the system (IFF_UP). At this point all resources needed
1256 * for transmit and receive operations are allocated, the interrupt
1257 * handler is registered with the OS, the watchdog timer is started,
1258 * and the stack is notified that the interface is ready.
1260 static int igb_open(struct net_device *netdev)
1262 struct igb_adapter *adapter = netdev_priv(netdev);
1263 struct e1000_hw *hw = &adapter->hw;
1267 /* disallow open during test */
1268 if (test_bit(__IGB_TESTING, &adapter->state))
1271 /* allocate transmit descriptors */
1272 err = igb_setup_all_tx_resources(adapter);
1276 /* allocate receive descriptors */
1277 err = igb_setup_all_rx_resources(adapter);
1281 /* e1000_power_up_phy(adapter); */
1283 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1284 if ((adapter->hw.mng_cookie.status &
1285 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1286 igb_update_mng_vlan(adapter);
1288 /* before we allocate an interrupt, we must be ready to handle it.
1289 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1290 * as soon as we call pci_request_irq, so we have to setup our
1291 * clean_rx handler before we do so. */
1292 igb_configure(adapter);
1294 err = igb_request_irq(adapter);
1298 /* From here on the code is the same as igb_up() */
1299 clear_bit(__IGB_DOWN, &adapter->state);
1301 napi_enable(&adapter->napi);
1302 if (adapter->msix_entries)
1303 for (i = 0; i < adapter->num_rx_queues; i++)
1304 napi_enable(&adapter->rx_ring[i].napi);
1306 igb_irq_enable(adapter);
1308 /* Clear any pending interrupts. */
1310 /* Fire a link status change interrupt to start the watchdog. */
1311 wr32(E1000_ICS, E1000_ICS_LSC);
1316 igb_release_hw_control(adapter);
1317 /* e1000_power_down_phy(adapter); */
1318 igb_free_all_rx_resources(adapter);
1320 igb_free_all_tx_resources(adapter);
1328 * igb_close - Disables a network interface
1329 * @netdev: network interface device structure
1331 * Returns 0, this is not allowed to fail
1333 * The close entry point is called when an interface is de-activated
1334 * by the OS. The hardware is still under the driver's control, but
1335 * needs to be disabled. A global MAC reset is issued to stop the
1336 * hardware, and all transmit and receive resources are freed.
1338 static int igb_close(struct net_device *netdev)
1340 struct igb_adapter *adapter = netdev_priv(netdev);
1342 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1345 igb_free_irq(adapter);
1347 igb_free_all_tx_resources(adapter);
1348 igb_free_all_rx_resources(adapter);
1350 /* kill manageability vlan ID if supported, but not if a vlan with
1351 * the same ID is registered on the host OS (let 8021q kill it) */
1352 if ((adapter->hw.mng_cookie.status &
1353 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1355 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1356 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1362 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1363 * @adapter: board private structure
1364 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1366 * Return 0 on success, negative on failure
1369 int igb_setup_tx_resources(struct igb_adapter *adapter,
1370 struct igb_ring *tx_ring)
1372 struct pci_dev *pdev = adapter->pdev;
1375 size = sizeof(struct igb_buffer) * tx_ring->count;
1376 tx_ring->buffer_info = vmalloc(size);
1377 if (!tx_ring->buffer_info)
1379 memset(tx_ring->buffer_info, 0, size);
1381 /* round up to nearest 4K */
1382 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1384 tx_ring->size = ALIGN(tx_ring->size, 4096);
1386 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1392 tx_ring->adapter = adapter;
1393 tx_ring->next_to_use = 0;
1394 tx_ring->next_to_clean = 0;
1395 spin_lock_init(&tx_ring->tx_clean_lock);
1396 spin_lock_init(&tx_ring->tx_lock);
1400 vfree(tx_ring->buffer_info);
1401 dev_err(&adapter->pdev->dev,
1402 "Unable to allocate memory for the transmit descriptor ring\n");
1407 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1408 * (Descriptors) for all queues
1409 * @adapter: board private structure
1411 * Return 0 on success, negative on failure
1413 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1417 for (i = 0; i < adapter->num_tx_queues; i++) {
1418 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1420 dev_err(&adapter->pdev->dev,
1421 "Allocation for Tx Queue %u failed\n", i);
1422 for (i--; i >= 0; i--)
1423 igb_free_tx_resources(&adapter->tx_ring[i]);
1432 * igb_configure_tx - Configure transmit Unit after Reset
1433 * @adapter: board private structure
1435 * Configure the Tx unit of the MAC after a reset.
1437 static void igb_configure_tx(struct igb_adapter *adapter)
1440 struct e1000_hw *hw = &adapter->hw;
1445 for (i = 0; i < adapter->num_tx_queues; i++) {
1446 struct igb_ring *ring = &(adapter->tx_ring[i]);
1448 wr32(E1000_TDLEN(i),
1449 ring->count * sizeof(struct e1000_tx_desc));
1451 wr32(E1000_TDBAL(i),
1452 tdba & 0x00000000ffffffffULL);
1453 wr32(E1000_TDBAH(i), tdba >> 32);
1455 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1456 tdwba |= 1; /* enable head wb */
1457 wr32(E1000_TDWBAL(i),
1458 tdwba & 0x00000000ffffffffULL);
1459 wr32(E1000_TDWBAH(i), tdwba >> 32);
1461 ring->head = E1000_TDH(i);
1462 ring->tail = E1000_TDT(i);
1463 writel(0, hw->hw_addr + ring->tail);
1464 writel(0, hw->hw_addr + ring->head);
1465 txdctl = rd32(E1000_TXDCTL(i));
1466 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1467 wr32(E1000_TXDCTL(i), txdctl);
1469 /* Turn off Relaxed Ordering on head write-backs. The
1470 * writebacks MUST be delivered in order or it will
1471 * completely screw up our bookeeping.
1473 txctrl = rd32(E1000_DCA_TXCTRL(i));
1474 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1475 wr32(E1000_DCA_TXCTRL(i), txctrl);
1480 /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1482 /* Program the Transmit Control Register */
1484 tctl = rd32(E1000_TCTL);
1485 tctl &= ~E1000_TCTL_CT;
1486 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1487 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1489 igb_config_collision_dist(hw);
1491 /* Setup Transmit Descriptor Settings for eop descriptor */
1492 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1494 /* Enable transmits */
1495 tctl |= E1000_TCTL_EN;
1497 wr32(E1000_TCTL, tctl);
1501 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1502 * @adapter: board private structure
1503 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1505 * Returns 0 on success, negative on failure
1508 int igb_setup_rx_resources(struct igb_adapter *adapter,
1509 struct igb_ring *rx_ring)
1511 struct pci_dev *pdev = adapter->pdev;
1514 size = sizeof(struct igb_buffer) * rx_ring->count;
1515 rx_ring->buffer_info = vmalloc(size);
1516 if (!rx_ring->buffer_info)
1518 memset(rx_ring->buffer_info, 0, size);
1520 desc_len = sizeof(union e1000_adv_rx_desc);
1522 /* Round up to nearest 4K */
1523 rx_ring->size = rx_ring->count * desc_len;
1524 rx_ring->size = ALIGN(rx_ring->size, 4096);
1526 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1532 rx_ring->next_to_clean = 0;
1533 rx_ring->next_to_use = 0;
1534 rx_ring->pending_skb = NULL;
1536 rx_ring->adapter = adapter;
1537 /* FIXME: do we want to setup ring->napi->poll here? */
1538 rx_ring->napi.poll = adapter->napi.poll;
1543 vfree(rx_ring->buffer_info);
1544 dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1545 "the receive descriptor ring\n");
1550 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1551 * (Descriptors) for all queues
1552 * @adapter: board private structure
1554 * Return 0 on success, negative on failure
1556 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1560 for (i = 0; i < adapter->num_rx_queues; i++) {
1561 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1563 dev_err(&adapter->pdev->dev,
1564 "Allocation for Rx Queue %u failed\n", i);
1565 for (i--; i >= 0; i--)
1566 igb_free_rx_resources(&adapter->rx_ring[i]);
1575 * igb_setup_rctl - configure the receive control registers
1576 * @adapter: Board private structure
1578 static void igb_setup_rctl(struct igb_adapter *adapter)
1580 struct e1000_hw *hw = &adapter->hw;
1585 rctl = rd32(E1000_RCTL);
1587 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1589 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1590 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1591 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1593 /* disable the stripping of CRC because it breaks
1594 * BMC firmware connected over SMBUS
1595 rctl |= E1000_RCTL_SECRC;
1598 rctl &= ~E1000_RCTL_SBP;
1600 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1601 rctl &= ~E1000_RCTL_LPE;
1603 rctl |= E1000_RCTL_LPE;
1604 if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) {
1605 /* Setup buffer sizes */
1606 rctl &= ~E1000_RCTL_SZ_4096;
1607 rctl |= E1000_RCTL_BSEX;
1608 switch (adapter->rx_buffer_len) {
1609 case IGB_RXBUFFER_256:
1610 rctl |= E1000_RCTL_SZ_256;
1611 rctl &= ~E1000_RCTL_BSEX;
1613 case IGB_RXBUFFER_512:
1614 rctl |= E1000_RCTL_SZ_512;
1615 rctl &= ~E1000_RCTL_BSEX;
1617 case IGB_RXBUFFER_1024:
1618 rctl |= E1000_RCTL_SZ_1024;
1619 rctl &= ~E1000_RCTL_BSEX;
1621 case IGB_RXBUFFER_2048:
1623 rctl |= E1000_RCTL_SZ_2048;
1624 rctl &= ~E1000_RCTL_BSEX;
1626 case IGB_RXBUFFER_4096:
1627 rctl |= E1000_RCTL_SZ_4096;
1629 case IGB_RXBUFFER_8192:
1630 rctl |= E1000_RCTL_SZ_8192;
1632 case IGB_RXBUFFER_16384:
1633 rctl |= E1000_RCTL_SZ_16384;
1637 rctl &= ~E1000_RCTL_BSEX;
1638 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1641 /* 82575 and greater support packet-split where the protocol
1642 * header is placed in skb->data and the packet data is
1643 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1644 * In the case of a non-split, skb->data is linearly filled,
1645 * followed by the page buffers. Therefore, skb->data is
1646 * sized to hold the largest protocol header.
1648 /* allocations using alloc_page take too long for regular MTU
1649 * so only enable packet split for jumbo frames */
1650 if (rctl & E1000_RCTL_LPE) {
1651 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1652 srrctl = adapter->rx_ps_hdr_size <<
1653 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1654 /* buffer size is ALWAYS one page */
1655 srrctl |= PAGE_SIZE >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1656 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1658 adapter->rx_ps_hdr_size = 0;
1659 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1662 for (i = 0; i < adapter->num_rx_queues; i++)
1663 wr32(E1000_SRRCTL(i), srrctl);
1665 wr32(E1000_RCTL, rctl);
1669 * igb_configure_rx - Configure receive Unit after Reset
1670 * @adapter: board private structure
1672 * Configure the Rx unit of the MAC after a reset.
1674 static void igb_configure_rx(struct igb_adapter *adapter)
1677 struct e1000_hw *hw = &adapter->hw;
1682 /* disable receives while setting up the descriptors */
1683 rctl = rd32(E1000_RCTL);
1684 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1688 if (adapter->itr_setting > 3)
1690 1000000000 / (adapter->itr * 256));
1692 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1693 * the Base and Length of the Rx Descriptor Ring */
1694 for (i = 0; i < adapter->num_rx_queues; i++) {
1695 struct igb_ring *ring = &(adapter->rx_ring[i]);
1697 wr32(E1000_RDBAL(i),
1698 rdba & 0x00000000ffffffffULL);
1699 wr32(E1000_RDBAH(i), rdba >> 32);
1700 wr32(E1000_RDLEN(i),
1701 ring->count * sizeof(union e1000_adv_rx_desc));
1703 ring->head = E1000_RDH(i);
1704 ring->tail = E1000_RDT(i);
1705 writel(0, hw->hw_addr + ring->tail);
1706 writel(0, hw->hw_addr + ring->head);
1708 rxdctl = rd32(E1000_RXDCTL(i));
1709 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1710 rxdctl &= 0xFFF00000;
1711 rxdctl |= IGB_RX_PTHRESH;
1712 rxdctl |= IGB_RX_HTHRESH << 8;
1713 rxdctl |= IGB_RX_WTHRESH << 16;
1714 wr32(E1000_RXDCTL(i), rxdctl);
1717 if (adapter->num_rx_queues > 1) {
1726 get_random_bytes(&random[0], 40);
1729 for (j = 0; j < (32 * 4); j++) {
1731 (j % adapter->num_rx_queues) << shift;
1734 hw->hw_addr + E1000_RETA(0) + (j & ~3));
1736 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1738 /* Fill out hash function seeds */
1739 for (j = 0; j < 10; j++)
1740 array_wr32(E1000_RSSRK(0), j, random[j]);
1742 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1743 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1744 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1745 E1000_MRQC_RSS_FIELD_IPV6_TCP);
1746 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1747 E1000_MRQC_RSS_FIELD_IPV6_UDP);
1748 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1749 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1752 wr32(E1000_MRQC, mrqc);
1754 /* Multiqueue and raw packet checksumming are mutually
1755 * exclusive. Note that this not the same as TCP/IP
1756 * checksumming, which works fine. */
1757 rxcsum = rd32(E1000_RXCSUM);
1758 rxcsum |= E1000_RXCSUM_PCSD;
1759 wr32(E1000_RXCSUM, rxcsum);
1761 /* Enable Receive Checksum Offload for TCP and UDP */
1762 rxcsum = rd32(E1000_RXCSUM);
1763 if (adapter->rx_csum) {
1764 rxcsum |= E1000_RXCSUM_TUOFL;
1766 /* Enable IPv4 payload checksum for UDP fragments
1767 * Must be used in conjunction with packet-split. */
1768 if (adapter->rx_ps_hdr_size)
1769 rxcsum |= E1000_RXCSUM_IPPCSE;
1771 rxcsum &= ~E1000_RXCSUM_TUOFL;
1772 /* don't need to clear IPPCSE as it defaults to 0 */
1774 wr32(E1000_RXCSUM, rxcsum);
1779 adapter->max_frame_size + VLAN_TAG_SIZE);
1781 wr32(E1000_RLPML, adapter->max_frame_size);
1783 /* Enable Receives */
1784 wr32(E1000_RCTL, rctl);
1788 * igb_free_tx_resources - Free Tx Resources per Queue
1789 * @adapter: board private structure
1790 * @tx_ring: Tx descriptor ring for a specific queue
1792 * Free all transmit software resources
1794 static void igb_free_tx_resources(struct igb_ring *tx_ring)
1796 struct pci_dev *pdev = tx_ring->adapter->pdev;
1798 igb_clean_tx_ring(tx_ring);
1800 vfree(tx_ring->buffer_info);
1801 tx_ring->buffer_info = NULL;
1803 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1805 tx_ring->desc = NULL;
1809 * igb_free_all_tx_resources - Free Tx Resources for All Queues
1810 * @adapter: board private structure
1812 * Free all transmit software resources
1814 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
1818 for (i = 0; i < adapter->num_tx_queues; i++)
1819 igb_free_tx_resources(&adapter->tx_ring[i]);
1822 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
1823 struct igb_buffer *buffer_info)
1825 if (buffer_info->dma) {
1826 pci_unmap_page(adapter->pdev,
1828 buffer_info->length,
1830 buffer_info->dma = 0;
1832 if (buffer_info->skb) {
1833 dev_kfree_skb_any(buffer_info->skb);
1834 buffer_info->skb = NULL;
1836 buffer_info->time_stamp = 0;
1837 /* buffer_info must be completely set up in the transmit path */
1841 * igb_clean_tx_ring - Free Tx Buffers
1842 * @adapter: board private structure
1843 * @tx_ring: ring to be cleaned
1845 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
1847 struct igb_adapter *adapter = tx_ring->adapter;
1848 struct igb_buffer *buffer_info;
1852 if (!tx_ring->buffer_info)
1854 /* Free all the Tx ring sk_buffs */
1856 for (i = 0; i < tx_ring->count; i++) {
1857 buffer_info = &tx_ring->buffer_info[i];
1858 igb_unmap_and_free_tx_resource(adapter, buffer_info);
1861 size = sizeof(struct igb_buffer) * tx_ring->count;
1862 memset(tx_ring->buffer_info, 0, size);
1864 /* Zero out the descriptor ring */
1866 memset(tx_ring->desc, 0, tx_ring->size);
1868 tx_ring->next_to_use = 0;
1869 tx_ring->next_to_clean = 0;
1871 writel(0, adapter->hw.hw_addr + tx_ring->head);
1872 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1876 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
1877 * @adapter: board private structure
1879 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
1883 for (i = 0; i < adapter->num_tx_queues; i++)
1884 igb_clean_tx_ring(&adapter->tx_ring[i]);
1888 * igb_free_rx_resources - Free Rx Resources
1889 * @adapter: board private structure
1890 * @rx_ring: ring to clean the resources from
1892 * Free all receive software resources
1894 static void igb_free_rx_resources(struct igb_ring *rx_ring)
1896 struct pci_dev *pdev = rx_ring->adapter->pdev;
1898 igb_clean_rx_ring(rx_ring);
1900 vfree(rx_ring->buffer_info);
1901 rx_ring->buffer_info = NULL;
1903 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1905 rx_ring->desc = NULL;
1909 * igb_free_all_rx_resources - Free Rx Resources for All Queues
1910 * @adapter: board private structure
1912 * Free all receive software resources
1914 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
1918 for (i = 0; i < adapter->num_rx_queues; i++)
1919 igb_free_rx_resources(&adapter->rx_ring[i]);
1923 * igb_clean_rx_ring - Free Rx Buffers per Queue
1924 * @adapter: board private structure
1925 * @rx_ring: ring to free buffers from
1927 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
1929 struct igb_adapter *adapter = rx_ring->adapter;
1930 struct igb_buffer *buffer_info;
1931 struct pci_dev *pdev = adapter->pdev;
1935 if (!rx_ring->buffer_info)
1937 /* Free all the Rx ring sk_buffs */
1938 for (i = 0; i < rx_ring->count; i++) {
1939 buffer_info = &rx_ring->buffer_info[i];
1940 if (buffer_info->dma) {
1941 if (adapter->rx_ps_hdr_size)
1942 pci_unmap_single(pdev, buffer_info->dma,
1943 adapter->rx_ps_hdr_size,
1944 PCI_DMA_FROMDEVICE);
1946 pci_unmap_single(pdev, buffer_info->dma,
1947 adapter->rx_buffer_len,
1948 PCI_DMA_FROMDEVICE);
1949 buffer_info->dma = 0;
1952 if (buffer_info->skb) {
1953 dev_kfree_skb(buffer_info->skb);
1954 buffer_info->skb = NULL;
1956 if (buffer_info->page) {
1957 pci_unmap_page(pdev, buffer_info->page_dma,
1958 PAGE_SIZE, PCI_DMA_FROMDEVICE);
1959 put_page(buffer_info->page);
1960 buffer_info->page = NULL;
1961 buffer_info->page_dma = 0;
1965 /* there also may be some cached data from a chained receive */
1966 if (rx_ring->pending_skb) {
1967 dev_kfree_skb(rx_ring->pending_skb);
1968 rx_ring->pending_skb = NULL;
1971 size = sizeof(struct igb_buffer) * rx_ring->count;
1972 memset(rx_ring->buffer_info, 0, size);
1974 /* Zero out the descriptor ring */
1975 memset(rx_ring->desc, 0, rx_ring->size);
1977 rx_ring->next_to_clean = 0;
1978 rx_ring->next_to_use = 0;
1980 writel(0, adapter->hw.hw_addr + rx_ring->head);
1981 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1985 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
1986 * @adapter: board private structure
1988 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
1992 for (i = 0; i < adapter->num_rx_queues; i++)
1993 igb_clean_rx_ring(&adapter->rx_ring[i]);
1997 * igb_set_mac - Change the Ethernet Address of the NIC
1998 * @netdev: network interface device structure
1999 * @p: pointer to an address structure
2001 * Returns 0 on success, negative on failure
2003 static int igb_set_mac(struct net_device *netdev, void *p)
2005 struct igb_adapter *adapter = netdev_priv(netdev);
2006 struct sockaddr *addr = p;
2008 if (!is_valid_ether_addr(addr->sa_data))
2009 return -EADDRNOTAVAIL;
2011 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2012 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2014 adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2020 * igb_set_multi - Multicast and Promiscuous mode set
2021 * @netdev: network interface device structure
2023 * The set_multi entry point is called whenever the multicast address
2024 * list or the network interface flags are updated. This routine is
2025 * responsible for configuring the hardware for proper multicast,
2026 * promiscuous mode, and all-multi behavior.
2028 static void igb_set_multi(struct net_device *netdev)
2030 struct igb_adapter *adapter = netdev_priv(netdev);
2031 struct e1000_hw *hw = &adapter->hw;
2032 struct e1000_mac_info *mac = &hw->mac;
2033 struct dev_mc_list *mc_ptr;
2038 /* Check for Promiscuous and All Multicast modes */
2040 rctl = rd32(E1000_RCTL);
2042 if (netdev->flags & IFF_PROMISC)
2043 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2044 else if (netdev->flags & IFF_ALLMULTI) {
2045 rctl |= E1000_RCTL_MPE;
2046 rctl &= ~E1000_RCTL_UPE;
2048 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2050 wr32(E1000_RCTL, rctl);
2052 if (!netdev->mc_count) {
2053 /* nothing to program, so clear mc list */
2054 igb_update_mc_addr_list(hw, NULL, 0, 1,
2055 mac->rar_entry_count);
2059 mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2063 /* The shared function expects a packed array of only addresses. */
2064 mc_ptr = netdev->mc_list;
2066 for (i = 0; i < netdev->mc_count; i++) {
2069 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2070 mc_ptr = mc_ptr->next;
2072 igb_update_mc_addr_list(hw, mta_list, i, 1, mac->rar_entry_count);
2076 /* Need to wait a few seconds after link up to get diagnostic information from
2078 static void igb_update_phy_info(unsigned long data)
2080 struct igb_adapter *adapter = (struct igb_adapter *) data;
2081 if (adapter->hw.phy.ops.get_phy_info)
2082 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
2086 * igb_watchdog - Timer Call-back
2087 * @data: pointer to adapter cast into an unsigned long
2089 static void igb_watchdog(unsigned long data)
2091 struct igb_adapter *adapter = (struct igb_adapter *)data;
2092 /* Do the rest outside of interrupt context */
2093 schedule_work(&adapter->watchdog_task);
2096 static void igb_watchdog_task(struct work_struct *work)
2098 struct igb_adapter *adapter = container_of(work,
2099 struct igb_adapter, watchdog_task);
2100 struct e1000_hw *hw = &adapter->hw;
2102 struct net_device *netdev = adapter->netdev;
2103 struct igb_ring *tx_ring = adapter->tx_ring;
2104 struct e1000_mac_info *mac = &adapter->hw.mac;
2108 if ((netif_carrier_ok(netdev)) &&
2109 (rd32(E1000_STATUS) & E1000_STATUS_LU))
2112 ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2113 if ((ret_val == E1000_ERR_PHY) &&
2114 (hw->phy.type == e1000_phy_igp_3) &&
2116 E1000_PHY_CTRL_GBE_DISABLE))
2117 dev_info(&adapter->pdev->dev,
2118 "Gigabit has been disabled, downgrading speed\n");
2120 if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2121 !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2122 link = mac->serdes_has_link;
2124 link = rd32(E1000_STATUS) &
2128 if (!netif_carrier_ok(netdev)) {
2130 hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2131 &adapter->link_speed,
2132 &adapter->link_duplex);
2134 ctrl = rd32(E1000_CTRL);
2135 dev_info(&adapter->pdev->dev,
2136 "NIC Link is Up %d Mbps %s, "
2137 "Flow Control: %s\n",
2138 adapter->link_speed,
2139 adapter->link_duplex == FULL_DUPLEX ?
2140 "Full Duplex" : "Half Duplex",
2141 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2142 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2143 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2144 E1000_CTRL_TFCE) ? "TX" : "None")));
2146 /* tweak tx_queue_len according to speed/duplex and
2147 * adjust the timeout factor */
2148 netdev->tx_queue_len = adapter->tx_queue_len;
2149 adapter->tx_timeout_factor = 1;
2150 switch (adapter->link_speed) {
2152 netdev->tx_queue_len = 10;
2153 adapter->tx_timeout_factor = 14;
2156 netdev->tx_queue_len = 100;
2157 /* maybe add some timeout factor ? */
2161 netif_carrier_on(netdev);
2162 netif_wake_queue(netdev);
2164 if (!test_bit(__IGB_DOWN, &adapter->state))
2165 mod_timer(&adapter->phy_info_timer,
2166 round_jiffies(jiffies + 2 * HZ));
2169 if (netif_carrier_ok(netdev)) {
2170 adapter->link_speed = 0;
2171 adapter->link_duplex = 0;
2172 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2173 netif_carrier_off(netdev);
2174 netif_stop_queue(netdev);
2175 if (!test_bit(__IGB_DOWN, &adapter->state))
2176 mod_timer(&adapter->phy_info_timer,
2177 round_jiffies(jiffies + 2 * HZ));
2182 igb_update_stats(adapter);
2184 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2185 adapter->tpt_old = adapter->stats.tpt;
2186 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2187 adapter->colc_old = adapter->stats.colc;
2189 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2190 adapter->gorc_old = adapter->stats.gorc;
2191 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2192 adapter->gotc_old = adapter->stats.gotc;
2194 igb_update_adaptive(&adapter->hw);
2196 if (!netif_carrier_ok(netdev)) {
2197 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2198 /* We've lost link, so the controller stops DMA,
2199 * but we've got queued Tx work that's never going
2200 * to get done, so reset controller to flush Tx.
2201 * (Do the reset outside of interrupt context). */
2202 adapter->tx_timeout_count++;
2203 schedule_work(&adapter->reset_task);
2207 /* Cause software interrupt to ensure rx ring is cleaned */
2208 wr32(E1000_ICS, E1000_ICS_RXDMT0);
2210 /* Force detection of hung controller every watchdog period */
2211 tx_ring->detect_tx_hung = true;
2213 /* Reset the timer */
2214 if (!test_bit(__IGB_DOWN, &adapter->state))
2215 mod_timer(&adapter->watchdog_timer,
2216 round_jiffies(jiffies + 2 * HZ));
2219 enum latency_range {
2223 latency_invalid = 255
2227 static void igb_lower_rx_eitr(struct igb_adapter *adapter,
2228 struct igb_ring *rx_ring)
2230 struct e1000_hw *hw = &adapter->hw;
2233 new_val = rx_ring->itr_val / 2;
2234 if (new_val < IGB_MIN_DYN_ITR)
2235 new_val = IGB_MIN_DYN_ITR;
2237 if (new_val != rx_ring->itr_val) {
2238 rx_ring->itr_val = new_val;
2239 wr32(rx_ring->itr_register,
2240 1000000000 / (new_val * 256));
2244 static void igb_raise_rx_eitr(struct igb_adapter *adapter,
2245 struct igb_ring *rx_ring)
2247 struct e1000_hw *hw = &adapter->hw;
2250 new_val = rx_ring->itr_val * 2;
2251 if (new_val > IGB_MAX_DYN_ITR)
2252 new_val = IGB_MAX_DYN_ITR;
2254 if (new_val != rx_ring->itr_val) {
2255 rx_ring->itr_val = new_val;
2256 wr32(rx_ring->itr_register,
2257 1000000000 / (new_val * 256));
2262 * igb_update_itr - update the dynamic ITR value based on statistics
2263 * Stores a new ITR value based on packets and byte
2264 * counts during the last interrupt. The advantage of per interrupt
2265 * computation is faster updates and more accurate ITR for the current
2266 * traffic pattern. Constants in this function were computed
2267 * based on theoretical maximum wire speed and thresholds were set based
2268 * on testing data as well as attempting to minimize response time
2269 * while increasing bulk throughput.
2270 * this functionality is controlled by the InterruptThrottleRate module
2271 * parameter (see igb_param.c)
2272 * NOTE: These calculations are only valid when operating in a single-
2273 * queue environment.
2274 * @adapter: pointer to adapter
2275 * @itr_setting: current adapter->itr
2276 * @packets: the number of packets during this measurement interval
2277 * @bytes: the number of bytes during this measurement interval
2279 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2280 int packets, int bytes)
2282 unsigned int retval = itr_setting;
2285 goto update_itr_done;
2287 switch (itr_setting) {
2288 case lowest_latency:
2289 /* handle TSO and jumbo frames */
2290 if (bytes/packets > 8000)
2291 retval = bulk_latency;
2292 else if ((packets < 5) && (bytes > 512))
2293 retval = low_latency;
2295 case low_latency: /* 50 usec aka 20000 ints/s */
2296 if (bytes > 10000) {
2297 /* this if handles the TSO accounting */
2298 if (bytes/packets > 8000) {
2299 retval = bulk_latency;
2300 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2301 retval = bulk_latency;
2302 } else if ((packets > 35)) {
2303 retval = lowest_latency;
2305 } else if (bytes/packets > 2000) {
2306 retval = bulk_latency;
2307 } else if (packets <= 2 && bytes < 512) {
2308 retval = lowest_latency;
2311 case bulk_latency: /* 250 usec aka 4000 ints/s */
2312 if (bytes > 25000) {
2314 retval = low_latency;
2315 } else if (bytes < 6000) {
2316 retval = low_latency;
2325 static void igb_set_itr(struct igb_adapter *adapter, u16 itr_register,
2329 u32 new_itr = adapter->itr;
2331 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2332 if (adapter->link_speed != SPEED_1000) {
2338 adapter->rx_itr = igb_update_itr(adapter,
2340 adapter->rx_ring->total_packets,
2341 adapter->rx_ring->total_bytes);
2342 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2343 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2344 adapter->rx_itr = low_latency;
2347 adapter->tx_itr = igb_update_itr(adapter,
2349 adapter->tx_ring->total_packets,
2350 adapter->tx_ring->total_bytes);
2351 /* conservative mode (itr 3) eliminates the
2352 * lowest_latency setting */
2353 if (adapter->itr_setting == 3 &&
2354 adapter->tx_itr == lowest_latency)
2355 adapter->tx_itr = low_latency;
2357 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2359 current_itr = adapter->rx_itr;
2362 switch (current_itr) {
2363 /* counts and packets in update_itr are dependent on these numbers */
2364 case lowest_latency:
2368 new_itr = 20000; /* aka hwitr = ~200 */
2378 if (new_itr != adapter->itr) {
2379 /* this attempts to bias the interrupt rate towards Bulk
2380 * by adding intermediate steps when interrupt rate is
2382 new_itr = new_itr > adapter->itr ?
2383 min(adapter->itr + (new_itr >> 2), new_itr) :
2385 /* Don't write the value here; it resets the adapter's
2386 * internal timer, and causes us to delay far longer than
2387 * we should between interrupts. Instead, we write the ITR
2388 * value at the beginning of the next interrupt so the timing
2389 * ends up being correct.
2391 adapter->itr = new_itr;
2392 adapter->set_itr = 1;
2399 #define IGB_TX_FLAGS_CSUM 0x00000001
2400 #define IGB_TX_FLAGS_VLAN 0x00000002
2401 #define IGB_TX_FLAGS_TSO 0x00000004
2402 #define IGB_TX_FLAGS_IPV4 0x00000008
2403 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2404 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2406 static inline int igb_tso_adv(struct igb_adapter *adapter,
2407 struct igb_ring *tx_ring,
2408 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2410 struct e1000_adv_tx_context_desc *context_desc;
2413 struct igb_buffer *buffer_info;
2414 u32 info = 0, tu_cmd = 0;
2415 u32 mss_l4len_idx, l4len;
2418 if (skb_header_cloned(skb)) {
2419 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2424 l4len = tcp_hdrlen(skb);
2427 if (skb->protocol == htons(ETH_P_IP)) {
2428 struct iphdr *iph = ip_hdr(skb);
2431 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2435 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2436 ipv6_hdr(skb)->payload_len = 0;
2437 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2438 &ipv6_hdr(skb)->daddr,
2442 i = tx_ring->next_to_use;
2444 buffer_info = &tx_ring->buffer_info[i];
2445 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2446 /* VLAN MACLEN IPLEN */
2447 if (tx_flags & IGB_TX_FLAGS_VLAN)
2448 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2449 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2450 *hdr_len += skb_network_offset(skb);
2451 info |= skb_network_header_len(skb);
2452 *hdr_len += skb_network_header_len(skb);
2453 context_desc->vlan_macip_lens = cpu_to_le32(info);
2455 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2456 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2458 if (skb->protocol == htons(ETH_P_IP))
2459 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2460 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2462 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2465 mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2466 mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2468 /* Context index must be unique per ring. Luckily, so is the interrupt
2470 mss_l4len_idx |= tx_ring->eims_value >> 4;
2472 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2473 context_desc->seqnum_seed = 0;
2475 buffer_info->time_stamp = jiffies;
2476 buffer_info->dma = 0;
2478 if (i == tx_ring->count)
2481 tx_ring->next_to_use = i;
2486 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2487 struct igb_ring *tx_ring,
2488 struct sk_buff *skb, u32 tx_flags)
2490 struct e1000_adv_tx_context_desc *context_desc;
2492 struct igb_buffer *buffer_info;
2493 u32 info = 0, tu_cmd = 0;
2495 if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2496 (tx_flags & IGB_TX_FLAGS_VLAN)) {
2497 i = tx_ring->next_to_use;
2498 buffer_info = &tx_ring->buffer_info[i];
2499 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2501 if (tx_flags & IGB_TX_FLAGS_VLAN)
2502 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2503 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2504 if (skb->ip_summed == CHECKSUM_PARTIAL)
2505 info |= skb_network_header_len(skb);
2507 context_desc->vlan_macip_lens = cpu_to_le32(info);
2509 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2511 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2512 switch (skb->protocol) {
2513 case __constant_htons(ETH_P_IP):
2514 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2515 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2516 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2518 case __constant_htons(ETH_P_IPV6):
2519 /* XXX what about other V6 headers?? */
2520 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2521 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2524 if (unlikely(net_ratelimit()))
2525 dev_warn(&adapter->pdev->dev,
2526 "partial checksum but proto=%x!\n",
2532 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2533 context_desc->seqnum_seed = 0;
2534 context_desc->mss_l4len_idx =
2535 cpu_to_le32(tx_ring->eims_value >> 4);
2537 buffer_info->time_stamp = jiffies;
2538 buffer_info->dma = 0;
2541 if (i == tx_ring->count)
2543 tx_ring->next_to_use = i;
2552 #define IGB_MAX_TXD_PWR 16
2553 #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
2555 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2556 struct igb_ring *tx_ring,
2557 struct sk_buff *skb)
2559 struct igb_buffer *buffer_info;
2560 unsigned int len = skb_headlen(skb);
2561 unsigned int count = 0, i;
2564 i = tx_ring->next_to_use;
2566 buffer_info = &tx_ring->buffer_info[i];
2567 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2568 buffer_info->length = len;
2569 /* set time_stamp *before* dma to help avoid a possible race */
2570 buffer_info->time_stamp = jiffies;
2571 buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2575 if (i == tx_ring->count)
2578 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2579 struct skb_frag_struct *frag;
2581 frag = &skb_shinfo(skb)->frags[f];
2584 buffer_info = &tx_ring->buffer_info[i];
2585 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2586 buffer_info->length = len;
2587 buffer_info->time_stamp = jiffies;
2588 buffer_info->dma = pci_map_page(adapter->pdev,
2596 if (i == tx_ring->count)
2600 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2601 tx_ring->buffer_info[i].skb = skb;
2606 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2607 struct igb_ring *tx_ring,
2608 int tx_flags, int count, u32 paylen,
2611 union e1000_adv_tx_desc *tx_desc = NULL;
2612 struct igb_buffer *buffer_info;
2613 u32 olinfo_status = 0, cmd_type_len;
2616 cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2617 E1000_ADVTXD_DCMD_DEXT);
2619 if (tx_flags & IGB_TX_FLAGS_VLAN)
2620 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2622 if (tx_flags & IGB_TX_FLAGS_TSO) {
2623 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2625 /* insert tcp checksum */
2626 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2628 /* insert ip checksum */
2629 if (tx_flags & IGB_TX_FLAGS_IPV4)
2630 olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2632 } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2633 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2636 if (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2638 olinfo_status |= tx_ring->eims_value >> 4;
2640 olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2642 i = tx_ring->next_to_use;
2644 buffer_info = &tx_ring->buffer_info[i];
2645 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2646 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2647 tx_desc->read.cmd_type_len =
2648 cpu_to_le32(cmd_type_len | buffer_info->length);
2649 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2651 if (i == tx_ring->count)
2655 tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2656 /* Force memory writes to complete before letting h/w
2657 * know there are new descriptors to fetch. (Only
2658 * applicable for weak-ordered memory model archs,
2659 * such as IA-64). */
2662 tx_ring->next_to_use = i;
2663 writel(i, adapter->hw.hw_addr + tx_ring->tail);
2664 /* we need this if more than one processor can write to our tail
2665 * at a time, it syncronizes IO on IA64/Altix systems */
2669 static int __igb_maybe_stop_tx(struct net_device *netdev,
2670 struct igb_ring *tx_ring, int size)
2672 struct igb_adapter *adapter = netdev_priv(netdev);
2674 netif_stop_queue(netdev);
2675 /* Herbert's original patch had:
2676 * smp_mb__after_netif_stop_queue();
2677 * but since that doesn't exist yet, just open code it. */
2680 /* We need to check again in a case another CPU has just
2681 * made room available. */
2682 if (IGB_DESC_UNUSED(tx_ring) < size)
2686 netif_start_queue(netdev);
2687 ++adapter->restart_queue;
2691 static int igb_maybe_stop_tx(struct net_device *netdev,
2692 struct igb_ring *tx_ring, int size)
2694 if (IGB_DESC_UNUSED(tx_ring) >= size)
2696 return __igb_maybe_stop_tx(netdev, tx_ring, size);
2699 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2701 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2702 struct net_device *netdev,
2703 struct igb_ring *tx_ring)
2705 struct igb_adapter *adapter = netdev_priv(netdev);
2706 unsigned int tx_flags = 0;
2708 unsigned long irq_flags;
2712 len = skb_headlen(skb);
2714 if (test_bit(__IGB_DOWN, &adapter->state)) {
2715 dev_kfree_skb_any(skb);
2716 return NETDEV_TX_OK;
2719 if (skb->len <= 0) {
2720 dev_kfree_skb_any(skb);
2721 return NETDEV_TX_OK;
2724 if (!spin_trylock_irqsave(&tx_ring->tx_lock, irq_flags))
2725 /* Collision - tell upper layer to requeue */
2726 return NETDEV_TX_LOCKED;
2728 /* need: 1 descriptor per page,
2729 * + 2 desc gap to keep tail from touching head,
2730 * + 1 desc for skb->data,
2731 * + 1 desc for context descriptor,
2732 * otherwise try next time */
2733 if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2734 /* this is a hard error */
2735 spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2736 return NETDEV_TX_BUSY;
2739 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2740 tx_flags |= IGB_TX_FLAGS_VLAN;
2741 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2744 tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2748 dev_kfree_skb_any(skb);
2749 spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2750 return NETDEV_TX_OK;
2754 tx_flags |= IGB_TX_FLAGS_TSO;
2755 else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
2756 if (skb->ip_summed == CHECKSUM_PARTIAL)
2757 tx_flags |= IGB_TX_FLAGS_CSUM;
2759 if (skb->protocol == htons(ETH_P_IP))
2760 tx_flags |= IGB_TX_FLAGS_IPV4;
2762 igb_tx_queue_adv(adapter, tx_ring, tx_flags,
2763 igb_tx_map_adv(adapter, tx_ring, skb),
2766 netdev->trans_start = jiffies;
2768 /* Make sure there is space in the ring for the next send. */
2769 igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
2771 spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2772 return NETDEV_TX_OK;
2775 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
2777 struct igb_adapter *adapter = netdev_priv(netdev);
2778 struct igb_ring *tx_ring = &adapter->tx_ring[0];
2780 /* This goes back to the question of how to logically map a tx queue
2781 * to a flow. Right now, performance is impacted slightly negatively
2782 * if using multiple tx queues. If the stack breaks away from a
2783 * single qdisc implementation, we can look at this again. */
2784 return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
2788 * igb_tx_timeout - Respond to a Tx Hang
2789 * @netdev: network interface device structure
2791 static void igb_tx_timeout(struct net_device *netdev)
2793 struct igb_adapter *adapter = netdev_priv(netdev);
2794 struct e1000_hw *hw = &adapter->hw;
2796 /* Do the reset outside of interrupt context */
2797 adapter->tx_timeout_count++;
2798 schedule_work(&adapter->reset_task);
2799 wr32(E1000_EICS, adapter->eims_enable_mask &
2800 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
2803 static void igb_reset_task(struct work_struct *work)
2805 struct igb_adapter *adapter;
2806 adapter = container_of(work, struct igb_adapter, reset_task);
2808 igb_reinit_locked(adapter);
2812 * igb_get_stats - Get System Network Statistics
2813 * @netdev: network interface device structure
2815 * Returns the address of the device statistics structure.
2816 * The statistics are actually updated from the timer callback.
2818 static struct net_device_stats *
2819 igb_get_stats(struct net_device *netdev)
2821 struct igb_adapter *adapter = netdev_priv(netdev);
2823 /* only return the current stats */
2824 return &adapter->net_stats;
2828 * igb_change_mtu - Change the Maximum Transfer Unit
2829 * @netdev: network interface device structure
2830 * @new_mtu: new value for maximum frame size
2832 * Returns 0 on success, negative on failure
2834 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
2836 struct igb_adapter *adapter = netdev_priv(netdev);
2837 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2839 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
2840 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2841 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
2845 #define MAX_STD_JUMBO_FRAME_SIZE 9234
2846 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
2847 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
2851 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2853 /* igb_down has a dependency on max_frame_size */
2854 adapter->max_frame_size = max_frame;
2855 if (netif_running(netdev))
2858 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
2859 * means we reserve 2 more, this pushes us to allocate from the next
2861 * i.e. RXBUFFER_2048 --> size-4096 slab
2864 if (max_frame <= IGB_RXBUFFER_256)
2865 adapter->rx_buffer_len = IGB_RXBUFFER_256;
2866 else if (max_frame <= IGB_RXBUFFER_512)
2867 adapter->rx_buffer_len = IGB_RXBUFFER_512;
2868 else if (max_frame <= IGB_RXBUFFER_1024)
2869 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
2870 else if (max_frame <= IGB_RXBUFFER_2048)
2871 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
2873 adapter->rx_buffer_len = IGB_RXBUFFER_4096;
2874 /* adjust allocation if LPE protects us, and we aren't using SBP */
2875 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
2876 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
2877 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
2879 dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
2880 netdev->mtu, new_mtu);
2881 netdev->mtu = new_mtu;
2883 if (netif_running(netdev))
2888 clear_bit(__IGB_RESETTING, &adapter->state);
2894 * igb_update_stats - Update the board statistics counters
2895 * @adapter: board private structure
2898 void igb_update_stats(struct igb_adapter *adapter)
2900 struct e1000_hw *hw = &adapter->hw;
2901 struct pci_dev *pdev = adapter->pdev;
2904 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
2907 * Prevent stats update while adapter is being reset, or if the pci
2908 * connection is down.
2910 if (adapter->link_speed == 0)
2912 if (pci_channel_offline(pdev))
2915 adapter->stats.crcerrs += rd32(E1000_CRCERRS);
2916 adapter->stats.gprc += rd32(E1000_GPRC);
2917 adapter->stats.gorc += rd32(E1000_GORCL);
2918 rd32(E1000_GORCH); /* clear GORCL */
2919 adapter->stats.bprc += rd32(E1000_BPRC);
2920 adapter->stats.mprc += rd32(E1000_MPRC);
2921 adapter->stats.roc += rd32(E1000_ROC);
2923 adapter->stats.prc64 += rd32(E1000_PRC64);
2924 adapter->stats.prc127 += rd32(E1000_PRC127);
2925 adapter->stats.prc255 += rd32(E1000_PRC255);
2926 adapter->stats.prc511 += rd32(E1000_PRC511);
2927 adapter->stats.prc1023 += rd32(E1000_PRC1023);
2928 adapter->stats.prc1522 += rd32(E1000_PRC1522);
2929 adapter->stats.symerrs += rd32(E1000_SYMERRS);
2930 adapter->stats.sec += rd32(E1000_SEC);
2932 adapter->stats.mpc += rd32(E1000_MPC);
2933 adapter->stats.scc += rd32(E1000_SCC);
2934 adapter->stats.ecol += rd32(E1000_ECOL);
2935 adapter->stats.mcc += rd32(E1000_MCC);
2936 adapter->stats.latecol += rd32(E1000_LATECOL);
2937 adapter->stats.dc += rd32(E1000_DC);
2938 adapter->stats.rlec += rd32(E1000_RLEC);
2939 adapter->stats.xonrxc += rd32(E1000_XONRXC);
2940 adapter->stats.xontxc += rd32(E1000_XONTXC);
2941 adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
2942 adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
2943 adapter->stats.fcruc += rd32(E1000_FCRUC);
2944 adapter->stats.gptc += rd32(E1000_GPTC);
2945 adapter->stats.gotc += rd32(E1000_GOTCL);
2946 rd32(E1000_GOTCH); /* clear GOTCL */
2947 adapter->stats.rnbc += rd32(E1000_RNBC);
2948 adapter->stats.ruc += rd32(E1000_RUC);
2949 adapter->stats.rfc += rd32(E1000_RFC);
2950 adapter->stats.rjc += rd32(E1000_RJC);
2951 adapter->stats.tor += rd32(E1000_TORH);
2952 adapter->stats.tot += rd32(E1000_TOTH);
2953 adapter->stats.tpr += rd32(E1000_TPR);
2955 adapter->stats.ptc64 += rd32(E1000_PTC64);
2956 adapter->stats.ptc127 += rd32(E1000_PTC127);
2957 adapter->stats.ptc255 += rd32(E1000_PTC255);
2958 adapter->stats.ptc511 += rd32(E1000_PTC511);
2959 adapter->stats.ptc1023 += rd32(E1000_PTC1023);
2960 adapter->stats.ptc1522 += rd32(E1000_PTC1522);
2962 adapter->stats.mptc += rd32(E1000_MPTC);
2963 adapter->stats.bptc += rd32(E1000_BPTC);
2965 /* used for adaptive IFS */
2967 hw->mac.tx_packet_delta = rd32(E1000_TPT);
2968 adapter->stats.tpt += hw->mac.tx_packet_delta;
2969 hw->mac.collision_delta = rd32(E1000_COLC);
2970 adapter->stats.colc += hw->mac.collision_delta;
2972 adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
2973 adapter->stats.rxerrc += rd32(E1000_RXERRC);
2974 adapter->stats.tncrs += rd32(E1000_TNCRS);
2975 adapter->stats.tsctc += rd32(E1000_TSCTC);
2976 adapter->stats.tsctfc += rd32(E1000_TSCTFC);
2978 adapter->stats.iac += rd32(E1000_IAC);
2979 adapter->stats.icrxoc += rd32(E1000_ICRXOC);
2980 adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
2981 adapter->stats.icrxatc += rd32(E1000_ICRXATC);
2982 adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
2983 adapter->stats.ictxatc += rd32(E1000_ICTXATC);
2984 adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
2985 adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
2986 adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
2988 /* Fill out the OS statistics structure */
2989 adapter->net_stats.multicast = adapter->stats.mprc;
2990 adapter->net_stats.collisions = adapter->stats.colc;
2994 /* RLEC on some newer hardware can be incorrect so build
2995 * our own version based on RUC and ROC */
2996 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
2997 adapter->stats.crcerrs + adapter->stats.algnerrc +
2998 adapter->stats.ruc + adapter->stats.roc +
2999 adapter->stats.cexterr;
3000 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3002 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3003 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3004 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3007 adapter->net_stats.tx_errors = adapter->stats.ecol +
3008 adapter->stats.latecol;
3009 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3010 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3011 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3013 /* Tx Dropped needs to be maintained elsewhere */
3016 if (hw->phy.media_type == e1000_media_type_copper) {
3017 if ((adapter->link_speed == SPEED_1000) &&
3018 (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS,
3020 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3021 adapter->phy_stats.idle_errors += phy_tmp;
3025 /* Management Stats */
3026 adapter->stats.mgptc += rd32(E1000_MGTPTC);
3027 adapter->stats.mgprc += rd32(E1000_MGTPRC);
3028 adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3032 static irqreturn_t igb_msix_other(int irq, void *data)
3034 struct net_device *netdev = data;
3035 struct igb_adapter *adapter = netdev_priv(netdev);
3036 struct e1000_hw *hw = &adapter->hw;
3038 /* disable interrupts from the "other" bit, avoid re-entry */
3039 wr32(E1000_EIMC, E1000_EIMS_OTHER);
3041 eicr = rd32(E1000_EICR);
3043 if (eicr & E1000_EIMS_OTHER) {
3044 u32 icr = rd32(E1000_ICR);
3045 /* reading ICR causes bit 31 of EICR to be cleared */
3046 if (!(icr & E1000_ICR_LSC))
3047 goto no_link_interrupt;
3048 hw->mac.get_link_status = 1;
3049 /* guard against interrupt when we're going down */
3050 if (!test_bit(__IGB_DOWN, &adapter->state))
3051 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3055 wr32(E1000_IMS, E1000_IMS_LSC);
3056 wr32(E1000_EIMS, E1000_EIMS_OTHER);
3061 static irqreturn_t igb_msix_tx(int irq, void *data)
3063 struct igb_ring *tx_ring = data;
3064 struct igb_adapter *adapter = tx_ring->adapter;
3065 struct e1000_hw *hw = &adapter->hw;
3067 if (!tx_ring->itr_val)
3068 wr32(E1000_EIMC, tx_ring->eims_value);
3070 tx_ring->total_bytes = 0;
3071 tx_ring->total_packets = 0;
3072 if (!igb_clean_tx_irq(tx_ring))
3073 /* Ring was not completely cleaned, so fire another interrupt */
3074 wr32(E1000_EICS, tx_ring->eims_value);
3076 if (!tx_ring->itr_val)
3077 wr32(E1000_EIMS, tx_ring->eims_value);
3081 static irqreturn_t igb_msix_rx(int irq, void *data)
3083 struct igb_ring *rx_ring = data;
3084 struct igb_adapter *adapter = rx_ring->adapter;
3085 struct e1000_hw *hw = &adapter->hw;
3087 if (!rx_ring->itr_val)
3088 wr32(E1000_EIMC, rx_ring->eims_value);
3090 if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi)) {
3091 rx_ring->total_bytes = 0;
3092 rx_ring->total_packets = 0;
3093 rx_ring->no_itr_adjust = 0;
3094 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3096 if (!rx_ring->no_itr_adjust) {
3097 igb_lower_rx_eitr(adapter, rx_ring);
3098 rx_ring->no_itr_adjust = 1;
3107 * igb_intr_msi - Interrupt Handler
3108 * @irq: interrupt number
3109 * @data: pointer to a network interface device structure
3111 static irqreturn_t igb_intr_msi(int irq, void *data)
3113 struct net_device *netdev = data;
3114 struct igb_adapter *adapter = netdev_priv(netdev);
3115 struct napi_struct *napi = &adapter->napi;
3116 struct e1000_hw *hw = &adapter->hw;
3117 /* read ICR disables interrupts using IAM */
3118 u32 icr = rd32(E1000_ICR);
3120 /* Write the ITR value calculated at the end of the
3121 * previous interrupt.
3123 if (adapter->set_itr) {
3125 1000000000 / (adapter->itr * 256));
3126 adapter->set_itr = 0;
3129 /* read ICR disables interrupts using IAM */
3130 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3131 hw->mac.get_link_status = 1;
3132 if (!test_bit(__IGB_DOWN, &adapter->state))
3133 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3136 if (netif_rx_schedule_prep(netdev, napi)) {
3137 adapter->tx_ring->total_bytes = 0;
3138 adapter->tx_ring->total_packets = 0;
3139 adapter->rx_ring->total_bytes = 0;
3140 adapter->rx_ring->total_packets = 0;
3141 __netif_rx_schedule(netdev, napi);
3148 * igb_intr - Interrupt Handler
3149 * @irq: interrupt number
3150 * @data: pointer to a network interface device structure
3152 static irqreturn_t igb_intr(int irq, void *data)
3154 struct net_device *netdev = data;
3155 struct igb_adapter *adapter = netdev_priv(netdev);
3156 struct napi_struct *napi = &adapter->napi;
3157 struct e1000_hw *hw = &adapter->hw;
3158 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3159 * need for the IMC write */
3160 u32 icr = rd32(E1000_ICR);
3163 return IRQ_NONE; /* Not our interrupt */
3165 /* Write the ITR value calculated at the end of the
3166 * previous interrupt.
3168 if (adapter->set_itr) {
3170 1000000000 / (adapter->itr * 256));
3171 adapter->set_itr = 0;
3174 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3175 * not set, then the adapter didn't send an interrupt */
3176 if (!(icr & E1000_ICR_INT_ASSERTED))
3179 eicr = rd32(E1000_EICR);
3181 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3182 hw->mac.get_link_status = 1;
3183 /* guard against interrupt when we're going down */
3184 if (!test_bit(__IGB_DOWN, &adapter->state))
3185 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3188 if (netif_rx_schedule_prep(netdev, napi)) {
3189 adapter->tx_ring->total_bytes = 0;
3190 adapter->rx_ring->total_bytes = 0;
3191 adapter->tx_ring->total_packets = 0;
3192 adapter->rx_ring->total_packets = 0;
3193 __netif_rx_schedule(netdev, napi);
3200 * igb_clean - NAPI Rx polling callback
3201 * @adapter: board private structure
3203 static int igb_clean(struct napi_struct *napi, int budget)
3205 struct igb_adapter *adapter = container_of(napi, struct igb_adapter,
3207 struct net_device *netdev = adapter->netdev;
3208 int tx_clean_complete = 1, work_done = 0;
3211 /* Must NOT use netdev_priv macro here. */
3212 adapter = netdev->priv;
3214 /* Keep link state information with original netdev */
3215 if (!netif_carrier_ok(netdev))
3218 /* igb_clean is called per-cpu. This lock protects tx_ring[i] from
3219 * being cleaned by multiple cpus simultaneously. A failure obtaining
3220 * the lock means tx_ring[i] is currently being cleaned anyway. */
3221 for (i = 0; i < adapter->num_tx_queues; i++) {
3222 if (spin_trylock(&adapter->tx_ring[i].tx_clean_lock)) {
3223 tx_clean_complete &= igb_clean_tx_irq(&adapter->tx_ring[i]);
3224 spin_unlock(&adapter->tx_ring[i].tx_clean_lock);
3228 for (i = 0; i < adapter->num_rx_queues; i++)
3229 igb_clean_rx_irq_adv(&adapter->rx_ring[i], &work_done,
3230 adapter->rx_ring[i].napi.weight);
3232 /* If no Tx and not enough Rx work done, exit the polling mode */
3233 if ((tx_clean_complete && (work_done < budget)) ||
3234 !netif_running(netdev)) {
3236 if (adapter->itr_setting & 3)
3237 igb_set_itr(adapter, E1000_ITR, false);
3238 netif_rx_complete(netdev, napi);
3239 if (!test_bit(__IGB_DOWN, &adapter->state))
3240 igb_irq_enable(adapter);
3247 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3249 struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3250 struct igb_adapter *adapter = rx_ring->adapter;
3251 struct e1000_hw *hw = &adapter->hw;
3252 struct net_device *netdev = adapter->netdev;
3255 /* Keep link state information with original netdev */
3256 if (!netif_carrier_ok(netdev))
3259 igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
3262 /* If not enough Rx work done, exit the polling mode */
3263 if ((work_done == 0) || !netif_running(netdev)) {
3265 netif_rx_complete(netdev, napi);
3267 wr32(E1000_EIMS, rx_ring->eims_value);
3268 if ((adapter->itr_setting & 3) && !rx_ring->no_itr_adjust &&
3269 (rx_ring->total_packets > IGB_DYN_ITR_PACKET_THRESHOLD)) {
3270 int mean_size = rx_ring->total_bytes /
3271 rx_ring->total_packets;
3272 if (mean_size < IGB_DYN_ITR_LENGTH_LOW)
3273 igb_raise_rx_eitr(adapter, rx_ring);
3274 else if (mean_size > IGB_DYN_ITR_LENGTH_HIGH)
3275 igb_lower_rx_eitr(adapter, rx_ring);
3283 static inline u32 get_head(struct igb_ring *tx_ring)
3285 void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
3286 return le32_to_cpu(*(volatile __le32 *)end);
3290 * igb_clean_tx_irq - Reclaim resources after transmit completes
3291 * @adapter: board private structure
3292 * returns true if ring is completely cleaned
3294 static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
3296 struct igb_adapter *adapter = tx_ring->adapter;
3297 struct e1000_hw *hw = &adapter->hw;
3298 struct net_device *netdev = adapter->netdev;
3299 struct e1000_tx_desc *tx_desc;
3300 struct igb_buffer *buffer_info;
3301 struct sk_buff *skb;
3304 unsigned int count = 0;
3305 bool cleaned = false;
3307 unsigned int total_bytes = 0, total_packets = 0;
3310 head = get_head(tx_ring);
3311 i = tx_ring->next_to_clean;
3315 tx_desc = E1000_TX_DESC(*tx_ring, i);
3316 buffer_info = &tx_ring->buffer_info[i];
3317 skb = buffer_info->skb;
3320 unsigned int segs, bytecount;
3321 /* gso_segs is currently only valid for tcp */
3322 segs = skb_shinfo(skb)->gso_segs ?: 1;
3323 /* multiply data chunks by size of headers */
3324 bytecount = ((segs - 1) * skb_headlen(skb)) +
3326 total_packets += segs;
3327 total_bytes += bytecount;
3330 igb_unmap_and_free_tx_resource(adapter, buffer_info);
3331 tx_desc->upper.data = 0;
3334 if (i == tx_ring->count)
3338 if (count == IGB_MAX_TX_CLEAN) {
3345 head = get_head(tx_ring);
3346 if (head == oldhead)
3351 tx_ring->next_to_clean = i;
3353 if (unlikely(cleaned &&
3354 netif_carrier_ok(netdev) &&
3355 IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3356 /* Make sure that anybody stopping the queue after this
3357 * sees the new next_to_clean.
3360 if (netif_queue_stopped(netdev) &&
3361 !(test_bit(__IGB_DOWN, &adapter->state))) {
3362 netif_wake_queue(netdev);
3363 ++adapter->restart_queue;
3367 if (tx_ring->detect_tx_hung) {
3368 /* Detect a transmit hang in hardware, this serializes the
3369 * check with the clearing of time_stamp and movement of i */
3370 tx_ring->detect_tx_hung = false;
3371 if (tx_ring->buffer_info[i].time_stamp &&
3372 time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3373 (adapter->tx_timeout_factor * HZ))
3374 && !(rd32(E1000_STATUS) &
3375 E1000_STATUS_TXOFF)) {
3377 tx_desc = E1000_TX_DESC(*tx_ring, i);
3378 /* detected Tx unit hang */
3379 dev_err(&adapter->pdev->dev,
3380 "Detected Tx Unit Hang\n"
3384 " next_to_use <%x>\n"
3385 " next_to_clean <%x>\n"
3387 "buffer_info[next_to_clean]\n"
3388 " time_stamp <%lx>\n"
3390 " desc.status <%x>\n",
3391 (unsigned long)((tx_ring - adapter->tx_ring) /
3392 sizeof(struct igb_ring)),
3393 readl(adapter->hw.hw_addr + tx_ring->head),
3394 readl(adapter->hw.hw_addr + tx_ring->tail),
3395 tx_ring->next_to_use,
3396 tx_ring->next_to_clean,
3398 tx_ring->buffer_info[i].time_stamp,
3400 tx_desc->upper.fields.status);
3401 netif_stop_queue(netdev);
3404 tx_ring->total_bytes += total_bytes;
3405 tx_ring->total_packets += total_packets;
3406 adapter->net_stats.tx_bytes += total_bytes;
3407 adapter->net_stats.tx_packets += total_packets;
3413 * igb_receive_skb - helper function to handle rx indications
3414 * @adapter: board private structure
3415 * @status: descriptor status field as written by hardware
3416 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3417 * @skb: pointer to sk_buff to be indicated to stack
3419 static void igb_receive_skb(struct igb_adapter *adapter, u8 status, __le16 vlan,
3420 struct sk_buff *skb)
3422 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
3423 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3425 E1000_RXD_SPC_VLAN_MASK);
3427 netif_receive_skb(skb);
3431 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3432 u32 status_err, struct sk_buff *skb)
3434 skb->ip_summed = CHECKSUM_NONE;
3436 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3437 if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3439 /* TCP/UDP checksum error bit is set */
3441 (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3442 /* let the stack verify checksum errors */
3443 adapter->hw_csum_err++;
3446 /* It must be a TCP or UDP packet with a valid checksum */
3447 if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3448 skb->ip_summed = CHECKSUM_UNNECESSARY;
3450 adapter->hw_csum_good++;
3453 static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
3454 int *work_done, int budget)
3456 struct igb_adapter *adapter = rx_ring->adapter;
3457 struct net_device *netdev = adapter->netdev;
3458 struct pci_dev *pdev = adapter->pdev;
3459 union e1000_adv_rx_desc *rx_desc , *next_rxd;
3460 struct igb_buffer *buffer_info , *next_buffer;
3461 struct sk_buff *skb;
3463 u32 length, hlen, staterr;
3464 bool cleaned = false;
3465 int cleaned_count = 0;
3466 unsigned int total_bytes = 0, total_packets = 0;
3468 i = rx_ring->next_to_clean;
3469 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3470 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3472 while (staterr & E1000_RXD_STAT_DD) {
3473 if (*work_done >= budget)
3476 buffer_info = &rx_ring->buffer_info[i];
3478 /* HW will not DMA in data larger than the given buffer, even
3479 * if it parses the (NFS, of course) header to be larger. In
3480 * that case, it fills the header buffer and spills the rest
3483 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3484 E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
3485 if (hlen > adapter->rx_ps_hdr_size)
3486 hlen = adapter->rx_ps_hdr_size;
3488 length = le16_to_cpu(rx_desc->wb.upper.length);
3492 if (rx_ring->pending_skb != NULL) {
3493 skb = rx_ring->pending_skb;
3494 rx_ring->pending_skb = NULL;
3495 j = rx_ring->pending_skb_page;
3497 skb = buffer_info->skb;
3498 prefetch(skb->data - NET_IP_ALIGN);
3499 buffer_info->skb = NULL;
3501 pci_unmap_single(pdev, buffer_info->dma,
3502 adapter->rx_ps_hdr_size +
3504 PCI_DMA_FROMDEVICE);
3507 pci_unmap_single(pdev, buffer_info->dma,
3508 adapter->rx_buffer_len +
3510 PCI_DMA_FROMDEVICE);
3511 skb_put(skb, length);
3518 pci_unmap_page(pdev, buffer_info->page_dma,
3519 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3520 buffer_info->page_dma = 0;
3521 skb_fill_page_desc(skb, j, buffer_info->page,
3523 buffer_info->page = NULL;
3526 skb->data_len += length;
3527 skb->truesize += length;
3528 rx_desc->wb.upper.status_error = 0;
3529 if (staterr & E1000_RXD_STAT_EOP)
3535 if (i == rx_ring->count)
3538 buffer_info = &rx_ring->buffer_info[i];
3539 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3540 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3541 length = le16_to_cpu(rx_desc->wb.upper.length);
3542 if (!(staterr & E1000_RXD_STAT_DD)) {
3543 rx_ring->pending_skb = skb;
3544 rx_ring->pending_skb_page = j;
3549 pskb_trim(skb, skb->len - 4);
3551 if (i == rx_ring->count)
3553 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3555 next_buffer = &rx_ring->buffer_info[i];
3557 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3558 dev_kfree_skb_irq(skb);
3561 rx_ring->no_itr_adjust |= (staterr & E1000_RXD_STAT_DYNINT);
3563 total_bytes += skb->len;
3566 igb_rx_checksum_adv(adapter, staterr, skb);
3568 skb->protocol = eth_type_trans(skb, netdev);
3570 igb_receive_skb(adapter, staterr, rx_desc->wb.upper.vlan, skb);
3572 netdev->last_rx = jiffies;
3575 rx_desc->wb.upper.status_error = 0;
3577 /* return some buffers to hardware, one at a time is too slow */
3578 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
3579 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3583 /* use prefetched values */
3585 buffer_info = next_buffer;
3587 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3590 rx_ring->next_to_clean = i;
3591 cleaned_count = IGB_DESC_UNUSED(rx_ring);
3594 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3596 rx_ring->total_packets += total_packets;
3597 rx_ring->total_bytes += total_bytes;
3598 rx_ring->rx_stats.packets += total_packets;
3599 rx_ring->rx_stats.bytes += total_bytes;
3600 adapter->net_stats.rx_bytes += total_bytes;
3601 adapter->net_stats.rx_packets += total_packets;
3607 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3608 * @adapter: address of board private structure
3610 static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
3613 struct igb_adapter *adapter = rx_ring->adapter;
3614 struct net_device *netdev = adapter->netdev;
3615 struct pci_dev *pdev = adapter->pdev;
3616 union e1000_adv_rx_desc *rx_desc;
3617 struct igb_buffer *buffer_info;
3618 struct sk_buff *skb;
3621 i = rx_ring->next_to_use;
3622 buffer_info = &rx_ring->buffer_info[i];
3624 while (cleaned_count--) {
3625 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3627 if (adapter->rx_ps_hdr_size && !buffer_info->page) {
3628 buffer_info->page = alloc_page(GFP_ATOMIC);
3629 if (!buffer_info->page) {
3630 adapter->alloc_rx_buff_failed++;
3633 buffer_info->page_dma =
3637 PCI_DMA_FROMDEVICE);
3640 if (!buffer_info->skb) {
3643 if (adapter->rx_ps_hdr_size)
3644 bufsz = adapter->rx_ps_hdr_size;
3646 bufsz = adapter->rx_buffer_len;
3647 bufsz += NET_IP_ALIGN;
3648 skb = netdev_alloc_skb(netdev, bufsz);
3651 adapter->alloc_rx_buff_failed++;
3655 /* Make buffer alignment 2 beyond a 16 byte boundary
3656 * this will result in a 16 byte aligned IP header after
3657 * the 14 byte MAC header is removed
3659 skb_reserve(skb, NET_IP_ALIGN);
3661 buffer_info->skb = skb;
3662 buffer_info->dma = pci_map_single(pdev, skb->data,
3664 PCI_DMA_FROMDEVICE);
3667 /* Refresh the desc even if buffer_addrs didn't change because
3668 * each write-back erases this info. */
3669 if (adapter->rx_ps_hdr_size) {
3670 rx_desc->read.pkt_addr =
3671 cpu_to_le64(buffer_info->page_dma);
3672 rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
3674 rx_desc->read.pkt_addr =
3675 cpu_to_le64(buffer_info->dma);
3676 rx_desc->read.hdr_addr = 0;
3680 if (i == rx_ring->count)
3682 buffer_info = &rx_ring->buffer_info[i];
3686 if (rx_ring->next_to_use != i) {
3687 rx_ring->next_to_use = i;
3689 i = (rx_ring->count - 1);
3693 /* Force memory writes to complete before letting h/w
3694 * know there are new descriptors to fetch. (Only
3695 * applicable for weak-ordered memory model archs,
3696 * such as IA-64). */
3698 writel(i, adapter->hw.hw_addr + rx_ring->tail);
3708 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3710 struct igb_adapter *adapter = netdev_priv(netdev);
3711 struct mii_ioctl_data *data = if_mii(ifr);
3713 if (adapter->hw.phy.media_type != e1000_media_type_copper)
3718 data->phy_id = adapter->hw.phy.addr;
3721 if (!capable(CAP_NET_ADMIN))
3723 if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw,
3725 & 0x1F, &data->val_out))
3741 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3747 return igb_mii_ioctl(netdev, ifr, cmd);
3753 static void igb_vlan_rx_register(struct net_device *netdev,
3754 struct vlan_group *grp)
3756 struct igb_adapter *adapter = netdev_priv(netdev);
3757 struct e1000_hw *hw = &adapter->hw;
3760 igb_irq_disable(adapter);
3761 adapter->vlgrp = grp;
3764 /* enable VLAN tag insert/strip */
3765 ctrl = rd32(E1000_CTRL);
3766 ctrl |= E1000_CTRL_VME;
3767 wr32(E1000_CTRL, ctrl);
3769 /* enable VLAN receive filtering */
3770 rctl = rd32(E1000_RCTL);
3771 rctl |= E1000_RCTL_VFE;
3772 rctl &= ~E1000_RCTL_CFIEN;
3773 wr32(E1000_RCTL, rctl);
3774 igb_update_mng_vlan(adapter);
3776 adapter->max_frame_size + VLAN_TAG_SIZE);
3778 /* disable VLAN tag insert/strip */
3779 ctrl = rd32(E1000_CTRL);
3780 ctrl &= ~E1000_CTRL_VME;
3781 wr32(E1000_CTRL, ctrl);
3783 /* disable VLAN filtering */
3784 rctl = rd32(E1000_RCTL);
3785 rctl &= ~E1000_RCTL_VFE;
3786 wr32(E1000_RCTL, rctl);
3787 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
3788 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3789 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
3792 adapter->max_frame_size);
3795 if (!test_bit(__IGB_DOWN, &adapter->state))
3796 igb_irq_enable(adapter);
3799 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
3801 struct igb_adapter *adapter = netdev_priv(netdev);
3802 struct e1000_hw *hw = &adapter->hw;
3805 if ((adapter->hw.mng_cookie.status &
3806 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3807 (vid == adapter->mng_vlan_id))
3809 /* add VID to filter table */
3810 index = (vid >> 5) & 0x7F;
3811 vfta = array_rd32(E1000_VFTA, index);
3812 vfta |= (1 << (vid & 0x1F));
3813 igb_write_vfta(&adapter->hw, index, vfta);
3816 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
3818 struct igb_adapter *adapter = netdev_priv(netdev);
3819 struct e1000_hw *hw = &adapter->hw;
3822 igb_irq_disable(adapter);
3823 vlan_group_set_device(adapter->vlgrp, vid, NULL);
3825 if (!test_bit(__IGB_DOWN, &adapter->state))
3826 igb_irq_enable(adapter);
3828 if ((adapter->hw.mng_cookie.status &
3829 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3830 (vid == adapter->mng_vlan_id)) {
3831 /* release control to f/w */
3832 igb_release_hw_control(adapter);
3836 /* remove VID from filter table */
3837 index = (vid >> 5) & 0x7F;
3838 vfta = array_rd32(E1000_VFTA, index);
3839 vfta &= ~(1 << (vid & 0x1F));
3840 igb_write_vfta(&adapter->hw, index, vfta);
3843 static void igb_restore_vlan(struct igb_adapter *adapter)
3845 igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
3847 if (adapter->vlgrp) {
3849 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
3850 if (!vlan_group_get_device(adapter->vlgrp, vid))
3852 igb_vlan_rx_add_vid(adapter->netdev, vid);
3857 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
3859 struct e1000_mac_info *mac = &adapter->hw.mac;
3863 /* Fiber NICs only allow 1000 gbps Full duplex */
3864 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
3865 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
3866 dev_err(&adapter->pdev->dev,
3867 "Unsupported Speed/Duplex configuration\n");
3872 case SPEED_10 + DUPLEX_HALF:
3873 mac->forced_speed_duplex = ADVERTISE_10_HALF;
3875 case SPEED_10 + DUPLEX_FULL:
3876 mac->forced_speed_duplex = ADVERTISE_10_FULL;
3878 case SPEED_100 + DUPLEX_HALF:
3879 mac->forced_speed_duplex = ADVERTISE_100_HALF;
3881 case SPEED_100 + DUPLEX_FULL:
3882 mac->forced_speed_duplex = ADVERTISE_100_FULL;
3884 case SPEED_1000 + DUPLEX_FULL:
3886 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
3888 case SPEED_1000 + DUPLEX_HALF: /* not supported */
3890 dev_err(&adapter->pdev->dev,
3891 "Unsupported Speed/Duplex configuration\n");
3898 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
3900 struct net_device *netdev = pci_get_drvdata(pdev);
3901 struct igb_adapter *adapter = netdev_priv(netdev);
3902 struct e1000_hw *hw = &adapter->hw;
3903 u32 ctrl, ctrl_ext, rctl, status;
3904 u32 wufc = adapter->wol;
3909 netif_device_detach(netdev);
3911 if (netif_running(netdev)) {
3912 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3914 igb_free_irq(adapter);
3918 retval = pci_save_state(pdev);
3923 status = rd32(E1000_STATUS);
3924 if (status & E1000_STATUS_LU)
3925 wufc &= ~E1000_WUFC_LNKC;
3928 igb_setup_rctl(adapter);
3929 igb_set_multi(netdev);
3931 /* turn on all-multi mode if wake on multicast is enabled */
3932 if (wufc & E1000_WUFC_MC) {
3933 rctl = rd32(E1000_RCTL);
3934 rctl |= E1000_RCTL_MPE;
3935 wr32(E1000_RCTL, rctl);
3938 ctrl = rd32(E1000_CTRL);
3939 /* advertise wake from D3Cold */
3940 #define E1000_CTRL_ADVD3WUC 0x00100000
3941 /* phy power management enable */
3942 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
3943 ctrl |= E1000_CTRL_ADVD3WUC;
3944 wr32(E1000_CTRL, ctrl);
3946 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
3947 adapter->hw.phy.media_type ==
3948 e1000_media_type_internal_serdes) {
3949 /* keep the laser running in D3 */
3950 ctrl_ext = rd32(E1000_CTRL_EXT);
3951 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
3952 wr32(E1000_CTRL_EXT, ctrl_ext);
3955 /* Allow time for pending master requests to run */
3956 igb_disable_pcie_master(&adapter->hw);
3958 wr32(E1000_WUC, E1000_WUC_PME_EN);
3959 wr32(E1000_WUFC, wufc);
3960 pci_enable_wake(pdev, PCI_D3hot, 1);
3961 pci_enable_wake(pdev, PCI_D3cold, 1);
3964 wr32(E1000_WUFC, 0);
3965 pci_enable_wake(pdev, PCI_D3hot, 0);
3966 pci_enable_wake(pdev, PCI_D3cold, 0);
3969 /* make sure adapter isn't asleep if manageability is enabled */
3970 if (adapter->en_mng_pt) {
3971 pci_enable_wake(pdev, PCI_D3hot, 1);
3972 pci_enable_wake(pdev, PCI_D3cold, 1);
3975 /* Release control of h/w to f/w. If f/w is AMT enabled, this
3976 * would have already happened in close and is redundant. */
3977 igb_release_hw_control(adapter);
3979 pci_disable_device(pdev);
3981 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3987 static int igb_resume(struct pci_dev *pdev)
3989 struct net_device *netdev = pci_get_drvdata(pdev);
3990 struct igb_adapter *adapter = netdev_priv(netdev);
3991 struct e1000_hw *hw = &adapter->hw;
3994 pci_set_power_state(pdev, PCI_D0);
3995 pci_restore_state(pdev);
3997 if (adapter->need_ioport)
3998 err = pci_enable_device(pdev);
4000 err = pci_enable_device_mem(pdev);
4003 "igb: Cannot enable PCI device from suspend\n");
4006 pci_set_master(pdev);
4008 pci_enable_wake(pdev, PCI_D3hot, 0);
4009 pci_enable_wake(pdev, PCI_D3cold, 0);
4011 if (netif_running(netdev)) {
4012 err = igb_request_irq(adapter);
4017 /* e1000_power_up_phy(adapter); */
4020 wr32(E1000_WUS, ~0);
4022 igb_init_manageability(adapter);
4024 if (netif_running(netdev))
4027 netif_device_attach(netdev);
4029 /* let the f/w know that the h/w is now under the control of the
4031 igb_get_hw_control(adapter);
4037 static void igb_shutdown(struct pci_dev *pdev)
4039 igb_suspend(pdev, PMSG_SUSPEND);
4042 #ifdef CONFIG_NET_POLL_CONTROLLER
4044 * Polling 'interrupt' - used by things like netconsole to send skbs
4045 * without having to re-enable interrupts. It's not called while
4046 * the interrupt routine is executing.
4048 static void igb_netpoll(struct net_device *netdev)
4050 struct igb_adapter *adapter = netdev_priv(netdev);
4054 igb_irq_disable(adapter);
4055 for (i = 0; i < adapter->num_tx_queues; i++)
4056 igb_clean_tx_irq(&adapter->tx_ring[i]);
4058 for (i = 0; i < adapter->num_rx_queues; i++)
4059 igb_clean_rx_irq_adv(&adapter->rx_ring[i],
4061 adapter->rx_ring[i].napi.weight);
4063 igb_irq_enable(adapter);
4065 #endif /* CONFIG_NET_POLL_CONTROLLER */
4068 * igb_io_error_detected - called when PCI error is detected
4069 * @pdev: Pointer to PCI device
4070 * @state: The current pci connection state
4072 * This function is called after a PCI bus error affecting
4073 * this device has been detected.
4075 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4076 pci_channel_state_t state)
4078 struct net_device *netdev = pci_get_drvdata(pdev);
4079 struct igb_adapter *adapter = netdev_priv(netdev);
4081 netif_device_detach(netdev);
4083 if (netif_running(netdev))
4085 pci_disable_device(pdev);
4087 /* Request a slot slot reset. */
4088 return PCI_ERS_RESULT_NEED_RESET;
4092 * igb_io_slot_reset - called after the pci bus has been reset.
4093 * @pdev: Pointer to PCI device
4095 * Restart the card from scratch, as if from a cold-boot. Implementation
4096 * resembles the first-half of the igb_resume routine.
4098 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4100 struct net_device *netdev = pci_get_drvdata(pdev);
4101 struct igb_adapter *adapter = netdev_priv(netdev);
4102 struct e1000_hw *hw = &adapter->hw;
4105 if (adapter->need_ioport)
4106 err = pci_enable_device(pdev);
4108 err = pci_enable_device_mem(pdev);
4111 "Cannot re-enable PCI device after reset.\n");
4112 return PCI_ERS_RESULT_DISCONNECT;
4114 pci_set_master(pdev);
4115 pci_restore_state(pdev);
4117 pci_enable_wake(pdev, PCI_D3hot, 0);
4118 pci_enable_wake(pdev, PCI_D3cold, 0);
4121 wr32(E1000_WUS, ~0);
4123 return PCI_ERS_RESULT_RECOVERED;
4127 * igb_io_resume - called when traffic can start flowing again.
4128 * @pdev: Pointer to PCI device
4130 * This callback is called when the error recovery driver tells us that
4131 * its OK to resume normal operation. Implementation resembles the
4132 * second-half of the igb_resume routine.
4134 static void igb_io_resume(struct pci_dev *pdev)
4136 struct net_device *netdev = pci_get_drvdata(pdev);
4137 struct igb_adapter *adapter = netdev_priv(netdev);
4139 igb_init_manageability(adapter);
4141 if (netif_running(netdev)) {
4142 if (igb_up(adapter)) {
4143 dev_err(&pdev->dev, "igb_up failed after reset\n");
4148 netif_device_attach(netdev);
4150 /* let the f/w know that the h/w is now under the control of the
4152 igb_get_hw_control(adapter);