err.no Git - linux-2.6/blob - drivers/net/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/module.h>
  29 #include <linux/types.h>
  30 #include <linux/init.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/pagemap.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/ipv6.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/mii.h>
  38 #include <linux/ethtool.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/pci.h>
  41 #include <linux/delay.h>
  42 #include <linux/interrupt.h>
  43 #include <linux/if_ether.h>
  44
  45 #include "igb.h"
  46
  47 #define DRV_VERSION "1.0.8-k2"
  48 char igb_driver_name[] = "igb";
  49 char igb_driver_version[] = DRV_VERSION;
  50 static const char igb_driver_string[] =
  51                                 "Intel(R) Gigabit Ethernet Network Driver";
  52 static const char igb_copyright[] = "Copyright (c) 2007 Intel Corporation.";
  53
  54
  55 static const struct e1000_info *igb_info_tbl[] = {
  56         [board_82575] = &e1000_82575_info,
  57 };
  58
  59 static struct pci_device_id igb_pci_tbl[] = {
  60         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
  61         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
  62         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
  63         /* required last entry */
  64         {0, }
  65 };
  66
  67 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
  68
  69 void igb_reset(struct igb_adapter *);
  70 static int igb_setup_all_tx_resources(struct igb_adapter *);
  71 static int igb_setup_all_rx_resources(struct igb_adapter *);
  72 static void igb_free_all_tx_resources(struct igb_adapter *);
  73 static void igb_free_all_rx_resources(struct igb_adapter *);
  74 static void igb_free_tx_resources(struct igb_adapter *, struct igb_ring *);
  75 static void igb_free_rx_resources(struct igb_adapter *, struct igb_ring *);
  76 void igb_update_stats(struct igb_adapter *);
  77 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
  78 static void __devexit igb_remove(struct pci_dev *pdev);
  79 static int igb_sw_init(struct igb_adapter *);
  80 static int igb_open(struct net_device *);
  81 static int igb_close(struct net_device *);
  82 static void igb_configure_tx(struct igb_adapter *);
  83 static void igb_configure_rx(struct igb_adapter *);
  84 static void igb_setup_rctl(struct igb_adapter *);
  85 static void igb_clean_all_tx_rings(struct igb_adapter *);
  86 static void igb_clean_all_rx_rings(struct igb_adapter *);
  87 static void igb_clean_tx_ring(struct igb_adapter *, struct igb_ring *);
  88 static void igb_clean_rx_ring(struct igb_adapter *, struct igb_ring *);
  89 static void igb_set_multi(struct net_device *);
  90 static void igb_update_phy_info(unsigned long);
  91 static void igb_watchdog(unsigned long);
  92 static void igb_watchdog_task(struct work_struct *);
  93 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
  94                                   struct igb_ring *);
  95 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
  96 static struct net_device_stats *igb_get_stats(struct net_device *);
  97 static int igb_change_mtu(struct net_device *, int);
  98 static int igb_set_mac(struct net_device *, void *);
  99 static irqreturn_t igb_intr(int irq, void *);
 100 static irqreturn_t igb_intr_msi(int irq, void *);
 101 static irqreturn_t igb_msix_other(int irq, void *);
 102 static irqreturn_t igb_msix_rx(int irq, void *);
 103 static irqreturn_t igb_msix_tx(int irq, void *);
 104 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
 105 static bool igb_clean_tx_irq(struct igb_adapter *, struct igb_ring *);
 106 static int igb_clean(struct napi_struct *, int);
 107 static bool igb_clean_rx_irq_adv(struct igb_adapter *,
 108                                  struct igb_ring *, int *, int);
 109 static void igb_alloc_rx_buffers_adv(struct igb_adapter *,
 110                                      struct igb_ring *, int);
 111 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 112 static void igb_tx_timeout(struct net_device *);
 113 static void igb_reset_task(struct work_struct *);
 114 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
 115 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 116 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 117 static void igb_restore_vlan(struct igb_adapter *);
 118
 119 static int igb_suspend(struct pci_dev *, pm_message_t);
 120 #ifdef CONFIG_PM
 121 static int igb_resume(struct pci_dev *);
 122 #endif
 123 static void igb_shutdown(struct pci_dev *);
 124
 125 #ifdef CONFIG_NET_POLL_CONTROLLER
 126 /* for netdump / net console */
 127 static void igb_netpoll(struct net_device *);
 128 #endif
 129
 130 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 131                      pci_channel_state_t);
 132 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 133 static void igb_io_resume(struct pci_dev *);
 134
 135 static struct pci_error_handlers igb_err_handler = {
 136         .error_detected = igb_io_error_detected,
 137         .slot_reset = igb_io_slot_reset,
 138         .resume = igb_io_resume,
 139 };
 140
 141
 142 static struct pci_driver igb_driver = {
 143         .name     = igb_driver_name,
 144         .id_table = igb_pci_tbl,
 145         .probe    = igb_probe,
 146         .remove   = __devexit_p(igb_remove),
 147 #ifdef CONFIG_PM
 148         /* Power Managment Hooks */
 149         .suspend  = igb_suspend,
 150         .resume   = igb_resume,
 151 #endif
 152         .shutdown = igb_shutdown,
 153         .err_handler = &igb_err_handler
 154 };
 155
 156 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 157 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 158 MODULE_LICENSE("GPL");
 159 MODULE_VERSION(DRV_VERSION);
 160
 161 #ifdef DEBUG
 162 /**
 163  * igb_get_hw_dev_name - return device name string
 164  * used by hardware layer to print debugging information
 165  **/
 166 char *igb_get_hw_dev_name(struct e1000_hw *hw)
 167 {
 168         struct igb_adapter *adapter = hw->back;
 169         return adapter->netdev->name;
 170 }
 171 #endif
 172
 173 /**
 174  * igb_init_module - Driver Registration Routine
 175  *
 176  * igb_init_module is the first routine called when the driver is
 177  * loaded. All it does is register with the PCI subsystem.
 178  **/
 179 static int __init igb_init_module(void)
 180 {
 181         int ret;
 182         printk(KERN_INFO "%s - version %s\n",
 183                igb_driver_string, igb_driver_version);
 184
 185         printk(KERN_INFO "%s\n", igb_copyright);
 186
 187         ret = pci_register_driver(&igb_driver);
 188         return ret;
 189 }
 190
 191 module_init(igb_init_module);
 192
 193 /**
 194  * igb_exit_module - Driver Exit Cleanup Routine
 195  *
 196  * igb_exit_module is called just before the driver is removed
 197  * from memory.
 198  **/
 199 static void __exit igb_exit_module(void)
 200 {
 201         pci_unregister_driver(&igb_driver);
 202 }
 203
 204 module_exit(igb_exit_module);
 205
 206 /**
 207  * igb_alloc_queues - Allocate memory for all rings
 208  * @adapter: board private structure to initialize
 209  *
 210  * We allocate one ring per queue at run-time since we don't know the
 211  * number of queues at compile-time.
 212  **/
 213 static int igb_alloc_queues(struct igb_adapter *adapter)
 214 {
 215         int i;
 216
 217         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
 218                                    sizeof(struct igb_ring), GFP_KERNEL);
 219         if (!adapter->tx_ring)
 220                 return -ENOMEM;
 221
 222         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
 223                                    sizeof(struct igb_ring), GFP_KERNEL);
 224         if (!adapter->rx_ring) {
 225                 kfree(adapter->tx_ring);
 226                 return -ENOMEM;
 227         }
 228
 229         for (i = 0; i < adapter->num_rx_queues; i++) {
 230                 struct igb_ring *ring = &(adapter->rx_ring[i]);
 231                 ring->adapter = adapter;
 232                 ring->itr_register = E1000_ITR;
 233
 234                 if (!ring->napi.poll)
 235                         netif_napi_add(adapter->netdev, &ring->napi, igb_clean,
 236                                        adapter->napi.weight /
 237                                        adapter->num_rx_queues);
 238         }
 239         return 0;
 240 }
 241
 242 #define IGB_N0_QUEUE -1
 243 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
 244                               int tx_queue, int msix_vector)
 245 {
 246         u32 msixbm = 0;
 247         struct e1000_hw *hw = &adapter->hw;
 248                 /* The 82575 assigns vectors using a bitmask, which matches the
 249                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 250                    or more queues to a vector, we write the appropriate bits
 251                    into the MSIXBM register for that vector. */
 252                 if (rx_queue > IGB_N0_QUEUE) {
 253                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 254                         adapter->rx_ring[rx_queue].eims_value = msixbm;
 255                 }
 256                 if (tx_queue > IGB_N0_QUEUE) {
 257                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 258                         adapter->tx_ring[tx_queue].eims_value =
 259                                   E1000_EICR_TX_QUEUE0 << tx_queue;
 260                 }
 261                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 262 }
 263
 264 /**
 265  * igb_configure_msix - Configure MSI-X hardware
 266  *
 267  * igb_configure_msix sets up the hardware to properly
 268  * generate MSI-X interrupts.
 269  **/
 270 static void igb_configure_msix(struct igb_adapter *adapter)
 271 {
 272         u32 tmp;
 273         int i, vector = 0;
 274         struct e1000_hw *hw = &adapter->hw;
 275
 276         adapter->eims_enable_mask = 0;
 277
 278         for (i = 0; i < adapter->num_tx_queues; i++) {
 279                 struct igb_ring *tx_ring = &adapter->tx_ring[i];
 280                 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
 281                 adapter->eims_enable_mask |= tx_ring->eims_value;
 282                 if (tx_ring->itr_val)
 283                         writel(1000000000 / (tx_ring->itr_val * 256),
 284                                hw->hw_addr + tx_ring->itr_register);
 285                 else
 286                         writel(1, hw->hw_addr + tx_ring->itr_register);
 287         }
 288
 289         for (i = 0; i < adapter->num_rx_queues; i++) {
 290                 struct igb_ring *rx_ring = &adapter->rx_ring[i];
 291                 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
 292                 adapter->eims_enable_mask |= rx_ring->eims_value;
 293                 if (rx_ring->itr_val)
 294                         writel(1000000000 / (rx_ring->itr_val * 256),
 295                                hw->hw_addr + rx_ring->itr_register);
 296                 else
 297                         writel(1, hw->hw_addr + rx_ring->itr_register);
 298         }
 299
 300
 301         /* set vector for other causes, i.e. link changes */
 302                 array_wr32(E1000_MSIXBM(0), vector++,
 303                                       E1000_EIMS_OTHER);
 304
 305                 /* disable IAM for ICR interrupt bits */
 306                 wr32(E1000_IAM, 0);
 307
 308                 tmp = rd32(E1000_CTRL_EXT);
 309                 /* enable MSI-X PBA support*/
 310                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 311
 312                 /* Auto-Mask interrupts upon ICR read. */
 313                 tmp |= E1000_CTRL_EXT_EIAME;
 314                 tmp |= E1000_CTRL_EXT_IRCA;
 315
 316                 wr32(E1000_CTRL_EXT, tmp);
 317                 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
 318
 319         wrfl();
 320 }
 321
 322 /**
 323  * igb_request_msix - Initialize MSI-X interrupts
 324  *
 325  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 326  * kernel.
 327  **/
 328 static int igb_request_msix(struct igb_adapter *adapter)
 329 {
 330         struct net_device *netdev = adapter->netdev;
 331         int i, err = 0, vector = 0;
 332
 333         vector = 0;
 334
 335         for (i = 0; i < adapter->num_tx_queues; i++) {
 336                 struct igb_ring *ring = &(adapter->tx_ring[i]);
 337                 sprintf(ring->name, "%s-tx%d", netdev->name, i);
 338                 err = request_irq(adapter->msix_entries[vector].vector,
 339                                   &igb_msix_tx, 0, ring->name,
 340                                   &(adapter->tx_ring[i]));
 341                 if (err)
 342                         goto out;
 343                 ring->itr_register = E1000_EITR(0) + (vector << 2);
 344                 ring->itr_val = adapter->itr;
 345                 vector++;
 346         }
 347         for (i = 0; i < adapter->num_rx_queues; i++) {
 348                 struct igb_ring *ring = &(adapter->rx_ring[i]);
 349                 if (strlen(netdev->name) < (IFNAMSIZ - 5))
 350                         sprintf(ring->name, "%s-rx%d", netdev->name, i);
 351                 else
 352                         memcpy(ring->name, netdev->name, IFNAMSIZ);
 353                 err = request_irq(adapter->msix_entries[vector].vector,
 354                                   &igb_msix_rx, 0, ring->name,
 355                                   &(adapter->rx_ring[i]));
 356                 if (err)
 357                         goto out;
 358                 ring->itr_register = E1000_EITR(0) + (vector << 2);
 359                 ring->itr_val = adapter->itr;
 360                 vector++;
 361         }
 362
 363         err = request_irq(adapter->msix_entries[vector].vector,
 364                           &igb_msix_other, 0, netdev->name, netdev);
 365         if (err)
 366                 goto out;
 367
 368         adapter->napi.poll = igb_clean_rx_ring_msix;
 369         for (i = 0; i < adapter->num_rx_queues; i++)
 370                 adapter->rx_ring[i].napi.poll = adapter->napi.poll;
 371         igb_configure_msix(adapter);
 372         return 0;
 373 out:
 374         return err;
 375 }
 376
 377 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 378 {
 379         if (adapter->msix_entries) {
 380                 pci_disable_msix(adapter->pdev);
 381                 kfree(adapter->msix_entries);
 382                 adapter->msix_entries = NULL;
 383         } else if (adapter->msi_enabled)
 384                 pci_disable_msi(adapter->pdev);
 385         return;
 386 }
 387
 388
 389 /**
 390  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 391  *
 392  * Attempt to configure interrupts using the best available
 393  * capabilities of the hardware and kernel.
 394  **/
 395 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
 396 {
 397         int err;
 398         int numvecs, i;
 399
 400         numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
 401         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
 402                                         GFP_KERNEL);
 403         if (!adapter->msix_entries)
 404                 goto msi_only;
 405
 406         for (i = 0; i < numvecs; i++)
 407                 adapter->msix_entries[i].entry = i;
 408
 409         err = pci_enable_msix(adapter->pdev,
 410                               adapter->msix_entries,
 411                               numvecs);
 412         if (err == 0)
 413                 return;
 414
 415         igb_reset_interrupt_capability(adapter);
 416
 417         /* If we can't do MSI-X, try MSI */
 418 msi_only:
 419         adapter->num_rx_queues = 1;
 420         if (!pci_enable_msi(adapter->pdev))
 421                 adapter->msi_enabled = 1;
 422         return;
 423 }
 424
 425 /**
 426  * igb_request_irq - initialize interrupts
 427  *
 428  * Attempts to configure interrupts using the best available
 429  * capabilities of the hardware and kernel.
 430  **/
 431 static int igb_request_irq(struct igb_adapter *adapter)
 432 {
 433         struct net_device *netdev = adapter->netdev;
 434         struct e1000_hw *hw = &adapter->hw;
 435         int err = 0;
 436
 437         if (adapter->msix_entries) {
 438                 err = igb_request_msix(adapter);
 439                 if (!err) {
 440                         /* enable IAM, auto-mask,
 441                          * DO NOT USE EIAM or IAM in legacy mode */
 442                         wr32(E1000_IAM, IMS_ENABLE_MASK);
 443                         goto request_done;
 444                 }
 445                 /* fall back to MSI */
 446                 igb_reset_interrupt_capability(adapter);
 447                 if (!pci_enable_msi(adapter->pdev))
 448                         adapter->msi_enabled = 1;
 449                 igb_free_all_tx_resources(adapter);
 450                 igb_free_all_rx_resources(adapter);
 451                 adapter->num_rx_queues = 1;
 452                 igb_alloc_queues(adapter);
 453         }
 454         if (adapter->msi_enabled) {
 455                 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
 456                                   netdev->name, netdev);
 457                 if (!err)
 458                         goto request_done;
 459                 /* fall back to legacy interrupts */
 460                 igb_reset_interrupt_capability(adapter);
 461                 adapter->msi_enabled = 0;
 462         }
 463
 464         err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
 465                           netdev->name, netdev);
 466
 467         if (err)
 468                 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
 469                         err);
 470
 471 request_done:
 472         return err;
 473 }
 474
 475 static void igb_free_irq(struct igb_adapter *adapter)
 476 {
 477         struct net_device *netdev = adapter->netdev;
 478
 479         if (adapter->msix_entries) {
 480                 int vector = 0, i;
 481
 482                 for (i = 0; i < adapter->num_tx_queues; i++)
 483                         free_irq(adapter->msix_entries[vector++].vector,
 484                                 &(adapter->tx_ring[i]));
 485                 for (i = 0; i < adapter->num_rx_queues; i++)
 486                         free_irq(adapter->msix_entries[vector++].vector,
 487                                 &(adapter->rx_ring[i]));
 488
 489                 free_irq(adapter->msix_entries[vector++].vector, netdev);
 490                 return;
 491         }
 492
 493         free_irq(adapter->pdev->irq, netdev);
 494 }
 495
 496 /**
 497  * igb_irq_disable - Mask off interrupt generation on the NIC
 498  * @adapter: board private structure
 499  **/
 500 static void igb_irq_disable(struct igb_adapter *adapter)
 501 {
 502         struct e1000_hw *hw = &adapter->hw;
 503
 504         if (adapter->msix_entries) {
 505                 wr32(E1000_EIMC, ~0);
 506                 wr32(E1000_EIAC, 0);
 507         }
 508         wr32(E1000_IMC, ~0);
 509         wrfl();
 510         synchronize_irq(adapter->pdev->irq);
 511 }
 512
 513 /**
 514  * igb_irq_enable - Enable default interrupt generation settings
 515  * @adapter: board private structure
 516  **/
 517 static void igb_irq_enable(struct igb_adapter *adapter)
 518 {
 519         struct e1000_hw *hw = &adapter->hw;
 520
 521         if (adapter->msix_entries) {
 522                 wr32(E1000_EIMS,
 523                                 adapter->eims_enable_mask);
 524                 wr32(E1000_EIAC,
 525                                 adapter->eims_enable_mask);
 526                 wr32(E1000_IMS, E1000_IMS_LSC);
 527         } else
 528         wr32(E1000_IMS, IMS_ENABLE_MASK);
 529 }
 530
 531 static void igb_update_mng_vlan(struct igb_adapter *adapter)
 532 {
 533         struct net_device *netdev = adapter->netdev;
 534         u16 vid = adapter->hw.mng_cookie.vlan_id;
 535         u16 old_vid = adapter->mng_vlan_id;
 536         if (adapter->vlgrp) {
 537                 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
 538                         if (adapter->hw.mng_cookie.status &
 539                                 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
 540                                 igb_vlan_rx_add_vid(netdev, vid);
 541                                 adapter->mng_vlan_id = vid;
 542                         } else
 543                                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
 544
 545                         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
 546                                         (vid != old_vid) &&
 547                             !vlan_group_get_device(adapter->vlgrp, old_vid))
 548                                 igb_vlan_rx_kill_vid(netdev, old_vid);
 549                 } else
 550                         adapter->mng_vlan_id = vid;
 551         }
 552 }
 553
 554 /**
 555  * igb_release_hw_control - release control of the h/w to f/w
 556  * @adapter: address of board private structure
 557  *
 558  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
 559  * For ASF and Pass Through versions of f/w this means that the
 560  * driver is no longer loaded.
 561  *
 562  **/
 563 static void igb_release_hw_control(struct igb_adapter *adapter)
 564 {
 565         struct e1000_hw *hw = &adapter->hw;
 566         u32 ctrl_ext;
 567
 568         /* Let firmware take over control of h/w */
 569         ctrl_ext = rd32(E1000_CTRL_EXT);
 570         wr32(E1000_CTRL_EXT,
 571                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
 572 }
 573
 574
 575 /**
 576  * igb_get_hw_control - get control of the h/w from f/w
 577  * @adapter: address of board private structure
 578  *
 579  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
 580  * For ASF and Pass Through versions of f/w this means that
 581  * the driver is loaded.
 582  *
 583  **/
 584 static void igb_get_hw_control(struct igb_adapter *adapter)
 585 {
 586         struct e1000_hw *hw = &adapter->hw;
 587         u32 ctrl_ext;
 588
 589         /* Let firmware know the driver has taken over */
 590         ctrl_ext = rd32(E1000_CTRL_EXT);
 591         wr32(E1000_CTRL_EXT,
 592                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
 593 }
 594
 595 static void igb_init_manageability(struct igb_adapter *adapter)
 596 {
 597         struct e1000_hw *hw = &adapter->hw;
 598
 599         if (adapter->en_mng_pt) {
 600                 u32 manc2h = rd32(E1000_MANC2H);
 601                 u32 manc = rd32(E1000_MANC);
 602
 603                 /* enable receiving management packets to the host */
 604                 /* this will probably generate destination unreachable messages
 605                  * from the host OS, but the packets will be handled on SMBUS */
 606                 manc |= E1000_MANC_EN_MNG2HOST;
 607 #define E1000_MNG2HOST_PORT_623 (1 << 5)
 608 #define E1000_MNG2HOST_PORT_664 (1 << 6)
 609                 manc2h |= E1000_MNG2HOST_PORT_623;
 610                 manc2h |= E1000_MNG2HOST_PORT_664;
 611                 wr32(E1000_MANC2H, manc2h);
 612
 613                 wr32(E1000_MANC, manc);
 614         }
 615 }
 616
 617 /**
 618  * igb_configure - configure the hardware for RX and TX
 619  * @adapter: private board structure
 620  **/
 621 static void igb_configure(struct igb_adapter *adapter)
 622 {
 623         struct net_device *netdev = adapter->netdev;
 624         int i;
 625
 626         igb_get_hw_control(adapter);
 627         igb_set_multi(netdev);
 628
 629         igb_restore_vlan(adapter);
 630         igb_init_manageability(adapter);
 631
 632         igb_configure_tx(adapter);
 633         igb_setup_rctl(adapter);
 634         igb_configure_rx(adapter);
 635         /* call IGB_DESC_UNUSED which always leaves
 636          * at least 1 descriptor unused to make sure
 637          * next_to_use != next_to_clean */
 638         for (i = 0; i < adapter->num_rx_queues; i++) {
 639                 struct igb_ring *ring = &adapter->rx_ring[i];
 640                 igb_alloc_rx_buffers_adv(adapter, ring, IGB_DESC_UNUSED(ring));
 641         }
 642
 643
 644         adapter->tx_queue_len = netdev->tx_queue_len;
 645 }
 646
 647
 648 /**
 649  * igb_up - Open the interface and prepare it to handle traffic
 650  * @adapter: board private structure
 651  **/
 652
 653 int igb_up(struct igb_adapter *adapter)
 654 {
 655         struct e1000_hw *hw = &adapter->hw;
 656         int i;
 657
 658         /* hardware has been reset, we need to reload some things */
 659         igb_configure(adapter);
 660
 661         clear_bit(__IGB_DOWN, &adapter->state);
 662
 663         napi_enable(&adapter->napi);
 664
 665         if (adapter->msix_entries) {
 666                 for (i = 0; i < adapter->num_rx_queues; i++)
 667                         napi_enable(&adapter->rx_ring[i].napi);
 668                 igb_configure_msix(adapter);
 669         }
 670
 671         /* Clear any pending interrupts. */
 672         rd32(E1000_ICR);
 673         igb_irq_enable(adapter);
 674
 675         /* Fire a link change interrupt to start the watchdog. */
 676         wr32(E1000_ICS, E1000_ICS_LSC);
 677         return 0;
 678 }
 679
 680 void igb_down(struct igb_adapter *adapter)
 681 {
 682         struct e1000_hw *hw = &adapter->hw;
 683         struct net_device *netdev = adapter->netdev;
 684         u32 tctl, rctl;
 685         int i;
 686
 687         /* signal that we're down so the interrupt handler does not
 688          * reschedule our watchdog timer */
 689         set_bit(__IGB_DOWN, &adapter->state);
 690
 691         /* disable receives in the hardware */
 692         rctl = rd32(E1000_RCTL);
 693         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
 694         /* flush and sleep below */
 695
 696         netif_stop_queue(netdev);
 697
 698         /* disable transmits in the hardware */
 699         tctl = rd32(E1000_TCTL);
 700         tctl &= ~E1000_TCTL_EN;
 701         wr32(E1000_TCTL, tctl);
 702         /* flush both disables and wait for them to finish */
 703         wrfl();
 704         msleep(10);
 705
 706         napi_disable(&adapter->napi);
 707
 708         if (adapter->msix_entries)
 709                 for (i = 0; i < adapter->num_rx_queues; i++)
 710                         napi_disable(&adapter->rx_ring[i].napi);
 711         igb_irq_disable(adapter);
 712
 713         del_timer_sync(&adapter->watchdog_timer);
 714         del_timer_sync(&adapter->phy_info_timer);
 715
 716         netdev->tx_queue_len = adapter->tx_queue_len;
 717         netif_carrier_off(netdev);
 718         adapter->link_speed = 0;
 719         adapter->link_duplex = 0;
 720
 721         if (!pci_channel_offline(adapter->pdev))
 722                 igb_reset(adapter);
 723         igb_clean_all_tx_rings(adapter);
 724         igb_clean_all_rx_rings(adapter);
 725 }
 726
 727 void igb_reinit_locked(struct igb_adapter *adapter)
 728 {
 729         WARN_ON(in_interrupt());
 730         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 731                 msleep(1);
 732         igb_down(adapter);
 733         igb_up(adapter);
 734         clear_bit(__IGB_RESETTING, &adapter->state);
 735 }
 736
 737 void igb_reset(struct igb_adapter *adapter)
 738 {
 739         struct e1000_hw *hw = &adapter->hw;
 740         struct e1000_fc_info *fc = &adapter->hw.fc;
 741         u32 pba = 0, tx_space, min_tx_space, min_rx_space;
 742         u16 hwm;
 743
 744         /* Repartition Pba for greater than 9k mtu
 745          * To take effect CTRL.RST is required.
 746          */
 747         pba = E1000_PBA_34K;
 748
 749         if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
 750                 /* adjust PBA for jumbo frames */
 751                 wr32(E1000_PBA, pba);
 752
 753                 /* To maintain wire speed transmits, the Tx FIFO should be
 754                  * large enough to accommodate two full transmit packets,
 755                  * rounded up to the next 1KB and expressed in KB.  Likewise,
 756                  * the Rx FIFO should be large enough to accommodate at least
 757                  * one full receive packet and is similarly rounded up and
 758                  * expressed in KB. */
 759                 pba = rd32(E1000_PBA);
 760                 /* upper 16 bits has Tx packet buffer allocation size in KB */
 761                 tx_space = pba >> 16;
 762                 /* lower 16 bits has Rx packet buffer allocation size in KB */
 763                 pba &= 0xffff;
 764                 /* the tx fifo also stores 16 bytes of information about the tx
 765                  * but don't include ethernet FCS because hardware appends it */
 766                 min_tx_space = (adapter->max_frame_size +
 767                                 sizeof(struct e1000_tx_desc) -
 768                                 ETH_FCS_LEN) * 2;
 769                 min_tx_space = ALIGN(min_tx_space, 1024);
 770                 min_tx_space >>= 10;
 771                 /* software strips receive CRC, so leave room for it */
 772                 min_rx_space = adapter->max_frame_size;
 773                 min_rx_space = ALIGN(min_rx_space, 1024);
 774                 min_rx_space >>= 10;
 775
 776                 /* If current Tx allocation is less than the min Tx FIFO size,
 777                  * and the min Tx FIFO size is less than the current Rx FIFO
 778                  * allocation, take space away from current Rx allocation */
 779                 if (tx_space < min_tx_space &&
 780                     ((min_tx_space - tx_space) < pba)) {
 781                         pba = pba - (min_tx_space - tx_space);
 782
 783                         /* if short on rx space, rx wins and must trump tx
 784                          * adjustment */
 785                         if (pba < min_rx_space)
 786                                 pba = min_rx_space;
 787                 }
 788         }
 789         wr32(E1000_PBA, pba);
 790
 791         /* flow control settings */
 792         /* The high water mark must be low enough to fit one full frame
 793          * (or the size used for early receive) above it in the Rx FIFO.
 794          * Set it to the lower of:
 795          * - 90% of the Rx FIFO size, or
 796          * - the full Rx FIFO size minus one full frame */
 797         hwm = min(((pba << 10) * 9 / 10),
 798                   ((pba << 10) - adapter->max_frame_size));
 799
 800         fc->high_water = hwm & 0xFFF8;  /* 8-byte granularity */
 801         fc->low_water = fc->high_water - 8;
 802         fc->pause_time = 0xFFFF;
 803         fc->send_xon = 1;
 804         fc->type = fc->original_type;
 805
 806         /* Allow time for pending master requests to run */
 807         adapter->hw.mac.ops.reset_hw(&adapter->hw);
 808         wr32(E1000_WUC, 0);
 809
 810         if (adapter->hw.mac.ops.init_hw(&adapter->hw))
 811                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
 812
 813         igb_update_mng_vlan(adapter);
 814
 815         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
 816         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
 817
 818         igb_reset_adaptive(&adapter->hw);
 819         if (adapter->hw.phy.ops.get_phy_info)
 820                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
 821 }
 822
 823 /**
 824  * igb_is_need_ioport - determine if an adapter needs ioport resources or not
 825  * @pdev: PCI device information struct
 826  *
 827  * Returns true if an adapter needs ioport resources
 828  **/
 829 static int igb_is_need_ioport(struct pci_dev *pdev)
 830 {
 831         switch (pdev->device) {
 832         /* Currently there are no adapters that need ioport resources */
 833         default:
 834                 return false;
 835         }
 836 }
 837
 838 /**
 839  * igb_probe - Device Initialization Routine
 840  * @pdev: PCI device information struct
 841  * @ent: entry in igb_pci_tbl
 842  *
 843  * Returns 0 on success, negative on failure
 844  *
 845  * igb_probe initializes an adapter identified by a pci_dev structure.
 846  * The OS initialization, configuring of the adapter private structure,
 847  * and a hardware reset occur.
 848  **/
 849 static int __devinit igb_probe(struct pci_dev *pdev,
 850                                const struct pci_device_id *ent)
 851 {
 852         struct net_device *netdev;
 853         struct igb_adapter *adapter;
 854         struct e1000_hw *hw;
 855         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
 856         unsigned long mmio_start, mmio_len;
 857         static int cards_found;
 858         int i, err, pci_using_dac;
 859         u16 eeprom_data = 0;
 860         u16 eeprom_apme_mask = IGB_EEPROM_APME;
 861         u32 part_num;
 862         int bars, need_ioport;
 863
 864         /* do not allocate ioport bars when not needed */
 865         need_ioport = igb_is_need_ioport(pdev);
 866         if (need_ioport) {
 867                 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
 868                 err = pci_enable_device(pdev);
 869         } else {
 870                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
 871                 err = pci_enable_device_mem(pdev);
 872         }
 873         if (err)
 874                 return err;
 875
 876         pci_using_dac = 0;
 877         err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
 878         if (!err) {
 879                 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
 880                 if (!err)
 881                         pci_using_dac = 1;
 882         } else {
 883                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
 884                 if (err) {
 885                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
 886                         if (err) {
 887                                 dev_err(&pdev->dev, "No usable DMA "
 888                                         "configuration, aborting\n");
 889                                 goto err_dma;
 890                         }
 891                 }
 892         }
 893
 894         err = pci_request_selected_regions(pdev, bars, igb_driver_name);
 895         if (err)
 896                 goto err_pci_reg;
 897
 898         pci_set_master(pdev);
 899         pci_save_state(pdev);
 900
 901         err = -ENOMEM;
 902         netdev = alloc_etherdev(sizeof(struct igb_adapter));
 903         if (!netdev)
 904                 goto err_alloc_etherdev;
 905
 906         SET_NETDEV_DEV(netdev, &pdev->dev);
 907
 908         pci_set_drvdata(pdev, netdev);
 909         adapter = netdev_priv(netdev);
 910         adapter->netdev = netdev;
 911         adapter->pdev = pdev;
 912         hw = &adapter->hw;
 913         hw->back = adapter;
 914         adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
 915         adapter->bars = bars;
 916         adapter->need_ioport = need_ioport;
 917
 918         mmio_start = pci_resource_start(pdev, 0);
 919         mmio_len = pci_resource_len(pdev, 0);
 920
 921         err = -EIO;
 922         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
 923         if (!adapter->hw.hw_addr)
 924                 goto err_ioremap;
 925
 926         netdev->open = &igb_open;
 927         netdev->stop = &igb_close;
 928         netdev->get_stats = &igb_get_stats;
 929         netdev->set_multicast_list = &igb_set_multi;
 930         netdev->set_mac_address = &igb_set_mac;
 931         netdev->change_mtu = &igb_change_mtu;
 932         netdev->do_ioctl = &igb_ioctl;
 933         igb_set_ethtool_ops(netdev);
 934         netdev->tx_timeout = &igb_tx_timeout;
 935         netdev->watchdog_timeo = 5 * HZ;
 936         netif_napi_add(netdev, &adapter->napi, igb_clean, 64);
 937         netdev->vlan_rx_register = igb_vlan_rx_register;
 938         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
 939         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
 940 #ifdef CONFIG_NET_POLL_CONTROLLER
 941         netdev->poll_controller = igb_netpoll;
 942 #endif
 943         netdev->hard_start_xmit = &igb_xmit_frame_adv;
 944
 945         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
 946
 947         netdev->mem_start = mmio_start;
 948         netdev->mem_end = mmio_start + mmio_len;
 949
 950         adapter->bd_number = cards_found;
 951
 952         /* PCI config space info */
 953         hw->vendor_id = pdev->vendor;
 954         hw->device_id = pdev->device;
 955         hw->revision_id = pdev->revision;
 956         hw->subsystem_vendor_id = pdev->subsystem_vendor;
 957         hw->subsystem_device_id = pdev->subsystem_device;
 958
 959         /* setup the private structure */
 960         hw->back = adapter;
 961         /* Copy the default MAC, PHY and NVM function pointers */
 962         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
 963         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
 964         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
 965         /* Initialize skew-specific constants */
 966         err = ei->get_invariants(hw);
 967         if (err)
 968                 goto err_hw_init;
 969
 970         err = igb_sw_init(adapter);
 971         if (err)
 972                 goto err_sw_init;
 973
 974         igb_get_bus_info_pcie(hw);
 975
 976         hw->phy.autoneg_wait_to_complete = false;
 977         hw->mac.adaptive_ifs = true;
 978
 979         /* Copper options */
 980         if (hw->phy.media_type == e1000_media_type_copper) {
 981                 hw->phy.mdix = AUTO_ALL_MODES;
 982                 hw->phy.disable_polarity_correction = false;
 983                 hw->phy.ms_type = e1000_ms_hw_default;
 984         }
 985
 986         if (igb_check_reset_block(hw))
 987                 dev_info(&pdev->dev,
 988                         "PHY reset is blocked due to SOL/IDER session.\n");
 989
 990         netdev->features = NETIF_F_SG |
 991                            NETIF_F_HW_CSUM |
 992                            NETIF_F_HW_VLAN_TX |
 993                            NETIF_F_HW_VLAN_RX |
 994                            NETIF_F_HW_VLAN_FILTER;
 995
 996         netdev->features |= NETIF_F_TSO;
 997         netdev->features |= NETIF_F_TSO6;
 998
 999         netdev->vlan_features |= NETIF_F_TSO;
1000         netdev->vlan_features |= NETIF_F_TSO6;
1001         netdev->vlan_features |= NETIF_F_HW_CSUM;
1002         netdev->vlan_features |= NETIF_F_SG;
1003
1004         if (pci_using_dac)
1005                 netdev->features |= NETIF_F_HIGHDMA;
1006
1007         netdev->features |= NETIF_F_LLTX;
1008         adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1009
1010         /* before reading the NVM, reset the controller to put the device in a
1011          * known good starting state */
1012         hw->mac.ops.reset_hw(hw);
1013
1014         /* make sure the NVM is good */
1015         if (igb_validate_nvm_checksum(hw) < 0) {
1016                 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1017                 err = -EIO;
1018                 goto err_eeprom;
1019         }
1020
1021         /* copy the MAC address out of the NVM */
1022         if (hw->mac.ops.read_mac_addr(hw))
1023                 dev_err(&pdev->dev, "NVM Read Error\n");
1024
1025         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1026         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1027
1028         if (!is_valid_ether_addr(netdev->perm_addr)) {
1029                 dev_err(&pdev->dev, "Invalid MAC Address\n");
1030                 err = -EIO;
1031                 goto err_eeprom;
1032         }
1033
1034         init_timer(&adapter->watchdog_timer);
1035         adapter->watchdog_timer.function = &igb_watchdog;
1036         adapter->watchdog_timer.data = (unsigned long) adapter;
1037
1038         init_timer(&adapter->phy_info_timer);
1039         adapter->phy_info_timer.function = &igb_update_phy_info;
1040         adapter->phy_info_timer.data = (unsigned long) adapter;
1041
1042         INIT_WORK(&adapter->reset_task, igb_reset_task);
1043         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1044
1045         /* Initialize link & ring properties that are user-changeable */
1046         adapter->tx_ring->count = 256;
1047         for (i = 0; i < adapter->num_tx_queues; i++)
1048                 adapter->tx_ring[i].count = adapter->tx_ring->count;
1049         adapter->rx_ring->count = 256;
1050         for (i = 0; i < adapter->num_rx_queues; i++)
1051                 adapter->rx_ring[i].count = adapter->rx_ring->count;
1052
1053         adapter->fc_autoneg = true;
1054         hw->mac.autoneg = true;
1055         hw->phy.autoneg_advertised = 0x2f;
1056
1057         hw->fc.original_type = e1000_fc_default;
1058         hw->fc.type = e1000_fc_default;
1059
1060         adapter->itr_setting = 3;
1061         adapter->itr = IGB_START_ITR;
1062
1063         igb_validate_mdi_setting(hw);
1064
1065         adapter->rx_csum = 1;
1066
1067         /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1068          * enable the ACPI Magic Packet filter
1069          */
1070
1071         if (hw->bus.func == 0 ||
1072             hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1073                 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1074                                      &eeprom_data);
1075
1076         if (eeprom_data & eeprom_apme_mask)
1077                 adapter->eeprom_wol |= E1000_WUFC_MAG;
1078
1079         /* now that we have the eeprom settings, apply the special cases where
1080          * the eeprom may be wrong or the board simply won't support wake on
1081          * lan on a particular port */
1082         switch (pdev->device) {
1083         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1084                 adapter->eeprom_wol = 0;
1085                 break;
1086         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1087                 /* Wake events only supported on port A for dual fiber
1088                  * regardless of eeprom setting */
1089                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1090                         adapter->eeprom_wol = 0;
1091                 break;
1092         }
1093
1094         /* initialize the wol settings based on the eeprom settings */
1095         adapter->wol = adapter->eeprom_wol;
1096
1097         /* reset the hardware with the new settings */
1098         igb_reset(adapter);
1099
1100         /* let the f/w know that the h/w is now under the control of the
1101          * driver. */
1102         igb_get_hw_control(adapter);
1103
1104         /* tell the stack to leave us alone until igb_open() is called */
1105         netif_carrier_off(netdev);
1106         netif_stop_queue(netdev);
1107
1108         strcpy(netdev->name, "eth%d");
1109         err = register_netdev(netdev);
1110         if (err)
1111                 goto err_register;
1112
1113         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1114         /* print bus type/speed/width info */
1115         dev_info(&pdev->dev,
1116                  "%s: (PCIe:%s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
1117                  netdev->name,
1118                  ((hw->bus.speed == e1000_bus_speed_2500)
1119                   ? "2.5Gb/s" : "unknown"),
1120                  ((hw->bus.width == e1000_bus_width_pcie_x4)
1121                   ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1122                   ? "Width x1" : "unknown"),
1123                  netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
1124                  netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
1125
1126         igb_read_part_num(hw, &part_num);
1127         dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1128                 (part_num >> 8), (part_num & 0xff));
1129
1130         dev_info(&pdev->dev,
1131                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1132                 adapter->msix_entries ? "MSI-X" :
1133                 adapter->msi_enabled ? "MSI" : "legacy",
1134                 adapter->num_rx_queues, adapter->num_tx_queues);
1135
1136         cards_found++;
1137         return 0;
1138
1139 err_register:
1140         igb_release_hw_control(adapter);
1141 err_eeprom:
1142         if (!igb_check_reset_block(hw))
1143                 hw->phy.ops.reset_phy(hw);
1144
1145         if (hw->flash_address)
1146                 iounmap(hw->flash_address);
1147
1148         igb_remove_device(hw);
1149         kfree(adapter->tx_ring);
1150         kfree(adapter->rx_ring);
1151 err_sw_init:
1152 err_hw_init:
1153         iounmap(hw->hw_addr);
1154 err_ioremap:
1155         free_netdev(netdev);
1156 err_alloc_etherdev:
1157         pci_release_selected_regions(pdev, bars);
1158 err_pci_reg:
1159 err_dma:
1160         pci_disable_device(pdev);
1161         return err;
1162 }
1163
1164 /**
1165  * igb_remove - Device Removal Routine
1166  * @pdev: PCI device information struct
1167  *
1168  * igb_remove is called by the PCI subsystem to alert the driver
1169  * that it should release a PCI device.  The could be caused by a
1170  * Hot-Plug event, or because the driver is going to be removed from
1171  * memory.
1172  **/
1173 static void __devexit igb_remove(struct pci_dev *pdev)
1174 {
1175         struct net_device *netdev = pci_get_drvdata(pdev);
1176         struct igb_adapter *adapter = netdev_priv(netdev);
1177
1178         /* flush_scheduled work may reschedule our watchdog task, so
1179          * explicitly disable watchdog tasks from being rescheduled  */
1180         set_bit(__IGB_DOWN, &adapter->state);
1181         del_timer_sync(&adapter->watchdog_timer);
1182         del_timer_sync(&adapter->phy_info_timer);
1183
1184         flush_scheduled_work();
1185
1186         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
1187          * would have already happened in close and is redundant. */
1188         igb_release_hw_control(adapter);
1189
1190         unregister_netdev(netdev);
1191
1192         if (!igb_check_reset_block(&adapter->hw))
1193                 adapter->hw.phy.ops.reset_phy(&adapter->hw);
1194
1195         igb_remove_device(&adapter->hw);
1196         igb_reset_interrupt_capability(adapter);
1197
1198         kfree(adapter->tx_ring);
1199         kfree(adapter->rx_ring);
1200
1201         iounmap(adapter->hw.hw_addr);
1202         if (adapter->hw.flash_address)
1203                 iounmap(adapter->hw.flash_address);
1204         pci_release_selected_regions(pdev, adapter->bars);
1205
1206         free_netdev(netdev);
1207
1208         pci_disable_device(pdev);
1209 }
1210
1211 /**
1212  * igb_sw_init - Initialize general software structures (struct igb_adapter)
1213  * @adapter: board private structure to initialize
1214  *
1215  * igb_sw_init initializes the Adapter private data structure.
1216  * Fields are initialized based on PCI device information and
1217  * OS network device settings (MTU size).
1218  **/
1219 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1220 {
1221         struct e1000_hw *hw = &adapter->hw;
1222         struct net_device *netdev = adapter->netdev;
1223         struct pci_dev *pdev = adapter->pdev;
1224
1225         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1226
1227         adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1228         adapter->rx_ps_hdr_size = 0; /* disable packet split */
1229         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1230         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1231
1232         /* Number of supported queues. */
1233         /* Having more queues than CPUs doesn't make sense. */
1234         adapter->num_tx_queues = 1;
1235         adapter->num_rx_queues = min(IGB_MAX_RX_QUEUES, num_online_cpus());
1236
1237         igb_set_interrupt_capability(adapter);
1238
1239         if (igb_alloc_queues(adapter)) {
1240                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1241                 return -ENOMEM;
1242         }
1243
1244         /* Explicitly disable IRQ since the NIC can be in any state. */
1245         igb_irq_disable(adapter);
1246
1247         set_bit(__IGB_DOWN, &adapter->state);
1248         return 0;
1249 }
1250
1251 /**
1252  * igb_open - Called when a network interface is made active
1253  * @netdev: network interface device structure
1254  *
1255  * Returns 0 on success, negative value on failure
1256  *
1257  * The open entry point is called when a network interface is made
1258  * active by the system (IFF_UP).  At this point all resources needed
1259  * for transmit and receive operations are allocated, the interrupt
1260  * handler is registered with the OS, the watchdog timer is started,
1261  * and the stack is notified that the interface is ready.
1262  **/
1263 static int igb_open(struct net_device *netdev)
1264 {
1265         struct igb_adapter *adapter = netdev_priv(netdev);
1266         struct e1000_hw *hw = &adapter->hw;
1267         int err;
1268         int i;
1269
1270         /* disallow open during test */
1271         if (test_bit(__IGB_TESTING, &adapter->state))
1272                 return -EBUSY;
1273
1274         /* allocate transmit descriptors */
1275         err = igb_setup_all_tx_resources(adapter);
1276         if (err)
1277                 goto err_setup_tx;
1278
1279         /* allocate receive descriptors */
1280         err = igb_setup_all_rx_resources(adapter);
1281         if (err)
1282                 goto err_setup_rx;
1283
1284         /* e1000_power_up_phy(adapter); */
1285
1286         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1287         if ((adapter->hw.mng_cookie.status &
1288              E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1289                 igb_update_mng_vlan(adapter);
1290
1291         /* before we allocate an interrupt, we must be ready to handle it.
1292          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1293          * as soon as we call pci_request_irq, so we have to setup our
1294          * clean_rx handler before we do so.  */
1295         igb_configure(adapter);
1296
1297         err = igb_request_irq(adapter);
1298         if (err)
1299                 goto err_req_irq;
1300
1301         /* From here on the code is the same as igb_up() */
1302         clear_bit(__IGB_DOWN, &adapter->state);
1303
1304         napi_enable(&adapter->napi);
1305         if (adapter->msix_entries)
1306                 for (i = 0; i < adapter->num_rx_queues; i++)
1307                         napi_enable(&adapter->rx_ring[i].napi);
1308
1309         igb_irq_enable(adapter);
1310
1311         /* Clear any pending interrupts. */
1312         rd32(E1000_ICR);
1313         /* Fire a link status change interrupt to start the watchdog. */
1314         wr32(E1000_ICS, E1000_ICS_LSC);
1315
1316         return 0;
1317
1318 err_req_irq:
1319         igb_release_hw_control(adapter);
1320         /* e1000_power_down_phy(adapter); */
1321         igb_free_all_rx_resources(adapter);
1322 err_setup_rx:
1323         igb_free_all_tx_resources(adapter);
1324 err_setup_tx:
1325         igb_reset(adapter);
1326
1327         return err;
1328 }
1329
1330 /**
1331  * igb_close - Disables a network interface
1332  * @netdev: network interface device structure
1333  *
1334  * Returns 0, this is not allowed to fail
1335  *
1336  * The close entry point is called when an interface is de-activated
1337  * by the OS.  The hardware is still under the driver's control, but
1338  * needs to be disabled.  A global MAC reset is issued to stop the
1339  * hardware, and all transmit and receive resources are freed.
1340  **/
1341 static int igb_close(struct net_device *netdev)
1342 {
1343         struct igb_adapter *adapter = netdev_priv(netdev);
1344
1345         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1346         igb_down(adapter);
1347
1348         igb_free_irq(adapter);
1349
1350         igb_free_all_tx_resources(adapter);
1351         igb_free_all_rx_resources(adapter);
1352
1353         /* kill manageability vlan ID if supported, but not if a vlan with
1354          * the same ID is registered on the host OS (let 8021q kill it) */
1355         if ((adapter->hw.mng_cookie.status &
1356                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1357              !(adapter->vlgrp &&
1358                vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1359                 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1360
1361         return 0;
1362 }
1363
1364 /**
1365  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1366  * @adapter: board private structure
1367  * @tx_ring: tx descriptor ring (for a specific queue) to setup
1368  *
1369  * Return 0 on success, negative on failure
1370  **/
1371
1372 int igb_setup_tx_resources(struct igb_adapter *adapter,
1373                            struct igb_ring *tx_ring)
1374 {
1375         struct pci_dev *pdev = adapter->pdev;
1376         int size;
1377
1378         size = sizeof(struct igb_buffer) * tx_ring->count;
1379         tx_ring->buffer_info = vmalloc(size);
1380         if (!tx_ring->buffer_info)
1381                 goto err;
1382         memset(tx_ring->buffer_info, 0, size);
1383
1384         /* round up to nearest 4K */
1385         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1386                         + sizeof(u32);
1387         tx_ring->size = ALIGN(tx_ring->size, 4096);
1388
1389         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1390                                              &tx_ring->dma);
1391
1392         if (!tx_ring->desc)
1393                 goto err;
1394
1395         tx_ring->adapter = adapter;
1396         tx_ring->next_to_use = 0;
1397         tx_ring->next_to_clean = 0;
1398         spin_lock_init(&tx_ring->tx_clean_lock);
1399         spin_lock_init(&tx_ring->tx_lock);
1400         return 0;
1401
1402 err:
1403         vfree(tx_ring->buffer_info);
1404         dev_err(&adapter->pdev->dev,
1405                 "Unable to allocate memory for the transmit descriptor ring\n");
1406         return -ENOMEM;
1407 }
1408
1409 /**
1410  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1411  *                                (Descriptors) for all queues
1412  * @adapter: board private structure
1413  *
1414  * Return 0 on success, negative on failure
1415  **/
1416 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1417 {
1418         int i, err = 0;
1419
1420         for (i = 0; i < adapter->num_tx_queues; i++) {
1421                 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1422                 if (err) {
1423                         dev_err(&adapter->pdev->dev,
1424                                 "Allocation for Tx Queue %u failed\n", i);
1425                         for (i--; i >= 0; i--)
1426                                 igb_free_tx_resources(adapter,
1427                                                         &adapter->tx_ring[i]);
1428                         break;
1429                 }
1430         }
1431
1432         return err;
1433 }
1434
1435 /**
1436  * igb_configure_tx - Configure transmit Unit after Reset
1437  * @adapter: board private structure
1438  *
1439  * Configure the Tx unit of the MAC after a reset.
1440  **/
1441 static void igb_configure_tx(struct igb_adapter *adapter)
1442 {
1443         u64 tdba, tdwba;
1444         struct e1000_hw *hw = &adapter->hw;
1445         u32 tctl;
1446         u32 txdctl, txctrl;
1447         int i;
1448
1449         for (i = 0; i < adapter->num_tx_queues; i++) {
1450                 struct igb_ring *ring = &(adapter->tx_ring[i]);
1451
1452                 wr32(E1000_TDLEN(i),
1453                                 ring->count * sizeof(struct e1000_tx_desc));
1454                 tdba = ring->dma;
1455                 wr32(E1000_TDBAL(i),
1456                                 tdba & 0x00000000ffffffffULL);
1457                 wr32(E1000_TDBAH(i), tdba >> 32);
1458
1459                 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1460                 tdwba |= 1; /* enable head wb */
1461                 wr32(E1000_TDWBAL(i),
1462                                 tdwba & 0x00000000ffffffffULL);
1463                 wr32(E1000_TDWBAH(i), tdwba >> 32);
1464
1465                 ring->head = E1000_TDH(i);
1466                 ring->tail = E1000_TDT(i);
1467                 writel(0, hw->hw_addr + ring->tail);
1468                 writel(0, hw->hw_addr + ring->head);
1469                 txdctl = rd32(E1000_TXDCTL(i));
1470                 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1471                 wr32(E1000_TXDCTL(i), txdctl);
1472
1473                 /* Turn off Relaxed Ordering on head write-backs.  The
1474                  * writebacks MUST be delivered in order or it will
1475                  * completely screw up our bookeeping.
1476                  */
1477                 txctrl = rd32(E1000_DCA_TXCTRL(i));
1478                 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1479                 wr32(E1000_DCA_TXCTRL(i), txctrl);
1480         }
1481
1482
1483
1484         /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1485
1486         /* Program the Transmit Control Register */
1487
1488         tctl = rd32(E1000_TCTL);
1489         tctl &= ~E1000_TCTL_CT;
1490         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1491                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1492
1493         igb_config_collision_dist(hw);
1494
1495         /* Setup Transmit Descriptor Settings for eop descriptor */
1496         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1497
1498         /* Enable transmits */
1499         tctl |= E1000_TCTL_EN;
1500
1501         wr32(E1000_TCTL, tctl);
1502 }
1503
1504 /**
1505  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1506  * @adapter: board private structure
1507  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
1508  *
1509  * Returns 0 on success, negative on failure
1510  **/
1511
1512 int igb_setup_rx_resources(struct igb_adapter *adapter,
1513                            struct igb_ring *rx_ring)
1514 {
1515         struct pci_dev *pdev = adapter->pdev;
1516         int size, desc_len;
1517
1518         size = sizeof(struct igb_buffer) * rx_ring->count;
1519         rx_ring->buffer_info = vmalloc(size);
1520         if (!rx_ring->buffer_info)
1521                 goto err;
1522         memset(rx_ring->buffer_info, 0, size);
1523
1524         desc_len = sizeof(union e1000_adv_rx_desc);
1525
1526         /* Round up to nearest 4K */
1527         rx_ring->size = rx_ring->count * desc_len;
1528         rx_ring->size = ALIGN(rx_ring->size, 4096);
1529
1530         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1531                                              &rx_ring->dma);
1532
1533         if (!rx_ring->desc)
1534                 goto err;
1535
1536         rx_ring->next_to_clean = 0;
1537         rx_ring->next_to_use = 0;
1538         rx_ring->pending_skb = NULL;
1539
1540         rx_ring->adapter = adapter;
1541         /* FIXME: do we want to setup ring->napi->poll here? */
1542         rx_ring->napi.poll = adapter->napi.poll;
1543
1544         return 0;
1545
1546 err:
1547         vfree(rx_ring->buffer_info);
1548         dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1549                 "the receive descriptor ring\n");
1550         return -ENOMEM;
1551 }
1552
1553 /**
1554  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1555  *                                (Descriptors) for all queues
1556  * @adapter: board private structure
1557  *
1558  * Return 0 on success, negative on failure
1559  **/
1560 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1561 {
1562         int i, err = 0;
1563
1564         for (i = 0; i < adapter->num_rx_queues; i++) {
1565                 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1566                 if (err) {
1567                         dev_err(&adapter->pdev->dev,
1568                                 "Allocation for Rx Queue %u failed\n", i);
1569                         for (i--; i >= 0; i--)
1570                                 igb_free_rx_resources(adapter,
1571                                                         &adapter->rx_ring[i]);
1572                         break;
1573                 }
1574         }
1575
1576         return err;
1577 }
1578
1579 /**
1580  * igb_setup_rctl - configure the receive control registers
1581  * @adapter: Board private structure
1582  **/
1583 static void igb_setup_rctl(struct igb_adapter *adapter)
1584 {
1585         struct e1000_hw *hw = &adapter->hw;
1586         u32 rctl;
1587         u32 srrctl = 0;
1588         int i;
1589
1590         rctl = rd32(E1000_RCTL);
1591
1592         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1593
1594         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1595                 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1596                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1597
1598         /* disable the stripping of CRC because it breaks
1599          * BMC firmware connected over SMBUS
1600         rctl |= E1000_RCTL_SECRC;
1601         */
1602
1603         rctl &= ~E1000_RCTL_SBP;
1604
1605         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1606                 rctl &= ~E1000_RCTL_LPE;
1607         else
1608                 rctl |= E1000_RCTL_LPE;
1609         if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) {
1610                 /* Setup buffer sizes */
1611                 rctl &= ~E1000_RCTL_SZ_4096;
1612                 rctl |= E1000_RCTL_BSEX;
1613                 switch (adapter->rx_buffer_len) {
1614                 case IGB_RXBUFFER_256:
1615                         rctl |= E1000_RCTL_SZ_256;
1616                         rctl &= ~E1000_RCTL_BSEX;
1617                         break;
1618                 case IGB_RXBUFFER_512:
1619                         rctl |= E1000_RCTL_SZ_512;
1620                         rctl &= ~E1000_RCTL_BSEX;
1621                         break;
1622                 case IGB_RXBUFFER_1024:
1623                         rctl |= E1000_RCTL_SZ_1024;
1624                         rctl &= ~E1000_RCTL_BSEX;
1625                         break;
1626                 case IGB_RXBUFFER_2048:
1627                 default:
1628                         rctl |= E1000_RCTL_SZ_2048;
1629                         rctl &= ~E1000_RCTL_BSEX;
1630                         break;
1631                 case IGB_RXBUFFER_4096:
1632                         rctl |= E1000_RCTL_SZ_4096;
1633                         break;
1634                 case IGB_RXBUFFER_8192:
1635                         rctl |= E1000_RCTL_SZ_8192;
1636                         break;
1637                 case IGB_RXBUFFER_16384:
1638                         rctl |= E1000_RCTL_SZ_16384;
1639                         break;
1640                 }
1641         } else {
1642                 rctl &= ~E1000_RCTL_BSEX;
1643                 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1644         }
1645
1646         /* 82575 and greater support packet-split where the protocol
1647          * header is placed in skb->data and the packet data is
1648          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1649          * In the case of a non-split, skb->data is linearly filled,
1650          * followed by the page buffers.  Therefore, skb->data is
1651          * sized to hold the largest protocol header.
1652          */
1653         /* allocations using alloc_page take too long for regular MTU
1654          * so only enable packet split for jumbo frames */
1655         if (rctl & E1000_RCTL_LPE) {
1656                 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1657                 srrctl = adapter->rx_ps_hdr_size <<
1658                          E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1659                 /* buffer size is ALWAYS one page */
1660                 srrctl |= PAGE_SIZE >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1661                 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1662         } else {
1663                 adapter->rx_ps_hdr_size = 0;
1664                 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1665         }
1666
1667         for (i = 0; i < adapter->num_rx_queues; i++)
1668                 wr32(E1000_SRRCTL(i), srrctl);
1669
1670         wr32(E1000_RCTL, rctl);
1671 }
1672
1673 /**
1674  * igb_configure_rx - Configure receive Unit after Reset
1675  * @adapter: board private structure
1676  *
1677  * Configure the Rx unit of the MAC after a reset.
1678  **/
1679 static void igb_configure_rx(struct igb_adapter *adapter)
1680 {
1681         u64 rdba;
1682         struct e1000_hw *hw = &adapter->hw;
1683         u32 rctl, rxcsum;
1684         u32 rxdctl;
1685         int i;
1686
1687         /* disable receives while setting up the descriptors */
1688         rctl = rd32(E1000_RCTL);
1689         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1690         wrfl();
1691         mdelay(10);
1692
1693         if (adapter->itr_setting > 3)
1694                 wr32(E1000_ITR,
1695                                 1000000000 / (adapter->itr * 256));
1696
1697         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1698          * the Base and Length of the Rx Descriptor Ring */
1699         for (i = 0; i < adapter->num_rx_queues; i++) {
1700                 struct igb_ring *ring = &(adapter->rx_ring[i]);
1701                 rdba = ring->dma;
1702                 wr32(E1000_RDBAL(i),
1703                                 rdba & 0x00000000ffffffffULL);
1704                 wr32(E1000_RDBAH(i), rdba >> 32);
1705                 wr32(E1000_RDLEN(i),
1706                                ring->count * sizeof(union e1000_adv_rx_desc));
1707
1708                 ring->head = E1000_RDH(i);
1709                 ring->tail = E1000_RDT(i);
1710                 writel(0, hw->hw_addr + ring->tail);
1711                 writel(0, hw->hw_addr + ring->head);
1712
1713                 rxdctl = rd32(E1000_RXDCTL(i));
1714                 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1715                 rxdctl &= 0xFFF00000;
1716                 rxdctl |= IGB_RX_PTHRESH;
1717                 rxdctl |= IGB_RX_HTHRESH << 8;
1718                 rxdctl |= IGB_RX_WTHRESH << 16;
1719                 wr32(E1000_RXDCTL(i), rxdctl);
1720         }
1721
1722         if (adapter->num_rx_queues > 1) {
1723                 u32 random[10];
1724                 u32 mrqc;
1725                 u32 j, shift;
1726                 union e1000_reta {
1727                         u32 dword;
1728                         u8  bytes[4];
1729                 } reta;
1730
1731                 get_random_bytes(&random[0], 40);
1732
1733                 shift = 6;
1734                 for (j = 0; j < (32 * 4); j++) {
1735                         reta.bytes[j & 3] =
1736                                 (j % adapter->num_rx_queues) << shift;
1737                         if ((j & 3) == 3)
1738                                 writel(reta.dword,
1739                                        hw->hw_addr + E1000_RETA(0) + (j & ~3));
1740                 }
1741                 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1742
1743                 /* Fill out hash function seeds */
1744                 for (j = 0; j < 10; j++)
1745                         array_wr32(E1000_RSSRK(0), j, random[j]);
1746
1747                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1748                          E1000_MRQC_RSS_FIELD_IPV4_TCP);
1749                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1750                          E1000_MRQC_RSS_FIELD_IPV6_TCP);
1751                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1752                          E1000_MRQC_RSS_FIELD_IPV6_UDP);
1753                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1754                          E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1755
1756
1757                 wr32(E1000_MRQC, mrqc);
1758
1759                 /* Multiqueue and raw packet checksumming are mutually
1760                  * exclusive.  Note that this not the same as TCP/IP
1761                  * checksumming, which works fine. */
1762                 rxcsum = rd32(E1000_RXCSUM);
1763                 rxcsum |= E1000_RXCSUM_PCSD;
1764                 wr32(E1000_RXCSUM, rxcsum);
1765         } else {
1766                 /* Enable Receive Checksum Offload for TCP and UDP */
1767                 rxcsum = rd32(E1000_RXCSUM);
1768                 if (adapter->rx_csum) {
1769                         rxcsum |= E1000_RXCSUM_TUOFL;
1770
1771                         /* Enable IPv4 payload checksum for UDP fragments
1772                          * Must be used in conjunction with packet-split. */
1773                         if (adapter->rx_ps_hdr_size)
1774                                 rxcsum |= E1000_RXCSUM_IPPCSE;
1775                 } else {
1776                         rxcsum &= ~E1000_RXCSUM_TUOFL;
1777                         /* don't need to clear IPPCSE as it defaults to 0 */
1778                 }
1779                 wr32(E1000_RXCSUM, rxcsum);
1780         }
1781
1782         if (adapter->vlgrp)
1783                 wr32(E1000_RLPML,
1784                                 adapter->max_frame_size + VLAN_TAG_SIZE);
1785         else
1786                 wr32(E1000_RLPML, adapter->max_frame_size);
1787
1788         /* Enable Receives */
1789         wr32(E1000_RCTL, rctl);
1790 }
1791
1792 /**
1793  * igb_free_tx_resources - Free Tx Resources per Queue
1794  * @adapter: board private structure
1795  * @tx_ring: Tx descriptor ring for a specific queue
1796  *
1797  * Free all transmit software resources
1798  **/
1799 static void igb_free_tx_resources(struct igb_adapter *adapter,
1800                                   struct igb_ring *tx_ring)
1801 {
1802         struct pci_dev *pdev = adapter->pdev;
1803
1804         igb_clean_tx_ring(adapter, tx_ring);
1805
1806         vfree(tx_ring->buffer_info);
1807         tx_ring->buffer_info = NULL;
1808
1809         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1810
1811         tx_ring->desc = NULL;
1812 }
1813
1814 /**
1815  * igb_free_all_tx_resources - Free Tx Resources for All Queues
1816  * @adapter: board private structure
1817  *
1818  * Free all transmit software resources
1819  **/
1820 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
1821 {
1822         int i;
1823
1824         for (i = 0; i < adapter->num_tx_queues; i++)
1825                 igb_free_tx_resources(adapter, &adapter->tx_ring[i]);
1826 }
1827
1828 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
1829                                            struct igb_buffer *buffer_info)
1830 {
1831         if (buffer_info->dma) {
1832                 pci_unmap_page(adapter->pdev,
1833                                 buffer_info->dma,
1834                                 buffer_info->length,
1835                                 PCI_DMA_TODEVICE);
1836                 buffer_info->dma = 0;
1837         }
1838         if (buffer_info->skb) {
1839                 dev_kfree_skb_any(buffer_info->skb);
1840                 buffer_info->skb = NULL;
1841         }
1842         buffer_info->time_stamp = 0;
1843         /* buffer_info must be completely set up in the transmit path */
1844 }
1845
1846 /**
1847  * igb_clean_tx_ring - Free Tx Buffers
1848  * @adapter: board private structure
1849  * @tx_ring: ring to be cleaned
1850  **/
1851 static void igb_clean_tx_ring(struct igb_adapter *adapter,
1852                               struct igb_ring *tx_ring)
1853 {
1854         struct igb_buffer *buffer_info;
1855         unsigned long size;
1856         unsigned int i;
1857
1858         if (!tx_ring->buffer_info)
1859                 return;
1860         /* Free all the Tx ring sk_buffs */
1861
1862         for (i = 0; i < tx_ring->count; i++) {
1863                 buffer_info = &tx_ring->buffer_info[i];
1864                 igb_unmap_and_free_tx_resource(adapter, buffer_info);
1865         }
1866
1867         size = sizeof(struct igb_buffer) * tx_ring->count;
1868         memset(tx_ring->buffer_info, 0, size);
1869
1870         /* Zero out the descriptor ring */
1871
1872         memset(tx_ring->desc, 0, tx_ring->size);
1873
1874         tx_ring->next_to_use = 0;
1875         tx_ring->next_to_clean = 0;
1876
1877         writel(0, adapter->hw.hw_addr + tx_ring->head);
1878         writel(0, adapter->hw.hw_addr + tx_ring->tail);
1879 }
1880
1881 /**
1882  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
1883  * @adapter: board private structure
1884  **/
1885 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
1886 {
1887         int i;
1888
1889         for (i = 0; i < adapter->num_tx_queues; i++)
1890                 igb_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1891 }
1892
1893 /**
1894  * igb_free_rx_resources - Free Rx Resources
1895  * @adapter: board private structure
1896  * @rx_ring: ring to clean the resources from
1897  *
1898  * Free all receive software resources
1899  **/
1900 static void igb_free_rx_resources(struct igb_adapter *adapter,
1901                                   struct igb_ring *rx_ring)
1902 {
1903         struct pci_dev *pdev = adapter->pdev;
1904
1905         igb_clean_rx_ring(adapter, rx_ring);
1906
1907         vfree(rx_ring->buffer_info);
1908         rx_ring->buffer_info = NULL;
1909
1910         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1911
1912         rx_ring->desc = NULL;
1913 }
1914
1915 /**
1916  * igb_free_all_rx_resources - Free Rx Resources for All Queues
1917  * @adapter: board private structure
1918  *
1919  * Free all receive software resources
1920  **/
1921 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
1922 {
1923         int i;
1924
1925         for (i = 0; i < adapter->num_rx_queues; i++)
1926                 igb_free_rx_resources(adapter, &adapter->rx_ring[i]);
1927 }
1928
1929 /**
1930  * igb_clean_rx_ring - Free Rx Buffers per Queue
1931  * @adapter: board private structure
1932  * @rx_ring: ring to free buffers from
1933  **/
1934 static void igb_clean_rx_ring(struct igb_adapter *adapter,
1935                               struct igb_ring *rx_ring)
1936 {
1937         struct igb_buffer *buffer_info;
1938         struct pci_dev *pdev = adapter->pdev;
1939         unsigned long size;
1940         unsigned int i;
1941
1942         if (!rx_ring->buffer_info)
1943                 return;
1944         /* Free all the Rx ring sk_buffs */
1945         for (i = 0; i < rx_ring->count; i++) {
1946                 buffer_info = &rx_ring->buffer_info[i];
1947                 if (buffer_info->dma) {
1948                         if (adapter->rx_ps_hdr_size)
1949                                 pci_unmap_single(pdev, buffer_info->dma,
1950                                                  adapter->rx_ps_hdr_size,
1951                                                  PCI_DMA_FROMDEVICE);
1952                         else
1953                                 pci_unmap_single(pdev, buffer_info->dma,
1954                                                  adapter->rx_buffer_len,
1955                                                  PCI_DMA_FROMDEVICE);
1956                         buffer_info->dma = 0;
1957                 }
1958
1959                 if (buffer_info->skb) {
1960                         dev_kfree_skb(buffer_info->skb);
1961                         buffer_info->skb = NULL;
1962                 }
1963                 if (buffer_info->page) {
1964                         pci_unmap_page(pdev, buffer_info->page_dma,
1965                                        PAGE_SIZE, PCI_DMA_FROMDEVICE);
1966                         put_page(buffer_info->page);
1967                         buffer_info->page = NULL;
1968                         buffer_info->page_dma = 0;
1969                 }
1970         }
1971
1972         /* there also may be some cached data from a chained receive */
1973         if (rx_ring->pending_skb) {
1974                 dev_kfree_skb(rx_ring->pending_skb);
1975                 rx_ring->pending_skb = NULL;
1976         }
1977
1978         size = sizeof(struct igb_buffer) * rx_ring->count;
1979         memset(rx_ring->buffer_info, 0, size);
1980
1981         /* Zero out the descriptor ring */
1982         memset(rx_ring->desc, 0, rx_ring->size);
1983
1984         rx_ring->next_to_clean = 0;
1985         rx_ring->next_to_use = 0;
1986
1987         writel(0, adapter->hw.hw_addr + rx_ring->head);
1988         writel(0, adapter->hw.hw_addr + rx_ring->tail);
1989 }
1990
1991 /**
1992  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
1993  * @adapter: board private structure
1994  **/
1995 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
1996 {
1997         int i;
1998
1999         for (i = 0; i < adapter->num_rx_queues; i++)
2000                 igb_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2001 }
2002
2003 /**
2004  * igb_set_mac - Change the Ethernet Address of the NIC
2005  * @netdev: network interface device structure
2006  * @p: pointer to an address structure
2007  *
2008  * Returns 0 on success, negative on failure
2009  **/
2010 static int igb_set_mac(struct net_device *netdev, void *p)
2011 {
2012         struct igb_adapter *adapter = netdev_priv(netdev);
2013         struct sockaddr *addr = p;
2014
2015         if (!is_valid_ether_addr(addr->sa_data))
2016                 return -EADDRNOTAVAIL;
2017
2018         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2019         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2020
2021         adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2022
2023         return 0;
2024 }
2025
2026 /**
2027  * igb_set_multi - Multicast and Promiscuous mode set
2028  * @netdev: network interface device structure
2029  *
2030  * The set_multi entry point is called whenever the multicast address
2031  * list or the network interface flags are updated.  This routine is
2032  * responsible for configuring the hardware for proper multicast,
2033  * promiscuous mode, and all-multi behavior.
2034  **/
2035 static void igb_set_multi(struct net_device *netdev)
2036 {
2037         struct igb_adapter *adapter = netdev_priv(netdev);
2038         struct e1000_hw *hw = &adapter->hw;
2039         struct e1000_mac_info *mac = &hw->mac;
2040         struct dev_mc_list *mc_ptr;
2041         u8  *mta_list;
2042         u32 rctl;
2043         int i;
2044
2045         /* Check for Promiscuous and All Multicast modes */
2046
2047         rctl = rd32(E1000_RCTL);
2048
2049         if (netdev->flags & IFF_PROMISC)
2050                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2051         else if (netdev->flags & IFF_ALLMULTI) {
2052                 rctl |= E1000_RCTL_MPE;
2053                 rctl &= ~E1000_RCTL_UPE;
2054         } else
2055                 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2056
2057         wr32(E1000_RCTL, rctl);
2058
2059         if (!netdev->mc_count) {
2060                 /* nothing to program, so clear mc list */
2061                 igb_update_mc_addr_list(hw, NULL, 0, 1,
2062                                           mac->rar_entry_count);
2063                 return;
2064         }
2065
2066         mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2067         if (!mta_list)
2068                 return;
2069
2070         /* The shared function expects a packed array of only addresses. */
2071         mc_ptr = netdev->mc_list;
2072
2073         for (i = 0; i < netdev->mc_count; i++) {
2074                 if (!mc_ptr)
2075                         break;
2076                 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2077                 mc_ptr = mc_ptr->next;
2078         }
2079         igb_update_mc_addr_list(hw, mta_list, i, 1, mac->rar_entry_count);
2080         kfree(mta_list);
2081 }
2082
2083 /* Need to wait a few seconds after link up to get diagnostic information from
2084  * the phy */
2085 static void igb_update_phy_info(unsigned long data)
2086 {
2087         struct igb_adapter *adapter = (struct igb_adapter *) data;
2088         if (adapter->hw.phy.ops.get_phy_info)
2089                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
2090 }
2091
2092 /**
2093  * igb_watchdog - Timer Call-back
2094  * @data: pointer to adapter cast into an unsigned long
2095  **/
2096 static void igb_watchdog(unsigned long data)
2097 {
2098         struct igb_adapter *adapter = (struct igb_adapter *)data;
2099         /* Do the rest outside of interrupt context */
2100         schedule_work(&adapter->watchdog_task);
2101 }
2102
2103 static void igb_watchdog_task(struct work_struct *work)
2104 {
2105         struct igb_adapter *adapter = container_of(work,
2106                                         struct igb_adapter, watchdog_task);
2107         struct e1000_hw *hw = &adapter->hw;
2108
2109         struct net_device *netdev = adapter->netdev;
2110         struct igb_ring *tx_ring = adapter->tx_ring;
2111         struct e1000_mac_info *mac = &adapter->hw.mac;
2112         u32 link;
2113         s32 ret_val;
2114
2115         if ((netif_carrier_ok(netdev)) &&
2116             (rd32(E1000_STATUS) & E1000_STATUS_LU))
2117                 goto link_up;
2118
2119         ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2120         if ((ret_val == E1000_ERR_PHY) &&
2121             (hw->phy.type == e1000_phy_igp_3) &&
2122             (rd32(E1000_CTRL) &
2123              E1000_PHY_CTRL_GBE_DISABLE))
2124                 dev_info(&adapter->pdev->dev,
2125                          "Gigabit has been disabled, downgrading speed\n");
2126
2127         if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2128             !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2129                 link = mac->serdes_has_link;
2130         else
2131                 link = rd32(E1000_STATUS) &
2132                                       E1000_STATUS_LU;
2133
2134         if (link) {
2135                 if (!netif_carrier_ok(netdev)) {
2136                         u32 ctrl;
2137                         hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2138                                                    &adapter->link_speed,
2139                                                    &adapter->link_duplex);
2140
2141                         ctrl = rd32(E1000_CTRL);
2142                         dev_info(&adapter->pdev->dev,
2143                                  "NIC Link is Up %d Mbps %s, "
2144                                  "Flow Control: %s\n",
2145                                  adapter->link_speed,
2146                                  adapter->link_duplex == FULL_DUPLEX ?
2147                                  "Full Duplex" : "Half Duplex",
2148                                  ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2149                                  E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2150                                  E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2151                                  E1000_CTRL_TFCE) ? "TX" : "None")));
2152
2153                         /* tweak tx_queue_len according to speed/duplex and
2154                          * adjust the timeout factor */
2155                         netdev->tx_queue_len = adapter->tx_queue_len;
2156                         adapter->tx_timeout_factor = 1;
2157                         switch (adapter->link_speed) {
2158                         case SPEED_10:
2159                                 netdev->tx_queue_len = 10;
2160                                 adapter->tx_timeout_factor = 14;
2161                                 break;
2162                         case SPEED_100:
2163                                 netdev->tx_queue_len = 100;
2164                                 /* maybe add some timeout factor ? */
2165                                 break;
2166                         }
2167
2168                         netif_carrier_on(netdev);
2169                         netif_wake_queue(netdev);
2170
2171                         if (!test_bit(__IGB_DOWN, &adapter->state))
2172                                 mod_timer(&adapter->phy_info_timer,
2173                                           round_jiffies(jiffies + 2 * HZ));
2174                 }
2175         } else {
2176                 if (netif_carrier_ok(netdev)) {
2177                         adapter->link_speed = 0;
2178                         adapter->link_duplex = 0;
2179                         dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2180                         netif_carrier_off(netdev);
2181                         netif_stop_queue(netdev);
2182                         if (!test_bit(__IGB_DOWN, &adapter->state))
2183                                 mod_timer(&adapter->phy_info_timer,
2184                                           round_jiffies(jiffies + 2 * HZ));
2185                 }
2186         }
2187
2188 link_up:
2189         igb_update_stats(adapter);
2190
2191         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2192         adapter->tpt_old = adapter->stats.tpt;
2193         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2194         adapter->colc_old = adapter->stats.colc;
2195
2196         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2197         adapter->gorc_old = adapter->stats.gorc;
2198         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2199         adapter->gotc_old = adapter->stats.gotc;
2200
2201         igb_update_adaptive(&adapter->hw);
2202
2203         if (!netif_carrier_ok(netdev)) {
2204                 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2205                         /* We've lost link, so the controller stops DMA,
2206                          * but we've got queued Tx work that's never going
2207                          * to get done, so reset controller to flush Tx.
2208                          * (Do the reset outside of interrupt context). */
2209                         adapter->tx_timeout_count++;
2210                         schedule_work(&adapter->reset_task);
2211                 }
2212         }
2213
2214         /* Cause software interrupt to ensure rx ring is cleaned */
2215         wr32(E1000_ICS, E1000_ICS_RXDMT0);
2216
2217         /* Force detection of hung controller every watchdog period */
2218         tx_ring->detect_tx_hung = true;
2219
2220         /* Reset the timer */
2221         if (!test_bit(__IGB_DOWN, &adapter->state))
2222                 mod_timer(&adapter->watchdog_timer,
2223                           round_jiffies(jiffies + 2 * HZ));
2224 }
2225
2226 enum latency_range {
2227         lowest_latency = 0,
2228         low_latency = 1,
2229         bulk_latency = 2,
2230         latency_invalid = 255
2231 };
2232
2233
2234 static void igb_lower_rx_eitr(struct igb_adapter *adapter,
2235                               struct igb_ring *rx_ring)
2236 {
2237         struct e1000_hw *hw = &adapter->hw;
2238         int new_val;
2239
2240         new_val = rx_ring->itr_val / 2;
2241         if (new_val < IGB_MIN_DYN_ITR)
2242                 new_val = IGB_MIN_DYN_ITR;
2243
2244         if (new_val != rx_ring->itr_val) {
2245                 rx_ring->itr_val = new_val;
2246                 wr32(rx_ring->itr_register,
2247                                 1000000000 / (new_val * 256));
2248         }
2249 }
2250
2251 static void igb_raise_rx_eitr(struct igb_adapter *adapter,
2252                               struct igb_ring *rx_ring)
2253 {
2254         struct e1000_hw *hw = &adapter->hw;
2255         int new_val;
2256
2257         new_val = rx_ring->itr_val * 2;
2258         if (new_val > IGB_MAX_DYN_ITR)
2259                 new_val = IGB_MAX_DYN_ITR;
2260
2261         if (new_val != rx_ring->itr_val) {
2262                 rx_ring->itr_val = new_val;
2263                 wr32(rx_ring->itr_register,
2264                                 1000000000 / (new_val * 256));
2265         }
2266 }
2267
2268 /**
2269  * igb_update_itr - update the dynamic ITR value based on statistics
2270  *      Stores a new ITR value based on packets and byte
2271  *      counts during the last interrupt.  The advantage of per interrupt
2272  *      computation is faster updates and more accurate ITR for the current
2273  *      traffic pattern.  Constants in this function were computed
2274  *      based on theoretical maximum wire speed and thresholds were set based
2275  *      on testing data as well as attempting to minimize response time
2276  *      while increasing bulk throughput.
2277  *      this functionality is controlled by the InterruptThrottleRate module
2278  *      parameter (see igb_param.c)
2279  *      NOTE:  These calculations are only valid when operating in a single-
2280  *             queue environment.
2281  * @adapter: pointer to adapter
2282  * @itr_setting: current adapter->itr
2283  * @packets: the number of packets during this measurement interval
2284  * @bytes: the number of bytes during this measurement interval
2285  **/
2286 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2287                                    int packets, int bytes)
2288 {
2289         unsigned int retval = itr_setting;
2290
2291         if (packets == 0)
2292                 goto update_itr_done;
2293
2294         switch (itr_setting) {
2295         case lowest_latency:
2296                 /* handle TSO and jumbo frames */
2297                 if (bytes/packets > 8000)
2298                         retval = bulk_latency;
2299                 else if ((packets < 5) && (bytes > 512))
2300                         retval = low_latency;
2301                 break;
2302         case low_latency:  /* 50 usec aka 20000 ints/s */
2303                 if (bytes > 10000) {
2304                         /* this if handles the TSO accounting */
2305                         if (bytes/packets > 8000) {
2306                                 retval = bulk_latency;
2307                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2308                                 retval = bulk_latency;
2309                         } else if ((packets > 35)) {
2310                                 retval = lowest_latency;
2311                         }
2312                 } else if (bytes/packets > 2000) {
2313                         retval = bulk_latency;
2314                 } else if (packets <= 2 && bytes < 512) {
2315                         retval = lowest_latency;
2316                 }
2317                 break;
2318         case bulk_latency: /* 250 usec aka 4000 ints/s */
2319                 if (bytes > 25000) {
2320                         if (packets > 35)
2321                                 retval = low_latency;
2322                 } else if (bytes < 6000) {
2323                         retval = low_latency;
2324                 }
2325                 break;
2326         }
2327
2328 update_itr_done:
2329         return retval;
2330 }
2331
2332 static void igb_set_itr(struct igb_adapter *adapter, u16 itr_register,
2333                         int rx_only)
2334 {
2335         u16 current_itr;
2336         u32 new_itr = adapter->itr;
2337
2338         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2339         if (adapter->link_speed != SPEED_1000) {
2340                 current_itr = 0;
2341                 new_itr = 4000;
2342                 goto set_itr_now;
2343         }
2344
2345         adapter->rx_itr = igb_update_itr(adapter,
2346                                     adapter->rx_itr,
2347                                     adapter->rx_ring->total_packets,
2348                                     adapter->rx_ring->total_bytes);
2349         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2350         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2351                 adapter->rx_itr = low_latency;
2352
2353         if (!rx_only) {
2354                 adapter->tx_itr = igb_update_itr(adapter,
2355                                             adapter->tx_itr,
2356                                             adapter->tx_ring->total_packets,
2357                                             adapter->tx_ring->total_bytes);
2358                 /* conservative mode (itr 3) eliminates the
2359                  * lowest_latency setting */
2360                 if (adapter->itr_setting == 3 &&
2361                     adapter->tx_itr == lowest_latency)
2362                         adapter->tx_itr = low_latency;
2363
2364                 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2365         } else {
2366                 current_itr = adapter->rx_itr;
2367         }
2368
2369         switch (current_itr) {
2370         /* counts and packets in update_itr are dependent on these numbers */
2371         case lowest_latency:
2372                 new_itr = 70000;
2373                 break;
2374         case low_latency:
2375                 new_itr = 20000; /* aka hwitr = ~200 */
2376                 break;
2377         case bulk_latency:
2378                 new_itr = 4000;
2379                 break;
2380         default:
2381                 break;
2382         }
2383
2384 set_itr_now:
2385         if (new_itr != adapter->itr) {
2386                 /* this attempts to bias the interrupt rate towards Bulk
2387                  * by adding intermediate steps when interrupt rate is
2388                  * increasing */
2389                 new_itr = new_itr > adapter->itr ?
2390                              min(adapter->itr + (new_itr >> 2), new_itr) :
2391                              new_itr;
2392                 /* Don't write the value here; it resets the adapter's
2393                  * internal timer, and causes us to delay far longer than
2394                  * we should between interrupts.  Instead, we write the ITR
2395                  * value at the beginning of the next interrupt so the timing
2396                  * ends up being correct.
2397                  */
2398                 adapter->itr = new_itr;
2399                 adapter->set_itr = 1;
2400         }
2401
2402         return;
2403 }
2404
2405
2406 #define IGB_TX_FLAGS_CSUM               0x00000001
2407 #define IGB_TX_FLAGS_VLAN               0x00000002
2408 #define IGB_TX_FLAGS_TSO                0x00000004
2409 #define IGB_TX_FLAGS_IPV4               0x00000008
2410 #define IGB_TX_FLAGS_VLAN_MASK  0xffff0000
2411 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2412
2413 static inline int igb_tso_adv(struct igb_adapter *adapter,
2414                               struct igb_ring *tx_ring,
2415                               struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2416 {
2417         struct e1000_adv_tx_context_desc *context_desc;
2418         unsigned int i;
2419         int err;
2420         struct igb_buffer *buffer_info;
2421         u32 info = 0, tu_cmd = 0;
2422         u32 mss_l4len_idx, l4len;
2423         *hdr_len = 0;
2424
2425         if (skb_header_cloned(skb)) {
2426                 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2427                 if (err)
2428                         return err;
2429         }
2430
2431         l4len = tcp_hdrlen(skb);
2432         *hdr_len += l4len;
2433
2434         if (skb->protocol == htons(ETH_P_IP)) {
2435                 struct iphdr *iph = ip_hdr(skb);
2436                 iph->tot_len = 0;
2437                 iph->check = 0;
2438                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2439                                                          iph->daddr, 0,
2440                                                          IPPROTO_TCP,
2441                                                          0);
2442         } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2443                 ipv6_hdr(skb)->payload_len = 0;
2444                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2445                                                        &ipv6_hdr(skb)->daddr,
2446                                                        0, IPPROTO_TCP, 0);
2447         }
2448
2449         i = tx_ring->next_to_use;
2450
2451         buffer_info = &tx_ring->buffer_info[i];
2452         context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2453         /* VLAN MACLEN IPLEN */
2454         if (tx_flags & IGB_TX_FLAGS_VLAN)
2455                 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2456         info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2457         *hdr_len += skb_network_offset(skb);
2458         info |= skb_network_header_len(skb);
2459         *hdr_len += skb_network_header_len(skb);
2460         context_desc->vlan_macip_lens = cpu_to_le32(info);
2461
2462         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2463         tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2464
2465         if (skb->protocol == htons(ETH_P_IP))
2466                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2467         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2468
2469         context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2470
2471         /* MSS L4LEN IDX */
2472         mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2473         mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2474
2475         /* Context index must be unique per ring.  Luckily, so is the interrupt
2476          * mask value. */
2477         mss_l4len_idx |= tx_ring->eims_value >> 4;
2478
2479         context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2480         context_desc->seqnum_seed = 0;
2481
2482         buffer_info->time_stamp = jiffies;
2483         buffer_info->dma = 0;
2484         i++;
2485         if (i == tx_ring->count)
2486                 i = 0;
2487
2488         tx_ring->next_to_use = i;
2489
2490         return true;
2491 }
2492
2493 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2494                                         struct igb_ring *tx_ring,
2495                                         struct sk_buff *skb, u32 tx_flags)
2496 {
2497         struct e1000_adv_tx_context_desc *context_desc;
2498         unsigned int i;
2499         struct igb_buffer *buffer_info;
2500         u32 info = 0, tu_cmd = 0;
2501
2502         if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2503             (tx_flags & IGB_TX_FLAGS_VLAN)) {
2504                 i = tx_ring->next_to_use;
2505                 buffer_info = &tx_ring->buffer_info[i];
2506                 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2507
2508                 if (tx_flags & IGB_TX_FLAGS_VLAN)
2509                         info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2510                 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2511                 if (skb->ip_summed == CHECKSUM_PARTIAL)
2512                         info |= skb_network_header_len(skb);
2513
2514                 context_desc->vlan_macip_lens = cpu_to_le32(info);
2515
2516                 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2517
2518                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2519                         switch (skb->protocol) {
2520                         case __constant_htons(ETH_P_IP):
2521                                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2522                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2523                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2524                                 break;
2525                         case __constant_htons(ETH_P_IPV6):
2526                                 /* XXX what about other V6 headers?? */
2527                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2528                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2529                                 break;
2530                         default:
2531                                 if (unlikely(net_ratelimit()))
2532                                         dev_warn(&adapter->pdev->dev,
2533                                             "partial checksum but proto=%x!\n",
2534                                             skb->protocol);
2535                                 break;
2536                         }
2537                 }
2538
2539                 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2540                 context_desc->seqnum_seed = 0;
2541                 context_desc->mss_l4len_idx =
2542                                           cpu_to_le32(tx_ring->eims_value >> 4);
2543
2544                 buffer_info->time_stamp = jiffies;
2545                 buffer_info->dma = 0;
2546
2547                 i++;
2548                 if (i == tx_ring->count)
2549                         i = 0;
2550                 tx_ring->next_to_use = i;
2551
2552                 return true;
2553         }
2554
2555
2556         return false;
2557 }
2558
2559 #define IGB_MAX_TXD_PWR 16
2560 #define IGB_MAX_DATA_PER_TXD    (1<<IGB_MAX_TXD_PWR)
2561
2562 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2563                                  struct igb_ring *tx_ring,
2564                                  struct sk_buff *skb)
2565 {
2566         struct igb_buffer *buffer_info;
2567         unsigned int len = skb_headlen(skb);
2568         unsigned int count = 0, i;
2569         unsigned int f;
2570
2571         i = tx_ring->next_to_use;
2572
2573         buffer_info = &tx_ring->buffer_info[i];
2574         BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2575         buffer_info->length = len;
2576         /* set time_stamp *before* dma to help avoid a possible race */
2577         buffer_info->time_stamp = jiffies;
2578         buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2579                                           PCI_DMA_TODEVICE);
2580         count++;
2581         i++;
2582         if (i == tx_ring->count)
2583                 i = 0;
2584
2585         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2586                 struct skb_frag_struct *frag;
2587
2588                 frag = &skb_shinfo(skb)->frags[f];
2589                 len = frag->size;
2590
2591                 buffer_info = &tx_ring->buffer_info[i];
2592                 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2593                 buffer_info->length = len;
2594                 buffer_info->time_stamp = jiffies;
2595                 buffer_info->dma = pci_map_page(adapter->pdev,
2596                                                 frag->page,
2597                                                 frag->page_offset,
2598                                                 len,
2599                                                 PCI_DMA_TODEVICE);
2600
2601                 count++;
2602                 i++;
2603                 if (i == tx_ring->count)
2604                         i = 0;
2605         }
2606
2607         i = (i == 0) ? tx_ring->count - 1 : i - 1;
2608         tx_ring->buffer_info[i].skb = skb;
2609
2610         return count;
2611 }
2612
2613 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2614                                     struct igb_ring *tx_ring,
2615                                     int tx_flags, int count, u32 paylen,
2616                                     u8 hdr_len)
2617 {
2618         union e1000_adv_tx_desc *tx_desc = NULL;
2619         struct igb_buffer *buffer_info;
2620         u32 olinfo_status = 0, cmd_type_len;
2621         unsigned int i;
2622
2623         cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2624                         E1000_ADVTXD_DCMD_DEXT);
2625
2626         if (tx_flags & IGB_TX_FLAGS_VLAN)
2627                 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2628
2629         if (tx_flags & IGB_TX_FLAGS_TSO) {
2630                 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2631
2632                 /* insert tcp checksum */
2633                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2634
2635                 /* insert ip checksum */
2636                 if (tx_flags & IGB_TX_FLAGS_IPV4)
2637                         olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2638
2639         } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2640                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2641         }
2642
2643         if (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2644                         IGB_TX_FLAGS_VLAN))
2645                 olinfo_status |= tx_ring->eims_value >> 4;
2646
2647         olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2648
2649         i = tx_ring->next_to_use;
2650         while (count--) {
2651                 buffer_info = &tx_ring->buffer_info[i];
2652                 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2653                 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2654                 tx_desc->read.cmd_type_len =
2655                         cpu_to_le32(cmd_type_len | buffer_info->length);
2656                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2657                 i++;
2658                 if (i == tx_ring->count)
2659                         i = 0;
2660         }
2661
2662         tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2663         /* Force memory writes to complete before letting h/w
2664          * know there are new descriptors to fetch.  (Only
2665          * applicable for weak-ordered memory model archs,
2666          * such as IA-64). */
2667         wmb();
2668
2669         tx_ring->next_to_use = i;
2670         writel(i, adapter->hw.hw_addr + tx_ring->tail);
2671         /* we need this if more than one processor can write to our tail
2672          * at a time, it syncronizes IO on IA64/Altix systems */
2673         mmiowb();
2674 }
2675
2676 static int __igb_maybe_stop_tx(struct net_device *netdev,
2677                                struct igb_ring *tx_ring, int size)
2678 {
2679         struct igb_adapter *adapter = netdev_priv(netdev);
2680
2681         netif_stop_queue(netdev);
2682         /* Herbert's original patch had:
2683          *  smp_mb__after_netif_stop_queue();
2684          * but since that doesn't exist yet, just open code it. */
2685         smp_mb();
2686
2687         /* We need to check again in a case another CPU has just
2688          * made room available. */
2689         if (IGB_DESC_UNUSED(tx_ring) < size)
2690                 return -EBUSY;
2691
2692         /* A reprieve! */
2693         netif_start_queue(netdev);
2694         ++adapter->restart_queue;
2695         return 0;
2696 }
2697
2698 static int igb_maybe_stop_tx(struct net_device *netdev,
2699                              struct igb_ring *tx_ring, int size)
2700 {
2701         if (IGB_DESC_UNUSED(tx_ring) >= size)
2702                 return 0;
2703         return __igb_maybe_stop_tx(netdev, tx_ring, size);
2704 }
2705
2706 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2707
2708 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2709                                    struct net_device *netdev,
2710                                    struct igb_ring *tx_ring)
2711 {
2712         struct igb_adapter *adapter = netdev_priv(netdev);
2713         unsigned int tx_flags = 0;
2714         unsigned int len;
2715         unsigned long irq_flags;
2716         u8 hdr_len = 0;
2717         int tso = 0;
2718
2719         len = skb_headlen(skb);
2720
2721         if (test_bit(__IGB_DOWN, &adapter->state)) {
2722                 dev_kfree_skb_any(skb);
2723                 return NETDEV_TX_OK;
2724         }
2725
2726         if (skb->len <= 0) {
2727                 dev_kfree_skb_any(skb);
2728                 return NETDEV_TX_OK;
2729         }
2730
2731         if (!spin_trylock_irqsave(&tx_ring->tx_lock, irq_flags))
2732                 /* Collision - tell upper layer to requeue */
2733                 return NETDEV_TX_LOCKED;
2734
2735         /* need: 1 descriptor per page,
2736          *       + 2 desc gap to keep tail from touching head,
2737          *       + 1 desc for skb->data,
2738          *       + 1 desc for context descriptor,
2739          * otherwise try next time */
2740         if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2741                 /* this is a hard error */
2742                 spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2743                 return NETDEV_TX_BUSY;
2744         }
2745
2746         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2747                 tx_flags |= IGB_TX_FLAGS_VLAN;
2748                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2749         }
2750
2751         tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2752                                               &hdr_len) : 0;
2753
2754         if (tso < 0) {
2755                 dev_kfree_skb_any(skb);
2756                 spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2757                 return NETDEV_TX_OK;
2758         }
2759
2760         if (tso)
2761                 tx_flags |= IGB_TX_FLAGS_TSO;
2762         else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
2763                         if (skb->ip_summed == CHECKSUM_PARTIAL)
2764                                 tx_flags |= IGB_TX_FLAGS_CSUM;
2765
2766         if (skb->protocol == htons(ETH_P_IP))
2767                 tx_flags |= IGB_TX_FLAGS_IPV4;
2768
2769         igb_tx_queue_adv(adapter, tx_ring, tx_flags,
2770                          igb_tx_map_adv(adapter, tx_ring, skb),
2771                          skb->len, hdr_len);
2772
2773         netdev->trans_start = jiffies;
2774
2775         /* Make sure there is space in the ring for the next send. */
2776         igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
2777
2778         spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2779         return NETDEV_TX_OK;
2780 }
2781
2782 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
2783 {
2784         struct igb_adapter *adapter = netdev_priv(netdev);
2785         struct igb_ring *tx_ring = &adapter->tx_ring[0];
2786
2787         /* This goes back to the question of how to logically map a tx queue
2788          * to a flow.  Right now, performance is impacted slightly negatively
2789          * if using multiple tx queues.  If the stack breaks away from a
2790          * single qdisc implementation, we can look at this again. */
2791         return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
2792 }
2793
2794 /**
2795  * igb_tx_timeout - Respond to a Tx Hang
2796  * @netdev: network interface device structure
2797  **/
2798 static void igb_tx_timeout(struct net_device *netdev)
2799 {
2800         struct igb_adapter *adapter = netdev_priv(netdev);
2801         struct e1000_hw *hw = &adapter->hw;
2802
2803         /* Do the reset outside of interrupt context */
2804         adapter->tx_timeout_count++;
2805         schedule_work(&adapter->reset_task);
2806         wr32(E1000_EICS, adapter->eims_enable_mask &
2807                 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
2808 }
2809
2810 static void igb_reset_task(struct work_struct *work)
2811 {
2812         struct igb_adapter *adapter;
2813         adapter = container_of(work, struct igb_adapter, reset_task);
2814
2815         igb_reinit_locked(adapter);
2816 }
2817
2818 /**
2819  * igb_get_stats - Get System Network Statistics
2820  * @netdev: network interface device structure
2821  *
2822  * Returns the address of the device statistics structure.
2823  * The statistics are actually updated from the timer callback.
2824  **/
2825 static struct net_device_stats *
2826 igb_get_stats(struct net_device *netdev)
2827 {
2828         struct igb_adapter *adapter = netdev_priv(netdev);
2829
2830         /* only return the current stats */
2831         return &adapter->net_stats;
2832 }
2833
2834 /**
2835  * igb_change_mtu - Change the Maximum Transfer Unit
2836  * @netdev: network interface device structure
2837  * @new_mtu: new value for maximum frame size
2838  *
2839  * Returns 0 on success, negative on failure
2840  **/
2841 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
2842 {
2843         struct igb_adapter *adapter = netdev_priv(netdev);
2844         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2845
2846         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
2847             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2848                 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
2849                 return -EINVAL;
2850         }
2851
2852 #define MAX_STD_JUMBO_FRAME_SIZE 9234
2853         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
2854                 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
2855                 return -EINVAL;
2856         }
2857
2858         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2859                 msleep(1);
2860         /* igb_down has a dependency on max_frame_size */
2861         adapter->max_frame_size = max_frame;
2862         if (netif_running(netdev))
2863                 igb_down(adapter);
2864
2865         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
2866          * means we reserve 2 more, this pushes us to allocate from the next
2867          * larger slab size.
2868          * i.e. RXBUFFER_2048 --> size-4096 slab
2869          */
2870
2871         if (max_frame <= IGB_RXBUFFER_256)
2872                 adapter->rx_buffer_len = IGB_RXBUFFER_256;
2873         else if (max_frame <= IGB_RXBUFFER_512)
2874                 adapter->rx_buffer_len = IGB_RXBUFFER_512;
2875         else if (max_frame <= IGB_RXBUFFER_1024)
2876                 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
2877         else if (max_frame <= IGB_RXBUFFER_2048)
2878                 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
2879         else
2880                 adapter->rx_buffer_len = IGB_RXBUFFER_4096;
2881         /* adjust allocation if LPE protects us, and we aren't using SBP */
2882         if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
2883              (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
2884                 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
2885
2886         dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
2887                  netdev->mtu, new_mtu);
2888         netdev->mtu = new_mtu;
2889
2890         if (netif_running(netdev))
2891                 igb_up(adapter);
2892         else
2893                 igb_reset(adapter);
2894
2895         clear_bit(__IGB_RESETTING, &adapter->state);
2896
2897         return 0;
2898 }
2899
2900 /**
2901  * igb_update_stats - Update the board statistics counters
2902  * @adapter: board private structure
2903  **/
2904
2905 void igb_update_stats(struct igb_adapter *adapter)
2906 {
2907         struct e1000_hw *hw = &adapter->hw;
2908         struct pci_dev *pdev = adapter->pdev;
2909         u16 phy_tmp;
2910
2911 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
2912
2913         /*
2914          * Prevent stats update while adapter is being reset, or if the pci
2915          * connection is down.
2916          */
2917         if (adapter->link_speed == 0)
2918                 return;
2919         if (pci_channel_offline(pdev))
2920                 return;
2921
2922         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
2923         adapter->stats.gprc += rd32(E1000_GPRC);
2924         adapter->stats.gorc += rd32(E1000_GORCL);
2925         rd32(E1000_GORCH); /* clear GORCL */
2926         adapter->stats.bprc += rd32(E1000_BPRC);
2927         adapter->stats.mprc += rd32(E1000_MPRC);
2928         adapter->stats.roc += rd32(E1000_ROC);
2929
2930         adapter->stats.prc64 += rd32(E1000_PRC64);
2931         adapter->stats.prc127 += rd32(E1000_PRC127);
2932         adapter->stats.prc255 += rd32(E1000_PRC255);
2933         adapter->stats.prc511 += rd32(E1000_PRC511);
2934         adapter->stats.prc1023 += rd32(E1000_PRC1023);
2935         adapter->stats.prc1522 += rd32(E1000_PRC1522);
2936         adapter->stats.symerrs += rd32(E1000_SYMERRS);
2937         adapter->stats.sec += rd32(E1000_SEC);
2938
2939         adapter->stats.mpc += rd32(E1000_MPC);
2940         adapter->stats.scc += rd32(E1000_SCC);
2941         adapter->stats.ecol += rd32(E1000_ECOL);
2942         adapter->stats.mcc += rd32(E1000_MCC);
2943         adapter->stats.latecol += rd32(E1000_LATECOL);
2944         adapter->stats.dc += rd32(E1000_DC);
2945         adapter->stats.rlec += rd32(E1000_RLEC);
2946         adapter->stats.xonrxc += rd32(E1000_XONRXC);
2947         adapter->stats.xontxc += rd32(E1000_XONTXC);
2948         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
2949         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
2950         adapter->stats.fcruc += rd32(E1000_FCRUC);
2951         adapter->stats.gptc += rd32(E1000_GPTC);
2952         adapter->stats.gotc += rd32(E1000_GOTCL);
2953         rd32(E1000_GOTCH); /* clear GOTCL */
2954         adapter->stats.rnbc += rd32(E1000_RNBC);
2955         adapter->stats.ruc += rd32(E1000_RUC);
2956         adapter->stats.rfc += rd32(E1000_RFC);
2957         adapter->stats.rjc += rd32(E1000_RJC);
2958         adapter->stats.tor += rd32(E1000_TORH);
2959         adapter->stats.tot += rd32(E1000_TOTH);
2960         adapter->stats.tpr += rd32(E1000_TPR);
2961
2962         adapter->stats.ptc64 += rd32(E1000_PTC64);
2963         adapter->stats.ptc127 += rd32(E1000_PTC127);
2964         adapter->stats.ptc255 += rd32(E1000_PTC255);
2965         adapter->stats.ptc511 += rd32(E1000_PTC511);
2966         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
2967         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
2968
2969         adapter->stats.mptc += rd32(E1000_MPTC);
2970         adapter->stats.bptc += rd32(E1000_BPTC);
2971
2972         /* used for adaptive IFS */
2973
2974         hw->mac.tx_packet_delta = rd32(E1000_TPT);
2975         adapter->stats.tpt += hw->mac.tx_packet_delta;
2976         hw->mac.collision_delta = rd32(E1000_COLC);
2977         adapter->stats.colc += hw->mac.collision_delta;
2978
2979         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
2980         adapter->stats.rxerrc += rd32(E1000_RXERRC);
2981         adapter->stats.tncrs += rd32(E1000_TNCRS);
2982         adapter->stats.tsctc += rd32(E1000_TSCTC);
2983         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
2984
2985         adapter->stats.iac += rd32(E1000_IAC);
2986         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
2987         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
2988         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
2989         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
2990         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
2991         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
2992         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
2993         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
2994
2995         /* Fill out the OS statistics structure */
2996         adapter->net_stats.multicast = adapter->stats.mprc;
2997         adapter->net_stats.collisions = adapter->stats.colc;
2998
2999         /* Rx Errors */
3000
3001         /* RLEC on some newer hardware can be incorrect so build
3002         * our own version based on RUC and ROC */
3003         adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3004                 adapter->stats.crcerrs + adapter->stats.algnerrc +
3005                 adapter->stats.ruc + adapter->stats.roc +
3006                 adapter->stats.cexterr;
3007         adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3008                                               adapter->stats.roc;
3009         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3010         adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3011         adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3012
3013         /* Tx Errors */
3014         adapter->net_stats.tx_errors = adapter->stats.ecol +
3015                                        adapter->stats.latecol;
3016         adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3017         adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3018         adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3019
3020         /* Tx Dropped needs to be maintained elsewhere */
3021
3022         /* Phy Stats */
3023         if (hw->phy.media_type == e1000_media_type_copper) {
3024                 if ((adapter->link_speed == SPEED_1000) &&
3025                    (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS,
3026                                               &phy_tmp))) {
3027                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3028                         adapter->phy_stats.idle_errors += phy_tmp;
3029                 }
3030         }
3031
3032         /* Management Stats */
3033         adapter->stats.mgptc += rd32(E1000_MGTPTC);
3034         adapter->stats.mgprc += rd32(E1000_MGTPRC);
3035         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3036 }
3037
3038
3039 static irqreturn_t igb_msix_other(int irq, void *data)
3040 {
3041         struct net_device *netdev = data;
3042         struct igb_adapter *adapter = netdev_priv(netdev);
3043         struct e1000_hw *hw = &adapter->hw;
3044         u32 eicr;
3045         /* disable interrupts from the "other" bit, avoid re-entry */
3046         wr32(E1000_EIMC, E1000_EIMS_OTHER);
3047
3048         eicr = rd32(E1000_EICR);
3049
3050         if (eicr & E1000_EIMS_OTHER) {
3051                 u32 icr = rd32(E1000_ICR);
3052                 /* reading ICR causes bit 31 of EICR to be cleared */
3053                 if (!(icr & E1000_ICR_LSC))
3054                         goto no_link_interrupt;
3055                 hw->mac.get_link_status = 1;
3056                 /* guard against interrupt when we're going down */
3057                 if (!test_bit(__IGB_DOWN, &adapter->state))
3058                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3059         }
3060
3061 no_link_interrupt:
3062         wr32(E1000_IMS, E1000_IMS_LSC);
3063         wr32(E1000_EIMS, E1000_EIMS_OTHER);
3064
3065         return IRQ_HANDLED;
3066 }
3067
3068 static irqreturn_t igb_msix_tx(int irq, void *data)
3069 {
3070         struct igb_ring *tx_ring = data;
3071         struct igb_adapter *adapter = tx_ring->adapter;
3072         struct e1000_hw *hw = &adapter->hw;
3073
3074         if (!tx_ring->itr_val)
3075                 wr32(E1000_EIMC, tx_ring->eims_value);
3076
3077         tx_ring->total_bytes = 0;
3078         tx_ring->total_packets = 0;
3079         if (!igb_clean_tx_irq(adapter, tx_ring))
3080                 /* Ring was not completely cleaned, so fire another interrupt */
3081                 wr32(E1000_EICS, tx_ring->eims_value);
3082
3083         if (!tx_ring->itr_val)
3084                 wr32(E1000_EIMS, tx_ring->eims_value);
3085         return IRQ_HANDLED;
3086 }
3087
3088 static irqreturn_t igb_msix_rx(int irq, void *data)
3089 {
3090         struct igb_ring *rx_ring = data;
3091         struct igb_adapter *adapter = rx_ring->adapter;
3092         struct e1000_hw *hw = &adapter->hw;
3093
3094         if (!rx_ring->itr_val)
3095                 wr32(E1000_EIMC, rx_ring->eims_value);
3096
3097         if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi)) {
3098                 rx_ring->total_bytes = 0;
3099                 rx_ring->total_packets = 0;
3100                 rx_ring->no_itr_adjust = 0;
3101                 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3102         } else {
3103                 if (!rx_ring->no_itr_adjust) {
3104                         igb_lower_rx_eitr(adapter, rx_ring);
3105                         rx_ring->no_itr_adjust = 1;
3106                 }
3107         }
3108
3109         return IRQ_HANDLED;
3110 }
3111
3112
3113 /**
3114  * igb_intr_msi - Interrupt Handler
3115  * @irq: interrupt number
3116  * @data: pointer to a network interface device structure
3117  **/
3118 static irqreturn_t igb_intr_msi(int irq, void *data)
3119 {
3120         struct net_device *netdev = data;
3121         struct igb_adapter *adapter = netdev_priv(netdev);
3122         struct napi_struct *napi = &adapter->napi;
3123         struct e1000_hw *hw = &adapter->hw;
3124         /* read ICR disables interrupts using IAM */
3125         u32 icr = rd32(E1000_ICR);
3126
3127         /* Write the ITR value calculated at the end of the
3128          * previous interrupt.
3129          */
3130         if (adapter->set_itr) {
3131                 wr32(E1000_ITR,
3132                         1000000000 / (adapter->itr * 256));
3133                 adapter->set_itr = 0;
3134         }
3135
3136         /* read ICR disables interrupts using IAM */
3137         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3138                 hw->mac.get_link_status = 1;
3139                 if (!test_bit(__IGB_DOWN, &adapter->state))
3140                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3141         }
3142
3143         if (netif_rx_schedule_prep(netdev, napi)) {
3144                 adapter->tx_ring->total_bytes = 0;
3145                 adapter->tx_ring->total_packets = 0;
3146                 adapter->rx_ring->total_bytes = 0;
3147                 adapter->rx_ring->total_packets = 0;
3148                 __netif_rx_schedule(netdev, napi);
3149         }
3150
3151         return IRQ_HANDLED;
3152 }
3153
3154 /**
3155  * igb_intr - Interrupt Handler
3156  * @irq: interrupt number
3157  * @data: pointer to a network interface device structure
3158  **/
3159 static irqreturn_t igb_intr(int irq, void *data)
3160 {
3161         struct net_device *netdev = data;
3162         struct igb_adapter *adapter = netdev_priv(netdev);
3163         struct napi_struct *napi = &adapter->napi;
3164         struct e1000_hw *hw = &adapter->hw;
3165         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
3166          * need for the IMC write */
3167         u32 icr = rd32(E1000_ICR);
3168         u32 eicr = 0;
3169         if (!icr)
3170                 return IRQ_NONE;  /* Not our interrupt */
3171
3172         /* Write the ITR value calculated at the end of the
3173          * previous interrupt.
3174          */
3175         if (adapter->set_itr) {
3176                 wr32(E1000_ITR,
3177                         1000000000 / (adapter->itr * 256));
3178                 adapter->set_itr = 0;
3179         }
3180
3181         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3182          * not set, then the adapter didn't send an interrupt */
3183         if (!(icr & E1000_ICR_INT_ASSERTED))
3184                 return IRQ_NONE;
3185
3186         eicr = rd32(E1000_EICR);
3187
3188         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3189                 hw->mac.get_link_status = 1;
3190                 /* guard against interrupt when we're going down */
3191                 if (!test_bit(__IGB_DOWN, &adapter->state))
3192                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3193         }
3194
3195         if (netif_rx_schedule_prep(netdev, napi)) {
3196                 adapter->tx_ring->total_bytes = 0;
3197                 adapter->rx_ring->total_bytes = 0;
3198                 adapter->tx_ring->total_packets = 0;
3199                 adapter->rx_ring->total_packets = 0;
3200                 __netif_rx_schedule(netdev, napi);
3201         }
3202
3203         return IRQ_HANDLED;
3204 }
3205
3206 /**
3207  * igb_clean - NAPI Rx polling callback
3208  * @adapter: board private structure
3209  **/
3210 static int igb_clean(struct napi_struct *napi, int budget)
3211 {
3212         struct igb_adapter *adapter = container_of(napi, struct igb_adapter,
3213                                                    napi);
3214         struct net_device *netdev = adapter->netdev;
3215         int tx_clean_complete = 1, work_done = 0;
3216         int i;
3217
3218         /* Must NOT use netdev_priv macro here. */
3219         adapter = netdev->priv;
3220
3221         /* Keep link state information with original netdev */
3222         if (!netif_carrier_ok(netdev))
3223                 goto quit_polling;
3224
3225         /* igb_clean is called per-cpu.  This lock protects tx_ring[i] from
3226          * being cleaned by multiple cpus simultaneously.  A failure obtaining
3227          * the lock means tx_ring[i] is currently being cleaned anyway. */
3228         for (i = 0; i < adapter->num_tx_queues; i++) {
3229                 if (spin_trylock(&adapter->tx_ring[i].tx_clean_lock)) {
3230                         tx_clean_complete &= igb_clean_tx_irq(adapter,
3231                                                         &adapter->tx_ring[i]);
3232                         spin_unlock(&adapter->tx_ring[i].tx_clean_lock);
3233                 }
3234         }
3235
3236         for (i = 0; i < adapter->num_rx_queues; i++)
3237                 igb_clean_rx_irq_adv(adapter, &adapter->rx_ring[i], &work_done,
3238                                      adapter->rx_ring[i].napi.weight);
3239
3240         /* If no Tx and not enough Rx work done, exit the polling mode */
3241         if ((tx_clean_complete && (work_done < budget)) ||
3242             !netif_running(netdev)) {
3243 quit_polling:
3244                 if (adapter->itr_setting & 3)
3245                         igb_set_itr(adapter, E1000_ITR, false);
3246                 netif_rx_complete(netdev, napi);
3247                 if (!test_bit(__IGB_DOWN, &adapter->state))
3248                         igb_irq_enable(adapter);
3249                 return 0;
3250         }
3251
3252         return 1;
3253 }
3254
3255 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3256 {
3257         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3258         struct igb_adapter *adapter = rx_ring->adapter;
3259         struct e1000_hw *hw = &adapter->hw;
3260         struct net_device *netdev = adapter->netdev;
3261         int work_done = 0;
3262
3263         /* Keep link state information with original netdev */
3264         if (!netif_carrier_ok(netdev))
3265                 goto quit_polling;
3266
3267         igb_clean_rx_irq_adv(adapter, rx_ring, &work_done, budget);
3268
3269
3270         /* If not enough Rx work done, exit the polling mode */
3271         if ((work_done == 0) || !netif_running(netdev)) {
3272 quit_polling:
3273                 netif_rx_complete(netdev, napi);
3274
3275                 wr32(E1000_EIMS, rx_ring->eims_value);
3276                 if ((adapter->itr_setting & 3) && !rx_ring->no_itr_adjust &&
3277                     (rx_ring->total_packets > IGB_DYN_ITR_PACKET_THRESHOLD)) {
3278                         int mean_size = rx_ring->total_bytes /
3279                                         rx_ring->total_packets;
3280                         if (mean_size < IGB_DYN_ITR_LENGTH_LOW)
3281                                 igb_raise_rx_eitr(adapter, rx_ring);
3282                         else if (mean_size > IGB_DYN_ITR_LENGTH_HIGH)
3283                                 igb_lower_rx_eitr(adapter, rx_ring);
3284                 }
3285                 return 0;
3286         }
3287
3288         return 1;
3289 }
3290
3291 static inline u32 get_head(struct igb_ring *tx_ring)
3292 {
3293         void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
3294         return le32_to_cpu(*(volatile __le32 *)end);
3295 }
3296
3297 /**
3298  * igb_clean_tx_irq - Reclaim resources after transmit completes
3299  * @adapter: board private structure
3300  * returns true if ring is completely cleaned
3301  **/
3302 static bool igb_clean_tx_irq(struct igb_adapter *adapter,
3303                                   struct igb_ring *tx_ring)
3304 {
3305         struct net_device *netdev = adapter->netdev;
3306         struct e1000_hw *hw = &adapter->hw;
3307         struct e1000_tx_desc *tx_desc;
3308         struct igb_buffer *buffer_info;
3309         struct sk_buff *skb;
3310         unsigned int i;
3311         u32 head, oldhead;
3312         unsigned int count = 0;
3313         bool cleaned = false;
3314         bool retval = true;
3315         unsigned int total_bytes = 0, total_packets = 0;
3316
3317         rmb();
3318         head = get_head(tx_ring);
3319         i = tx_ring->next_to_clean;
3320         while (1) {
3321                 while (i != head) {
3322                         cleaned = true;
3323                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3324                         buffer_info = &tx_ring->buffer_info[i];
3325                         skb = buffer_info->skb;
3326
3327                         if (skb) {
3328                                 unsigned int segs, bytecount;
3329                                 /* gso_segs is currently only valid for tcp */
3330                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
3331                                 /* multiply data chunks by size of headers */
3332                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
3333                                             skb->len;
3334                                 total_packets += segs;
3335                                 total_bytes += bytecount;
3336                         }
3337
3338                         igb_unmap_and_free_tx_resource(adapter, buffer_info);
3339                         tx_desc->upper.data = 0;
3340
3341                         i++;
3342                         if (i == tx_ring->count)
3343                                 i = 0;
3344
3345                         count++;
3346                         if (count == IGB_MAX_TX_CLEAN) {
3347                                 retval = false;
3348                                 goto done_cleaning;
3349                         }
3350                 }
3351                 oldhead = head;
3352                 rmb();
3353                 head = get_head(tx_ring);
3354                 if (head == oldhead)
3355                         goto done_cleaning;
3356         }  /* while (1) */
3357
3358 done_cleaning:
3359         tx_ring->next_to_clean = i;
3360
3361         if (unlikely(cleaned &&
3362                      netif_carrier_ok(netdev) &&
3363                      IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3364                 /* Make sure that anybody stopping the queue after this
3365                  * sees the new next_to_clean.
3366                  */
3367                 smp_mb();
3368                 if (netif_queue_stopped(netdev) &&
3369                     !(test_bit(__IGB_DOWN, &adapter->state))) {
3370                         netif_wake_queue(netdev);
3371                         ++adapter->restart_queue;
3372                 }
3373         }
3374
3375         if (tx_ring->detect_tx_hung) {
3376                 /* Detect a transmit hang in hardware, this serializes the
3377                  * check with the clearing of time_stamp and movement of i */
3378                 tx_ring->detect_tx_hung = false;
3379                 if (tx_ring->buffer_info[i].time_stamp &&
3380                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3381                                (adapter->tx_timeout_factor * HZ))
3382                     && !(rd32(E1000_STATUS) &
3383                          E1000_STATUS_TXOFF)) {
3384
3385                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3386                         /* detected Tx unit hang */
3387                         dev_err(&adapter->pdev->dev,
3388                                 "Detected Tx Unit Hang\n"
3389                                 "  Tx Queue             <%lu>\n"
3390                                 "  TDH                  <%x>\n"
3391                                 "  TDT                  <%x>\n"
3392                                 "  next_to_use          <%x>\n"
3393                                 "  next_to_clean        <%x>\n"
3394                                 "  head (WB)            <%x>\n"
3395                                 "buffer_info[next_to_clean]\n"
3396                                 "  time_stamp           <%lx>\n"
3397                                 "  jiffies              <%lx>\n"
3398                                 "  desc.status          <%x>\n",
3399                                 (unsigned long)((tx_ring - adapter->tx_ring) /
3400                                         sizeof(struct igb_ring)),
3401                                 readl(adapter->hw.hw_addr + tx_ring->head),
3402                                 readl(adapter->hw.hw_addr + tx_ring->tail),
3403                                 tx_ring->next_to_use,
3404                                 tx_ring->next_to_clean,
3405                                 head,
3406                                 tx_ring->buffer_info[i].time_stamp,
3407                                 jiffies,
3408                                 tx_desc->upper.fields.status);
3409                         netif_stop_queue(netdev);
3410                 }
3411         }
3412         tx_ring->total_bytes += total_bytes;
3413         tx_ring->total_packets += total_packets;
3414         adapter->net_stats.tx_bytes += total_bytes;
3415         adapter->net_stats.tx_packets += total_packets;
3416         return retval;
3417 }
3418
3419
3420 /**
3421  * igb_receive_skb - helper function to handle rx indications
3422  * @adapter: board private structure
3423  * @status: descriptor status field as written by hardware
3424  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3425  * @skb: pointer to sk_buff to be indicated to stack
3426  **/
3427 static void igb_receive_skb(struct igb_adapter *adapter, u8 status, __le16 vlan,
3428                             struct sk_buff *skb)
3429 {
3430         if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
3431                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3432                                          le16_to_cpu(vlan) &
3433                                          E1000_RXD_SPC_VLAN_MASK);
3434         else
3435                 netif_receive_skb(skb);
3436 }
3437
3438
3439 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3440                                        u32 status_err, struct sk_buff *skb)
3441 {
3442         skb->ip_summed = CHECKSUM_NONE;
3443
3444         /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3445         if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3446                 return;
3447         /* TCP/UDP checksum error bit is set */
3448         if (status_err &
3449             (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3450                 /* let the stack verify checksum errors */
3451                 adapter->hw_csum_err++;
3452                 return;
3453         }
3454         /* It must be a TCP or UDP packet with a valid checksum */
3455         if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3456                 skb->ip_summed = CHECKSUM_UNNECESSARY;
3457
3458         adapter->hw_csum_good++;
3459 }
3460
3461 static bool igb_clean_rx_irq_adv(struct igb_adapter *adapter,
3462                                       struct igb_ring *rx_ring,
3463                                       int *work_done, int budget)
3464 {
3465         struct net_device *netdev = adapter->netdev;
3466         struct pci_dev *pdev = adapter->pdev;
3467         union e1000_adv_rx_desc *rx_desc , *next_rxd;
3468         struct igb_buffer *buffer_info , *next_buffer;
3469         struct sk_buff *skb;
3470         unsigned int i, j;
3471         u32 length, hlen, staterr;
3472         bool cleaned = false;
3473         int cleaned_count = 0;
3474         unsigned int total_bytes = 0, total_packets = 0;
3475
3476         i = rx_ring->next_to_clean;
3477         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3478         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3479
3480         while (staterr & E1000_RXD_STAT_DD) {
3481                 if (*work_done >= budget)
3482                         break;
3483                 (*work_done)++;
3484                 buffer_info = &rx_ring->buffer_info[i];
3485
3486                 /* HW will not DMA in data larger than the given buffer, even
3487                  * if it parses the (NFS, of course) header to be larger.  In
3488                  * that case, it fills the header buffer and spills the rest
3489                  * into the page.
3490                  */
3491                 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3492                   E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
3493                 if (hlen > adapter->rx_ps_hdr_size)
3494                         hlen = adapter->rx_ps_hdr_size;
3495
3496                 length = le16_to_cpu(rx_desc->wb.upper.length);
3497                 cleaned = true;
3498                 cleaned_count++;
3499
3500                 if (rx_ring->pending_skb != NULL) {
3501                         skb = rx_ring->pending_skb;
3502                         rx_ring->pending_skb = NULL;
3503                         j = rx_ring->pending_skb_page;
3504                 } else {
3505                         skb = buffer_info->skb;
3506                         prefetch(skb->data - NET_IP_ALIGN);
3507                         buffer_info->skb = NULL;
3508                         if (hlen) {
3509                                 pci_unmap_single(pdev, buffer_info->dma,
3510                                                  adapter->rx_ps_hdr_size +
3511                                                    NET_IP_ALIGN,
3512                                                  PCI_DMA_FROMDEVICE);
3513                                 skb_put(skb, hlen);
3514                         } else {
3515                                 pci_unmap_single(pdev, buffer_info->dma,
3516                                                  adapter->rx_buffer_len +
3517                                                    NET_IP_ALIGN,
3518                                                  PCI_DMA_FROMDEVICE);
3519                                 skb_put(skb, length);
3520                                 goto send_up;
3521                         }
3522                         j = 0;
3523                 }
3524
3525                 while (length) {
3526                         pci_unmap_page(pdev, buffer_info->page_dma,
3527                                 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3528                         buffer_info->page_dma = 0;
3529                         skb_fill_page_desc(skb, j, buffer_info->page,
3530                                                 0, length);
3531                         buffer_info->page = NULL;
3532
3533                         skb->len += length;
3534                         skb->data_len += length;
3535                         skb->truesize += length;
3536                         rx_desc->wb.upper.status_error = 0;
3537                         if (staterr & E1000_RXD_STAT_EOP)
3538                                 break;
3539
3540                         j++;
3541                         cleaned_count++;
3542                         i++;
3543                         if (i == rx_ring->count)
3544                                 i = 0;
3545
3546                         buffer_info = &rx_ring->buffer_info[i];
3547                         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3548                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3549                         length = le16_to_cpu(rx_desc->wb.upper.length);
3550                         if (!(staterr & E1000_RXD_STAT_DD)) {
3551                                 rx_ring->pending_skb = skb;
3552                                 rx_ring->pending_skb_page = j;
3553                                 goto out;
3554                         }
3555                 }
3556 send_up:
3557                 pskb_trim(skb, skb->len - 4);
3558                 i++;
3559                 if (i == rx_ring->count)
3560                         i = 0;
3561                 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3562                 prefetch(next_rxd);
3563                 next_buffer = &rx_ring->buffer_info[i];
3564
3565                 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3566                         dev_kfree_skb_irq(skb);
3567                         goto next_desc;
3568                 }
3569                 rx_ring->no_itr_adjust |= (staterr & E1000_RXD_STAT_DYNINT);
3570
3571                 total_bytes += skb->len;
3572                 total_packets++;
3573
3574                 igb_rx_checksum_adv(adapter, staterr, skb);
3575
3576                 skb->protocol = eth_type_trans(skb, netdev);
3577
3578                 igb_receive_skb(adapter, staterr, rx_desc->wb.upper.vlan, skb);
3579
3580                 netdev->last_rx = jiffies;
3581
3582 next_desc:
3583                 rx_desc->wb.upper.status_error = 0;
3584
3585                 /* return some buffers to hardware, one at a time is too slow */
3586                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
3587                         igb_alloc_rx_buffers_adv(adapter, rx_ring,
3588                                                  cleaned_count);
3589                         cleaned_count = 0;
3590                 }
3591
3592                 /* use prefetched values */
3593                 rx_desc = next_rxd;
3594                 buffer_info = next_buffer;
3595
3596                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3597         }
3598 out:
3599         rx_ring->next_to_clean = i;
3600         cleaned_count = IGB_DESC_UNUSED(rx_ring);
3601
3602         if (cleaned_count)
3603                 igb_alloc_rx_buffers_adv(adapter, rx_ring, cleaned_count);
3604
3605         rx_ring->total_packets += total_packets;
3606         rx_ring->total_bytes += total_bytes;
3607         rx_ring->rx_stats.packets += total_packets;
3608         rx_ring->rx_stats.bytes += total_bytes;
3609         adapter->net_stats.rx_bytes += total_bytes;
3610         adapter->net_stats.rx_packets += total_packets;
3611         return cleaned;
3612 }
3613
3614
3615 /**
3616  * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3617  * @adapter: address of board private structure
3618  **/
3619 static void igb_alloc_rx_buffers_adv(struct igb_adapter *adapter,
3620                                      struct igb_ring *rx_ring,
3621                                      int cleaned_count)
3622 {
3623         struct net_device *netdev = adapter->netdev;
3624         struct pci_dev *pdev = adapter->pdev;
3625         union e1000_adv_rx_desc *rx_desc;
3626         struct igb_buffer *buffer_info;
3627         struct sk_buff *skb;
3628         unsigned int i;
3629
3630         i = rx_ring->next_to_use;
3631         buffer_info = &rx_ring->buffer_info[i];
3632
3633         while (cleaned_count--) {
3634                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3635
3636                 if (adapter->rx_ps_hdr_size && !buffer_info->page) {
3637                         buffer_info->page = alloc_page(GFP_ATOMIC);
3638                         if (!buffer_info->page) {
3639                                 adapter->alloc_rx_buff_failed++;
3640                                 goto no_buffers;
3641                         }
3642                         buffer_info->page_dma =
3643                                 pci_map_page(pdev,
3644                                              buffer_info->page,
3645                                              0, PAGE_SIZE,
3646                                              PCI_DMA_FROMDEVICE);
3647                 }
3648
3649                 if (!buffer_info->skb) {
3650                         int bufsz;
3651
3652                         if (adapter->rx_ps_hdr_size)
3653                                 bufsz = adapter->rx_ps_hdr_size;
3654                         else
3655                                 bufsz = adapter->rx_buffer_len;
3656                         bufsz += NET_IP_ALIGN;
3657                         skb = netdev_alloc_skb(netdev, bufsz);
3658
3659                         if (!skb) {
3660                                 adapter->alloc_rx_buff_failed++;
3661                                 goto no_buffers;
3662                         }
3663
3664                         /* Make buffer alignment 2 beyond a 16 byte boundary
3665                          * this will result in a 16 byte aligned IP header after
3666                          * the 14 byte MAC header is removed
3667                          */
3668                         skb_reserve(skb, NET_IP_ALIGN);
3669
3670                         buffer_info->skb = skb;
3671                         buffer_info->dma = pci_map_single(pdev, skb->data,
3672                                                           bufsz,
3673                                                           PCI_DMA_FROMDEVICE);
3674
3675                 }
3676                 /* Refresh the desc even if buffer_addrs didn't change because
3677                  * each write-back erases this info. */
3678                 if (adapter->rx_ps_hdr_size) {
3679                         rx_desc->read.pkt_addr =
3680                              cpu_to_le64(buffer_info->page_dma);
3681                         rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
3682                 } else {
3683                         rx_desc->read.pkt_addr =
3684                              cpu_to_le64(buffer_info->dma);
3685                         rx_desc->read.hdr_addr = 0;
3686                 }
3687
3688                 i++;
3689                 if (i == rx_ring->count)
3690                         i = 0;
3691                 buffer_info = &rx_ring->buffer_info[i];
3692         }
3693
3694 no_buffers:
3695         if (rx_ring->next_to_use != i) {
3696                 rx_ring->next_to_use = i;
3697                 if (i == 0)
3698                         i = (rx_ring->count - 1);
3699                 else
3700                         i--;
3701
3702                 /* Force memory writes to complete before letting h/w
3703                  * know there are new descriptors to fetch.  (Only
3704                  * applicable for weak-ordered memory model archs,
3705                  * such as IA-64). */
3706                 wmb();
3707                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
3708         }
3709 }
3710
3711 /**
3712  * igb_mii_ioctl -
3713  * @netdev:
3714  * @ifreq:
3715  * @cmd:
3716  **/
3717 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3718 {
3719         struct igb_adapter *adapter = netdev_priv(netdev);
3720         struct mii_ioctl_data *data = if_mii(ifr);
3721
3722         if (adapter->hw.phy.media_type != e1000_media_type_copper)
3723                 return -EOPNOTSUPP;
3724
3725         switch (cmd) {
3726         case SIOCGMIIPHY:
3727                 data->phy_id = adapter->hw.phy.addr;
3728                 break;
3729         case SIOCGMIIREG:
3730                 if (!capable(CAP_NET_ADMIN))
3731                         return -EPERM;
3732                 if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw,
3733                                                      data->reg_num
3734                                                      & 0x1F, &data->val_out))
3735                         return -EIO;
3736                 break;
3737         case SIOCSMIIREG:
3738         default:
3739                 return -EOPNOTSUPP;
3740         }
3741         return 0;
3742 }
3743
3744 /**
3745  * igb_ioctl -
3746  * @netdev:
3747  * @ifreq:
3748  * @cmd:
3749  **/
3750 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3751 {
3752         switch (cmd) {
3753         case SIOCGMIIPHY:
3754         case SIOCGMIIREG:
3755         case SIOCSMIIREG:
3756                 return igb_mii_ioctl(netdev, ifr, cmd);
3757         default:
3758                 return -EOPNOTSUPP;
3759         }
3760 }
3761
3762 static void igb_vlan_rx_register(struct net_device *netdev,
3763                                  struct vlan_group *grp)
3764 {
3765         struct igb_adapter *adapter = netdev_priv(netdev);
3766         struct e1000_hw *hw = &adapter->hw;
3767         u32 ctrl, rctl;
3768
3769         igb_irq_disable(adapter);
3770         adapter->vlgrp = grp;
3771
3772         if (grp) {
3773                 /* enable VLAN tag insert/strip */
3774                 ctrl = rd32(E1000_CTRL);
3775                 ctrl |= E1000_CTRL_VME;
3776                 wr32(E1000_CTRL, ctrl);
3777
3778                 /* enable VLAN receive filtering */
3779                 rctl = rd32(E1000_RCTL);
3780                 rctl |= E1000_RCTL_VFE;
3781                 rctl &= ~E1000_RCTL_CFIEN;
3782                 wr32(E1000_RCTL, rctl);
3783                 igb_update_mng_vlan(adapter);
3784                 wr32(E1000_RLPML,
3785                                 adapter->max_frame_size + VLAN_TAG_SIZE);
3786         } else {
3787                 /* disable VLAN tag insert/strip */
3788                 ctrl = rd32(E1000_CTRL);
3789                 ctrl &= ~E1000_CTRL_VME;
3790                 wr32(E1000_CTRL, ctrl);
3791
3792                 /* disable VLAN filtering */
3793                 rctl = rd32(E1000_RCTL);
3794                 rctl &= ~E1000_RCTL_VFE;
3795                 wr32(E1000_RCTL, rctl);
3796                 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
3797                         igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3798                         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
3799                 }
3800                 wr32(E1000_RLPML,
3801                                 adapter->max_frame_size);
3802         }
3803
3804         if (!test_bit(__IGB_DOWN, &adapter->state))
3805                 igb_irq_enable(adapter);
3806 }
3807
3808 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
3809 {
3810         struct igb_adapter *adapter = netdev_priv(netdev);
3811         struct e1000_hw *hw = &adapter->hw;
3812         u32 vfta, index;
3813
3814         if ((adapter->hw.mng_cookie.status &
3815              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3816             (vid == adapter->mng_vlan_id))
3817                 return;
3818         /* add VID to filter table */
3819         index = (vid >> 5) & 0x7F;
3820         vfta = array_rd32(E1000_VFTA, index);
3821         vfta |= (1 << (vid & 0x1F));
3822         igb_write_vfta(&adapter->hw, index, vfta);
3823 }
3824
3825 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
3826 {
3827         struct igb_adapter *adapter = netdev_priv(netdev);
3828         struct e1000_hw *hw = &adapter->hw;
3829         u32 vfta, index;
3830
3831         igb_irq_disable(adapter);
3832         vlan_group_set_device(adapter->vlgrp, vid, NULL);
3833
3834         if (!test_bit(__IGB_DOWN, &adapter->state))
3835                 igb_irq_enable(adapter);
3836
3837         if ((adapter->hw.mng_cookie.status &
3838              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3839             (vid == adapter->mng_vlan_id)) {
3840                 /* release control to f/w */
3841                 igb_release_hw_control(adapter);
3842                 return;
3843         }
3844
3845         /* remove VID from filter table */
3846         index = (vid >> 5) & 0x7F;
3847         vfta = array_rd32(E1000_VFTA, index);
3848         vfta &= ~(1 << (vid & 0x1F));
3849         igb_write_vfta(&adapter->hw, index, vfta);
3850 }
3851
3852 static void igb_restore_vlan(struct igb_adapter *adapter)
3853 {
3854         igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
3855
3856         if (adapter->vlgrp) {
3857                 u16 vid;
3858                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
3859                         if (!vlan_group_get_device(adapter->vlgrp, vid))
3860                                 continue;
3861                         igb_vlan_rx_add_vid(adapter->netdev, vid);
3862                 }
3863         }
3864 }
3865
3866 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
3867 {
3868         struct e1000_mac_info *mac = &adapter->hw.mac;
3869
3870         mac->autoneg = 0;
3871
3872         /* Fiber NICs only allow 1000 gbps Full duplex */
3873         if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
3874                 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
3875                 dev_err(&adapter->pdev->dev,
3876                         "Unsupported Speed/Duplex configuration\n");
3877                 return -EINVAL;
3878         }
3879
3880         switch (spddplx) {
3881         case SPEED_10 + DUPLEX_HALF:
3882                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
3883                 break;
3884         case SPEED_10 + DUPLEX_FULL:
3885                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
3886                 break;
3887         case SPEED_100 + DUPLEX_HALF:
3888                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
3889                 break;
3890         case SPEED_100 + DUPLEX_FULL:
3891                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
3892                 break;
3893         case SPEED_1000 + DUPLEX_FULL:
3894                 mac->autoneg = 1;
3895                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
3896                 break;
3897         case SPEED_1000 + DUPLEX_HALF: /* not supported */
3898         default:
3899                 dev_err(&adapter->pdev->dev,
3900                         "Unsupported Speed/Duplex configuration\n");
3901                 return -EINVAL;
3902         }
3903         return 0;
3904 }
3905
3906
3907 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
3908 {
3909         struct net_device *netdev = pci_get_drvdata(pdev);
3910         struct igb_adapter *adapter = netdev_priv(netdev);
3911         struct e1000_hw *hw = &adapter->hw;
3912         u32 ctrl, ctrl_ext, rctl, status;
3913         u32 wufc = adapter->wol;
3914 #ifdef CONFIG_PM
3915         int retval = 0;
3916 #endif
3917
3918         netif_device_detach(netdev);
3919
3920         if (netif_running(netdev)) {
3921                 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3922                 igb_down(adapter);
3923                 igb_free_irq(adapter);
3924         }
3925
3926 #ifdef CONFIG_PM
3927         retval = pci_save_state(pdev);
3928         if (retval)
3929                 return retval;
3930 #endif
3931
3932         status = rd32(E1000_STATUS);
3933         if (status & E1000_STATUS_LU)
3934                 wufc &= ~E1000_WUFC_LNKC;
3935
3936         if (wufc) {
3937                 igb_setup_rctl(adapter);
3938                 igb_set_multi(netdev);
3939
3940                 /* turn on all-multi mode if wake on multicast is enabled */
3941                 if (wufc & E1000_WUFC_MC) {
3942                         rctl = rd32(E1000_RCTL);
3943                         rctl |= E1000_RCTL_MPE;
3944                         wr32(E1000_RCTL, rctl);
3945                 }
3946
3947                 ctrl = rd32(E1000_CTRL);
3948                 /* advertise wake from D3Cold */
3949                 #define E1000_CTRL_ADVD3WUC 0x00100000
3950                 /* phy power management enable */
3951                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
3952                 ctrl |= E1000_CTRL_ADVD3WUC;
3953                 wr32(E1000_CTRL, ctrl);
3954
3955                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
3956                    adapter->hw.phy.media_type ==
3957                                         e1000_media_type_internal_serdes) {
3958                         /* keep the laser running in D3 */
3959                         ctrl_ext = rd32(E1000_CTRL_EXT);
3960                         ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
3961                         wr32(E1000_CTRL_EXT, ctrl_ext);
3962                 }
3963
3964                 /* Allow time for pending master requests to run */
3965                 igb_disable_pcie_master(&adapter->hw);
3966
3967                 wr32(E1000_WUC, E1000_WUC_PME_EN);
3968                 wr32(E1000_WUFC, wufc);
3969                 pci_enable_wake(pdev, PCI_D3hot, 1);
3970                 pci_enable_wake(pdev, PCI_D3cold, 1);
3971         } else {
3972                 wr32(E1000_WUC, 0);
3973                 wr32(E1000_WUFC, 0);
3974                 pci_enable_wake(pdev, PCI_D3hot, 0);
3975                 pci_enable_wake(pdev, PCI_D3cold, 0);
3976         }
3977
3978         /* make sure adapter isn't asleep if manageability is enabled */
3979         if (adapter->en_mng_pt) {
3980                 pci_enable_wake(pdev, PCI_D3hot, 1);
3981                 pci_enable_wake(pdev, PCI_D3cold, 1);
3982         }
3983
3984         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3985          * would have already happened in close and is redundant. */
3986         igb_release_hw_control(adapter);
3987
3988         pci_disable_device(pdev);
3989
3990         pci_set_power_state(pdev, pci_choose_state(pdev, state));
3991
3992         return 0;
3993 }
3994
3995 #ifdef CONFIG_PM
3996 static int igb_resume(struct pci_dev *pdev)
3997 {
3998         struct net_device *netdev = pci_get_drvdata(pdev);
3999         struct igb_adapter *adapter = netdev_priv(netdev);
4000         struct e1000_hw *hw = &adapter->hw;
4001         u32 err;
4002
4003         pci_set_power_state(pdev, PCI_D0);
4004         pci_restore_state(pdev);
4005
4006         if (adapter->need_ioport)
4007                 err = pci_enable_device(pdev);
4008         else
4009                 err = pci_enable_device_mem(pdev);
4010         if (err) {
4011                 dev_err(&pdev->dev,
4012                         "igb: Cannot enable PCI device from suspend\n");
4013                 return err;
4014         }
4015         pci_set_master(pdev);
4016
4017         pci_enable_wake(pdev, PCI_D3hot, 0);
4018         pci_enable_wake(pdev, PCI_D3cold, 0);
4019
4020         if (netif_running(netdev)) {
4021                 err = igb_request_irq(adapter);
4022                 if (err)
4023                         return err;
4024         }
4025
4026         /* e1000_power_up_phy(adapter); */
4027
4028         igb_reset(adapter);
4029         wr32(E1000_WUS, ~0);
4030
4031         igb_init_manageability(adapter);
4032
4033         if (netif_running(netdev))
4034                 igb_up(adapter);
4035
4036         netif_device_attach(netdev);
4037
4038         /* let the f/w know that the h/w is now under the control of the
4039          * driver. */
4040         igb_get_hw_control(adapter);
4041
4042         return 0;
4043 }
4044 #endif
4045
4046 static void igb_shutdown(struct pci_dev *pdev)
4047 {
4048         igb_suspend(pdev, PMSG_SUSPEND);
4049 }
4050
4051 #ifdef CONFIG_NET_POLL_CONTROLLER
4052 /*
4053  * Polling 'interrupt' - used by things like netconsole to send skbs
4054  * without having to re-enable interrupts. It's not called while
4055  * the interrupt routine is executing.
4056  */
4057 static void igb_netpoll(struct net_device *netdev)
4058 {
4059         struct igb_adapter *adapter = netdev_priv(netdev);
4060         int i;
4061         int work_done = 0;
4062
4063         igb_irq_disable(adapter);
4064         for (i = 0; i < adapter->num_tx_queues; i++)
4065                 igb_clean_tx_irq(adapter, &adapter->tx_ring[i]);
4066
4067         for (i = 0; i < adapter->num_rx_queues; i++)
4068                 igb_clean_rx_irq_adv(adapter, &adapter->rx_ring[i],
4069                                      &work_done,
4070                                      adapter->rx_ring[i].napi.weight);
4071
4072         igb_irq_enable(adapter);
4073 }
4074 #endif /* CONFIG_NET_POLL_CONTROLLER */
4075
4076 /**
4077  * igb_io_error_detected - called when PCI error is detected
4078  * @pdev: Pointer to PCI device
4079  * @state: The current pci connection state
4080  *
4081  * This function is called after a PCI bus error affecting
4082  * this device has been detected.
4083  */
4084 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4085                                               pci_channel_state_t state)
4086 {
4087         struct net_device *netdev = pci_get_drvdata(pdev);
4088         struct igb_adapter *adapter = netdev_priv(netdev);
4089
4090         netif_device_detach(netdev);
4091
4092         if (netif_running(netdev))
4093                 igb_down(adapter);
4094         pci_disable_device(pdev);
4095
4096         /* Request a slot slot reset. */
4097         return PCI_ERS_RESULT_NEED_RESET;
4098 }
4099
4100 /**
4101  * igb_io_slot_reset - called after the pci bus has been reset.
4102  * @pdev: Pointer to PCI device
4103  *
4104  * Restart the card from scratch, as if from a cold-boot. Implementation
4105  * resembles the first-half of the igb_resume routine.
4106  */
4107 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4108 {
4109         struct net_device *netdev = pci_get_drvdata(pdev);
4110         struct igb_adapter *adapter = netdev_priv(netdev);
4111         struct e1000_hw *hw = &adapter->hw;
4112         int err;
4113
4114         if (adapter->need_ioport)
4115                 err = pci_enable_device(pdev);
4116         else
4117                 err = pci_enable_device_mem(pdev);
4118         if (err) {
4119                 dev_err(&pdev->dev,
4120                         "Cannot re-enable PCI device after reset.\n");
4121                 return PCI_ERS_RESULT_DISCONNECT;
4122         }
4123         pci_set_master(pdev);
4124         pci_restore_state(pdev);
4125
4126         pci_enable_wake(pdev, PCI_D3hot, 0);
4127         pci_enable_wake(pdev, PCI_D3cold, 0);
4128
4129         igb_reset(adapter);
4130         wr32(E1000_WUS, ~0);
4131
4132         return PCI_ERS_RESULT_RECOVERED;
4133 }
4134
4135 /**
4136  * igb_io_resume - called when traffic can start flowing again.
4137  * @pdev: Pointer to PCI device
4138  *
4139  * This callback is called when the error recovery driver tells us that
4140  * its OK to resume normal operation. Implementation resembles the
4141  * second-half of the igb_resume routine.
4142  */
4143 static void igb_io_resume(struct pci_dev *pdev)
4144 {
4145         struct net_device *netdev = pci_get_drvdata(pdev);
4146         struct igb_adapter *adapter = netdev_priv(netdev);
4147
4148         igb_init_manageability(adapter);
4149
4150         if (netif_running(netdev)) {
4151                 if (igb_up(adapter)) {
4152                         dev_err(&pdev->dev, "igb_up failed after reset\n");
4153                         return;
4154                 }
4155         }
4156
4157         netif_device_attach(netdev);
4158
4159         /* let the f/w know that the h/w is now under the control of the
4160          * driver. */
4161         igb_get_hw_control(adapter);
4162
4163 }
4164
4165 /* igb_main.c */