1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
31 #include <linux/types.h>
32 #include <linux/delay.h>
35 #include "e1000_mac.h"
36 #include "e1000_regs.h"
37 #include "e1000_defines.h"
41 #define E1000_DEV_ID_82575EB_COPPER 0x10A7
42 #define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9
43 #define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6
45 #define E1000_REVISION_2 2
46 #define E1000_REVISION_4 4
48 #define E1000_FUNC_1 1
53 e1000_num_macs /* List is 1-based, so subtract 1 for true count. */
56 enum e1000_media_type {
57 e1000_media_type_unknown = 0,
58 e1000_media_type_copper = 1,
59 e1000_media_type_fiber = 2,
60 e1000_media_type_internal_serdes = 3,
65 e1000_nvm_unknown = 0,
68 e1000_nvm_eeprom_microwire,
73 enum e1000_nvm_override {
74 e1000_nvm_override_none = 0,
75 e1000_nvm_override_spi_small,
76 e1000_nvm_override_spi_large,
77 e1000_nvm_override_microwire_small,
78 e1000_nvm_override_microwire_large
82 e1000_phy_unknown = 0,
93 e1000_bus_type_unknown = 0,
96 e1000_bus_type_pci_express,
97 e1000_bus_type_reserved
100 enum e1000_bus_speed {
101 e1000_bus_speed_unknown = 0,
107 e1000_bus_speed_2500,
108 e1000_bus_speed_5000,
109 e1000_bus_speed_reserved
112 enum e1000_bus_width {
113 e1000_bus_width_unknown = 0,
114 e1000_bus_width_pcie_x1,
115 e1000_bus_width_pcie_x2,
116 e1000_bus_width_pcie_x4 = 4,
117 e1000_bus_width_pcie_x8 = 8,
120 e1000_bus_width_reserved
123 enum e1000_1000t_rx_status {
124 e1000_1000t_rx_status_not_ok = 0,
125 e1000_1000t_rx_status_ok,
126 e1000_1000t_rx_status_undefined = 0xFF
129 enum e1000_rev_polarity {
130 e1000_rev_polarity_normal = 0,
131 e1000_rev_polarity_reversed,
132 e1000_rev_polarity_undefined = 0xFF
140 e1000_fc_default = 0xFF
144 /* Receive Descriptor */
145 struct e1000_rx_desc {
146 __le64 buffer_addr; /* Address of the descriptor's data buffer */
147 __le16 length; /* Length of data DMAed into data buffer */
148 __le16 csum; /* Packet checksum */
149 u8 status; /* Descriptor status */
150 u8 errors; /* Descriptor Errors */
154 /* Receive Descriptor - Extended */
155 union e1000_rx_desc_extended {
162 __le32 mrq; /* Multiple Rx Queues */
164 __le32 rss; /* RSS Hash */
166 __le16 ip_id; /* IP id */
167 __le16 csum; /* Packet Checksum */
172 __le32 status_error; /* ext status/error */
174 __le16 vlan; /* VLAN tag */
176 } wb; /* writeback */
179 #define MAX_PS_BUFFERS 4
180 /* Receive Descriptor - Packet Split */
181 union e1000_rx_desc_packet_split {
183 /* one buffer for protocol header(s), three data buffers */
184 __le64 buffer_addr[MAX_PS_BUFFERS];
188 __le32 mrq; /* Multiple Rx Queues */
190 __le32 rss; /* RSS Hash */
192 __le16 ip_id; /* IP id */
193 __le16 csum; /* Packet Checksum */
198 __le32 status_error; /* ext status/error */
199 __le16 length0; /* length of buffer 0 */
200 __le16 vlan; /* VLAN tag */
203 __le16 header_status;
204 __le16 length[3]; /* length of buffers 1-3 */
207 } wb; /* writeback */
210 /* Transmit Descriptor */
211 struct e1000_tx_desc {
212 __le64 buffer_addr; /* Address of the descriptor's data buffer */
216 __le16 length; /* Data buffer length */
217 u8 cso; /* Checksum offset */
218 u8 cmd; /* Descriptor control */
224 u8 status; /* Descriptor status */
225 u8 css; /* Checksum start */
231 /* Offload Context Descriptor */
232 struct e1000_context_desc {
236 u8 ipcss; /* IP checksum start */
237 u8 ipcso; /* IP checksum offset */
238 __le16 ipcse; /* IP checksum end */
244 u8 tucss; /* TCP checksum start */
245 u8 tucso; /* TCP checksum offset */
246 __le16 tucse; /* TCP checksum end */
249 __le32 cmd_and_length;
253 u8 status; /* Descriptor status */
254 u8 hdr_len; /* Header length */
255 __le16 mss; /* Maximum segment size */
260 /* Offload data descriptor */
261 struct e1000_data_desc {
262 __le64 buffer_addr; /* Address of the descriptor's buffer address */
266 __le16 length; /* Data buffer length */
274 u8 status; /* Descriptor status */
275 u8 popts; /* Packet Options */
281 /* Statistics counters collected by the MAC */
282 struct e1000_hw_stats {
360 struct e1000_phy_stats {
365 struct e1000_host_mng_dhcp_cookie {
376 /* Host Interface "Rev 1" */
377 struct e1000_host_command_header {
384 #define E1000_HI_MAX_DATA_LENGTH 252
385 struct e1000_host_command_info {
386 struct e1000_host_command_header command_header;
387 u8 command_data[E1000_HI_MAX_DATA_LENGTH];
390 /* Host Interface "Rev 2" */
391 struct e1000_host_mng_command_header {
399 #define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8
400 struct e1000_host_mng_command_info {
401 struct e1000_host_mng_command_header command_header;
402 u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH];
405 #include "e1000_mac.h"
406 #include "e1000_phy.h"
407 #include "e1000_nvm.h"
409 struct e1000_mac_operations {
410 s32 (*check_for_link)(struct e1000_hw *);
411 s32 (*reset_hw)(struct e1000_hw *);
412 s32 (*init_hw)(struct e1000_hw *);
413 s32 (*setup_physical_interface)(struct e1000_hw *);
414 void (*rar_set)(struct e1000_hw *, u8 *, u32);
415 s32 (*read_mac_addr)(struct e1000_hw *);
416 s32 (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *);
419 struct e1000_phy_operations {
420 s32 (*acquire_phy)(struct e1000_hw *);
421 s32 (*force_speed_duplex)(struct e1000_hw *);
422 s32 (*get_cfg_done)(struct e1000_hw *hw);
423 s32 (*get_cable_length)(struct e1000_hw *);
424 s32 (*get_phy_info)(struct e1000_hw *);
425 s32 (*read_phy_reg)(struct e1000_hw *, u32, u16 *);
426 void (*release_phy)(struct e1000_hw *);
427 s32 (*reset_phy)(struct e1000_hw *);
428 s32 (*set_d0_lplu_state)(struct e1000_hw *, bool);
429 s32 (*set_d3_lplu_state)(struct e1000_hw *, bool);
430 s32 (*write_phy_reg)(struct e1000_hw *, u32, u16);
433 struct e1000_nvm_operations {
434 s32 (*acquire_nvm)(struct e1000_hw *);
435 s32 (*read_nvm)(struct e1000_hw *, u16, u16, u16 *);
436 void (*release_nvm)(struct e1000_hw *);
437 s32 (*write_nvm)(struct e1000_hw *, u16, u16, u16 *);
441 s32 (*get_invariants)(struct e1000_hw *);
442 struct e1000_mac_operations *mac_ops;
443 struct e1000_phy_operations *phy_ops;
444 struct e1000_nvm_operations *nvm_ops;
447 extern const struct e1000_info e1000_82575_info;
449 struct e1000_mac_info {
450 struct e1000_mac_operations ops;
455 enum e1000_mac_type type;
473 u8 forced_speed_duplex;
476 bool arc_subsystem_valid;
477 bool asf_firmware_present;
481 bool disable_hw_init_bits;
482 bool get_link_status;
483 bool ifs_params_forced;
485 bool report_tx_early;
486 bool serdes_has_link;
487 bool tx_pkt_filtering;
490 struct e1000_phy_info {
491 struct e1000_phy_operations ops;
493 enum e1000_phy_type type;
495 enum e1000_1000t_rx_status local_rx;
496 enum e1000_1000t_rx_status remote_rx;
497 enum e1000_ms_type ms_type;
498 enum e1000_ms_type original_ms_type;
499 enum e1000_rev_polarity cable_polarity;
500 enum e1000_smart_speed smart_speed;
504 u32 reset_delay_us; /* in usec */
507 enum e1000_media_type media_type;
509 u16 autoneg_advertised;
512 u16 max_cable_length;
513 u16 min_cable_length;
517 bool disable_polarity_correction;
519 bool polarity_correction;
521 bool speed_downgraded;
522 bool autoneg_wait_to_complete;
525 struct e1000_nvm_info {
526 struct e1000_nvm_operations ops;
528 enum e1000_nvm_type type;
529 enum e1000_nvm_override override;
541 struct e1000_bus_info {
542 enum e1000_bus_type type;
543 enum e1000_bus_speed speed;
544 enum e1000_bus_width width;
552 struct e1000_fc_info {
553 u32 high_water; /* Flow control high-water mark */
554 u32 low_water; /* Flow control low-water mark */
555 u16 pause_time; /* Flow control pause timer */
556 bool send_xon; /* Flow control send XON */
557 bool strict_ieee; /* Strict IEEE mode */
558 enum e1000_fc_type type; /* Type of flow control */
559 enum e1000_fc_type original_type;
567 u8 __iomem *flash_address;
568 unsigned long io_base;
570 struct e1000_mac_info mac;
571 struct e1000_fc_info fc;
572 struct e1000_phy_info phy;
573 struct e1000_nvm_info nvm;
574 struct e1000_bus_info bus;
575 struct e1000_host_mng_dhcp_cookie mng_cookie;
580 u16 subsystem_vendor_id;
581 u16 subsystem_device_id;
588 extern char *igb_get_hw_dev_name(struct e1000_hw *hw);
589 #define hw_dbg(hw, format, arg...) \
590 printk(KERN_DEBUG "%s: " format, igb_get_hw_dev_name(hw), ##arg)
592 static inline int __attribute__ ((format (printf, 2, 3)))
593 hw_dbg(struct e1000_hw *hw, const char *format, ...)