1 /*******************************************************************************
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
30 #include <net/ip6_checksum.h>
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
37 #define DRIVERNAPI "-NAPI"
39 #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
40 const char e1000_driver_version[] = DRV_VERSION;
41 static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
43 /* e1000_pci_tbl - PCI Device ID Table
45 * Last entry must be all 0s
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1075),
77 INTEL_E1000_ETHERNET_DEVICE(0x1076),
78 INTEL_E1000_ETHERNET_DEVICE(0x1077),
79 INTEL_E1000_ETHERNET_DEVICE(0x1078),
80 INTEL_E1000_ETHERNET_DEVICE(0x1079),
81 INTEL_E1000_ETHERNET_DEVICE(0x107A),
82 INTEL_E1000_ETHERNET_DEVICE(0x107B),
83 INTEL_E1000_ETHERNET_DEVICE(0x107C),
84 INTEL_E1000_ETHERNET_DEVICE(0x108A),
85 INTEL_E1000_ETHERNET_DEVICE(0x1099),
86 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
87 /* required last entry */
91 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
93 int e1000_up(struct e1000_adapter *adapter);
94 void e1000_down(struct e1000_adapter *adapter);
95 void e1000_reinit_locked(struct e1000_adapter *adapter);
96 void e1000_reset(struct e1000_adapter *adapter);
97 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
98 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
99 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
100 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
101 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
102 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
103 struct e1000_tx_ring *txdr);
104 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
105 struct e1000_rx_ring *rxdr);
106 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
107 struct e1000_tx_ring *tx_ring);
108 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
109 struct e1000_rx_ring *rx_ring);
110 void e1000_update_stats(struct e1000_adapter *adapter);
112 static int e1000_init_module(void);
113 static void e1000_exit_module(void);
114 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
115 static void __devexit e1000_remove(struct pci_dev *pdev);
116 static int e1000_alloc_queues(struct e1000_adapter *adapter);
117 static int e1000_sw_init(struct e1000_adapter *adapter);
118 static int e1000_open(struct net_device *netdev);
119 static int e1000_close(struct net_device *netdev);
120 static void e1000_configure_tx(struct e1000_adapter *adapter);
121 static void e1000_configure_rx(struct e1000_adapter *adapter);
122 static void e1000_setup_rctl(struct e1000_adapter *adapter);
123 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
124 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
125 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
126 struct e1000_tx_ring *tx_ring);
127 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
128 struct e1000_rx_ring *rx_ring);
129 static void e1000_set_multi(struct net_device *netdev);
130 static void e1000_update_phy_info(unsigned long data);
131 static void e1000_watchdog(unsigned long data);
132 static void e1000_82547_tx_fifo_stall(unsigned long data);
133 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
134 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
135 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
136 static int e1000_set_mac(struct net_device *netdev, void *p);
137 static irqreturn_t e1000_intr(int irq, void *data);
138 static irqreturn_t e1000_intr_msi(int irq, void *data);
139 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
140 struct e1000_tx_ring *tx_ring);
141 #ifdef CONFIG_E1000_NAPI
142 static int e1000_clean(struct napi_struct *napi, int budget);
143 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
144 struct e1000_rx_ring *rx_ring,
145 int *work_done, int work_to_do);
146 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring,
148 int *work_done, int work_to_do);
150 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring);
152 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
153 struct e1000_rx_ring *rx_ring);
155 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
156 struct e1000_rx_ring *rx_ring,
158 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
159 struct e1000_rx_ring *rx_ring,
161 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
162 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
164 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
165 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
166 static void e1000_tx_timeout(struct net_device *dev);
167 static void e1000_reset_task(struct work_struct *work);
168 static void e1000_smartspeed(struct e1000_adapter *adapter);
169 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
170 struct sk_buff *skb);
172 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
173 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
174 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
175 static void e1000_restore_vlan(struct e1000_adapter *adapter);
177 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
179 static int e1000_resume(struct pci_dev *pdev);
181 static void e1000_shutdown(struct pci_dev *pdev);
183 #ifdef CONFIG_NET_POLL_CONTROLLER
184 /* for netdump / net console */
185 static void e1000_netpoll (struct net_device *netdev);
188 #define COPYBREAK_DEFAULT 256
189 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
190 module_param(copybreak, uint, 0644);
191 MODULE_PARM_DESC(copybreak,
192 "Maximum size of packet that is copied to a new buffer on receive");
194 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
195 pci_channel_state_t state);
196 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
197 static void e1000_io_resume(struct pci_dev *pdev);
199 static struct pci_error_handlers e1000_err_handler = {
200 .error_detected = e1000_io_error_detected,
201 .slot_reset = e1000_io_slot_reset,
202 .resume = e1000_io_resume,
205 static struct pci_driver e1000_driver = {
206 .name = e1000_driver_name,
207 .id_table = e1000_pci_tbl,
208 .probe = e1000_probe,
209 .remove = __devexit_p(e1000_remove),
211 /* Power Managment Hooks */
212 .suspend = e1000_suspend,
213 .resume = e1000_resume,
215 .shutdown = e1000_shutdown,
216 .err_handler = &e1000_err_handler
219 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
220 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
221 MODULE_LICENSE("GPL");
222 MODULE_VERSION(DRV_VERSION);
224 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
225 module_param(debug, int, 0);
226 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
229 * e1000_init_module - Driver Registration Routine
231 * e1000_init_module is the first routine called when the driver is
232 * loaded. All it does is register with the PCI subsystem.
236 e1000_init_module(void)
239 printk(KERN_INFO "%s - version %s\n",
240 e1000_driver_string, e1000_driver_version);
242 printk(KERN_INFO "%s\n", e1000_copyright);
244 ret = pci_register_driver(&e1000_driver);
245 if (copybreak != COPYBREAK_DEFAULT) {
247 printk(KERN_INFO "e1000: copybreak disabled\n");
249 printk(KERN_INFO "e1000: copybreak enabled for "
250 "packets <= %u bytes\n", copybreak);
255 module_init(e1000_init_module);
258 * e1000_exit_module - Driver Exit Cleanup Routine
260 * e1000_exit_module is called just before the driver is removed
265 e1000_exit_module(void)
267 pci_unregister_driver(&e1000_driver);
270 module_exit(e1000_exit_module);
272 static int e1000_request_irq(struct e1000_adapter *adapter)
274 struct net_device *netdev = adapter->netdev;
275 void (*handler) = &e1000_intr;
276 int irq_flags = IRQF_SHARED;
279 if (adapter->hw.mac_type >= e1000_82571) {
280 adapter->have_msi = !pci_enable_msi(adapter->pdev);
281 if (adapter->have_msi) {
282 handler = &e1000_intr_msi;
287 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
290 if (adapter->have_msi)
291 pci_disable_msi(adapter->pdev);
293 "Unable to allocate interrupt Error: %d\n", err);
299 static void e1000_free_irq(struct e1000_adapter *adapter)
301 struct net_device *netdev = adapter->netdev;
303 free_irq(adapter->pdev->irq, netdev);
305 if (adapter->have_msi)
306 pci_disable_msi(adapter->pdev);
310 * e1000_irq_disable - Mask off interrupt generation on the NIC
311 * @adapter: board private structure
315 e1000_irq_disable(struct e1000_adapter *adapter)
317 atomic_inc(&adapter->irq_sem);
318 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
319 E1000_WRITE_FLUSH(&adapter->hw);
320 synchronize_irq(adapter->pdev->irq);
324 * e1000_irq_enable - Enable default interrupt generation settings
325 * @adapter: board private structure
329 e1000_irq_enable(struct e1000_adapter *adapter)
331 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
332 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
333 E1000_WRITE_FLUSH(&adapter->hw);
338 e1000_update_mng_vlan(struct e1000_adapter *adapter)
340 struct net_device *netdev = adapter->netdev;
341 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
342 uint16_t old_vid = adapter->mng_vlan_id;
343 if (adapter->vlgrp) {
344 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
345 if (adapter->hw.mng_cookie.status &
346 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
347 e1000_vlan_rx_add_vid(netdev, vid);
348 adapter->mng_vlan_id = vid;
350 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
352 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
354 !vlan_group_get_device(adapter->vlgrp, old_vid))
355 e1000_vlan_rx_kill_vid(netdev, old_vid);
357 adapter->mng_vlan_id = vid;
362 * e1000_release_hw_control - release control of the h/w to f/w
363 * @adapter: address of board private structure
365 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
366 * For ASF and Pass Through versions of f/w this means that the
367 * driver is no longer loaded. For AMT version (only with 82573) i
368 * of the f/w this means that the network i/f is closed.
373 e1000_release_hw_control(struct e1000_adapter *adapter)
378 /* Let firmware taken over control of h/w */
379 switch (adapter->hw.mac_type) {
381 swsm = E1000_READ_REG(&adapter->hw, SWSM);
382 E1000_WRITE_REG(&adapter->hw, SWSM,
383 swsm & ~E1000_SWSM_DRV_LOAD);
387 case e1000_80003es2lan:
389 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
390 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
391 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
399 * e1000_get_hw_control - get control of the h/w from f/w
400 * @adapter: address of board private structure
402 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
403 * For ASF and Pass Through versions of f/w this means that
404 * the driver is loaded. For AMT version (only with 82573)
405 * of the f/w this means that the network i/f is open.
410 e1000_get_hw_control(struct e1000_adapter *adapter)
415 /* Let firmware know the driver has taken over */
416 switch (adapter->hw.mac_type) {
418 swsm = E1000_READ_REG(&adapter->hw, SWSM);
419 E1000_WRITE_REG(&adapter->hw, SWSM,
420 swsm | E1000_SWSM_DRV_LOAD);
424 case e1000_80003es2lan:
426 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
427 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
428 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
436 e1000_init_manageability(struct e1000_adapter *adapter)
438 if (adapter->en_mng_pt) {
439 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
441 /* disable hardware interception of ARP */
442 manc &= ~(E1000_MANC_ARP_EN);
444 /* enable receiving management packets to the host */
445 /* this will probably generate destination unreachable messages
446 * from the host OS, but the packets will be handled on SMBUS */
447 if (adapter->hw.has_manc2h) {
448 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
450 manc |= E1000_MANC_EN_MNG2HOST;
451 #define E1000_MNG2HOST_PORT_623 (1 << 5)
452 #define E1000_MNG2HOST_PORT_664 (1 << 6)
453 manc2h |= E1000_MNG2HOST_PORT_623;
454 manc2h |= E1000_MNG2HOST_PORT_664;
455 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
458 E1000_WRITE_REG(&adapter->hw, MANC, manc);
463 e1000_release_manageability(struct e1000_adapter *adapter)
465 if (adapter->en_mng_pt) {
466 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
468 /* re-enable hardware interception of ARP */
469 manc |= E1000_MANC_ARP_EN;
471 if (adapter->hw.has_manc2h)
472 manc &= ~E1000_MANC_EN_MNG2HOST;
474 /* don't explicitly have to mess with MANC2H since
475 * MANC has an enable disable that gates MANC2H */
477 E1000_WRITE_REG(&adapter->hw, MANC, manc);
482 * e1000_configure - configure the hardware for RX and TX
483 * @adapter = private board structure
485 static void e1000_configure(struct e1000_adapter *adapter)
487 struct net_device *netdev = adapter->netdev;
490 e1000_set_multi(netdev);
492 e1000_restore_vlan(adapter);
493 e1000_init_manageability(adapter);
495 e1000_configure_tx(adapter);
496 e1000_setup_rctl(adapter);
497 e1000_configure_rx(adapter);
498 /* call E1000_DESC_UNUSED which always leaves
499 * at least 1 descriptor unused to make sure
500 * next_to_use != next_to_clean */
501 for (i = 0; i < adapter->num_rx_queues; i++) {
502 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
503 adapter->alloc_rx_buf(adapter, ring,
504 E1000_DESC_UNUSED(ring));
507 adapter->tx_queue_len = netdev->tx_queue_len;
510 int e1000_up(struct e1000_adapter *adapter)
512 /* hardware has been reset, we need to reload some things */
513 e1000_configure(adapter);
515 clear_bit(__E1000_DOWN, &adapter->flags);
517 #ifdef CONFIG_E1000_NAPI
518 napi_enable(&adapter->napi);
520 e1000_irq_enable(adapter);
522 /* fire a link change interrupt to start the watchdog */
523 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
528 * e1000_power_up_phy - restore link in case the phy was powered down
529 * @adapter: address of board private structure
531 * The phy may be powered down to save power and turn off link when the
532 * driver is unloaded and wake on lan is not enabled (among others)
533 * *** this routine MUST be followed by a call to e1000_reset ***
537 void e1000_power_up_phy(struct e1000_adapter *adapter)
539 uint16_t mii_reg = 0;
541 /* Just clear the power down bit to wake the phy back up */
542 if (adapter->hw.media_type == e1000_media_type_copper) {
543 /* according to the manual, the phy will retain its
544 * settings across a power-down/up cycle */
545 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
546 mii_reg &= ~MII_CR_POWER_DOWN;
547 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
551 static void e1000_power_down_phy(struct e1000_adapter *adapter)
553 /* Power down the PHY so no link is implied when interface is down *
554 * The PHY cannot be powered down if any of the following is TRUE *
557 * (c) SoL/IDER session is active */
558 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
559 adapter->hw.media_type == e1000_media_type_copper) {
560 uint16_t mii_reg = 0;
562 switch (adapter->hw.mac_type) {
565 case e1000_82545_rev_3:
567 case e1000_82546_rev_3:
569 case e1000_82541_rev_2:
571 case e1000_82547_rev_2:
572 if (E1000_READ_REG(&adapter->hw, MANC) &
579 case e1000_80003es2lan:
581 if (e1000_check_mng_mode(&adapter->hw) ||
582 e1000_check_phy_reset_block(&adapter->hw))
588 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
589 mii_reg |= MII_CR_POWER_DOWN;
590 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
598 e1000_down(struct e1000_adapter *adapter)
600 struct net_device *netdev = adapter->netdev;
602 /* signal that we're down so the interrupt handler does not
603 * reschedule our watchdog timer */
604 set_bit(__E1000_DOWN, &adapter->flags);
606 #ifdef CONFIG_E1000_NAPI
607 napi_disable(&adapter->napi);
608 atomic_set(&adapter->irq_sem, 0);
610 e1000_irq_disable(adapter);
612 del_timer_sync(&adapter->tx_fifo_stall_timer);
613 del_timer_sync(&adapter->watchdog_timer);
614 del_timer_sync(&adapter->phy_info_timer);
616 netdev->tx_queue_len = adapter->tx_queue_len;
617 adapter->link_speed = 0;
618 adapter->link_duplex = 0;
619 netif_carrier_off(netdev);
620 netif_stop_queue(netdev);
622 e1000_reset(adapter);
623 e1000_clean_all_tx_rings(adapter);
624 e1000_clean_all_rx_rings(adapter);
628 e1000_reinit_locked(struct e1000_adapter *adapter)
630 WARN_ON(in_interrupt());
631 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
635 clear_bit(__E1000_RESETTING, &adapter->flags);
639 e1000_reset(struct e1000_adapter *adapter)
641 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
642 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
643 boolean_t legacy_pba_adjust = FALSE;
645 /* Repartition Pba for greater than 9k mtu
646 * To take effect CTRL.RST is required.
649 switch (adapter->hw.mac_type) {
650 case e1000_82542_rev2_0:
651 case e1000_82542_rev2_1:
656 case e1000_82541_rev_2:
657 legacy_pba_adjust = TRUE;
661 case e1000_82545_rev_3:
663 case e1000_82546_rev_3:
667 case e1000_82547_rev_2:
668 legacy_pba_adjust = TRUE;
673 case e1000_80003es2lan:
681 case e1000_undefined:
686 if (legacy_pba_adjust == TRUE) {
687 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
688 pba -= 8; /* allocate more FIFO for Tx */
690 if (adapter->hw.mac_type == e1000_82547) {
691 adapter->tx_fifo_head = 0;
692 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
693 adapter->tx_fifo_size =
694 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
695 atomic_set(&adapter->tx_fifo_stall, 0);
697 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
698 /* adjust PBA for jumbo frames */
699 E1000_WRITE_REG(&adapter->hw, PBA, pba);
701 /* To maintain wire speed transmits, the Tx FIFO should be
702 * large enough to accomodate two full transmit packets,
703 * rounded up to the next 1KB and expressed in KB. Likewise,
704 * the Rx FIFO should be large enough to accomodate at least
705 * one full receive packet and is similarly rounded up and
706 * expressed in KB. */
707 pba = E1000_READ_REG(&adapter->hw, PBA);
708 /* upper 16 bits has Tx packet buffer allocation size in KB */
709 tx_space = pba >> 16;
710 /* lower 16 bits has Rx packet buffer allocation size in KB */
712 /* don't include ethernet FCS because hardware appends/strips */
713 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
715 min_tx_space = min_rx_space;
717 min_tx_space = ALIGN(min_tx_space, 1024);
719 min_rx_space = ALIGN(min_rx_space, 1024);
722 /* If current Tx allocation is less than the min Tx FIFO size,
723 * and the min Tx FIFO size is less than the current Rx FIFO
724 * allocation, take space away from current Rx allocation */
725 if (tx_space < min_tx_space &&
726 ((min_tx_space - tx_space) < pba)) {
727 pba = pba - (min_tx_space - tx_space);
729 /* PCI/PCIx hardware has PBA alignment constraints */
730 switch (adapter->hw.mac_type) {
731 case e1000_82545 ... e1000_82546_rev_3:
732 pba &= ~(E1000_PBA_8K - 1);
738 /* if short on rx space, rx wins and must trump tx
739 * adjustment or use Early Receive if available */
740 if (pba < min_rx_space) {
741 switch (adapter->hw.mac_type) {
743 /* ERT enabled in e1000_configure_rx */
753 E1000_WRITE_REG(&adapter->hw, PBA, pba);
755 /* flow control settings */
756 /* Set the FC high water mark to 90% of the FIFO size.
757 * Required to clear last 3 LSB */
758 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
759 /* We can't use 90% on small FIFOs because the remainder
760 * would be less than 1 full frame. In this case, we size
761 * it to allow at least a full frame above the high water
763 if (pba < E1000_PBA_16K)
764 fc_high_water_mark = (pba * 1024) - 1600;
766 adapter->hw.fc_high_water = fc_high_water_mark;
767 adapter->hw.fc_low_water = fc_high_water_mark - 8;
768 if (adapter->hw.mac_type == e1000_80003es2lan)
769 adapter->hw.fc_pause_time = 0xFFFF;
771 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
772 adapter->hw.fc_send_xon = 1;
773 adapter->hw.fc = adapter->hw.original_fc;
775 /* Allow time for pending master requests to run */
776 e1000_reset_hw(&adapter->hw);
777 if (adapter->hw.mac_type >= e1000_82544)
778 E1000_WRITE_REG(&adapter->hw, WUC, 0);
780 if (e1000_init_hw(&adapter->hw))
781 DPRINTK(PROBE, ERR, "Hardware Error\n");
782 e1000_update_mng_vlan(adapter);
784 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
785 if (adapter->hw.mac_type >= e1000_82544 &&
786 adapter->hw.mac_type <= e1000_82547_rev_2 &&
787 adapter->hw.autoneg == 1 &&
788 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
789 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
790 /* clear phy power management bit if we are in gig only mode,
791 * which if enabled will attempt negotiation to 100Mb, which
792 * can cause a loss of link at power off or driver unload */
793 ctrl &= ~E1000_CTRL_SWDPIN3;
794 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
797 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
798 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
800 e1000_reset_adaptive(&adapter->hw);
801 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
803 if (!adapter->smart_power_down &&
804 (adapter->hw.mac_type == e1000_82571 ||
805 adapter->hw.mac_type == e1000_82572)) {
806 uint16_t phy_data = 0;
807 /* speed up time to link by disabling smart power down, ignore
808 * the return value of this function because there is nothing
809 * different we would do if it failed */
810 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
812 phy_data &= ~IGP02E1000_PM_SPD;
813 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
817 e1000_release_manageability(adapter);
821 * e1000_probe - Device Initialization Routine
822 * @pdev: PCI device information struct
823 * @ent: entry in e1000_pci_tbl
825 * Returns 0 on success, negative on failure
827 * e1000_probe initializes an adapter identified by a pci_dev structure.
828 * The OS initialization, configuring of the adapter private structure,
829 * and a hardware reset occur.
833 e1000_probe(struct pci_dev *pdev,
834 const struct pci_device_id *ent)
836 struct net_device *netdev;
837 struct e1000_adapter *adapter;
838 unsigned long mmio_start, mmio_len;
839 unsigned long flash_start, flash_len;
841 static int cards_found = 0;
842 static int global_quad_port_a = 0; /* global ksp3 port a indication */
843 int i, err, pci_using_dac;
844 uint16_t eeprom_data = 0;
845 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
846 DECLARE_MAC_BUF(mac);
848 if ((err = pci_enable_device(pdev)))
851 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
852 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
855 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
856 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
857 E1000_ERR("No usable DMA configuration, aborting\n");
863 if ((err = pci_request_regions(pdev, e1000_driver_name)))
866 pci_set_master(pdev);
869 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
871 goto err_alloc_etherdev;
873 SET_NETDEV_DEV(netdev, &pdev->dev);
875 pci_set_drvdata(pdev, netdev);
876 adapter = netdev_priv(netdev);
877 adapter->netdev = netdev;
878 adapter->pdev = pdev;
879 adapter->hw.back = adapter;
880 adapter->msg_enable = (1 << debug) - 1;
882 mmio_start = pci_resource_start(pdev, BAR_0);
883 mmio_len = pci_resource_len(pdev, BAR_0);
886 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
887 if (!adapter->hw.hw_addr)
890 for (i = BAR_1; i <= BAR_5; i++) {
891 if (pci_resource_len(pdev, i) == 0)
893 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
894 adapter->hw.io_base = pci_resource_start(pdev, i);
899 netdev->open = &e1000_open;
900 netdev->stop = &e1000_close;
901 netdev->hard_start_xmit = &e1000_xmit_frame;
902 netdev->get_stats = &e1000_get_stats;
903 netdev->set_multicast_list = &e1000_set_multi;
904 netdev->set_mac_address = &e1000_set_mac;
905 netdev->change_mtu = &e1000_change_mtu;
906 netdev->do_ioctl = &e1000_ioctl;
907 e1000_set_ethtool_ops(netdev);
908 netdev->tx_timeout = &e1000_tx_timeout;
909 netdev->watchdog_timeo = 5 * HZ;
910 #ifdef CONFIG_E1000_NAPI
911 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
913 netdev->vlan_rx_register = e1000_vlan_rx_register;
914 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
915 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
916 #ifdef CONFIG_NET_POLL_CONTROLLER
917 netdev->poll_controller = e1000_netpoll;
919 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
921 netdev->mem_start = mmio_start;
922 netdev->mem_end = mmio_start + mmio_len;
923 netdev->base_addr = adapter->hw.io_base;
925 adapter->bd_number = cards_found;
927 /* setup the private structure */
929 if ((err = e1000_sw_init(adapter)))
933 /* Flash BAR mapping must happen after e1000_sw_init
934 * because it depends on mac_type */
935 if ((adapter->hw.mac_type == e1000_ich8lan) &&
936 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
937 flash_start = pci_resource_start(pdev, 1);
938 flash_len = pci_resource_len(pdev, 1);
939 adapter->hw.flash_address = ioremap(flash_start, flash_len);
940 if (!adapter->hw.flash_address)
944 if (e1000_check_phy_reset_block(&adapter->hw))
945 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
947 if (adapter->hw.mac_type >= e1000_82543) {
948 netdev->features = NETIF_F_SG |
952 NETIF_F_HW_VLAN_FILTER;
953 if (adapter->hw.mac_type == e1000_ich8lan)
954 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
957 if ((adapter->hw.mac_type >= e1000_82544) &&
958 (adapter->hw.mac_type != e1000_82547))
959 netdev->features |= NETIF_F_TSO;
961 if (adapter->hw.mac_type > e1000_82547_rev_2)
962 netdev->features |= NETIF_F_TSO6;
964 netdev->features |= NETIF_F_HIGHDMA;
966 netdev->features |= NETIF_F_LLTX;
968 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
970 /* initialize eeprom parameters */
972 if (e1000_init_eeprom_params(&adapter->hw)) {
973 E1000_ERR("EEPROM initialization failed\n");
977 /* before reading the EEPROM, reset the controller to
978 * put the device in a known good starting state */
980 e1000_reset_hw(&adapter->hw);
982 /* make sure the EEPROM is good */
984 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
985 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
989 /* copy the MAC address out of the EEPROM */
991 if (e1000_read_mac_addr(&adapter->hw))
992 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
993 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
994 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
996 if (!is_valid_ether_addr(netdev->perm_addr)) {
997 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1001 e1000_get_bus_info(&adapter->hw);
1003 init_timer(&adapter->tx_fifo_stall_timer);
1004 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1005 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1007 init_timer(&adapter->watchdog_timer);
1008 adapter->watchdog_timer.function = &e1000_watchdog;
1009 adapter->watchdog_timer.data = (unsigned long) adapter;
1011 init_timer(&adapter->phy_info_timer);
1012 adapter->phy_info_timer.function = &e1000_update_phy_info;
1013 adapter->phy_info_timer.data = (unsigned long) adapter;
1015 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1017 e1000_check_options(adapter);
1019 /* Initial Wake on LAN setting
1020 * If APM wake is enabled in the EEPROM,
1021 * enable the ACPI Magic Packet filter
1024 switch (adapter->hw.mac_type) {
1025 case e1000_82542_rev2_0:
1026 case e1000_82542_rev2_1:
1030 e1000_read_eeprom(&adapter->hw,
1031 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1032 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1035 e1000_read_eeprom(&adapter->hw,
1036 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1037 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1040 case e1000_82546_rev_3:
1042 case e1000_80003es2lan:
1043 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1044 e1000_read_eeprom(&adapter->hw,
1045 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1050 e1000_read_eeprom(&adapter->hw,
1051 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1054 if (eeprom_data & eeprom_apme_mask)
1055 adapter->eeprom_wol |= E1000_WUFC_MAG;
1057 /* now that we have the eeprom settings, apply the special cases
1058 * where the eeprom may be wrong or the board simply won't support
1059 * wake on lan on a particular port */
1060 switch (pdev->device) {
1061 case E1000_DEV_ID_82546GB_PCIE:
1062 adapter->eeprom_wol = 0;
1064 case E1000_DEV_ID_82546EB_FIBER:
1065 case E1000_DEV_ID_82546GB_FIBER:
1066 case E1000_DEV_ID_82571EB_FIBER:
1067 /* Wake events only supported on port A for dual fiber
1068 * regardless of eeprom setting */
1069 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1070 adapter->eeprom_wol = 0;
1072 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1073 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1074 case E1000_DEV_ID_82571EB_QUAD_FIBER:
1075 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1076 case E1000_DEV_ID_82571PT_QUAD_COPPER:
1077 /* if quad port adapter, disable WoL on all but port A */
1078 if (global_quad_port_a != 0)
1079 adapter->eeprom_wol = 0;
1081 adapter->quad_port_a = 1;
1082 /* Reset for multiple quad port adapters */
1083 if (++global_quad_port_a == 4)
1084 global_quad_port_a = 0;
1088 /* initialize the wol settings based on the eeprom settings */
1089 adapter->wol = adapter->eeprom_wol;
1091 /* print bus type/speed/width info */
1093 struct e1000_hw *hw = &adapter->hw;
1094 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1095 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1096 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1097 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1098 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1099 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1100 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1101 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1102 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1103 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1104 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1108 printk("%s\n", print_mac(mac, netdev->dev_addr));
1110 /* reset the hardware with the new settings */
1111 e1000_reset(adapter);
1113 /* If the controller is 82573 and f/w is AMT, do not set
1114 * DRV_LOAD until the interface is up. For all other cases,
1115 * let the f/w know that the h/w is now under the control
1117 if (adapter->hw.mac_type != e1000_82573 ||
1118 !e1000_check_mng_mode(&adapter->hw))
1119 e1000_get_hw_control(adapter);
1121 /* tell the stack to leave us alone until e1000_open() is called */
1122 netif_carrier_off(netdev);
1123 netif_stop_queue(netdev);
1125 strcpy(netdev->name, "eth%d");
1126 if ((err = register_netdev(netdev)))
1129 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1135 e1000_release_hw_control(adapter);
1137 if (!e1000_check_phy_reset_block(&adapter->hw))
1138 e1000_phy_hw_reset(&adapter->hw);
1140 if (adapter->hw.flash_address)
1141 iounmap(adapter->hw.flash_address);
1143 #ifdef CONFIG_E1000_NAPI
1144 for (i = 0; i < adapter->num_rx_queues; i++)
1145 dev_put(&adapter->polling_netdev[i]);
1148 kfree(adapter->tx_ring);
1149 kfree(adapter->rx_ring);
1150 #ifdef CONFIG_E1000_NAPI
1151 kfree(adapter->polling_netdev);
1154 iounmap(adapter->hw.hw_addr);
1156 free_netdev(netdev);
1158 pci_release_regions(pdev);
1161 pci_disable_device(pdev);
1166 * e1000_remove - Device Removal Routine
1167 * @pdev: PCI device information struct
1169 * e1000_remove is called by the PCI subsystem to alert the driver
1170 * that it should release a PCI device. The could be caused by a
1171 * Hot-Plug event, or because the driver is going to be removed from
1175 static void __devexit
1176 e1000_remove(struct pci_dev *pdev)
1178 struct net_device *netdev = pci_get_drvdata(pdev);
1179 struct e1000_adapter *adapter = netdev_priv(netdev);
1180 #ifdef CONFIG_E1000_NAPI
1184 cancel_work_sync(&adapter->reset_task);
1186 e1000_release_manageability(adapter);
1188 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1189 * would have already happened in close and is redundant. */
1190 e1000_release_hw_control(adapter);
1192 #ifdef CONFIG_E1000_NAPI
1193 for (i = 0; i < adapter->num_rx_queues; i++)
1194 dev_put(&adapter->polling_netdev[i]);
1197 unregister_netdev(netdev);
1199 if (!e1000_check_phy_reset_block(&adapter->hw))
1200 e1000_phy_hw_reset(&adapter->hw);
1202 kfree(adapter->tx_ring);
1203 kfree(adapter->rx_ring);
1204 #ifdef CONFIG_E1000_NAPI
1205 kfree(adapter->polling_netdev);
1208 iounmap(adapter->hw.hw_addr);
1209 if (adapter->hw.flash_address)
1210 iounmap(adapter->hw.flash_address);
1211 pci_release_regions(pdev);
1213 free_netdev(netdev);
1215 pci_disable_device(pdev);
1219 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1220 * @adapter: board private structure to initialize
1222 * e1000_sw_init initializes the Adapter private data structure.
1223 * Fields are initialized based on PCI device information and
1224 * OS network device settings (MTU size).
1227 static int __devinit
1228 e1000_sw_init(struct e1000_adapter *adapter)
1230 struct e1000_hw *hw = &adapter->hw;
1231 struct net_device *netdev = adapter->netdev;
1232 struct pci_dev *pdev = adapter->pdev;
1233 #ifdef CONFIG_E1000_NAPI
1237 /* PCI config space info */
1239 hw->vendor_id = pdev->vendor;
1240 hw->device_id = pdev->device;
1241 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1242 hw->subsystem_id = pdev->subsystem_device;
1243 hw->revision_id = pdev->revision;
1245 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1247 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1248 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1249 hw->max_frame_size = netdev->mtu +
1250 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1251 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1253 /* identify the MAC */
1255 if (e1000_set_mac_type(hw)) {
1256 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1260 switch (hw->mac_type) {
1265 case e1000_82541_rev_2:
1266 case e1000_82547_rev_2:
1267 hw->phy_init_script = 1;
1271 e1000_set_media_type(hw);
1273 hw->wait_autoneg_complete = FALSE;
1274 hw->tbi_compatibility_en = TRUE;
1275 hw->adaptive_ifs = TRUE;
1277 /* Copper options */
1279 if (hw->media_type == e1000_media_type_copper) {
1280 hw->mdix = AUTO_ALL_MODES;
1281 hw->disable_polarity_correction = FALSE;
1282 hw->master_slave = E1000_MASTER_SLAVE;
1285 adapter->num_tx_queues = 1;
1286 adapter->num_rx_queues = 1;
1288 if (e1000_alloc_queues(adapter)) {
1289 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1293 #ifdef CONFIG_E1000_NAPI
1294 for (i = 0; i < adapter->num_rx_queues; i++) {
1295 adapter->polling_netdev[i].priv = adapter;
1296 dev_hold(&adapter->polling_netdev[i]);
1297 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1299 spin_lock_init(&adapter->tx_queue_lock);
1302 /* Explicitly disable IRQ since the NIC can be in any state. */
1303 atomic_set(&adapter->irq_sem, 0);
1304 e1000_irq_disable(adapter);
1306 spin_lock_init(&adapter->stats_lock);
1308 set_bit(__E1000_DOWN, &adapter->flags);
1314 * e1000_alloc_queues - Allocate memory for all rings
1315 * @adapter: board private structure to initialize
1317 * We allocate one ring per queue at run-time since we don't know the
1318 * number of queues at compile-time. The polling_netdev array is
1319 * intended for Multiqueue, but should work fine with a single queue.
1322 static int __devinit
1323 e1000_alloc_queues(struct e1000_adapter *adapter)
1325 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1326 sizeof(struct e1000_tx_ring), GFP_KERNEL);
1327 if (!adapter->tx_ring)
1330 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1331 sizeof(struct e1000_rx_ring), GFP_KERNEL);
1332 if (!adapter->rx_ring) {
1333 kfree(adapter->tx_ring);
1337 #ifdef CONFIG_E1000_NAPI
1338 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1339 sizeof(struct net_device),
1341 if (!adapter->polling_netdev) {
1342 kfree(adapter->tx_ring);
1343 kfree(adapter->rx_ring);
1348 return E1000_SUCCESS;
1352 * e1000_open - Called when a network interface is made active
1353 * @netdev: network interface device structure
1355 * Returns 0 on success, negative value on failure
1357 * The open entry point is called when a network interface is made
1358 * active by the system (IFF_UP). At this point all resources needed
1359 * for transmit and receive operations are allocated, the interrupt
1360 * handler is registered with the OS, the watchdog timer is started,
1361 * and the stack is notified that the interface is ready.
1365 e1000_open(struct net_device *netdev)
1367 struct e1000_adapter *adapter = netdev_priv(netdev);
1370 /* disallow open during test */
1371 if (test_bit(__E1000_TESTING, &adapter->flags))
1374 /* allocate transmit descriptors */
1375 err = e1000_setup_all_tx_resources(adapter);
1379 /* allocate receive descriptors */
1380 err = e1000_setup_all_rx_resources(adapter);
1384 e1000_power_up_phy(adapter);
1386 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1387 if ((adapter->hw.mng_cookie.status &
1388 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1389 e1000_update_mng_vlan(adapter);
1392 /* If AMT is enabled, let the firmware know that the network
1393 * interface is now open */
1394 if (adapter->hw.mac_type == e1000_82573 &&
1395 e1000_check_mng_mode(&adapter->hw))
1396 e1000_get_hw_control(adapter);
1398 /* before we allocate an interrupt, we must be ready to handle it.
1399 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1400 * as soon as we call pci_request_irq, so we have to setup our
1401 * clean_rx handler before we do so. */
1402 e1000_configure(adapter);
1404 err = e1000_request_irq(adapter);
1408 /* From here on the code is the same as e1000_up() */
1409 clear_bit(__E1000_DOWN, &adapter->flags);
1411 #ifdef CONFIG_E1000_NAPI
1412 napi_enable(&adapter->napi);
1415 e1000_irq_enable(adapter);
1417 /* fire a link status change interrupt to start the watchdog */
1418 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1420 return E1000_SUCCESS;
1423 e1000_release_hw_control(adapter);
1424 e1000_power_down_phy(adapter);
1425 e1000_free_all_rx_resources(adapter);
1427 e1000_free_all_tx_resources(adapter);
1429 e1000_reset(adapter);
1435 * e1000_close - Disables a network interface
1436 * @netdev: network interface device structure
1438 * Returns 0, this is not allowed to fail
1440 * The close entry point is called when an interface is de-activated
1441 * by the OS. The hardware is still under the drivers control, but
1442 * needs to be disabled. A global MAC reset is issued to stop the
1443 * hardware, and all transmit and receive resources are freed.
1447 e1000_close(struct net_device *netdev)
1449 struct e1000_adapter *adapter = netdev_priv(netdev);
1451 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1452 e1000_down(adapter);
1453 e1000_power_down_phy(adapter);
1454 e1000_free_irq(adapter);
1456 e1000_free_all_tx_resources(adapter);
1457 e1000_free_all_rx_resources(adapter);
1459 /* kill manageability vlan ID if supported, but not if a vlan with
1460 * the same ID is registered on the host OS (let 8021q kill it) */
1461 if ((adapter->hw.mng_cookie.status &
1462 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1464 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1465 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1468 /* If AMT is enabled, let the firmware know that the network
1469 * interface is now closed */
1470 if (adapter->hw.mac_type == e1000_82573 &&
1471 e1000_check_mng_mode(&adapter->hw))
1472 e1000_release_hw_control(adapter);
1478 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1479 * @adapter: address of board private structure
1480 * @start: address of beginning of memory
1481 * @len: length of memory
1484 e1000_check_64k_bound(struct e1000_adapter *adapter,
1485 void *start, unsigned long len)
1487 unsigned long begin = (unsigned long) start;
1488 unsigned long end = begin + len;
1490 /* First rev 82545 and 82546 need to not allow any memory
1491 * write location to cross 64k boundary due to errata 23 */
1492 if (adapter->hw.mac_type == e1000_82545 ||
1493 adapter->hw.mac_type == e1000_82546) {
1494 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1501 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1502 * @adapter: board private structure
1503 * @txdr: tx descriptor ring (for a specific queue) to setup
1505 * Return 0 on success, negative on failure
1509 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1510 struct e1000_tx_ring *txdr)
1512 struct pci_dev *pdev = adapter->pdev;
1515 size = sizeof(struct e1000_buffer) * txdr->count;
1516 txdr->buffer_info = vmalloc(size);
1517 if (!txdr->buffer_info) {
1519 "Unable to allocate memory for the transmit descriptor ring\n");
1522 memset(txdr->buffer_info, 0, size);
1524 /* round up to nearest 4K */
1526 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1527 txdr->size = ALIGN(txdr->size, 4096);
1529 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1532 vfree(txdr->buffer_info);
1534 "Unable to allocate memory for the transmit descriptor ring\n");
1538 /* Fix for errata 23, can't cross 64kB boundary */
1539 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1540 void *olddesc = txdr->desc;
1541 dma_addr_t olddma = txdr->dma;
1542 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1543 "at %p\n", txdr->size, txdr->desc);
1544 /* Try again, without freeing the previous */
1545 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1546 /* Failed allocation, critical failure */
1548 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1549 goto setup_tx_desc_die;
1552 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1554 pci_free_consistent(pdev, txdr->size, txdr->desc,
1556 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1558 "Unable to allocate aligned memory "
1559 "for the transmit descriptor ring\n");
1560 vfree(txdr->buffer_info);
1563 /* Free old allocation, new allocation was successful */
1564 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1567 memset(txdr->desc, 0, txdr->size);
1569 txdr->next_to_use = 0;
1570 txdr->next_to_clean = 0;
1571 spin_lock_init(&txdr->tx_lock);
1577 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1578 * (Descriptors) for all queues
1579 * @adapter: board private structure
1581 * Return 0 on success, negative on failure
1585 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1589 for (i = 0; i < adapter->num_tx_queues; i++) {
1590 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1593 "Allocation for Tx Queue %u failed\n", i);
1594 for (i-- ; i >= 0; i--)
1595 e1000_free_tx_resources(adapter,
1596 &adapter->tx_ring[i]);
1605 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1606 * @adapter: board private structure
1608 * Configure the Tx unit of the MAC after a reset.
1612 e1000_configure_tx(struct e1000_adapter *adapter)
1615 struct e1000_hw *hw = &adapter->hw;
1616 uint32_t tdlen, tctl, tipg, tarc;
1617 uint32_t ipgr1, ipgr2;
1619 /* Setup the HW Tx Head and Tail descriptor pointers */
1621 switch (adapter->num_tx_queues) {
1624 tdba = adapter->tx_ring[0].dma;
1625 tdlen = adapter->tx_ring[0].count *
1626 sizeof(struct e1000_tx_desc);
1627 E1000_WRITE_REG(hw, TDLEN, tdlen);
1628 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1629 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1630 E1000_WRITE_REG(hw, TDT, 0);
1631 E1000_WRITE_REG(hw, TDH, 0);
1632 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1633 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1637 /* Set the default values for the Tx Inter Packet Gap timer */
1638 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1639 (hw->media_type == e1000_media_type_fiber ||
1640 hw->media_type == e1000_media_type_internal_serdes))
1641 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1643 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1645 switch (hw->mac_type) {
1646 case e1000_82542_rev2_0:
1647 case e1000_82542_rev2_1:
1648 tipg = DEFAULT_82542_TIPG_IPGT;
1649 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1650 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1652 case e1000_80003es2lan:
1653 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1654 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1657 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1658 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1661 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1662 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1663 E1000_WRITE_REG(hw, TIPG, tipg);
1665 /* Set the Tx Interrupt Delay register */
1667 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1668 if (hw->mac_type >= e1000_82540)
1669 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1671 /* Program the Transmit Control Register */
1673 tctl = E1000_READ_REG(hw, TCTL);
1674 tctl &= ~E1000_TCTL_CT;
1675 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1676 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1678 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1679 tarc = E1000_READ_REG(hw, TARC0);
1680 /* set the speed mode bit, we'll clear it if we're not at
1681 * gigabit link later */
1683 E1000_WRITE_REG(hw, TARC0, tarc);
1684 } else if (hw->mac_type == e1000_80003es2lan) {
1685 tarc = E1000_READ_REG(hw, TARC0);
1687 E1000_WRITE_REG(hw, TARC0, tarc);
1688 tarc = E1000_READ_REG(hw, TARC1);
1690 E1000_WRITE_REG(hw, TARC1, tarc);
1693 e1000_config_collision_dist(hw);
1695 /* Setup Transmit Descriptor Settings for eop descriptor */
1696 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1698 /* only set IDE if we are delaying interrupts using the timers */
1699 if (adapter->tx_int_delay)
1700 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1702 if (hw->mac_type < e1000_82543)
1703 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1705 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1707 /* Cache if we're 82544 running in PCI-X because we'll
1708 * need this to apply a workaround later in the send path. */
1709 if (hw->mac_type == e1000_82544 &&
1710 hw->bus_type == e1000_bus_type_pcix)
1711 adapter->pcix_82544 = 1;
1713 E1000_WRITE_REG(hw, TCTL, tctl);
1718 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1719 * @adapter: board private structure
1720 * @rxdr: rx descriptor ring (for a specific queue) to setup
1722 * Returns 0 on success, negative on failure
1726 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1727 struct e1000_rx_ring *rxdr)
1729 struct pci_dev *pdev = adapter->pdev;
1732 size = sizeof(struct e1000_buffer) * rxdr->count;
1733 rxdr->buffer_info = vmalloc(size);
1734 if (!rxdr->buffer_info) {
1736 "Unable to allocate memory for the receive descriptor ring\n");
1739 memset(rxdr->buffer_info, 0, size);
1741 rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
1743 if (!rxdr->ps_page) {
1744 vfree(rxdr->buffer_info);
1746 "Unable to allocate memory for the receive descriptor ring\n");
1750 rxdr->ps_page_dma = kcalloc(rxdr->count,
1751 sizeof(struct e1000_ps_page_dma),
1753 if (!rxdr->ps_page_dma) {
1754 vfree(rxdr->buffer_info);
1755 kfree(rxdr->ps_page);
1757 "Unable to allocate memory for the receive descriptor ring\n");
1761 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1762 desc_len = sizeof(struct e1000_rx_desc);
1764 desc_len = sizeof(union e1000_rx_desc_packet_split);
1766 /* Round up to nearest 4K */
1768 rxdr->size = rxdr->count * desc_len;
1769 rxdr->size = ALIGN(rxdr->size, 4096);
1771 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1775 "Unable to allocate memory for the receive descriptor ring\n");
1777 vfree(rxdr->buffer_info);
1778 kfree(rxdr->ps_page);
1779 kfree(rxdr->ps_page_dma);
1783 /* Fix for errata 23, can't cross 64kB boundary */
1784 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1785 void *olddesc = rxdr->desc;
1786 dma_addr_t olddma = rxdr->dma;
1787 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1788 "at %p\n", rxdr->size, rxdr->desc);
1789 /* Try again, without freeing the previous */
1790 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1791 /* Failed allocation, critical failure */
1793 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1795 "Unable to allocate memory "
1796 "for the receive descriptor ring\n");
1797 goto setup_rx_desc_die;
1800 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1802 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1804 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1806 "Unable to allocate aligned memory "
1807 "for the receive descriptor ring\n");
1808 goto setup_rx_desc_die;
1810 /* Free old allocation, new allocation was successful */
1811 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1814 memset(rxdr->desc, 0, rxdr->size);
1816 rxdr->next_to_clean = 0;
1817 rxdr->next_to_use = 0;
1823 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1824 * (Descriptors) for all queues
1825 * @adapter: board private structure
1827 * Return 0 on success, negative on failure
1831 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1835 for (i = 0; i < adapter->num_rx_queues; i++) {
1836 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1839 "Allocation for Rx Queue %u failed\n", i);
1840 for (i-- ; i >= 0; i--)
1841 e1000_free_rx_resources(adapter,
1842 &adapter->rx_ring[i]);
1851 * e1000_setup_rctl - configure the receive control registers
1852 * @adapter: Board private structure
1854 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1855 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1857 e1000_setup_rctl(struct e1000_adapter *adapter)
1859 uint32_t rctl, rfctl;
1860 uint32_t psrctl = 0;
1861 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1865 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1867 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1869 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1870 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1871 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1873 if (adapter->hw.tbi_compatibility_on == 1)
1874 rctl |= E1000_RCTL_SBP;
1876 rctl &= ~E1000_RCTL_SBP;
1878 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1879 rctl &= ~E1000_RCTL_LPE;
1881 rctl |= E1000_RCTL_LPE;
1883 /* Setup buffer sizes */
1884 rctl &= ~E1000_RCTL_SZ_4096;
1885 rctl |= E1000_RCTL_BSEX;
1886 switch (adapter->rx_buffer_len) {
1887 case E1000_RXBUFFER_256:
1888 rctl |= E1000_RCTL_SZ_256;
1889 rctl &= ~E1000_RCTL_BSEX;
1891 case E1000_RXBUFFER_512:
1892 rctl |= E1000_RCTL_SZ_512;
1893 rctl &= ~E1000_RCTL_BSEX;
1895 case E1000_RXBUFFER_1024:
1896 rctl |= E1000_RCTL_SZ_1024;
1897 rctl &= ~E1000_RCTL_BSEX;
1899 case E1000_RXBUFFER_2048:
1901 rctl |= E1000_RCTL_SZ_2048;
1902 rctl &= ~E1000_RCTL_BSEX;
1904 case E1000_RXBUFFER_4096:
1905 rctl |= E1000_RCTL_SZ_4096;
1907 case E1000_RXBUFFER_8192:
1908 rctl |= E1000_RCTL_SZ_8192;
1910 case E1000_RXBUFFER_16384:
1911 rctl |= E1000_RCTL_SZ_16384;
1915 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1916 /* 82571 and greater support packet-split where the protocol
1917 * header is placed in skb->data and the packet data is
1918 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1919 * In the case of a non-split, skb->data is linearly filled,
1920 * followed by the page buffers. Therefore, skb->data is
1921 * sized to hold the largest protocol header.
1923 /* allocations using alloc_page take too long for regular MTU
1924 * so only enable packet split for jumbo frames */
1925 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1926 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1927 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1928 adapter->rx_ps_pages = pages;
1930 adapter->rx_ps_pages = 0;
1932 if (adapter->rx_ps_pages) {
1933 /* Configure extra packet-split registers */
1934 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1935 rfctl |= E1000_RFCTL_EXTEN;
1936 /* disable packet split support for IPv6 extension headers,
1937 * because some malformed IPv6 headers can hang the RX */
1938 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1939 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1941 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1943 rctl |= E1000_RCTL_DTYP_PS;
1945 psrctl |= adapter->rx_ps_bsize0 >>
1946 E1000_PSRCTL_BSIZE0_SHIFT;
1948 switch (adapter->rx_ps_pages) {
1950 psrctl |= PAGE_SIZE <<
1951 E1000_PSRCTL_BSIZE3_SHIFT;
1953 psrctl |= PAGE_SIZE <<
1954 E1000_PSRCTL_BSIZE2_SHIFT;
1956 psrctl |= PAGE_SIZE >>
1957 E1000_PSRCTL_BSIZE1_SHIFT;
1961 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1964 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1968 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1969 * @adapter: board private structure
1971 * Configure the Rx unit of the MAC after a reset.
1975 e1000_configure_rx(struct e1000_adapter *adapter)
1978 struct e1000_hw *hw = &adapter->hw;
1979 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1981 if (adapter->rx_ps_pages) {
1982 /* this is a 32 byte descriptor */
1983 rdlen = adapter->rx_ring[0].count *
1984 sizeof(union e1000_rx_desc_packet_split);
1985 adapter->clean_rx = e1000_clean_rx_irq_ps;
1986 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1988 rdlen = adapter->rx_ring[0].count *
1989 sizeof(struct e1000_rx_desc);
1990 adapter->clean_rx = e1000_clean_rx_irq;
1991 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1994 /* disable receives while setting up the descriptors */
1995 rctl = E1000_READ_REG(hw, RCTL);
1996 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1998 /* set the Receive Delay Timer Register */
1999 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2001 if (hw->mac_type >= e1000_82540) {
2002 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2003 if (adapter->itr_setting != 0)
2004 E1000_WRITE_REG(hw, ITR,
2005 1000000000 / (adapter->itr * 256));
2008 if (hw->mac_type >= e1000_82571) {
2009 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2010 /* Reset delay timers after every interrupt */
2011 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2012 #ifdef CONFIG_E1000_NAPI
2013 /* Auto-Mask interrupts upon ICR access */
2014 ctrl_ext |= E1000_CTRL_EXT_IAME;
2015 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2017 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2018 E1000_WRITE_FLUSH(hw);
2021 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2022 * the Base and Length of the Rx Descriptor Ring */
2023 switch (adapter->num_rx_queues) {
2026 rdba = adapter->rx_ring[0].dma;
2027 E1000_WRITE_REG(hw, RDLEN, rdlen);
2028 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2029 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2030 E1000_WRITE_REG(hw, RDT, 0);
2031 E1000_WRITE_REG(hw, RDH, 0);
2032 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2033 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2037 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2038 if (hw->mac_type >= e1000_82543) {
2039 rxcsum = E1000_READ_REG(hw, RXCSUM);
2040 if (adapter->rx_csum == TRUE) {
2041 rxcsum |= E1000_RXCSUM_TUOFL;
2043 /* Enable 82571 IPv4 payload checksum for UDP fragments
2044 * Must be used in conjunction with packet-split. */
2045 if ((hw->mac_type >= e1000_82571) &&
2046 (adapter->rx_ps_pages)) {
2047 rxcsum |= E1000_RXCSUM_IPPCSE;
2050 rxcsum &= ~E1000_RXCSUM_TUOFL;
2051 /* don't need to clear IPPCSE as it defaults to 0 */
2053 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2056 /* enable early receives on 82573, only takes effect if using > 2048
2057 * byte total frame size. for example only for jumbo frames */
2058 #define E1000_ERT_2048 0x100
2059 if (hw->mac_type == e1000_82573)
2060 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2062 /* Enable Receives */
2063 E1000_WRITE_REG(hw, RCTL, rctl);
2067 * e1000_free_tx_resources - Free Tx Resources per Queue
2068 * @adapter: board private structure
2069 * @tx_ring: Tx descriptor ring for a specific queue
2071 * Free all transmit software resources
2075 e1000_free_tx_resources(struct e1000_adapter *adapter,
2076 struct e1000_tx_ring *tx_ring)
2078 struct pci_dev *pdev = adapter->pdev;
2080 e1000_clean_tx_ring(adapter, tx_ring);
2082 vfree(tx_ring->buffer_info);
2083 tx_ring->buffer_info = NULL;
2085 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2087 tx_ring->desc = NULL;
2091 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2092 * @adapter: board private structure
2094 * Free all transmit software resources
2098 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2102 for (i = 0; i < adapter->num_tx_queues; i++)
2103 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2107 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2108 struct e1000_buffer *buffer_info)
2110 if (buffer_info->dma) {
2111 pci_unmap_page(adapter->pdev,
2113 buffer_info->length,
2115 buffer_info->dma = 0;
2117 if (buffer_info->skb) {
2118 dev_kfree_skb_any(buffer_info->skb);
2119 buffer_info->skb = NULL;
2121 /* buffer_info must be completely set up in the transmit path */
2125 * e1000_clean_tx_ring - Free Tx Buffers
2126 * @adapter: board private structure
2127 * @tx_ring: ring to be cleaned
2131 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2132 struct e1000_tx_ring *tx_ring)
2134 struct e1000_buffer *buffer_info;
2138 /* Free all the Tx ring sk_buffs */
2140 for (i = 0; i < tx_ring->count; i++) {
2141 buffer_info = &tx_ring->buffer_info[i];
2142 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2145 size = sizeof(struct e1000_buffer) * tx_ring->count;
2146 memset(tx_ring->buffer_info, 0, size);
2148 /* Zero out the descriptor ring */
2150 memset(tx_ring->desc, 0, tx_ring->size);
2152 tx_ring->next_to_use = 0;
2153 tx_ring->next_to_clean = 0;
2154 tx_ring->last_tx_tso = 0;
2156 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2157 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2161 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2162 * @adapter: board private structure
2166 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2170 for (i = 0; i < adapter->num_tx_queues; i++)
2171 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2175 * e1000_free_rx_resources - Free Rx Resources
2176 * @adapter: board private structure
2177 * @rx_ring: ring to clean the resources from
2179 * Free all receive software resources
2183 e1000_free_rx_resources(struct e1000_adapter *adapter,
2184 struct e1000_rx_ring *rx_ring)
2186 struct pci_dev *pdev = adapter->pdev;
2188 e1000_clean_rx_ring(adapter, rx_ring);
2190 vfree(rx_ring->buffer_info);
2191 rx_ring->buffer_info = NULL;
2192 kfree(rx_ring->ps_page);
2193 rx_ring->ps_page = NULL;
2194 kfree(rx_ring->ps_page_dma);
2195 rx_ring->ps_page_dma = NULL;
2197 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2199 rx_ring->desc = NULL;
2203 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2204 * @adapter: board private structure
2206 * Free all receive software resources
2210 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2214 for (i = 0; i < adapter->num_rx_queues; i++)
2215 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2219 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2220 * @adapter: board private structure
2221 * @rx_ring: ring to free buffers from
2225 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2226 struct e1000_rx_ring *rx_ring)
2228 struct e1000_buffer *buffer_info;
2229 struct e1000_ps_page *ps_page;
2230 struct e1000_ps_page_dma *ps_page_dma;
2231 struct pci_dev *pdev = adapter->pdev;
2235 /* Free all the Rx ring sk_buffs */
2236 for (i = 0; i < rx_ring->count; i++) {
2237 buffer_info = &rx_ring->buffer_info[i];
2238 if (buffer_info->skb) {
2239 pci_unmap_single(pdev,
2241 buffer_info->length,
2242 PCI_DMA_FROMDEVICE);
2244 dev_kfree_skb(buffer_info->skb);
2245 buffer_info->skb = NULL;
2247 ps_page = &rx_ring->ps_page[i];
2248 ps_page_dma = &rx_ring->ps_page_dma[i];
2249 for (j = 0; j < adapter->rx_ps_pages; j++) {
2250 if (!ps_page->ps_page[j]) break;
2251 pci_unmap_page(pdev,
2252 ps_page_dma->ps_page_dma[j],
2253 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2254 ps_page_dma->ps_page_dma[j] = 0;
2255 put_page(ps_page->ps_page[j]);
2256 ps_page->ps_page[j] = NULL;
2260 size = sizeof(struct e1000_buffer) * rx_ring->count;
2261 memset(rx_ring->buffer_info, 0, size);
2262 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2263 memset(rx_ring->ps_page, 0, size);
2264 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2265 memset(rx_ring->ps_page_dma, 0, size);
2267 /* Zero out the descriptor ring */
2269 memset(rx_ring->desc, 0, rx_ring->size);
2271 rx_ring->next_to_clean = 0;
2272 rx_ring->next_to_use = 0;
2274 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2275 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2279 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2280 * @adapter: board private structure
2284 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2288 for (i = 0; i < adapter->num_rx_queues; i++)
2289 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2292 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2293 * and memory write and invalidate disabled for certain operations
2296 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2298 struct net_device *netdev = adapter->netdev;
2301 e1000_pci_clear_mwi(&adapter->hw);
2303 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2304 rctl |= E1000_RCTL_RST;
2305 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2306 E1000_WRITE_FLUSH(&adapter->hw);
2309 if (netif_running(netdev))
2310 e1000_clean_all_rx_rings(adapter);
2314 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2316 struct net_device *netdev = adapter->netdev;
2319 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2320 rctl &= ~E1000_RCTL_RST;
2321 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2322 E1000_WRITE_FLUSH(&adapter->hw);
2325 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2326 e1000_pci_set_mwi(&adapter->hw);
2328 if (netif_running(netdev)) {
2329 /* No need to loop, because 82542 supports only 1 queue */
2330 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2331 e1000_configure_rx(adapter);
2332 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2337 * e1000_set_mac - Change the Ethernet Address of the NIC
2338 * @netdev: network interface device structure
2339 * @p: pointer to an address structure
2341 * Returns 0 on success, negative on failure
2345 e1000_set_mac(struct net_device *netdev, void *p)
2347 struct e1000_adapter *adapter = netdev_priv(netdev);
2348 struct sockaddr *addr = p;
2350 if (!is_valid_ether_addr(addr->sa_data))
2351 return -EADDRNOTAVAIL;
2353 /* 82542 2.0 needs to be in reset to write receive address registers */
2355 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2356 e1000_enter_82542_rst(adapter);
2358 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2359 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2361 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2363 /* With 82571 controllers, LAA may be overwritten (with the default)
2364 * due to controller reset from the other port. */
2365 if (adapter->hw.mac_type == e1000_82571) {
2366 /* activate the work around */
2367 adapter->hw.laa_is_present = 1;
2369 /* Hold a copy of the LAA in RAR[14] This is done so that
2370 * between the time RAR[0] gets clobbered and the time it
2371 * gets fixed (in e1000_watchdog), the actual LAA is in one
2372 * of the RARs and no incoming packets directed to this port
2373 * are dropped. Eventaully the LAA will be in RAR[0] and
2375 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2376 E1000_RAR_ENTRIES - 1);
2379 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2380 e1000_leave_82542_rst(adapter);
2386 * e1000_set_multi - Multicast and Promiscuous mode set
2387 * @netdev: network interface device structure
2389 * The set_multi entry point is called whenever the multicast address
2390 * list or the network interface flags are updated. This routine is
2391 * responsible for configuring the hardware for proper multicast,
2392 * promiscuous mode, and all-multi behavior.
2396 e1000_set_multi(struct net_device *netdev)
2398 struct e1000_adapter *adapter = netdev_priv(netdev);
2399 struct e1000_hw *hw = &adapter->hw;
2400 struct dev_mc_list *mc_ptr;
2402 uint32_t hash_value;
2403 int i, rar_entries = E1000_RAR_ENTRIES;
2404 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2405 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2406 E1000_NUM_MTA_REGISTERS;
2408 if (adapter->hw.mac_type == e1000_ich8lan)
2409 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2411 /* reserve RAR[14] for LAA over-write work-around */
2412 if (adapter->hw.mac_type == e1000_82571)
2415 /* Check for Promiscuous and All Multicast modes */
2417 rctl = E1000_READ_REG(hw, RCTL);
2419 if (netdev->flags & IFF_PROMISC) {
2420 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2421 } else if (netdev->flags & IFF_ALLMULTI) {
2422 rctl |= E1000_RCTL_MPE;
2423 rctl &= ~E1000_RCTL_UPE;
2425 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2428 E1000_WRITE_REG(hw, RCTL, rctl);
2430 /* 82542 2.0 needs to be in reset to write receive address registers */
2432 if (hw->mac_type == e1000_82542_rev2_0)
2433 e1000_enter_82542_rst(adapter);
2435 /* load the first 14 multicast address into the exact filters 1-14
2436 * RAR 0 is used for the station MAC adddress
2437 * if there are not 14 addresses, go ahead and clear the filters
2438 * -- with 82571 controllers only 0-13 entries are filled here
2440 mc_ptr = netdev->mc_list;
2442 for (i = 1; i < rar_entries; i++) {
2444 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2445 mc_ptr = mc_ptr->next;
2447 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2448 E1000_WRITE_FLUSH(hw);
2449 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2450 E1000_WRITE_FLUSH(hw);
2454 /* clear the old settings from the multicast hash table */
2456 for (i = 0; i < mta_reg_count; i++) {
2457 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2458 E1000_WRITE_FLUSH(hw);
2461 /* load any remaining addresses into the hash table */
2463 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2464 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2465 e1000_mta_set(hw, hash_value);
2468 if (hw->mac_type == e1000_82542_rev2_0)
2469 e1000_leave_82542_rst(adapter);
2472 /* Need to wait a few seconds after link up to get diagnostic information from
2476 e1000_update_phy_info(unsigned long data)
2478 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2479 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2483 * e1000_82547_tx_fifo_stall - Timer Call-back
2484 * @data: pointer to adapter cast into an unsigned long
2488 e1000_82547_tx_fifo_stall(unsigned long data)
2490 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2491 struct net_device *netdev = adapter->netdev;
2494 if (atomic_read(&adapter->tx_fifo_stall)) {
2495 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2496 E1000_READ_REG(&adapter->hw, TDH)) &&
2497 (E1000_READ_REG(&adapter->hw, TDFT) ==
2498 E1000_READ_REG(&adapter->hw, TDFH)) &&
2499 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2500 E1000_READ_REG(&adapter->hw, TDFHS))) {
2501 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2502 E1000_WRITE_REG(&adapter->hw, TCTL,
2503 tctl & ~E1000_TCTL_EN);
2504 E1000_WRITE_REG(&adapter->hw, TDFT,
2505 adapter->tx_head_addr);
2506 E1000_WRITE_REG(&adapter->hw, TDFH,
2507 adapter->tx_head_addr);
2508 E1000_WRITE_REG(&adapter->hw, TDFTS,
2509 adapter->tx_head_addr);
2510 E1000_WRITE_REG(&adapter->hw, TDFHS,
2511 adapter->tx_head_addr);
2512 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2513 E1000_WRITE_FLUSH(&adapter->hw);
2515 adapter->tx_fifo_head = 0;
2516 atomic_set(&adapter->tx_fifo_stall, 0);
2517 netif_wake_queue(netdev);
2519 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2525 * e1000_watchdog - Timer Call-back
2526 * @data: pointer to adapter cast into an unsigned long
2529 e1000_watchdog(unsigned long data)
2531 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2532 struct net_device *netdev = adapter->netdev;
2533 struct e1000_tx_ring *txdr = adapter->tx_ring;
2534 uint32_t link, tctl;
2537 ret_val = e1000_check_for_link(&adapter->hw);
2538 if ((ret_val == E1000_ERR_PHY) &&
2539 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2540 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2541 /* See e1000_kumeran_lock_loss_workaround() */
2543 "Gigabit has been disabled, downgrading speed\n");
2546 if (adapter->hw.mac_type == e1000_82573) {
2547 e1000_enable_tx_pkt_filtering(&adapter->hw);
2548 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2549 e1000_update_mng_vlan(adapter);
2552 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2553 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2554 link = !adapter->hw.serdes_link_down;
2556 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2559 if (!netif_carrier_ok(netdev)) {
2561 boolean_t txb2b = 1;
2562 e1000_get_speed_and_duplex(&adapter->hw,
2563 &adapter->link_speed,
2564 &adapter->link_duplex);
2566 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2567 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2568 "Flow Control: %s\n",
2569 adapter->link_speed,
2570 adapter->link_duplex == FULL_DUPLEX ?
2571 "Full Duplex" : "Half Duplex",
2572 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2573 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2574 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2575 E1000_CTRL_TFCE) ? "TX" : "None" )));
2577 /* tweak tx_queue_len according to speed/duplex
2578 * and adjust the timeout factor */
2579 netdev->tx_queue_len = adapter->tx_queue_len;
2580 adapter->tx_timeout_factor = 1;
2581 switch (adapter->link_speed) {
2584 netdev->tx_queue_len = 10;
2585 adapter->tx_timeout_factor = 8;
2589 netdev->tx_queue_len = 100;
2590 /* maybe add some timeout factor ? */
2594 if ((adapter->hw.mac_type == e1000_82571 ||
2595 adapter->hw.mac_type == e1000_82572) &&
2598 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2599 tarc0 &= ~(1 << 21);
2600 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2603 /* disable TSO for pcie and 10/100 speeds, to avoid
2604 * some hardware issues */
2605 if (!adapter->tso_force &&
2606 adapter->hw.bus_type == e1000_bus_type_pci_express){
2607 switch (adapter->link_speed) {
2611 "10/100 speed: disabling TSO\n");
2612 netdev->features &= ~NETIF_F_TSO;
2613 netdev->features &= ~NETIF_F_TSO6;
2616 netdev->features |= NETIF_F_TSO;
2617 netdev->features |= NETIF_F_TSO6;
2625 /* enable transmits in the hardware, need to do this
2626 * after setting TARC0 */
2627 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2628 tctl |= E1000_TCTL_EN;
2629 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2631 netif_carrier_on(netdev);
2632 netif_wake_queue(netdev);
2633 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2634 adapter->smartspeed = 0;
2636 /* make sure the receive unit is started */
2637 if (adapter->hw.rx_needs_kicking) {
2638 struct e1000_hw *hw = &adapter->hw;
2639 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2640 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2644 if (netif_carrier_ok(netdev)) {
2645 adapter->link_speed = 0;
2646 adapter->link_duplex = 0;
2647 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2648 netif_carrier_off(netdev);
2649 netif_stop_queue(netdev);
2650 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2652 /* 80003ES2LAN workaround--
2653 * For packet buffer work-around on link down event;
2654 * disable receives in the ISR and
2655 * reset device here in the watchdog
2657 if (adapter->hw.mac_type == e1000_80003es2lan)
2659 schedule_work(&adapter->reset_task);
2662 e1000_smartspeed(adapter);
2665 e1000_update_stats(adapter);
2667 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2668 adapter->tpt_old = adapter->stats.tpt;
2669 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2670 adapter->colc_old = adapter->stats.colc;
2672 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2673 adapter->gorcl_old = adapter->stats.gorcl;
2674 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2675 adapter->gotcl_old = adapter->stats.gotcl;
2677 e1000_update_adaptive(&adapter->hw);
2679 if (!netif_carrier_ok(netdev)) {
2680 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2681 /* We've lost link, so the controller stops DMA,
2682 * but we've got queued Tx work that's never going
2683 * to get done, so reset controller to flush Tx.
2684 * (Do the reset outside of interrupt context). */
2685 adapter->tx_timeout_count++;
2686 schedule_work(&adapter->reset_task);
2690 /* Cause software interrupt to ensure rx ring is cleaned */
2691 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2693 /* Force detection of hung controller every watchdog period */
2694 adapter->detect_tx_hung = TRUE;
2696 /* With 82571 controllers, LAA may be overwritten due to controller
2697 * reset from the other port. Set the appropriate LAA in RAR[0] */
2698 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2699 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2701 /* Reset the timer */
2702 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2705 enum latency_range {
2709 latency_invalid = 255
2713 * e1000_update_itr - update the dynamic ITR value based on statistics
2714 * Stores a new ITR value based on packets and byte
2715 * counts during the last interrupt. The advantage of per interrupt
2716 * computation is faster updates and more accurate ITR for the current
2717 * traffic pattern. Constants in this function were computed
2718 * based on theoretical maximum wire speed and thresholds were set based
2719 * on testing data as well as attempting to minimize response time
2720 * while increasing bulk throughput.
2721 * this functionality is controlled by the InterruptThrottleRate module
2722 * parameter (see e1000_param.c)
2723 * @adapter: pointer to adapter
2724 * @itr_setting: current adapter->itr
2725 * @packets: the number of packets during this measurement interval
2726 * @bytes: the number of bytes during this measurement interval
2728 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2729 uint16_t itr_setting,
2733 unsigned int retval = itr_setting;
2734 struct e1000_hw *hw = &adapter->hw;
2736 if (unlikely(hw->mac_type < e1000_82540))
2737 goto update_itr_done;
2740 goto update_itr_done;
2742 switch (itr_setting) {
2743 case lowest_latency:
2744 /* jumbo frames get bulk treatment*/
2745 if (bytes/packets > 8000)
2746 retval = bulk_latency;
2747 else if ((packets < 5) && (bytes > 512))
2748 retval = low_latency;
2750 case low_latency: /* 50 usec aka 20000 ints/s */
2751 if (bytes > 10000) {
2752 /* jumbo frames need bulk latency setting */
2753 if (bytes/packets > 8000)
2754 retval = bulk_latency;
2755 else if ((packets < 10) || ((bytes/packets) > 1200))
2756 retval = bulk_latency;
2757 else if ((packets > 35))
2758 retval = lowest_latency;
2759 } else if (bytes/packets > 2000)
2760 retval = bulk_latency;
2761 else if (packets <= 2 && bytes < 512)
2762 retval = lowest_latency;
2764 case bulk_latency: /* 250 usec aka 4000 ints/s */
2765 if (bytes > 25000) {
2767 retval = low_latency;
2768 } else if (bytes < 6000) {
2769 retval = low_latency;
2778 static void e1000_set_itr(struct e1000_adapter *adapter)
2780 struct e1000_hw *hw = &adapter->hw;
2781 uint16_t current_itr;
2782 uint32_t new_itr = adapter->itr;
2784 if (unlikely(hw->mac_type < e1000_82540))
2787 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2788 if (unlikely(adapter->link_speed != SPEED_1000)) {
2794 adapter->tx_itr = e1000_update_itr(adapter,
2796 adapter->total_tx_packets,
2797 adapter->total_tx_bytes);
2798 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2799 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2800 adapter->tx_itr = low_latency;
2802 adapter->rx_itr = e1000_update_itr(adapter,
2804 adapter->total_rx_packets,
2805 adapter->total_rx_bytes);
2806 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2807 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2808 adapter->rx_itr = low_latency;
2810 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2812 switch (current_itr) {
2813 /* counts and packets in update_itr are dependent on these numbers */
2814 case lowest_latency:
2818 new_itr = 20000; /* aka hwitr = ~200 */
2828 if (new_itr != adapter->itr) {
2829 /* this attempts to bias the interrupt rate towards Bulk
2830 * by adding intermediate steps when interrupt rate is
2832 new_itr = new_itr > adapter->itr ?
2833 min(adapter->itr + (new_itr >> 2), new_itr) :
2835 adapter->itr = new_itr;
2836 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2842 #define E1000_TX_FLAGS_CSUM 0x00000001
2843 #define E1000_TX_FLAGS_VLAN 0x00000002
2844 #define E1000_TX_FLAGS_TSO 0x00000004
2845 #define E1000_TX_FLAGS_IPV4 0x00000008
2846 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2847 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2850 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2851 struct sk_buff *skb)
2853 struct e1000_context_desc *context_desc;
2854 struct e1000_buffer *buffer_info;
2856 uint32_t cmd_length = 0;
2857 uint16_t ipcse = 0, tucse, mss;
2858 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2861 if (skb_is_gso(skb)) {
2862 if (skb_header_cloned(skb)) {
2863 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2868 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2869 mss = skb_shinfo(skb)->gso_size;
2870 if (skb->protocol == htons(ETH_P_IP)) {
2871 struct iphdr *iph = ip_hdr(skb);
2874 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2878 cmd_length = E1000_TXD_CMD_IP;
2879 ipcse = skb_transport_offset(skb) - 1;
2880 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2881 ipv6_hdr(skb)->payload_len = 0;
2882 tcp_hdr(skb)->check =
2883 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2884 &ipv6_hdr(skb)->daddr,
2888 ipcss = skb_network_offset(skb);
2889 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2890 tucss = skb_transport_offset(skb);
2891 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2894 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2895 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2897 i = tx_ring->next_to_use;
2898 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2899 buffer_info = &tx_ring->buffer_info[i];
2901 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2902 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2903 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2904 context_desc->upper_setup.tcp_fields.tucss = tucss;
2905 context_desc->upper_setup.tcp_fields.tucso = tucso;
2906 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2907 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2908 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2909 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2911 buffer_info->time_stamp = jiffies;
2912 buffer_info->next_to_watch = i;
2914 if (++i == tx_ring->count) i = 0;
2915 tx_ring->next_to_use = i;
2923 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2924 struct sk_buff *skb)
2926 struct e1000_context_desc *context_desc;
2927 struct e1000_buffer *buffer_info;
2931 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2932 css = skb_transport_offset(skb);
2934 i = tx_ring->next_to_use;
2935 buffer_info = &tx_ring->buffer_info[i];
2936 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2938 context_desc->lower_setup.ip_config = 0;
2939 context_desc->upper_setup.tcp_fields.tucss = css;
2940 context_desc->upper_setup.tcp_fields.tucso =
2941 css + skb->csum_offset;
2942 context_desc->upper_setup.tcp_fields.tucse = 0;
2943 context_desc->tcp_seg_setup.data = 0;
2944 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2946 buffer_info->time_stamp = jiffies;
2947 buffer_info->next_to_watch = i;
2949 if (unlikely(++i == tx_ring->count)) i = 0;
2950 tx_ring->next_to_use = i;
2958 #define E1000_MAX_TXD_PWR 12
2959 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2962 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2963 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2964 unsigned int nr_frags, unsigned int mss)
2966 struct e1000_buffer *buffer_info;
2967 unsigned int len = skb->len;
2968 unsigned int offset = 0, size, count = 0, i;
2970 len -= skb->data_len;
2972 i = tx_ring->next_to_use;
2975 buffer_info = &tx_ring->buffer_info[i];
2976 size = min(len, max_per_txd);
2977 /* Workaround for Controller erratum --
2978 * descriptor for non-tso packet in a linear SKB that follows a
2979 * tso gets written back prematurely before the data is fully
2980 * DMA'd to the controller */
2981 if (!skb->data_len && tx_ring->last_tx_tso &&
2983 tx_ring->last_tx_tso = 0;
2987 /* Workaround for premature desc write-backs
2988 * in TSO mode. Append 4-byte sentinel desc */
2989 if (unlikely(mss && !nr_frags && size == len && size > 8))
2991 /* work-around for errata 10 and it applies
2992 * to all controllers in PCI-X mode
2993 * The fix is to make sure that the first descriptor of a
2994 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2996 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2997 (size > 2015) && count == 0))
3000 /* Workaround for potential 82544 hang in PCI-X. Avoid
3001 * terminating buffers within evenly-aligned dwords. */
3002 if (unlikely(adapter->pcix_82544 &&
3003 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3007 buffer_info->length = size;
3009 pci_map_single(adapter->pdev,
3013 buffer_info->time_stamp = jiffies;
3014 buffer_info->next_to_watch = i;
3019 if (unlikely(++i == tx_ring->count)) i = 0;
3022 for (f = 0; f < nr_frags; f++) {
3023 struct skb_frag_struct *frag;
3025 frag = &skb_shinfo(skb)->frags[f];
3027 offset = frag->page_offset;
3030 buffer_info = &tx_ring->buffer_info[i];
3031 size = min(len, max_per_txd);
3032 /* Workaround for premature desc write-backs
3033 * in TSO mode. Append 4-byte sentinel desc */
3034 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3036 /* Workaround for potential 82544 hang in PCI-X.
3037 * Avoid terminating buffers within evenly-aligned
3039 if (unlikely(adapter->pcix_82544 &&
3040 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3044 buffer_info->length = size;
3046 pci_map_page(adapter->pdev,
3051 buffer_info->time_stamp = jiffies;
3052 buffer_info->next_to_watch = i;
3057 if (unlikely(++i == tx_ring->count)) i = 0;
3061 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3062 tx_ring->buffer_info[i].skb = skb;
3063 tx_ring->buffer_info[first].next_to_watch = i;
3069 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3070 int tx_flags, int count)
3072 struct e1000_tx_desc *tx_desc = NULL;
3073 struct e1000_buffer *buffer_info;
3074 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3077 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3078 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3080 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3082 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3083 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3086 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3087 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3088 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3091 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3092 txd_lower |= E1000_TXD_CMD_VLE;
3093 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3096 i = tx_ring->next_to_use;
3099 buffer_info = &tx_ring->buffer_info[i];
3100 tx_desc = E1000_TX_DESC(*tx_ring, i);
3101 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3102 tx_desc->lower.data =
3103 cpu_to_le32(txd_lower | buffer_info->length);
3104 tx_desc->upper.data = cpu_to_le32(txd_upper);
3105 if (unlikely(++i == tx_ring->count)) i = 0;
3108 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3110 /* Force memory writes to complete before letting h/w
3111 * know there are new descriptors to fetch. (Only
3112 * applicable for weak-ordered memory model archs,
3113 * such as IA-64). */
3116 tx_ring->next_to_use = i;
3117 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3118 /* we need this if more than one processor can write to our tail
3119 * at a time, it syncronizes IO on IA64/Altix systems */
3124 * 82547 workaround to avoid controller hang in half-duplex environment.
3125 * The workaround is to avoid queuing a large packet that would span
3126 * the internal Tx FIFO ring boundary by notifying the stack to resend
3127 * the packet at a later time. This gives the Tx FIFO an opportunity to
3128 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3129 * to the beginning of the Tx FIFO.
3132 #define E1000_FIFO_HDR 0x10
3133 #define E1000_82547_PAD_LEN 0x3E0
3136 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3138 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3139 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3141 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3143 if (adapter->link_duplex != HALF_DUPLEX)
3144 goto no_fifo_stall_required;
3146 if (atomic_read(&adapter->tx_fifo_stall))
3149 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3150 atomic_set(&adapter->tx_fifo_stall, 1);
3154 no_fifo_stall_required:
3155 adapter->tx_fifo_head += skb_fifo_len;
3156 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3157 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3161 #define MINIMUM_DHCP_PACKET_SIZE 282
3163 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3165 struct e1000_hw *hw = &adapter->hw;
3166 uint16_t length, offset;
3167 if (vlan_tx_tag_present(skb)) {
3168 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3169 ( adapter->hw.mng_cookie.status &
3170 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3173 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3174 struct ethhdr *eth = (struct ethhdr *) skb->data;
3175 if ((htons(ETH_P_IP) == eth->h_proto)) {
3176 const struct iphdr *ip =
3177 (struct iphdr *)((uint8_t *)skb->data+14);
3178 if (IPPROTO_UDP == ip->protocol) {
3179 struct udphdr *udp =
3180 (struct udphdr *)((uint8_t *)ip +
3182 if (ntohs(udp->dest) == 67) {
3183 offset = (uint8_t *)udp + 8 - skb->data;
3184 length = skb->len - offset;
3186 return e1000_mng_write_dhcp_info(hw,
3196 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3198 struct e1000_adapter *adapter = netdev_priv(netdev);
3199 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3201 netif_stop_queue(netdev);
3202 /* Herbert's original patch had:
3203 * smp_mb__after_netif_stop_queue();
3204 * but since that doesn't exist yet, just open code it. */
3207 /* We need to check again in a case another CPU has just
3208 * made room available. */
3209 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3213 netif_start_queue(netdev);
3214 ++adapter->restart_queue;
3218 static int e1000_maybe_stop_tx(struct net_device *netdev,
3219 struct e1000_tx_ring *tx_ring, int size)
3221 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3223 return __e1000_maybe_stop_tx(netdev, size);
3226 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3228 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3230 struct e1000_adapter *adapter = netdev_priv(netdev);
3231 struct e1000_tx_ring *tx_ring;
3232 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3233 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3234 unsigned int tx_flags = 0;
3235 unsigned int len = skb->len - skb->data_len;
3236 unsigned long flags;
3237 unsigned int nr_frags;
3243 /* This goes back to the question of how to logically map a tx queue
3244 * to a flow. Right now, performance is impacted slightly negatively
3245 * if using multiple tx queues. If the stack breaks away from a
3246 * single qdisc implementation, we can look at this again. */
3247 tx_ring = adapter->tx_ring;
3249 if (unlikely(skb->len <= 0)) {
3250 dev_kfree_skb_any(skb);
3251 return NETDEV_TX_OK;
3254 /* 82571 and newer doesn't need the workaround that limited descriptor
3256 if (adapter->hw.mac_type >= e1000_82571)
3259 mss = skb_shinfo(skb)->gso_size;
3260 /* The controller does a simple calculation to
3261 * make sure there is enough room in the FIFO before
3262 * initiating the DMA for each buffer. The calc is:
3263 * 4 = ceil(buffer len/mss). To make sure we don't
3264 * overrun the FIFO, adjust the max buffer len if mss
3268 max_per_txd = min(mss << 2, max_per_txd);
3269 max_txd_pwr = fls(max_per_txd) - 1;
3271 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3272 * points to just header, pull a few bytes of payload from
3273 * frags into skb->data */
3274 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3275 if (skb->data_len && hdr_len == len) {
3276 switch (adapter->hw.mac_type) {
3277 unsigned int pull_size;
3279 /* Make sure we have room to chop off 4 bytes,
3280 * and that the end alignment will work out to
3281 * this hardware's requirements
3282 * NOTE: this is a TSO only workaround
3283 * if end byte alignment not correct move us
3284 * into the next dword */
3285 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3292 pull_size = min((unsigned int)4, skb->data_len);
3293 if (!__pskb_pull_tail(skb, pull_size)) {
3295 "__pskb_pull_tail failed.\n");
3296 dev_kfree_skb_any(skb);
3297 return NETDEV_TX_OK;
3299 len = skb->len - skb->data_len;
3308 /* reserve a descriptor for the offload context */
3309 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3313 /* Controller Erratum workaround */
3314 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3317 count += TXD_USE_COUNT(len, max_txd_pwr);
3319 if (adapter->pcix_82544)
3322 /* work-around for errata 10 and it applies to all controllers
3323 * in PCI-X mode, so add one more descriptor to the count
3325 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3329 nr_frags = skb_shinfo(skb)->nr_frags;
3330 for (f = 0; f < nr_frags; f++)
3331 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3333 if (adapter->pcix_82544)
3337 if (adapter->hw.tx_pkt_filtering &&
3338 (adapter->hw.mac_type == e1000_82573))
3339 e1000_transfer_dhcp_info(adapter, skb);
3341 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
3342 /* Collision - tell upper layer to requeue */
3343 return NETDEV_TX_LOCKED;
3345 /* need: count + 2 desc gap to keep tail from touching
3346 * head, otherwise try next time */
3347 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3348 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3349 return NETDEV_TX_BUSY;
3352 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3353 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3354 netif_stop_queue(netdev);
3355 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3356 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3357 return NETDEV_TX_BUSY;
3361 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3362 tx_flags |= E1000_TX_FLAGS_VLAN;
3363 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3366 first = tx_ring->next_to_use;
3368 tso = e1000_tso(adapter, tx_ring, skb);
3370 dev_kfree_skb_any(skb);
3371 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3372 return NETDEV_TX_OK;
3376 tx_ring->last_tx_tso = 1;
3377 tx_flags |= E1000_TX_FLAGS_TSO;
3378 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3379 tx_flags |= E1000_TX_FLAGS_CSUM;
3381 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3382 * 82571 hardware supports TSO capabilities for IPv6 as well...
3383 * no longer assume, we must. */
3384 if (likely(skb->protocol == htons(ETH_P_IP)))
3385 tx_flags |= E1000_TX_FLAGS_IPV4;
3387 e1000_tx_queue(adapter, tx_ring, tx_flags,
3388 e1000_tx_map(adapter, tx_ring, skb, first,
3389 max_per_txd, nr_frags, mss));
3391 netdev->trans_start = jiffies;
3393 /* Make sure there is space in the ring for the next send. */
3394 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3396 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3397 return NETDEV_TX_OK;
3401 * e1000_tx_timeout - Respond to a Tx Hang
3402 * @netdev: network interface device structure
3406 e1000_tx_timeout(struct net_device *netdev)
3408 struct e1000_adapter *adapter = netdev_priv(netdev);
3410 /* Do the reset outside of interrupt context */
3411 adapter->tx_timeout_count++;
3412 schedule_work(&adapter->reset_task);
3416 e1000_reset_task(struct work_struct *work)
3418 struct e1000_adapter *adapter =
3419 container_of(work, struct e1000_adapter, reset_task);
3421 e1000_reinit_locked(adapter);
3425 * e1000_get_stats - Get System Network Statistics
3426 * @netdev: network interface device structure
3428 * Returns the address of the device statistics structure.
3429 * The statistics are actually updated from the timer callback.
3432 static struct net_device_stats *
3433 e1000_get_stats(struct net_device *netdev)
3435 struct e1000_adapter *adapter = netdev_priv(netdev);
3437 /* only return the current stats */
3438 return &adapter->net_stats;
3442 * e1000_change_mtu - Change the Maximum Transfer Unit
3443 * @netdev: network interface device structure
3444 * @new_mtu: new value for maximum frame size
3446 * Returns 0 on success, negative on failure
3450 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3452 struct e1000_adapter *adapter = netdev_priv(netdev);
3453 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3454 uint16_t eeprom_data = 0;
3456 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3457 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3458 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3462 /* Adapter-specific max frame size limits. */
3463 switch (adapter->hw.mac_type) {
3464 case e1000_undefined ... e1000_82542_rev2_1:
3466 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3467 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3472 /* Jumbo Frames not supported if:
3473 * - this is not an 82573L device
3474 * - ASPM is enabled in any way (0x1A bits 3:2) */
3475 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3477 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3478 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3479 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3481 "Jumbo Frames not supported.\n");
3486 /* ERT will be enabled later to enable wire speed receives */
3488 /* fall through to get support */
3491 case e1000_80003es2lan:
3492 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3493 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3494 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3499 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3503 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3504 * means we reserve 2 more, this pushes us to allocate from the next
3506 * i.e. RXBUFFER_2048 --> size-4096 slab */
3508 if (max_frame <= E1000_RXBUFFER_256)
3509 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3510 else if (max_frame <= E1000_RXBUFFER_512)
3511 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3512 else if (max_frame <= E1000_RXBUFFER_1024)
3513 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3514 else if (max_frame <= E1000_RXBUFFER_2048)
3515 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3516 else if (max_frame <= E1000_RXBUFFER_4096)
3517 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3518 else if (max_frame <= E1000_RXBUFFER_8192)
3519 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3520 else if (max_frame <= E1000_RXBUFFER_16384)
3521 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3523 /* adjust allocation if LPE protects us, and we aren't using SBP */
3524 if (!adapter->hw.tbi_compatibility_on &&
3525 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3526 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3527 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3529 netdev->mtu = new_mtu;
3530 adapter->hw.max_frame_size = max_frame;
3532 if (netif_running(netdev))
3533 e1000_reinit_locked(adapter);
3539 * e1000_update_stats - Update the board statistics counters
3540 * @adapter: board private structure
3544 e1000_update_stats(struct e1000_adapter *adapter)
3546 struct e1000_hw *hw = &adapter->hw;
3547 struct pci_dev *pdev = adapter->pdev;
3548 unsigned long flags;
3551 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3554 * Prevent stats update while adapter is being reset, or if the pci
3555 * connection is down.
3557 if (adapter->link_speed == 0)
3559 if (pci_channel_offline(pdev))
3562 spin_lock_irqsave(&adapter->stats_lock, flags);
3564 /* these counters are modified from e1000_tbi_adjust_stats,
3565 * called from the interrupt context, so they must only
3566 * be written while holding adapter->stats_lock
3569 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3570 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3571 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3572 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3573 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3574 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3575 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3577 if (adapter->hw.mac_type != e1000_ich8lan) {
3578 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3579 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3580 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3581 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3582 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3583 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3586 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3587 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3588 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3589 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3590 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3591 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3592 adapter->stats.dc += E1000_READ_REG(hw, DC);
3593 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3594 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3595 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3596 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3597 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3598 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3599 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3600 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3601 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3602 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3603 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3604 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3605 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3606 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3607 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3608 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3609 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3610 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3611 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3613 if (adapter->hw.mac_type != e1000_ich8lan) {
3614 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3615 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3616 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3617 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3618 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3619 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3622 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3623 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3625 /* used for adaptive IFS */
3627 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3628 adapter->stats.tpt += hw->tx_packet_delta;
3629 hw->collision_delta = E1000_READ_REG(hw, COLC);
3630 adapter->stats.colc += hw->collision_delta;
3632 if (hw->mac_type >= e1000_82543) {
3633 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3634 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3635 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3636 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3637 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3638 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3640 if (hw->mac_type > e1000_82547_rev_2) {
3641 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3642 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3644 if (adapter->hw.mac_type != e1000_ich8lan) {
3645 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3646 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3647 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3648 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3649 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3650 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3651 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3655 /* Fill out the OS statistics structure */
3656 adapter->net_stats.rx_packets = adapter->stats.gprc;
3657 adapter->net_stats.tx_packets = adapter->stats.gptc;
3658 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3659 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3660 adapter->net_stats.multicast = adapter->stats.mprc;
3661 adapter->net_stats.collisions = adapter->stats.colc;
3665 /* RLEC on some newer hardware can be incorrect so build
3666 * our own version based on RUC and ROC */
3667 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3668 adapter->stats.crcerrs + adapter->stats.algnerrc +
3669 adapter->stats.ruc + adapter->stats.roc +
3670 adapter->stats.cexterr;
3671 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3672 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3673 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3674 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3675 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3678 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3679 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3680 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3681 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3682 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3683 if (adapter->hw.bad_tx_carr_stats_fd &&
3684 adapter->link_duplex == FULL_DUPLEX) {
3685 adapter->net_stats.tx_carrier_errors = 0;
3686 adapter->stats.tncrs = 0;
3689 /* Tx Dropped needs to be maintained elsewhere */
3692 if (hw->media_type == e1000_media_type_copper) {
3693 if ((adapter->link_speed == SPEED_1000) &&
3694 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3695 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3696 adapter->phy_stats.idle_errors += phy_tmp;
3699 if ((hw->mac_type <= e1000_82546) &&
3700 (hw->phy_type == e1000_phy_m88) &&
3701 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3702 adapter->phy_stats.receive_errors += phy_tmp;
3705 /* Management Stats */
3706 if (adapter->hw.has_smbus) {
3707 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3708 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3709 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3712 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3716 * e1000_intr_msi - Interrupt Handler
3717 * @irq: interrupt number
3718 * @data: pointer to a network interface device structure
3722 e1000_intr_msi(int irq, void *data)
3724 struct net_device *netdev = data;
3725 struct e1000_adapter *adapter = netdev_priv(netdev);
3726 struct e1000_hw *hw = &adapter->hw;
3727 #ifndef CONFIG_E1000_NAPI
3730 uint32_t icr = E1000_READ_REG(hw, ICR);
3732 #ifdef CONFIG_E1000_NAPI
3733 /* read ICR disables interrupts using IAM, so keep up with our
3734 * enable/disable accounting */
3735 atomic_inc(&adapter->irq_sem);
3737 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3738 hw->get_link_status = 1;
3739 /* 80003ES2LAN workaround-- For packet buffer work-around on
3740 * link down event; disable receives here in the ISR and reset
3741 * adapter in watchdog */
3742 if (netif_carrier_ok(netdev) &&
3743 (adapter->hw.mac_type == e1000_80003es2lan)) {
3744 /* disable receives */
3745 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3746 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3748 /* guard against interrupt when we're going down */
3749 if (!test_bit(__E1000_DOWN, &adapter->flags))
3750 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3753 #ifdef CONFIG_E1000_NAPI
3754 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
3755 adapter->total_tx_bytes = 0;
3756 adapter->total_tx_packets = 0;
3757 adapter->total_rx_bytes = 0;
3758 adapter->total_rx_packets = 0;
3759 __netif_rx_schedule(netdev, &adapter->napi);
3761 e1000_irq_enable(adapter);
3763 adapter->total_tx_bytes = 0;
3764 adapter->total_rx_bytes = 0;
3765 adapter->total_tx_packets = 0;
3766 adapter->total_rx_packets = 0;
3768 for (i = 0; i < E1000_MAX_INTR; i++)
3769 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3770 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3773 if (likely(adapter->itr_setting & 3))
3774 e1000_set_itr(adapter);
3781 * e1000_intr - Interrupt Handler
3782 * @irq: interrupt number
3783 * @data: pointer to a network interface device structure
3787 e1000_intr(int irq, void *data)
3789 struct net_device *netdev = data;
3790 struct e1000_adapter *adapter = netdev_priv(netdev);
3791 struct e1000_hw *hw = &adapter->hw;
3792 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3793 #ifndef CONFIG_E1000_NAPI
3797 return IRQ_NONE; /* Not our interrupt */
3799 #ifdef CONFIG_E1000_NAPI
3800 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3801 * not set, then the adapter didn't send an interrupt */
3802 if (unlikely(hw->mac_type >= e1000_82571 &&
3803 !(icr & E1000_ICR_INT_ASSERTED)))
3806 /* Interrupt Auto-Mask...upon reading ICR,
3807 * interrupts are masked. No need for the
3808 * IMC write, but it does mean we should
3809 * account for it ASAP. */
3810 if (likely(hw->mac_type >= e1000_82571))
3811 atomic_inc(&adapter->irq_sem);
3814 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3815 hw->get_link_status = 1;
3816 /* 80003ES2LAN workaround--
3817 * For packet buffer work-around on link down event;
3818 * disable receives here in the ISR and
3819 * reset adapter in watchdog
3821 if (netif_carrier_ok(netdev) &&
3822 (adapter->hw.mac_type == e1000_80003es2lan)) {
3823 /* disable receives */
3824 rctl = E1000_READ_REG(hw, RCTL);
3825 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3827 /* guard against interrupt when we're going down */
3828 if (!test_bit(__E1000_DOWN, &adapter->flags))
3829 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3832 #ifdef CONFIG_E1000_NAPI
3833 if (unlikely(hw->mac_type < e1000_82571)) {
3834 /* disable interrupts, without the synchronize_irq bit */
3835 atomic_inc(&adapter->irq_sem);
3836 E1000_WRITE_REG(hw, IMC, ~0);
3837 E1000_WRITE_FLUSH(hw);
3839 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
3840 adapter->total_tx_bytes = 0;
3841 adapter->total_tx_packets = 0;
3842 adapter->total_rx_bytes = 0;
3843 adapter->total_rx_packets = 0;
3844 __netif_rx_schedule(netdev, &adapter->napi);
3846 /* this really should not happen! if it does it is basically a
3847 * bug, but not a hard error, so enable ints and continue */
3848 e1000_irq_enable(adapter);
3850 /* Writing IMC and IMS is needed for 82547.
3851 * Due to Hub Link bus being occupied, an interrupt
3852 * de-assertion message is not able to be sent.
3853 * When an interrupt assertion message is generated later,
3854 * two messages are re-ordered and sent out.
3855 * That causes APIC to think 82547 is in de-assertion
3856 * state, while 82547 is in assertion state, resulting
3857 * in dead lock. Writing IMC forces 82547 into
3858 * de-assertion state.
3860 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3861 atomic_inc(&adapter->irq_sem);
3862 E1000_WRITE_REG(hw, IMC, ~0);
3865 adapter->total_tx_bytes = 0;
3866 adapter->total_rx_bytes = 0;
3867 adapter->total_tx_packets = 0;
3868 adapter->total_rx_packets = 0;
3870 for (i = 0; i < E1000_MAX_INTR; i++)
3871 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3872 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3875 if (likely(adapter->itr_setting & 3))
3876 e1000_set_itr(adapter);
3878 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3879 e1000_irq_enable(adapter);
3885 #ifdef CONFIG_E1000_NAPI
3887 * e1000_clean - NAPI Rx polling callback
3888 * @adapter: board private structure
3892 e1000_clean(struct napi_struct *napi, int budget)
3894 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3895 struct net_device *poll_dev = adapter->netdev;
3896 int tx_cleaned = 0, work_done = 0;
3898 /* Must NOT use netdev_priv macro here. */
3899 adapter = poll_dev->priv;
3901 /* e1000_clean is called per-cpu. This lock protects
3902 * tx_ring[0] from being cleaned by multiple cpus
3903 * simultaneously. A failure obtaining the lock means
3904 * tx_ring[0] is currently being cleaned anyway. */
3905 if (spin_trylock(&adapter->tx_queue_lock)) {
3906 tx_cleaned = e1000_clean_tx_irq(adapter,
3907 &adapter->tx_ring[0]);
3908 spin_unlock(&adapter->tx_queue_lock);
3911 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3912 &work_done, budget);
3917 /* If budget not fully consumed, exit the polling mode */
3918 if (work_done < budget) {
3919 if (likely(adapter->itr_setting & 3))
3920 e1000_set_itr(adapter);
3921 netif_rx_complete(poll_dev, napi);
3922 e1000_irq_enable(adapter);
3930 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3931 * @adapter: board private structure
3935 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3936 struct e1000_tx_ring *tx_ring)
3938 struct net_device *netdev = adapter->netdev;
3939 struct e1000_tx_desc *tx_desc, *eop_desc;
3940 struct e1000_buffer *buffer_info;
3941 unsigned int i, eop;
3942 #ifdef CONFIG_E1000_NAPI
3943 unsigned int count = 0;
3945 boolean_t cleaned = FALSE;
3946 unsigned int total_tx_bytes=0, total_tx_packets=0;
3948 i = tx_ring->next_to_clean;
3949 eop = tx_ring->buffer_info[i].next_to_watch;
3950 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3952 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3953 for (cleaned = FALSE; !cleaned; ) {
3954 tx_desc = E1000_TX_DESC(*tx_ring, i);
3955 buffer_info = &tx_ring->buffer_info[i];
3956 cleaned = (i == eop);
3959 struct sk_buff *skb = buffer_info->skb;
3960 unsigned int segs, bytecount;
3961 segs = skb_shinfo(skb)->gso_segs ?: 1;
3962 /* multiply data chunks by size of headers */
3963 bytecount = ((segs - 1) * skb_headlen(skb)) +
3965 total_tx_packets += segs;
3966 total_tx_bytes += bytecount;
3968 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3969 tx_desc->upper.data = 0;
3971 if (unlikely(++i == tx_ring->count)) i = 0;
3974 eop = tx_ring->buffer_info[i].next_to_watch;
3975 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3976 #ifdef CONFIG_E1000_NAPI
3977 #define E1000_TX_WEIGHT 64
3978 /* weight of a sort for tx, to avoid endless transmit cleanup */
3979 if (count++ == E1000_TX_WEIGHT) break;
3983 tx_ring->next_to_clean = i;
3985 #define TX_WAKE_THRESHOLD 32
3986 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3987 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3988 /* Make sure that anybody stopping the queue after this
3989 * sees the new next_to_clean.
3992 if (netif_queue_stopped(netdev)) {
3993 netif_wake_queue(netdev);
3994 ++adapter->restart_queue;
3998 if (adapter->detect_tx_hung) {
3999 /* Detect a transmit hang in hardware, this serializes the
4000 * check with the clearing of time_stamp and movement of i */
4001 adapter->detect_tx_hung = FALSE;
4002 if (tx_ring->buffer_info[eop].dma &&
4003 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4004 (adapter->tx_timeout_factor * HZ))
4005 && !(E1000_READ_REG(&adapter->hw, STATUS) &
4006 E1000_STATUS_TXOFF)) {
4008 /* detected Tx unit hang */
4009 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4013 " next_to_use <%x>\n"
4014 " next_to_clean <%x>\n"
4015 "buffer_info[next_to_clean]\n"
4016 " time_stamp <%lx>\n"
4017 " next_to_watch <%x>\n"
4019 " next_to_watch.status <%x>\n",
4020 (unsigned long)((tx_ring - adapter->tx_ring) /
4021 sizeof(struct e1000_tx_ring)),
4022 readl(adapter->hw.hw_addr + tx_ring->tdh),
4023 readl(adapter->hw.hw_addr + tx_ring->tdt),
4024 tx_ring->next_to_use,
4025 tx_ring->next_to_clean,
4026 tx_ring->buffer_info[eop].time_stamp,
4029 eop_desc->upper.fields.status);
4030 netif_stop_queue(netdev);
4033 adapter->total_tx_bytes += total_tx_bytes;
4034 adapter->total_tx_packets += total_tx_packets;
4039 * e1000_rx_checksum - Receive Checksum Offload for 82543
4040 * @adapter: board private structure
4041 * @status_err: receive descriptor status and error fields
4042 * @csum: receive descriptor csum field
4043 * @sk_buff: socket buffer with received data
4047 e1000_rx_checksum(struct e1000_adapter *adapter,
4048 uint32_t status_err, uint32_t csum,
4049 struct sk_buff *skb)
4051 uint16_t status = (uint16_t)status_err;
4052 uint8_t errors = (uint8_t)(status_err >> 24);
4053 skb->ip_summed = CHECKSUM_NONE;
4055 /* 82543 or newer only */
4056 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4057 /* Ignore Checksum bit is set */
4058 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4059 /* TCP/UDP checksum error bit is set */
4060 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4061 /* let the stack verify checksum errors */
4062 adapter->hw_csum_err++;
4065 /* TCP/UDP Checksum has not been calculated */
4066 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4067 if (!(status & E1000_RXD_STAT_TCPCS))
4070 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4073 /* It must be a TCP or UDP packet with a valid checksum */
4074 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4075 /* TCP checksum is good */
4076 skb->ip_summed = CHECKSUM_UNNECESSARY;
4077 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4078 /* IP fragment with UDP payload */
4079 /* Hardware complements the payload checksum, so we undo it
4080 * and then put the value in host order for further stack use.
4082 csum = ntohl(csum ^ 0xFFFF);
4084 skb->ip_summed = CHECKSUM_COMPLETE;
4086 adapter->hw_csum_good++;
4090 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4091 * @adapter: board private structure
4095 #ifdef CONFIG_E1000_NAPI
4096 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4097 struct e1000_rx_ring *rx_ring,
4098 int *work_done, int work_to_do)
4100 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4101 struct e1000_rx_ring *rx_ring)
4104 struct net_device *netdev = adapter->netdev;
4105 struct pci_dev *pdev = adapter->pdev;
4106 struct e1000_rx_desc *rx_desc, *next_rxd;
4107 struct e1000_buffer *buffer_info, *next_buffer;
4108 unsigned long flags;
4112 int cleaned_count = 0;
4113 boolean_t cleaned = FALSE;
4114 unsigned int total_rx_bytes=0, total_rx_packets=0;
4116 i = rx_ring->next_to_clean;
4117 rx_desc = E1000_RX_DESC(*rx_ring, i);
4118 buffer_info = &rx_ring->buffer_info[i];
4120 while (rx_desc->status & E1000_RXD_STAT_DD) {
4121 struct sk_buff *skb;
4124 #ifdef CONFIG_E1000_NAPI
4125 if (*work_done >= work_to_do)
4129 status = rx_desc->status;
4130 skb = buffer_info->skb;
4131 buffer_info->skb = NULL;
4133 prefetch(skb->data - NET_IP_ALIGN);
4135 if (++i == rx_ring->count) i = 0;
4136 next_rxd = E1000_RX_DESC(*rx_ring, i);
4139 next_buffer = &rx_ring->buffer_info[i];
4143 pci_unmap_single(pdev,
4145 buffer_info->length,
4146 PCI_DMA_FROMDEVICE);
4148 length = le16_to_cpu(rx_desc->length);
4150 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4151 /* All receives must fit into a single buffer */
4152 E1000_DBG("%s: Receive packet consumed multiple"
4153 " buffers\n", netdev->name);
4155 buffer_info->skb = skb;
4159 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4160 last_byte = *(skb->data + length - 1);
4161 if (TBI_ACCEPT(&adapter->hw, status,
4162 rx_desc->errors, length, last_byte)) {
4163 spin_lock_irqsave(&adapter->stats_lock, flags);
4164 e1000_tbi_adjust_stats(&adapter->hw,
4167 spin_unlock_irqrestore(&adapter->stats_lock,
4172 buffer_info->skb = skb;
4177 /* adjust length to remove Ethernet CRC, this must be
4178 * done after the TBI_ACCEPT workaround above */
4181 /* probably a little skewed due to removing CRC */
4182 total_rx_bytes += length;
4185 /* code added for copybreak, this should improve
4186 * performance for small packets with large amounts
4187 * of reassembly being done in the stack */
4188 if (length < copybreak) {
4189 struct sk_buff *new_skb =
4190 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4192 skb_reserve(new_skb, NET_IP_ALIGN);
4193 skb_copy_to_linear_data_offset(new_skb,
4199 /* save the skb in buffer_info as good */
4200 buffer_info->skb = skb;
4203 /* else just continue with the old one */
4205 /* end copybreak code */
4206 skb_put(skb, length);
4208 /* Receive Checksum Offload */
4209 e1000_rx_checksum(adapter,
4210 (uint32_t)(status) |
4211 ((uint32_t)(rx_desc->errors) << 24),
4212 le16_to_cpu(rx_desc->csum), skb);
4214 skb->protocol = eth_type_trans(skb, netdev);
4215 #ifdef CONFIG_E1000_NAPI
4216 if (unlikely(adapter->vlgrp &&
4217 (status & E1000_RXD_STAT_VP))) {
4218 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4219 le16_to_cpu(rx_desc->special) &
4220 E1000_RXD_SPC_VLAN_MASK);
4222 netif_receive_skb(skb);
4224 #else /* CONFIG_E1000_NAPI */
4225 if (unlikely(adapter->vlgrp &&
4226 (status & E1000_RXD_STAT_VP))) {
4227 vlan_hwaccel_rx(skb, adapter->vlgrp,
4228 le16_to_cpu(rx_desc->special) &
4229 E1000_RXD_SPC_VLAN_MASK);
4233 #endif /* CONFIG_E1000_NAPI */
4234 netdev->last_rx = jiffies;
4237 rx_desc->status = 0;
4239 /* return some buffers to hardware, one at a time is too slow */
4240 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4241 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4245 /* use prefetched values */
4247 buffer_info = next_buffer;
4249 rx_ring->next_to_clean = i;
4251 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4253 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4255 adapter->total_rx_packets += total_rx_packets;
4256 adapter->total_rx_bytes += total_rx_bytes;
4261 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4262 * @adapter: board private structure
4266 #ifdef CONFIG_E1000_NAPI
4267 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4268 struct e1000_rx_ring *rx_ring,
4269 int *work_done, int work_to_do)
4271 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4272 struct e1000_rx_ring *rx_ring)
4275 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4276 struct net_device *netdev = adapter->netdev;
4277 struct pci_dev *pdev = adapter->pdev;
4278 struct e1000_buffer *buffer_info, *next_buffer;
4279 struct e1000_ps_page *ps_page;
4280 struct e1000_ps_page_dma *ps_page_dma;
4281 struct sk_buff *skb;
4283 uint32_t length, staterr;
4284 int cleaned_count = 0;
4285 boolean_t cleaned = FALSE;
4286 unsigned int total_rx_bytes=0, total_rx_packets=0;
4288 i = rx_ring->next_to_clean;
4289 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4290 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4291 buffer_info = &rx_ring->buffer_info[i];
4293 while (staterr & E1000_RXD_STAT_DD) {
4294 ps_page = &rx_ring->ps_page[i];
4295 ps_page_dma = &rx_ring->ps_page_dma[i];
4296 #ifdef CONFIG_E1000_NAPI
4297 if (unlikely(*work_done >= work_to_do))
4301 skb = buffer_info->skb;
4303 /* in the packet split case this is header only */
4304 prefetch(skb->data - NET_IP_ALIGN);
4306 if (++i == rx_ring->count) i = 0;
4307 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4310 next_buffer = &rx_ring->buffer_info[i];
4314 pci_unmap_single(pdev, buffer_info->dma,
4315 buffer_info->length,
4316 PCI_DMA_FROMDEVICE);
4318 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4319 E1000_DBG("%s: Packet Split buffers didn't pick up"
4320 " the full packet\n", netdev->name);
4321 dev_kfree_skb_irq(skb);
4325 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4326 dev_kfree_skb_irq(skb);
4330 length = le16_to_cpu(rx_desc->wb.middle.length0);
4332 if (unlikely(!length)) {
4333 E1000_DBG("%s: Last part of the packet spanning"
4334 " multiple descriptors\n", netdev->name);
4335 dev_kfree_skb_irq(skb);
4340 skb_put(skb, length);
4343 /* this looks ugly, but it seems compiler issues make it
4344 more efficient than reusing j */
4345 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4347 /* page alloc/put takes too long and effects small packet
4348 * throughput, so unsplit small packets and save the alloc/put*/
4349 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4351 /* there is no documentation about how to call
4352 * kmap_atomic, so we can't hold the mapping
4354 pci_dma_sync_single_for_cpu(pdev,
4355 ps_page_dma->ps_page_dma[0],
4357 PCI_DMA_FROMDEVICE);
4358 vaddr = kmap_atomic(ps_page->ps_page[0],
4359 KM_SKB_DATA_SOFTIRQ);
4360 memcpy(skb_tail_pointer(skb), vaddr, l1);
4361 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4362 pci_dma_sync_single_for_device(pdev,
4363 ps_page_dma->ps_page_dma[0],
4364 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4365 /* remove the CRC */
4372 for (j = 0; j < adapter->rx_ps_pages; j++) {
4373 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4375 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4376 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4377 ps_page_dma->ps_page_dma[j] = 0;
4378 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4380 ps_page->ps_page[j] = NULL;
4382 skb->data_len += length;
4383 skb->truesize += length;
4386 /* strip the ethernet crc, problem is we're using pages now so
4387 * this whole operation can get a little cpu intensive */
4388 pskb_trim(skb, skb->len - 4);
4391 total_rx_bytes += skb->len;
4394 e1000_rx_checksum(adapter, staterr,
4395 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4396 skb->protocol = eth_type_trans(skb, netdev);
4398 if (likely(rx_desc->wb.upper.header_status &
4399 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4400 adapter->rx_hdr_split++;
4401 #ifdef CONFIG_E1000_NAPI
4402 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4403 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4404 le16_to_cpu(rx_desc->wb.middle.vlan) &
4405 E1000_RXD_SPC_VLAN_MASK);
4407 netif_receive_skb(skb);
4409 #else /* CONFIG_E1000_NAPI */
4410 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4411 vlan_hwaccel_rx(skb, adapter->vlgrp,
4412 le16_to_cpu(rx_desc->wb.middle.vlan) &
4413 E1000_RXD_SPC_VLAN_MASK);
4417 #endif /* CONFIG_E1000_NAPI */
4418 netdev->last_rx = jiffies;
4421 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4422 buffer_info->skb = NULL;
4424 /* return some buffers to hardware, one at a time is too slow */
4425 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4426 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4430 /* use prefetched values */
4432 buffer_info = next_buffer;
4434 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4436 rx_ring->next_to_clean = i;
4438 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4440 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4442 adapter->total_rx_packets += total_rx_packets;
4443 adapter->total_rx_bytes += total_rx_bytes;
4448 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4449 * @adapter: address of board private structure
4453 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4454 struct e1000_rx_ring *rx_ring,
4457 struct net_device *netdev = adapter->netdev;
4458 struct pci_dev *pdev = adapter->pdev;
4459 struct e1000_rx_desc *rx_desc;
4460 struct e1000_buffer *buffer_info;
4461 struct sk_buff *skb;
4463 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4465 i = rx_ring->next_to_use;
4466 buffer_info = &rx_ring->buffer_info[i];
4468 while (cleaned_count--) {
4469 skb = buffer_info->skb;
4475 skb = netdev_alloc_skb(netdev, bufsz);
4476 if (unlikely(!skb)) {
4477 /* Better luck next round */
4478 adapter->alloc_rx_buff_failed++;
4482 /* Fix for errata 23, can't cross 64kB boundary */
4483 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4484 struct sk_buff *oldskb = skb;
4485 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4486 "at %p\n", bufsz, skb->data);
4487 /* Try again, without freeing the previous */
4488 skb = netdev_alloc_skb(netdev, bufsz);
4489 /* Failed allocation, critical failure */
4491 dev_kfree_skb(oldskb);
4495 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4498 dev_kfree_skb(oldskb);
4499 break; /* while !buffer_info->skb */
4502 /* Use new allocation */
4503 dev_kfree_skb(oldskb);
4505 /* Make buffer alignment 2 beyond a 16 byte boundary
4506 * this will result in a 16 byte aligned IP header after
4507 * the 14 byte MAC header is removed
4509 skb_reserve(skb, NET_IP_ALIGN);
4511 buffer_info->skb = skb;
4512 buffer_info->length = adapter->rx_buffer_len;
4514 buffer_info->dma = pci_map_single(pdev,
4516 adapter->rx_buffer_len,
4517 PCI_DMA_FROMDEVICE);
4519 /* Fix for errata 23, can't cross 64kB boundary */
4520 if (!e1000_check_64k_bound(adapter,
4521 (void *)(unsigned long)buffer_info->dma,
4522 adapter->rx_buffer_len)) {
4523 DPRINTK(RX_ERR, ERR,
4524 "dma align check failed: %u bytes at %p\n",
4525 adapter->rx_buffer_len,
4526 (void *)(unsigned long)buffer_info->dma);
4528 buffer_info->skb = NULL;
4530 pci_unmap_single(pdev, buffer_info->dma,
4531 adapter->rx_buffer_len,
4532 PCI_DMA_FROMDEVICE);
4534 break; /* while !buffer_info->skb */
4536 rx_desc = E1000_RX_DESC(*rx_ring, i);
4537 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4539 if (unlikely(++i == rx_ring->count))
4541 buffer_info = &rx_ring->buffer_info[i];
4544 if (likely(rx_ring->next_to_use != i)) {
4545 rx_ring->next_to_use = i;
4546 if (unlikely(i-- == 0))
4547 i = (rx_ring->count - 1);
4549 /* Force memory writes to complete before letting h/w
4550 * know there are new descriptors to fetch. (Only
4551 * applicable for weak-ordered memory model archs,
4552 * such as IA-64). */
4554 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4559 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4560 * @adapter: address of board private structure
4564 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4565 struct e1000_rx_ring *rx_ring,
4568 struct net_device *netdev = adapter->netdev;
4569 struct pci_dev *pdev = adapter->pdev;
4570 union e1000_rx_desc_packet_split *rx_desc;
4571 struct e1000_buffer *buffer_info;
4572 struct e1000_ps_page *ps_page;
4573 struct e1000_ps_page_dma *ps_page_dma;
4574 struct sk_buff *skb;
4577 i = rx_ring->next_to_use;
4578 buffer_info = &rx_ring->buffer_info[i];
4579 ps_page = &rx_ring->ps_page[i];
4580 ps_page_dma = &rx_ring->ps_page_dma[i];
4582 while (cleaned_count--) {
4583 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4585 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4586 if (j < adapter->rx_ps_pages) {
4587 if (likely(!ps_page->ps_page[j])) {
4588 ps_page->ps_page[j] =
4589 alloc_page(GFP_ATOMIC);
4590 if (unlikely(!ps_page->ps_page[j])) {
4591 adapter->alloc_rx_buff_failed++;
4594 ps_page_dma->ps_page_dma[j] =
4596 ps_page->ps_page[j],
4598 PCI_DMA_FROMDEVICE);
4600 /* Refresh the desc even if buffer_addrs didn't
4601 * change because each write-back erases
4604 rx_desc->read.buffer_addr[j+1] =
4605 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4607 rx_desc->read.buffer_addr[j+1] = ~0;
4610 skb = netdev_alloc_skb(netdev,
4611 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4613 if (unlikely(!skb)) {
4614 adapter->alloc_rx_buff_failed++;
4618 /* Make buffer alignment 2 beyond a 16 byte boundary
4619 * this will result in a 16 byte aligned IP header after
4620 * the 14 byte MAC header is removed
4622 skb_reserve(skb, NET_IP_ALIGN);
4624 buffer_info->skb = skb;
4625 buffer_info->length = adapter->rx_ps_bsize0;
4626 buffer_info->dma = pci_map_single(pdev, skb->data,
4627 adapter->rx_ps_bsize0,
4628 PCI_DMA_FROMDEVICE);
4630 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4632 if (unlikely(++i == rx_ring->count)) i = 0;
4633 buffer_info = &rx_ring->buffer_info[i];
4634 ps_page = &rx_ring->ps_page[i];
4635 ps_page_dma = &rx_ring->ps_page_dma[i];
4639 if (likely(rx_ring->next_to_use != i)) {
4640 rx_ring->next_to_use = i;
4641 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4643 /* Force memory writes to complete before letting h/w
4644 * know there are new descriptors to fetch. (Only
4645 * applicable for weak-ordered memory model archs,
4646 * such as IA-64). */
4648 /* Hardware increments by 16 bytes, but packet split
4649 * descriptors are 32 bytes...so we increment tail
4652 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4657 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4662 e1000_smartspeed(struct e1000_adapter *adapter)
4664 uint16_t phy_status;
4667 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4668 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4671 if (adapter->smartspeed == 0) {
4672 /* If Master/Slave config fault is asserted twice,
4673 * we assume back-to-back */
4674 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4675 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4676 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4677 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4678 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4679 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4680 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4681 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4683 adapter->smartspeed++;
4684 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4685 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4687 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4688 MII_CR_RESTART_AUTO_NEG);
4689 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4694 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4695 /* If still no link, perhaps using 2/3 pair cable */
4696 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4697 phy_ctrl |= CR_1000T_MS_ENABLE;
4698 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4699 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4700 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4701 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4702 MII_CR_RESTART_AUTO_NEG);
4703 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4706 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4707 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4708 adapter->smartspeed = 0;
4719 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4725 return e1000_mii_ioctl(netdev, ifr, cmd);
4739 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4741 struct e1000_adapter *adapter = netdev_priv(netdev);
4742 struct mii_ioctl_data *data = if_mii(ifr);
4746 unsigned long flags;
4748 if (adapter->hw.media_type != e1000_media_type_copper)
4753 data->phy_id = adapter->hw.phy_addr;
4756 if (!capable(CAP_NET_ADMIN))
4758 spin_lock_irqsave(&adapter->stats_lock, flags);
4759 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4761 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4764 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4767 if (!capable(CAP_NET_ADMIN))
4769 if (data->reg_num & ~(0x1F))
4771 mii_reg = data->val_in;
4772 spin_lock_irqsave(&adapter->stats_lock, flags);
4773 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4775 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4778 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4779 if (adapter->hw.media_type == e1000_media_type_copper) {
4780 switch (data->reg_num) {
4782 if (mii_reg & MII_CR_POWER_DOWN)
4784 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4785 adapter->hw.autoneg = 1;
4786 adapter->hw.autoneg_advertised = 0x2F;
4789 spddplx = SPEED_1000;
4790 else if (mii_reg & 0x2000)
4791 spddplx = SPEED_100;
4794 spddplx += (mii_reg & 0x100)
4797 retval = e1000_set_spd_dplx(adapter,
4802 if (netif_running(adapter->netdev))
4803 e1000_reinit_locked(adapter);
4805 e1000_reset(adapter);
4807 case M88E1000_PHY_SPEC_CTRL:
4808 case M88E1000_EXT_PHY_SPEC_CTRL:
4809 if (e1000_phy_reset(&adapter->hw))
4814 switch (data->reg_num) {
4816 if (mii_reg & MII_CR_POWER_DOWN)
4818 if (netif_running(adapter->netdev))
4819 e1000_reinit_locked(adapter);
4821 e1000_reset(adapter);
4829 return E1000_SUCCESS;
4833 e1000_pci_set_mwi(struct e1000_hw *hw)
4835 struct e1000_adapter *adapter = hw->back;
4836 int ret_val = pci_set_mwi(adapter->pdev);
4839 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4843 e1000_pci_clear_mwi(struct e1000_hw *hw)
4845 struct e1000_adapter *adapter = hw->back;
4847 pci_clear_mwi(adapter->pdev);
4851 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4853 struct e1000_adapter *adapter = hw->back;
4855 pci_read_config_word(adapter->pdev, reg, value);
4859 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4861 struct e1000_adapter *adapter = hw->back;
4863 pci_write_config_word(adapter->pdev, reg, *value);
4867 e1000_pcix_get_mmrbc(struct e1000_hw *hw)
4869 struct e1000_adapter *adapter = hw->back;
4870 return pcix_get_mmrbc(adapter->pdev);
4874 e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
4876 struct e1000_adapter *adapter = hw->back;
4877 pcix_set_mmrbc(adapter->pdev, mmrbc);
4881 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4883 struct e1000_adapter *adapter = hw->back;
4884 uint16_t cap_offset;
4886 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4888 return -E1000_ERR_CONFIG;
4890 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4892 return E1000_SUCCESS;
4896 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4902 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4904 struct e1000_adapter *adapter = netdev_priv(netdev);
4905 uint32_t ctrl, rctl;
4907 e1000_irq_disable(adapter);
4908 adapter->vlgrp = grp;
4911 /* enable VLAN tag insert/strip */
4912 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4913 ctrl |= E1000_CTRL_VME;
4914 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4916 if (adapter->hw.mac_type != e1000_ich8lan) {
4917 /* enable VLAN receive filtering */
4918 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4919 rctl |= E1000_RCTL_VFE;
4920 rctl &= ~E1000_RCTL_CFIEN;
4921 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4922 e1000_update_mng_vlan(adapter);
4925 /* disable VLAN tag insert/strip */
4926 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4927 ctrl &= ~E1000_CTRL_VME;
4928 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4930 if (adapter->hw.mac_type != e1000_ich8lan) {
4931 /* disable VLAN filtering */
4932 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4933 rctl &= ~E1000_RCTL_VFE;
4934 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4935 if (adapter->mng_vlan_id !=
4936 (uint16_t)E1000_MNG_VLAN_NONE) {
4937 e1000_vlan_rx_kill_vid(netdev,
4938 adapter->mng_vlan_id);
4939 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4944 e1000_irq_enable(adapter);
4948 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4950 struct e1000_adapter *adapter = netdev_priv(netdev);
4951 uint32_t vfta, index;
4953 if ((adapter->hw.mng_cookie.status &
4954 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4955 (vid == adapter->mng_vlan_id))
4957 /* add VID to filter table */
4958 index = (vid >> 5) & 0x7F;
4959 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4960 vfta |= (1 << (vid & 0x1F));
4961 e1000_write_vfta(&adapter->hw, index, vfta);
4965 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4967 struct e1000_adapter *adapter = netdev_priv(netdev);
4968 uint32_t vfta, index;
4970 e1000_irq_disable(adapter);
4971 vlan_group_set_device(adapter->vlgrp, vid, NULL);
4972 e1000_irq_enable(adapter);
4974 if ((adapter->hw.mng_cookie.status &
4975 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4976 (vid == adapter->mng_vlan_id)) {
4977 /* release control to f/w */
4978 e1000_release_hw_control(adapter);
4982 /* remove VID from filter table */
4983 index = (vid >> 5) & 0x7F;
4984 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4985 vfta &= ~(1 << (vid & 0x1F));
4986 e1000_write_vfta(&adapter->hw, index, vfta);
4990 e1000_restore_vlan(struct e1000_adapter *adapter)
4992 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4994 if (adapter->vlgrp) {
4996 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4997 if (!vlan_group_get_device(adapter->vlgrp, vid))
4999 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5005 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5007 adapter->hw.autoneg = 0;
5009 /* Fiber NICs only allow 1000 gbps Full duplex */
5010 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5011 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5012 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5017 case SPEED_10 + DUPLEX_HALF:
5018 adapter->hw.forced_speed_duplex = e1000_10_half;
5020 case SPEED_10 + DUPLEX_FULL:
5021 adapter->hw.forced_speed_duplex = e1000_10_full;
5023 case SPEED_100 + DUPLEX_HALF:
5024 adapter->hw.forced_speed_duplex = e1000_100_half;
5026 case SPEED_100 + DUPLEX_FULL:
5027 adapter->hw.forced_speed_duplex = e1000_100_full;
5029 case SPEED_1000 + DUPLEX_FULL:
5030 adapter->hw.autoneg = 1;
5031 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5033 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5035 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5042 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5044 struct net_device *netdev = pci_get_drvdata(pdev);
5045 struct e1000_adapter *adapter = netdev_priv(netdev);
5046 uint32_t ctrl, ctrl_ext, rctl, status;
5047 uint32_t wufc = adapter->wol;
5052 netif_device_detach(netdev);
5054 if (netif_running(netdev)) {
5055 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5056 e1000_down(adapter);
5060 retval = pci_save_state(pdev);
5065 status = E1000_READ_REG(&adapter->hw, STATUS);
5066 if (status & E1000_STATUS_LU)
5067 wufc &= ~E1000_WUFC_LNKC;
5070 e1000_setup_rctl(adapter);
5071 e1000_set_multi(netdev);
5073 /* turn on all-multi mode if wake on multicast is enabled */
5074 if (wufc & E1000_WUFC_MC) {
5075 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5076 rctl |= E1000_RCTL_MPE;
5077 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5080 if (adapter->hw.mac_type >= e1000_82540) {
5081 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5082 /* advertise wake from D3Cold */
5083 #define E1000_CTRL_ADVD3WUC 0x00100000
5084 /* phy power management enable */
5085 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5086 ctrl |= E1000_CTRL_ADVD3WUC |
5087 E1000_CTRL_EN_PHY_PWR_MGMT;
5088 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5091 if (adapter->hw.media_type == e1000_media_type_fiber ||
5092 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5093 /* keep the laser running in D3 */
5094 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5095 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5096 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5099 /* Allow time for pending master requests to run */
5100 e1000_disable_pciex_master(&adapter->hw);
5102 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5103 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5104 pci_enable_wake(pdev, PCI_D3hot, 1);
5105 pci_enable_wake(pdev, PCI_D3cold, 1);
5107 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5108 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5109 pci_enable_wake(pdev, PCI_D3hot, 0);
5110 pci_enable_wake(pdev, PCI_D3cold, 0);
5113 e1000_release_manageability(adapter);
5115 /* make sure adapter isn't asleep if manageability is enabled */
5116 if (adapter->en_mng_pt) {
5117 pci_enable_wake(pdev, PCI_D3hot, 1);
5118 pci_enable_wake(pdev, PCI_D3cold, 1);
5121 if (adapter->hw.phy_type == e1000_phy_igp_3)
5122 e1000_phy_powerdown_workaround(&adapter->hw);
5124 if (netif_running(netdev))
5125 e1000_free_irq(adapter);
5127 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5128 * would have already happened in close and is redundant. */
5129 e1000_release_hw_control(adapter);
5131 pci_disable_device(pdev);
5133 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5140 e1000_resume(struct pci_dev *pdev)
5142 struct net_device *netdev = pci_get_drvdata(pdev);
5143 struct e1000_adapter *adapter = netdev_priv(netdev);
5146 pci_set_power_state(pdev, PCI_D0);
5147 pci_restore_state(pdev);
5148 if ((err = pci_enable_device(pdev))) {
5149 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5152 pci_set_master(pdev);
5154 pci_enable_wake(pdev, PCI_D3hot, 0);
5155 pci_enable_wake(pdev, PCI_D3cold, 0);
5157 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5160 e1000_power_up_phy(adapter);
5161 e1000_reset(adapter);
5162 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5164 e1000_init_manageability(adapter);
5166 if (netif_running(netdev))
5169 netif_device_attach(netdev);
5171 /* If the controller is 82573 and f/w is AMT, do not set
5172 * DRV_LOAD until the interface is up. For all other cases,
5173 * let the f/w know that the h/w is now under the control
5175 if (adapter->hw.mac_type != e1000_82573 ||
5176 !e1000_check_mng_mode(&adapter->hw))
5177 e1000_get_hw_control(adapter);
5183 static void e1000_shutdown(struct pci_dev *pdev)
5185 e1000_suspend(pdev, PMSG_SUSPEND);
5188 #ifdef CONFIG_NET_POLL_CONTROLLER
5190 * Polling 'interrupt' - used by things like netconsole to send skbs
5191 * without having to re-enable interrupts. It's not called while
5192 * the interrupt routine is executing.
5195 e1000_netpoll(struct net_device *netdev)
5197 struct e1000_adapter *adapter = netdev_priv(netdev);
5199 disable_irq(adapter->pdev->irq);
5200 e1000_intr(adapter->pdev->irq, netdev);
5201 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5202 #ifndef CONFIG_E1000_NAPI
5203 adapter->clean_rx(adapter, adapter->rx_ring);
5205 enable_irq(adapter->pdev->irq);
5210 * e1000_io_error_detected - called when PCI error is detected
5211 * @pdev: Pointer to PCI device
5212 * @state: The current pci conneection state
5214 * This function is called after a PCI bus error affecting
5215 * this device has been detected.
5217 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5219 struct net_device *netdev = pci_get_drvdata(pdev);
5220 struct e1000_adapter *adapter = netdev->priv;
5222 netif_device_detach(netdev);
5224 if (netif_running(netdev))
5225 e1000_down(adapter);
5226 pci_disable_device(pdev);
5228 /* Request a slot slot reset. */
5229 return PCI_ERS_RESULT_NEED_RESET;
5233 * e1000_io_slot_reset - called after the pci bus has been reset.
5234 * @pdev: Pointer to PCI device
5236 * Restart the card from scratch, as if from a cold-boot. Implementation
5237 * resembles the first-half of the e1000_resume routine.
5239 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5241 struct net_device *netdev = pci_get_drvdata(pdev);
5242 struct e1000_adapter *adapter = netdev->priv;
5244 if (pci_enable_device(pdev)) {
5245 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5246 return PCI_ERS_RESULT_DISCONNECT;
5248 pci_set_master(pdev);
5250 pci_enable_wake(pdev, PCI_D3hot, 0);
5251 pci_enable_wake(pdev, PCI_D3cold, 0);
5253 e1000_reset(adapter);
5254 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5256 return PCI_ERS_RESULT_RECOVERED;
5260 * e1000_io_resume - called when traffic can start flowing again.
5261 * @pdev: Pointer to PCI device
5263 * This callback is called when the error recovery driver tells us that
5264 * its OK to resume normal operation. Implementation resembles the
5265 * second-half of the e1000_resume routine.
5267 static void e1000_io_resume(struct pci_dev *pdev)
5269 struct net_device *netdev = pci_get_drvdata(pdev);
5270 struct e1000_adapter *adapter = netdev->priv;
5272 e1000_init_manageability(adapter);
5274 if (netif_running(netdev)) {
5275 if (e1000_up(adapter)) {
5276 printk("e1000: can't bring device back up after reset\n");
5281 netif_device_attach(netdev);
5283 /* If the controller is 82573 and f/w is AMT, do not set
5284 * DRV_LOAD until the interface is up. For all other cases,
5285 * let the f/w know that the h/w is now under the control
5287 if (adapter->hw.mac_type != e1000_82573 ||
5288 !e1000_check_mng_mode(&adapter->hw))
5289 e1000_get_hw_control(adapter);