1 /*******************************************************************************
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 /* ethtool support for e1000 */
33 #include <asm/uaccess.h>
35 extern char e1000_driver_name[];
36 extern char e1000_driver_version[];
38 extern int e1000_up(struct e1000_adapter *adapter);
39 extern void e1000_down(struct e1000_adapter *adapter);
40 extern void e1000_reinit_locked(struct e1000_adapter *adapter);
41 extern void e1000_reset(struct e1000_adapter *adapter);
42 extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
43 extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
44 extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
45 extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
46 extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
47 extern void e1000_update_stats(struct e1000_adapter *adapter);
51 char stat_string[ETH_GSTRING_LEN];
56 #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
57 offsetof(struct e1000_adapter, m)
58 static const struct e1000_stats e1000_gstrings_stats[] = {
59 { "rx_packets", E1000_STAT(stats.gprc) },
60 { "tx_packets", E1000_STAT(stats.gptc) },
61 { "rx_bytes", E1000_STAT(stats.gorcl) },
62 { "tx_bytes", E1000_STAT(stats.gotcl) },
63 { "rx_broadcast", E1000_STAT(stats.bprc) },
64 { "tx_broadcast", E1000_STAT(stats.bptc) },
65 { "rx_multicast", E1000_STAT(stats.mprc) },
66 { "tx_multicast", E1000_STAT(stats.mptc) },
67 { "rx_errors", E1000_STAT(stats.rxerrc) },
68 { "tx_errors", E1000_STAT(stats.txerrc) },
69 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
70 { "multicast", E1000_STAT(stats.mprc) },
71 { "collisions", E1000_STAT(stats.colc) },
72 { "rx_length_errors", E1000_STAT(stats.rlerrc) },
73 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
74 { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
75 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
76 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
77 { "rx_missed_errors", E1000_STAT(stats.mpc) },
78 { "tx_aborted_errors", E1000_STAT(stats.ecol) },
79 { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
80 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
81 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
82 { "tx_window_errors", E1000_STAT(stats.latecol) },
83 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
84 { "tx_deferred_ok", E1000_STAT(stats.dc) },
85 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
86 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
87 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
88 { "tx_restart_queue", E1000_STAT(restart_queue) },
89 { "rx_long_length_errors", E1000_STAT(stats.roc) },
90 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
91 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
92 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
93 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
94 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
95 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
96 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
97 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
98 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
99 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
100 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
101 { "rx_header_split", E1000_STAT(rx_hdr_split) },
102 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
103 { "tx_smbus", E1000_STAT(stats.mgptc) },
104 { "rx_smbus", E1000_STAT(stats.mgprc) },
105 { "dropped_smbus", E1000_STAT(stats.mgpdc) },
108 #define E1000_QUEUE_STATS_LEN 0
109 #define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
110 #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
111 static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
112 "Register test (offline)", "Eeprom test (offline)",
113 "Interrupt test (offline)", "Loopback test (offline)",
114 "Link test (on/offline)"
116 #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
119 e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
121 struct e1000_adapter *adapter = netdev_priv(netdev);
122 struct e1000_hw *hw = &adapter->hw;
124 if (hw->media_type == e1000_media_type_copper) {
126 ecmd->supported = (SUPPORTED_10baseT_Half |
127 SUPPORTED_10baseT_Full |
128 SUPPORTED_100baseT_Half |
129 SUPPORTED_100baseT_Full |
130 SUPPORTED_1000baseT_Full|
133 if (hw->phy_type == e1000_phy_ife)
134 ecmd->supported &= ~SUPPORTED_1000baseT_Full;
135 ecmd->advertising = ADVERTISED_TP;
137 if (hw->autoneg == 1) {
138 ecmd->advertising |= ADVERTISED_Autoneg;
139 /* the e1000 autoneg seems to match ethtool nicely */
140 ecmd->advertising |= hw->autoneg_advertised;
143 ecmd->port = PORT_TP;
144 ecmd->phy_address = hw->phy_addr;
146 if (hw->mac_type == e1000_82543)
147 ecmd->transceiver = XCVR_EXTERNAL;
149 ecmd->transceiver = XCVR_INTERNAL;
152 ecmd->supported = (SUPPORTED_1000baseT_Full |
156 ecmd->advertising = (ADVERTISED_1000baseT_Full |
160 ecmd->port = PORT_FIBRE;
162 if (hw->mac_type >= e1000_82545)
163 ecmd->transceiver = XCVR_INTERNAL;
165 ecmd->transceiver = XCVR_EXTERNAL;
168 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) {
170 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
171 &adapter->link_duplex);
172 ecmd->speed = adapter->link_speed;
174 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
175 * and HALF_DUPLEX != DUPLEX_HALF */
177 if (adapter->link_duplex == FULL_DUPLEX)
178 ecmd->duplex = DUPLEX_FULL;
180 ecmd->duplex = DUPLEX_HALF;
186 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
187 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
192 e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
194 struct e1000_adapter *adapter = netdev_priv(netdev);
195 struct e1000_hw *hw = &adapter->hw;
197 /* When SoL/IDER sessions are active, autoneg/speed/duplex
198 * cannot be changed */
199 if (e1000_check_phy_reset_block(hw)) {
200 DPRINTK(DRV, ERR, "Cannot change link characteristics "
201 "when SoL/IDER is active.\n");
205 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
208 if (ecmd->autoneg == AUTONEG_ENABLE) {
210 if (hw->media_type == e1000_media_type_fiber)
211 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
215 hw->autoneg_advertised = ecmd->advertising |
218 ecmd->advertising = hw->autoneg_advertised;
220 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
221 clear_bit(__E1000_RESETTING, &adapter->flags);
227 if (netif_running(adapter->netdev)) {
231 e1000_reset(adapter);
233 clear_bit(__E1000_RESETTING, &adapter->flags);
238 e1000_get_pauseparam(struct net_device *netdev,
239 struct ethtool_pauseparam *pause)
241 struct e1000_adapter *adapter = netdev_priv(netdev);
242 struct e1000_hw *hw = &adapter->hw;
245 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
247 if (hw->fc == E1000_FC_RX_PAUSE)
249 else if (hw->fc == E1000_FC_TX_PAUSE)
251 else if (hw->fc == E1000_FC_FULL) {
258 e1000_set_pauseparam(struct net_device *netdev,
259 struct ethtool_pauseparam *pause)
261 struct e1000_adapter *adapter = netdev_priv(netdev);
262 struct e1000_hw *hw = &adapter->hw;
265 adapter->fc_autoneg = pause->autoneg;
267 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
270 if (pause->rx_pause && pause->tx_pause)
271 hw->fc = E1000_FC_FULL;
272 else if (pause->rx_pause && !pause->tx_pause)
273 hw->fc = E1000_FC_RX_PAUSE;
274 else if (!pause->rx_pause && pause->tx_pause)
275 hw->fc = E1000_FC_TX_PAUSE;
276 else if (!pause->rx_pause && !pause->tx_pause)
277 hw->fc = E1000_FC_NONE;
279 hw->original_fc = hw->fc;
281 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
282 if (netif_running(adapter->netdev)) {
286 e1000_reset(adapter);
288 retval = ((hw->media_type == e1000_media_type_fiber) ?
289 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
291 clear_bit(__E1000_RESETTING, &adapter->flags);
296 e1000_get_rx_csum(struct net_device *netdev)
298 struct e1000_adapter *adapter = netdev_priv(netdev);
299 return adapter->rx_csum;
303 e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
305 struct e1000_adapter *adapter = netdev_priv(netdev);
306 adapter->rx_csum = data;
308 if (netif_running(netdev))
309 e1000_reinit_locked(adapter);
311 e1000_reset(adapter);
316 e1000_get_tx_csum(struct net_device *netdev)
318 return (netdev->features & NETIF_F_HW_CSUM) != 0;
322 e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
324 struct e1000_adapter *adapter = netdev_priv(netdev);
326 if (adapter->hw.mac_type < e1000_82543) {
333 netdev->features |= NETIF_F_HW_CSUM;
335 netdev->features &= ~NETIF_F_HW_CSUM;
341 e1000_set_tso(struct net_device *netdev, uint32_t data)
343 struct e1000_adapter *adapter = netdev_priv(netdev);
344 if ((adapter->hw.mac_type < e1000_82544) ||
345 (adapter->hw.mac_type == e1000_82547))
346 return data ? -EINVAL : 0;
349 netdev->features |= NETIF_F_TSO;
351 netdev->features &= ~NETIF_F_TSO;
354 netdev->features |= NETIF_F_TSO6;
356 netdev->features &= ~NETIF_F_TSO6;
358 DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
359 adapter->tso_force = TRUE;
364 e1000_get_msglevel(struct net_device *netdev)
366 struct e1000_adapter *adapter = netdev_priv(netdev);
367 return adapter->msg_enable;
371 e1000_set_msglevel(struct net_device *netdev, uint32_t data)
373 struct e1000_adapter *adapter = netdev_priv(netdev);
374 adapter->msg_enable = data;
378 e1000_get_regs_len(struct net_device *netdev)
380 #define E1000_REGS_LEN 32
381 return E1000_REGS_LEN * sizeof(uint32_t);
385 e1000_get_regs(struct net_device *netdev,
386 struct ethtool_regs *regs, void *p)
388 struct e1000_adapter *adapter = netdev_priv(netdev);
389 struct e1000_hw *hw = &adapter->hw;
390 uint32_t *regs_buff = p;
393 memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
395 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
397 regs_buff[0] = E1000_READ_REG(hw, CTRL);
398 regs_buff[1] = E1000_READ_REG(hw, STATUS);
400 regs_buff[2] = E1000_READ_REG(hw, RCTL);
401 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
402 regs_buff[4] = E1000_READ_REG(hw, RDH);
403 regs_buff[5] = E1000_READ_REG(hw, RDT);
404 regs_buff[6] = E1000_READ_REG(hw, RDTR);
406 regs_buff[7] = E1000_READ_REG(hw, TCTL);
407 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
408 regs_buff[9] = E1000_READ_REG(hw, TDH);
409 regs_buff[10] = E1000_READ_REG(hw, TDT);
410 regs_buff[11] = E1000_READ_REG(hw, TIDV);
412 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
413 if (hw->phy_type == e1000_phy_igp) {
414 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
415 IGP01E1000_PHY_AGC_A);
416 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
417 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
418 regs_buff[13] = (uint32_t)phy_data; /* cable length */
419 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
420 IGP01E1000_PHY_AGC_B);
421 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
422 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
423 regs_buff[14] = (uint32_t)phy_data; /* cable length */
424 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
425 IGP01E1000_PHY_AGC_C);
426 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
427 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
428 regs_buff[15] = (uint32_t)phy_data; /* cable length */
429 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
430 IGP01E1000_PHY_AGC_D);
431 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
432 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
433 regs_buff[16] = (uint32_t)phy_data; /* cable length */
434 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
435 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
436 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
437 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
438 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
439 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
440 IGP01E1000_PHY_PCS_INIT_REG);
441 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
442 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
443 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
444 regs_buff[20] = 0; /* polarity correction enabled (always) */
445 regs_buff[22] = 0; /* phy receive errors (unavailable) */
446 regs_buff[23] = regs_buff[18]; /* mdix mode */
447 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
449 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
450 regs_buff[13] = (uint32_t)phy_data; /* cable length */
451 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
452 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
453 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
454 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
455 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
456 regs_buff[18] = regs_buff[13]; /* cable polarity */
457 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
458 regs_buff[20] = regs_buff[17]; /* polarity correction */
459 /* phy receive errors */
460 regs_buff[22] = adapter->phy_stats.receive_errors;
461 regs_buff[23] = regs_buff[13]; /* mdix mode */
463 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
464 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
465 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
466 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
467 if (hw->mac_type >= e1000_82540 &&
468 hw->mac_type < e1000_82571 &&
469 hw->media_type == e1000_media_type_copper) {
470 regs_buff[26] = E1000_READ_REG(hw, MANC);
475 e1000_get_eeprom_len(struct net_device *netdev)
477 struct e1000_adapter *adapter = netdev_priv(netdev);
478 return adapter->hw.eeprom.word_size * 2;
482 e1000_get_eeprom(struct net_device *netdev,
483 struct ethtool_eeprom *eeprom, uint8_t *bytes)
485 struct e1000_adapter *adapter = netdev_priv(netdev);
486 struct e1000_hw *hw = &adapter->hw;
487 uint16_t *eeprom_buff;
488 int first_word, last_word;
492 if (eeprom->len == 0)
495 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
497 first_word = eeprom->offset >> 1;
498 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
500 eeprom_buff = kmalloc(sizeof(uint16_t) *
501 (last_word - first_word + 1), GFP_KERNEL);
505 if (hw->eeprom.type == e1000_eeprom_spi)
506 ret_val = e1000_read_eeprom(hw, first_word,
507 last_word - first_word + 1,
510 for (i = 0; i < last_word - first_word + 1; i++)
511 if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
516 /* Device's eeprom is always little-endian, word addressable */
517 for (i = 0; i < last_word - first_word + 1; i++)
518 le16_to_cpus(&eeprom_buff[i]);
520 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
528 e1000_set_eeprom(struct net_device *netdev,
529 struct ethtool_eeprom *eeprom, uint8_t *bytes)
531 struct e1000_adapter *adapter = netdev_priv(netdev);
532 struct e1000_hw *hw = &adapter->hw;
533 uint16_t *eeprom_buff;
535 int max_len, first_word, last_word, ret_val = 0;
538 if (eeprom->len == 0)
541 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
544 max_len = hw->eeprom.word_size * 2;
546 first_word = eeprom->offset >> 1;
547 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
548 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
552 ptr = (void *)eeprom_buff;
554 if (eeprom->offset & 1) {
555 /* need read/modify/write of first changed EEPROM word */
556 /* only the second byte of the word is being modified */
557 ret_val = e1000_read_eeprom(hw, first_word, 1,
561 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
562 /* need read/modify/write of last changed EEPROM word */
563 /* only the first byte of the word is being modified */
564 ret_val = e1000_read_eeprom(hw, last_word, 1,
565 &eeprom_buff[last_word - first_word]);
568 /* Device's eeprom is always little-endian, word addressable */
569 for (i = 0; i < last_word - first_word + 1; i++)
570 le16_to_cpus(&eeprom_buff[i]);
572 memcpy(ptr, bytes, eeprom->len);
574 for (i = 0; i < last_word - first_word + 1; i++)
575 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
577 ret_val = e1000_write_eeprom(hw, first_word,
578 last_word - first_word + 1, eeprom_buff);
580 /* Update the checksum over the first part of the EEPROM if needed
581 * and flush shadow RAM for 82573 conrollers */
582 if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
583 (hw->mac_type == e1000_82573)))
584 e1000_update_eeprom_checksum(hw);
591 e1000_get_drvinfo(struct net_device *netdev,
592 struct ethtool_drvinfo *drvinfo)
594 struct e1000_adapter *adapter = netdev_priv(netdev);
595 char firmware_version[32];
596 uint16_t eeprom_data;
598 strncpy(drvinfo->driver, e1000_driver_name, 32);
599 strncpy(drvinfo->version, e1000_driver_version, 32);
601 /* EEPROM image version # is reported as firmware version # for
602 * 8257{1|2|3} controllers */
603 e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
604 switch (adapter->hw.mac_type) {
608 case e1000_80003es2lan:
610 sprintf(firmware_version, "%d.%d-%d",
611 (eeprom_data & 0xF000) >> 12,
612 (eeprom_data & 0x0FF0) >> 4,
613 eeprom_data & 0x000F);
616 sprintf(firmware_version, "N/A");
619 strncpy(drvinfo->fw_version, firmware_version, 32);
620 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
621 drvinfo->regdump_len = e1000_get_regs_len(netdev);
622 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
626 e1000_get_ringparam(struct net_device *netdev,
627 struct ethtool_ringparam *ring)
629 struct e1000_adapter *adapter = netdev_priv(netdev);
630 e1000_mac_type mac_type = adapter->hw.mac_type;
631 struct e1000_tx_ring *txdr = adapter->tx_ring;
632 struct e1000_rx_ring *rxdr = adapter->rx_ring;
634 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
636 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
638 ring->rx_mini_max_pending = 0;
639 ring->rx_jumbo_max_pending = 0;
640 ring->rx_pending = rxdr->count;
641 ring->tx_pending = txdr->count;
642 ring->rx_mini_pending = 0;
643 ring->rx_jumbo_pending = 0;
647 e1000_set_ringparam(struct net_device *netdev,
648 struct ethtool_ringparam *ring)
650 struct e1000_adapter *adapter = netdev_priv(netdev);
651 e1000_mac_type mac_type = adapter->hw.mac_type;
652 struct e1000_tx_ring *txdr, *tx_old;
653 struct e1000_rx_ring *rxdr, *rx_old;
656 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
659 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
662 if (netif_running(adapter->netdev))
665 tx_old = adapter->tx_ring;
666 rx_old = adapter->rx_ring;
669 txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring), GFP_KERNEL);
673 rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring), GFP_KERNEL);
677 adapter->tx_ring = txdr;
678 adapter->rx_ring = rxdr;
680 rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
681 rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
682 E1000_MAX_RXD : E1000_MAX_82544_RXD));
683 rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
685 txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
686 txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
687 E1000_MAX_TXD : E1000_MAX_82544_TXD));
688 txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
690 for (i = 0; i < adapter->num_tx_queues; i++)
691 txdr[i].count = txdr->count;
692 for (i = 0; i < adapter->num_rx_queues; i++)
693 rxdr[i].count = rxdr->count;
695 if (netif_running(adapter->netdev)) {
696 /* Try to get new resources before deleting old */
697 if ((err = e1000_setup_all_rx_resources(adapter)))
699 if ((err = e1000_setup_all_tx_resources(adapter)))
702 /* save the new, restore the old in order to free it,
703 * then restore the new back again */
705 adapter->rx_ring = rx_old;
706 adapter->tx_ring = tx_old;
707 e1000_free_all_rx_resources(adapter);
708 e1000_free_all_tx_resources(adapter);
711 adapter->rx_ring = rxdr;
712 adapter->tx_ring = txdr;
713 if ((err = e1000_up(adapter)))
717 clear_bit(__E1000_RESETTING, &adapter->flags);
720 e1000_free_all_rx_resources(adapter);
722 adapter->rx_ring = rx_old;
723 adapter->tx_ring = tx_old;
730 clear_bit(__E1000_RESETTING, &adapter->flags);
734 #define REG_PATTERN_TEST(R, M, W) \
736 uint32_t pat, value; \
738 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
739 for (pat = 0; pat < ARRAY_SIZE(test); pat++) { \
740 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
741 value = E1000_READ_REG(&adapter->hw, R); \
742 if (value != (test[pat] & W & M)) { \
743 DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
744 "0x%08X expected 0x%08X\n", \
745 E1000_##R, value, (test[pat] & W & M)); \
746 *data = (adapter->hw.mac_type < e1000_82543) ? \
747 E1000_82542_##R : E1000_##R; \
753 #define REG_SET_AND_CHECK(R, M, W) \
756 E1000_WRITE_REG(&adapter->hw, R, W & M); \
757 value = E1000_READ_REG(&adapter->hw, R); \
758 if ((W & M) != (value & M)) { \
759 DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
760 "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
761 *data = (adapter->hw.mac_type < e1000_82543) ? \
762 E1000_82542_##R : E1000_##R; \
768 e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
770 uint32_t value, before, after;
773 /* The status register is Read Only, so a write should fail.
774 * Some bits that get toggled are ignored.
776 switch (adapter->hw.mac_type) {
777 /* there are several bits on newer hardware that are r/w */
780 case e1000_80003es2lan:
792 before = E1000_READ_REG(&adapter->hw, STATUS);
793 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
794 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
795 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
796 if (value != after) {
797 DPRINTK(DRV, ERR, "failed STATUS register test got: "
798 "0x%08X expected: 0x%08X\n", after, value);
802 /* restore previous status */
803 E1000_WRITE_REG(&adapter->hw, STATUS, before);
805 if (adapter->hw.mac_type != e1000_ich8lan) {
806 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
807 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
808 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
809 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
812 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
813 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
814 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
815 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
816 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
817 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
818 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
819 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
820 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
821 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
823 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
825 before = (adapter->hw.mac_type == e1000_ich8lan ?
826 0x06C3B33E : 0x06DFB3FE);
827 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
828 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
830 if (adapter->hw.mac_type >= e1000_82543) {
832 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
833 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
834 if (adapter->hw.mac_type != e1000_ich8lan)
835 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
836 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
837 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
838 value = (adapter->hw.mac_type == e1000_ich8lan ?
839 E1000_RAR_ENTRIES_ICH8LAN : E1000_RAR_ENTRIES);
840 for (i = 0; i < value; i++) {
841 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
847 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
848 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
849 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
850 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
854 value = (adapter->hw.mac_type == e1000_ich8lan ?
855 E1000_MC_TBL_SIZE_ICH8LAN : E1000_MC_TBL_SIZE);
856 for (i = 0; i < value; i++)
857 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
864 e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
867 uint16_t checksum = 0;
871 /* Read and add up the contents of the EEPROM */
872 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
873 if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
880 /* If Checksum is not Correct return error else test passed */
881 if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
888 e1000_test_intr(int irq, void *data)
890 struct net_device *netdev = (struct net_device *) data;
891 struct e1000_adapter *adapter = netdev_priv(netdev);
893 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
899 e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
901 struct net_device *netdev = adapter->netdev;
902 uint32_t mask, i=0, shared_int = TRUE;
903 uint32_t irq = adapter->pdev->irq;
907 /* NOTE: we don't test MSI interrupts here, yet */
908 /* Hook up test interrupt handler just for this test */
909 if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
912 else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED,
913 netdev->name, netdev)) {
917 DPRINTK(HW, INFO, "testing %s interrupt\n",
918 (shared_int ? "shared" : "unshared"));
920 /* Disable all the interrupts */
921 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
924 /* Test each interrupt */
925 for (; i < 10; i++) {
927 if (adapter->hw.mac_type == e1000_ich8lan && i == 8)
930 /* Interrupt to test */
934 /* Disable the interrupt to be reported in
935 * the cause register and then force the same
936 * interrupt and see if one gets posted. If
937 * an interrupt was posted to the bus, the
940 adapter->test_icr = 0;
941 E1000_WRITE_REG(&adapter->hw, IMC, mask);
942 E1000_WRITE_REG(&adapter->hw, ICS, mask);
945 if (adapter->test_icr & mask) {
951 /* Enable the interrupt to be reported in
952 * the cause register and then force the same
953 * interrupt and see if one gets posted. If
954 * an interrupt was not posted to the bus, the
957 adapter->test_icr = 0;
958 E1000_WRITE_REG(&adapter->hw, IMS, mask);
959 E1000_WRITE_REG(&adapter->hw, ICS, mask);
962 if (!(adapter->test_icr & mask)) {
968 /* Disable the other interrupts to be reported in
969 * the cause register and then force the other
970 * interrupts and see if any get posted. If
971 * an interrupt was posted to the bus, the
974 adapter->test_icr = 0;
975 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
976 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
979 if (adapter->test_icr) {
986 /* Disable all the interrupts */
987 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
990 /* Unhook test interrupt handler */
991 free_irq(irq, netdev);
997 e1000_free_desc_rings(struct e1000_adapter *adapter)
999 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1000 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1001 struct pci_dev *pdev = adapter->pdev;
1004 if (txdr->desc && txdr->buffer_info) {
1005 for (i = 0; i < txdr->count; i++) {
1006 if (txdr->buffer_info[i].dma)
1007 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
1008 txdr->buffer_info[i].length,
1010 if (txdr->buffer_info[i].skb)
1011 dev_kfree_skb(txdr->buffer_info[i].skb);
1015 if (rxdr->desc && rxdr->buffer_info) {
1016 for (i = 0; i < rxdr->count; i++) {
1017 if (rxdr->buffer_info[i].dma)
1018 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
1019 rxdr->buffer_info[i].length,
1020 PCI_DMA_FROMDEVICE);
1021 if (rxdr->buffer_info[i].skb)
1022 dev_kfree_skb(rxdr->buffer_info[i].skb);
1027 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
1031 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
1035 kfree(txdr->buffer_info);
1036 txdr->buffer_info = NULL;
1037 kfree(rxdr->buffer_info);
1038 rxdr->buffer_info = NULL;
1044 e1000_setup_desc_rings(struct e1000_adapter *adapter)
1046 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1047 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1048 struct pci_dev *pdev = adapter->pdev;
1052 /* Setup Tx descriptor ring and Tx buffers */
1055 txdr->count = E1000_DEFAULT_TXD;
1057 if (!(txdr->buffer_info = kcalloc(txdr->count,
1058 sizeof(struct e1000_buffer),
1064 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1065 txdr->size = ALIGN(txdr->size, 4096);
1066 if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size,
1071 memset(txdr->desc, 0, txdr->size);
1072 txdr->next_to_use = txdr->next_to_clean = 0;
1074 E1000_WRITE_REG(&adapter->hw, TDBAL,
1075 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
1076 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
1077 E1000_WRITE_REG(&adapter->hw, TDLEN,
1078 txdr->count * sizeof(struct e1000_tx_desc));
1079 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1080 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1081 E1000_WRITE_REG(&adapter->hw, TCTL,
1082 E1000_TCTL_PSP | E1000_TCTL_EN |
1083 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1084 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1086 for (i = 0; i < txdr->count; i++) {
1087 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1088 struct sk_buff *skb;
1089 unsigned int size = 1024;
1091 if (!(skb = alloc_skb(size, GFP_KERNEL))) {
1096 txdr->buffer_info[i].skb = skb;
1097 txdr->buffer_info[i].length = skb->len;
1098 txdr->buffer_info[i].dma =
1099 pci_map_single(pdev, skb->data, skb->len,
1101 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1102 tx_desc->lower.data = cpu_to_le32(skb->len);
1103 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1104 E1000_TXD_CMD_IFCS |
1106 tx_desc->upper.data = 0;
1109 /* Setup Rx descriptor ring and Rx buffers */
1112 rxdr->count = E1000_DEFAULT_RXD;
1114 if (!(rxdr->buffer_info = kcalloc(rxdr->count,
1115 sizeof(struct e1000_buffer),
1121 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
1122 if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1126 memset(rxdr->desc, 0, rxdr->size);
1127 rxdr->next_to_use = rxdr->next_to_clean = 0;
1129 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1130 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1131 E1000_WRITE_REG(&adapter->hw, RDBAL,
1132 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
1133 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1134 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1135 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1136 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1137 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1138 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1139 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1140 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1142 for (i = 0; i < rxdr->count; i++) {
1143 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1144 struct sk_buff *skb;
1146 if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1151 skb_reserve(skb, NET_IP_ALIGN);
1152 rxdr->buffer_info[i].skb = skb;
1153 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1154 rxdr->buffer_info[i].dma =
1155 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1156 PCI_DMA_FROMDEVICE);
1157 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1158 memset(skb->data, 0x00, skb->len);
1164 e1000_free_desc_rings(adapter);
1169 e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1171 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1172 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1173 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1174 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1175 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1179 e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1183 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1184 * Extended PHY Specific Control Register to 25MHz clock. This
1185 * value defaults back to a 2.5MHz clock when the PHY is reset.
1187 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1188 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1189 e1000_write_phy_reg(&adapter->hw,
1190 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1192 /* In addition, because of the s/w reset above, we need to enable
1193 * CRS on TX. This must be set for both full and half duplex
1196 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1197 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1198 e1000_write_phy_reg(&adapter->hw,
1199 M88E1000_PHY_SPEC_CTRL, phy_reg);
1203 e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1208 /* Setup the Device Control Register for PHY loopback test. */
1210 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1211 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1212 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1213 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1214 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1215 E1000_CTRL_FD); /* Force Duplex to FULL */
1217 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1219 /* Read the PHY Specific Control Register (0x10) */
1220 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1222 /* Clear Auto-Crossover bits in PHY Specific Control Register
1225 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1226 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1228 /* Perform software reset on the PHY */
1229 e1000_phy_reset(&adapter->hw);
1231 /* Have to setup TX_CLK and TX_CRS after software reset */
1232 e1000_phy_reset_clk_and_crs(adapter);
1234 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1236 /* Wait for reset to complete. */
1239 /* Have to setup TX_CLK and TX_CRS after software reset */
1240 e1000_phy_reset_clk_and_crs(adapter);
1242 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1243 e1000_phy_disable_receiver(adapter);
1245 /* Set the loopback bit in the PHY control register. */
1246 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1247 phy_reg |= MII_CR_LOOPBACK;
1248 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1250 /* Setup TX_CLK and TX_CRS one more time. */
1251 e1000_phy_reset_clk_and_crs(adapter);
1253 /* Check Phy Configuration */
1254 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1255 if (phy_reg != 0x4100)
1258 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1259 if (phy_reg != 0x0070)
1262 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
1263 if (phy_reg != 0x001A)
1270 e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1272 uint32_t ctrl_reg = 0;
1273 uint32_t stat_reg = 0;
1275 adapter->hw.autoneg = FALSE;
1277 if (adapter->hw.phy_type == e1000_phy_m88) {
1278 /* Auto-MDI/MDIX Off */
1279 e1000_write_phy_reg(&adapter->hw,
1280 M88E1000_PHY_SPEC_CTRL, 0x0808);
1281 /* reset to update Auto-MDI/MDIX */
1282 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1284 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
1285 } else if (adapter->hw.phy_type == e1000_phy_gg82563)
1286 e1000_write_phy_reg(&adapter->hw,
1287 GG82563_PHY_KMRN_MODE_CTRL,
1290 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1292 if (adapter->hw.phy_type == e1000_phy_ife) {
1293 /* force 100, set loopback */
1294 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x6100);
1296 /* Now set up the MAC to the same speed/duplex as the PHY. */
1297 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1298 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1299 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1300 E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1301 E1000_CTRL_FD); /* Force Duplex to FULL */
1303 /* force 1000, set loopback */
1304 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1306 /* Now set up the MAC to the same speed/duplex as the PHY. */
1307 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1308 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1309 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1310 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1311 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1312 E1000_CTRL_FD); /* Force Duplex to FULL */
1315 if (adapter->hw.media_type == e1000_media_type_copper &&
1316 adapter->hw.phy_type == e1000_phy_m88)
1317 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1319 /* Set the ILOS bit on the fiber Nic is half
1320 * duplex link is detected. */
1321 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
1322 if ((stat_reg & E1000_STATUS_FD) == 0)
1323 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1326 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1328 /* Disable the receiver on the PHY so when a cable is plugged in, the
1329 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1331 if (adapter->hw.phy_type == e1000_phy_m88)
1332 e1000_phy_disable_receiver(adapter);
1340 e1000_set_phy_loopback(struct e1000_adapter *adapter)
1342 uint16_t phy_reg = 0;
1345 switch (adapter->hw.mac_type) {
1347 if (adapter->hw.media_type == e1000_media_type_copper) {
1348 /* Attempt to setup Loopback mode on Non-integrated PHY.
1349 * Some PHY registers get corrupted at random, so
1350 * attempt this 10 times.
1352 while (e1000_nonintegrated_phy_loopback(adapter) &&
1362 case e1000_82545_rev_3:
1364 case e1000_82546_rev_3:
1366 case e1000_82541_rev_2:
1368 case e1000_82547_rev_2:
1372 case e1000_80003es2lan:
1374 return e1000_integrated_phy_loopback(adapter);
1378 /* Default PHY loopback work is to read the MII
1379 * control register and assert bit 14 (loopback mode).
1381 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1382 phy_reg |= MII_CR_LOOPBACK;
1383 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1392 e1000_setup_loopback_test(struct e1000_adapter *adapter)
1394 struct e1000_hw *hw = &adapter->hw;
1397 if (hw->media_type == e1000_media_type_fiber ||
1398 hw->media_type == e1000_media_type_internal_serdes) {
1399 switch (hw->mac_type) {
1402 case e1000_82545_rev_3:
1403 case e1000_82546_rev_3:
1404 return e1000_set_phy_loopback(adapter);
1408 #define E1000_SERDES_LB_ON 0x410
1409 e1000_set_phy_loopback(adapter);
1410 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
1415 rctl = E1000_READ_REG(hw, RCTL);
1416 rctl |= E1000_RCTL_LBM_TCVR;
1417 E1000_WRITE_REG(hw, RCTL, rctl);
1420 } else if (hw->media_type == e1000_media_type_copper)
1421 return e1000_set_phy_loopback(adapter);
1427 e1000_loopback_cleanup(struct e1000_adapter *adapter)
1429 struct e1000_hw *hw = &adapter->hw;
1433 rctl = E1000_READ_REG(hw, RCTL);
1434 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1435 E1000_WRITE_REG(hw, RCTL, rctl);
1437 switch (hw->mac_type) {
1440 if (hw->media_type == e1000_media_type_fiber ||
1441 hw->media_type == e1000_media_type_internal_serdes) {
1442 #define E1000_SERDES_LB_OFF 0x400
1443 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
1450 case e1000_82545_rev_3:
1451 case e1000_82546_rev_3:
1454 if (hw->phy_type == e1000_phy_gg82563)
1455 e1000_write_phy_reg(hw,
1456 GG82563_PHY_KMRN_MODE_CTRL,
1458 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1459 if (phy_reg & MII_CR_LOOPBACK) {
1460 phy_reg &= ~MII_CR_LOOPBACK;
1461 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1462 e1000_phy_reset(hw);
1469 e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1471 memset(skb->data, 0xFF, frame_size);
1473 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1474 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1475 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1479 e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1482 if (*(skb->data + 3) == 0xFF) {
1483 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1484 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1492 e1000_run_loopback_test(struct e1000_adapter *adapter)
1494 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1495 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1496 struct pci_dev *pdev = adapter->pdev;
1497 int i, j, k, l, lc, good_cnt, ret_val=0;
1500 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1502 /* Calculate the loop count based on the largest descriptor ring
1503 * The idea is to wrap the largest ring a number of times using 64
1504 * send/receive pairs during each loop
1507 if (rxdr->count <= txdr->count)
1508 lc = ((txdr->count / 64) * 2) + 1;
1510 lc = ((rxdr->count / 64) * 2) + 1;
1513 for (j = 0; j <= lc; j++) { /* loop count loop */
1514 for (i = 0; i < 64; i++) { /* send the packets */
1515 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
1517 pci_dma_sync_single_for_device(pdev,
1518 txdr->buffer_info[k].dma,
1519 txdr->buffer_info[k].length,
1521 if (unlikely(++k == txdr->count)) k = 0;
1523 E1000_WRITE_REG(&adapter->hw, TDT, k);
1525 time = jiffies; /* set the start time for the receive */
1527 do { /* receive the sent packets */
1528 pci_dma_sync_single_for_cpu(pdev,
1529 rxdr->buffer_info[l].dma,
1530 rxdr->buffer_info[l].length,
1531 PCI_DMA_FROMDEVICE);
1533 ret_val = e1000_check_lbtest_frame(
1534 rxdr->buffer_info[l].skb,
1538 if (unlikely(++l == rxdr->count)) l = 0;
1539 /* time + 20 msecs (200 msecs on 2.4) is more than
1540 * enough time to complete the receives, if it's
1541 * exceeded, break and error off
1543 } while (good_cnt < 64 && jiffies < (time + 20));
1544 if (good_cnt != 64) {
1545 ret_val = 13; /* ret_val is the same as mis-compare */
1548 if (jiffies >= (time + 2)) {
1549 ret_val = 14; /* error code for time out error */
1552 } /* end loop count loop */
1557 e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1559 /* PHY loopback cannot be performed if SoL/IDER
1560 * sessions are active */
1561 if (e1000_check_phy_reset_block(&adapter->hw)) {
1562 DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
1563 "when SoL/IDER is active.\n");
1568 if ((*data = e1000_setup_desc_rings(adapter)))
1570 if ((*data = e1000_setup_loopback_test(adapter)))
1572 *data = e1000_run_loopback_test(adapter);
1573 e1000_loopback_cleanup(adapter);
1576 e1000_free_desc_rings(adapter);
1582 e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1585 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1587 adapter->hw.serdes_link_down = TRUE;
1589 /* On some blade server designs, link establishment
1590 * could take as long as 2-3 minutes */
1592 e1000_check_for_link(&adapter->hw);
1593 if (adapter->hw.serdes_link_down == FALSE)
1596 } while (i++ < 3750);
1600 e1000_check_for_link(&adapter->hw);
1601 if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
1604 if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1612 e1000_get_sset_count(struct net_device *netdev, int sset)
1616 return E1000_TEST_LEN;
1618 return E1000_STATS_LEN;
1624 extern void e1000_power_up_phy(struct e1000_adapter *);
1627 e1000_diag_test(struct net_device *netdev,
1628 struct ethtool_test *eth_test, uint64_t *data)
1630 struct e1000_adapter *adapter = netdev_priv(netdev);
1631 boolean_t if_running = netif_running(netdev);
1633 set_bit(__E1000_TESTING, &adapter->flags);
1634 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1637 /* save speed, duplex, autoneg settings */
1638 uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
1639 uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
1640 uint8_t autoneg = adapter->hw.autoneg;
1642 DPRINTK(HW, INFO, "offline testing starting\n");
1644 /* Link test performed before hardware reset so autoneg doesn't
1645 * interfere with test result */
1646 if (e1000_link_test(adapter, &data[4]))
1647 eth_test->flags |= ETH_TEST_FL_FAILED;
1650 /* indicate we're in test mode */
1653 e1000_reset(adapter);
1655 if (e1000_reg_test(adapter, &data[0]))
1656 eth_test->flags |= ETH_TEST_FL_FAILED;
1658 e1000_reset(adapter);
1659 if (e1000_eeprom_test(adapter, &data[1]))
1660 eth_test->flags |= ETH_TEST_FL_FAILED;
1662 e1000_reset(adapter);
1663 if (e1000_intr_test(adapter, &data[2]))
1664 eth_test->flags |= ETH_TEST_FL_FAILED;
1666 e1000_reset(adapter);
1667 /* make sure the phy is powered up */
1668 e1000_power_up_phy(adapter);
1669 if (e1000_loopback_test(adapter, &data[3]))
1670 eth_test->flags |= ETH_TEST_FL_FAILED;
1672 /* restore speed, duplex, autoneg settings */
1673 adapter->hw.autoneg_advertised = autoneg_advertised;
1674 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1675 adapter->hw.autoneg = autoneg;
1677 e1000_reset(adapter);
1678 clear_bit(__E1000_TESTING, &adapter->flags);
1682 DPRINTK(HW, INFO, "online testing starting\n");
1684 if (e1000_link_test(adapter, &data[4]))
1685 eth_test->flags |= ETH_TEST_FL_FAILED;
1687 /* Online tests aren't run; pass by default */
1693 clear_bit(__E1000_TESTING, &adapter->flags);
1695 msleep_interruptible(4 * 1000);
1698 static int e1000_wol_exclusion(struct e1000_adapter *adapter, struct ethtool_wolinfo *wol)
1700 struct e1000_hw *hw = &adapter->hw;
1701 int retval = 1; /* fail by default */
1703 switch (hw->device_id) {
1704 case E1000_DEV_ID_82542:
1705 case E1000_DEV_ID_82543GC_FIBER:
1706 case E1000_DEV_ID_82543GC_COPPER:
1707 case E1000_DEV_ID_82544EI_FIBER:
1708 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1709 case E1000_DEV_ID_82545EM_FIBER:
1710 case E1000_DEV_ID_82545EM_COPPER:
1711 case E1000_DEV_ID_82546GB_QUAD_COPPER:
1712 case E1000_DEV_ID_82546GB_PCIE:
1713 case E1000_DEV_ID_82571EB_SERDES_QUAD:
1714 /* these don't support WoL at all */
1717 case E1000_DEV_ID_82546EB_FIBER:
1718 case E1000_DEV_ID_82546GB_FIBER:
1719 case E1000_DEV_ID_82571EB_FIBER:
1720 case E1000_DEV_ID_82571EB_SERDES:
1721 case E1000_DEV_ID_82571EB_COPPER:
1722 /* Wake events not supported on port B */
1723 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1727 /* return success for non excluded adapter ports */
1730 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1731 case E1000_DEV_ID_82571EB_QUAD_FIBER:
1732 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1733 case E1000_DEV_ID_82571PT_QUAD_COPPER:
1734 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1735 /* quad port adapters only support WoL on port A */
1736 if (!adapter->quad_port_a) {
1740 /* return success for non excluded adapter ports */
1744 /* dual port cards only support WoL on port A from now on
1745 * unless it was enabled in the eeprom for port B
1746 * so exclude FUNC_1 ports from having WoL enabled */
1747 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1 &&
1748 !adapter->eeprom_wol) {
1760 e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1762 struct e1000_adapter *adapter = netdev_priv(netdev);
1764 wol->supported = WAKE_UCAST | WAKE_MCAST |
1765 WAKE_BCAST | WAKE_MAGIC;
1768 /* this function will set ->supported = 0 and return 1 if wol is not
1769 * supported by this hardware */
1770 if (e1000_wol_exclusion(adapter, wol))
1773 /* apply any specific unsupported masks here */
1774 switch (adapter->hw.device_id) {
1775 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1776 /* KSP3 does not suppport UCAST wake-ups */
1777 wol->supported &= ~WAKE_UCAST;
1779 if (adapter->wol & E1000_WUFC_EX)
1780 DPRINTK(DRV, ERR, "Interface does not support "
1781 "directed (unicast) frame wake-up packets\n");
1787 if (adapter->wol & E1000_WUFC_EX)
1788 wol->wolopts |= WAKE_UCAST;
1789 if (adapter->wol & E1000_WUFC_MC)
1790 wol->wolopts |= WAKE_MCAST;
1791 if (adapter->wol & E1000_WUFC_BC)
1792 wol->wolopts |= WAKE_BCAST;
1793 if (adapter->wol & E1000_WUFC_MAG)
1794 wol->wolopts |= WAKE_MAGIC;
1800 e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1802 struct e1000_adapter *adapter = netdev_priv(netdev);
1803 struct e1000_hw *hw = &adapter->hw;
1805 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1808 if (e1000_wol_exclusion(adapter, wol))
1809 return wol->wolopts ? -EOPNOTSUPP : 0;
1811 switch (hw->device_id) {
1812 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1813 if (wol->wolopts & WAKE_UCAST) {
1814 DPRINTK(DRV, ERR, "Interface does not support "
1815 "directed (unicast) frame wake-up packets\n");
1823 /* these settings will always override what we currently have */
1826 if (wol->wolopts & WAKE_UCAST)
1827 adapter->wol |= E1000_WUFC_EX;
1828 if (wol->wolopts & WAKE_MCAST)
1829 adapter->wol |= E1000_WUFC_MC;
1830 if (wol->wolopts & WAKE_BCAST)
1831 adapter->wol |= E1000_WUFC_BC;
1832 if (wol->wolopts & WAKE_MAGIC)
1833 adapter->wol |= E1000_WUFC_MAG;
1838 /* toggle LED 4 times per second = 2 "blinks" per second */
1839 #define E1000_ID_INTERVAL (HZ/4)
1841 /* bit defines for adapter->led_status */
1842 #define E1000_LED_ON 0
1845 e1000_led_blink_callback(unsigned long data)
1847 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1849 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1850 e1000_led_off(&adapter->hw);
1852 e1000_led_on(&adapter->hw);
1854 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1858 e1000_phys_id(struct net_device *netdev, uint32_t data)
1860 struct e1000_adapter *adapter = netdev_priv(netdev);
1862 if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
1863 data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
1865 if (adapter->hw.mac_type < e1000_82571) {
1866 if (!adapter->blink_timer.function) {
1867 init_timer(&adapter->blink_timer);
1868 adapter->blink_timer.function = e1000_led_blink_callback;
1869 adapter->blink_timer.data = (unsigned long) adapter;
1871 e1000_setup_led(&adapter->hw);
1872 mod_timer(&adapter->blink_timer, jiffies);
1873 msleep_interruptible(data * 1000);
1874 del_timer_sync(&adapter->blink_timer);
1875 } else if (adapter->hw.phy_type == e1000_phy_ife) {
1876 if (!adapter->blink_timer.function) {
1877 init_timer(&adapter->blink_timer);
1878 adapter->blink_timer.function = e1000_led_blink_callback;
1879 adapter->blink_timer.data = (unsigned long) adapter;
1881 mod_timer(&adapter->blink_timer, jiffies);
1882 msleep_interruptible(data * 1000);
1883 del_timer_sync(&adapter->blink_timer);
1884 e1000_write_phy_reg(&(adapter->hw), IFE_PHY_SPECIAL_CONTROL_LED, 0);
1886 e1000_blink_led_start(&adapter->hw);
1887 msleep_interruptible(data * 1000);
1890 e1000_led_off(&adapter->hw);
1891 clear_bit(E1000_LED_ON, &adapter->led_status);
1892 e1000_cleanup_led(&adapter->hw);
1898 e1000_nway_reset(struct net_device *netdev)
1900 struct e1000_adapter *adapter = netdev_priv(netdev);
1901 if (netif_running(netdev))
1902 e1000_reinit_locked(adapter);
1907 e1000_get_ethtool_stats(struct net_device *netdev,
1908 struct ethtool_stats *stats, uint64_t *data)
1910 struct e1000_adapter *adapter = netdev_priv(netdev);
1913 e1000_update_stats(adapter);
1914 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1915 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1916 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1917 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1919 /* BUG_ON(i != E1000_STATS_LEN); */
1923 e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
1928 switch (stringset) {
1930 memcpy(data, *e1000_gstrings_test,
1931 E1000_TEST_LEN*ETH_GSTRING_LEN);
1934 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1935 memcpy(p, e1000_gstrings_stats[i].stat_string,
1937 p += ETH_GSTRING_LEN;
1939 /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1944 static const struct ethtool_ops e1000_ethtool_ops = {
1945 .get_settings = e1000_get_settings,
1946 .set_settings = e1000_set_settings,
1947 .get_drvinfo = e1000_get_drvinfo,
1948 .get_regs_len = e1000_get_regs_len,
1949 .get_regs = e1000_get_regs,
1950 .get_wol = e1000_get_wol,
1951 .set_wol = e1000_set_wol,
1952 .get_msglevel = e1000_get_msglevel,
1953 .set_msglevel = e1000_set_msglevel,
1954 .nway_reset = e1000_nway_reset,
1955 .get_link = ethtool_op_get_link,
1956 .get_eeprom_len = e1000_get_eeprom_len,
1957 .get_eeprom = e1000_get_eeprom,
1958 .set_eeprom = e1000_set_eeprom,
1959 .get_ringparam = e1000_get_ringparam,
1960 .set_ringparam = e1000_set_ringparam,
1961 .get_pauseparam = e1000_get_pauseparam,
1962 .set_pauseparam = e1000_set_pauseparam,
1963 .get_rx_csum = e1000_get_rx_csum,
1964 .set_rx_csum = e1000_set_rx_csum,
1965 .get_tx_csum = e1000_get_tx_csum,
1966 .set_tx_csum = e1000_set_tx_csum,
1967 .set_sg = ethtool_op_set_sg,
1968 .set_tso = e1000_set_tso,
1969 .self_test = e1000_diag_test,
1970 .get_strings = e1000_get_strings,
1971 .phys_id = e1000_phys_id,
1972 .get_ethtool_stats = e1000_get_ethtool_stats,
1973 .get_sset_count = e1000_get_sset_count,
1976 void e1000_set_ethtool_ops(struct net_device *netdev)
1978 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);