2 * Davicom DM9000 Fast Ethernet driver for Linux.
3 * Copyright (C) 1997 Sten Wang
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
17 * Additional updates, Copyright:
18 * Ben Dooks <ben@simtec.co.uk>
19 * Sascha Hauer <s.hauer@pengutronix.de>
22 #include <linux/module.h>
23 #include <linux/ioport.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/init.h>
27 #include <linux/skbuff.h>
28 #include <linux/spinlock.h>
29 #include <linux/crc32.h>
30 #include <linux/mii.h>
31 #include <linux/ethtool.h>
32 #include <linux/dm9000.h>
33 #include <linux/delay.h>
34 #include <linux/platform_device.h>
35 #include <linux/irq.h>
37 #include <asm/delay.h>
43 /* Board/System/Debug information/definition ---------------- */
45 #define DM9000_PHY 0x40 /* PHY address 0x01 */
47 #define CARDNAME "dm9000"
48 #define PFX CARDNAME ": "
49 #define DRV_VERSION "1.30"
51 #ifdef CONFIG_BLACKFIN
58 #define DEFAULT_TRIGGER IRQF_TRIGGER_HIGH
60 #define DEFAULT_TRIGGER (0)
64 * Transmit timeout, default 5 seconds.
66 static int watchdog = 5000;
67 module_param(watchdog, int, 0400);
68 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
70 /* DM9000 register address locking.
72 * The DM9000 uses an address register to control where data written
73 * to the data register goes. This means that the address register
74 * must be preserved over interrupts or similar calls.
76 * During interrupt and other critical calls, a spinlock is used to
77 * protect the system, but the calls themselves save the address
78 * in the address register in case they are interrupting another
79 * access to the device.
81 * For general accesses a lock is provided so that calls which are
82 * allowed to sleep are serialised so that the address register does
83 * not need to be saved. This lock also serves to serialise access
84 * to the EEPROM and PHY access registers which are shared between
88 /* The driver supports the original DM9000E, and now the two newer
89 * devices, DM9000A and DM9000B.
93 TYPE_DM9000E, /* original DM9000 */
98 /* Structure/enum declaration ------------------------------- */
99 typedef struct board_info {
101 void __iomem *io_addr; /* Register I/O base address */
102 void __iomem *io_data; /* Data I/O address */
107 u16 queue_start_addr;
109 u8 io_mode; /* 0:word, 2:byte */
113 unsigned int in_suspend :1;
115 enum dm9000_type type;
118 void (*inblk)(void __iomem *port, void *data, int length);
119 void (*outblk)(void __iomem *port, void *data, int length);
120 void (*dumpblk)(void __iomem *port, int length);
122 struct device *dev; /* parent device */
124 struct resource *addr_res; /* resources found */
125 struct resource *data_res;
126 struct resource *addr_req; /* resources requested */
127 struct resource *data_req;
128 struct resource *irq_res;
130 struct mutex addr_lock; /* phy and eeprom access lock */
132 struct delayed_work phy_poll;
133 struct net_device *ndev;
137 struct mii_if_info mii;
143 #define dm9000_dbg(db, lev, msg...) do { \
144 if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
145 (lev) < db->debug_level) { \
146 dev_dbg(db->dev, msg); \
150 static inline board_info_t *to_dm9000_board(struct net_device *dev)
155 /* function declaration ------------------------------------- */
156 static int dm9000_probe(struct platform_device *);
157 static int dm9000_open(struct net_device *);
158 static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
159 static int dm9000_stop(struct net_device *);
160 static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd);
162 static void dm9000_init_dm9000(struct net_device *);
164 static irqreturn_t dm9000_interrupt(int, void *);
166 static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
167 static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
170 static void dm9000_read_eeprom(board_info_t *, int addr, u8 *to);
171 static void dm9000_write_eeprom(board_info_t *, int addr, u8 *dp);
172 static void dm9000_rx(struct net_device *);
173 static void dm9000_hash_table(struct net_device *);
175 /* DM9000 network board routine ---------------------------- */
178 dm9000_reset(board_info_t * db)
180 dev_dbg(db->dev, "resetting device\n");
183 writeb(DM9000_NCR, db->io_addr);
185 writeb(NCR_RST, db->io_data);
190 * Read a byte from I/O port
193 ior(board_info_t * db, int reg)
195 writeb(reg, db->io_addr);
196 return readb(db->io_data);
200 * Write a byte to I/O port
204 iow(board_info_t * db, int reg, int value)
206 writeb(reg, db->io_addr);
207 writeb(value, db->io_data);
210 /* routines for sending block to chip */
212 static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
214 writesb(reg, data, count);
217 static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
219 writesw(reg, data, (count+1) >> 1);
222 static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
224 writesl(reg, data, (count+3) >> 2);
227 /* input block from chip to memory */
229 static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
231 readsb(reg, data, count);
235 static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
237 readsw(reg, data, (count+1) >> 1);
240 static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
242 readsl(reg, data, (count+3) >> 2);
245 /* dump block from chip to null */
247 static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
252 for (i = 0; i < count; i++)
256 static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
261 count = (count + 1) >> 1;
263 for (i = 0; i < count; i++)
267 static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
272 count = (count + 3) >> 2;
274 for (i = 0; i < count; i++)
280 * select the specified set of io routines to use with the
284 static void dm9000_set_io(struct board_info *db, int byte_width)
286 /* use the size of the data resource to work out what IO
287 * routines we want to use
290 switch (byte_width) {
292 db->dumpblk = dm9000_dumpblk_8bit;
293 db->outblk = dm9000_outblk_8bit;
294 db->inblk = dm9000_inblk_8bit;
299 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
301 db->dumpblk = dm9000_dumpblk_16bit;
302 db->outblk = dm9000_outblk_16bit;
303 db->inblk = dm9000_inblk_16bit;
308 db->dumpblk = dm9000_dumpblk_32bit;
309 db->outblk = dm9000_outblk_32bit;
310 db->inblk = dm9000_inblk_32bit;
315 static void dm9000_schedule_poll(board_info_t *db)
317 if (db->type == TYPE_DM9000E)
318 schedule_delayed_work(&db->phy_poll, HZ * 2);
321 /* Our watchdog timed out. Called by the networking layer */
322 static void dm9000_timeout(struct net_device *dev)
324 board_info_t *db = (board_info_t *) dev->priv;
328 /* Save previous register address */
329 reg_save = readb(db->io_addr);
330 spin_lock_irqsave(&db->lock,flags);
332 netif_stop_queue(dev);
334 dm9000_init_dm9000(dev);
335 /* We can accept TX packets again */
336 dev->trans_start = jiffies;
337 netif_wake_queue(dev);
339 /* Restore previous register address */
340 writeb(reg_save, db->io_addr);
341 spin_unlock_irqrestore(&db->lock,flags);
344 #ifdef CONFIG_NET_POLL_CONTROLLER
348 static void dm9000_poll_controller(struct net_device *dev)
350 disable_irq(dev->irq);
351 dm9000_interrupt(dev->irq,dev);
352 enable_irq(dev->irq);
356 static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
358 board_info_t *dm = to_dm9000_board(dev);
360 if (!netif_running(dev))
363 return generic_mii_ioctl(&dm->mii, if_mii(req), cmd, NULL);
368 static void dm9000_get_drvinfo(struct net_device *dev,
369 struct ethtool_drvinfo *info)
371 board_info_t *dm = to_dm9000_board(dev);
373 strcpy(info->driver, CARDNAME);
374 strcpy(info->version, DRV_VERSION);
375 strcpy(info->bus_info, to_platform_device(dm->dev)->name);
378 static u32 dm9000_get_msglevel(struct net_device *dev)
380 board_info_t *dm = to_dm9000_board(dev);
382 return dm->msg_enable;
385 static void dm9000_set_msglevel(struct net_device *dev, u32 value)
387 board_info_t *dm = to_dm9000_board(dev);
389 dm->msg_enable = value;
392 static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
394 board_info_t *dm = to_dm9000_board(dev);
396 mii_ethtool_gset(&dm->mii, cmd);
400 static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
402 board_info_t *dm = to_dm9000_board(dev);
404 return mii_ethtool_sset(&dm->mii, cmd);
407 static int dm9000_nway_reset(struct net_device *dev)
409 board_info_t *dm = to_dm9000_board(dev);
410 return mii_nway_restart(&dm->mii);
413 static u32 dm9000_get_link(struct net_device *dev)
415 board_info_t *dm = to_dm9000_board(dev);
416 return mii_link_ok(&dm->mii);
419 #define DM_EEPROM_MAGIC (0x444D394B)
421 static int dm9000_get_eeprom_len(struct net_device *dev)
426 static int dm9000_get_eeprom(struct net_device *dev,
427 struct ethtool_eeprom *ee, u8 *data)
429 board_info_t *dm = to_dm9000_board(dev);
430 int offset = ee->offset;
434 /* EEPROM access is aligned to two bytes */
436 if ((len & 1) != 0 || (offset & 1) != 0)
439 if (dm->flags & DM9000_PLATF_NO_EEPROM)
442 ee->magic = DM_EEPROM_MAGIC;
444 for (i = 0; i < len; i += 2)
445 dm9000_read_eeprom(dm, (offset + i) / 2, data + i);
450 static int dm9000_set_eeprom(struct net_device *dev,
451 struct ethtool_eeprom *ee, u8 *data)
453 board_info_t *dm = to_dm9000_board(dev);
454 int offset = ee->offset;
458 /* EEPROM access is aligned to two bytes */
460 if ((len & 1) != 0 || (offset & 1) != 0)
463 if (dm->flags & DM9000_PLATF_NO_EEPROM)
466 if (ee->magic != DM_EEPROM_MAGIC)
469 for (i = 0; i < len; i += 2)
470 dm9000_write_eeprom(dm, (offset + i) / 2, data + i);
475 static const struct ethtool_ops dm9000_ethtool_ops = {
476 .get_drvinfo = dm9000_get_drvinfo,
477 .get_settings = dm9000_get_settings,
478 .set_settings = dm9000_set_settings,
479 .get_msglevel = dm9000_get_msglevel,
480 .set_msglevel = dm9000_set_msglevel,
481 .nway_reset = dm9000_nway_reset,
482 .get_link = dm9000_get_link,
483 .get_eeprom_len = dm9000_get_eeprom_len,
484 .get_eeprom = dm9000_get_eeprom,
485 .set_eeprom = dm9000_set_eeprom,
489 dm9000_poll_work(struct work_struct *w)
491 struct delayed_work *dw = container_of(w, struct delayed_work, work);
492 board_info_t *db = container_of(dw, board_info_t, phy_poll);
494 mii_check_media(&db->mii, netif_msg_link(db), 0);
496 if (netif_running(db->ndev))
497 dm9000_schedule_poll(db);
500 /* dm9000_release_board
502 * release a board, and any mapped resources
506 dm9000_release_board(struct platform_device *pdev, struct board_info *db)
508 /* unmap our resources */
510 iounmap(db->io_addr);
511 iounmap(db->io_data);
513 /* release the resources */
515 release_resource(db->data_req);
518 release_resource(db->addr_req);
522 static unsigned char dm9000_type_to_char(enum dm9000_type type)
525 case TYPE_DM9000E: return 'e';
526 case TYPE_DM9000A: return 'a';
527 case TYPE_DM9000B: return 'b';
533 #define res_size(_r) (((_r)->end - (_r)->start) + 1)
536 * Search DM9000 board, allocate space and register it
539 dm9000_probe(struct platform_device *pdev)
541 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
542 struct board_info *db; /* Point a board information structure */
543 struct net_device *ndev;
544 const unsigned char *mac_src;
550 /* Init network device */
551 ndev = alloc_etherdev(sizeof (struct board_info));
553 dev_err(&pdev->dev, "could not allocate device.\n");
557 SET_NETDEV_DEV(ndev, &pdev->dev);
559 dev_dbg(&pdev->dev, "dm9000_probe()\n");
561 /* setup board info structure */
562 db = (struct board_info *) ndev->priv;
563 memset(db, 0, sizeof (*db));
565 db->dev = &pdev->dev;
568 spin_lock_init(&db->lock);
569 mutex_init(&db->addr_lock);
571 INIT_DELAYED_WORK(&db->phy_poll, dm9000_poll_work);
573 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
574 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
575 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
577 if (db->addr_res == NULL || db->data_res == NULL ||
578 db->irq_res == NULL) {
579 dev_err(db->dev, "insufficient resources\n");
584 iosize = res_size(db->addr_res);
585 db->addr_req = request_mem_region(db->addr_res->start, iosize,
588 if (db->addr_req == NULL) {
589 dev_err(db->dev, "cannot claim address reg area\n");
594 db->io_addr = ioremap(db->addr_res->start, iosize);
596 if (db->io_addr == NULL) {
597 dev_err(db->dev, "failed to ioremap address reg\n");
602 iosize = res_size(db->data_res);
603 db->data_req = request_mem_region(db->data_res->start, iosize,
606 if (db->data_req == NULL) {
607 dev_err(db->dev, "cannot claim data reg area\n");
612 db->io_data = ioremap(db->data_res->start, iosize);
614 if (db->io_data == NULL) {
615 dev_err(db->dev, "failed to ioremap data reg\n");
620 /* fill in parameters for net-dev structure */
621 ndev->base_addr = (unsigned long)db->io_addr;
622 ndev->irq = db->irq_res->start;
624 /* ensure at least we have a default set of IO routines */
625 dm9000_set_io(db, iosize);
627 /* check to see if anything is being over-ridden */
629 /* check to see if the driver wants to over-ride the
630 * default IO width */
632 if (pdata->flags & DM9000_PLATF_8BITONLY)
633 dm9000_set_io(db, 1);
635 if (pdata->flags & DM9000_PLATF_16BITONLY)
636 dm9000_set_io(db, 2);
638 if (pdata->flags & DM9000_PLATF_32BITONLY)
639 dm9000_set_io(db, 4);
641 /* check to see if there are any IO routine
644 if (pdata->inblk != NULL)
645 db->inblk = pdata->inblk;
647 if (pdata->outblk != NULL)
648 db->outblk = pdata->outblk;
650 if (pdata->dumpblk != NULL)
651 db->dumpblk = pdata->dumpblk;
653 db->flags = pdata->flags;
658 /* try two times, DM9000 sometimes gets the first read wrong */
659 for (i = 0; i < 8; i++) {
660 id_val = ior(db, DM9000_VIDL);
661 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
662 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
663 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
665 if (id_val == DM9000_ID)
667 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
670 if (id_val != DM9000_ID) {
671 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
676 /* Identify what type of DM9000 we are working on */
678 id_val = ior(db, DM9000_CHIPR);
679 dev_dbg(db->dev, "dm9000 revision 0x%02x\n", id_val);
683 db->type = TYPE_DM9000A;
686 db->type = TYPE_DM9000B;
689 dev_dbg(db->dev, "ID %02x => defaulting to DM9000E\n", id_val);
690 db->type = TYPE_DM9000E;
693 /* from this point we assume that we have found a DM9000 */
695 /* driver system function */
698 ndev->open = &dm9000_open;
699 ndev->hard_start_xmit = &dm9000_start_xmit;
700 ndev->tx_timeout = &dm9000_timeout;
701 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
702 ndev->stop = &dm9000_stop;
703 ndev->set_multicast_list = &dm9000_hash_table;
704 ndev->ethtool_ops = &dm9000_ethtool_ops;
705 ndev->do_ioctl = &dm9000_ioctl;
707 #ifdef CONFIG_NET_POLL_CONTROLLER
708 ndev->poll_controller = &dm9000_poll_controller;
711 db->msg_enable = NETIF_MSG_LINK;
712 db->mii.phy_id_mask = 0x1f;
713 db->mii.reg_num_mask = 0x1f;
714 db->mii.force_media = 0;
715 db->mii.full_duplex = 0;
717 db->mii.mdio_read = dm9000_phy_read;
718 db->mii.mdio_write = dm9000_phy_write;
722 /* try reading the node address from the attached EEPROM */
723 for (i = 0; i < 6; i += 2)
724 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
726 if (!is_valid_ether_addr(ndev->dev_addr)) {
727 /* try reading from mac */
730 for (i = 0; i < 6; i++)
731 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
734 if (!is_valid_ether_addr(ndev->dev_addr))
735 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
736 "set using ifconfig\n", ndev->name);
738 platform_set_drvdata(pdev, ndev);
739 ret = register_netdev(ndev);
742 DECLARE_MAC_BUF(mac);
743 printk(KERN_INFO "%s: dm9000%c at %p,%p IRQ %d MAC: %s (%s)\n",
744 ndev->name, dm9000_type_to_char(db->type),
745 db->io_addr, db->io_data, ndev->irq,
746 print_mac(mac, ndev->dev_addr), mac_src);
751 dev_err(db->dev, "not found (%d).\n", ret);
753 dm9000_release_board(pdev, db);
760 * Open the interface.
761 * The interface is opened whenever "ifconfig" actives it.
764 dm9000_open(struct net_device *dev)
766 board_info_t *db = (board_info_t *) dev->priv;
767 unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
769 if (netif_msg_ifup(db))
770 dev_dbg(db->dev, "enabling %s\n", dev->name);
772 /* If there is no IRQ type specified, default to something that
773 * may work, and tell the user that this is a problem */
775 if (irqflags == IRQF_TRIGGER_NONE) {
776 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
777 irqflags = DEFAULT_TRIGGER;
780 irqflags |= IRQF_SHARED;
782 if (request_irq(dev->irq, &dm9000_interrupt, irqflags, dev->name, dev))
785 /* Initialize DM9000 board */
787 dm9000_init_dm9000(dev);
789 /* Init driver variable */
792 mii_check_media(&db->mii, netif_msg_link(db), 1);
793 netif_start_queue(dev);
795 dm9000_schedule_poll(db);
801 * Initilize dm9000 board
804 dm9000_init_dm9000(struct net_device *dev)
806 board_info_t *db = (board_info_t *) dev->priv;
809 dm9000_dbg(db, 1, "entering %s\n", __func__);
812 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
814 /* GPIO0 on pre-activate PHY */
815 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
816 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
817 iow(db, DM9000_GPR, 0); /* Enable PHY */
819 if (db->flags & DM9000_PLATF_EXT_PHY)
820 iow(db, DM9000_NCR, NCR_EXT_PHY);
822 /* Program operating register */
823 iow(db, DM9000_TCR, 0); /* TX Polling clear */
824 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
825 iow(db, DM9000_FCR, 0xff); /* Flow Control */
826 iow(db, DM9000_SMCR, 0); /* Special Mode */
827 /* clear TX status */
828 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
829 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
831 /* Set address filter table */
832 dm9000_hash_table(dev);
834 imr = IMR_PAR | IMR_PTM | IMR_PRM;
835 if (db->type != TYPE_DM9000E)
840 /* Enable TX/RX interrupt mask */
841 iow(db, DM9000_IMR, imr);
843 /* Init Driver variable */
845 db->queue_pkt_len = 0;
846 dev->trans_start = 0;
850 * Hardware start transmission.
851 * Send a packet to media from the upper layer.
854 dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
857 board_info_t *db = (board_info_t *) dev->priv;
859 dm9000_dbg(db, 3, "%s:\n", __func__);
861 if (db->tx_pkt_cnt > 1)
864 spin_lock_irqsave(&db->lock, flags);
866 /* Move data to DM9000 TX RAM */
867 writeb(DM9000_MWCMD, db->io_addr);
869 (db->outblk)(db->io_data, skb->data, skb->len);
870 dev->stats.tx_bytes += skb->len;
873 /* TX control: First packet immediately send, second packet queue */
874 if (db->tx_pkt_cnt == 1) {
875 /* Set TX length to DM9000 */
876 iow(db, DM9000_TXPLL, skb->len);
877 iow(db, DM9000_TXPLH, skb->len >> 8);
879 /* Issue TX polling command */
880 iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
882 dev->trans_start = jiffies; /* save the time stamp */
885 db->queue_pkt_len = skb->len;
886 netif_stop_queue(dev);
889 spin_unlock_irqrestore(&db->lock, flags);
898 dm9000_shutdown(struct net_device *dev)
900 board_info_t *db = (board_info_t *) dev->priv;
903 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
904 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
905 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
906 iow(db, DM9000_RCR, 0x00); /* Disable RX */
910 * Stop the interface.
911 * The interface is stopped when it is brought.
914 dm9000_stop(struct net_device *ndev)
916 board_info_t *db = (board_info_t *) ndev->priv;
918 if (netif_msg_ifdown(db))
919 dev_dbg(db->dev, "shutting down %s\n", ndev->name);
921 cancel_delayed_work_sync(&db->phy_poll);
923 netif_stop_queue(ndev);
924 netif_carrier_off(ndev);
927 free_irq(ndev->irq, ndev);
929 dm9000_shutdown(ndev);
935 * DM9000 interrupt handler
936 * receive the packet to upper layer, free the transmitted packet
940 dm9000_tx_done(struct net_device *dev, board_info_t * db)
942 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
944 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
945 /* One packet sent complete */
947 dev->stats.tx_packets++;
949 if (netif_msg_tx_done(db))
950 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);
952 /* Queue packet check & send */
953 if (db->tx_pkt_cnt > 0) {
954 iow(db, DM9000_TXPLL, db->queue_pkt_len);
955 iow(db, DM9000_TXPLH, db->queue_pkt_len >> 8);
956 iow(db, DM9000_TCR, TCR_TXREQ);
957 dev->trans_start = jiffies;
959 netif_wake_queue(dev);
964 dm9000_interrupt(int irq, void *dev_id)
966 struct net_device *dev = dev_id;
967 board_info_t *db = (board_info_t *) dev->priv;
971 dm9000_dbg(db, 3, "entering %s\n", __func__);
973 /* A real interrupt coming */
975 spin_lock(&db->lock);
977 /* Save previous register address */
978 reg_save = readb(db->io_addr);
980 /* Disable all interrupts */
981 iow(db, DM9000_IMR, IMR_PAR);
983 /* Got DM9000 interrupt status */
984 int_status = ior(db, DM9000_ISR); /* Got ISR */
985 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
987 if (netif_msg_intr(db))
988 dev_dbg(db->dev, "interrupt status %02x\n", int_status);
990 /* Received the coming packet */
991 if (int_status & ISR_PRS)
994 /* Trnasmit Interrupt check */
995 if (int_status & ISR_PTS)
996 dm9000_tx_done(dev, db);
998 if (db->type != TYPE_DM9000E) {
999 if (int_status & ISR_LNKCHNG) {
1000 /* fire a link-change request */
1001 schedule_delayed_work(&db->phy_poll, 1);
1005 /* Re-enable interrupt mask */
1006 iow(db, DM9000_IMR, db->imr_all);
1008 /* Restore previous register address */
1009 writeb(reg_save, db->io_addr);
1011 spin_unlock(&db->lock);
1016 struct dm9000_rxhdr {
1020 } __attribute__((__packed__));
1023 * Received a packet and pass to upper layer
1026 dm9000_rx(struct net_device *dev)
1028 board_info_t *db = (board_info_t *) dev->priv;
1029 struct dm9000_rxhdr rxhdr;
1030 struct sk_buff *skb;
1035 /* Check packet ready or not */
1037 ior(db, DM9000_MRCMDX); /* Dummy read */
1039 /* Get most updated data */
1040 rxbyte = readb(db->io_data);
1042 /* Status check: this byte must be 0 or 1 */
1043 if (rxbyte > DM9000_PKT_RDY) {
1044 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
1045 iow(db, DM9000_RCR, 0x00); /* Stop Device */
1046 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
1050 if (rxbyte != DM9000_PKT_RDY)
1053 /* A packet ready now & Get status/length */
1055 writeb(DM9000_MRCMD, db->io_addr);
1057 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
1059 RxLen = le16_to_cpu(rxhdr.RxLen);
1061 if (netif_msg_rx_status(db))
1062 dev_dbg(db->dev, "RX: status %02x, length %04x\n",
1063 rxhdr.RxStatus, RxLen);
1065 /* Packet Status check */
1068 if (netif_msg_rx_err(db))
1069 dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
1072 if (RxLen > DM9000_PKT_MAX) {
1073 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
1076 if (rxhdr.RxStatus & 0xbf) {
1078 if (rxhdr.RxStatus & 0x01) {
1079 if (netif_msg_rx_err(db))
1080 dev_dbg(db->dev, "fifo error\n");
1081 dev->stats.rx_fifo_errors++;
1083 if (rxhdr.RxStatus & 0x02) {
1084 if (netif_msg_rx_err(db))
1085 dev_dbg(db->dev, "crc error\n");
1086 dev->stats.rx_crc_errors++;
1088 if (rxhdr.RxStatus & 0x80) {
1089 if (netif_msg_rx_err(db))
1090 dev_dbg(db->dev, "length error\n");
1091 dev->stats.rx_length_errors++;
1095 /* Move data from DM9000 */
1097 && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
1098 skb_reserve(skb, 2);
1099 rdptr = (u8 *) skb_put(skb, RxLen - 4);
1101 /* Read received packet from RX SRAM */
1103 (db->inblk)(db->io_data, rdptr, RxLen);
1104 dev->stats.rx_bytes += RxLen;
1106 /* Pass to upper layer */
1107 skb->protocol = eth_type_trans(skb, dev);
1109 dev->stats.rx_packets++;
1112 /* need to dump the packet's data */
1114 (db->dumpblk)(db->io_data, RxLen);
1116 } while (rxbyte == DM9000_PKT_RDY);
1120 dm9000_read_locked(board_info_t *db, int reg)
1122 unsigned long flags;
1125 spin_lock_irqsave(&db->lock, flags);
1127 spin_unlock_irqrestore(&db->lock, flags);
1132 static int dm9000_wait_eeprom(board_info_t *db)
1134 unsigned int status;
1135 int timeout = 8; /* wait max 8msec */
1137 /* The DM9000 data sheets say we should be able to
1138 * poll the ERRE bit in EPCR to wait for the EEPROM
1139 * operation. From testing several chips, this bit
1140 * does not seem to work.
1142 * We attempt to use the bit, but fall back to the
1143 * timeout (which is why we do not return an error
1144 * on expiry) to say that the EEPROM operation has
1149 status = dm9000_read_locked(db, DM9000_EPCR);
1151 if ((status & EPCR_ERRE) == 0)
1154 if (timeout-- < 0) {
1155 dev_dbg(db->dev, "timeout waiting EEPROM\n");
1164 * Read a word data from EEPROM
1167 dm9000_read_eeprom(board_info_t *db, int offset, u8 *to)
1169 unsigned long flags;
1171 if (db->flags & DM9000_PLATF_NO_EEPROM) {
1177 mutex_lock(&db->addr_lock);
1179 spin_lock_irqsave(&db->lock, flags);
1181 iow(db, DM9000_EPAR, offset);
1182 iow(db, DM9000_EPCR, EPCR_ERPRR);
1184 spin_unlock_irqrestore(&db->lock, flags);
1186 dm9000_wait_eeprom(db);
1188 /* delay for at-least 150uS */
1191 spin_lock_irqsave(&db->lock, flags);
1193 iow(db, DM9000_EPCR, 0x0);
1195 to[0] = ior(db, DM9000_EPDRL);
1196 to[1] = ior(db, DM9000_EPDRH);
1198 spin_unlock_irqrestore(&db->lock, flags);
1200 mutex_unlock(&db->addr_lock);
1204 * Write a word data to SROM
1207 dm9000_write_eeprom(board_info_t *db, int offset, u8 *data)
1209 unsigned long flags;
1211 if (db->flags & DM9000_PLATF_NO_EEPROM)
1214 mutex_lock(&db->addr_lock);
1216 spin_lock_irqsave(&db->lock, flags);
1217 iow(db, DM9000_EPAR, offset);
1218 iow(db, DM9000_EPDRH, data[1]);
1219 iow(db, DM9000_EPDRL, data[0]);
1220 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
1221 spin_unlock_irqrestore(&db->lock, flags);
1223 dm9000_wait_eeprom(db);
1225 mdelay(1); /* wait at least 150uS to clear */
1227 spin_lock_irqsave(&db->lock, flags);
1228 iow(db, DM9000_EPCR, 0);
1229 spin_unlock_irqrestore(&db->lock, flags);
1231 mutex_unlock(&db->addr_lock);
1235 * Set DM9000 multicast address
1238 dm9000_hash_table(struct net_device *dev)
1240 board_info_t *db = (board_info_t *) dev->priv;
1241 struct dev_mc_list *mcptr = dev->mc_list;
1242 int mc_cnt = dev->mc_count;
1246 u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
1247 unsigned long flags;
1249 dm9000_dbg(db, 1, "entering %s\n", __func__);
1251 spin_lock_irqsave(&db->lock, flags);
1253 for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
1254 iow(db, oft, dev->dev_addr[i]);
1256 /* Clear Hash Table */
1257 for (i = 0; i < 4; i++)
1258 hash_table[i] = 0x0;
1260 /* broadcast address */
1261 hash_table[3] = 0x8000;
1263 if (dev->flags & IFF_PROMISC)
1266 if (dev->flags & IFF_ALLMULTI)
1269 /* the multicast address in Hash Table : 64 bits */
1270 for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
1271 hash_val = ether_crc_le(6, mcptr->dmi_addr) & 0x3f;
1272 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
1275 /* Write the hash table to MAC MD table */
1276 for (i = 0, oft = DM9000_MAR; i < 4; i++) {
1277 iow(db, oft++, hash_table[i]);
1278 iow(db, oft++, hash_table[i] >> 8);
1281 iow(db, DM9000_RCR, rcr);
1282 spin_unlock_irqrestore(&db->lock, flags);
1287 * Sleep, either by using msleep() or if we are suspending, then
1288 * use mdelay() to sleep.
1290 static void dm9000_msleep(board_info_t *db, unsigned int ms)
1299 * Read a word from phyxcer
1302 dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1304 board_info_t *db = (board_info_t *) dev->priv;
1305 unsigned long flags;
1306 unsigned int reg_save;
1309 mutex_lock(&db->addr_lock);
1311 spin_lock_irqsave(&db->lock,flags);
1313 /* Save previous register address */
1314 reg_save = readb(db->io_addr);
1316 /* Fill the phyxcer register into REG_0C */
1317 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1319 iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
1321 writeb(reg_save, db->io_addr);
1322 spin_unlock_irqrestore(&db->lock,flags);
1324 dm9000_msleep(db, 1); /* Wait read complete */
1326 spin_lock_irqsave(&db->lock,flags);
1327 reg_save = readb(db->io_addr);
1329 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1331 /* The read data keeps on REG_0D & REG_0E */
1332 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
1334 /* restore the previous address */
1335 writeb(reg_save, db->io_addr);
1336 spin_unlock_irqrestore(&db->lock,flags);
1338 mutex_unlock(&db->addr_lock);
1340 dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret);
1345 * Write a word to phyxcer
1348 dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
1350 board_info_t *db = (board_info_t *) dev->priv;
1351 unsigned long flags;
1352 unsigned long reg_save;
1354 dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value);
1355 mutex_lock(&db->addr_lock);
1357 spin_lock_irqsave(&db->lock,flags);
1359 /* Save previous register address */
1360 reg_save = readb(db->io_addr);
1362 /* Fill the phyxcer register into REG_0C */
1363 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1365 /* Fill the written data into REG_0D & REG_0E */
1366 iow(db, DM9000_EPDRL, value);
1367 iow(db, DM9000_EPDRH, value >> 8);
1369 iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
1371 writeb(reg_save, db->io_addr);
1372 spin_unlock_irqrestore(&db->lock, flags);
1374 dm9000_msleep(db, 1); /* Wait write complete */
1376 spin_lock_irqsave(&db->lock,flags);
1377 reg_save = readb(db->io_addr);
1379 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1381 /* restore the previous address */
1382 writeb(reg_save, db->io_addr);
1384 spin_unlock_irqrestore(&db->lock, flags);
1385 mutex_unlock(&db->addr_lock);
1389 dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
1391 struct net_device *ndev = platform_get_drvdata(dev);
1395 db = (board_info_t *) ndev->priv;
1398 if (netif_running(ndev)) {
1399 netif_device_detach(ndev);
1400 dm9000_shutdown(ndev);
1407 dm9000_drv_resume(struct platform_device *dev)
1409 struct net_device *ndev = platform_get_drvdata(dev);
1410 board_info_t *db = (board_info_t *) ndev->priv;
1414 if (netif_running(ndev)) {
1416 dm9000_init_dm9000(ndev);
1418 netif_device_attach(ndev);
1426 static int __devexit
1427 dm9000_drv_remove(struct platform_device *pdev)
1429 struct net_device *ndev = platform_get_drvdata(pdev);
1431 platform_set_drvdata(pdev, NULL);
1433 unregister_netdev(ndev);
1434 dm9000_release_board(pdev, (board_info_t *) ndev->priv);
1435 free_netdev(ndev); /* free device structure */
1437 dev_dbg(&pdev->dev, "released and freed device\n");
1441 static struct platform_driver dm9000_driver = {
1444 .owner = THIS_MODULE,
1446 .probe = dm9000_probe,
1447 .remove = __devexit_p(dm9000_drv_remove),
1448 .suspend = dm9000_drv_suspend,
1449 .resume = dm9000_drv_resume,
1455 printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION);
1457 return platform_driver_register(&dm9000_driver); /* search board and register */
1461 dm9000_cleanup(void)
1463 platform_driver_unregister(&dm9000_driver);
1466 module_init(dm9000_init);
1467 module_exit(dm9000_cleanup);
1469 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1470 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1471 MODULE_LICENSE("GPL");
1472 MODULE_ALIAS("platform:dm9000");