err.no Git - linux-2.6/blob - drivers/net/atlx/atl1.c

   1 /*
   2  * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
   3  * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
   4  * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
   5  *
   6  * Derived from Intel e1000 driver
   7  * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms of the GNU General Public License as published by the Free
  11  * Software Foundation; either version 2 of the License, or (at your option)
  12  * any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful, but WITHOUT
  15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  17  * more details.
  18  *
  19  * You should have received a copy of the GNU General Public License along with
  20  * this program; if not, write to the Free Software Foundation, Inc., 59
  21  * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  22  *
  23  * The full GNU General Public License is included in this distribution in the
  24  * file called COPYING.
  25  *
  26  * Contact Information:
  27  * Xiong Huang <xiong_huang@attansic.com>
  28  * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
  29  * Xinzhu  302, TAIWAN, REPUBLIC OF CHINA
  30  *
  31  * Chris Snook <csnook@redhat.com>
  32  * Jay Cliburn <jcliburn@gmail.com>
  33  *
  34  * This version is adapted from the Attansic reference driver for
  35  * inclusion in the Linux kernel.  It is currently under heavy development.
  36  * A very incomplete list of things that need to be dealt with:
  37  *
  38  * TODO:
  39  * Wake on LAN.
  40  * Add more ethtool functions.
  41  * Fix abstruse irq enable/disable condition described here:
  42  *      http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
  43  *
  44  * NEEDS TESTING:
  45  * VLAN
  46  * multicast
  47  * promiscuous mode
  48  * interrupt coalescing
  49  * SMP torture testing
  50  */
  51
  52 #include <asm/atomic.h>
  53 #include <asm/byteorder.h>
  54
  55 #include <linux/compiler.h>
  56 #include <linux/crc32.h>
  57 #include <linux/delay.h>
  58 #include <linux/dma-mapping.h>
  59 #include <linux/etherdevice.h>
  60 #include <linux/hardirq.h>
  61 #include <linux/if_ether.h>
  62 #include <linux/if_vlan.h>
  63 #include <linux/in.h>
  64 #include <linux/interrupt.h>
  65 #include <linux/ip.h>
  66 #include <linux/irqflags.h>
  67 #include <linux/irqreturn.h>
  68 #include <linux/jiffies.h>
  69 #include <linux/mii.h>
  70 #include <linux/module.h>
  71 #include <linux/moduleparam.h>
  72 #include <linux/net.h>
  73 #include <linux/netdevice.h>
  74 #include <linux/pci.h>
  75 #include <linux/pci_ids.h>
  76 #include <linux/pm.h>
  77 #include <linux/skbuff.h>
  78 #include <linux/slab.h>
  79 #include <linux/spinlock.h>
  80 #include <linux/string.h>
  81 #include <linux/tcp.h>
  82 #include <linux/timer.h>
  83 #include <linux/types.h>
  84 #include <linux/workqueue.h>
  85
  86 #include <net/checksum.h>
  87
  88 #include "atl1.h"
  89
  90 /* Temporary hack for merging atl1 and atl2 */
  91 #include "atlx.c"
  92
  93 /*
  94  * atl1_pci_tbl - PCI Device ID Table
  95  */
  96 static const struct pci_device_id atl1_pci_tbl[] = {
  97         {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
  98         /* required last entry */
  99         {0,}
 100 };
 101 MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
 102
 103 static const u32 atl1_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
 104         NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
 105
 106 static int debug = -1;
 107 module_param(debug, int, 0);
 108 MODULE_PARM_DESC(debug, "Message level (0=none,...,16=all)");
 109
 110 /*
 111  * Reset the transmit and receive units; mask and clear all interrupts.
 112  * hw - Struct containing variables accessed by shared code
 113  * return : 0  or  idle status (if error)
 114  */
 115 static s32 atl1_reset_hw(struct atl1_hw *hw)
 116 {
 117         struct pci_dev *pdev = hw->back->pdev;
 118         struct atl1_adapter *adapter = hw->back;
 119         u32 icr;
 120         int i;
 121
 122         /*
 123          * Clear Interrupt mask to stop board from generating
 124          * interrupts & Clear any pending interrupt events
 125          */
 126         /*
 127          * iowrite32(0, hw->hw_addr + REG_IMR);
 128          * iowrite32(0xffffffff, hw->hw_addr + REG_ISR);
 129          */
 130
 131         /*
 132          * Issue Soft Reset to the MAC.  This will reset the chip's
 133          * transmit, receive, DMA.  It will not effect
 134          * the current PCI configuration.  The global reset bit is self-
 135          * clearing, and should clear within a microsecond.
 136          */
 137         iowrite32(MASTER_CTRL_SOFT_RST, hw->hw_addr + REG_MASTER_CTRL);
 138         ioread32(hw->hw_addr + REG_MASTER_CTRL);
 139
 140         iowrite16(1, hw->hw_addr + REG_PHY_ENABLE);
 141         ioread16(hw->hw_addr + REG_PHY_ENABLE);
 142
 143         /* delay about 1ms */
 144         msleep(1);
 145
 146         /* Wait at least 10ms for All module to be Idle */
 147         for (i = 0; i < 10; i++) {
 148                 icr = ioread32(hw->hw_addr + REG_IDLE_STATUS);
 149                 if (!icr)
 150                         break;
 151                 /* delay 1 ms */
 152                 msleep(1);
 153                 /* FIXME: still the right way to do this? */
 154                 cpu_relax();
 155         }
 156
 157         if (icr) {
 158                 if (netif_msg_hw(adapter))
 159                         dev_dbg(&pdev->dev, "ICR = 0x%x\n", icr);
 160                 return icr;
 161         }
 162
 163         return 0;
 164 }
 165
 166 /* function about EEPROM
 167  *
 168  * check_eeprom_exist
 169  * return 0 if eeprom exist
 170  */
 171 static int atl1_check_eeprom_exist(struct atl1_hw *hw)
 172 {
 173         u32 value;
 174         value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 175         if (value & SPI_FLASH_CTRL_EN_VPD) {
 176                 value &= ~SPI_FLASH_CTRL_EN_VPD;
 177                 iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 178         }
 179
 180         value = ioread16(hw->hw_addr + REG_PCIE_CAP_LIST);
 181         return ((value & 0xFF00) == 0x6C00) ? 0 : 1;
 182 }
 183
 184 static bool atl1_read_eeprom(struct atl1_hw *hw, u32 offset, u32 *p_value)
 185 {
 186         int i;
 187         u32 control;
 188
 189         if (offset & 3)
 190                 /* address do not align */
 191                 return false;
 192
 193         iowrite32(0, hw->hw_addr + REG_VPD_DATA);
 194         control = (offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT;
 195         iowrite32(control, hw->hw_addr + REG_VPD_CAP);
 196         ioread32(hw->hw_addr + REG_VPD_CAP);
 197
 198         for (i = 0; i < 10; i++) {
 199                 msleep(2);
 200                 control = ioread32(hw->hw_addr + REG_VPD_CAP);
 201                 if (control & VPD_CAP_VPD_FLAG)
 202                         break;
 203         }
 204         if (control & VPD_CAP_VPD_FLAG) {
 205                 *p_value = ioread32(hw->hw_addr + REG_VPD_DATA);
 206                 return true;
 207         }
 208         /* timeout */
 209         return false;
 210 }
 211
 212 /*
 213  * Reads the value from a PHY register
 214  * hw - Struct containing variables accessed by shared code
 215  * reg_addr - address of the PHY register to read
 216  */
 217 s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data)
 218 {
 219         u32 val;
 220         int i;
 221
 222         val = ((u32) (reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
 223                 MDIO_START | MDIO_SUP_PREAMBLE | MDIO_RW | MDIO_CLK_25_4 <<
 224                 MDIO_CLK_SEL_SHIFT;
 225         iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
 226         ioread32(hw->hw_addr + REG_MDIO_CTRL);
 227
 228         for (i = 0; i < MDIO_WAIT_TIMES; i++) {
 229                 udelay(2);
 230                 val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 231                 if (!(val & (MDIO_START | MDIO_BUSY)))
 232                         break;
 233         }
 234         if (!(val & (MDIO_START | MDIO_BUSY))) {
 235                 *phy_data = (u16) val;
 236                 return 0;
 237         }
 238         return ATLX_ERR_PHY;
 239 }
 240
 241 #define CUSTOM_SPI_CS_SETUP     2
 242 #define CUSTOM_SPI_CLK_HI       2
 243 #define CUSTOM_SPI_CLK_LO       2
 244 #define CUSTOM_SPI_CS_HOLD      2
 245 #define CUSTOM_SPI_CS_HI        3
 246
 247 static bool atl1_spi_read(struct atl1_hw *hw, u32 addr, u32 *buf)
 248 {
 249         int i;
 250         u32 value;
 251
 252         iowrite32(0, hw->hw_addr + REG_SPI_DATA);
 253         iowrite32(addr, hw->hw_addr + REG_SPI_ADDR);
 254
 255         value = SPI_FLASH_CTRL_WAIT_READY |
 256             (CUSTOM_SPI_CS_SETUP & SPI_FLASH_CTRL_CS_SETUP_MASK) <<
 257             SPI_FLASH_CTRL_CS_SETUP_SHIFT | (CUSTOM_SPI_CLK_HI &
 258                                              SPI_FLASH_CTRL_CLK_HI_MASK) <<
 259             SPI_FLASH_CTRL_CLK_HI_SHIFT | (CUSTOM_SPI_CLK_LO &
 260                                            SPI_FLASH_CTRL_CLK_LO_MASK) <<
 261             SPI_FLASH_CTRL_CLK_LO_SHIFT | (CUSTOM_SPI_CS_HOLD &
 262                                            SPI_FLASH_CTRL_CS_HOLD_MASK) <<
 263             SPI_FLASH_CTRL_CS_HOLD_SHIFT | (CUSTOM_SPI_CS_HI &
 264                                             SPI_FLASH_CTRL_CS_HI_MASK) <<
 265             SPI_FLASH_CTRL_CS_HI_SHIFT | (1 & SPI_FLASH_CTRL_INS_MASK) <<
 266             SPI_FLASH_CTRL_INS_SHIFT;
 267
 268         iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 269
 270         value |= SPI_FLASH_CTRL_START;
 271         iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 272         ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 273
 274         for (i = 0; i < 10; i++) {
 275                 msleep(1);
 276                 value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 277                 if (!(value & SPI_FLASH_CTRL_START))
 278                         break;
 279         }
 280
 281         if (value & SPI_FLASH_CTRL_START)
 282                 return false;
 283
 284         *buf = ioread32(hw->hw_addr + REG_SPI_DATA);
 285
 286         return true;
 287 }
 288
 289 /*
 290  * get_permanent_address
 291  * return 0 if get valid mac address,
 292  */
 293 static int atl1_get_permanent_address(struct atl1_hw *hw)
 294 {
 295         u32 addr[2];
 296         u32 i, control;
 297         u16 reg;
 298         u8 eth_addr[ETH_ALEN];
 299         bool key_valid;
 300
 301         if (is_valid_ether_addr(hw->perm_mac_addr))
 302                 return 0;
 303
 304         /* init */
 305         addr[0] = addr[1] = 0;
 306
 307         if (!atl1_check_eeprom_exist(hw)) {
 308                 reg = 0;
 309                 key_valid = false;
 310                 /* Read out all EEPROM content */
 311                 i = 0;
 312                 while (1) {
 313                         if (atl1_read_eeprom(hw, i + 0x100, &control)) {
 314                                 if (key_valid) {
 315                                         if (reg == REG_MAC_STA_ADDR)
 316                                                 addr[0] = control;
 317                                         else if (reg == (REG_MAC_STA_ADDR + 4))
 318                                                 addr[1] = control;
 319                                         key_valid = false;
 320                                 } else if ((control & 0xff) == 0x5A) {
 321                                         key_valid = true;
 322                                         reg = (u16) (control >> 16);
 323                                 } else
 324                                         break;
 325                         } else
 326                                 /* read error */
 327                                 break;
 328                         i += 4;
 329                 }
 330
 331                 *(u32 *) &eth_addr[2] = swab32(addr[0]);
 332                 *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 333                 if (is_valid_ether_addr(eth_addr)) {
 334                         memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 335                         return 0;
 336                 }
 337                 return 1;
 338         }
 339
 340         /* see if SPI FLAGS exist ? */
 341         addr[0] = addr[1] = 0;
 342         reg = 0;
 343         key_valid = false;
 344         i = 0;
 345         while (1) {
 346                 if (atl1_spi_read(hw, i + 0x1f000, &control)) {
 347                         if (key_valid) {
 348                                 if (reg == REG_MAC_STA_ADDR)
 349                                         addr[0] = control;
 350                                 else if (reg == (REG_MAC_STA_ADDR + 4))
 351                                         addr[1] = control;
 352                                 key_valid = false;
 353                         } else if ((control & 0xff) == 0x5A) {
 354                                 key_valid = true;
 355                                 reg = (u16) (control >> 16);
 356                         } else
 357                                 /* data end */
 358                                 break;
 359                 } else
 360                         /* read error */
 361                         break;
 362                 i += 4;
 363         }
 364
 365         *(u32 *) &eth_addr[2] = swab32(addr[0]);
 366         *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 367         if (is_valid_ether_addr(eth_addr)) {
 368                 memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 369                 return 0;
 370         }
 371
 372         /*
 373          * On some motherboards, the MAC address is written by the
 374          * BIOS directly to the MAC register during POST, and is
 375          * not stored in eeprom.  If all else thus far has failed
 376          * to fetch the permanent MAC address, try reading it directly.
 377          */
 378         addr[0] = ioread32(hw->hw_addr + REG_MAC_STA_ADDR);
 379         addr[1] = ioread16(hw->hw_addr + (REG_MAC_STA_ADDR + 4));
 380         *(u32 *) &eth_addr[2] = swab32(addr[0]);
 381         *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 382         if (is_valid_ether_addr(eth_addr)) {
 383                 memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 384                 return 0;
 385         }
 386
 387         return 1;
 388 }
 389
 390 /*
 391  * Reads the adapter's MAC address from the EEPROM
 392  * hw - Struct containing variables accessed by shared code
 393  */
 394 s32 atl1_read_mac_addr(struct atl1_hw *hw)
 395 {
 396         u16 i;
 397
 398         if (atl1_get_permanent_address(hw))
 399                 random_ether_addr(hw->perm_mac_addr);
 400
 401         for (i = 0; i < ETH_ALEN; i++)
 402                 hw->mac_addr[i] = hw->perm_mac_addr[i];
 403         return 0;
 404 }
 405
 406 /*
 407  * Hashes an address to determine its location in the multicast table
 408  * hw - Struct containing variables accessed by shared code
 409  * mc_addr - the multicast address to hash
 410  *
 411  * atl1_hash_mc_addr
 412  *  purpose
 413  *      set hash value for a multicast address
 414  *      hash calcu processing :
 415  *          1. calcu 32bit CRC for multicast address
 416  *          2. reverse crc with MSB to LSB
 417  */
 418 u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr)
 419 {
 420         u32 crc32, value = 0;
 421         int i;
 422
 423         crc32 = ether_crc_le(6, mc_addr);
 424         for (i = 0; i < 32; i++)
 425                 value |= (((crc32 >> i) & 1) << (31 - i));
 426
 427         return value;
 428 }
 429
 430 /*
 431  * Sets the bit in the multicast table corresponding to the hash value.
 432  * hw - Struct containing variables accessed by shared code
 433  * hash_value - Multicast address hash value
 434  */
 435 void atl1_hash_set(struct atl1_hw *hw, u32 hash_value)
 436 {
 437         u32 hash_bit, hash_reg;
 438         u32 mta;
 439
 440         /*
 441          * The HASH Table  is a register array of 2 32-bit registers.
 442          * It is treated like an array of 64 bits.  We want to set
 443          * bit BitArray[hash_value]. So we figure out what register
 444          * the bit is in, read it, OR in the new bit, then write
 445          * back the new value.  The register is determined by the
 446          * upper 7 bits of the hash value and the bit within that
 447          * register are determined by the lower 5 bits of the value.
 448          */
 449         hash_reg = (hash_value >> 31) & 0x1;
 450         hash_bit = (hash_value >> 26) & 0x1F;
 451         mta = ioread32((hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
 452         mta |= (1 << hash_bit);
 453         iowrite32(mta, (hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
 454 }
 455
 456 /*
 457  * Writes a value to a PHY register
 458  * hw - Struct containing variables accessed by shared code
 459  * reg_addr - address of the PHY register to write
 460  * data - data to write to the PHY
 461  */
 462 static s32 atl1_write_phy_reg(struct atl1_hw *hw, u32 reg_addr, u16 phy_data)
 463 {
 464         int i;
 465         u32 val;
 466
 467         val = ((u32) (phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT |
 468             (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
 469             MDIO_SUP_PREAMBLE |
 470             MDIO_START | MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
 471         iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
 472         ioread32(hw->hw_addr + REG_MDIO_CTRL);
 473
 474         for (i = 0; i < MDIO_WAIT_TIMES; i++) {
 475                 udelay(2);
 476                 val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 477                 if (!(val & (MDIO_START | MDIO_BUSY)))
 478                         break;
 479         }
 480
 481         if (!(val & (MDIO_START | MDIO_BUSY)))
 482                 return 0;
 483
 484         return ATLX_ERR_PHY;
 485 }
 486
 487 /*
 488  * Make L001's PHY out of Power Saving State (bug)
 489  * hw - Struct containing variables accessed by shared code
 490  * when power on, L001's PHY always on Power saving State
 491  * (Gigabit Link forbidden)
 492  */
 493 static s32 atl1_phy_leave_power_saving(struct atl1_hw *hw)
 494 {
 495         s32 ret;
 496         ret = atl1_write_phy_reg(hw, 29, 0x0029);
 497         if (ret)
 498                 return ret;
 499         return atl1_write_phy_reg(hw, 30, 0);
 500 }
 501
 502 /*
 503  *TODO: do something or get rid of this
 504  */
 505 static s32 atl1_phy_enter_power_saving(struct atl1_hw *hw)
 506 {
 507 /*    s32 ret_val;
 508  *    u16 phy_data;
 509  */
 510
 511 /*
 512     ret_val = atl1_write_phy_reg(hw, ...);
 513     ret_val = atl1_write_phy_reg(hw, ...);
 514     ....
 515 */
 516         return 0;
 517 }
 518
 519 /*
 520  * Resets the PHY and make all config validate
 521  * hw - Struct containing variables accessed by shared code
 522  *
 523  * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
 524  */
 525 static s32 atl1_phy_reset(struct atl1_hw *hw)
 526 {
 527         struct pci_dev *pdev = hw->back->pdev;
 528         struct atl1_adapter *adapter = hw->back;
 529         s32 ret_val;
 530         u16 phy_data;
 531
 532         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
 533             hw->media_type == MEDIA_TYPE_1000M_FULL)
 534                 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
 535         else {
 536                 switch (hw->media_type) {
 537                 case MEDIA_TYPE_100M_FULL:
 538                         phy_data =
 539                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
 540                             MII_CR_RESET;
 541                         break;
 542                 case MEDIA_TYPE_100M_HALF:
 543                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
 544                         break;
 545                 case MEDIA_TYPE_10M_FULL:
 546                         phy_data =
 547                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
 548                         break;
 549                 default:
 550                         /* MEDIA_TYPE_10M_HALF: */
 551                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
 552                         break;
 553                 }
 554         }
 555
 556         ret_val = atl1_write_phy_reg(hw, MII_BMCR, phy_data);
 557         if (ret_val) {
 558                 u32 val;
 559                 int i;
 560                 /* pcie serdes link may be down! */
 561                 if (netif_msg_hw(adapter))
 562                         dev_dbg(&pdev->dev, "pcie phy link down\n");
 563
 564                 for (i = 0; i < 25; i++) {
 565                         msleep(1);
 566                         val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 567                         if (!(val & (MDIO_START | MDIO_BUSY)))
 568                                 break;
 569                 }
 570
 571                 if ((val & (MDIO_START | MDIO_BUSY)) != 0) {
 572                         if (netif_msg_hw(adapter))
 573                                 dev_warn(&pdev->dev,
 574                                         "pcie link down at least 25ms\n");
 575                         return ret_val;
 576                 }
 577         }
 578         return 0;
 579 }
 580
 581 /*
 582  * Configures PHY autoneg and flow control advertisement settings
 583  * hw - Struct containing variables accessed by shared code
 584  */
 585 static s32 atl1_phy_setup_autoneg_adv(struct atl1_hw *hw)
 586 {
 587         s32 ret_val;
 588         s16 mii_autoneg_adv_reg;
 589         s16 mii_1000t_ctrl_reg;
 590
 591         /* Read the MII Auto-Neg Advertisement Register (Address 4). */
 592         mii_autoneg_adv_reg = MII_AR_DEFAULT_CAP_MASK;
 593
 594         /* Read the MII 1000Base-T Control Register (Address 9). */
 595         mii_1000t_ctrl_reg = MII_ATLX_CR_1000T_DEFAULT_CAP_MASK;
 596
 597         /*
 598          * First we clear all the 10/100 mb speed bits in the Auto-Neg
 599          * Advertisement Register (Address 4) and the 1000 mb speed bits in
 600          * the  1000Base-T Control Register (Address 9).
 601          */
 602         mii_autoneg_adv_reg &= ~MII_AR_SPEED_MASK;
 603         mii_1000t_ctrl_reg &= ~MII_ATLX_CR_1000T_SPEED_MASK;
 604
 605         /*
 606          * Need to parse media_type  and set up
 607          * the appropriate PHY registers.
 608          */
 609         switch (hw->media_type) {
 610         case MEDIA_TYPE_AUTO_SENSOR:
 611                 mii_autoneg_adv_reg |= (MII_AR_10T_HD_CAPS |
 612                                         MII_AR_10T_FD_CAPS |
 613                                         MII_AR_100TX_HD_CAPS |
 614                                         MII_AR_100TX_FD_CAPS);
 615                 mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
 616                 break;
 617
 618         case MEDIA_TYPE_1000M_FULL:
 619                 mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
 620                 break;
 621
 622         case MEDIA_TYPE_100M_FULL:
 623                 mii_autoneg_adv_reg |= MII_AR_100TX_FD_CAPS;
 624                 break;
 625
 626         case MEDIA_TYPE_100M_HALF:
 627                 mii_autoneg_adv_reg |= MII_AR_100TX_HD_CAPS;
 628                 break;
 629
 630         case MEDIA_TYPE_10M_FULL:
 631                 mii_autoneg_adv_reg |= MII_AR_10T_FD_CAPS;
 632                 break;
 633
 634         default:
 635                 mii_autoneg_adv_reg |= MII_AR_10T_HD_CAPS;
 636                 break;
 637         }
 638
 639         /* flow control fixed to enable all */
 640         mii_autoneg_adv_reg |= (MII_AR_ASM_DIR | MII_AR_PAUSE);
 641
 642         hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg;
 643         hw->mii_1000t_ctrl_reg = mii_1000t_ctrl_reg;
 644
 645         ret_val = atl1_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
 646         if (ret_val)
 647                 return ret_val;
 648
 649         ret_val = atl1_write_phy_reg(hw, MII_ATLX_CR, mii_1000t_ctrl_reg);
 650         if (ret_val)
 651                 return ret_val;
 652
 653         return 0;
 654 }
 655
 656 /*
 657  * Configures link settings.
 658  * hw - Struct containing variables accessed by shared code
 659  * Assumes the hardware has previously been reset and the
 660  * transmitter and receiver are not enabled.
 661  */
 662 static s32 atl1_setup_link(struct atl1_hw *hw)
 663 {
 664         struct pci_dev *pdev = hw->back->pdev;
 665         struct atl1_adapter *adapter = hw->back;
 666         s32 ret_val;
 667
 668         /*
 669          * Options:
 670          *  PHY will advertise value(s) parsed from
 671          *  autoneg_advertised and fc
 672          *  no matter what autoneg is , We will not wait link result.
 673          */
 674         ret_val = atl1_phy_setup_autoneg_adv(hw);
 675         if (ret_val) {
 676                 if (netif_msg_link(adapter))
 677                         dev_dbg(&pdev->dev,
 678                                 "error setting up autonegotiation\n");
 679                 return ret_val;
 680         }
 681         /* SW.Reset , En-Auto-Neg if needed */
 682         ret_val = atl1_phy_reset(hw);
 683         if (ret_val) {
 684                 if (netif_msg_link(adapter))
 685                         dev_dbg(&pdev->dev, "error resetting phy\n");
 686                 return ret_val;
 687         }
 688         hw->phy_configured = true;
 689         return ret_val;
 690 }
 691
 692 static void atl1_init_flash_opcode(struct atl1_hw *hw)
 693 {
 694         if (hw->flash_vendor >= ARRAY_SIZE(flash_table))
 695                 /* Atmel */
 696                 hw->flash_vendor = 0;
 697
 698         /* Init OP table */
 699         iowrite8(flash_table[hw->flash_vendor].cmd_program,
 700                 hw->hw_addr + REG_SPI_FLASH_OP_PROGRAM);
 701         iowrite8(flash_table[hw->flash_vendor].cmd_sector_erase,
 702                 hw->hw_addr + REG_SPI_FLASH_OP_SC_ERASE);
 703         iowrite8(flash_table[hw->flash_vendor].cmd_chip_erase,
 704                 hw->hw_addr + REG_SPI_FLASH_OP_CHIP_ERASE);
 705         iowrite8(flash_table[hw->flash_vendor].cmd_rdid,
 706                 hw->hw_addr + REG_SPI_FLASH_OP_RDID);
 707         iowrite8(flash_table[hw->flash_vendor].cmd_wren,
 708                 hw->hw_addr + REG_SPI_FLASH_OP_WREN);
 709         iowrite8(flash_table[hw->flash_vendor].cmd_rdsr,
 710                 hw->hw_addr + REG_SPI_FLASH_OP_RDSR);
 711         iowrite8(flash_table[hw->flash_vendor].cmd_wrsr,
 712                 hw->hw_addr + REG_SPI_FLASH_OP_WRSR);
 713         iowrite8(flash_table[hw->flash_vendor].cmd_read,
 714                 hw->hw_addr + REG_SPI_FLASH_OP_READ);
 715 }
 716
 717 /*
 718  * Performs basic configuration of the adapter.
 719  * hw - Struct containing variables accessed by shared code
 720  * Assumes that the controller has previously been reset and is in a
 721  * post-reset uninitialized state. Initializes multicast table,
 722  * and  Calls routines to setup link
 723  * Leaves the transmit and receive units disabled and uninitialized.
 724  */
 725 static s32 atl1_init_hw(struct atl1_hw *hw)
 726 {
 727         u32 ret_val = 0;
 728
 729         /* Zero out the Multicast HASH table */
 730         iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
 731         /* clear the old settings from the multicast hash table */
 732         iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
 733
 734         atl1_init_flash_opcode(hw);
 735
 736         if (!hw->phy_configured) {
 737                 /* enable GPHY LinkChange Interrrupt */
 738                 ret_val = atl1_write_phy_reg(hw, 18, 0xC00);
 739                 if (ret_val)
 740                         return ret_val;
 741                 /* make PHY out of power-saving state */
 742                 ret_val = atl1_phy_leave_power_saving(hw);
 743                 if (ret_val)
 744                         return ret_val;
 745                 /* Call a subroutine to configure the link */
 746                 ret_val = atl1_setup_link(hw);
 747         }
 748         return ret_val;
 749 }
 750
 751 /*
 752  * Detects the current speed and duplex settings of the hardware.
 753  * hw - Struct containing variables accessed by shared code
 754  * speed - Speed of the connection
 755  * duplex - Duplex setting of the connection
 756  */
 757 static s32 atl1_get_speed_and_duplex(struct atl1_hw *hw, u16 *speed, u16 *duplex)
 758 {
 759         struct pci_dev *pdev = hw->back->pdev;
 760         struct atl1_adapter *adapter = hw->back;
 761         s32 ret_val;
 762         u16 phy_data;
 763
 764         /* ; --- Read   PHY Specific Status Register (17) */
 765         ret_val = atl1_read_phy_reg(hw, MII_ATLX_PSSR, &phy_data);
 766         if (ret_val)
 767                 return ret_val;
 768
 769         if (!(phy_data & MII_ATLX_PSSR_SPD_DPLX_RESOLVED))
 770                 return ATLX_ERR_PHY_RES;
 771
 772         switch (phy_data & MII_ATLX_PSSR_SPEED) {
 773         case MII_ATLX_PSSR_1000MBS:
 774                 *speed = SPEED_1000;
 775                 break;
 776         case MII_ATLX_PSSR_100MBS:
 777                 *speed = SPEED_100;
 778                 break;
 779         case MII_ATLX_PSSR_10MBS:
 780                 *speed = SPEED_10;
 781                 break;
 782         default:
 783                 if (netif_msg_hw(adapter))
 784                         dev_dbg(&pdev->dev, "error getting speed\n");
 785                 return ATLX_ERR_PHY_SPEED;
 786                 break;
 787         }
 788         if (phy_data & MII_ATLX_PSSR_DPLX)
 789                 *duplex = FULL_DUPLEX;
 790         else
 791                 *duplex = HALF_DUPLEX;
 792
 793         return 0;
 794 }
 795
 796 void atl1_set_mac_addr(struct atl1_hw *hw)
 797 {
 798         u32 value;
 799         /*
 800          * 00-0B-6A-F6-00-DC
 801          * 0:  6AF600DC   1: 000B
 802          * low dword
 803          */
 804         value = (((u32) hw->mac_addr[2]) << 24) |
 805             (((u32) hw->mac_addr[3]) << 16) |
 806             (((u32) hw->mac_addr[4]) << 8) | (((u32) hw->mac_addr[5]));
 807         iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
 808         /* high dword */
 809         value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
 810         iowrite32(value, (hw->hw_addr + REG_MAC_STA_ADDR) + (1 << 2));
 811 }
 812
 813 /*
 814  * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
 815  * @adapter: board private structure to initialize
 816  *
 817  * atl1_sw_init initializes the Adapter private data structure.
 818  * Fields are initialized based on PCI device information and
 819  * OS network device settings (MTU size).
 820  */
 821 static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
 822 {
 823         struct atl1_hw *hw = &adapter->hw;
 824         struct net_device *netdev = adapter->netdev;
 825
 826         hw->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
 827         hw->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
 828
 829         adapter->wol = 0;
 830         adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
 831         adapter->ict = 50000;           /* 100ms */
 832         adapter->link_speed = SPEED_0;  /* hardware init */
 833         adapter->link_duplex = FULL_DUPLEX;
 834
 835         hw->phy_configured = false;
 836         hw->preamble_len = 7;
 837         hw->ipgt = 0x60;
 838         hw->min_ifg = 0x50;
 839         hw->ipgr1 = 0x40;
 840         hw->ipgr2 = 0x60;
 841         hw->max_retry = 0xf;
 842         hw->lcol = 0x37;
 843         hw->jam_ipg = 7;
 844         hw->rfd_burst = 8;
 845         hw->rrd_burst = 8;
 846         hw->rfd_fetch_gap = 1;
 847         hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
 848         hw->rx_jumbo_lkah = 1;
 849         hw->rrd_ret_timer = 16;
 850         hw->tpd_burst = 4;
 851         hw->tpd_fetch_th = 16;
 852         hw->txf_burst = 0x100;
 853         hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
 854         hw->tpd_fetch_gap = 1;
 855         hw->rcb_value = atl1_rcb_64;
 856         hw->dma_ord = atl1_dma_ord_enh;
 857         hw->dmar_block = atl1_dma_req_256;
 858         hw->dmaw_block = atl1_dma_req_256;
 859         hw->cmb_rrd = 4;
 860         hw->cmb_tpd = 4;
 861         hw->cmb_rx_timer = 1;   /* about 2us */
 862         hw->cmb_tx_timer = 1;   /* about 2us */
 863         hw->smb_timer = 100000; /* about 200ms */
 864
 865         spin_lock_init(&adapter->lock);
 866         spin_lock_init(&adapter->mb_lock);
 867
 868         return 0;
 869 }
 870
 871 static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
 872 {
 873         struct atl1_adapter *adapter = netdev_priv(netdev);
 874         u16 result;
 875
 876         atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
 877
 878         return result;
 879 }
 880
 881 static void mdio_write(struct net_device *netdev, int phy_id, int reg_num,
 882         int val)
 883 {
 884         struct atl1_adapter *adapter = netdev_priv(netdev);
 885
 886         atl1_write_phy_reg(&adapter->hw, reg_num, val);
 887 }
 888
 889 /*
 890  * atl1_mii_ioctl -
 891  * @netdev:
 892  * @ifreq:
 893  * @cmd:
 894  */
 895 static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
 896 {
 897         struct atl1_adapter *adapter = netdev_priv(netdev);
 898         unsigned long flags;
 899         int retval;
 900
 901         if (!netif_running(netdev))
 902                 return -EINVAL;
 903
 904         spin_lock_irqsave(&adapter->lock, flags);
 905         retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
 906         spin_unlock_irqrestore(&adapter->lock, flags);
 907
 908         return retval;
 909 }
 910
 911 /*
 912  * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
 913  * @adapter: board private structure
 914  *
 915  * Return 0 on success, negative on failure
 916  */
 917 static s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
 918 {
 919         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
 920         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
 921         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
 922         struct atl1_ring_header *ring_header = &adapter->ring_header;
 923         struct pci_dev *pdev = adapter->pdev;
 924         int size;
 925         u8 offset = 0;
 926
 927         size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
 928         tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
 929         if (unlikely(!tpd_ring->buffer_info)) {
 930                 if (netif_msg_drv(adapter))
 931                         dev_err(&pdev->dev, "kzalloc failed , size = D%d\n",
 932                                 size);
 933                 goto err_nomem;
 934         }
 935         rfd_ring->buffer_info =
 936                 (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
 937
 938         /*
 939          * real ring DMA buffer
 940          * each ring/block may need up to 8 bytes for alignment, hence the
 941          * additional 40 bytes tacked onto the end.
 942          */
 943         ring_header->size = size =
 944                 sizeof(struct tx_packet_desc) * tpd_ring->count
 945                 + sizeof(struct rx_free_desc) * rfd_ring->count
 946                 + sizeof(struct rx_return_desc) * rrd_ring->count
 947                 + sizeof(struct coals_msg_block)
 948                 + sizeof(struct stats_msg_block)
 949                 + 40;
 950
 951         ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
 952                 &ring_header->dma);
 953         if (unlikely(!ring_header->desc)) {
 954                 if (netif_msg_drv(adapter))
 955                         dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
 956                 goto err_nomem;
 957         }
 958
 959         memset(ring_header->desc, 0, ring_header->size);
 960
 961         /* init TPD ring */
 962         tpd_ring->dma = ring_header->dma;
 963         offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
 964         tpd_ring->dma += offset;
 965         tpd_ring->desc = (u8 *) ring_header->desc + offset;
 966         tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
 967
 968         /* init RFD ring */
 969         rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
 970         offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
 971         rfd_ring->dma += offset;
 972         rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
 973         rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
 974
 975
 976         /* init RRD ring */
 977         rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
 978         offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
 979         rrd_ring->dma += offset;
 980         rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
 981         rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
 982
 983
 984         /* init CMB */
 985         adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
 986         offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
 987         adapter->cmb.dma += offset;
 988         adapter->cmb.cmb = (struct coals_msg_block *)
 989                 ((u8 *) rrd_ring->desc + (rrd_ring->size + offset));
 990
 991         /* init SMB */
 992         adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
 993         offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
 994         adapter->smb.dma += offset;
 995         adapter->smb.smb = (struct stats_msg_block *)
 996                 ((u8 *) adapter->cmb.cmb +
 997                 (sizeof(struct coals_msg_block) + offset));
 998
 999         return 0;
1000
1001 err_nomem:
1002         kfree(tpd_ring->buffer_info);
1003         return -ENOMEM;
1004 }
1005
1006 static void atl1_init_ring_ptrs(struct atl1_adapter *adapter)
1007 {
1008         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1009         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1010         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1011
1012         atomic_set(&tpd_ring->next_to_use, 0);
1013         atomic_set(&tpd_ring->next_to_clean, 0);
1014
1015         rfd_ring->next_to_clean = 0;
1016         atomic_set(&rfd_ring->next_to_use, 0);
1017
1018         rrd_ring->next_to_use = 0;
1019         atomic_set(&rrd_ring->next_to_clean, 0);
1020 }
1021
1022 /*
1023  * atl1_clean_rx_ring - Free RFD Buffers
1024  * @adapter: board private structure
1025  */
1026 static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
1027 {
1028         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1029         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1030         struct atl1_buffer *buffer_info;
1031         struct pci_dev *pdev = adapter->pdev;
1032         unsigned long size;
1033         unsigned int i;
1034
1035         /* Free all the Rx ring sk_buffs */
1036         for (i = 0; i < rfd_ring->count; i++) {
1037                 buffer_info = &rfd_ring->buffer_info[i];
1038                 if (buffer_info->dma) {
1039                         pci_unmap_page(pdev, buffer_info->dma,
1040                                 buffer_info->length, PCI_DMA_FROMDEVICE);
1041                         buffer_info->dma = 0;
1042                 }
1043                 if (buffer_info->skb) {
1044                         dev_kfree_skb(buffer_info->skb);
1045                         buffer_info->skb = NULL;
1046                 }
1047         }
1048
1049         size = sizeof(struct atl1_buffer) * rfd_ring->count;
1050         memset(rfd_ring->buffer_info, 0, size);
1051
1052         /* Zero out the descriptor ring */
1053         memset(rfd_ring->desc, 0, rfd_ring->size);
1054
1055         rfd_ring->next_to_clean = 0;
1056         atomic_set(&rfd_ring->next_to_use, 0);
1057
1058         rrd_ring->next_to_use = 0;
1059         atomic_set(&rrd_ring->next_to_clean, 0);
1060 }
1061
1062 /*
1063  * atl1_clean_tx_ring - Free Tx Buffers
1064  * @adapter: board private structure
1065  */
1066 static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
1067 {
1068         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1069         struct atl1_buffer *buffer_info;
1070         struct pci_dev *pdev = adapter->pdev;
1071         unsigned long size;
1072         unsigned int i;
1073
1074         /* Free all the Tx ring sk_buffs */
1075         for (i = 0; i < tpd_ring->count; i++) {
1076                 buffer_info = &tpd_ring->buffer_info[i];
1077                 if (buffer_info->dma) {
1078                         pci_unmap_page(pdev, buffer_info->dma,
1079                                 buffer_info->length, PCI_DMA_TODEVICE);
1080                         buffer_info->dma = 0;
1081                 }
1082         }
1083
1084         for (i = 0; i < tpd_ring->count; i++) {
1085                 buffer_info = &tpd_ring->buffer_info[i];
1086                 if (buffer_info->skb) {
1087                         dev_kfree_skb_any(buffer_info->skb);
1088                         buffer_info->skb = NULL;
1089                 }
1090         }
1091
1092         size = sizeof(struct atl1_buffer) * tpd_ring->count;
1093         memset(tpd_ring->buffer_info, 0, size);
1094
1095         /* Zero out the descriptor ring */
1096         memset(tpd_ring->desc, 0, tpd_ring->size);
1097
1098         atomic_set(&tpd_ring->next_to_use, 0);
1099         atomic_set(&tpd_ring->next_to_clean, 0);
1100 }
1101
1102 /*
1103  * atl1_free_ring_resources - Free Tx / RX descriptor Resources
1104  * @adapter: board private structure
1105  *
1106  * Free all transmit software resources
1107  */
1108 static void atl1_free_ring_resources(struct atl1_adapter *adapter)
1109 {
1110         struct pci_dev *pdev = adapter->pdev;
1111         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1112         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1113         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1114         struct atl1_ring_header *ring_header = &adapter->ring_header;
1115
1116         atl1_clean_tx_ring(adapter);
1117         atl1_clean_rx_ring(adapter);
1118
1119         kfree(tpd_ring->buffer_info);
1120         pci_free_consistent(pdev, ring_header->size, ring_header->desc,
1121                 ring_header->dma);
1122
1123         tpd_ring->buffer_info = NULL;
1124         tpd_ring->desc = NULL;
1125         tpd_ring->dma = 0;
1126
1127         rfd_ring->buffer_info = NULL;
1128         rfd_ring->desc = NULL;
1129         rfd_ring->dma = 0;
1130
1131         rrd_ring->desc = NULL;
1132         rrd_ring->dma = 0;
1133 }
1134
1135 static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
1136 {
1137         u32 value;
1138         struct atl1_hw *hw = &adapter->hw;
1139         struct net_device *netdev = adapter->netdev;
1140         /* Config MAC CTRL Register */
1141         value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1142         /* duplex */
1143         if (FULL_DUPLEX == adapter->link_duplex)
1144                 value |= MAC_CTRL_DUPLX;
1145         /* speed */
1146         value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
1147                          MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1148                   MAC_CTRL_SPEED_SHIFT);
1149         /* flow control */
1150         value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1151         /* PAD & CRC */
1152         value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1153         /* preamble length */
1154         value |= (((u32) adapter->hw.preamble_len
1155                    & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1156         /* vlan */
1157         if (adapter->vlgrp)
1158                 value |= MAC_CTRL_RMV_VLAN;
1159         /* rx checksum
1160            if (adapter->rx_csum)
1161            value |= MAC_CTRL_RX_CHKSUM_EN;
1162          */
1163         /* filter mode */
1164         value |= MAC_CTRL_BC_EN;
1165         if (netdev->flags & IFF_PROMISC)
1166                 value |= MAC_CTRL_PROMIS_EN;
1167         else if (netdev->flags & IFF_ALLMULTI)
1168                 value |= MAC_CTRL_MC_ALL_EN;
1169         /* value |= MAC_CTRL_LOOPBACK; */
1170         iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
1171 }
1172
1173 static u32 atl1_check_link(struct atl1_adapter *adapter)
1174 {
1175         struct atl1_hw *hw = &adapter->hw;
1176         struct net_device *netdev = adapter->netdev;
1177         u32 ret_val;
1178         u16 speed, duplex, phy_data;
1179         int reconfig = 0;
1180
1181         /* MII_BMSR must read twice */
1182         atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
1183         atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
1184         if (!(phy_data & BMSR_LSTATUS)) {
1185                 /* link down */
1186                 if (netif_carrier_ok(netdev)) {
1187                         /* old link state: Up */
1188                         if (netif_msg_link(adapter))
1189                                 dev_info(&adapter->pdev->dev, "link is down\n");
1190                         adapter->link_speed = SPEED_0;
1191                         netif_carrier_off(netdev);
1192                         netif_stop_queue(netdev);
1193                 }
1194                 return 0;
1195         }
1196
1197         /* Link Up */
1198         ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
1199         if (ret_val)
1200                 return ret_val;
1201
1202         switch (hw->media_type) {
1203         case MEDIA_TYPE_1000M_FULL:
1204                 if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
1205                         reconfig = 1;
1206                 break;
1207         case MEDIA_TYPE_100M_FULL:
1208                 if (speed != SPEED_100 || duplex != FULL_DUPLEX)
1209                         reconfig = 1;
1210                 break;
1211         case MEDIA_TYPE_100M_HALF:
1212                 if (speed != SPEED_100 || duplex != HALF_DUPLEX)
1213                         reconfig = 1;
1214                 break;
1215         case MEDIA_TYPE_10M_FULL:
1216                 if (speed != SPEED_10 || duplex != FULL_DUPLEX)
1217                         reconfig = 1;
1218                 break;
1219         case MEDIA_TYPE_10M_HALF:
1220                 if (speed != SPEED_10 || duplex != HALF_DUPLEX)
1221                         reconfig = 1;
1222                 break;
1223         }
1224
1225         /* link result is our setting */
1226         if (!reconfig) {
1227                 if (adapter->link_speed != speed
1228                     || adapter->link_duplex != duplex) {
1229                         adapter->link_speed = speed;
1230                         adapter->link_duplex = duplex;
1231                         atl1_setup_mac_ctrl(adapter);
1232                         if (netif_msg_link(adapter))
1233                                 dev_info(&adapter->pdev->dev,
1234                                         "%s link is up %d Mbps %s\n",
1235                                         netdev->name, adapter->link_speed,
1236                                         adapter->link_duplex == FULL_DUPLEX ?
1237                                         "full duplex" : "half duplex");
1238                 }
1239                 if (!netif_carrier_ok(netdev)) {
1240                         /* Link down -> Up */
1241                         netif_carrier_on(netdev);
1242                         netif_wake_queue(netdev);
1243                 }
1244                 return 0;
1245         }
1246
1247         /* change original link status */
1248         if (netif_carrier_ok(netdev)) {
1249                 adapter->link_speed = SPEED_0;
1250                 netif_carrier_off(netdev);
1251                 netif_stop_queue(netdev);
1252         }
1253
1254         if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
1255             hw->media_type != MEDIA_TYPE_1000M_FULL) {
1256                 switch (hw->media_type) {
1257                 case MEDIA_TYPE_100M_FULL:
1258                         phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
1259                                    MII_CR_RESET;
1260                         break;
1261                 case MEDIA_TYPE_100M_HALF:
1262                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
1263                         break;
1264                 case MEDIA_TYPE_10M_FULL:
1265                         phy_data =
1266                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
1267                         break;
1268                 default:
1269                         /* MEDIA_TYPE_10M_HALF: */
1270                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
1271                         break;
1272                 }
1273                 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
1274                 return 0;
1275         }
1276
1277         /* auto-neg, insert timer to re-config phy */
1278         if (!adapter->phy_timer_pending) {
1279                 adapter->phy_timer_pending = true;
1280                 mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
1281         }
1282
1283         return 0;
1284 }
1285
1286 static void set_flow_ctrl_old(struct atl1_adapter *adapter)
1287 {
1288         u32 hi, lo, value;
1289
1290         /* RFD Flow Control */
1291         value = adapter->rfd_ring.count;
1292         hi = value / 16;
1293         if (hi < 2)
1294                 hi = 2;
1295         lo = value * 7 / 8;
1296
1297         value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1298                 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1299         iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1300
1301         /* RRD Flow Control */
1302         value = adapter->rrd_ring.count;
1303         lo = value / 16;
1304         hi = value * 7 / 8;
1305         if (lo < 2)
1306                 lo = 2;
1307         value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1308                 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1309         iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1310 }
1311
1312 static void set_flow_ctrl_new(struct atl1_hw *hw)
1313 {
1314         u32 hi, lo, value;
1315
1316         /* RXF Flow Control */
1317         value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
1318         lo = value / 16;
1319         if (lo < 192)
1320                 lo = 192;
1321         hi = value * 7 / 8;
1322         if (hi < lo)
1323                 hi = lo + 16;
1324         value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1325                 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1326         iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1327
1328         /* RRD Flow Control */
1329         value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
1330         lo = value / 8;
1331         hi = value * 7 / 8;
1332         if (lo < 2)
1333                 lo = 2;
1334         if (hi < lo)
1335                 hi = lo + 3;
1336         value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1337                 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1338         iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1339 }
1340
1341 /*
1342  * atl1_configure - Configure Transmit&Receive Unit after Reset
1343  * @adapter: board private structure
1344  *
1345  * Configure the Tx /Rx unit of the MAC after a reset.
1346  */
1347 static u32 atl1_configure(struct atl1_adapter *adapter)
1348 {
1349         struct atl1_hw *hw = &adapter->hw;
1350         u32 value;
1351
1352         /* clear interrupt status */
1353         iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
1354
1355         /* set MAC Address */
1356         value = (((u32) hw->mac_addr[2]) << 24) |
1357                 (((u32) hw->mac_addr[3]) << 16) |
1358                 (((u32) hw->mac_addr[4]) << 8) |
1359                 (((u32) hw->mac_addr[5]));
1360         iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
1361         value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
1362         iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
1363
1364         /* tx / rx ring */
1365
1366         /* HI base address */
1367         iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
1368                 hw->hw_addr + REG_DESC_BASE_ADDR_HI);
1369         /* LO base address */
1370         iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
1371                 hw->hw_addr + REG_DESC_RFD_ADDR_LO);
1372         iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
1373                 hw->hw_addr + REG_DESC_RRD_ADDR_LO);
1374         iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
1375                 hw->hw_addr + REG_DESC_TPD_ADDR_LO);
1376         iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
1377                 hw->hw_addr + REG_DESC_CMB_ADDR_LO);
1378         iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
1379                 hw->hw_addr + REG_DESC_SMB_ADDR_LO);
1380
1381         /* element count */
1382         value = adapter->rrd_ring.count;
1383         value <<= 16;
1384         value += adapter->rfd_ring.count;
1385         iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
1386         iowrite32(adapter->tpd_ring.count, hw->hw_addr +
1387                 REG_DESC_TPD_RING_SIZE);
1388
1389         /* Load Ptr */
1390         iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
1391
1392         /* config Mailbox */
1393         value = ((atomic_read(&adapter->tpd_ring.next_to_use)
1394                   & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
1395                 ((atomic_read(&adapter->rrd_ring.next_to_clean)
1396                 & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
1397                 ((atomic_read(&adapter->rfd_ring.next_to_use)
1398                 & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
1399         iowrite32(value, hw->hw_addr + REG_MAILBOX);
1400
1401         /* config IPG/IFG */
1402         value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
1403                  << MAC_IPG_IFG_IPGT_SHIFT) |
1404                 (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
1405                 << MAC_IPG_IFG_MIFG_SHIFT) |
1406                 (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
1407                 << MAC_IPG_IFG_IPGR1_SHIFT) |
1408                 (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
1409                 << MAC_IPG_IFG_IPGR2_SHIFT);
1410         iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
1411
1412         /* config  Half-Duplex Control */
1413         value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
1414                 (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
1415                 << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
1416                 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
1417                 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
1418                 (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
1419                 << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
1420         iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
1421
1422         /* set Interrupt Moderator Timer */
1423         iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
1424         iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
1425
1426         /* set Interrupt Clear Timer */
1427         iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
1428
1429         /* set max frame size hw will accept */
1430         iowrite32(hw->max_frame_size, hw->hw_addr + REG_MTU);
1431
1432         /* jumbo size & rrd retirement timer */
1433         value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
1434                  << RXQ_JMBOSZ_TH_SHIFT) |
1435                 (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
1436                 << RXQ_JMBO_LKAH_SHIFT) |
1437                 (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
1438                 << RXQ_RRD_TIMER_SHIFT);
1439         iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
1440
1441         /* Flow Control */
1442         switch (hw->dev_rev) {
1443         case 0x8001:
1444         case 0x9001:
1445         case 0x9002:
1446         case 0x9003:
1447                 set_flow_ctrl_old(adapter);
1448                 break;
1449         default:
1450                 set_flow_ctrl_new(hw);
1451                 break;
1452         }
1453
1454         /* config TXQ */
1455         value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
1456                  << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
1457                 (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
1458                 << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
1459                 (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
1460                 << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE |
1461                 TXQ_CTRL_EN;
1462         iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
1463
1464         /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
1465         value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
1466                 << TX_JUMBO_TASK_TH_SHIFT) |
1467                 (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
1468                 << TX_TPD_MIN_IPG_SHIFT);
1469         iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
1470
1471         /* config RXQ */
1472         value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
1473                 << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
1474                 (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
1475                 << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
1476                 (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
1477                 << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) | RXQ_CTRL_CUT_THRU_EN |
1478                 RXQ_CTRL_EN;
1479         iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
1480
1481         /* config DMA Engine */
1482         value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1483                 << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
1484                 ((((u32) hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1485                 << DMA_CTRL_DMAW_BURST_LEN_SHIFT) | DMA_CTRL_DMAR_EN |
1486                 DMA_CTRL_DMAW_EN;
1487         value |= (u32) hw->dma_ord;
1488         if (atl1_rcb_128 == hw->rcb_value)
1489                 value |= DMA_CTRL_RCB_VALUE;
1490         iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
1491
1492         /* config CMB / SMB */
1493         value = (hw->cmb_tpd > adapter->tpd_ring.count) ?
1494                 hw->cmb_tpd : adapter->tpd_ring.count;
1495         value <<= 16;
1496         value |= hw->cmb_rrd;
1497         iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
1498         value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
1499         iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
1500         iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
1501
1502         /* --- enable CMB / SMB */
1503         value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
1504         iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
1505
1506         value = ioread32(adapter->hw.hw_addr + REG_ISR);
1507         if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
1508                 value = 1;      /* config failed */
1509         else
1510                 value = 0;
1511
1512         /* clear all interrupt status */
1513         iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
1514         iowrite32(0, adapter->hw.hw_addr + REG_ISR);
1515         return value;
1516 }
1517
1518 /*
1519  * atl1_pcie_patch - Patch for PCIE module
1520  */
1521 static void atl1_pcie_patch(struct atl1_adapter *adapter)
1522 {
1523         u32 value;
1524
1525         /* much vendor magic here */
1526         value = 0x6500;
1527         iowrite32(value, adapter->hw.hw_addr + 0x12FC);
1528         /* pcie flow control mode change */
1529         value = ioread32(adapter->hw.hw_addr + 0x1008);
1530         value |= 0x8000;
1531         iowrite32(value, adapter->hw.hw_addr + 0x1008);
1532 }
1533
1534 /*
1535  * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
1536  * on PCI Command register is disable.
1537  * The function enable this bit.
1538  * Brackett, 2006/03/15
1539  */
1540 static void atl1_via_workaround(struct atl1_adapter *adapter)
1541 {
1542         unsigned long value;
1543
1544         value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
1545         if (value & PCI_COMMAND_INTX_DISABLE)
1546                 value &= ~PCI_COMMAND_INTX_DISABLE;
1547         iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
1548 }
1549
1550 static void atl1_inc_smb(struct atl1_adapter *adapter)
1551 {
1552         struct stats_msg_block *smb = adapter->smb.smb;
1553
1554         /* Fill out the OS statistics structure */
1555         adapter->soft_stats.rx_packets += smb->rx_ok;
1556         adapter->soft_stats.tx_packets += smb->tx_ok;
1557         adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
1558         adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
1559         adapter->soft_stats.multicast += smb->rx_mcast;
1560         adapter->soft_stats.collisions += (smb->tx_1_col + smb->tx_2_col * 2 +
1561                 smb->tx_late_col + smb->tx_abort_col * adapter->hw.max_retry);
1562
1563         /* Rx Errors */
1564         adapter->soft_stats.rx_errors += (smb->rx_frag + smb->rx_fcs_err +
1565                 smb->rx_len_err + smb->rx_sz_ov + smb->rx_rxf_ov +
1566                 smb->rx_rrd_ov + smb->rx_align_err);
1567         adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
1568         adapter->soft_stats.rx_length_errors += smb->rx_len_err;
1569         adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
1570         adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
1571         adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
1572                 smb->rx_rxf_ov);
1573
1574         adapter->soft_stats.rx_pause += smb->rx_pause;
1575         adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
1576         adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
1577
1578         /* Tx Errors */
1579         adapter->soft_stats.tx_errors += (smb->tx_late_col +
1580                 smb->tx_abort_col + smb->tx_underrun + smb->tx_trunc);
1581         adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
1582         adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
1583         adapter->soft_stats.tx_window_errors += smb->tx_late_col;
1584
1585         adapter->soft_stats.excecol += smb->tx_abort_col;
1586         adapter->soft_stats.deffer += smb->tx_defer;
1587         adapter->soft_stats.scc += smb->tx_1_col;
1588         adapter->soft_stats.mcc += smb->tx_2_col;
1589         adapter->soft_stats.latecol += smb->tx_late_col;
1590         adapter->soft_stats.tx_underun += smb->tx_underrun;
1591         adapter->soft_stats.tx_trunc += smb->tx_trunc;
1592         adapter->soft_stats.tx_pause += smb->tx_pause;
1593
1594         adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets;
1595         adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets;
1596         adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes;
1597         adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes;
1598         adapter->net_stats.multicast = adapter->soft_stats.multicast;
1599         adapter->net_stats.collisions = adapter->soft_stats.collisions;
1600         adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors;
1601         adapter->net_stats.rx_over_errors =
1602                 adapter->soft_stats.rx_missed_errors;
1603         adapter->net_stats.rx_length_errors =
1604                 adapter->soft_stats.rx_length_errors;
1605         adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
1606         adapter->net_stats.rx_frame_errors =
1607                 adapter->soft_stats.rx_frame_errors;
1608         adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
1609         adapter->net_stats.rx_missed_errors =
1610                 adapter->soft_stats.rx_missed_errors;
1611         adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors;
1612         adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
1613         adapter->net_stats.tx_aborted_errors =
1614                 adapter->soft_stats.tx_aborted_errors;
1615         adapter->net_stats.tx_window_errors =
1616                 adapter->soft_stats.tx_window_errors;
1617         adapter->net_stats.tx_carrier_errors =
1618                 adapter->soft_stats.tx_carrier_errors;
1619 }
1620
1621 static void atl1_update_mailbox(struct atl1_adapter *adapter)
1622 {
1623         unsigned long flags;
1624         u32 tpd_next_to_use;
1625         u32 rfd_next_to_use;
1626         u32 rrd_next_to_clean;
1627         u32 value;
1628
1629         spin_lock_irqsave(&adapter->mb_lock, flags);
1630
1631         tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1632         rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
1633         rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
1634
1635         value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1636                 MB_RFD_PROD_INDX_SHIFT) |
1637                 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1638                 MB_RRD_CONS_INDX_SHIFT) |
1639                 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1640                 MB_TPD_PROD_INDX_SHIFT);
1641         iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
1642
1643         spin_unlock_irqrestore(&adapter->mb_lock, flags);
1644 }
1645
1646 static void atl1_clean_alloc_flag(struct atl1_adapter *adapter,
1647         struct rx_return_desc *rrd, u16 offset)
1648 {
1649         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1650
1651         while (rfd_ring->next_to_clean != (rrd->buf_indx + offset)) {
1652                 rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced = 0;
1653                 if (++rfd_ring->next_to_clean == rfd_ring->count) {
1654                         rfd_ring->next_to_clean = 0;
1655                 }
1656         }
1657 }
1658
1659 static void atl1_update_rfd_index(struct atl1_adapter *adapter,
1660         struct rx_return_desc *rrd)
1661 {
1662         u16 num_buf;
1663
1664         num_buf = (rrd->xsz.xsum_sz.pkt_size + adapter->rx_buffer_len - 1) /
1665                 adapter->rx_buffer_len;
1666         if (rrd->num_buf == num_buf)
1667                 /* clean alloc flag for bad rrd */
1668                 atl1_clean_alloc_flag(adapter, rrd, num_buf);
1669 }
1670
1671 static void atl1_rx_checksum(struct atl1_adapter *adapter,
1672         struct rx_return_desc *rrd, struct sk_buff *skb)
1673 {
1674         struct pci_dev *pdev = adapter->pdev;
1675
1676         skb->ip_summed = CHECKSUM_NONE;
1677
1678         if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
1679                 if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
1680                                         ERR_FLAG_CODE | ERR_FLAG_OV)) {
1681                         adapter->hw_csum_err++;
1682                         if (netif_msg_rx_err(adapter))
1683                                 dev_printk(KERN_DEBUG, &pdev->dev,
1684                                         "rx checksum error\n");
1685                         return;
1686                 }
1687         }
1688
1689         /* not IPv4 */
1690         if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
1691                 /* checksum is invalid, but it's not an IPv4 pkt, so ok */
1692                 return;
1693
1694         /* IPv4 packet */
1695         if (likely(!(rrd->err_flg &
1696                 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
1697                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1698                 adapter->hw_csum_good++;
1699                 return;
1700         }
1701
1702         /* IPv4, but hardware thinks its checksum is wrong */
1703         if (netif_msg_rx_err(adapter))
1704                 dev_printk(KERN_DEBUG, &pdev->dev,
1705                         "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
1706                         rrd->pkt_flg, rrd->err_flg);
1707         skb->ip_summed = CHECKSUM_COMPLETE;
1708         skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
1709         adapter->hw_csum_err++;
1710         return;
1711 }
1712
1713 /*
1714  * atl1_alloc_rx_buffers - Replace used receive buffers
1715  * @adapter: address of board private structure
1716  */
1717 static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
1718 {
1719         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1720         struct pci_dev *pdev = adapter->pdev;
1721         struct page *page;
1722         unsigned long offset;
1723         struct atl1_buffer *buffer_info, *next_info;
1724         struct sk_buff *skb;
1725         u16 num_alloc = 0;
1726         u16 rfd_next_to_use, next_next;
1727         struct rx_free_desc *rfd_desc;
1728
1729         next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
1730         if (++next_next == rfd_ring->count)
1731                 next_next = 0;
1732         buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1733         next_info = &rfd_ring->buffer_info[next_next];
1734
1735         while (!buffer_info->alloced && !next_info->alloced) {
1736                 if (buffer_info->skb) {
1737                         buffer_info->alloced = 1;
1738                         goto next;
1739                 }
1740
1741                 rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
1742
1743                 skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
1744                 if (unlikely(!skb)) {
1745                         /* Better luck next round */
1746                         adapter->net_stats.rx_dropped++;
1747                         break;
1748                 }
1749
1750                 /*
1751                  * Make buffer alignment 2 beyond a 16 byte boundary
1752                  * this will result in a 16 byte aligned IP header after
1753                  * the 14 byte MAC header is removed
1754                  */
1755                 skb_reserve(skb, NET_IP_ALIGN);
1756
1757                 buffer_info->alloced = 1;
1758                 buffer_info->skb = skb;
1759                 buffer_info->length = (u16) adapter->rx_buffer_len;
1760                 page = virt_to_page(skb->data);
1761                 offset = (unsigned long)skb->data & ~PAGE_MASK;
1762                 buffer_info->dma = pci_map_page(pdev, page, offset,
1763                                                 adapter->rx_buffer_len,
1764                                                 PCI_DMA_FROMDEVICE);
1765                 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1766                 rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
1767                 rfd_desc->coalese = 0;
1768
1769 next:
1770                 rfd_next_to_use = next_next;
1771                 if (unlikely(++next_next == rfd_ring->count))
1772                         next_next = 0;
1773
1774                 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1775                 next_info = &rfd_ring->buffer_info[next_next];
1776                 num_alloc++;
1777         }
1778
1779         if (num_alloc) {
1780                 /*
1781                  * Force memory writes to complete before letting h/w
1782                  * know there are new descriptors to fetch.  (Only
1783                  * applicable for weak-ordered memory model archs,
1784                  * such as IA-64).
1785                  */
1786                 wmb();
1787                 atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
1788         }
1789         return num_alloc;
1790 }
1791
1792 static void atl1_intr_rx(struct atl1_adapter *adapter)
1793 {
1794         int i, count;
1795         u16 length;
1796         u16 rrd_next_to_clean;
1797         u32 value;
1798         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1799         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1800         struct atl1_buffer *buffer_info;
1801         struct rx_return_desc *rrd;
1802         struct sk_buff *skb;
1803
1804         count = 0;
1805
1806         rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
1807
1808         while (1) {
1809                 rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
1810                 i = 1;
1811                 if (likely(rrd->xsz.valid)) {   /* packet valid */
1812 chk_rrd:
1813                         /* check rrd status */
1814                         if (likely(rrd->num_buf == 1))
1815                                 goto rrd_ok;
1816                         else if (netif_msg_rx_err(adapter)) {
1817                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1818                                         "unexpected RRD buffer count\n");
1819                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1820                                         "rx_buf_len = %d\n",
1821                                         adapter->rx_buffer_len);
1822                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1823                                         "RRD num_buf = %d\n",
1824                                         rrd->num_buf);
1825                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1826                                         "RRD pkt_len = %d\n",
1827                                         rrd->xsz.xsum_sz.pkt_size);
1828                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1829                                         "RRD pkt_flg = 0x%08X\n",
1830                                         rrd->pkt_flg);
1831                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1832                                         "RRD err_flg = 0x%08X\n",
1833                                         rrd->err_flg);
1834                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1835                                         "RRD vlan_tag = 0x%08X\n",
1836                                         rrd->vlan_tag);
1837                         }
1838
1839                         /* rrd seems to be bad */
1840                         if (unlikely(i-- > 0)) {
1841                                 /* rrd may not be DMAed completely */
1842                                 udelay(1);
1843                                 goto chk_rrd;
1844                         }
1845                         /* bad rrd */
1846                         if (netif_msg_rx_err(adapter))
1847                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1848                                         "bad RRD\n");
1849                         /* see if update RFD index */
1850                         if (rrd->num_buf > 1)
1851                                 atl1_update_rfd_index(adapter, rrd);
1852
1853                         /* update rrd */
1854                         rrd->xsz.valid = 0;
1855                         if (++rrd_next_to_clean == rrd_ring->count)
1856                                 rrd_next_to_clean = 0;
1857                         count++;
1858                         continue;
1859                 } else {        /* current rrd still not be updated */
1860
1861                         break;
1862                 }
1863 rrd_ok:
1864                 /* clean alloc flag for bad rrd */
1865                 atl1_clean_alloc_flag(adapter, rrd, 0);
1866
1867                 buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
1868                 if (++rfd_ring->next_to_clean == rfd_ring->count)
1869                         rfd_ring->next_to_clean = 0;
1870
1871                 /* update rrd next to clean */
1872                 if (++rrd_next_to_clean == rrd_ring->count)
1873                         rrd_next_to_clean = 0;
1874                 count++;
1875
1876                 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
1877                         if (!(rrd->err_flg &
1878                                 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
1879                                 | ERR_FLAG_LEN))) {
1880                                 /* packet error, don't need upstream */
1881                                 buffer_info->alloced = 0;
1882                                 rrd->xsz.valid = 0;
1883                                 continue;
1884                         }
1885                 }
1886
1887                 /* Good Receive */
1888                 pci_unmap_page(adapter->pdev, buffer_info->dma,
1889                                buffer_info->length, PCI_DMA_FROMDEVICE);
1890                 skb = buffer_info->skb;
1891                 length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
1892
1893                 skb_put(skb, length - ETH_FCS_LEN);
1894
1895                 /* Receive Checksum Offload */
1896                 atl1_rx_checksum(adapter, rrd, skb);
1897                 skb->protocol = eth_type_trans(skb, adapter->netdev);
1898
1899                 if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
1900                         u16 vlan_tag = (rrd->vlan_tag >> 4) |
1901                                         ((rrd->vlan_tag & 7) << 13) |
1902                                         ((rrd->vlan_tag & 8) << 9);
1903                         vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
1904                 } else
1905                         netif_rx(skb);
1906
1907                 /* let protocol layer free skb */
1908                 buffer_info->skb = NULL;
1909                 buffer_info->alloced = 0;
1910                 rrd->xsz.valid = 0;
1911
1912                 adapter->netdev->last_rx = jiffies;
1913         }
1914
1915         atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
1916
1917         atl1_alloc_rx_buffers(adapter);
1918
1919         /* update mailbox ? */
1920         if (count) {
1921                 u32 tpd_next_to_use;
1922                 u32 rfd_next_to_use;
1923
1924                 spin_lock(&adapter->mb_lock);
1925
1926                 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1927                 rfd_next_to_use =
1928                     atomic_read(&adapter->rfd_ring.next_to_use);
1929                 rrd_next_to_clean =
1930                     atomic_read(&adapter->rrd_ring.next_to_clean);
1931                 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1932                         MB_RFD_PROD_INDX_SHIFT) |
1933                         ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1934                         MB_RRD_CONS_INDX_SHIFT) |
1935                         ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1936                         MB_TPD_PROD_INDX_SHIFT);
1937                 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
1938                 spin_unlock(&adapter->mb_lock);
1939         }
1940 }
1941
1942 static void atl1_intr_tx(struct atl1_adapter *adapter)
1943 {
1944         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1945         struct atl1_buffer *buffer_info;
1946         u16 sw_tpd_next_to_clean;
1947         u16 cmb_tpd_next_to_clean;
1948
1949         sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1950         cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
1951
1952         while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
1953                 struct tx_packet_desc *tpd;
1954
1955                 tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
1956                 buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
1957                 if (buffer_info->dma) {
1958                         pci_unmap_page(adapter->pdev, buffer_info->dma,
1959                                        buffer_info->length, PCI_DMA_TODEVICE);
1960                         buffer_info->dma = 0;
1961                 }
1962
1963                 if (buffer_info->skb) {
1964                         dev_kfree_skb_irq(buffer_info->skb);
1965                         buffer_info->skb = NULL;
1966                 }
1967
1968                 if (++sw_tpd_next_to_clean == tpd_ring->count)
1969                         sw_tpd_next_to_clean = 0;
1970         }
1971         atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
1972
1973         if (netif_queue_stopped(adapter->netdev)
1974             && netif_carrier_ok(adapter->netdev))
1975                 netif_wake_queue(adapter->netdev);
1976 }
1977
1978 static u16 atl1_tpd_avail(struct atl1_tpd_ring *tpd_ring)
1979 {
1980         u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1981         u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
1982         return ((next_to_clean > next_to_use) ?
1983                 next_to_clean - next_to_use - 1 :
1984                 tpd_ring->count + next_to_clean - next_to_use - 1);
1985 }
1986
1987 static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
1988         struct tx_packet_desc *ptpd)
1989 {
1990         /* spinlock held */
1991         u8 hdr_len, ip_off;
1992         u32 real_len;
1993         int err;
1994
1995         if (skb_shinfo(skb)->gso_size) {
1996                 if (skb_header_cloned(skb)) {
1997                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1998                         if (unlikely(err))
1999                                 return -1;
2000                 }
2001
2002                 if (skb->protocol == ntohs(ETH_P_IP)) {
2003                         struct iphdr *iph = ip_hdr(skb);
2004
2005                         real_len = (((unsigned char *)iph - skb->data) +
2006                                 ntohs(iph->tot_len));
2007                         if (real_len < skb->len)
2008                                 pskb_trim(skb, real_len);
2009                         hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2010                         if (skb->len == hdr_len) {
2011                                 iph->check = 0;
2012                                 tcp_hdr(skb)->check =
2013                                         ~csum_tcpudp_magic(iph->saddr,
2014                                         iph->daddr, tcp_hdrlen(skb),
2015                                         IPPROTO_TCP, 0);
2016                                 ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
2017                                         TPD_IPHL_SHIFT;
2018                                 ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
2019                                         TPD_TCPHDRLEN_MASK) <<
2020                                         TPD_TCPHDRLEN_SHIFT;
2021                                 ptpd->word3 |= 1 << TPD_IP_CSUM_SHIFT;
2022                                 ptpd->word3 |= 1 << TPD_TCP_CSUM_SHIFT;
2023                                 return 1;
2024                         }
2025
2026                         iph->check = 0;
2027                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2028                                         iph->daddr, 0, IPPROTO_TCP, 0);
2029                         ip_off = (unsigned char *)iph -
2030                                 (unsigned char *) skb_network_header(skb);
2031                         if (ip_off == 8) /* 802.3-SNAP frame */
2032                                 ptpd->word3 |= 1 << TPD_ETHTYPE_SHIFT;
2033                         else if (ip_off != 0)
2034                                 return -2;
2035
2036                         ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
2037                                 TPD_IPHL_SHIFT;
2038                         ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
2039                                 TPD_TCPHDRLEN_MASK) << TPD_TCPHDRLEN_SHIFT;
2040                         ptpd->word3 |= (skb_shinfo(skb)->gso_size &
2041                                 TPD_MSS_MASK) << TPD_MSS_SHIFT;
2042                         ptpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
2043                         return 3;
2044                 }
2045         }
2046         return false;
2047 }
2048
2049 static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
2050         struct tx_packet_desc *ptpd)
2051 {
2052         u8 css, cso;
2053
2054         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2055                 css = (u8) (skb->csum_start - skb_headroom(skb));
2056                 cso = css + (u8) skb->csum_offset;
2057                 if (unlikely(css & 0x1)) {
2058                         /* L1 hardware requires an even number here */
2059                         if (netif_msg_tx_err(adapter))
2060                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2061                                         "payload offset not an even number\n");
2062                         return -1;
2063                 }
2064                 ptpd->word3 |= (css & TPD_PLOADOFFSET_MASK) <<
2065                         TPD_PLOADOFFSET_SHIFT;
2066                 ptpd->word3 |= (cso & TPD_CCSUMOFFSET_MASK) <<
2067                         TPD_CCSUMOFFSET_SHIFT;
2068                 ptpd->word3 |= 1 << TPD_CUST_CSUM_EN_SHIFT;
2069                 return true;
2070         }
2071         return 0;
2072 }
2073
2074 static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
2075         struct tx_packet_desc *ptpd)
2076 {
2077         /* spinlock held */
2078         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2079         struct atl1_buffer *buffer_info;
2080         u16 buf_len = skb->len;
2081         struct page *page;
2082         unsigned long offset;
2083         unsigned int nr_frags;
2084         unsigned int f;
2085         int retval;
2086         u16 next_to_use;
2087         u16 data_len;
2088         u8 hdr_len;
2089
2090         buf_len -= skb->data_len;
2091         nr_frags = skb_shinfo(skb)->nr_frags;
2092         next_to_use = atomic_read(&tpd_ring->next_to_use);
2093         buffer_info = &tpd_ring->buffer_info[next_to_use];
2094         if (unlikely(buffer_info->skb))
2095                 BUG();
2096         /* put skb in last TPD */
2097         buffer_info->skb = NULL;
2098
2099         retval = (ptpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
2100         if (retval) {
2101                 /* TSO */
2102                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2103                 buffer_info->length = hdr_len;
2104                 page = virt_to_page(skb->data);
2105                 offset = (unsigned long)skb->data & ~PAGE_MASK;
2106                 buffer_info->dma = pci_map_page(adapter->pdev, page,
2107                                                 offset, hdr_len,
2108                                                 PCI_DMA_TODEVICE);
2109
2110                 if (++next_to_use == tpd_ring->count)
2111                         next_to_use = 0;
2112
2113                 if (buf_len > hdr_len) {
2114                         int i, nseg;
2115
2116                         data_len = buf_len - hdr_len;
2117                         nseg = (data_len + ATL1_MAX_TX_BUF_LEN - 1) /
2118                                 ATL1_MAX_TX_BUF_LEN;
2119                         for (i = 0; i < nseg; i++) {
2120                                 buffer_info =
2121                                     &tpd_ring->buffer_info[next_to_use];
2122                                 buffer_info->skb = NULL;
2123                                 buffer_info->length =
2124                                     (ATL1_MAX_TX_BUF_LEN >=
2125                                      data_len) ? ATL1_MAX_TX_BUF_LEN : data_len;
2126                                 data_len -= buffer_info->length;
2127                                 page = virt_to_page(skb->data +
2128                                         (hdr_len + i * ATL1_MAX_TX_BUF_LEN));
2129                                 offset = (unsigned long)(skb->data +
2130                                         (hdr_len + i * ATL1_MAX_TX_BUF_LEN)) &
2131                                         ~PAGE_MASK;
2132                                 buffer_info->dma = pci_map_page(adapter->pdev,
2133                                         page, offset, buffer_info->length,
2134                                         PCI_DMA_TODEVICE);
2135                                 if (++next_to_use == tpd_ring->count)
2136                                         next_to_use = 0;
2137                         }
2138                 }
2139         } else {
2140                 /* not TSO */
2141                 buffer_info->length = buf_len;
2142                 page = virt_to_page(skb->data);
2143                 offset = (unsigned long)skb->data & ~PAGE_MASK;
2144                 buffer_info->dma = pci_map_page(adapter->pdev, page,
2145                         offset, buf_len, PCI_DMA_TODEVICE);
2146                 if (++next_to_use == tpd_ring->count)
2147                         next_to_use = 0;
2148         }
2149
2150         for (f = 0; f < nr_frags; f++) {
2151                 struct skb_frag_struct *frag;
2152                 u16 i, nseg;
2153
2154                 frag = &skb_shinfo(skb)->frags[f];
2155                 buf_len = frag->size;
2156
2157                 nseg = (buf_len + ATL1_MAX_TX_BUF_LEN - 1) /
2158                         ATL1_MAX_TX_BUF_LEN;
2159                 for (i = 0; i < nseg; i++) {
2160                         buffer_info = &tpd_ring->buffer_info[next_to_use];
2161                         if (unlikely(buffer_info->skb))
2162                                 BUG();
2163                         buffer_info->skb = NULL;
2164                         buffer_info->length = (buf_len > ATL1_MAX_TX_BUF_LEN) ?
2165                                 ATL1_MAX_TX_BUF_LEN : buf_len;
2166                         buf_len -= buffer_info->length;
2167                         buffer_info->dma = pci_map_page(adapter->pdev,
2168                                 frag->page,
2169                                 frag->page_offset + (i * ATL1_MAX_TX_BUF_LEN),
2170                                 buffer_info->length, PCI_DMA_TODEVICE);
2171
2172                         if (++next_to_use == tpd_ring->count)
2173                                 next_to_use = 0;
2174                 }
2175         }
2176
2177         /* last tpd's buffer-info */
2178         buffer_info->skb = skb;
2179 }
2180
2181 static void atl1_tx_queue(struct atl1_adapter *adapter, u16 count,
2182        struct tx_packet_desc *ptpd)
2183 {
2184         /* spinlock held */
2185         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2186         struct atl1_buffer *buffer_info;
2187         struct tx_packet_desc *tpd;
2188         u16 j;
2189         u32 val;
2190         u16 next_to_use = (u16) atomic_read(&tpd_ring->next_to_use);
2191
2192         for (j = 0; j < count; j++) {
2193                 buffer_info = &tpd_ring->buffer_info[next_to_use];
2194                 tpd = ATL1_TPD_DESC(&adapter->tpd_ring, next_to_use);
2195                 if (tpd != ptpd)
2196                         memcpy(tpd, ptpd, sizeof(struct tx_packet_desc));
2197                 tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2198                 tpd->word2 = (cpu_to_le16(buffer_info->length) &
2199                         TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT;
2200
2201                 /*
2202                  * if this is the first packet in a TSO chain, set
2203                  * TPD_HDRFLAG, otherwise, clear it.
2204                  */
2205                 val = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) &
2206                         TPD_SEGMENT_EN_MASK;
2207                 if (val) {
2208                         if (!j)
2209                                 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
2210                         else
2211                                 tpd->word3 &= ~(1 << TPD_HDRFLAG_SHIFT);
2212                 }
2213
2214                 if (j == (count - 1))
2215                         tpd->word3 |= 1 << TPD_EOP_SHIFT;
2216
2217                 if (++next_to_use == tpd_ring->count)
2218                         next_to_use = 0;
2219         }
2220         /*
2221          * Force memory writes to complete before letting h/w
2222          * know there are new descriptors to fetch.  (Only
2223          * applicable for weak-ordered memory model archs,
2224          * such as IA-64).
2225          */
2226         wmb();
2227
2228         atomic_set(&tpd_ring->next_to_use, next_to_use);
2229 }
2230
2231 static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2232 {
2233         struct atl1_adapter *adapter = netdev_priv(netdev);
2234         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2235         int len = skb->len;
2236         int tso;
2237         int count = 1;
2238         int ret_val;
2239         struct tx_packet_desc *ptpd;
2240         u16 frag_size;
2241         u16 vlan_tag;
2242         unsigned long flags;
2243         unsigned int nr_frags = 0;
2244         unsigned int mss = 0;
2245         unsigned int f;
2246         unsigned int proto_hdr_len;
2247
2248         len -= skb->data_len;
2249
2250         if (unlikely(skb->len <= 0)) {
2251                 dev_kfree_skb_any(skb);
2252                 return NETDEV_TX_OK;
2253         }
2254
2255         nr_frags = skb_shinfo(skb)->nr_frags;
2256         for (f = 0; f < nr_frags; f++) {
2257                 frag_size = skb_shinfo(skb)->frags[f].size;
2258                 if (frag_size)
2259                         count += (frag_size + ATL1_MAX_TX_BUF_LEN - 1) /
2260                                 ATL1_MAX_TX_BUF_LEN;
2261         }
2262
2263         mss = skb_shinfo(skb)->gso_size;
2264         if (mss) {
2265                 if (skb->protocol == ntohs(ETH_P_IP)) {
2266                         proto_hdr_len = (skb_transport_offset(skb) +
2267                                          tcp_hdrlen(skb));
2268                         if (unlikely(proto_hdr_len > len)) {
2269                                 dev_kfree_skb_any(skb);
2270                                 return NETDEV_TX_OK;
2271                         }
2272                         /* need additional TPD ? */
2273                         if (proto_hdr_len != len)
2274                                 count += (len - proto_hdr_len +
2275                                         ATL1_MAX_TX_BUF_LEN - 1) /
2276                                         ATL1_MAX_TX_BUF_LEN;
2277                 }
2278         }
2279
2280         if (!spin_trylock_irqsave(&adapter->lock, flags)) {
2281                 /* Can't get lock - tell upper layer to requeue */
2282                 if (netif_msg_tx_queued(adapter))
2283                         dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2284                                 "tx locked\n");
2285                 return NETDEV_TX_LOCKED;
2286         }
2287
2288         if (atl1_tpd_avail(&adapter->tpd_ring) < count) {
2289                 /* not enough descriptors */
2290                 netif_stop_queue(netdev);
2291                 spin_unlock_irqrestore(&adapter->lock, flags);
2292                 if (netif_msg_tx_queued(adapter))
2293                         dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2294                                 "tx busy\n");
2295                 return NETDEV_TX_BUSY;
2296         }
2297
2298         ptpd = ATL1_TPD_DESC(tpd_ring,
2299                 (u16) atomic_read(&tpd_ring->next_to_use));
2300         memset(ptpd, 0, sizeof(struct tx_packet_desc));
2301
2302         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2303                 vlan_tag = vlan_tx_tag_get(skb);
2304                 vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
2305                         ((vlan_tag >> 9) & 0x8);
2306                 ptpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
2307                 ptpd->word3 |= (vlan_tag & TPD_VL_TAGGED_MASK) <<
2308                         TPD_VL_TAGGED_SHIFT;
2309         }
2310
2311         tso = atl1_tso(adapter, skb, ptpd);
2312         if (tso < 0) {
2313                 spin_unlock_irqrestore(&adapter->lock, flags);
2314                 dev_kfree_skb_any(skb);
2315                 return NETDEV_TX_OK;
2316         }
2317
2318         if (!tso) {
2319                 ret_val = atl1_tx_csum(adapter, skb, ptpd);
2320                 if (ret_val < 0) {
2321                         spin_unlock_irqrestore(&adapter->lock, flags);
2322                         dev_kfree_skb_any(skb);
2323                         return NETDEV_TX_OK;
2324                 }
2325         }
2326
2327         atl1_tx_map(adapter, skb, ptpd);
2328         atl1_tx_queue(adapter, count, ptpd);
2329         atl1_update_mailbox(adapter);
2330         spin_unlock_irqrestore(&adapter->lock, flags);
2331         netdev->trans_start = jiffies;
2332         return NETDEV_TX_OK;
2333 }
2334
2335 /*
2336  * atl1_intr - Interrupt Handler
2337  * @irq: interrupt number
2338  * @data: pointer to a network interface device structure
2339  * @pt_regs: CPU registers structure
2340  */
2341 static irqreturn_t atl1_intr(int irq, void *data)
2342 {
2343         struct atl1_adapter *adapter = netdev_priv(data);
2344         u32 status;
2345         u8 update_rx;
2346         int max_ints = 10;
2347
2348         status = adapter->cmb.cmb->int_stats;
2349         if (!status)
2350                 return IRQ_NONE;
2351
2352         update_rx = 0;
2353
2354         do {
2355                 /* clear CMB interrupt status at once */
2356                 adapter->cmb.cmb->int_stats = 0;
2357
2358                 if (status & ISR_GPHY)  /* clear phy status */
2359                         atlx_clear_phy_int(adapter);
2360
2361                 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
2362                 iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
2363
2364                 /* check if SMB intr */
2365                 if (status & ISR_SMB)
2366                         atl1_inc_smb(adapter);
2367
2368                 /* check if PCIE PHY Link down */
2369                 if (status & ISR_PHY_LINKDOWN) {
2370                         if (netif_msg_intr(adapter))
2371                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2372                                         "pcie phy link down %x\n", status);
2373                         if (netif_running(adapter->netdev)) {   /* reset MAC */
2374                                 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
2375                                 schedule_work(&adapter->pcie_dma_to_rst_task);
2376                                 return IRQ_HANDLED;
2377                         }
2378                 }
2379
2380                 /* check if DMA read/write error ? */
2381                 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
2382                         if (netif_msg_intr(adapter))
2383                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2384                                         "pcie DMA r/w error (status = 0x%x)\n",
2385                                         status);
2386                         iowrite32(0, adapter->hw.hw_addr + REG_IMR);
2387                         schedule_work(&adapter->pcie_dma_to_rst_task);
2388                         return IRQ_HANDLED;
2389                 }
2390
2391                 /* link event */
2392                 if (status & ISR_GPHY) {
2393                         adapter->soft_stats.tx_carrier_errors++;
2394                         atl1_check_for_link(adapter);
2395                 }
2396
2397                 /* transmit event */
2398                 if (status & ISR_CMB_TX)
2399                         atl1_intr_tx(adapter);
2400
2401                 /* rx exception */
2402                 if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
2403                         ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
2404                         ISR_HOST_RRD_OV | ISR_CMB_RX))) {
2405                         if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
2406                                 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
2407                                 ISR_HOST_RRD_OV))
2408                                 if (netif_msg_intr(adapter))
2409                                         dev_printk(KERN_DEBUG,
2410                                                 &adapter->pdev->dev,
2411                                                 "rx exception, ISR = 0x%x\n",
2412                                                 status);
2413                         atl1_intr_rx(adapter);
2414                 }
2415
2416                 if (--max_ints < 0)
2417                         break;
2418
2419         } while ((status = adapter->cmb.cmb->int_stats));
2420
2421         /* re-enable Interrupt */
2422         iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
2423         return IRQ_HANDLED;
2424 }
2425
2426 /*
2427  * atl1_watchdog - Timer Call-back
2428  * @data: pointer to netdev cast into an unsigned long
2429  */
2430 static void atl1_watchdog(unsigned long data)
2431 {
2432         struct atl1_adapter *adapter = (struct atl1_adapter *)data;
2433
2434         /* Reset the timer */
2435         mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2436 }
2437
2438 /*
2439  * atl1_phy_config - Timer Call-back
2440  * @data: pointer to netdev cast into an unsigned long
2441  */
2442 static void atl1_phy_config(unsigned long data)
2443 {
2444         struct atl1_adapter *adapter = (struct atl1_adapter *)data;
2445         struct atl1_hw *hw = &adapter->hw;
2446         unsigned long flags;
2447
2448         spin_lock_irqsave(&adapter->lock, flags);
2449         adapter->phy_timer_pending = false;
2450         atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
2451         atl1_write_phy_reg(hw, MII_ATLX_CR, hw->mii_1000t_ctrl_reg);
2452         atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
2453         spin_unlock_irqrestore(&adapter->lock, flags);
2454 }
2455
2456 /*
2457  * Orphaned vendor comment left intact here:
2458  * <vendor comment>
2459  * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
2460  * will assert. We do soft reset <0x1400=1> according
2461  * with the SPEC. BUT, it seemes that PCIE or DMA
2462  * state-machine will not be reset. DMAR_TO_INT will
2463  * assert again and again.
2464  * </vendor comment>
2465  */
2466
2467 static int atl1_reset(struct atl1_adapter *adapter)
2468 {
2469         int ret;
2470         ret = atl1_reset_hw(&adapter->hw);
2471         if (ret)
2472                 return ret;
2473         return atl1_init_hw(&adapter->hw);
2474 }
2475
2476 static s32 atl1_up(struct atl1_adapter *adapter)
2477 {
2478         struct net_device *netdev = adapter->netdev;
2479         int err;
2480         int irq_flags = IRQF_SAMPLE_RANDOM;
2481
2482         /* hardware has been reset, we need to reload some things */
2483         atlx_set_multi(netdev);
2484         atl1_init_ring_ptrs(adapter);
2485         atlx_restore_vlan(adapter);
2486         err = atl1_alloc_rx_buffers(adapter);
2487         if (unlikely(!err))
2488                 /* no RX BUFFER allocated */
2489                 return -ENOMEM;
2490
2491         if (unlikely(atl1_configure(adapter))) {
2492                 err = -EIO;
2493                 goto err_up;
2494         }
2495
2496         err = pci_enable_msi(adapter->pdev);
2497         if (err) {
2498                 if (netif_msg_ifup(adapter))
2499                         dev_info(&adapter->pdev->dev,
2500                                 "Unable to enable MSI: %d\n", err);
2501                 irq_flags |= IRQF_SHARED;
2502         }
2503
2504         err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
2505                         netdev->name, netdev);
2506         if (unlikely(err))
2507                 goto err_up;
2508
2509         mod_timer(&adapter->watchdog_timer, jiffies);
2510         atlx_irq_enable(adapter);
2511         atl1_check_link(adapter);
2512         return 0;
2513
2514 err_up:
2515         pci_disable_msi(adapter->pdev);
2516         /* free rx_buffers */
2517         atl1_clean_rx_ring(adapter);
2518         return err;
2519 }
2520
2521 static void atl1_down(struct atl1_adapter *adapter)
2522 {
2523         struct net_device *netdev = adapter->netdev;
2524
2525         del_timer_sync(&adapter->watchdog_timer);
2526         del_timer_sync(&adapter->phy_config_timer);
2527         adapter->phy_timer_pending = false;
2528
2529         atlx_irq_disable(adapter);
2530         free_irq(adapter->pdev->irq, netdev);
2531         pci_disable_msi(adapter->pdev);
2532         atl1_reset_hw(&adapter->hw);
2533         adapter->cmb.cmb->int_stats = 0;
2534
2535         adapter->link_speed = SPEED_0;
2536         adapter->link_duplex = -1;
2537         netif_carrier_off(netdev);
2538         netif_stop_queue(netdev);
2539
2540         atl1_clean_tx_ring(adapter);
2541         atl1_clean_rx_ring(adapter);
2542 }
2543
2544 static void atl1_tx_timeout_task(struct work_struct *work)
2545 {
2546         struct atl1_adapter *adapter =
2547                 container_of(work, struct atl1_adapter, tx_timeout_task);
2548         struct net_device *netdev = adapter->netdev;
2549
2550         netif_device_detach(netdev);
2551         atl1_down(adapter);
2552         atl1_up(adapter);
2553         netif_device_attach(netdev);
2554 }
2555
2556 /*
2557  * atl1_change_mtu - Change the Maximum Transfer Unit
2558  * @netdev: network interface device structure
2559  * @new_mtu: new value for maximum frame size
2560  *
2561  * Returns 0 on success, negative on failure
2562  */
2563 static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
2564 {
2565         struct atl1_adapter *adapter = netdev_priv(netdev);
2566         int old_mtu = netdev->mtu;
2567         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2568
2569         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
2570             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2571                 if (netif_msg_link(adapter))
2572                         dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
2573                 return -EINVAL;
2574         }
2575
2576         adapter->hw.max_frame_size = max_frame;
2577         adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
2578         adapter->rx_buffer_len = (max_frame + 7) & ~7;
2579         adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
2580
2581         netdev->mtu = new_mtu;
2582         if ((old_mtu != new_mtu) && netif_running(netdev)) {
2583                 atl1_down(adapter);
2584                 atl1_up(adapter);
2585         }
2586
2587         return 0;
2588 }
2589
2590 /*
2591  * atl1_open - Called when a network interface is made active
2592  * @netdev: network interface device structure
2593  *
2594  * Returns 0 on success, negative value on failure
2595  *
2596  * The open entry point is called when a network interface is made
2597  * active by the system (IFF_UP).  At this point all resources needed
2598  * for transmit and receive operations are allocated, the interrupt
2599  * handler is registered with the OS, the watchdog timer is started,
2600  * and the stack is notified that the interface is ready.
2601  */
2602 static int atl1_open(struct net_device *netdev)
2603 {
2604         struct atl1_adapter *adapter = netdev_priv(netdev);
2605         int err;
2606
2607         /* allocate transmit descriptors */
2608         err = atl1_setup_ring_resources(adapter);
2609         if (err)
2610                 return err;
2611
2612         err = atl1_up(adapter);
2613         if (err)
2614                 goto err_up;
2615
2616         return 0;
2617
2618 err_up:
2619         atl1_reset(adapter);
2620         return err;
2621 }
2622
2623 /*
2624  * atl1_close - Disables a network interface
2625  * @netdev: network interface device structure
2626  *
2627  * Returns 0, this is not allowed to fail
2628  *
2629  * The close entry point is called when an interface is de-activated
2630  * by the OS.  The hardware is still under the drivers control, but
2631  * needs to be disabled.  A global MAC reset is issued to stop the
2632  * hardware, and all transmit and receive resources are freed.
2633  */
2634 static int atl1_close(struct net_device *netdev)
2635 {
2636         struct atl1_adapter *adapter = netdev_priv(netdev);
2637         atl1_down(adapter);
2638         atl1_free_ring_resources(adapter);
2639         return 0;
2640 }
2641
2642 #ifdef CONFIG_PM
2643 static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
2644 {
2645         struct net_device *netdev = pci_get_drvdata(pdev);
2646         struct atl1_adapter *adapter = netdev_priv(netdev);
2647         struct atl1_hw *hw = &adapter->hw;
2648         u32 ctrl = 0;
2649         u32 wufc = adapter->wol;
2650
2651         netif_device_detach(netdev);
2652         if (netif_running(netdev))
2653                 atl1_down(adapter);
2654
2655         atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2656         atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2657         if (ctrl & BMSR_LSTATUS)
2658                 wufc &= ~ATLX_WUFC_LNKC;
2659
2660         /* reduce speed to 10/100M */
2661         if (wufc) {
2662                 atl1_phy_enter_power_saving(hw);
2663                 /* if resume, let driver to re- setup link */
2664                 hw->phy_configured = false;
2665                 atl1_set_mac_addr(hw);
2666                 atlx_set_multi(netdev);
2667
2668                 ctrl = 0;
2669                 /* turn on magic packet wol */
2670                 if (wufc & ATLX_WUFC_MAG)
2671                         ctrl = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2672
2673                 /* turn on Link change WOL */
2674                 if (wufc & ATLX_WUFC_LNKC)
2675                         ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
2676                 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2677
2678                 /* turn on all-multi mode if wake on multicast is enabled */
2679                 ctrl = ioread32(hw->hw_addr + REG_MAC_CTRL);
2680                 ctrl &= ~MAC_CTRL_DBG;
2681                 ctrl &= ~MAC_CTRL_PROMIS_EN;
2682                 if (wufc & ATLX_WUFC_MC)
2683                         ctrl |= MAC_CTRL_MC_ALL_EN;
2684                 else
2685                         ctrl &= ~MAC_CTRL_MC_ALL_EN;
2686
2687                 /* turn on broadcast mode if wake on-BC is enabled */
2688                 if (wufc & ATLX_WUFC_BC)
2689                         ctrl |= MAC_CTRL_BC_EN;
2690                 else
2691                         ctrl &= ~MAC_CTRL_BC_EN;
2692
2693                 /* enable RX */
2694                 ctrl |= MAC_CTRL_RX_EN;
2695                 iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
2696                 pci_enable_wake(pdev, PCI_D3hot, 1);
2697                 pci_enable_wake(pdev, PCI_D3cold, 1);
2698         } else {
2699                 iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
2700                 pci_enable_wake(pdev, PCI_D3hot, 0);
2701                 pci_enable_wake(pdev, PCI_D3cold, 0);
2702         }
2703
2704         pci_save_state(pdev);
2705         pci_disable_device(pdev);
2706
2707         pci_set_power_state(pdev, PCI_D3hot);
2708
2709         return 0;
2710 }
2711
2712 static int atl1_resume(struct pci_dev *pdev)
2713 {
2714         struct net_device *netdev = pci_get_drvdata(pdev);
2715         struct atl1_adapter *adapter = netdev_priv(netdev);
2716         u32 err;
2717
2718         pci_set_power_state(pdev, PCI_D0);
2719         pci_restore_state(pdev);
2720
2721         /* FIXME: check and handle */
2722         err = pci_enable_device(pdev);
2723         pci_enable_wake(pdev, PCI_D3hot, 0);
2724         pci_enable_wake(pdev, PCI_D3cold, 0);
2725
2726         iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
2727         atl1_reset(adapter);
2728
2729         if (netif_running(netdev))
2730                 atl1_up(adapter);
2731         netif_device_attach(netdev);
2732
2733         atl1_via_workaround(adapter);
2734
2735         return 0;
2736 }
2737 #else
2738 #define atl1_suspend NULL
2739 #define atl1_resume NULL
2740 #endif
2741
2742 #ifdef CONFIG_NET_POLL_CONTROLLER
2743 static void atl1_poll_controller(struct net_device *netdev)
2744 {
2745         disable_irq(netdev->irq);
2746         atl1_intr(netdev->irq, netdev);
2747         enable_irq(netdev->irq);
2748 }
2749 #endif
2750
2751 /*
2752  * atl1_probe - Device Initialization Routine
2753  * @pdev: PCI device information struct
2754  * @ent: entry in atl1_pci_tbl
2755  *
2756  * Returns 0 on success, negative on failure
2757  *
2758  * atl1_probe initializes an adapter identified by a pci_dev structure.
2759  * The OS initialization, configuring of the adapter private structure,
2760  * and a hardware reset occur.
2761  */
2762 static int __devinit atl1_probe(struct pci_dev *pdev,
2763         const struct pci_device_id *ent)
2764 {
2765         struct net_device *netdev;
2766         struct atl1_adapter *adapter;
2767         static int cards_found = 0;
2768         int err;
2769
2770         err = pci_enable_device(pdev);
2771         if (err)
2772                 return err;
2773
2774         /*
2775          * The atl1 chip can DMA to 64-bit addresses, but it uses a single
2776          * shared register for the high 32 bits, so only a single, aligned,
2777          * 4 GB physical address range can be used at a time.
2778          *
2779          * Supporting 64-bit DMA on this hardware is more trouble than it's
2780          * worth.  It is far easier to limit to 32-bit DMA than update
2781          * various kernel subsystems to support the mechanics required by a
2782          * fixed-high-32-bit system.
2783          */
2784         err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2785         if (err) {
2786                 dev_err(&pdev->dev, "no usable DMA configuration\n");
2787                 goto err_dma;
2788         }
2789         /*
2790          * Mark all PCI regions associated with PCI device
2791          * pdev as being reserved by owner atl1_driver_name
2792          */
2793         err = pci_request_regions(pdev, ATLX_DRIVER_NAME);
2794         if (err)
2795                 goto err_request_regions;
2796
2797         /*
2798          * Enables bus-mastering on the device and calls
2799          * pcibios_set_master to do the needed arch specific settings
2800          */
2801         pci_set_master(pdev);
2802
2803         netdev = alloc_etherdev(sizeof(struct atl1_adapter));
2804         if (!netdev) {
2805                 err = -ENOMEM;
2806                 goto err_alloc_etherdev;
2807         }
2808         SET_NETDEV_DEV(netdev, &pdev->dev);
2809
2810         pci_set_drvdata(pdev, netdev);
2811         adapter = netdev_priv(netdev);
2812         adapter->netdev = netdev;
2813         adapter->pdev = pdev;
2814         adapter->hw.back = adapter;
2815         adapter->msg_enable = netif_msg_init(debug, atl1_default_msg);
2816
2817         adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
2818         if (!adapter->hw.hw_addr) {
2819                 err = -EIO;
2820                 goto err_pci_iomap;
2821         }
2822         /* get device revision number */
2823         adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
2824                 (REG_MASTER_CTRL + 2));
2825         if (netif_msg_probe(adapter))
2826                 dev_info(&pdev->dev, "version %s\n", ATLX_DRIVER_VERSION);
2827
2828         /* set default ring resource counts */
2829         adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
2830         adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
2831
2832         adapter->mii.dev = netdev;
2833         adapter->mii.mdio_read = mdio_read;
2834         adapter->mii.mdio_write = mdio_write;
2835         adapter->mii.phy_id_mask = 0x1f;
2836         adapter->mii.reg_num_mask = 0x1f;
2837
2838         netdev->open = &atl1_open;
2839         netdev->stop = &atl1_close;
2840         netdev->hard_start_xmit = &atl1_xmit_frame;
2841         netdev->get_stats = &atlx_get_stats;
2842         netdev->set_multicast_list = &atlx_set_multi;
2843         netdev->set_mac_address = &atl1_set_mac;
2844         netdev->change_mtu = &atl1_change_mtu;
2845         netdev->do_ioctl = &atlx_ioctl;
2846         netdev->tx_timeout = &atlx_tx_timeout;
2847         netdev->watchdog_timeo = 5 * HZ;
2848 #ifdef CONFIG_NET_POLL_CONTROLLER
2849         netdev->poll_controller = atl1_poll_controller;
2850 #endif
2851         netdev->vlan_rx_register = atlx_vlan_rx_register;
2852
2853         netdev->ethtool_ops = &atl1_ethtool_ops;
2854         adapter->bd_number = cards_found;
2855
2856         /* setup the private structure */
2857         err = atl1_sw_init(adapter);
2858         if (err)
2859                 goto err_common;
2860
2861         netdev->features = NETIF_F_HW_CSUM;
2862         netdev->features |= NETIF_F_SG;
2863         netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
2864         netdev->features |= NETIF_F_TSO;
2865         netdev->features |= NETIF_F_LLTX;
2866
2867         /*
2868          * patch for some L1 of old version,
2869          * the final version of L1 may not need these
2870          * patches
2871          */
2872         /* atl1_pcie_patch(adapter); */
2873
2874         /* really reset GPHY core */
2875         iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);
2876
2877         /*
2878          * reset the controller to
2879          * put the device in a known good starting state
2880          */
2881         if (atl1_reset_hw(&adapter->hw)) {
2882                 err = -EIO;
2883                 goto err_common;
2884         }
2885
2886         /* copy the MAC address out of the EEPROM */
2887         atl1_read_mac_addr(&adapter->hw);
2888         memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2889
2890         if (!is_valid_ether_addr(netdev->dev_addr)) {
2891                 err = -EIO;
2892                 goto err_common;
2893         }
2894
2895         atl1_check_options(adapter);
2896
2897         /* pre-init the MAC, and setup link */
2898         err = atl1_init_hw(&adapter->hw);
2899         if (err) {
2900                 err = -EIO;
2901                 goto err_common;
2902         }
2903
2904         atl1_pcie_patch(adapter);
2905         /* assume we have no link for now */
2906         netif_carrier_off(netdev);
2907         netif_stop_queue(netdev);
2908
2909         init_timer(&adapter->watchdog_timer);
2910         adapter->watchdog_timer.function = &atl1_watchdog;
2911         adapter->watchdog_timer.data = (unsigned long)adapter;
2912
2913         init_timer(&adapter->phy_config_timer);
2914         adapter->phy_config_timer.function = &atl1_phy_config;
2915         adapter->phy_config_timer.data = (unsigned long)adapter;
2916         adapter->phy_timer_pending = false;
2917
2918         INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
2919
2920         INIT_WORK(&adapter->link_chg_task, atlx_link_chg_task);
2921
2922         INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
2923
2924         err = register_netdev(netdev);
2925         if (err)
2926                 goto err_common;
2927
2928         cards_found++;
2929         atl1_via_workaround(adapter);
2930         return 0;
2931
2932 err_common:
2933         pci_iounmap(pdev, adapter->hw.hw_addr);
2934 err_pci_iomap:
2935         free_netdev(netdev);
2936 err_alloc_etherdev:
2937         pci_release_regions(pdev);
2938 err_dma:
2939 err_request_regions:
2940         pci_disable_device(pdev);
2941         return err;
2942 }
2943
2944 /*
2945  * atl1_remove - Device Removal Routine
2946  * @pdev: PCI device information struct
2947  *
2948  * atl1_remove is called by the PCI subsystem to alert the driver
2949  * that it should release a PCI device.  The could be caused by a
2950  * Hot-Plug event, or because the driver is going to be removed from
2951  * memory.
2952  */
2953 static void __devexit atl1_remove(struct pci_dev *pdev)
2954 {
2955         struct net_device *netdev = pci_get_drvdata(pdev);
2956         struct atl1_adapter *adapter;
2957         /* Device not available. Return. */
2958         if (!netdev)
2959                 return;
2960
2961         adapter = netdev_priv(netdev);
2962
2963         /*
2964          * Some atl1 boards lack persistent storage for their MAC, and get it
2965          * from the BIOS during POST.  If we've been messing with the MAC
2966          * address, we need to save the permanent one.
2967          */
2968         if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
2969                 memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr,
2970                         ETH_ALEN);
2971                 atl1_set_mac_addr(&adapter->hw);
2972         }
2973
2974         iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);
2975         unregister_netdev(netdev);
2976         pci_iounmap(pdev, adapter->hw.hw_addr);
2977         pci_release_regions(pdev);
2978         free_netdev(netdev);
2979         pci_disable_device(pdev);
2980 }
2981
2982 static struct pci_driver atl1_driver = {
2983         .name = ATLX_DRIVER_NAME,
2984         .id_table = atl1_pci_tbl,
2985         .probe = atl1_probe,
2986         .remove = __devexit_p(atl1_remove),
2987         .suspend = atl1_suspend,
2988         .resume = atl1_resume
2989 };
2990
2991 /*
2992  * atl1_exit_module - Driver Exit Cleanup Routine
2993  *
2994  * atl1_exit_module is called just before the driver is removed
2995  * from memory.
2996  */
2997 static void __exit atl1_exit_module(void)
2998 {
2999         pci_unregister_driver(&atl1_driver);
3000 }
3001
3002 /*
3003  * atl1_init_module - Driver Registration Routine
3004  *
3005  * atl1_init_module is the first routine called when the driver is
3006  * loaded. All it does is register with the PCI subsystem.
3007  */
3008 static int __init atl1_init_module(void)
3009 {
3010         return pci_register_driver(&atl1_driver);
3011 }
3012
3013 module_init(atl1_init_module);
3014 module_exit(atl1_exit_module);
3015
3016 struct atl1_stats {
3017         char stat_string[ETH_GSTRING_LEN];
3018         int sizeof_stat;
3019         int stat_offset;
3020 };
3021
3022 #define ATL1_STAT(m) \
3023         sizeof(((struct atl1_adapter *)0)->m), offsetof(struct atl1_adapter, m)
3024
3025 static struct atl1_stats atl1_gstrings_stats[] = {
3026         {"rx_packets", ATL1_STAT(soft_stats.rx_packets)},
3027         {"tx_packets", ATL1_STAT(soft_stats.tx_packets)},
3028         {"rx_bytes", ATL1_STAT(soft_stats.rx_bytes)},
3029         {"tx_bytes", ATL1_STAT(soft_stats.tx_bytes)},
3030         {"rx_errors", ATL1_STAT(soft_stats.rx_errors)},
3031         {"tx_errors", ATL1_STAT(soft_stats.tx_errors)},
3032         {"rx_dropped", ATL1_STAT(net_stats.rx_dropped)},
3033         {"tx_dropped", ATL1_STAT(net_stats.tx_dropped)},
3034         {"multicast", ATL1_STAT(soft_stats.multicast)},
3035         {"collisions", ATL1_STAT(soft_stats.collisions)},
3036         {"rx_length_errors", ATL1_STAT(soft_stats.rx_length_errors)},
3037         {"rx_over_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
3038         {"rx_crc_errors", ATL1_STAT(soft_stats.rx_crc_errors)},
3039         {"rx_frame_errors", ATL1_STAT(soft_stats.rx_frame_errors)},
3040         {"rx_fifo_errors", ATL1_STAT(soft_stats.rx_fifo_errors)},
3041         {"rx_missed_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
3042         {"tx_aborted_errors", ATL1_STAT(soft_stats.tx_aborted_errors)},
3043         {"tx_carrier_errors", ATL1_STAT(soft_stats.tx_carrier_errors)},
3044         {"tx_fifo_errors", ATL1_STAT(soft_stats.tx_fifo_errors)},
3045         {"tx_window_errors", ATL1_STAT(soft_stats.tx_window_errors)},
3046         {"tx_abort_exce_coll", ATL1_STAT(soft_stats.excecol)},
3047         {"tx_abort_late_coll", ATL1_STAT(soft_stats.latecol)},
3048         {"tx_deferred_ok", ATL1_STAT(soft_stats.deffer)},
3049         {"tx_single_coll_ok", ATL1_STAT(soft_stats.scc)},
3050         {"tx_multi_coll_ok", ATL1_STAT(soft_stats.mcc)},
3051         {"tx_underun", ATL1_STAT(soft_stats.tx_underun)},
3052         {"tx_trunc", ATL1_STAT(soft_stats.tx_trunc)},
3053         {"tx_pause", ATL1_STAT(soft_stats.tx_pause)},
3054         {"rx_pause", ATL1_STAT(soft_stats.rx_pause)},
3055         {"rx_rrd_ov", ATL1_STAT(soft_stats.rx_rrd_ov)},
3056         {"rx_trunc", ATL1_STAT(soft_stats.rx_trunc)}
3057 };
3058
3059 static void atl1_get_ethtool_stats(struct net_device *netdev,
3060         struct ethtool_stats *stats, u64 *data)
3061 {
3062         struct atl1_adapter *adapter = netdev_priv(netdev);
3063         int i;
3064         char *p;
3065
3066         for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
3067                 p = (char *)adapter+atl1_gstrings_stats[i].stat_offset;
3068                 data[i] = (atl1_gstrings_stats[i].sizeof_stat ==
3069                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
3070         }
3071
3072 }
3073
3074 static int atl1_get_sset_count(struct net_device *netdev, int sset)
3075 {
3076         switch (sset) {
3077         case ETH_SS_STATS:
3078                 return ARRAY_SIZE(atl1_gstrings_stats);
3079         default:
3080                 return -EOPNOTSUPP;
3081         }
3082 }
3083
3084 static int atl1_get_settings(struct net_device *netdev,
3085         struct ethtool_cmd *ecmd)
3086 {
3087         struct atl1_adapter *adapter = netdev_priv(netdev);
3088         struct atl1_hw *hw = &adapter->hw;
3089
3090         ecmd->supported = (SUPPORTED_10baseT_Half |
3091                            SUPPORTED_10baseT_Full |
3092                            SUPPORTED_100baseT_Half |
3093                            SUPPORTED_100baseT_Full |
3094                            SUPPORTED_1000baseT_Full |
3095                            SUPPORTED_Autoneg | SUPPORTED_TP);
3096         ecmd->advertising = ADVERTISED_TP;
3097         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3098             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3099                 ecmd->advertising |= ADVERTISED_Autoneg;
3100                 if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR) {
3101                         ecmd->advertising |= ADVERTISED_Autoneg;
3102                         ecmd->advertising |=
3103                             (ADVERTISED_10baseT_Half |
3104                              ADVERTISED_10baseT_Full |
3105                              ADVERTISED_100baseT_Half |
3106                              ADVERTISED_100baseT_Full |
3107                              ADVERTISED_1000baseT_Full);
3108                 } else
3109                         ecmd->advertising |= (ADVERTISED_1000baseT_Full);
3110         }
3111         ecmd->port = PORT_TP;
3112         ecmd->phy_address = 0;
3113         ecmd->transceiver = XCVR_INTERNAL;
3114
3115         if (netif_carrier_ok(adapter->netdev)) {
3116                 u16 link_speed, link_duplex;
3117                 atl1_get_speed_and_duplex(hw, &link_speed, &link_duplex);
3118                 ecmd->speed = link_speed;
3119                 if (link_duplex == FULL_DUPLEX)
3120                         ecmd->duplex = DUPLEX_FULL;
3121                 else
3122                         ecmd->duplex = DUPLEX_HALF;
3123         } else {
3124                 ecmd->speed = -1;
3125                 ecmd->duplex = -1;
3126         }
3127         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3128             hw->media_type == MEDIA_TYPE_1000M_FULL)
3129                 ecmd->autoneg = AUTONEG_ENABLE;
3130         else
3131                 ecmd->autoneg = AUTONEG_DISABLE;
3132
3133         return 0;
3134 }
3135
3136 static int atl1_set_settings(struct net_device *netdev,
3137         struct ethtool_cmd *ecmd)
3138 {
3139         struct atl1_adapter *adapter = netdev_priv(netdev);
3140         struct atl1_hw *hw = &adapter->hw;
3141         u16 phy_data;
3142         int ret_val = 0;
3143         u16 old_media_type = hw->media_type;
3144
3145         if (netif_running(adapter->netdev)) {
3146                 if (netif_msg_link(adapter))
3147                         dev_dbg(&adapter->pdev->dev,
3148                                 "ethtool shutting down adapter\n");
3149                 atl1_down(adapter);
3150         }
3151
3152         if (ecmd->autoneg == AUTONEG_ENABLE)
3153                 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
3154         else {
3155                 if (ecmd->speed == SPEED_1000) {
3156                         if (ecmd->duplex != DUPLEX_FULL) {
3157                                 if (netif_msg_link(adapter))
3158                                         dev_warn(&adapter->pdev->dev,
3159                                                 "1000M half is invalid\n");
3160                                 ret_val = -EINVAL;
3161                                 goto exit_sset;
3162                         }
3163                         hw->media_type = MEDIA_TYPE_1000M_FULL;
3164                 } else if (ecmd->speed == SPEED_100) {
3165                         if (ecmd->duplex == DUPLEX_FULL)
3166                                 hw->media_type = MEDIA_TYPE_100M_FULL;
3167                         else
3168                                 hw->media_type = MEDIA_TYPE_100M_HALF;
3169                 } else {
3170                         if (ecmd->duplex == DUPLEX_FULL)
3171                                 hw->media_type = MEDIA_TYPE_10M_FULL;
3172                         else
3173                                 hw->media_type = MEDIA_TYPE_10M_HALF;
3174                 }
3175         }
3176         switch (hw->media_type) {
3177         case MEDIA_TYPE_AUTO_SENSOR:
3178                 ecmd->advertising =
3179                     ADVERTISED_10baseT_Half |
3180                     ADVERTISED_10baseT_Full |
3181                     ADVERTISED_100baseT_Half |
3182                     ADVERTISED_100baseT_Full |
3183                     ADVERTISED_1000baseT_Full |
3184                     ADVERTISED_Autoneg | ADVERTISED_TP;
3185                 break;
3186         case MEDIA_TYPE_1000M_FULL:
3187                 ecmd->advertising =
3188                     ADVERTISED_1000baseT_Full |
3189                     ADVERTISED_Autoneg | ADVERTISED_TP;
3190                 break;
3191         default:
3192                 ecmd->advertising = 0;
3193                 break;
3194         }
3195         if (atl1_phy_setup_autoneg_adv(hw)) {
3196                 ret_val = -EINVAL;
3197                 if (netif_msg_link(adapter))
3198                         dev_warn(&adapter->pdev->dev,
3199                                 "invalid ethtool speed/duplex setting\n");
3200                 goto exit_sset;
3201         }
3202         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3203             hw->media_type == MEDIA_TYPE_1000M_FULL)
3204                 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
3205         else {
3206                 switch (hw->media_type) {
3207                 case MEDIA_TYPE_100M_FULL:
3208                         phy_data =
3209                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
3210                             MII_CR_RESET;
3211                         break;
3212                 case MEDIA_TYPE_100M_HALF:
3213                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
3214                         break;
3215                 case MEDIA_TYPE_10M_FULL:
3216                         phy_data =
3217                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
3218                         break;
3219                 default:
3220                         /* MEDIA_TYPE_10M_HALF: */
3221                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
3222                         break;
3223                 }
3224         }
3225         atl1_write_phy_reg(hw, MII_BMCR, phy_data);
3226 exit_sset:
3227         if (ret_val)
3228                 hw->media_type = old_media_type;
3229
3230         if (netif_running(adapter->netdev)) {
3231                 if (netif_msg_link(adapter))
3232                         dev_dbg(&adapter->pdev->dev,
3233                                 "ethtool starting adapter\n");
3234                 atl1_up(adapter);
3235         } else if (!ret_val) {
3236                 if (netif_msg_link(adapter))
3237                         dev_dbg(&adapter->pdev->dev,
3238                                 "ethtool resetting adapter\n");
3239                 atl1_reset(adapter);
3240         }
3241         return ret_val;
3242 }
3243
3244 static void atl1_get_drvinfo(struct net_device *netdev,
3245         struct ethtool_drvinfo *drvinfo)
3246 {
3247         struct atl1_adapter *adapter = netdev_priv(netdev);
3248
3249         strncpy(drvinfo->driver, ATLX_DRIVER_NAME, sizeof(drvinfo->driver));
3250         strncpy(drvinfo->version, ATLX_DRIVER_VERSION,
3251                 sizeof(drvinfo->version));
3252         strncpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version));
3253         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
3254                 sizeof(drvinfo->bus_info));
3255         drvinfo->eedump_len = ATL1_EEDUMP_LEN;
3256 }
3257
3258 static void atl1_get_wol(struct net_device *netdev,
3259         struct ethtool_wolinfo *wol)
3260 {
3261         struct atl1_adapter *adapter = netdev_priv(netdev);
3262
3263         wol->supported = WAKE_UCAST | WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC;
3264         wol->wolopts = 0;
3265         if (adapter->wol & ATLX_WUFC_EX)
3266                 wol->wolopts |= WAKE_UCAST;
3267         if (adapter->wol & ATLX_WUFC_MC)
3268                 wol->wolopts |= WAKE_MCAST;
3269         if (adapter->wol & ATLX_WUFC_BC)
3270                 wol->wolopts |= WAKE_BCAST;
3271         if (adapter->wol & ATLX_WUFC_MAG)
3272                 wol->wolopts |= WAKE_MAGIC;
3273         return;
3274 }
3275
3276 static int atl1_set_wol(struct net_device *netdev,
3277         struct ethtool_wolinfo *wol)
3278 {
3279         struct atl1_adapter *adapter = netdev_priv(netdev);
3280
3281         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
3282                 return -EOPNOTSUPP;
3283         adapter->wol = 0;
3284         if (wol->wolopts & WAKE_UCAST)
3285                 adapter->wol |= ATLX_WUFC_EX;
3286         if (wol->wolopts & WAKE_MCAST)
3287                 adapter->wol |= ATLX_WUFC_MC;
3288         if (wol->wolopts & WAKE_BCAST)
3289                 adapter->wol |= ATLX_WUFC_BC;
3290         if (wol->wolopts & WAKE_MAGIC)
3291                 adapter->wol |= ATLX_WUFC_MAG;
3292         return 0;
3293 }
3294
3295 static u32 atl1_get_msglevel(struct net_device *netdev)
3296 {
3297         struct atl1_adapter *adapter = netdev_priv(netdev);
3298         return adapter->msg_enable;
3299 }
3300
3301 static void atl1_set_msglevel(struct net_device *netdev, u32 value)
3302 {
3303         struct atl1_adapter *adapter = netdev_priv(netdev);
3304         adapter->msg_enable = value;
3305 }
3306
3307 static int atl1_get_regs_len(struct net_device *netdev)
3308 {
3309         return ATL1_REG_COUNT * sizeof(u32);
3310 }
3311
3312 static void atl1_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
3313         void *p)
3314 {
3315         struct atl1_adapter *adapter = netdev_priv(netdev);
3316         struct atl1_hw *hw = &adapter->hw;
3317         unsigned int i;
3318         u32 *regbuf = p;
3319
3320         for (i = 0; i < ATL1_REG_COUNT; i++) {
3321                 /*
3322                  * This switch statement avoids reserved regions
3323                  * of register space.
3324                  */
3325                 switch (i) {
3326                 case 6 ... 9:
3327                 case 14:
3328                 case 29 ... 31:
3329                 case 34 ... 63:
3330                 case 75 ... 127:
3331                 case 136 ... 1023:
3332                 case 1027 ... 1087:
3333                 case 1091 ... 1151:
3334                 case 1194 ... 1195:
3335                 case 1200 ... 1201:
3336                 case 1206 ... 1213:
3337                 case 1216 ... 1279:
3338                 case 1290 ... 1311:
3339                 case 1323 ... 1343:
3340                 case 1358 ... 1359:
3341                 case 1368 ... 1375:
3342                 case 1378 ... 1383:
3343                 case 1388 ... 1391:
3344                 case 1393 ... 1395:
3345                 case 1402 ... 1403:
3346                 case 1410 ... 1471:
3347                 case 1522 ... 1535:
3348                         /* reserved region; don't read it */
3349                         regbuf[i] = 0;
3350                         break;
3351                 default:
3352                         /* unreserved region */
3353                         regbuf[i] = ioread32(hw->hw_addr + (i * sizeof(u32)));
3354                 }
3355         }
3356 }
3357
3358 static void atl1_get_ringparam(struct net_device *netdev,
3359         struct ethtool_ringparam *ring)
3360 {
3361         struct atl1_adapter *adapter = netdev_priv(netdev);
3362         struct atl1_tpd_ring *txdr = &adapter->tpd_ring;
3363         struct atl1_rfd_ring *rxdr = &adapter->rfd_ring;
3364
3365         ring->rx_max_pending = ATL1_MAX_RFD;
3366         ring->tx_max_pending = ATL1_MAX_TPD;
3367         ring->rx_mini_max_pending = 0;
3368         ring->rx_jumbo_max_pending = 0;
3369         ring->rx_pending = rxdr->count;
3370         ring->tx_pending = txdr->count;
3371         ring->rx_mini_pending = 0;
3372         ring->rx_jumbo_pending = 0;
3373 }
3374
3375 static int atl1_set_ringparam(struct net_device *netdev,
3376         struct ethtool_ringparam *ring)
3377 {
3378         struct atl1_adapter *adapter = netdev_priv(netdev);
3379         struct atl1_tpd_ring *tpdr = &adapter->tpd_ring;
3380         struct atl1_rrd_ring *rrdr = &adapter->rrd_ring;
3381         struct atl1_rfd_ring *rfdr = &adapter->rfd_ring;
3382
3383         struct atl1_tpd_ring tpd_old, tpd_new;
3384         struct atl1_rfd_ring rfd_old, rfd_new;
3385         struct atl1_rrd_ring rrd_old, rrd_new;
3386         struct atl1_ring_header rhdr_old, rhdr_new;
3387         int err;
3388
3389         tpd_old = adapter->tpd_ring;
3390         rfd_old = adapter->rfd_ring;
3391         rrd_old = adapter->rrd_ring;
3392         rhdr_old = adapter->ring_header;
3393
3394         if (netif_running(adapter->netdev))
3395                 atl1_down(adapter);
3396
3397         rfdr->count = (u16) max(ring->rx_pending, (u32) ATL1_MIN_RFD);
3398         rfdr->count = rfdr->count > ATL1_MAX_RFD ? ATL1_MAX_RFD :
3399                         rfdr->count;
3400         rfdr->count = (rfdr->count + 3) & ~3;
3401         rrdr->count = rfdr->count;
3402
3403         tpdr->count = (u16) max(ring->tx_pending, (u32) ATL1_MIN_TPD);
3404         tpdr->count = tpdr->count > ATL1_MAX_TPD ? ATL1_MAX_TPD :
3405                         tpdr->count;
3406         tpdr->count = (tpdr->count + 3) & ~3;
3407
3408         if (netif_running(adapter->netdev)) {
3409                 /* try to get new resources before deleting old */
3410                 err = atl1_setup_ring_resources(adapter);
3411                 if (err)
3412                         goto err_setup_ring;
3413
3414                 /*
3415                  * save the new, restore the old in order to free it,
3416                  * then restore the new back again
3417                  */
3418
3419                 rfd_new = adapter->rfd_ring;
3420                 rrd_new = adapter->rrd_ring;
3421                 tpd_new = adapter->tpd_ring;
3422                 rhdr_new = adapter->ring_header;
3423                 adapter->rfd_ring = rfd_old;
3424                 adapter->rrd_ring = rrd_old;
3425                 adapter->tpd_ring = tpd_old;
3426                 adapter->ring_header = rhdr_old;
3427                 atl1_free_ring_resources(adapter);
3428                 adapter->rfd_ring = rfd_new;
3429                 adapter->rrd_ring = rrd_new;
3430                 adapter->tpd_ring = tpd_new;
3431                 adapter->ring_header = rhdr_new;
3432
3433                 err = atl1_up(adapter);
3434                 if (err)
3435                         return err;
3436         }
3437         return 0;
3438
3439 err_setup_ring:
3440         adapter->rfd_ring = rfd_old;
3441         adapter->rrd_ring = rrd_old;
3442         adapter->tpd_ring = tpd_old;
3443         adapter->ring_header = rhdr_old;
3444         atl1_up(adapter);
3445         return err;
3446 }
3447
3448 static void atl1_get_pauseparam(struct net_device *netdev,
3449         struct ethtool_pauseparam *epause)
3450 {
3451         struct atl1_adapter *adapter = netdev_priv(netdev);
3452         struct atl1_hw *hw = &adapter->hw;
3453
3454         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3455             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3456                 epause->autoneg = AUTONEG_ENABLE;
3457         } else {
3458                 epause->autoneg = AUTONEG_DISABLE;
3459         }
3460         epause->rx_pause = 1;
3461         epause->tx_pause = 1;
3462 }
3463
3464 static int atl1_set_pauseparam(struct net_device *netdev,
3465         struct ethtool_pauseparam *epause)
3466 {
3467         struct atl1_adapter *adapter = netdev_priv(netdev);
3468         struct atl1_hw *hw = &adapter->hw;
3469
3470         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3471             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3472                 epause->autoneg = AUTONEG_ENABLE;
3473         } else {
3474                 epause->autoneg = AUTONEG_DISABLE;
3475         }
3476
3477         epause->rx_pause = 1;
3478         epause->tx_pause = 1;
3479
3480         return 0;
3481 }
3482
3483 /* FIXME: is this right? -- CHS */
3484 static u32 atl1_get_rx_csum(struct net_device *netdev)
3485 {
3486         return 1;
3487 }
3488
3489 static void atl1_get_strings(struct net_device *netdev, u32 stringset,
3490         u8 *data)
3491 {
3492         u8 *p = data;
3493         int i;
3494
3495         switch (stringset) {
3496         case ETH_SS_STATS:
3497                 for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
3498                         memcpy(p, atl1_gstrings_stats[i].stat_string,
3499                                 ETH_GSTRING_LEN);
3500                         p += ETH_GSTRING_LEN;
3501                 }
3502                 break;
3503         }
3504 }
3505
3506 static int atl1_nway_reset(struct net_device *netdev)
3507 {
3508         struct atl1_adapter *adapter = netdev_priv(netdev);
3509         struct atl1_hw *hw = &adapter->hw;
3510
3511         if (netif_running(netdev)) {
3512                 u16 phy_data;
3513                 atl1_down(adapter);
3514
3515                 if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3516                         hw->media_type == MEDIA_TYPE_1000M_FULL) {
3517                         phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
3518                 } else {
3519                         switch (hw->media_type) {
3520                         case MEDIA_TYPE_100M_FULL:
3521                                 phy_data = MII_CR_FULL_DUPLEX |
3522                                         MII_CR_SPEED_100 | MII_CR_RESET;
3523                                 break;
3524                         case MEDIA_TYPE_100M_HALF:
3525                                 phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
3526                                 break;
3527                         case MEDIA_TYPE_10M_FULL:
3528                                 phy_data = MII_CR_FULL_DUPLEX |
3529                                         MII_CR_SPEED_10 | MII_CR_RESET;
3530                                 break;
3531                         default:
3532                                 /* MEDIA_TYPE_10M_HALF */
3533                                 phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
3534                         }
3535                 }
3536                 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
3537                 atl1_up(adapter);
3538         }
3539         return 0;
3540 }
3541
3542 const struct ethtool_ops atl1_ethtool_ops = {
3543         .get_settings           = atl1_get_settings,
3544         .set_settings           = atl1_set_settings,
3545         .get_drvinfo            = atl1_get_drvinfo,
3546         .get_wol                = atl1_get_wol,
3547         .set_wol                = atl1_set_wol,
3548         .get_msglevel           = atl1_get_msglevel,
3549         .set_msglevel           = atl1_set_msglevel,
3550         .get_regs_len           = atl1_get_regs_len,
3551         .get_regs               = atl1_get_regs,
3552         .get_ringparam          = atl1_get_ringparam,
3553         .set_ringparam          = atl1_set_ringparam,
3554         .get_pauseparam         = atl1_get_pauseparam,
3555         .set_pauseparam         = atl1_set_pauseparam,
3556         .get_rx_csum            = atl1_get_rx_csum,
3557         .set_tx_csum            = ethtool_op_set_tx_hw_csum,
3558         .get_link               = ethtool_op_get_link,
3559         .set_sg                 = ethtool_op_set_sg,
3560         .get_strings            = atl1_get_strings,
3561         .nway_reset             = atl1_nway_reset,
3562         .get_ethtool_stats      = atl1_get_ethtool_stats,
3563         .get_sset_count         = atl1_get_sset_count,
3564         .set_tso                = ethtool_op_set_tso,
3565 };