2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2007 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
8 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
9 * auto-placement support, read-while load support, various fixes
10 * Copyright (C) Nokia Corporation, 2007
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/sched.h>
21 #include <linux/interrupt.h>
22 #include <linux/jiffies.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/onenand.h>
25 #include <linux/mtd/partitions.h>
30 * onenand_oob_64 - oob info for large (2KB) page
32 static struct nand_ecclayout onenand_oob_64 = {
41 {2, 3}, {14, 2}, {18, 3}, {30, 2},
42 {34, 3}, {46, 2}, {50, 3}, {62, 2}
47 * onenand_oob_32 - oob info for middle (1KB) page
49 static struct nand_ecclayout onenand_oob_32 = {
55 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
58 static const unsigned char ffchars[] = {
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
61 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
62 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
63 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
64 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
65 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
66 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
70 * onenand_readw - [OneNAND Interface] Read OneNAND register
71 * @param addr address to read
73 * Read OneNAND register
75 static unsigned short onenand_readw(void __iomem *addr)
81 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
82 * @param value value to write
83 * @param addr address to write
85 * Write OneNAND register with value
87 static void onenand_writew(unsigned short value, void __iomem *addr)
93 * onenand_block_address - [DEFAULT] Get block address
94 * @param this onenand chip data structure
95 * @param block the block
96 * @return translated block address if DDP, otherwise same
98 * Setup Start Address 1 Register (F100h)
100 static int onenand_block_address(struct onenand_chip *this, int block)
102 /* Device Flash Core select, NAND Flash Block Address */
103 if (block & this->density_mask)
104 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
110 * onenand_bufferram_address - [DEFAULT] Get bufferram address
111 * @param this onenand chip data structure
112 * @param block the block
113 * @return set DBS value if DDP, otherwise 0
115 * Setup Start Address 2 Register (F101h) for DDP
117 static int onenand_bufferram_address(struct onenand_chip *this, int block)
119 /* Device BufferRAM Select */
120 if (block & this->density_mask)
121 return ONENAND_DDP_CHIP1;
123 return ONENAND_DDP_CHIP0;
127 * onenand_page_address - [DEFAULT] Get page address
128 * @param page the page address
129 * @param sector the sector address
130 * @return combined page and sector address
132 * Setup Start Address 8 Register (F107h)
134 static int onenand_page_address(int page, int sector)
136 /* Flash Page Address, Flash Sector Address */
139 fpa = page & ONENAND_FPA_MASK;
140 fsa = sector & ONENAND_FSA_MASK;
142 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
146 * onenand_buffer_address - [DEFAULT] Get buffer address
147 * @param dataram1 DataRAM index
148 * @param sectors the sector address
149 * @param count the number of sectors
150 * @return the start buffer value
152 * Setup Start Buffer Register (F200h)
154 static int onenand_buffer_address(int dataram1, int sectors, int count)
158 /* BufferRAM Sector Address */
159 bsa = sectors & ONENAND_BSA_MASK;
162 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
164 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
166 /* BufferRAM Sector Count */
167 bsc = count & ONENAND_BSC_MASK;
169 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
173 * onenand_get_density - [DEFAULT] Get OneNAND density
174 * @param dev_id OneNAND device ID
176 * Get OneNAND density from device ID
178 static inline int onenand_get_density(int dev_id)
180 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
181 return (density & ONENAND_DEVICE_DENSITY_MASK);
185 * onenand_command - [DEFAULT] Send command to OneNAND device
186 * @param mtd MTD device structure
187 * @param cmd the command to be sent
188 * @param addr offset to read from or write to
189 * @param len number of bytes to read or write
191 * Send command to OneNAND device. This function is used for middle/large page
192 * devices (1KB/2KB Bytes per page)
194 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
196 struct onenand_chip *this = mtd->priv;
197 int value, block, page;
199 /* Address translation */
201 case ONENAND_CMD_UNLOCK:
202 case ONENAND_CMD_LOCK:
203 case ONENAND_CMD_LOCK_TIGHT:
204 case ONENAND_CMD_UNLOCK_ALL:
209 case ONENAND_CMD_ERASE:
210 case ONENAND_CMD_BUFFERRAM:
211 case ONENAND_CMD_OTP_ACCESS:
212 block = (int) (addr >> this->erase_shift);
217 block = (int) (addr >> this->erase_shift);
218 page = (int) (addr >> this->page_shift);
220 if (ONENAND_IS_2PLANE(this)) {
221 /* Make the even block number */
223 /* Is it the odd plane? */
224 if (addr & this->writesize)
228 page &= this->page_mask;
232 /* NOTE: The setting order of the registers is very important! */
233 if (cmd == ONENAND_CMD_BUFFERRAM) {
234 /* Select DataRAM for DDP */
235 value = onenand_bufferram_address(this, block);
236 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
238 if (ONENAND_IS_2PLANE(this))
239 /* It is always BufferRAM0 */
240 ONENAND_SET_BUFFERRAM0(this);
242 /* Switch to the next data buffer */
243 ONENAND_SET_NEXT_BUFFERRAM(this);
249 /* Write 'DFS, FBA' of Flash */
250 value = onenand_block_address(this, block);
251 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
253 /* Select DataRAM for DDP */
254 value = onenand_bufferram_address(this, block);
255 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
259 /* Now we use page size operation */
260 int sectors = 4, count = 4;
264 case ONENAND_CMD_READ:
265 case ONENAND_CMD_READOOB:
266 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
270 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
271 cmd = ONENAND_CMD_2X_PROG;
272 dataram = ONENAND_CURRENT_BUFFERRAM(this);
276 /* Write 'FPA, FSA' of Flash */
277 value = onenand_page_address(page, sectors);
278 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
280 /* Write 'BSA, BSC' of DataRAM */
281 value = onenand_buffer_address(dataram, sectors, count);
282 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
285 /* Interrupt clear */
286 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
289 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
295 * onenand_wait - [DEFAULT] wait until the command is done
296 * @param mtd MTD device structure
297 * @param state state to select the max. timeout value
299 * Wait for command done. This applies to all OneNAND command
300 * Read can take up to 30us, erase up to 2ms and program up to 350us
301 * according to general OneNAND specs
303 static int onenand_wait(struct mtd_info *mtd, int state)
305 struct onenand_chip * this = mtd->priv;
306 unsigned long timeout;
307 unsigned int flags = ONENAND_INT_MASTER;
308 unsigned int interrupt = 0;
311 /* The 20 msec is enough */
312 timeout = jiffies + msecs_to_jiffies(20);
313 while (time_before(jiffies, timeout)) {
314 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
316 if (interrupt & flags)
319 if (state != FL_READING)
322 /* To get correct interrupt status in timeout case */
323 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
325 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
327 if (ctrl & ONENAND_CTRL_ERROR) {
328 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
329 if (ctrl & ONENAND_CTRL_LOCK)
330 printk(KERN_ERR "onenand_wait: it's locked error.\n");
334 if (interrupt & ONENAND_INT_READ) {
335 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
337 if (ecc & ONENAND_ECC_2BIT_ALL) {
338 printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
339 mtd->ecc_stats.failed++;
341 } else if (ecc & ONENAND_ECC_1BIT_ALL) {
342 printk(KERN_INFO "onenand_wait: correctable ECC error = 0x%04x\n", ecc);
343 mtd->ecc_stats.corrected++;
346 } else if (state == FL_READING) {
347 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
355 * onenand_interrupt - [DEFAULT] onenand interrupt handler
356 * @param irq onenand interrupt number
357 * @param dev_id interrupt data
361 static irqreturn_t onenand_interrupt(int irq, void *data)
363 struct onenand_chip *this = data;
365 /* To handle shared interrupt */
366 if (!this->complete.done)
367 complete(&this->complete);
373 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
374 * @param mtd MTD device structure
375 * @param state state to select the max. timeout value
377 * Wait for command done.
379 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
381 struct onenand_chip *this = mtd->priv;
383 wait_for_completion(&this->complete);
385 return onenand_wait(mtd, state);
389 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
390 * @param mtd MTD device structure
391 * @param state state to select the max. timeout value
393 * Try interrupt based wait (It is used one-time)
395 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
397 struct onenand_chip *this = mtd->priv;
398 unsigned long remain, timeout;
400 /* We use interrupt wait first */
401 this->wait = onenand_interrupt_wait;
403 timeout = msecs_to_jiffies(100);
404 remain = wait_for_completion_timeout(&this->complete, timeout);
406 printk(KERN_INFO "OneNAND: There's no interrupt. "
407 "We use the normal wait\n");
409 /* Release the irq */
410 free_irq(this->irq, this);
412 this->wait = onenand_wait;
415 return onenand_wait(mtd, state);
419 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
420 * @param mtd MTD device structure
422 * There's two method to wait onenand work
423 * 1. polling - read interrupt status register
424 * 2. interrupt - use the kernel interrupt method
426 static void onenand_setup_wait(struct mtd_info *mtd)
428 struct onenand_chip *this = mtd->priv;
431 init_completion(&this->complete);
433 if (this->irq <= 0) {
434 this->wait = onenand_wait;
438 if (request_irq(this->irq, &onenand_interrupt,
439 IRQF_SHARED, "onenand", this)) {
440 /* If we can't get irq, use the normal wait */
441 this->wait = onenand_wait;
445 /* Enable interrupt */
446 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
447 syscfg |= ONENAND_SYS_CFG1_IOBE;
448 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
450 this->wait = onenand_try_interrupt_wait;
454 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
455 * @param mtd MTD data structure
456 * @param area BufferRAM area
457 * @return offset given area
459 * Return BufferRAM offset given area
461 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
463 struct onenand_chip *this = mtd->priv;
465 if (ONENAND_CURRENT_BUFFERRAM(this)) {
466 /* Note: the 'this->writesize' is a real page size */
467 if (area == ONENAND_DATARAM)
468 return this->writesize;
469 if (area == ONENAND_SPARERAM)
477 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
478 * @param mtd MTD data structure
479 * @param area BufferRAM area
480 * @param buffer the databuffer to put/get data
481 * @param offset offset to read from or write to
482 * @param count number of bytes to read/write
484 * Read the BufferRAM area
486 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
487 unsigned char *buffer, int offset, size_t count)
489 struct onenand_chip *this = mtd->priv;
490 void __iomem *bufferram;
492 bufferram = this->base + area;
494 bufferram += onenand_bufferram_offset(mtd, area);
496 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
499 /* Align with word(16-bit) size */
502 /* Read word and save byte */
503 word = this->read_word(bufferram + offset + count);
504 buffer[count] = (word & 0xff);
507 memcpy(buffer, bufferram + offset, count);
513 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
514 * @param mtd MTD data structure
515 * @param area BufferRAM area
516 * @param buffer the databuffer to put/get data
517 * @param offset offset to read from or write to
518 * @param count number of bytes to read/write
520 * Read the BufferRAM area with Sync. Burst Mode
522 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
523 unsigned char *buffer, int offset, size_t count)
525 struct onenand_chip *this = mtd->priv;
526 void __iomem *bufferram;
528 bufferram = this->base + area;
530 bufferram += onenand_bufferram_offset(mtd, area);
532 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
534 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
537 /* Align with word(16-bit) size */
540 /* Read word and save byte */
541 word = this->read_word(bufferram + offset + count);
542 buffer[count] = (word & 0xff);
545 memcpy(buffer, bufferram + offset, count);
547 this->mmcontrol(mtd, 0);
553 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
554 * @param mtd MTD data structure
555 * @param area BufferRAM area
556 * @param buffer the databuffer to put/get data
557 * @param offset offset to read from or write to
558 * @param count number of bytes to read/write
560 * Write the BufferRAM area
562 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
563 const unsigned char *buffer, int offset, size_t count)
565 struct onenand_chip *this = mtd->priv;
566 void __iomem *bufferram;
568 bufferram = this->base + area;
570 bufferram += onenand_bufferram_offset(mtd, area);
572 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
576 /* Align with word(16-bit) size */
579 /* Calculate byte access offset */
580 byte_offset = offset + count;
582 /* Read word and save byte */
583 word = this->read_word(bufferram + byte_offset);
584 word = (word & ~0xff) | buffer[count];
585 this->write_word(word, bufferram + byte_offset);
588 memcpy(bufferram + offset, buffer, count);
594 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
595 * @param mtd MTD data structure
596 * @param addr address to check
597 * @return blockpage address
599 * Get blockpage address at 2x program mode
601 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
603 struct onenand_chip *this = mtd->priv;
604 int blockpage, block, page;
606 /* Calculate the even block number */
607 block = (int) (addr >> this->erase_shift) & ~1;
608 /* Is it the odd plane? */
609 if (addr & this->writesize)
611 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
612 blockpage = (block << 7) | page;
618 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
619 * @param mtd MTD data structure
620 * @param addr address to check
621 * @return 1 if there are valid data, otherwise 0
623 * Check bufferram if there is data we required
625 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
627 struct onenand_chip *this = mtd->priv;
628 int blockpage, found = 0;
631 if (ONENAND_IS_2PLANE(this))
632 blockpage = onenand_get_2x_blockpage(mtd, addr);
634 blockpage = (int) (addr >> this->page_shift);
636 /* Is there valid data? */
637 i = ONENAND_CURRENT_BUFFERRAM(this);
638 if (this->bufferram[i].blockpage == blockpage)
641 /* Check another BufferRAM */
642 i = ONENAND_NEXT_BUFFERRAM(this);
643 if (this->bufferram[i].blockpage == blockpage) {
644 ONENAND_SET_NEXT_BUFFERRAM(this);
649 if (found && ONENAND_IS_DDP(this)) {
650 /* Select DataRAM for DDP */
651 int block = (int) (addr >> this->erase_shift);
652 int value = onenand_bufferram_address(this, block);
653 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
660 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
661 * @param mtd MTD data structure
662 * @param addr address to update
663 * @param valid valid flag
665 * Update BufferRAM information
667 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
670 struct onenand_chip *this = mtd->priv;
674 if (ONENAND_IS_2PLANE(this))
675 blockpage = onenand_get_2x_blockpage(mtd, addr);
677 blockpage = (int) (addr >> this->page_shift);
679 /* Invalidate another BufferRAM */
680 i = ONENAND_NEXT_BUFFERRAM(this);
681 if (this->bufferram[i].blockpage == blockpage)
682 this->bufferram[i].blockpage = -1;
684 /* Update BufferRAM */
685 i = ONENAND_CURRENT_BUFFERRAM(this);
687 this->bufferram[i].blockpage = blockpage;
689 this->bufferram[i].blockpage = -1;
693 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
694 * @param mtd MTD data structure
695 * @param addr start address to invalidate
696 * @param len length to invalidate
698 * Invalidate BufferRAM information
700 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
703 struct onenand_chip *this = mtd->priv;
705 loff_t end_addr = addr + len;
707 /* Invalidate BufferRAM */
708 for (i = 0; i < MAX_BUFFERRAM; i++) {
709 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
710 if (buf_addr >= addr && buf_addr < end_addr)
711 this->bufferram[i].blockpage = -1;
716 * onenand_get_device - [GENERIC] Get chip for selected access
717 * @param mtd MTD device structure
718 * @param new_state the state which is requested
720 * Get the device and lock it for exclusive access
722 static int onenand_get_device(struct mtd_info *mtd, int new_state)
724 struct onenand_chip *this = mtd->priv;
725 DECLARE_WAITQUEUE(wait, current);
728 * Grab the lock and see if the device is available
731 spin_lock(&this->chip_lock);
732 if (this->state == FL_READY) {
733 this->state = new_state;
734 spin_unlock(&this->chip_lock);
737 if (new_state == FL_PM_SUSPENDED) {
738 spin_unlock(&this->chip_lock);
739 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
741 set_current_state(TASK_UNINTERRUPTIBLE);
742 add_wait_queue(&this->wq, &wait);
743 spin_unlock(&this->chip_lock);
745 remove_wait_queue(&this->wq, &wait);
752 * onenand_release_device - [GENERIC] release chip
753 * @param mtd MTD device structure
755 * Deselect, release chip lock and wake up anyone waiting on the device
757 static void onenand_release_device(struct mtd_info *mtd)
759 struct onenand_chip *this = mtd->priv;
761 /* Release the chip */
762 spin_lock(&this->chip_lock);
763 this->state = FL_READY;
765 spin_unlock(&this->chip_lock);
769 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
770 * @param mtd MTD device structure
771 * @param buf destination address
772 * @param column oob offset to read from
773 * @param thislen oob length to read
775 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
778 struct onenand_chip *this = mtd->priv;
779 struct nand_oobfree *free;
780 int readcol = column;
781 int readend = column + thislen;
784 uint8_t *oob_buf = this->oob_buf;
786 free = this->ecclayout->oobfree;
787 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
788 if (readcol >= lastgap)
789 readcol += free->offset - lastgap;
790 if (readend >= lastgap)
791 readend += free->offset - lastgap;
792 lastgap = free->offset + free->length;
794 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
795 free = this->ecclayout->oobfree;
796 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
797 int free_end = free->offset + free->length;
798 if (free->offset < readend && free_end > readcol) {
799 int st = max_t(int,free->offset,readcol);
800 int ed = min_t(int,free_end,readend);
802 memcpy(buf, oob_buf + st, n);
804 } else if (column == 0)
811 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
812 * @param mtd MTD device structure
813 * @param from offset to read from
814 * @param ops: oob operation description structure
816 * OneNAND read main and/or out-of-band data
818 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
819 struct mtd_oob_ops *ops)
821 struct onenand_chip *this = mtd->priv;
822 struct mtd_ecc_stats stats;
823 size_t len = ops->len;
824 size_t ooblen = ops->ooblen;
825 u_char *buf = ops->datbuf;
826 u_char *oobbuf = ops->oobbuf;
827 int read = 0, column, thislen;
828 int oobread = 0, oobcolumn, thisooblen, oobsize;
829 int ret = 0, boundary = 0;
830 int writesize = this->writesize;
832 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
834 if (ops->mode == MTD_OOB_AUTO)
835 oobsize = this->ecclayout->oobavail;
837 oobsize = mtd->oobsize;
839 oobcolumn = from & (mtd->oobsize - 1);
841 /* Do not allow reads past end of device */
842 if ((from + len) > mtd->size) {
843 printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n");
849 stats = mtd->ecc_stats;
851 /* Read-while-load method */
853 /* Do first load to bufferRAM */
855 if (!onenand_check_bufferram(mtd, from)) {
856 this->command(mtd, ONENAND_CMD_READ, from, writesize);
857 ret = this->wait(mtd, FL_READING);
858 onenand_update_bufferram(mtd, from, !ret);
864 thislen = min_t(int, writesize, len - read);
865 column = from & (writesize - 1);
866 if (column + thislen > writesize)
867 thislen = writesize - column;
870 /* If there is more to load then start next load */
872 if (read + thislen < len) {
873 this->command(mtd, ONENAND_CMD_READ, from, writesize);
875 * Chip boundary handling in DDP
876 * Now we issued chip 1 read and pointed chip 1
877 * bufferam so we have to point chip 0 bufferam.
879 if (ONENAND_IS_DDP(this) &&
880 unlikely(from == (this->chipsize >> 1))) {
881 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
885 ONENAND_SET_PREV_BUFFERRAM(this);
887 /* While load is going, read from last bufferRAM */
888 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
890 /* Read oob area if needed */
892 thisooblen = oobsize - oobcolumn;
893 thisooblen = min_t(int, thisooblen, ooblen - oobread);
895 if (ops->mode == MTD_OOB_AUTO)
896 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
898 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
899 oobread += thisooblen;
900 oobbuf += thisooblen;
904 /* See if we are done */
908 /* Set up for next read from bufferRAM */
909 if (unlikely(boundary))
910 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
911 ONENAND_SET_NEXT_BUFFERRAM(this);
913 thislen = min_t(int, writesize, len - read);
916 /* Now wait for load */
917 ret = this->wait(mtd, FL_READING);
918 onenand_update_bufferram(mtd, from, !ret);
924 * Return success, if no ECC failures, else -EBADMSG
925 * fs driver will take care of that, because
926 * retlen == desired len and result == -EBADMSG
929 ops->oobretlen = oobread;
934 if (mtd->ecc_stats.failed - stats.failed)
937 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
941 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
942 * @param mtd MTD device structure
943 * @param from offset to read from
944 * @param ops: oob operation description structure
946 * OneNAND read out-of-band data from the spare area
948 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
949 struct mtd_oob_ops *ops)
951 struct onenand_chip *this = mtd->priv;
952 struct mtd_ecc_stats stats;
953 int read = 0, thislen, column, oobsize;
954 size_t len = ops->ooblen;
955 mtd_oob_mode_t mode = ops->mode;
956 u_char *buf = ops->oobbuf;
959 from += ops->ooboffs;
961 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
963 /* Initialize return length value */
966 if (mode == MTD_OOB_AUTO)
967 oobsize = this->ecclayout->oobavail;
969 oobsize = mtd->oobsize;
971 column = from & (mtd->oobsize - 1);
973 if (unlikely(column >= oobsize)) {
974 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n");
978 /* Do not allow reads past end of device */
979 if (unlikely(from >= mtd->size ||
980 column + len > ((mtd->size >> this->page_shift) -
981 (from >> this->page_shift)) * oobsize)) {
982 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n");
986 stats = mtd->ecc_stats;
991 thislen = oobsize - column;
992 thislen = min_t(int, thislen, len);
994 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
996 onenand_update_bufferram(mtd, from, 0);
998 ret = this->wait(mtd, FL_READING);
999 if (ret && ret != -EBADMSG) {
1000 printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret);
1004 if (mode == MTD_OOB_AUTO)
1005 onenand_transfer_auto_oob(mtd, buf, column, thislen);
1007 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1019 from += mtd->writesize;
1024 ops->oobretlen = read;
1029 if (mtd->ecc_stats.failed - stats.failed)
1036 * onenand_read - [MTD Interface] Read data from flash
1037 * @param mtd MTD device structure
1038 * @param from offset to read from
1039 * @param len number of bytes to read
1040 * @param retlen pointer to variable to store the number of read bytes
1041 * @param buf the databuffer to put data
1045 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1046 size_t *retlen, u_char *buf)
1048 struct mtd_oob_ops ops = {
1056 onenand_get_device(mtd, FL_READING);
1057 ret = onenand_read_ops_nolock(mtd, from, &ops);
1058 onenand_release_device(mtd);
1060 *retlen = ops.retlen;
1065 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1066 * @param mtd: MTD device structure
1067 * @param from: offset to read from
1068 * @param ops: oob operation description structure
1070 * Read main and/or out-of-band
1072 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1073 struct mtd_oob_ops *ops)
1077 switch (ops->mode) {
1082 /* Not implemented yet */
1087 onenand_get_device(mtd, FL_READING);
1089 ret = onenand_read_ops_nolock(mtd, from, ops);
1091 ret = onenand_read_oob_nolock(mtd, from, ops);
1092 onenand_release_device(mtd);
1098 * onenand_bbt_wait - [DEFAULT] wait until the command is done
1099 * @param mtd MTD device structure
1100 * @param state state to select the max. timeout value
1102 * Wait for command done.
1104 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1106 struct onenand_chip *this = mtd->priv;
1107 unsigned long timeout;
1108 unsigned int interrupt;
1111 /* The 20 msec is enough */
1112 timeout = jiffies + msecs_to_jiffies(20);
1113 while (time_before(jiffies, timeout)) {
1114 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1115 if (interrupt & ONENAND_INT_MASTER)
1118 /* To get correct interrupt status in timeout case */
1119 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1120 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1122 /* Initial bad block case: 0x2400 or 0x0400 */
1123 if (ctrl & ONENAND_CTRL_ERROR) {
1124 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
1125 return ONENAND_BBT_READ_ERROR;
1128 if (interrupt & ONENAND_INT_READ) {
1129 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
1130 if (ecc & ONENAND_ECC_2BIT_ALL)
1131 return ONENAND_BBT_READ_ERROR;
1133 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1134 "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1135 return ONENAND_BBT_READ_FATAL_ERROR;
1142 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1143 * @param mtd MTD device structure
1144 * @param from offset to read from
1145 * @param ops oob operation description structure
1147 * OneNAND read out-of-band data from the spare area for bbt scan
1149 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1150 struct mtd_oob_ops *ops)
1152 struct onenand_chip *this = mtd->priv;
1153 int read = 0, thislen, column;
1155 size_t len = ops->ooblen;
1156 u_char *buf = ops->oobbuf;
1158 DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1160 /* Initialize return value */
1163 /* Do not allow reads past end of device */
1164 if (unlikely((from + len) > mtd->size)) {
1165 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1166 return ONENAND_BBT_READ_FATAL_ERROR;
1169 /* Grab the lock and see if the device is available */
1170 onenand_get_device(mtd, FL_READING);
1172 column = from & (mtd->oobsize - 1);
1174 while (read < len) {
1177 thislen = mtd->oobsize - column;
1178 thislen = min_t(int, thislen, len);
1180 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1182 onenand_update_bufferram(mtd, from, 0);
1184 ret = onenand_bbt_wait(mtd, FL_READING);
1188 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1197 /* Update Page size */
1198 from += this->writesize;
1203 /* Deselect and wake up anyone waiting on the device */
1204 onenand_release_device(mtd);
1206 ops->oobretlen = read;
1210 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1212 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1213 * @param mtd MTD device structure
1214 * @param buf the databuffer to verify
1215 * @param to offset to read from
1217 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1219 struct onenand_chip *this = mtd->priv;
1223 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1224 onenand_update_bufferram(mtd, to, 0);
1225 status = this->wait(mtd, FL_READING);
1229 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1230 for (i = 0; i < mtd->oobsize; i++)
1231 if (buf[i] != 0xFF && buf[i] != oobbuf[i])
1238 * onenand_verify - [GENERIC] verify the chip contents after a write
1239 * @param mtd MTD device structure
1240 * @param buf the databuffer to verify
1241 * @param addr offset to read from
1242 * @param len number of bytes to read and compare
1244 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1246 struct onenand_chip *this = mtd->priv;
1247 void __iomem *dataram;
1249 int thislen, column;
1252 thislen = min_t(int, this->writesize, len);
1253 column = addr & (this->writesize - 1);
1254 if (column + thislen > this->writesize)
1255 thislen = this->writesize - column;
1257 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1259 onenand_update_bufferram(mtd, addr, 0);
1261 ret = this->wait(mtd, FL_READING);
1265 onenand_update_bufferram(mtd, addr, 1);
1267 dataram = this->base + ONENAND_DATARAM;
1268 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1270 if (memcmp(buf, dataram + column, thislen))
1281 #define onenand_verify(...) (0)
1282 #define onenand_verify_oob(...) (0)
1285 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
1288 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1289 * @param mtd MTD device structure
1290 * @param oob_buf oob buffer
1291 * @param buf source address
1292 * @param column oob offset to write to
1293 * @param thislen oob length to write
1295 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1296 const u_char *buf, int column, int thislen)
1298 struct onenand_chip *this = mtd->priv;
1299 struct nand_oobfree *free;
1300 int writecol = column;
1301 int writeend = column + thislen;
1305 free = this->ecclayout->oobfree;
1306 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1307 if (writecol >= lastgap)
1308 writecol += free->offset - lastgap;
1309 if (writeend >= lastgap)
1310 writeend += free->offset - lastgap;
1311 lastgap = free->offset + free->length;
1313 free = this->ecclayout->oobfree;
1314 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1315 int free_end = free->offset + free->length;
1316 if (free->offset < writeend && free_end > writecol) {
1317 int st = max_t(int,free->offset,writecol);
1318 int ed = min_t(int,free_end,writeend);
1320 memcpy(oob_buf + st, buf, n);
1322 } else if (column == 0)
1329 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1330 * @param mtd MTD device structure
1331 * @param to offset to write to
1332 * @param ops oob operation description structure
1334 * Write main and/or oob with ECC
1336 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1337 struct mtd_oob_ops *ops)
1339 struct onenand_chip *this = mtd->priv;
1340 int written = 0, column, thislen, subpage;
1341 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1342 size_t len = ops->len;
1343 size_t ooblen = ops->ooblen;
1344 const u_char *buf = ops->datbuf;
1345 const u_char *oob = ops->oobbuf;
1349 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1351 /* Initialize retlen, in case of early exit */
1355 /* Do not allow writes past end of device */
1356 if (unlikely((to + len) > mtd->size)) {
1357 printk(KERN_ERR "onenand_write_ops_nolock: Attempt write to past end of device\n");
1361 /* Reject writes, which are not page aligned */
1362 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1363 printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n");
1367 if (ops->mode == MTD_OOB_AUTO)
1368 oobsize = this->ecclayout->oobavail;
1370 oobsize = mtd->oobsize;
1372 oobcolumn = to & (mtd->oobsize - 1);
1374 column = to & (mtd->writesize - 1);
1376 /* Loop until all data write */
1377 while (written < len) {
1378 u_char *wbuf = (u_char *) buf;
1380 thislen = min_t(int, mtd->writesize - column, len - written);
1381 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1385 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1387 /* Partial page write */
1388 subpage = thislen < mtd->writesize;
1390 memset(this->page_buf, 0xff, mtd->writesize);
1391 memcpy(this->page_buf + column, buf, thislen);
1392 wbuf = this->page_buf;
1395 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1398 oobbuf = this->oob_buf;
1400 /* We send data to spare ram with oobsize
1401 * to prevent byte access */
1402 memset(oobbuf, 0xff, mtd->oobsize);
1403 if (ops->mode == MTD_OOB_AUTO)
1404 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1406 memcpy(oobbuf + oobcolumn, oob, thisooblen);
1408 oobwritten += thisooblen;
1412 oobbuf = (u_char *) ffchars;
1414 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1416 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1418 ret = this->wait(mtd, FL_WRITING);
1420 /* In partial page write we don't update bufferram */
1421 onenand_update_bufferram(mtd, to, !ret && !subpage);
1422 if (ONENAND_IS_2PLANE(this)) {
1423 ONENAND_SET_BUFFERRAM1(this);
1424 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1428 printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret);
1432 /* Only check verify write turn on */
1433 ret = onenand_verify(mtd, buf, to, thislen);
1435 printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
1449 ops->retlen = written;
1456 * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
1457 * @param mtd MTD device structure
1458 * @param to offset to write to
1459 * @param len number of bytes to write
1460 * @param retlen pointer to variable to store the number of written bytes
1461 * @param buf the data to write
1462 * @param mode operation mode
1464 * OneNAND write out-of-band
1466 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
1467 struct mtd_oob_ops *ops)
1469 struct onenand_chip *this = mtd->priv;
1470 int column, ret = 0, oobsize;
1473 size_t len = ops->ooblen;
1474 const u_char *buf = ops->oobbuf;
1475 mtd_oob_mode_t mode = ops->mode;
1479 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1481 /* Initialize retlen, in case of early exit */
1484 if (mode == MTD_OOB_AUTO)
1485 oobsize = this->ecclayout->oobavail;
1487 oobsize = mtd->oobsize;
1489 column = to & (mtd->oobsize - 1);
1491 if (unlikely(column >= oobsize)) {
1492 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n");
1496 /* For compatibility with NAND: Do not allow write past end of page */
1497 if (unlikely(column + len > oobsize)) {
1498 printk(KERN_ERR "onenand_write_oob_nolock: "
1499 "Attempt to write past end of page\n");
1503 /* Do not allow reads past end of device */
1504 if (unlikely(to >= mtd->size ||
1505 column + len > ((mtd->size >> this->page_shift) -
1506 (to >> this->page_shift)) * oobsize)) {
1507 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n");
1511 oobbuf = this->oob_buf;
1513 /* Loop until all data write */
1514 while (written < len) {
1515 int thislen = min_t(int, oobsize, len - written);
1519 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1521 /* We send data to spare ram with oobsize
1522 * to prevent byte access */
1523 memset(oobbuf, 0xff, mtd->oobsize);
1524 if (mode == MTD_OOB_AUTO)
1525 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1527 memcpy(oobbuf + column, buf, thislen);
1528 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1530 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1532 onenand_update_bufferram(mtd, to, 0);
1533 if (ONENAND_IS_2PLANE(this)) {
1534 ONENAND_SET_BUFFERRAM1(this);
1535 onenand_update_bufferram(mtd, to + this->writesize, 0);
1538 ret = this->wait(mtd, FL_WRITING);
1540 printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret);
1544 ret = onenand_verify_oob(mtd, oobbuf, to);
1546 printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret);
1554 to += mtd->writesize;
1559 ops->oobretlen = written;
1565 * onenand_write - [MTD Interface] write buffer to FLASH
1566 * @param mtd MTD device structure
1567 * @param to offset to write to
1568 * @param len number of bytes to write
1569 * @param retlen pointer to variable to store the number of written bytes
1570 * @param buf the data to write
1574 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1575 size_t *retlen, const u_char *buf)
1577 struct mtd_oob_ops ops = {
1580 .datbuf = (u_char *) buf,
1585 onenand_get_device(mtd, FL_WRITING);
1586 ret = onenand_write_ops_nolock(mtd, to, &ops);
1587 onenand_release_device(mtd);
1589 *retlen = ops.retlen;
1594 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1595 * @param mtd: MTD device structure
1596 * @param to: offset to write
1597 * @param ops: oob operation description structure
1599 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1600 struct mtd_oob_ops *ops)
1604 switch (ops->mode) {
1609 /* Not implemented yet */
1614 onenand_get_device(mtd, FL_WRITING);
1616 ret = onenand_write_ops_nolock(mtd, to, ops);
1618 ret = onenand_write_oob_nolock(mtd, to, ops);
1619 onenand_release_device(mtd);
1625 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
1626 * @param mtd MTD device structure
1627 * @param ofs offset from device start
1628 * @param allowbbt 1, if its allowed to access the bbt area
1630 * Check, if the block is bad. Either by reading the bad block table or
1631 * calling of the scan function.
1633 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
1635 struct onenand_chip *this = mtd->priv;
1636 struct bbm_info *bbm = this->bbm;
1638 /* Return info from the table */
1639 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1643 * onenand_erase - [MTD Interface] erase block(s)
1644 * @param mtd MTD device structure
1645 * @param instr erase instruction
1647 * Erase one ore more blocks
1649 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1651 struct onenand_chip *this = mtd->priv;
1652 unsigned int block_size;
1657 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1659 block_size = (1 << this->erase_shift);
1661 /* Start address must align on block boundary */
1662 if (unlikely(instr->addr & (block_size - 1))) {
1663 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1667 /* Length must align on block boundary */
1668 if (unlikely(instr->len & (block_size - 1))) {
1669 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1673 /* Do not allow erase past end of device */
1674 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1675 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1679 instr->fail_addr = 0xffffffff;
1681 /* Grab the lock and see if the device is available */
1682 onenand_get_device(mtd, FL_ERASING);
1684 /* Loop throught the pages */
1688 instr->state = MTD_ERASING;
1693 /* Check if we have a bad block, we do not erase bad blocks */
1694 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
1695 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1696 instr->state = MTD_ERASE_FAILED;
1700 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1702 onenand_invalidate_bufferram(mtd, addr, block_size);
1704 ret = this->wait(mtd, FL_ERASING);
1705 /* Check, if it is write protected */
1707 printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1708 instr->state = MTD_ERASE_FAILED;
1709 instr->fail_addr = addr;
1717 instr->state = MTD_ERASE_DONE;
1721 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1723 /* Deselect and wake up anyone waiting on the device */
1724 onenand_release_device(mtd);
1726 /* Do call back function */
1728 mtd_erase_callback(instr);
1734 * onenand_sync - [MTD Interface] sync
1735 * @param mtd MTD device structure
1737 * Sync is actually a wait for chip ready function
1739 static void onenand_sync(struct mtd_info *mtd)
1741 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1743 /* Grab the lock and see if the device is available */
1744 onenand_get_device(mtd, FL_SYNCING);
1746 /* Release it and go back */
1747 onenand_release_device(mtd);
1751 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1752 * @param mtd MTD device structure
1753 * @param ofs offset relative to mtd start
1755 * Check whether the block is bad
1757 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1761 /* Check for invalid offset */
1762 if (ofs > mtd->size)
1765 onenand_get_device(mtd, FL_READING);
1766 ret = onenand_block_isbad_nolock(mtd, ofs, 0);
1767 onenand_release_device(mtd);
1772 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1773 * @param mtd MTD device structure
1774 * @param ofs offset from device start
1776 * This is the default implementation, which can be overridden by
1777 * a hardware specific driver.
1779 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1781 struct onenand_chip *this = mtd->priv;
1782 struct bbm_info *bbm = this->bbm;
1783 u_char buf[2] = {0, 0};
1784 struct mtd_oob_ops ops = {
1785 .mode = MTD_OOB_PLACE,
1792 /* Get block number */
1793 block = ((int) ofs) >> bbm->bbt_erase_shift;
1795 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1797 /* We write two bytes, so we dont have to mess with 16 bit access */
1798 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1799 return onenand_write_oob_nolock(mtd, ofs, &ops);
1803 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1804 * @param mtd MTD device structure
1805 * @param ofs offset relative to mtd start
1807 * Mark the block as bad
1809 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1811 struct onenand_chip *this = mtd->priv;
1814 ret = onenand_block_isbad(mtd, ofs);
1816 /* If it was bad already, return success and do nothing */
1822 onenand_get_device(mtd, FL_WRITING);
1823 ret = this->block_markbad(mtd, ofs);
1824 onenand_release_device(mtd);
1829 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1830 * @param mtd MTD device structure
1831 * @param ofs offset relative to mtd start
1832 * @param len number of bytes to lock or unlock
1833 * @param cmd lock or unlock command
1835 * Lock or unlock one or more blocks
1837 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1839 struct onenand_chip *this = mtd->priv;
1840 int start, end, block, value, status;
1843 start = ofs >> this->erase_shift;
1844 end = len >> this->erase_shift;
1846 if (cmd == ONENAND_CMD_LOCK)
1847 wp_status_mask = ONENAND_WP_LS;
1849 wp_status_mask = ONENAND_WP_US;
1851 /* Continuous lock scheme */
1852 if (this->options & ONENAND_HAS_CONT_LOCK) {
1853 /* Set start block address */
1854 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1855 /* Set end block address */
1856 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1857 /* Write lock command */
1858 this->command(mtd, cmd, 0, 0);
1860 /* There's no return value */
1861 this->wait(mtd, FL_LOCKING);
1864 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1865 & ONENAND_CTRL_ONGO)
1868 /* Check lock status */
1869 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1870 if (!(status & wp_status_mask))
1871 printk(KERN_ERR "wp status = 0x%x\n", status);
1876 /* Block lock scheme */
1877 for (block = start; block < start + end; block++) {
1878 /* Set block address */
1879 value = onenand_block_address(this, block);
1880 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1881 /* Select DataRAM for DDP */
1882 value = onenand_bufferram_address(this, block);
1883 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1884 /* Set start block address */
1885 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1886 /* Write lock command */
1887 this->command(mtd, cmd, 0, 0);
1889 /* There's no return value */
1890 this->wait(mtd, FL_LOCKING);
1893 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1894 & ONENAND_CTRL_ONGO)
1897 /* Check lock status */
1898 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1899 if (!(status & wp_status_mask))
1900 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1907 * onenand_lock - [MTD Interface] Lock block(s)
1908 * @param mtd MTD device structure
1909 * @param ofs offset relative to mtd start
1910 * @param len number of bytes to unlock
1912 * Lock one or more blocks
1914 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1918 onenand_get_device(mtd, FL_LOCKING);
1919 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1920 onenand_release_device(mtd);
1925 * onenand_unlock - [MTD Interface] Unlock block(s)
1926 * @param mtd MTD device structure
1927 * @param ofs offset relative to mtd start
1928 * @param len number of bytes to unlock
1930 * Unlock one or more blocks
1932 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1936 onenand_get_device(mtd, FL_LOCKING);
1937 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1938 onenand_release_device(mtd);
1943 * onenand_check_lock_status - [OneNAND Interface] Check lock status
1944 * @param this onenand chip data structure
1948 static void onenand_check_lock_status(struct onenand_chip *this)
1950 unsigned int value, block, status;
1953 end = this->chipsize >> this->erase_shift;
1954 for (block = 0; block < end; block++) {
1955 /* Set block address */
1956 value = onenand_block_address(this, block);
1957 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1958 /* Select DataRAM for DDP */
1959 value = onenand_bufferram_address(this, block);
1960 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1961 /* Set start block address */
1962 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1964 /* Check lock status */
1965 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1966 if (!(status & ONENAND_WP_US))
1967 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1972 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1973 * @param mtd MTD device structure
1977 static int onenand_unlock_all(struct mtd_info *mtd)
1979 struct onenand_chip *this = mtd->priv;
1981 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1982 /* Set start block address */
1983 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1984 /* Write unlock command */
1985 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1987 /* There's no return value */
1988 this->wait(mtd, FL_LOCKING);
1991 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1992 & ONENAND_CTRL_ONGO)
1995 /* Workaround for all block unlock in DDP */
1996 if (ONENAND_IS_DDP(this)) {
1997 /* 1st block on another chip */
1998 loff_t ofs = this->chipsize >> 1;
1999 size_t len = mtd->erasesize;
2001 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2004 onenand_check_lock_status(this);
2009 onenand_do_lock_cmd(mtd, 0x0, this->chipsize, ONENAND_CMD_UNLOCK);
2014 #ifdef CONFIG_MTD_ONENAND_OTP
2016 /* Interal OTP operation */
2017 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
2018 size_t *retlen, u_char *buf);
2021 * do_otp_read - [DEFAULT] Read OTP block area
2022 * @param mtd MTD device structure
2023 * @param from The offset to read
2024 * @param len number of bytes to read
2025 * @param retlen pointer to variable to store the number of readbytes
2026 * @param buf the databuffer to put/get data
2028 * Read OTP block area.
2030 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
2031 size_t *retlen, u_char *buf)
2033 struct onenand_chip *this = mtd->priv;
2034 struct mtd_oob_ops ops = {
2042 /* Enter OTP access mode */
2043 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2044 this->wait(mtd, FL_OTPING);
2046 ret = onenand_read_ops_nolock(mtd, from, &ops);
2048 /* Exit OTP access mode */
2049 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2050 this->wait(mtd, FL_RESETING);
2056 * do_otp_write - [DEFAULT] Write OTP block area
2057 * @param mtd MTD device structure
2058 * @param to The offset to write
2059 * @param len number of bytes to write
2060 * @param retlen pointer to variable to store the number of write bytes
2061 * @param buf the databuffer to put/get data
2063 * Write OTP block area.
2065 static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
2066 size_t *retlen, u_char *buf)
2068 struct onenand_chip *this = mtd->priv;
2069 unsigned char *pbuf = buf;
2071 struct mtd_oob_ops ops;
2073 /* Force buffer page aligned */
2074 if (len < mtd->writesize) {
2075 memcpy(this->page_buf, buf, len);
2076 memset(this->page_buf + len, 0xff, mtd->writesize - len);
2077 pbuf = this->page_buf;
2078 len = mtd->writesize;
2081 /* Enter OTP access mode */
2082 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2083 this->wait(mtd, FL_OTPING);
2089 ret = onenand_write_ops_nolock(mtd, to, &ops);
2090 *retlen = ops.retlen;
2092 /* Exit OTP access mode */
2093 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2094 this->wait(mtd, FL_RESETING);
2100 * do_otp_lock - [DEFAULT] Lock OTP block area
2101 * @param mtd MTD device structure
2102 * @param from The offset to lock
2103 * @param len number of bytes to lock
2104 * @param retlen pointer to variable to store the number of lock bytes
2105 * @param buf the databuffer to put/get data
2107 * Lock OTP block area.
2109 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
2110 size_t *retlen, u_char *buf)
2112 struct onenand_chip *this = mtd->priv;
2113 struct mtd_oob_ops ops = {
2114 .mode = MTD_OOB_PLACE,
2121 /* Enter OTP access mode */
2122 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2123 this->wait(mtd, FL_OTPING);
2125 ret = onenand_write_oob_nolock(mtd, from, &ops);
2127 *retlen = ops.oobretlen;
2129 /* Exit OTP access mode */
2130 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2131 this->wait(mtd, FL_RESETING);
2137 * onenand_otp_walk - [DEFAULT] Handle OTP operation
2138 * @param mtd MTD device structure
2139 * @param from The offset to read/write
2140 * @param len number of bytes to read/write
2141 * @param retlen pointer to variable to store the number of read bytes
2142 * @param buf the databuffer to put/get data
2143 * @param action do given action
2144 * @param mode specify user and factory
2146 * Handle OTP operation.
2148 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2149 size_t *retlen, u_char *buf,
2150 otp_op_t action, int mode)
2152 struct onenand_chip *this = mtd->priv;
2159 density = onenand_get_density(this->device_id);
2160 if (density < ONENAND_DEVICE_DENSITY_512Mb)
2165 if (mode == MTD_OTP_FACTORY) {
2166 from += mtd->writesize * otp_pages;
2167 otp_pages = 64 - otp_pages;
2170 /* Check User/Factory boundary */
2171 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
2174 onenand_get_device(mtd, FL_OTPING);
2175 while (len > 0 && otp_pages > 0) {
2176 if (!action) { /* OTP Info functions */
2177 struct otp_info *otpinfo;
2179 len -= sizeof(struct otp_info);
2185 otpinfo = (struct otp_info *) buf;
2186 otpinfo->start = from;
2187 otpinfo->length = mtd->writesize;
2188 otpinfo->locked = 0;
2190 from += mtd->writesize;
2191 buf += sizeof(struct otp_info);
2192 *retlen += sizeof(struct otp_info);
2197 ret = action(mtd, from, len, &tmp_retlen, buf);
2208 onenand_release_device(mtd);
2214 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
2215 * @param mtd MTD device structure
2216 * @param buf the databuffer to put/get data
2217 * @param len number of bytes to read
2219 * Read factory OTP info.
2221 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
2222 struct otp_info *buf, size_t len)
2227 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
2229 return ret ? : retlen;
2233 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
2234 * @param mtd MTD device structure
2235 * @param from The offset to read
2236 * @param len number of bytes to read
2237 * @param retlen pointer to variable to store the number of read bytes
2238 * @param buf the databuffer to put/get data
2240 * Read factory OTP area.
2242 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2243 size_t len, size_t *retlen, u_char *buf)
2245 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
2249 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2250 * @param mtd MTD device structure
2251 * @param buf the databuffer to put/get data
2252 * @param len number of bytes to read
2254 * Read user OTP info.
2256 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2257 struct otp_info *buf, size_t len)
2262 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2264 return ret ? : retlen;
2268 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2269 * @param mtd MTD device structure
2270 * @param from The offset to read
2271 * @param len number of bytes to read
2272 * @param retlen pointer to variable to store the number of read bytes
2273 * @param buf the databuffer to put/get data
2275 * Read user OTP area.
2277 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2278 size_t len, size_t *retlen, u_char *buf)
2280 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2284 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2285 * @param mtd MTD device structure
2286 * @param from The offset to write
2287 * @param len number of bytes to write
2288 * @param retlen pointer to variable to store the number of write bytes
2289 * @param buf the databuffer to put/get data
2291 * Write user OTP area.
2293 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2294 size_t len, size_t *retlen, u_char *buf)
2296 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2300 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2301 * @param mtd MTD device structure
2302 * @param from The offset to lock
2303 * @param len number of bytes to unlock
2305 * Write lock mark on spare area in page 0 in OTP block
2307 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2310 unsigned char oob_buf[64];
2314 memset(oob_buf, 0xff, mtd->oobsize);
2316 * Note: OTP lock operation
2317 * OTP block : 0xXXFC
2318 * 1st block : 0xXXF3 (If chip support)
2319 * Both : 0xXXF0 (If chip support)
2321 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2324 * Write lock mark to 8th word of sector0 of page0 of the spare0.
2325 * We write 16 bytes spare area instead of 2 bytes.
2330 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2332 return ret ? : retlen;
2334 #endif /* CONFIG_MTD_ONENAND_OTP */
2337 * onenand_check_features - Check and set OneNAND features
2338 * @param mtd MTD data structure
2340 * Check and set OneNAND features
2344 static void onenand_check_features(struct mtd_info *mtd)
2346 struct onenand_chip *this = mtd->priv;
2347 unsigned int density, process;
2349 /* Lock scheme depends on density and process */
2350 density = onenand_get_density(this->device_id);
2351 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2355 case ONENAND_DEVICE_DENSITY_4Gb:
2356 this->options |= ONENAND_HAS_2PLANE;
2358 case ONENAND_DEVICE_DENSITY_2Gb:
2359 /* 2Gb DDP don't have 2 plane */
2360 if (!ONENAND_IS_DDP(this))
2361 this->options |= ONENAND_HAS_2PLANE;
2362 this->options |= ONENAND_HAS_UNLOCK_ALL;
2364 case ONENAND_DEVICE_DENSITY_1Gb:
2365 /* A-Die has all block unlock */
2367 this->options |= ONENAND_HAS_UNLOCK_ALL;
2371 /* Some OneNAND has continuous lock scheme */
2373 this->options |= ONENAND_HAS_CONT_LOCK;
2377 if (this->options & ONENAND_HAS_CONT_LOCK)
2378 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
2379 if (this->options & ONENAND_HAS_UNLOCK_ALL)
2380 printk(KERN_DEBUG "Chip support all block unlock\n");
2381 if (this->options & ONENAND_HAS_2PLANE)
2382 printk(KERN_DEBUG "Chip has 2 plane\n");
2386 * onenand_print_device_info - Print device & version ID
2387 * @param device device ID
2388 * @param version version ID
2390 * Print device & version ID
2392 static void onenand_print_device_info(int device, int version)
2394 int vcc, demuxed, ddp, density;
2396 vcc = device & ONENAND_DEVICE_VCC_MASK;
2397 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2398 ddp = device & ONENAND_DEVICE_IS_DDP;
2399 density = onenand_get_density(device);
2400 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2401 demuxed ? "" : "Muxed ",
2404 vcc ? "2.65/3.3" : "1.8",
2406 printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
2409 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2410 {ONENAND_MFR_SAMSUNG, "Samsung"},
2414 * onenand_check_maf - Check manufacturer ID
2415 * @param manuf manufacturer ID
2417 * Check manufacturer ID
2419 static int onenand_check_maf(int manuf)
2421 int size = ARRAY_SIZE(onenand_manuf_ids);
2425 for (i = 0; i < size; i++)
2426 if (manuf == onenand_manuf_ids[i].id)
2430 name = onenand_manuf_ids[i].name;
2434 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2440 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2441 * @param mtd MTD device structure
2443 * OneNAND detection method:
2444 * Compare the values from command with ones from register
2446 static int onenand_probe(struct mtd_info *mtd)
2448 struct onenand_chip *this = mtd->priv;
2449 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2453 /* Save system configuration 1 */
2454 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2455 /* Clear Sync. Burst Read mode to read BootRAM */
2456 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2458 /* Send the command for reading device ID from BootRAM */
2459 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2461 /* Read manufacturer and device IDs from BootRAM */
2462 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2463 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2465 /* Reset OneNAND to read default register values */
2466 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2468 this->wait(mtd, FL_RESETING);
2470 /* Restore system configuration 1 */
2471 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2473 /* Check manufacturer ID */
2474 if (onenand_check_maf(bram_maf_id))
2477 /* Read manufacturer and device IDs from Register */
2478 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2479 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2480 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2482 /* Check OneNAND device */
2483 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2486 /* Flash device information */
2487 onenand_print_device_info(dev_id, ver_id);
2488 this->device_id = dev_id;
2489 this->version_id = ver_id;
2491 density = onenand_get_density(dev_id);
2492 this->chipsize = (16 << density) << 20;
2493 /* Set density mask. it is used for DDP */
2494 if (ONENAND_IS_DDP(this))
2495 this->density_mask = (1 << (density + 6));
2497 this->density_mask = 0;
2499 /* OneNAND page size & block size */
2500 /* The data buffer size is equal to page size */
2501 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2502 mtd->oobsize = mtd->writesize >> 5;
2503 /* Pages per a block are always 64 in OneNAND */
2504 mtd->erasesize = mtd->writesize << 6;
2506 this->erase_shift = ffs(mtd->erasesize) - 1;
2507 this->page_shift = ffs(mtd->writesize) - 1;
2508 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2509 /* It's real page size */
2510 this->writesize = mtd->writesize;
2512 /* REVIST: Multichip handling */
2514 mtd->size = this->chipsize;
2516 /* Check OneNAND features */
2517 onenand_check_features(mtd);
2520 * We emulate the 4KiB page and 256KiB erase block size
2521 * But oobsize is still 64 bytes.
2522 * It is only valid if you turn on 2X program support,
2523 * Otherwise it will be ignored by compiler.
2525 if (ONENAND_IS_2PLANE(this)) {
2526 mtd->writesize <<= 1;
2527 mtd->erasesize <<= 1;
2534 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2535 * @param mtd MTD device structure
2537 static int onenand_suspend(struct mtd_info *mtd)
2539 return onenand_get_device(mtd, FL_PM_SUSPENDED);
2543 * onenand_resume - [MTD Interface] Resume the OneNAND flash
2544 * @param mtd MTD device structure
2546 static void onenand_resume(struct mtd_info *mtd)
2548 struct onenand_chip *this = mtd->priv;
2550 if (this->state == FL_PM_SUSPENDED)
2551 onenand_release_device(mtd);
2553 printk(KERN_ERR "resume() called for the chip which is not"
2554 "in suspended state\n");
2558 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2559 * @param mtd MTD device structure
2560 * @param maxchips Number of chips to scan for
2562 * This fills out all the not initialized function pointers
2563 * with the defaults.
2564 * The flash ID is read and the mtd/chip structures are
2565 * filled with the appropriate values.
2567 int onenand_scan(struct mtd_info *mtd, int maxchips)
2570 struct onenand_chip *this = mtd->priv;
2572 if (!this->read_word)
2573 this->read_word = onenand_readw;
2574 if (!this->write_word)
2575 this->write_word = onenand_writew;
2578 this->command = onenand_command;
2580 onenand_setup_wait(mtd);
2582 if (!this->read_bufferram)
2583 this->read_bufferram = onenand_read_bufferram;
2584 if (!this->write_bufferram)
2585 this->write_bufferram = onenand_write_bufferram;
2587 if (!this->block_markbad)
2588 this->block_markbad = onenand_default_block_markbad;
2589 if (!this->scan_bbt)
2590 this->scan_bbt = onenand_default_bbt;
2592 if (onenand_probe(mtd))
2595 /* Set Sync. Burst Read after probing */
2596 if (this->mmcontrol) {
2597 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2598 this->read_bufferram = onenand_sync_read_bufferram;
2601 /* Allocate buffers, if necessary */
2602 if (!this->page_buf) {
2603 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2604 if (!this->page_buf) {
2605 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2608 this->options |= ONENAND_PAGEBUF_ALLOC;
2610 if (!this->oob_buf) {
2611 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2612 if (!this->oob_buf) {
2613 printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n");
2614 if (this->options & ONENAND_PAGEBUF_ALLOC) {
2615 this->options &= ~ONENAND_PAGEBUF_ALLOC;
2616 kfree(this->page_buf);
2620 this->options |= ONENAND_OOBBUF_ALLOC;
2623 this->state = FL_READY;
2624 init_waitqueue_head(&this->wq);
2625 spin_lock_init(&this->chip_lock);
2628 * Allow subpage writes up to oobsize.
2630 switch (mtd->oobsize) {
2632 this->ecclayout = &onenand_oob_64;
2633 mtd->subpage_sft = 2;
2637 this->ecclayout = &onenand_oob_32;
2638 mtd->subpage_sft = 1;
2642 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2644 mtd->subpage_sft = 0;
2645 /* To prevent kernel oops */
2646 this->ecclayout = &onenand_oob_32;
2650 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2653 * The number of bytes available for a client to place data into
2654 * the out of band area
2656 this->ecclayout->oobavail = 0;
2657 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
2658 this->ecclayout->oobfree[i].length; i++)
2659 this->ecclayout->oobavail +=
2660 this->ecclayout->oobfree[i].length;
2661 mtd->oobavail = this->ecclayout->oobavail;
2663 mtd->ecclayout = this->ecclayout;
2665 /* Fill in remaining MTD driver data */
2666 mtd->type = MTD_NANDFLASH;
2667 mtd->flags = MTD_CAP_NANDFLASH;
2668 mtd->erase = onenand_erase;
2670 mtd->unpoint = NULL;
2671 mtd->read = onenand_read;
2672 mtd->write = onenand_write;
2673 mtd->read_oob = onenand_read_oob;
2674 mtd->write_oob = onenand_write_oob;
2675 #ifdef CONFIG_MTD_ONENAND_OTP
2676 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2677 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2678 mtd->get_user_prot_info = onenand_get_user_prot_info;
2679 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2680 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2681 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2683 mtd->sync = onenand_sync;
2684 mtd->lock = onenand_lock;
2685 mtd->unlock = onenand_unlock;
2686 mtd->suspend = onenand_suspend;
2687 mtd->resume = onenand_resume;
2688 mtd->block_isbad = onenand_block_isbad;
2689 mtd->block_markbad = onenand_block_markbad;
2690 mtd->owner = THIS_MODULE;
2692 /* Unlock whole block */
2693 onenand_unlock_all(mtd);
2695 return this->scan_bbt(mtd);
2699 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2700 * @param mtd MTD device structure
2702 void onenand_release(struct mtd_info *mtd)
2704 struct onenand_chip *this = mtd->priv;
2706 #ifdef CONFIG_MTD_PARTITIONS
2707 /* Deregister partitions */
2708 del_mtd_partitions (mtd);
2710 /* Deregister the device */
2711 del_mtd_device (mtd);
2713 /* Free bad block table memory, if allocated */
2715 struct bbm_info *bbm = this->bbm;
2719 /* Buffers allocated by onenand_scan */
2720 if (this->options & ONENAND_PAGEBUF_ALLOC)
2721 kfree(this->page_buf);
2722 if (this->options & ONENAND_OOBBUF_ALLOC)
2723 kfree(this->oob_buf);
2726 EXPORT_SYMBOL_GPL(onenand_scan);
2727 EXPORT_SYMBOL_GPL(onenand_release);
2729 MODULE_LICENSE("GPL");
2730 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2731 MODULE_DESCRIPTION("Generic OneNAND flash driver code");