2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2007 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
8 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
9 * auto-placement support, read-while load support, various fixes
10 * Copyright (C) Nokia Corporation, 2007
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/sched.h>
21 #include <linux/delay.h>
22 #include <linux/interrupt.h>
23 #include <linux/jiffies.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/onenand.h>
26 #include <linux/mtd/partitions.h>
31 * onenand_oob_64 - oob info for large (2KB) page
33 static struct nand_ecclayout onenand_oob_64 = {
42 {2, 3}, {14, 2}, {18, 3}, {30, 2},
43 {34, 3}, {46, 2}, {50, 3}, {62, 2}
48 * onenand_oob_32 - oob info for middle (1KB) page
50 static struct nand_ecclayout onenand_oob_32 = {
56 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
59 static const unsigned char ffchars[] = {
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
61 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
62 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
63 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
64 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
65 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
66 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
67 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
71 * onenand_readw - [OneNAND Interface] Read OneNAND register
72 * @param addr address to read
74 * Read OneNAND register
76 static unsigned short onenand_readw(void __iomem *addr)
82 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
83 * @param value value to write
84 * @param addr address to write
86 * Write OneNAND register with value
88 static void onenand_writew(unsigned short value, void __iomem *addr)
94 * onenand_block_address - [DEFAULT] Get block address
95 * @param this onenand chip data structure
96 * @param block the block
97 * @return translated block address if DDP, otherwise same
99 * Setup Start Address 1 Register (F100h)
101 static int onenand_block_address(struct onenand_chip *this, int block)
103 /* Device Flash Core select, NAND Flash Block Address */
104 if (block & this->density_mask)
105 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
111 * onenand_bufferram_address - [DEFAULT] Get bufferram address
112 * @param this onenand chip data structure
113 * @param block the block
114 * @return set DBS value if DDP, otherwise 0
116 * Setup Start Address 2 Register (F101h) for DDP
118 static int onenand_bufferram_address(struct onenand_chip *this, int block)
120 /* Device BufferRAM Select */
121 if (block & this->density_mask)
122 return ONENAND_DDP_CHIP1;
124 return ONENAND_DDP_CHIP0;
128 * onenand_page_address - [DEFAULT] Get page address
129 * @param page the page address
130 * @param sector the sector address
131 * @return combined page and sector address
133 * Setup Start Address 8 Register (F107h)
135 static int onenand_page_address(int page, int sector)
137 /* Flash Page Address, Flash Sector Address */
140 fpa = page & ONENAND_FPA_MASK;
141 fsa = sector & ONENAND_FSA_MASK;
143 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
147 * onenand_buffer_address - [DEFAULT] Get buffer address
148 * @param dataram1 DataRAM index
149 * @param sectors the sector address
150 * @param count the number of sectors
151 * @return the start buffer value
153 * Setup Start Buffer Register (F200h)
155 static int onenand_buffer_address(int dataram1, int sectors, int count)
159 /* BufferRAM Sector Address */
160 bsa = sectors & ONENAND_BSA_MASK;
163 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
165 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
167 /* BufferRAM Sector Count */
168 bsc = count & ONENAND_BSC_MASK;
170 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
174 * onenand_get_density - [DEFAULT] Get OneNAND density
175 * @param dev_id OneNAND device ID
177 * Get OneNAND density from device ID
179 static inline int onenand_get_density(int dev_id)
181 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
182 return (density & ONENAND_DEVICE_DENSITY_MASK);
186 * onenand_command - [DEFAULT] Send command to OneNAND device
187 * @param mtd MTD device structure
188 * @param cmd the command to be sent
189 * @param addr offset to read from or write to
190 * @param len number of bytes to read or write
192 * Send command to OneNAND device. This function is used for middle/large page
193 * devices (1KB/2KB Bytes per page)
195 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
197 struct onenand_chip *this = mtd->priv;
198 int value, block, page;
200 /* Address translation */
202 case ONENAND_CMD_UNLOCK:
203 case ONENAND_CMD_LOCK:
204 case ONENAND_CMD_LOCK_TIGHT:
205 case ONENAND_CMD_UNLOCK_ALL:
210 case ONENAND_CMD_ERASE:
211 case ONENAND_CMD_BUFFERRAM:
212 case ONENAND_CMD_OTP_ACCESS:
213 block = (int) (addr >> this->erase_shift);
218 block = (int) (addr >> this->erase_shift);
219 page = (int) (addr >> this->page_shift);
221 if (ONENAND_IS_2PLANE(this)) {
222 /* Make the even block number */
224 /* Is it the odd plane? */
225 if (addr & this->writesize)
229 page &= this->page_mask;
233 /* NOTE: The setting order of the registers is very important! */
234 if (cmd == ONENAND_CMD_BUFFERRAM) {
235 /* Select DataRAM for DDP */
236 value = onenand_bufferram_address(this, block);
237 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
239 if (ONENAND_IS_2PLANE(this))
240 /* It is always BufferRAM0 */
241 ONENAND_SET_BUFFERRAM0(this);
243 /* Switch to the next data buffer */
244 ONENAND_SET_NEXT_BUFFERRAM(this);
250 /* Write 'DFS, FBA' of Flash */
251 value = onenand_block_address(this, block);
252 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
254 /* Select DataRAM for DDP */
255 value = onenand_bufferram_address(this, block);
256 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
260 /* Now we use page size operation */
261 int sectors = 4, count = 4;
265 case ONENAND_CMD_READ:
266 case ONENAND_CMD_READOOB:
267 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
271 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
272 cmd = ONENAND_CMD_2X_PROG;
273 dataram = ONENAND_CURRENT_BUFFERRAM(this);
277 /* Write 'FPA, FSA' of Flash */
278 value = onenand_page_address(page, sectors);
279 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
281 /* Write 'BSA, BSC' of DataRAM */
282 value = onenand_buffer_address(dataram, sectors, count);
283 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
286 /* Interrupt clear */
287 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
290 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
296 * onenand_wait - [DEFAULT] wait until the command is done
297 * @param mtd MTD device structure
298 * @param state state to select the max. timeout value
300 * Wait for command done. This applies to all OneNAND command
301 * Read can take up to 30us, erase up to 2ms and program up to 350us
302 * according to general OneNAND specs
304 static int onenand_wait(struct mtd_info *mtd, int state)
306 struct onenand_chip * this = mtd->priv;
307 unsigned long timeout;
308 unsigned int flags = ONENAND_INT_MASTER;
309 unsigned int interrupt = 0;
312 /* The 20 msec is enough */
313 timeout = jiffies + msecs_to_jiffies(20);
314 while (time_before(jiffies, timeout)) {
315 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
317 if (interrupt & flags)
320 if (state != FL_READING)
323 /* To get correct interrupt status in timeout case */
324 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
326 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
328 if (ctrl & ONENAND_CTRL_ERROR) {
329 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
330 if (ctrl & ONENAND_CTRL_LOCK)
331 printk(KERN_ERR "onenand_wait: it's locked error.\n");
332 if (state == FL_READING) {
334 * A power loss while writing can result in a page
335 * becoming unreadable. When the device is mounted
336 * again, reading that page gives controller errors.
337 * Upper level software like JFFS2 treat -EIO as fatal,
338 * refusing to mount at all. That means it is necessary
339 * to treat the error as an ECC error to allow recovery.
340 * Note that typically in this case, the eraseblock can
341 * still be erased and rewritten i.e. it has not become
344 mtd->ecc_stats.failed++;
350 if (interrupt & ONENAND_INT_READ) {
351 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
353 if (ecc & ONENAND_ECC_2BIT_ALL) {
354 printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
355 mtd->ecc_stats.failed++;
357 } else if (ecc & ONENAND_ECC_1BIT_ALL) {
358 printk(KERN_INFO "onenand_wait: correctable ECC error = 0x%04x\n", ecc);
359 mtd->ecc_stats.corrected++;
362 } else if (state == FL_READING) {
363 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
371 * onenand_interrupt - [DEFAULT] onenand interrupt handler
372 * @param irq onenand interrupt number
373 * @param dev_id interrupt data
377 static irqreturn_t onenand_interrupt(int irq, void *data)
379 struct onenand_chip *this = data;
381 /* To handle shared interrupt */
382 if (!this->complete.done)
383 complete(&this->complete);
389 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
390 * @param mtd MTD device structure
391 * @param state state to select the max. timeout value
393 * Wait for command done.
395 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
397 struct onenand_chip *this = mtd->priv;
399 wait_for_completion(&this->complete);
401 return onenand_wait(mtd, state);
405 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
406 * @param mtd MTD device structure
407 * @param state state to select the max. timeout value
409 * Try interrupt based wait (It is used one-time)
411 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
413 struct onenand_chip *this = mtd->priv;
414 unsigned long remain, timeout;
416 /* We use interrupt wait first */
417 this->wait = onenand_interrupt_wait;
419 timeout = msecs_to_jiffies(100);
420 remain = wait_for_completion_timeout(&this->complete, timeout);
422 printk(KERN_INFO "OneNAND: There's no interrupt. "
423 "We use the normal wait\n");
425 /* Release the irq */
426 free_irq(this->irq, this);
428 this->wait = onenand_wait;
431 return onenand_wait(mtd, state);
435 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
436 * @param mtd MTD device structure
438 * There's two method to wait onenand work
439 * 1. polling - read interrupt status register
440 * 2. interrupt - use the kernel interrupt method
442 static void onenand_setup_wait(struct mtd_info *mtd)
444 struct onenand_chip *this = mtd->priv;
447 init_completion(&this->complete);
449 if (this->irq <= 0) {
450 this->wait = onenand_wait;
454 if (request_irq(this->irq, &onenand_interrupt,
455 IRQF_SHARED, "onenand", this)) {
456 /* If we can't get irq, use the normal wait */
457 this->wait = onenand_wait;
461 /* Enable interrupt */
462 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
463 syscfg |= ONENAND_SYS_CFG1_IOBE;
464 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
466 this->wait = onenand_try_interrupt_wait;
470 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
471 * @param mtd MTD data structure
472 * @param area BufferRAM area
473 * @return offset given area
475 * Return BufferRAM offset given area
477 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
479 struct onenand_chip *this = mtd->priv;
481 if (ONENAND_CURRENT_BUFFERRAM(this)) {
482 /* Note: the 'this->writesize' is a real page size */
483 if (area == ONENAND_DATARAM)
484 return this->writesize;
485 if (area == ONENAND_SPARERAM)
493 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
494 * @param mtd MTD data structure
495 * @param area BufferRAM area
496 * @param buffer the databuffer to put/get data
497 * @param offset offset to read from or write to
498 * @param count number of bytes to read/write
500 * Read the BufferRAM area
502 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
503 unsigned char *buffer, int offset, size_t count)
505 struct onenand_chip *this = mtd->priv;
506 void __iomem *bufferram;
508 bufferram = this->base + area;
510 bufferram += onenand_bufferram_offset(mtd, area);
512 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
515 /* Align with word(16-bit) size */
518 /* Read word and save byte */
519 word = this->read_word(bufferram + offset + count);
520 buffer[count] = (word & 0xff);
523 memcpy(buffer, bufferram + offset, count);
529 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
530 * @param mtd MTD data structure
531 * @param area BufferRAM area
532 * @param buffer the databuffer to put/get data
533 * @param offset offset to read from or write to
534 * @param count number of bytes to read/write
536 * Read the BufferRAM area with Sync. Burst Mode
538 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
539 unsigned char *buffer, int offset, size_t count)
541 struct onenand_chip *this = mtd->priv;
542 void __iomem *bufferram;
544 bufferram = this->base + area;
546 bufferram += onenand_bufferram_offset(mtd, area);
548 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
550 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
553 /* Align with word(16-bit) size */
556 /* Read word and save byte */
557 word = this->read_word(bufferram + offset + count);
558 buffer[count] = (word & 0xff);
561 memcpy(buffer, bufferram + offset, count);
563 this->mmcontrol(mtd, 0);
569 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
570 * @param mtd MTD data structure
571 * @param area BufferRAM area
572 * @param buffer the databuffer to put/get data
573 * @param offset offset to read from or write to
574 * @param count number of bytes to read/write
576 * Write the BufferRAM area
578 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
579 const unsigned char *buffer, int offset, size_t count)
581 struct onenand_chip *this = mtd->priv;
582 void __iomem *bufferram;
584 bufferram = this->base + area;
586 bufferram += onenand_bufferram_offset(mtd, area);
588 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
592 /* Align with word(16-bit) size */
595 /* Calculate byte access offset */
596 byte_offset = offset + count;
598 /* Read word and save byte */
599 word = this->read_word(bufferram + byte_offset);
600 word = (word & ~0xff) | buffer[count];
601 this->write_word(word, bufferram + byte_offset);
604 memcpy(bufferram + offset, buffer, count);
610 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
611 * @param mtd MTD data structure
612 * @param addr address to check
613 * @return blockpage address
615 * Get blockpage address at 2x program mode
617 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
619 struct onenand_chip *this = mtd->priv;
620 int blockpage, block, page;
622 /* Calculate the even block number */
623 block = (int) (addr >> this->erase_shift) & ~1;
624 /* Is it the odd plane? */
625 if (addr & this->writesize)
627 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
628 blockpage = (block << 7) | page;
634 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
635 * @param mtd MTD data structure
636 * @param addr address to check
637 * @return 1 if there are valid data, otherwise 0
639 * Check bufferram if there is data we required
641 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
643 struct onenand_chip *this = mtd->priv;
644 int blockpage, found = 0;
647 if (ONENAND_IS_2PLANE(this))
648 blockpage = onenand_get_2x_blockpage(mtd, addr);
650 blockpage = (int) (addr >> this->page_shift);
652 /* Is there valid data? */
653 i = ONENAND_CURRENT_BUFFERRAM(this);
654 if (this->bufferram[i].blockpage == blockpage)
657 /* Check another BufferRAM */
658 i = ONENAND_NEXT_BUFFERRAM(this);
659 if (this->bufferram[i].blockpage == blockpage) {
660 ONENAND_SET_NEXT_BUFFERRAM(this);
665 if (found && ONENAND_IS_DDP(this)) {
666 /* Select DataRAM for DDP */
667 int block = (int) (addr >> this->erase_shift);
668 int value = onenand_bufferram_address(this, block);
669 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
676 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
677 * @param mtd MTD data structure
678 * @param addr address to update
679 * @param valid valid flag
681 * Update BufferRAM information
683 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
686 struct onenand_chip *this = mtd->priv;
690 if (ONENAND_IS_2PLANE(this))
691 blockpage = onenand_get_2x_blockpage(mtd, addr);
693 blockpage = (int) (addr >> this->page_shift);
695 /* Invalidate another BufferRAM */
696 i = ONENAND_NEXT_BUFFERRAM(this);
697 if (this->bufferram[i].blockpage == blockpage)
698 this->bufferram[i].blockpage = -1;
700 /* Update BufferRAM */
701 i = ONENAND_CURRENT_BUFFERRAM(this);
703 this->bufferram[i].blockpage = blockpage;
705 this->bufferram[i].blockpage = -1;
709 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
710 * @param mtd MTD data structure
711 * @param addr start address to invalidate
712 * @param len length to invalidate
714 * Invalidate BufferRAM information
716 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
719 struct onenand_chip *this = mtd->priv;
721 loff_t end_addr = addr + len;
723 /* Invalidate BufferRAM */
724 for (i = 0; i < MAX_BUFFERRAM; i++) {
725 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
726 if (buf_addr >= addr && buf_addr < end_addr)
727 this->bufferram[i].blockpage = -1;
732 * onenand_get_device - [GENERIC] Get chip for selected access
733 * @param mtd MTD device structure
734 * @param new_state the state which is requested
736 * Get the device and lock it for exclusive access
738 static int onenand_get_device(struct mtd_info *mtd, int new_state)
740 struct onenand_chip *this = mtd->priv;
741 DECLARE_WAITQUEUE(wait, current);
744 * Grab the lock and see if the device is available
747 spin_lock(&this->chip_lock);
748 if (this->state == FL_READY) {
749 this->state = new_state;
750 spin_unlock(&this->chip_lock);
753 if (new_state == FL_PM_SUSPENDED) {
754 spin_unlock(&this->chip_lock);
755 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
757 set_current_state(TASK_UNINTERRUPTIBLE);
758 add_wait_queue(&this->wq, &wait);
759 spin_unlock(&this->chip_lock);
761 remove_wait_queue(&this->wq, &wait);
768 * onenand_release_device - [GENERIC] release chip
769 * @param mtd MTD device structure
771 * Deselect, release chip lock and wake up anyone waiting on the device
773 static void onenand_release_device(struct mtd_info *mtd)
775 struct onenand_chip *this = mtd->priv;
777 /* Release the chip */
778 spin_lock(&this->chip_lock);
779 this->state = FL_READY;
781 spin_unlock(&this->chip_lock);
785 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
786 * @param mtd MTD device structure
787 * @param buf destination address
788 * @param column oob offset to read from
789 * @param thislen oob length to read
791 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
794 struct onenand_chip *this = mtd->priv;
795 struct nand_oobfree *free;
796 int readcol = column;
797 int readend = column + thislen;
800 uint8_t *oob_buf = this->oob_buf;
802 free = this->ecclayout->oobfree;
803 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
804 if (readcol >= lastgap)
805 readcol += free->offset - lastgap;
806 if (readend >= lastgap)
807 readend += free->offset - lastgap;
808 lastgap = free->offset + free->length;
810 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
811 free = this->ecclayout->oobfree;
812 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
813 int free_end = free->offset + free->length;
814 if (free->offset < readend && free_end > readcol) {
815 int st = max_t(int,free->offset,readcol);
816 int ed = min_t(int,free_end,readend);
818 memcpy(buf, oob_buf + st, n);
820 } else if (column == 0)
827 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
828 * @param mtd MTD device structure
829 * @param from offset to read from
830 * @param ops: oob operation description structure
832 * OneNAND read main and/or out-of-band data
834 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
835 struct mtd_oob_ops *ops)
837 struct onenand_chip *this = mtd->priv;
838 struct mtd_ecc_stats stats;
839 size_t len = ops->len;
840 size_t ooblen = ops->ooblen;
841 u_char *buf = ops->datbuf;
842 u_char *oobbuf = ops->oobbuf;
843 int read = 0, column, thislen;
844 int oobread = 0, oobcolumn, thisooblen, oobsize;
845 int ret = 0, boundary = 0;
846 int writesize = this->writesize;
848 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
850 if (ops->mode == MTD_OOB_AUTO)
851 oobsize = this->ecclayout->oobavail;
853 oobsize = mtd->oobsize;
855 oobcolumn = from & (mtd->oobsize - 1);
857 /* Do not allow reads past end of device */
858 if ((from + len) > mtd->size) {
859 printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n");
865 stats = mtd->ecc_stats;
867 /* Read-while-load method */
869 /* Do first load to bufferRAM */
871 if (!onenand_check_bufferram(mtd, from)) {
872 this->command(mtd, ONENAND_CMD_READ, from, writesize);
873 ret = this->wait(mtd, FL_READING);
874 onenand_update_bufferram(mtd, from, !ret);
880 thislen = min_t(int, writesize, len - read);
881 column = from & (writesize - 1);
882 if (column + thislen > writesize)
883 thislen = writesize - column;
886 /* If there is more to load then start next load */
888 if (read + thislen < len) {
889 this->command(mtd, ONENAND_CMD_READ, from, writesize);
891 * Chip boundary handling in DDP
892 * Now we issued chip 1 read and pointed chip 1
893 * bufferam so we have to point chip 0 bufferam.
895 if (ONENAND_IS_DDP(this) &&
896 unlikely(from == (this->chipsize >> 1))) {
897 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
901 ONENAND_SET_PREV_BUFFERRAM(this);
903 /* While load is going, read from last bufferRAM */
904 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
906 /* Read oob area if needed */
908 thisooblen = oobsize - oobcolumn;
909 thisooblen = min_t(int, thisooblen, ooblen - oobread);
911 if (ops->mode == MTD_OOB_AUTO)
912 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
914 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
915 oobread += thisooblen;
916 oobbuf += thisooblen;
920 /* See if we are done */
924 /* Set up for next read from bufferRAM */
925 if (unlikely(boundary))
926 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
927 ONENAND_SET_NEXT_BUFFERRAM(this);
929 thislen = min_t(int, writesize, len - read);
932 /* Now wait for load */
933 ret = this->wait(mtd, FL_READING);
934 onenand_update_bufferram(mtd, from, !ret);
940 * Return success, if no ECC failures, else -EBADMSG
941 * fs driver will take care of that, because
942 * retlen == desired len and result == -EBADMSG
945 ops->oobretlen = oobread;
950 if (mtd->ecc_stats.failed - stats.failed)
953 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
957 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
958 * @param mtd MTD device structure
959 * @param from offset to read from
960 * @param ops: oob operation description structure
962 * OneNAND read out-of-band data from the spare area
964 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
965 struct mtd_oob_ops *ops)
967 struct onenand_chip *this = mtd->priv;
968 struct mtd_ecc_stats stats;
969 int read = 0, thislen, column, oobsize;
970 size_t len = ops->ooblen;
971 mtd_oob_mode_t mode = ops->mode;
972 u_char *buf = ops->oobbuf;
975 from += ops->ooboffs;
977 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
979 /* Initialize return length value */
982 if (mode == MTD_OOB_AUTO)
983 oobsize = this->ecclayout->oobavail;
985 oobsize = mtd->oobsize;
987 column = from & (mtd->oobsize - 1);
989 if (unlikely(column >= oobsize)) {
990 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n");
994 /* Do not allow reads past end of device */
995 if (unlikely(from >= mtd->size ||
996 column + len > ((mtd->size >> this->page_shift) -
997 (from >> this->page_shift)) * oobsize)) {
998 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n");
1002 stats = mtd->ecc_stats;
1004 while (read < len) {
1007 thislen = oobsize - column;
1008 thislen = min_t(int, thislen, len);
1010 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1012 onenand_update_bufferram(mtd, from, 0);
1014 ret = this->wait(mtd, FL_READING);
1015 if (ret && ret != -EBADMSG) {
1016 printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret);
1020 if (mode == MTD_OOB_AUTO)
1021 onenand_transfer_auto_oob(mtd, buf, column, thislen);
1023 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1035 from += mtd->writesize;
1040 ops->oobretlen = read;
1045 if (mtd->ecc_stats.failed - stats.failed)
1052 * onenand_read - [MTD Interface] Read data from flash
1053 * @param mtd MTD device structure
1054 * @param from offset to read from
1055 * @param len number of bytes to read
1056 * @param retlen pointer to variable to store the number of read bytes
1057 * @param buf the databuffer to put data
1061 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1062 size_t *retlen, u_char *buf)
1064 struct mtd_oob_ops ops = {
1072 onenand_get_device(mtd, FL_READING);
1073 ret = onenand_read_ops_nolock(mtd, from, &ops);
1074 onenand_release_device(mtd);
1076 *retlen = ops.retlen;
1081 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1082 * @param mtd: MTD device structure
1083 * @param from: offset to read from
1084 * @param ops: oob operation description structure
1086 * Read main and/or out-of-band
1088 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1089 struct mtd_oob_ops *ops)
1093 switch (ops->mode) {
1098 /* Not implemented yet */
1103 onenand_get_device(mtd, FL_READING);
1105 ret = onenand_read_ops_nolock(mtd, from, ops);
1107 ret = onenand_read_oob_nolock(mtd, from, ops);
1108 onenand_release_device(mtd);
1114 * onenand_bbt_wait - [DEFAULT] wait until the command is done
1115 * @param mtd MTD device structure
1116 * @param state state to select the max. timeout value
1118 * Wait for command done.
1120 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1122 struct onenand_chip *this = mtd->priv;
1123 unsigned long timeout;
1124 unsigned int interrupt;
1127 /* The 20 msec is enough */
1128 timeout = jiffies + msecs_to_jiffies(20);
1129 while (time_before(jiffies, timeout)) {
1130 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1131 if (interrupt & ONENAND_INT_MASTER)
1134 /* To get correct interrupt status in timeout case */
1135 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1136 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1138 /* Initial bad block case: 0x2400 or 0x0400 */
1139 if (ctrl & ONENAND_CTRL_ERROR) {
1140 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
1141 return ONENAND_BBT_READ_ERROR;
1144 if (interrupt & ONENAND_INT_READ) {
1145 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
1146 if (ecc & ONENAND_ECC_2BIT_ALL)
1147 return ONENAND_BBT_READ_ERROR;
1149 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1150 "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1151 return ONENAND_BBT_READ_FATAL_ERROR;
1158 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1159 * @param mtd MTD device structure
1160 * @param from offset to read from
1161 * @param ops oob operation description structure
1163 * OneNAND read out-of-band data from the spare area for bbt scan
1165 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1166 struct mtd_oob_ops *ops)
1168 struct onenand_chip *this = mtd->priv;
1169 int read = 0, thislen, column;
1171 size_t len = ops->ooblen;
1172 u_char *buf = ops->oobbuf;
1174 DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1176 /* Initialize return value */
1179 /* Do not allow reads past end of device */
1180 if (unlikely((from + len) > mtd->size)) {
1181 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1182 return ONENAND_BBT_READ_FATAL_ERROR;
1185 /* Grab the lock and see if the device is available */
1186 onenand_get_device(mtd, FL_READING);
1188 column = from & (mtd->oobsize - 1);
1190 while (read < len) {
1193 thislen = mtd->oobsize - column;
1194 thislen = min_t(int, thislen, len);
1196 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1198 onenand_update_bufferram(mtd, from, 0);
1200 ret = onenand_bbt_wait(mtd, FL_READING);
1204 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1213 /* Update Page size */
1214 from += this->writesize;
1219 /* Deselect and wake up anyone waiting on the device */
1220 onenand_release_device(mtd);
1222 ops->oobretlen = read;
1226 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1228 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1229 * @param mtd MTD device structure
1230 * @param buf the databuffer to verify
1231 * @param to offset to read from
1233 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1235 struct onenand_chip *this = mtd->priv;
1236 u_char *oob_buf = this->oob_buf;
1239 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1240 onenand_update_bufferram(mtd, to, 0);
1241 status = this->wait(mtd, FL_READING);
1245 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1246 for (i = 0; i < mtd->oobsize; i++)
1247 if (buf[i] != 0xFF && buf[i] != oob_buf[i])
1254 * onenand_verify - [GENERIC] verify the chip contents after a write
1255 * @param mtd MTD device structure
1256 * @param buf the databuffer to verify
1257 * @param addr offset to read from
1258 * @param len number of bytes to read and compare
1260 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1262 struct onenand_chip *this = mtd->priv;
1263 void __iomem *dataram;
1265 int thislen, column;
1268 thislen = min_t(int, this->writesize, len);
1269 column = addr & (this->writesize - 1);
1270 if (column + thislen > this->writesize)
1271 thislen = this->writesize - column;
1273 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1275 onenand_update_bufferram(mtd, addr, 0);
1277 ret = this->wait(mtd, FL_READING);
1281 onenand_update_bufferram(mtd, addr, 1);
1283 dataram = this->base + ONENAND_DATARAM;
1284 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1286 if (memcmp(buf, dataram + column, thislen))
1297 #define onenand_verify(...) (0)
1298 #define onenand_verify_oob(...) (0)
1301 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
1303 static void onenand_panic_wait(struct mtd_info *mtd)
1305 struct onenand_chip *this = mtd->priv;
1306 unsigned int interrupt;
1309 for (i = 0; i < 2000; i++) {
1310 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1311 if (interrupt & ONENAND_INT_MASTER)
1318 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
1319 * @param mtd MTD device structure
1320 * @param to offset to write to
1321 * @param len number of bytes to write
1322 * @param retlen pointer to variable to store the number of written bytes
1323 * @param buf the data to write
1327 static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
1328 size_t *retlen, const u_char *buf)
1330 struct onenand_chip *this = mtd->priv;
1331 int column, subpage;
1335 if (this->state == FL_PM_SUSPENDED)
1338 /* Wait for any existing operation to clear */
1339 onenand_panic_wait(mtd);
1341 DEBUG(MTD_DEBUG_LEVEL3, "onenand_panic_write: to = 0x%08x, len = %i\n",
1342 (unsigned int) to, (int) len);
1344 /* Initialize retlen, in case of early exit */
1347 /* Do not allow writes past end of device */
1348 if (unlikely((to + len) > mtd->size)) {
1349 printk(KERN_ERR "onenand_panic_write: Attempt write to past end of device\n");
1353 /* Reject writes, which are not page aligned */
1354 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1355 printk(KERN_ERR "onenand_panic_write: Attempt to write not page aligned data\n");
1359 column = to & (mtd->writesize - 1);
1361 /* Loop until all data write */
1362 while (written < len) {
1363 int thislen = min_t(int, mtd->writesize - column, len - written);
1364 u_char *wbuf = (u_char *) buf;
1366 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1368 /* Partial page write */
1369 subpage = thislen < mtd->writesize;
1371 memset(this->page_buf, 0xff, mtd->writesize);
1372 memcpy(this->page_buf + column, buf, thislen);
1373 wbuf = this->page_buf;
1376 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1377 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1379 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1381 onenand_panic_wait(mtd);
1383 /* In partial page write we don't update bufferram */
1384 onenand_update_bufferram(mtd, to, !ret && !subpage);
1385 if (ONENAND_IS_2PLANE(this)) {
1386 ONENAND_SET_BUFFERRAM1(this);
1387 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1391 printk(KERN_ERR "onenand_panic_write: write failed %d\n", ret);
1410 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1411 * @param mtd MTD device structure
1412 * @param oob_buf oob buffer
1413 * @param buf source address
1414 * @param column oob offset to write to
1415 * @param thislen oob length to write
1417 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1418 const u_char *buf, int column, int thislen)
1420 struct onenand_chip *this = mtd->priv;
1421 struct nand_oobfree *free;
1422 int writecol = column;
1423 int writeend = column + thislen;
1427 free = this->ecclayout->oobfree;
1428 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1429 if (writecol >= lastgap)
1430 writecol += free->offset - lastgap;
1431 if (writeend >= lastgap)
1432 writeend += free->offset - lastgap;
1433 lastgap = free->offset + free->length;
1435 free = this->ecclayout->oobfree;
1436 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1437 int free_end = free->offset + free->length;
1438 if (free->offset < writeend && free_end > writecol) {
1439 int st = max_t(int,free->offset,writecol);
1440 int ed = min_t(int,free_end,writeend);
1442 memcpy(oob_buf + st, buf, n);
1444 } else if (column == 0)
1451 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1452 * @param mtd MTD device structure
1453 * @param to offset to write to
1454 * @param ops oob operation description structure
1456 * Write main and/or oob with ECC
1458 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1459 struct mtd_oob_ops *ops)
1461 struct onenand_chip *this = mtd->priv;
1462 int written = 0, column, thislen, subpage;
1463 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1464 size_t len = ops->len;
1465 size_t ooblen = ops->ooblen;
1466 const u_char *buf = ops->datbuf;
1467 const u_char *oob = ops->oobbuf;
1471 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1473 /* Initialize retlen, in case of early exit */
1477 /* Do not allow writes past end of device */
1478 if (unlikely((to + len) > mtd->size)) {
1479 printk(KERN_ERR "onenand_write_ops_nolock: Attempt write to past end of device\n");
1483 /* Reject writes, which are not page aligned */
1484 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1485 printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n");
1489 if (ops->mode == MTD_OOB_AUTO)
1490 oobsize = this->ecclayout->oobavail;
1492 oobsize = mtd->oobsize;
1494 oobcolumn = to & (mtd->oobsize - 1);
1496 column = to & (mtd->writesize - 1);
1498 /* Loop until all data write */
1499 while (written < len) {
1500 u_char *wbuf = (u_char *) buf;
1502 thislen = min_t(int, mtd->writesize - column, len - written);
1503 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1507 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1509 /* Partial page write */
1510 subpage = thislen < mtd->writesize;
1512 memset(this->page_buf, 0xff, mtd->writesize);
1513 memcpy(this->page_buf + column, buf, thislen);
1514 wbuf = this->page_buf;
1517 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1520 oobbuf = this->oob_buf;
1522 /* We send data to spare ram with oobsize
1523 * to prevent byte access */
1524 memset(oobbuf, 0xff, mtd->oobsize);
1525 if (ops->mode == MTD_OOB_AUTO)
1526 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1528 memcpy(oobbuf + oobcolumn, oob, thisooblen);
1530 oobwritten += thisooblen;
1534 oobbuf = (u_char *) ffchars;
1536 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1538 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1540 ret = this->wait(mtd, FL_WRITING);
1542 /* In partial page write we don't update bufferram */
1543 onenand_update_bufferram(mtd, to, !ret && !subpage);
1544 if (ONENAND_IS_2PLANE(this)) {
1545 ONENAND_SET_BUFFERRAM1(this);
1546 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1550 printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret);
1554 /* Only check verify write turn on */
1555 ret = onenand_verify(mtd, buf, to, thislen);
1557 printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
1571 ops->retlen = written;
1578 * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
1579 * @param mtd MTD device structure
1580 * @param to offset to write to
1581 * @param len number of bytes to write
1582 * @param retlen pointer to variable to store the number of written bytes
1583 * @param buf the data to write
1584 * @param mode operation mode
1586 * OneNAND write out-of-band
1588 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
1589 struct mtd_oob_ops *ops)
1591 struct onenand_chip *this = mtd->priv;
1592 int column, ret = 0, oobsize;
1595 size_t len = ops->ooblen;
1596 const u_char *buf = ops->oobbuf;
1597 mtd_oob_mode_t mode = ops->mode;
1601 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1603 /* Initialize retlen, in case of early exit */
1606 if (mode == MTD_OOB_AUTO)
1607 oobsize = this->ecclayout->oobavail;
1609 oobsize = mtd->oobsize;
1611 column = to & (mtd->oobsize - 1);
1613 if (unlikely(column >= oobsize)) {
1614 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n");
1618 /* For compatibility with NAND: Do not allow write past end of page */
1619 if (unlikely(column + len > oobsize)) {
1620 printk(KERN_ERR "onenand_write_oob_nolock: "
1621 "Attempt to write past end of page\n");
1625 /* Do not allow reads past end of device */
1626 if (unlikely(to >= mtd->size ||
1627 column + len > ((mtd->size >> this->page_shift) -
1628 (to >> this->page_shift)) * oobsize)) {
1629 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n");
1633 oobbuf = this->oob_buf;
1635 /* Loop until all data write */
1636 while (written < len) {
1637 int thislen = min_t(int, oobsize, len - written);
1641 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1643 /* We send data to spare ram with oobsize
1644 * to prevent byte access */
1645 memset(oobbuf, 0xff, mtd->oobsize);
1646 if (mode == MTD_OOB_AUTO)
1647 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1649 memcpy(oobbuf + column, buf, thislen);
1650 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1652 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1654 onenand_update_bufferram(mtd, to, 0);
1655 if (ONENAND_IS_2PLANE(this)) {
1656 ONENAND_SET_BUFFERRAM1(this);
1657 onenand_update_bufferram(mtd, to + this->writesize, 0);
1660 ret = this->wait(mtd, FL_WRITING);
1662 printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret);
1666 ret = onenand_verify_oob(mtd, oobbuf, to);
1668 printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret);
1676 to += mtd->writesize;
1681 ops->oobretlen = written;
1687 * onenand_write - [MTD Interface] write buffer to FLASH
1688 * @param mtd MTD device structure
1689 * @param to offset to write to
1690 * @param len number of bytes to write
1691 * @param retlen pointer to variable to store the number of written bytes
1692 * @param buf the data to write
1696 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1697 size_t *retlen, const u_char *buf)
1699 struct mtd_oob_ops ops = {
1702 .datbuf = (u_char *) buf,
1707 onenand_get_device(mtd, FL_WRITING);
1708 ret = onenand_write_ops_nolock(mtd, to, &ops);
1709 onenand_release_device(mtd);
1711 *retlen = ops.retlen;
1716 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1717 * @param mtd: MTD device structure
1718 * @param to: offset to write
1719 * @param ops: oob operation description structure
1721 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1722 struct mtd_oob_ops *ops)
1726 switch (ops->mode) {
1731 /* Not implemented yet */
1736 onenand_get_device(mtd, FL_WRITING);
1738 ret = onenand_write_ops_nolock(mtd, to, ops);
1740 ret = onenand_write_oob_nolock(mtd, to, ops);
1741 onenand_release_device(mtd);
1747 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
1748 * @param mtd MTD device structure
1749 * @param ofs offset from device start
1750 * @param allowbbt 1, if its allowed to access the bbt area
1752 * Check, if the block is bad. Either by reading the bad block table or
1753 * calling of the scan function.
1755 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
1757 struct onenand_chip *this = mtd->priv;
1758 struct bbm_info *bbm = this->bbm;
1760 /* Return info from the table */
1761 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1765 * onenand_erase - [MTD Interface] erase block(s)
1766 * @param mtd MTD device structure
1767 * @param instr erase instruction
1769 * Erase one ore more blocks
1771 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1773 struct onenand_chip *this = mtd->priv;
1774 unsigned int block_size;
1779 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1781 block_size = (1 << this->erase_shift);
1783 /* Start address must align on block boundary */
1784 if (unlikely(instr->addr & (block_size - 1))) {
1785 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1789 /* Length must align on block boundary */
1790 if (unlikely(instr->len & (block_size - 1))) {
1791 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1795 /* Do not allow erase past end of device */
1796 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1797 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1801 instr->fail_addr = 0xffffffff;
1803 /* Grab the lock and see if the device is available */
1804 onenand_get_device(mtd, FL_ERASING);
1806 /* Loop throught the pages */
1810 instr->state = MTD_ERASING;
1815 /* Check if we have a bad block, we do not erase bad blocks */
1816 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
1817 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1818 instr->state = MTD_ERASE_FAILED;
1822 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1824 onenand_invalidate_bufferram(mtd, addr, block_size);
1826 ret = this->wait(mtd, FL_ERASING);
1827 /* Check, if it is write protected */
1829 printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1830 instr->state = MTD_ERASE_FAILED;
1831 instr->fail_addr = addr;
1839 instr->state = MTD_ERASE_DONE;
1843 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1845 /* Deselect and wake up anyone waiting on the device */
1846 onenand_release_device(mtd);
1848 /* Do call back function */
1850 mtd_erase_callback(instr);
1856 * onenand_sync - [MTD Interface] sync
1857 * @param mtd MTD device structure
1859 * Sync is actually a wait for chip ready function
1861 static void onenand_sync(struct mtd_info *mtd)
1863 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1865 /* Grab the lock and see if the device is available */
1866 onenand_get_device(mtd, FL_SYNCING);
1868 /* Release it and go back */
1869 onenand_release_device(mtd);
1873 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1874 * @param mtd MTD device structure
1875 * @param ofs offset relative to mtd start
1877 * Check whether the block is bad
1879 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1883 /* Check for invalid offset */
1884 if (ofs > mtd->size)
1887 onenand_get_device(mtd, FL_READING);
1888 ret = onenand_block_isbad_nolock(mtd, ofs, 0);
1889 onenand_release_device(mtd);
1894 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1895 * @param mtd MTD device structure
1896 * @param ofs offset from device start
1898 * This is the default implementation, which can be overridden by
1899 * a hardware specific driver.
1901 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1903 struct onenand_chip *this = mtd->priv;
1904 struct bbm_info *bbm = this->bbm;
1905 u_char buf[2] = {0, 0};
1906 struct mtd_oob_ops ops = {
1907 .mode = MTD_OOB_PLACE,
1914 /* Get block number */
1915 block = ((int) ofs) >> bbm->bbt_erase_shift;
1917 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1919 /* We write two bytes, so we dont have to mess with 16 bit access */
1920 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1921 return onenand_write_oob_nolock(mtd, ofs, &ops);
1925 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1926 * @param mtd MTD device structure
1927 * @param ofs offset relative to mtd start
1929 * Mark the block as bad
1931 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1933 struct onenand_chip *this = mtd->priv;
1936 ret = onenand_block_isbad(mtd, ofs);
1938 /* If it was bad already, return success and do nothing */
1944 onenand_get_device(mtd, FL_WRITING);
1945 ret = this->block_markbad(mtd, ofs);
1946 onenand_release_device(mtd);
1951 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1952 * @param mtd MTD device structure
1953 * @param ofs offset relative to mtd start
1954 * @param len number of bytes to lock or unlock
1955 * @param cmd lock or unlock command
1957 * Lock or unlock one or more blocks
1959 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1961 struct onenand_chip *this = mtd->priv;
1962 int start, end, block, value, status;
1965 start = ofs >> this->erase_shift;
1966 end = len >> this->erase_shift;
1968 if (cmd == ONENAND_CMD_LOCK)
1969 wp_status_mask = ONENAND_WP_LS;
1971 wp_status_mask = ONENAND_WP_US;
1973 /* Continuous lock scheme */
1974 if (this->options & ONENAND_HAS_CONT_LOCK) {
1975 /* Set start block address */
1976 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1977 /* Set end block address */
1978 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1979 /* Write lock command */
1980 this->command(mtd, cmd, 0, 0);
1982 /* There's no return value */
1983 this->wait(mtd, FL_LOCKING);
1986 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1987 & ONENAND_CTRL_ONGO)
1990 /* Check lock status */
1991 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1992 if (!(status & wp_status_mask))
1993 printk(KERN_ERR "wp status = 0x%x\n", status);
1998 /* Block lock scheme */
1999 for (block = start; block < start + end; block++) {
2000 /* Set block address */
2001 value = onenand_block_address(this, block);
2002 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2003 /* Select DataRAM for DDP */
2004 value = onenand_bufferram_address(this, block);
2005 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2006 /* Set start block address */
2007 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2008 /* Write lock command */
2009 this->command(mtd, cmd, 0, 0);
2011 /* There's no return value */
2012 this->wait(mtd, FL_LOCKING);
2015 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2016 & ONENAND_CTRL_ONGO)
2019 /* Check lock status */
2020 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2021 if (!(status & wp_status_mask))
2022 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
2029 * onenand_lock - [MTD Interface] Lock block(s)
2030 * @param mtd MTD device structure
2031 * @param ofs offset relative to mtd start
2032 * @param len number of bytes to unlock
2034 * Lock one or more blocks
2036 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
2040 onenand_get_device(mtd, FL_LOCKING);
2041 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
2042 onenand_release_device(mtd);
2047 * onenand_unlock - [MTD Interface] Unlock block(s)
2048 * @param mtd MTD device structure
2049 * @param ofs offset relative to mtd start
2050 * @param len number of bytes to unlock
2052 * Unlock one or more blocks
2054 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
2058 onenand_get_device(mtd, FL_LOCKING);
2059 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2060 onenand_release_device(mtd);
2065 * onenand_check_lock_status - [OneNAND Interface] Check lock status
2066 * @param this onenand chip data structure
2070 static int onenand_check_lock_status(struct onenand_chip *this)
2072 unsigned int value, block, status;
2075 end = this->chipsize >> this->erase_shift;
2076 for (block = 0; block < end; block++) {
2077 /* Set block address */
2078 value = onenand_block_address(this, block);
2079 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2080 /* Select DataRAM for DDP */
2081 value = onenand_bufferram_address(this, block);
2082 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2083 /* Set start block address */
2084 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2086 /* Check lock status */
2087 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2088 if (!(status & ONENAND_WP_US)) {
2089 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
2098 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
2099 * @param mtd MTD device structure
2103 static void onenand_unlock_all(struct mtd_info *mtd)
2105 struct onenand_chip *this = mtd->priv;
2107 size_t len = this->chipsize;
2109 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
2110 /* Set start block address */
2111 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2112 /* Write unlock command */
2113 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
2115 /* There's no return value */
2116 this->wait(mtd, FL_LOCKING);
2119 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2120 & ONENAND_CTRL_ONGO)
2123 /* Check lock status */
2124 if (onenand_check_lock_status(this))
2127 /* Workaround for all block unlock in DDP */
2128 if (ONENAND_IS_DDP(this)) {
2129 /* All blocks on another chip */
2130 ofs = this->chipsize >> 1;
2131 len = this->chipsize >> 1;
2135 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2138 #ifdef CONFIG_MTD_ONENAND_OTP
2140 /* Interal OTP operation */
2141 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
2142 size_t *retlen, u_char *buf);
2145 * do_otp_read - [DEFAULT] Read OTP block area
2146 * @param mtd MTD device structure
2147 * @param from The offset to read
2148 * @param len number of bytes to read
2149 * @param retlen pointer to variable to store the number of readbytes
2150 * @param buf the databuffer to put/get data
2152 * Read OTP block area.
2154 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
2155 size_t *retlen, u_char *buf)
2157 struct onenand_chip *this = mtd->priv;
2158 struct mtd_oob_ops ops = {
2166 /* Enter OTP access mode */
2167 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2168 this->wait(mtd, FL_OTPING);
2170 ret = onenand_read_ops_nolock(mtd, from, &ops);
2172 /* Exit OTP access mode */
2173 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2174 this->wait(mtd, FL_RESETING);
2180 * do_otp_write - [DEFAULT] Write OTP block area
2181 * @param mtd MTD device structure
2182 * @param to The offset to write
2183 * @param len number of bytes to write
2184 * @param retlen pointer to variable to store the number of write bytes
2185 * @param buf the databuffer to put/get data
2187 * Write OTP block area.
2189 static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
2190 size_t *retlen, u_char *buf)
2192 struct onenand_chip *this = mtd->priv;
2193 unsigned char *pbuf = buf;
2195 struct mtd_oob_ops ops;
2197 /* Force buffer page aligned */
2198 if (len < mtd->writesize) {
2199 memcpy(this->page_buf, buf, len);
2200 memset(this->page_buf + len, 0xff, mtd->writesize - len);
2201 pbuf = this->page_buf;
2202 len = mtd->writesize;
2205 /* Enter OTP access mode */
2206 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2207 this->wait(mtd, FL_OTPING);
2213 ret = onenand_write_ops_nolock(mtd, to, &ops);
2214 *retlen = ops.retlen;
2216 /* Exit OTP access mode */
2217 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2218 this->wait(mtd, FL_RESETING);
2224 * do_otp_lock - [DEFAULT] Lock OTP block area
2225 * @param mtd MTD device structure
2226 * @param from The offset to lock
2227 * @param len number of bytes to lock
2228 * @param retlen pointer to variable to store the number of lock bytes
2229 * @param buf the databuffer to put/get data
2231 * Lock OTP block area.
2233 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
2234 size_t *retlen, u_char *buf)
2236 struct onenand_chip *this = mtd->priv;
2237 struct mtd_oob_ops ops = {
2238 .mode = MTD_OOB_PLACE,
2245 /* Enter OTP access mode */
2246 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2247 this->wait(mtd, FL_OTPING);
2249 ret = onenand_write_oob_nolock(mtd, from, &ops);
2251 *retlen = ops.oobretlen;
2253 /* Exit OTP access mode */
2254 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2255 this->wait(mtd, FL_RESETING);
2261 * onenand_otp_walk - [DEFAULT] Handle OTP operation
2262 * @param mtd MTD device structure
2263 * @param from The offset to read/write
2264 * @param len number of bytes to read/write
2265 * @param retlen pointer to variable to store the number of read bytes
2266 * @param buf the databuffer to put/get data
2267 * @param action do given action
2268 * @param mode specify user and factory
2270 * Handle OTP operation.
2272 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2273 size_t *retlen, u_char *buf,
2274 otp_op_t action, int mode)
2276 struct onenand_chip *this = mtd->priv;
2283 density = onenand_get_density(this->device_id);
2284 if (density < ONENAND_DEVICE_DENSITY_512Mb)
2289 if (mode == MTD_OTP_FACTORY) {
2290 from += mtd->writesize * otp_pages;
2291 otp_pages = 64 - otp_pages;
2294 /* Check User/Factory boundary */
2295 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
2298 onenand_get_device(mtd, FL_OTPING);
2299 while (len > 0 && otp_pages > 0) {
2300 if (!action) { /* OTP Info functions */
2301 struct otp_info *otpinfo;
2303 len -= sizeof(struct otp_info);
2309 otpinfo = (struct otp_info *) buf;
2310 otpinfo->start = from;
2311 otpinfo->length = mtd->writesize;
2312 otpinfo->locked = 0;
2314 from += mtd->writesize;
2315 buf += sizeof(struct otp_info);
2316 *retlen += sizeof(struct otp_info);
2321 ret = action(mtd, from, len, &tmp_retlen, buf);
2332 onenand_release_device(mtd);
2338 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
2339 * @param mtd MTD device structure
2340 * @param buf the databuffer to put/get data
2341 * @param len number of bytes to read
2343 * Read factory OTP info.
2345 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
2346 struct otp_info *buf, size_t len)
2351 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
2353 return ret ? : retlen;
2357 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
2358 * @param mtd MTD device structure
2359 * @param from The offset to read
2360 * @param len number of bytes to read
2361 * @param retlen pointer to variable to store the number of read bytes
2362 * @param buf the databuffer to put/get data
2364 * Read factory OTP area.
2366 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2367 size_t len, size_t *retlen, u_char *buf)
2369 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
2373 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2374 * @param mtd MTD device structure
2375 * @param buf the databuffer to put/get data
2376 * @param len number of bytes to read
2378 * Read user OTP info.
2380 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2381 struct otp_info *buf, size_t len)
2386 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2388 return ret ? : retlen;
2392 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2393 * @param mtd MTD device structure
2394 * @param from The offset to read
2395 * @param len number of bytes to read
2396 * @param retlen pointer to variable to store the number of read bytes
2397 * @param buf the databuffer to put/get data
2399 * Read user OTP area.
2401 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2402 size_t len, size_t *retlen, u_char *buf)
2404 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2408 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2409 * @param mtd MTD device structure
2410 * @param from The offset to write
2411 * @param len number of bytes to write
2412 * @param retlen pointer to variable to store the number of write bytes
2413 * @param buf the databuffer to put/get data
2415 * Write user OTP area.
2417 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2418 size_t len, size_t *retlen, u_char *buf)
2420 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2424 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2425 * @param mtd MTD device structure
2426 * @param from The offset to lock
2427 * @param len number of bytes to unlock
2429 * Write lock mark on spare area in page 0 in OTP block
2431 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2434 struct onenand_chip *this = mtd->priv;
2435 u_char *oob_buf = this->oob_buf;
2439 memset(oob_buf, 0xff, mtd->oobsize);
2441 * Note: OTP lock operation
2442 * OTP block : 0xXXFC
2443 * 1st block : 0xXXF3 (If chip support)
2444 * Both : 0xXXF0 (If chip support)
2446 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2449 * Write lock mark to 8th word of sector0 of page0 of the spare0.
2450 * We write 16 bytes spare area instead of 2 bytes.
2455 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2457 return ret ? : retlen;
2459 #endif /* CONFIG_MTD_ONENAND_OTP */
2462 * onenand_check_features - Check and set OneNAND features
2463 * @param mtd MTD data structure
2465 * Check and set OneNAND features
2469 static void onenand_check_features(struct mtd_info *mtd)
2471 struct onenand_chip *this = mtd->priv;
2472 unsigned int density, process;
2474 /* Lock scheme depends on density and process */
2475 density = onenand_get_density(this->device_id);
2476 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2480 case ONENAND_DEVICE_DENSITY_4Gb:
2481 this->options |= ONENAND_HAS_2PLANE;
2483 case ONENAND_DEVICE_DENSITY_2Gb:
2484 /* 2Gb DDP don't have 2 plane */
2485 if (!ONENAND_IS_DDP(this))
2486 this->options |= ONENAND_HAS_2PLANE;
2487 this->options |= ONENAND_HAS_UNLOCK_ALL;
2489 case ONENAND_DEVICE_DENSITY_1Gb:
2490 /* A-Die has all block unlock */
2492 this->options |= ONENAND_HAS_UNLOCK_ALL;
2496 /* Some OneNAND has continuous lock scheme */
2498 this->options |= ONENAND_HAS_CONT_LOCK;
2502 if (this->options & ONENAND_HAS_CONT_LOCK)
2503 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
2504 if (this->options & ONENAND_HAS_UNLOCK_ALL)
2505 printk(KERN_DEBUG "Chip support all block unlock\n");
2506 if (this->options & ONENAND_HAS_2PLANE)
2507 printk(KERN_DEBUG "Chip has 2 plane\n");
2511 * onenand_print_device_info - Print device & version ID
2512 * @param device device ID
2513 * @param version version ID
2515 * Print device & version ID
2517 static void onenand_print_device_info(int device, int version)
2519 int vcc, demuxed, ddp, density;
2521 vcc = device & ONENAND_DEVICE_VCC_MASK;
2522 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2523 ddp = device & ONENAND_DEVICE_IS_DDP;
2524 density = onenand_get_density(device);
2525 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2526 demuxed ? "" : "Muxed ",
2529 vcc ? "2.65/3.3" : "1.8",
2531 printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
2534 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2535 {ONENAND_MFR_SAMSUNG, "Samsung"},
2539 * onenand_check_maf - Check manufacturer ID
2540 * @param manuf manufacturer ID
2542 * Check manufacturer ID
2544 static int onenand_check_maf(int manuf)
2546 int size = ARRAY_SIZE(onenand_manuf_ids);
2550 for (i = 0; i < size; i++)
2551 if (manuf == onenand_manuf_ids[i].id)
2555 name = onenand_manuf_ids[i].name;
2559 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2565 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2566 * @param mtd MTD device structure
2568 * OneNAND detection method:
2569 * Compare the values from command with ones from register
2571 static int onenand_probe(struct mtd_info *mtd)
2573 struct onenand_chip *this = mtd->priv;
2574 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2578 /* Save system configuration 1 */
2579 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2580 /* Clear Sync. Burst Read mode to read BootRAM */
2581 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2583 /* Send the command for reading device ID from BootRAM */
2584 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2586 /* Read manufacturer and device IDs from BootRAM */
2587 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2588 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2590 /* Reset OneNAND to read default register values */
2591 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2593 this->wait(mtd, FL_RESETING);
2595 /* Restore system configuration 1 */
2596 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2598 /* Check manufacturer ID */
2599 if (onenand_check_maf(bram_maf_id))
2602 /* Read manufacturer and device IDs from Register */
2603 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2604 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2605 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2607 /* Check OneNAND device */
2608 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2611 /* Flash device information */
2612 onenand_print_device_info(dev_id, ver_id);
2613 this->device_id = dev_id;
2614 this->version_id = ver_id;
2616 density = onenand_get_density(dev_id);
2617 this->chipsize = (16 << density) << 20;
2618 /* Set density mask. it is used for DDP */
2619 if (ONENAND_IS_DDP(this))
2620 this->density_mask = (1 << (density + 6));
2622 this->density_mask = 0;
2624 /* OneNAND page size & block size */
2625 /* The data buffer size is equal to page size */
2626 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2627 mtd->oobsize = mtd->writesize >> 5;
2628 /* Pages per a block are always 64 in OneNAND */
2629 mtd->erasesize = mtd->writesize << 6;
2631 this->erase_shift = ffs(mtd->erasesize) - 1;
2632 this->page_shift = ffs(mtd->writesize) - 1;
2633 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2634 /* It's real page size */
2635 this->writesize = mtd->writesize;
2637 /* REVIST: Multichip handling */
2639 mtd->size = this->chipsize;
2641 /* Check OneNAND features */
2642 onenand_check_features(mtd);
2645 * We emulate the 4KiB page and 256KiB erase block size
2646 * But oobsize is still 64 bytes.
2647 * It is only valid if you turn on 2X program support,
2648 * Otherwise it will be ignored by compiler.
2650 if (ONENAND_IS_2PLANE(this)) {
2651 mtd->writesize <<= 1;
2652 mtd->erasesize <<= 1;
2659 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2660 * @param mtd MTD device structure
2662 static int onenand_suspend(struct mtd_info *mtd)
2664 return onenand_get_device(mtd, FL_PM_SUSPENDED);
2668 * onenand_resume - [MTD Interface] Resume the OneNAND flash
2669 * @param mtd MTD device structure
2671 static void onenand_resume(struct mtd_info *mtd)
2673 struct onenand_chip *this = mtd->priv;
2675 if (this->state == FL_PM_SUSPENDED)
2676 onenand_release_device(mtd);
2678 printk(KERN_ERR "resume() called for the chip which is not"
2679 "in suspended state\n");
2683 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2684 * @param mtd MTD device structure
2685 * @param maxchips Number of chips to scan for
2687 * This fills out all the not initialized function pointers
2688 * with the defaults.
2689 * The flash ID is read and the mtd/chip structures are
2690 * filled with the appropriate values.
2692 int onenand_scan(struct mtd_info *mtd, int maxchips)
2695 struct onenand_chip *this = mtd->priv;
2697 if (!this->read_word)
2698 this->read_word = onenand_readw;
2699 if (!this->write_word)
2700 this->write_word = onenand_writew;
2703 this->command = onenand_command;
2705 onenand_setup_wait(mtd);
2707 if (!this->read_bufferram)
2708 this->read_bufferram = onenand_read_bufferram;
2709 if (!this->write_bufferram)
2710 this->write_bufferram = onenand_write_bufferram;
2712 if (!this->block_markbad)
2713 this->block_markbad = onenand_default_block_markbad;
2714 if (!this->scan_bbt)
2715 this->scan_bbt = onenand_default_bbt;
2717 if (onenand_probe(mtd))
2720 /* Set Sync. Burst Read after probing */
2721 if (this->mmcontrol) {
2722 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2723 this->read_bufferram = onenand_sync_read_bufferram;
2726 /* Allocate buffers, if necessary */
2727 if (!this->page_buf) {
2728 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2729 if (!this->page_buf) {
2730 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2733 this->options |= ONENAND_PAGEBUF_ALLOC;
2735 if (!this->oob_buf) {
2736 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2737 if (!this->oob_buf) {
2738 printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n");
2739 if (this->options & ONENAND_PAGEBUF_ALLOC) {
2740 this->options &= ~ONENAND_PAGEBUF_ALLOC;
2741 kfree(this->page_buf);
2745 this->options |= ONENAND_OOBBUF_ALLOC;
2748 this->state = FL_READY;
2749 init_waitqueue_head(&this->wq);
2750 spin_lock_init(&this->chip_lock);
2753 * Allow subpage writes up to oobsize.
2755 switch (mtd->oobsize) {
2757 this->ecclayout = &onenand_oob_64;
2758 mtd->subpage_sft = 2;
2762 this->ecclayout = &onenand_oob_32;
2763 mtd->subpage_sft = 1;
2767 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2769 mtd->subpage_sft = 0;
2770 /* To prevent kernel oops */
2771 this->ecclayout = &onenand_oob_32;
2775 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2778 * The number of bytes available for a client to place data into
2779 * the out of band area
2781 this->ecclayout->oobavail = 0;
2782 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
2783 this->ecclayout->oobfree[i].length; i++)
2784 this->ecclayout->oobavail +=
2785 this->ecclayout->oobfree[i].length;
2786 mtd->oobavail = this->ecclayout->oobavail;
2788 mtd->ecclayout = this->ecclayout;
2790 /* Fill in remaining MTD driver data */
2791 mtd->type = MTD_NANDFLASH;
2792 mtd->flags = MTD_CAP_NANDFLASH;
2793 mtd->erase = onenand_erase;
2795 mtd->unpoint = NULL;
2796 mtd->read = onenand_read;
2797 mtd->write = onenand_write;
2798 mtd->read_oob = onenand_read_oob;
2799 mtd->write_oob = onenand_write_oob;
2800 mtd->panic_write = onenand_panic_write;
2801 #ifdef CONFIG_MTD_ONENAND_OTP
2802 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2803 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2804 mtd->get_user_prot_info = onenand_get_user_prot_info;
2805 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2806 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2807 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2809 mtd->sync = onenand_sync;
2810 mtd->lock = onenand_lock;
2811 mtd->unlock = onenand_unlock;
2812 mtd->suspend = onenand_suspend;
2813 mtd->resume = onenand_resume;
2814 mtd->block_isbad = onenand_block_isbad;
2815 mtd->block_markbad = onenand_block_markbad;
2816 mtd->owner = THIS_MODULE;
2818 /* Unlock whole block */
2819 onenand_unlock_all(mtd);
2821 return this->scan_bbt(mtd);
2825 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2826 * @param mtd MTD device structure
2828 void onenand_release(struct mtd_info *mtd)
2830 struct onenand_chip *this = mtd->priv;
2832 #ifdef CONFIG_MTD_PARTITIONS
2833 /* Deregister partitions */
2834 del_mtd_partitions (mtd);
2836 /* Deregister the device */
2837 del_mtd_device (mtd);
2839 /* Free bad block table memory, if allocated */
2841 struct bbm_info *bbm = this->bbm;
2845 /* Buffers allocated by onenand_scan */
2846 if (this->options & ONENAND_PAGEBUF_ALLOC)
2847 kfree(this->page_buf);
2848 if (this->options & ONENAND_OOBBUF_ALLOC)
2849 kfree(this->oob_buf);
2852 EXPORT_SYMBOL_GPL(onenand_scan);
2853 EXPORT_SYMBOL_GPL(onenand_release);
2855 MODULE_LICENSE("GPL");
2856 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2857 MODULE_DESCRIPTION("Generic OneNAND flash driver code");