err.no Git - linux-2.6/blob - drivers/mtd/onenand/onenand_base.c

   1 /*
   2  *  linux/drivers/mtd/onenand/onenand_base.c
   3  *
   4  *  Copyright (C) 2005-2007 Samsung Electronics
   5  *  Kyungmin Park <kyungmin.park@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/sched.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/jiffies.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/onenand.h>
  20 #include <linux/mtd/partitions.h>
  21
  22 #include <asm/io.h>
  23
  24 /**
  25  * onenand_oob_64 - oob info for large (2KB) page
  26  */
  27 static struct nand_ecclayout onenand_oob_64 = {
  28         .eccbytes       = 20,
  29         .eccpos         = {
  30                 8, 9, 10, 11, 12,
  31                 24, 25, 26, 27, 28,
  32                 40, 41, 42, 43, 44,
  33                 56, 57, 58, 59, 60,
  34                 },
  35         .oobfree        = {
  36                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
  37                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
  38         }
  39 };
  40
  41 /**
  42  * onenand_oob_32 - oob info for middle (1KB) page
  43  */
  44 static struct nand_ecclayout onenand_oob_32 = {
  45         .eccbytes       = 10,
  46         .eccpos         = {
  47                 8, 9, 10, 11, 12,
  48                 24, 25, 26, 27, 28,
  49                 },
  50         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  51 };
  52
  53 static const unsigned char ffchars[] = {
  54         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  55         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  56         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  57         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  58         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  62 };
  63
  64 /**
  65  * onenand_readw - [OneNAND Interface] Read OneNAND register
  66  * @param addr          address to read
  67  *
  68  * Read OneNAND register
  69  */
  70 static unsigned short onenand_readw(void __iomem *addr)
  71 {
  72         return readw(addr);
  73 }
  74
  75 /**
  76  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  77  * @param value         value to write
  78  * @param addr          address to write
  79  *
  80  * Write OneNAND register with value
  81  */
  82 static void onenand_writew(unsigned short value, void __iomem *addr)
  83 {
  84         writew(value, addr);
  85 }
  86
  87 /**
  88  * onenand_block_address - [DEFAULT] Get block address
  89  * @param this          onenand chip data structure
  90  * @param block         the block
  91  * @return              translated block address if DDP, otherwise same
  92  *
  93  * Setup Start Address 1 Register (F100h)
  94  */
  95 static int onenand_block_address(struct onenand_chip *this, int block)
  96 {
  97         /* Device Flash Core select, NAND Flash Block Address */
  98         if (block & this->density_mask)
  99                 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
 100
 101         return block;
 102 }
 103
 104 /**
 105  * onenand_bufferram_address - [DEFAULT] Get bufferram address
 106  * @param this          onenand chip data structure
 107  * @param block         the block
 108  * @return              set DBS value if DDP, otherwise 0
 109  *
 110  * Setup Start Address 2 Register (F101h) for DDP
 111  */
 112 static int onenand_bufferram_address(struct onenand_chip *this, int block)
 113 {
 114         /* Device BufferRAM Select */
 115         if (block & this->density_mask)
 116                 return ONENAND_DDP_CHIP1;
 117
 118         return ONENAND_DDP_CHIP0;
 119 }
 120
 121 /**
 122  * onenand_page_address - [DEFAULT] Get page address
 123  * @param page          the page address
 124  * @param sector        the sector address
 125  * @return              combined page and sector address
 126  *
 127  * Setup Start Address 8 Register (F107h)
 128  */
 129 static int onenand_page_address(int page, int sector)
 130 {
 131         /* Flash Page Address, Flash Sector Address */
 132         int fpa, fsa;
 133
 134         fpa = page & ONENAND_FPA_MASK;
 135         fsa = sector & ONENAND_FSA_MASK;
 136
 137         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
 138 }
 139
 140 /**
 141  * onenand_buffer_address - [DEFAULT] Get buffer address
 142  * @param dataram1      DataRAM index
 143  * @param sectors       the sector address
 144  * @param count         the number of sectors
 145  * @return              the start buffer value
 146  *
 147  * Setup Start Buffer Register (F200h)
 148  */
 149 static int onenand_buffer_address(int dataram1, int sectors, int count)
 150 {
 151         int bsa, bsc;
 152
 153         /* BufferRAM Sector Address */
 154         bsa = sectors & ONENAND_BSA_MASK;
 155
 156         if (dataram1)
 157                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
 158         else
 159                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
 160
 161         /* BufferRAM Sector Count */
 162         bsc = count & ONENAND_BSC_MASK;
 163
 164         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
 165 }
 166
 167 /**
 168  * onenand_command - [DEFAULT] Send command to OneNAND device
 169  * @param mtd           MTD device structure
 170  * @param cmd           the command to be sent
 171  * @param addr          offset to read from or write to
 172  * @param len           number of bytes to read or write
 173  *
 174  * Send command to OneNAND device. This function is used for middle/large page
 175  * devices (1KB/2KB Bytes per page)
 176  */
 177 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
 178 {
 179         struct onenand_chip *this = mtd->priv;
 180         int value, readcmd = 0, block_cmd = 0;
 181         int block, page;
 182
 183         /* Address translation */
 184         switch (cmd) {
 185         case ONENAND_CMD_UNLOCK:
 186         case ONENAND_CMD_LOCK:
 187         case ONENAND_CMD_LOCK_TIGHT:
 188         case ONENAND_CMD_UNLOCK_ALL:
 189                 block = -1;
 190                 page = -1;
 191                 break;
 192
 193         case ONENAND_CMD_ERASE:
 194         case ONENAND_CMD_BUFFERRAM:
 195         case ONENAND_CMD_OTP_ACCESS:
 196                 block_cmd = 1;
 197                 block = (int) (addr >> this->erase_shift);
 198                 page = -1;
 199                 break;
 200
 201         default:
 202                 block = (int) (addr >> this->erase_shift);
 203                 page = (int) (addr >> this->page_shift);
 204                 page &= this->page_mask;
 205                 break;
 206         }
 207
 208         /* NOTE: The setting order of the registers is very important! */
 209         if (cmd == ONENAND_CMD_BUFFERRAM) {
 210                 /* Select DataRAM for DDP */
 211                 value = onenand_bufferram_address(this, block);
 212                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 213
 214                 /* Switch to the next data buffer */
 215                 ONENAND_SET_NEXT_BUFFERRAM(this);
 216
 217                 return 0;
 218         }
 219
 220         if (block != -1) {
 221                 /* Write 'DFS, FBA' of Flash */
 222                 value = onenand_block_address(this, block);
 223                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
 224
 225                 if (block_cmd) {
 226                         /* Select DataRAM for DDP */
 227                         value = onenand_bufferram_address(this, block);
 228                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 229                 }
 230         }
 231
 232         if (page != -1) {
 233                 /* Now we use page size operation */
 234                 int sectors = 4, count = 4;
 235                 int dataram;
 236
 237                 switch (cmd) {
 238                 case ONENAND_CMD_READ:
 239                 case ONENAND_CMD_READOOB:
 240                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
 241                         readcmd = 1;
 242                         break;
 243
 244                 default:
 245                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
 246                         break;
 247                 }
 248
 249                 /* Write 'FPA, FSA' of Flash */
 250                 value = onenand_page_address(page, sectors);
 251                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
 252
 253                 /* Write 'BSA, BSC' of DataRAM */
 254                 value = onenand_buffer_address(dataram, sectors, count);
 255                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
 256
 257                 if (readcmd) {
 258                         /* Select DataRAM for DDP */
 259                         value = onenand_bufferram_address(this, block);
 260                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 261                 }
 262         }
 263
 264         /* Interrupt clear */
 265         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
 266
 267         /* Write command */
 268         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
 269
 270         return 0;
 271 }
 272
 273 /**
 274  * onenand_wait - [DEFAULT] wait until the command is done
 275  * @param mtd           MTD device structure
 276  * @param state         state to select the max. timeout value
 277  *
 278  * Wait for command done. This applies to all OneNAND command
 279  * Read can take up to 30us, erase up to 2ms and program up to 350us
 280  * according to general OneNAND specs
 281  */
 282 static int onenand_wait(struct mtd_info *mtd, int state)
 283 {
 284         struct onenand_chip * this = mtd->priv;
 285         unsigned long timeout;
 286         unsigned int flags = ONENAND_INT_MASTER;
 287         unsigned int interrupt = 0;
 288         unsigned int ctrl;
 289
 290         /* The 20 msec is enough */
 291         timeout = jiffies + msecs_to_jiffies(20);
 292         while (time_before(jiffies, timeout)) {
 293                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 294
 295                 if (interrupt & flags)
 296                         break;
 297
 298                 if (state != FL_READING)
 299                         cond_resched();
 300         }
 301         /* To get correct interrupt status in timeout case */
 302         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 303
 304         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 305
 306         if (ctrl & ONENAND_CTRL_ERROR) {
 307                 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
 308                 if (ctrl & ONENAND_CTRL_LOCK)
 309                         printk(KERN_ERR "onenand_wait: it's locked error.\n");
 310                 return ctrl;
 311         }
 312
 313         if (interrupt & ONENAND_INT_READ) {
 314                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 315                 if (ecc) {
 316                         printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
 317                         if (ecc & ONENAND_ECC_2BIT_ALL) {
 318                                 mtd->ecc_stats.failed++;
 319                                 return ecc;
 320                         } else if (ecc & ONENAND_ECC_1BIT_ALL)
 321                                 mtd->ecc_stats.corrected++;
 322                 }
 323         } else if (state == FL_READING) {
 324                 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
 325                 return -EIO;
 326         }
 327
 328         return 0;
 329 }
 330
 331 /*
 332  * onenand_interrupt - [DEFAULT] onenand interrupt handler
 333  * @param irq           onenand interrupt number
 334  * @param dev_id        interrupt data
 335  *
 336  * complete the work
 337  */
 338 static irqreturn_t onenand_interrupt(int irq, void *data)
 339 {
 340         struct onenand_chip *this = (struct onenand_chip *) data;
 341
 342         /* To handle shared interrupt */
 343         if (!this->complete.done)
 344                 complete(&this->complete);
 345
 346         return IRQ_HANDLED;
 347 }
 348
 349 /*
 350  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
 351  * @param mtd           MTD device structure
 352  * @param state         state to select the max. timeout value
 353  *
 354  * Wait for command done.
 355  */
 356 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
 357 {
 358         struct onenand_chip *this = mtd->priv;
 359
 360         wait_for_completion(&this->complete);
 361
 362         return onenand_wait(mtd, state);
 363 }
 364
 365 /*
 366  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
 367  * @param mtd           MTD device structure
 368  * @param state         state to select the max. timeout value
 369  *
 370  * Try interrupt based wait (It is used one-time)
 371  */
 372 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
 373 {
 374         struct onenand_chip *this = mtd->priv;
 375         unsigned long remain, timeout;
 376
 377         /* We use interrupt wait first */
 378         this->wait = onenand_interrupt_wait;
 379
 380         timeout = msecs_to_jiffies(100);
 381         remain = wait_for_completion_timeout(&this->complete, timeout);
 382         if (!remain) {
 383                 printk(KERN_INFO "OneNAND: There's no interrupt. "
 384                                 "We use the normal wait\n");
 385
 386                 /* Release the irq */
 387                 free_irq(this->irq, this);
 388
 389                 this->wait = onenand_wait;
 390         }
 391
 392         return onenand_wait(mtd, state);
 393 }
 394
 395 /*
 396  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
 397  * @param mtd           MTD device structure
 398  *
 399  * There's two method to wait onenand work
 400  * 1. polling - read interrupt status register
 401  * 2. interrupt - use the kernel interrupt method
 402  */
 403 static void onenand_setup_wait(struct mtd_info *mtd)
 404 {
 405         struct onenand_chip *this = mtd->priv;
 406         int syscfg;
 407
 408         init_completion(&this->complete);
 409
 410         if (this->irq <= 0) {
 411                 this->wait = onenand_wait;
 412                 return;
 413         }
 414
 415         if (request_irq(this->irq, &onenand_interrupt,
 416                                 IRQF_SHARED, "onenand", this)) {
 417                 /* If we can't get irq, use the normal wait */
 418                 this->wait = onenand_wait;
 419                 return;
 420         }
 421
 422         /* Enable interrupt */
 423         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
 424         syscfg |= ONENAND_SYS_CFG1_IOBE;
 425         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
 426
 427         this->wait = onenand_try_interrupt_wait;
 428 }
 429
 430 /**
 431  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
 432  * @param mtd           MTD data structure
 433  * @param area          BufferRAM area
 434  * @return              offset given area
 435  *
 436  * Return BufferRAM offset given area
 437  */
 438 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
 439 {
 440         struct onenand_chip *this = mtd->priv;
 441
 442         if (ONENAND_CURRENT_BUFFERRAM(this)) {
 443                 if (area == ONENAND_DATARAM)
 444                         return mtd->writesize;
 445                 if (area == ONENAND_SPARERAM)
 446                         return mtd->oobsize;
 447         }
 448
 449         return 0;
 450 }
 451
 452 /**
 453  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
 454  * @param mtd           MTD data structure
 455  * @param area          BufferRAM area
 456  * @param buffer        the databuffer to put/get data
 457  * @param offset        offset to read from or write to
 458  * @param count         number of bytes to read/write
 459  *
 460  * Read the BufferRAM area
 461  */
 462 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 463                 unsigned char *buffer, int offset, size_t count)
 464 {
 465         struct onenand_chip *this = mtd->priv;
 466         void __iomem *bufferram;
 467
 468         bufferram = this->base + area;
 469
 470         bufferram += onenand_bufferram_offset(mtd, area);
 471
 472         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 473                 unsigned short word;
 474
 475                 /* Align with word(16-bit) size */
 476                 count--;
 477
 478                 /* Read word and save byte */
 479                 word = this->read_word(bufferram + offset + count);
 480                 buffer[count] = (word & 0xff);
 481         }
 482
 483         memcpy(buffer, bufferram + offset, count);
 484
 485         return 0;
 486 }
 487
 488 /**
 489  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
 490  * @param mtd           MTD data structure
 491  * @param area          BufferRAM area
 492  * @param buffer        the databuffer to put/get data
 493  * @param offset        offset to read from or write to
 494  * @param count         number of bytes to read/write
 495  *
 496  * Read the BufferRAM area with Sync. Burst Mode
 497  */
 498 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 499                 unsigned char *buffer, int offset, size_t count)
 500 {
 501         struct onenand_chip *this = mtd->priv;
 502         void __iomem *bufferram;
 503
 504         bufferram = this->base + area;
 505
 506         bufferram += onenand_bufferram_offset(mtd, area);
 507
 508         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 509
 510         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 511                 unsigned short word;
 512
 513                 /* Align with word(16-bit) size */
 514                 count--;
 515
 516                 /* Read word and save byte */
 517                 word = this->read_word(bufferram + offset + count);
 518                 buffer[count] = (word & 0xff);
 519         }
 520
 521         memcpy(buffer, bufferram + offset, count);
 522
 523         this->mmcontrol(mtd, 0);
 524
 525         return 0;
 526 }
 527
 528 /**
 529  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
 530  * @param mtd           MTD data structure
 531  * @param area          BufferRAM area
 532  * @param buffer        the databuffer to put/get data
 533  * @param offset        offset to read from or write to
 534  * @param count         number of bytes to read/write
 535  *
 536  * Write the BufferRAM area
 537  */
 538 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 539                 const unsigned char *buffer, int offset, size_t count)
 540 {
 541         struct onenand_chip *this = mtd->priv;
 542         void __iomem *bufferram;
 543
 544         bufferram = this->base + area;
 545
 546         bufferram += onenand_bufferram_offset(mtd, area);
 547
 548         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 549                 unsigned short word;
 550                 int byte_offset;
 551
 552                 /* Align with word(16-bit) size */
 553                 count--;
 554
 555                 /* Calculate byte access offset */
 556                 byte_offset = offset + count;
 557
 558                 /* Read word and save byte */
 559                 word = this->read_word(bufferram + byte_offset);
 560                 word = (word & ~0xff) | buffer[count];
 561                 this->write_word(word, bufferram + byte_offset);
 562         }
 563
 564         memcpy(bufferram + offset, buffer, count);
 565
 566         return 0;
 567 }
 568
 569 /**
 570  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
 571  * @param mtd           MTD data structure
 572  * @param addr          address to check
 573  * @return              1 if there are valid data, otherwise 0
 574  *
 575  * Check bufferram if there is data we required
 576  */
 577 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 578 {
 579         struct onenand_chip *this = mtd->priv;
 580         int blockpage;
 581         unsigned int i;
 582
 583         blockpage = (int) (addr >> this->page_shift);
 584
 585         /* Is there valid data? */
 586         i = ONENAND_CURRENT_BUFFERRAM(this);
 587         if (this->bufferram[i].blockpage == blockpage)
 588                 return 1;
 589
 590         /* Check another BufferRAM */
 591         i = ONENAND_NEXT_BUFFERRAM(this);
 592         if (this->bufferram[i].blockpage == blockpage) {
 593                 ONENAND_SET_NEXT_BUFFERRAM(this);
 594                 return 1;
 595         }
 596
 597         return 0;
 598 }
 599
 600 /**
 601  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
 602  * @param mtd           MTD data structure
 603  * @param addr          address to update
 604  * @param valid         valid flag
 605  *
 606  * Update BufferRAM information
 607  */
 608 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
 609                 int valid)
 610 {
 611         struct onenand_chip *this = mtd->priv;
 612         int blockpage;
 613         unsigned int i;
 614
 615         blockpage = (int) (addr >> this->page_shift);
 616
 617         /* Invalidate another BufferRAM */
 618         i = ONENAND_NEXT_BUFFERRAM(this);
 619         if (this->bufferram[i].blockpage == blockpage)
 620                 this->bufferram[i].blockpage = -1;
 621
 622         /* Update BufferRAM */
 623         i = ONENAND_CURRENT_BUFFERRAM(this);
 624         if (valid)
 625                 this->bufferram[i].blockpage = blockpage;
 626         else
 627                 this->bufferram[i].blockpage = -1;
 628 }
 629
 630 /**
 631  * onenand_get_device - [GENERIC] Get chip for selected access
 632  * @param mtd           MTD device structure
 633  * @param new_state     the state which is requested
 634  *
 635  * Get the device and lock it for exclusive access
 636  */
 637 static int onenand_get_device(struct mtd_info *mtd, int new_state)
 638 {
 639         struct onenand_chip *this = mtd->priv;
 640         DECLARE_WAITQUEUE(wait, current);
 641
 642         /*
 643          * Grab the lock and see if the device is available
 644          */
 645         while (1) {
 646                 spin_lock(&this->chip_lock);
 647                 if (this->state == FL_READY) {
 648                         this->state = new_state;
 649                         spin_unlock(&this->chip_lock);
 650                         break;
 651                 }
 652                 if (new_state == FL_PM_SUSPENDED) {
 653                         spin_unlock(&this->chip_lock);
 654                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
 655                 }
 656                 set_current_state(TASK_UNINTERRUPTIBLE);
 657                 add_wait_queue(&this->wq, &wait);
 658                 spin_unlock(&this->chip_lock);
 659                 schedule();
 660                 remove_wait_queue(&this->wq, &wait);
 661         }
 662
 663         return 0;
 664 }
 665
 666 /**
 667  * onenand_release_device - [GENERIC] release chip
 668  * @param mtd           MTD device structure
 669  *
 670  * Deselect, release chip lock and wake up anyone waiting on the device
 671  */
 672 static void onenand_release_device(struct mtd_info *mtd)
 673 {
 674         struct onenand_chip *this = mtd->priv;
 675
 676         /* Release the chip */
 677         spin_lock(&this->chip_lock);
 678         this->state = FL_READY;
 679         wake_up(&this->wq);
 680         spin_unlock(&this->chip_lock);
 681 }
 682
 683 /**
 684  * onenand_read - [MTD Interface] Read data from flash
 685  * @param mtd           MTD device structure
 686  * @param from          offset to read from
 687  * @param len           number of bytes to read
 688  * @param retlen        pointer to variable to store the number of read bytes
 689  * @param buf           the databuffer to put data
 690  *
 691  * Read with ecc
 692 */
 693 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
 694         size_t *retlen, u_char *buf)
 695 {
 696         struct onenand_chip *this = mtd->priv;
 697         struct mtd_ecc_stats stats;
 698         int read = 0, column;
 699         int thislen;
 700         int ret = 0, boundary = 0;
 701
 702         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 703
 704         /* Do not allow reads past end of device */
 705         if ((from + len) > mtd->size) {
 706                 printk(KERN_ERR "onenand_read: Attempt read beyond end of device\n");
 707                 *retlen = 0;
 708                 return -EINVAL;
 709         }
 710
 711         /* Grab the lock and see if the device is available */
 712         onenand_get_device(mtd, FL_READING);
 713
 714         stats = mtd->ecc_stats;
 715
 716         /* Read-while-load method */
 717
 718         /* Do first load to bufferRAM */
 719         if (read < len) {
 720                 if (!onenand_check_bufferram(mtd, from)) {
 721                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
 722                         ret = this->wait(mtd, FL_READING);
 723                         onenand_update_bufferram(mtd, from, !ret);
 724                 }
 725         }
 726
 727         thislen = min_t(int, mtd->writesize, len - read);
 728         column = from & (mtd->writesize - 1);
 729         if (column + thislen > mtd->writesize)
 730                 thislen = mtd->writesize - column;
 731
 732         while (!ret) {
 733                 /* If there is more to load then start next load */
 734                 from += thislen;
 735                 if (read + thislen < len) {
 736                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
 737                         /*
 738                          * Chip boundary handling in DDP
 739                          * Now we issued chip 1 read and pointed chip 1
 740                          * bufferam so we have to point chip 0 bufferam.
 741                          */
 742                         if (ONENAND_IS_DDP(this) &&
 743                             unlikely(from == (this->chipsize >> 1))) {
 744                                 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
 745                                 boundary = 1;
 746                         } else
 747                                 boundary = 0;
 748                         ONENAND_SET_PREV_BUFFERRAM(this);
 749                 }
 750                 /* While load is going, read from last bufferRAM */
 751                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
 752                 /* See if we are done */
 753                 read += thislen;
 754                 if (read == len)
 755                         break;
 756                 /* Set up for next read from bufferRAM */
 757                 if (unlikely(boundary))
 758                         this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
 759                 ONENAND_SET_NEXT_BUFFERRAM(this);
 760                 buf += thislen;
 761                 thislen = min_t(int, mtd->writesize, len - read);
 762                 column = 0;
 763                 cond_resched();
 764                 /* Now wait for load */
 765                 ret = this->wait(mtd, FL_READING);
 766                 onenand_update_bufferram(mtd, from, !ret);
 767         }
 768
 769         /* Deselect and wake up anyone waiting on the device */
 770         onenand_release_device(mtd);
 771
 772         /*
 773          * Return success, if no ECC failures, else -EBADMSG
 774          * fs driver will take care of that, because
 775          * retlen == desired len and result == -EBADMSG
 776          */
 777         *retlen = read;
 778
 779         if (mtd->ecc_stats.failed - stats.failed)
 780                 return -EBADMSG;
 781
 782         if (ret)
 783                 return ret;
 784
 785         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
 786 }
 787
 788 /**
 789  * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
 790  * @param mtd           MTD device structure
 791  * @param buf           destination address
 792  * @param column        oob offset to read from
 793  * @param thislen       oob length to read
 794  */
 795 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
 796                                 int thislen)
 797 {
 798         struct onenand_chip *this = mtd->priv;
 799         struct nand_oobfree *free;
 800         int readcol = column;
 801         int readend = column + thislen;
 802         int lastgap = 0;
 803         uint8_t *oob_buf = this->page_buf + mtd->writesize;
 804
 805         for (free = this->ecclayout->oobfree; free->length; ++free) {
 806                 if (readcol >= lastgap)
 807                         readcol += free->offset - lastgap;
 808                 if (readend >= lastgap)
 809                         readend += free->offset - lastgap;
 810                 lastgap = free->offset + free->length;
 811         }
 812         this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
 813         for (free = this->ecclayout->oobfree; free->length; ++free) {
 814                 int free_end = free->offset + free->length;
 815                 if (free->offset < readend && free_end > readcol) {
 816                         int st = max_t(int,free->offset,readcol);
 817                         int ed = min_t(int,free_end,readend);
 818                         int n = ed - st;
 819                         memcpy(buf, oob_buf + st, n);
 820                         buf += n;
 821                 }
 822         }
 823         return 0;
 824 }
 825
 826 /**
 827  * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
 828  * @param mtd           MTD device structure
 829  * @param from          offset to read from
 830  * @param len           number of bytes to read
 831  * @param retlen        pointer to variable to store the number of read bytes
 832  * @param buf           the databuffer to put data
 833  * @param mode          operation mode
 834  *
 835  * OneNAND read out-of-band data from the spare area
 836  */
 837 static int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
 838                         size_t *retlen, u_char *buf, mtd_oob_mode_t mode)
 839 {
 840         struct onenand_chip *this = mtd->priv;
 841         int read = 0, thislen, column, oobsize;
 842         int ret = 0;
 843
 844         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 845
 846         /* Initialize return length value */
 847         *retlen = 0;
 848
 849         if (mode == MTD_OOB_AUTO)
 850                 oobsize = this->ecclayout->oobavail;
 851         else
 852                 oobsize = mtd->oobsize;
 853
 854         column = from & (mtd->oobsize - 1);
 855
 856         if (unlikely(column >= oobsize)) {
 857                 printk(KERN_ERR "onenand_read_oob: Attempted to start read outside oob\n");
 858                 return -EINVAL;
 859         }
 860
 861         /* Do not allow reads past end of device */
 862         if (unlikely(from >= mtd->size ||
 863                      column + len > ((mtd->size >> this->page_shift) -
 864                                      (from >> this->page_shift)) * oobsize)) {
 865                 printk(KERN_ERR "onenand_read_oob: Attempted to read beyond end of device\n");
 866                 return -EINVAL;
 867         }
 868
 869         /* Grab the lock and see if the device is available */
 870         onenand_get_device(mtd, FL_READING);
 871
 872         while (read < len) {
 873                 cond_resched();
 874
 875                 thislen = oobsize - column;
 876                 thislen = min_t(int, thislen, len);
 877
 878                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
 879
 880                 onenand_update_bufferram(mtd, from, 0);
 881
 882                 ret = this->wait(mtd, FL_READING);
 883                 /* First copy data and check return value for ECC handling */
 884
 885                 if (mode == MTD_OOB_AUTO)
 886                         onenand_transfer_auto_oob(mtd, buf, column, thislen);
 887                 else
 888                         this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
 889
 890                 if (ret) {
 891                         printk(KERN_ERR "onenand_read_oob: read failed = 0x%x\n", ret);
 892                         break;
 893                 }
 894
 895                 read += thislen;
 896
 897                 if (read == len)
 898                         break;
 899
 900                 buf += thislen;
 901
 902                 /* Read more? */
 903                 if (read < len) {
 904                         /* Page size */
 905                         from += mtd->writesize;
 906                         column = 0;
 907                 }
 908         }
 909
 910         /* Deselect and wake up anyone waiting on the device */
 911         onenand_release_device(mtd);
 912
 913         *retlen = read;
 914         return ret;
 915 }
 916
 917 /**
 918  * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
 919  * @mtd:        MTD device structure
 920  * @from:       offset to read from
 921  * @ops:        oob operation description structure
 922  */
 923 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
 924                             struct mtd_oob_ops *ops)
 925 {
 926         switch (ops->mode) {
 927         case MTD_OOB_PLACE:
 928         case MTD_OOB_AUTO:
 929                 break;
 930         case MTD_OOB_RAW:
 931                 /* Not implemented yet */
 932         default:
 933                 return -EINVAL;
 934         }
 935         return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
 936                                    &ops->oobretlen, ops->oobbuf, ops->mode);
 937 }
 938
 939 /**
 940  * onenand_bbt_wait - [DEFAULT] wait until the command is done
 941  * @param mtd           MTD device structure
 942  * @param state         state to select the max. timeout value
 943  *
 944  * Wait for command done.
 945  */
 946 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
 947 {
 948         struct onenand_chip *this = mtd->priv;
 949         unsigned long timeout;
 950         unsigned int interrupt;
 951         unsigned int ctrl;
 952
 953         /* The 20 msec is enough */
 954         timeout = jiffies + msecs_to_jiffies(20);
 955         while (time_before(jiffies, timeout)) {
 956                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 957                 if (interrupt & ONENAND_INT_MASTER)
 958                         break;
 959         }
 960         /* To get correct interrupt status in timeout case */
 961         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 962         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 963
 964         if (ctrl & ONENAND_CTRL_ERROR) {
 965                 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
 966                 /* Initial bad block case */
 967                 if (ctrl & ONENAND_CTRL_LOAD)
 968                         return ONENAND_BBT_READ_ERROR;
 969                 return ONENAND_BBT_READ_FATAL_ERROR;
 970         }
 971
 972         if (interrupt & ONENAND_INT_READ) {
 973                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 974                 if (ecc & ONENAND_ECC_2BIT_ALL)
 975                         return ONENAND_BBT_READ_ERROR;
 976         } else {
 977                 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
 978                         "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
 979                 return ONENAND_BBT_READ_FATAL_ERROR;
 980         }
 981
 982         return 0;
 983 }
 984
 985 /**
 986  * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
 987  * @param mtd           MTD device structure
 988  * @param from          offset to read from
 989  * @param @ops          oob operation description structure
 990  *
 991  * OneNAND read out-of-band data from the spare area for bbt scan
 992  */
 993 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
 994                             struct mtd_oob_ops *ops)
 995 {
 996         struct onenand_chip *this = mtd->priv;
 997         int read = 0, thislen, column;
 998         int ret = 0;
 999         size_t len = ops->ooblen;
1000         u_char *buf = ops->oobbuf;
1001
1002         DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, len);
1003
1004         /* Initialize return value */
1005         ops->oobretlen = 0;
1006
1007         /* Do not allow reads past end of device */
1008         if (unlikely((from + len) > mtd->size)) {
1009                 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1010                 return ONENAND_BBT_READ_FATAL_ERROR;
1011         }
1012
1013         /* Grab the lock and see if the device is available */
1014         onenand_get_device(mtd, FL_READING);
1015
1016         column = from & (mtd->oobsize - 1);
1017
1018         while (read < len) {
1019                 cond_resched();
1020
1021                 thislen = mtd->oobsize - column;
1022                 thislen = min_t(int, thislen, len);
1023
1024                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1025
1026                 onenand_update_bufferram(mtd, from, 0);
1027
1028                 ret = onenand_bbt_wait(mtd, FL_READING);
1029                 if (ret)
1030                         break;
1031
1032                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1033                 read += thislen;
1034                 if (read == len)
1035                         break;
1036
1037                 buf += thislen;
1038
1039                 /* Read more? */
1040                 if (read < len) {
1041                         /* Update Page size */
1042                         from += mtd->writesize;
1043                         column = 0;
1044                 }
1045         }
1046
1047         /* Deselect and wake up anyone waiting on the device */
1048         onenand_release_device(mtd);
1049
1050         ops->oobretlen = read;
1051         return ret;
1052 }
1053
1054 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1055 /**
1056  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1057  * @param mtd           MTD device structure
1058  * @param buf           the databuffer to verify
1059  * @param to            offset to read from
1060  *
1061  */
1062 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1063 {
1064         struct onenand_chip *this = mtd->priv;
1065         char *readp = this->page_buf + mtd->writesize;
1066         int status, i;
1067
1068         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1069         onenand_update_bufferram(mtd, to, 0);
1070         status = this->wait(mtd, FL_READING);
1071         if (status)
1072                 return status;
1073
1074         this->read_bufferram(mtd, ONENAND_SPARERAM, readp, 0, mtd->oobsize);
1075         for(i = 0; i < mtd->oobsize; i++)
1076                 if (buf[i] != 0xFF && buf[i] != readp[i])
1077                         return -EBADMSG;
1078
1079         return 0;
1080 }
1081
1082 /**
1083  * onenand_verify - [GENERIC] verify the chip contents after a write
1084  * @param mtd          MTD device structure
1085  * @param buf          the databuffer to verify
1086  * @param addr         offset to read from
1087  * @param len          number of bytes to read and compare
1088  *
1089  */
1090 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1091 {
1092         struct onenand_chip *this = mtd->priv;
1093         void __iomem *dataram;
1094         int ret = 0;
1095         int thislen, column;
1096
1097         while (len != 0) {
1098                 thislen = min_t(int, mtd->writesize, len);
1099                 column = addr & (mtd->writesize - 1);
1100                 if (column + thislen > mtd->writesize)
1101                         thislen = mtd->writesize - column;
1102
1103                 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
1104
1105                 onenand_update_bufferram(mtd, addr, 0);
1106
1107                 ret = this->wait(mtd, FL_READING);
1108                 if (ret)
1109                         return ret;
1110
1111                 onenand_update_bufferram(mtd, addr, 1);
1112
1113                 dataram = this->base + ONENAND_DATARAM;
1114                 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1115
1116                 if (memcmp(buf, dataram + column, thislen))
1117                         return -EBADMSG;
1118
1119                 len -= thislen;
1120                 buf += thislen;
1121                 addr += thislen;
1122         }
1123
1124         return 0;
1125 }
1126 #else
1127 #define onenand_verify(...)             (0)
1128 #define onenand_verify_oob(...)         (0)
1129 #endif
1130
1131 #define NOTALIGNED(x)   ((x & (this->subpagesize - 1)) != 0)
1132
1133 /**
1134  * onenand_write - [MTD Interface] write buffer to FLASH
1135  * @param mtd           MTD device structure
1136  * @param to            offset to write to
1137  * @param len           number of bytes to write
1138  * @param retlen        pointer to variable to store the number of written bytes
1139  * @param buf           the data to write
1140  *
1141  * Write with ECC
1142  */
1143 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1144         size_t *retlen, const u_char *buf)
1145 {
1146         struct onenand_chip *this = mtd->priv;
1147         int written = 0;
1148         int ret = 0;
1149         int column, subpage;
1150
1151         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1152
1153         /* Initialize retlen, in case of early exit */
1154         *retlen = 0;
1155
1156         /* Do not allow writes past end of device */
1157         if (unlikely((to + len) > mtd->size)) {
1158                 printk(KERN_ERR "onenand_write: Attempt write to past end of device\n");
1159                 return -EINVAL;
1160         }
1161
1162         /* Reject writes, which are not page aligned */
1163         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1164                 printk(KERN_ERR "onenand_write: Attempt to write not page aligned data\n");
1165                 return -EINVAL;
1166         }
1167
1168         column = to & (mtd->writesize - 1);
1169
1170         /* Grab the lock and see if the device is available */
1171         onenand_get_device(mtd, FL_WRITING);
1172
1173         /* Loop until all data write */
1174         while (written < len) {
1175                 int thislen = min_t(int, mtd->writesize - column, len - written);
1176                 u_char *wbuf = (u_char *) buf;
1177
1178                 cond_resched();
1179
1180                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1181
1182                 /* Partial page write */
1183                 subpage = thislen < mtd->writesize;
1184                 if (subpage) {
1185                         memset(this->page_buf, 0xff, mtd->writesize);
1186                         memcpy(this->page_buf + column, buf, thislen);
1187                         wbuf = this->page_buf;
1188                 }
1189
1190                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1191                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1192
1193                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1194
1195                 ret = this->wait(mtd, FL_WRITING);
1196
1197                 /* In partial page write we don't update bufferram */
1198                 onenand_update_bufferram(mtd, to, !ret && !subpage);
1199
1200                 if (ret) {
1201                         printk(KERN_ERR "onenand_write: write filaed %d\n", ret);
1202                         break;
1203                 }
1204
1205                 /* Only check verify write turn on */
1206                 ret = onenand_verify(mtd, (u_char *) wbuf, to, thislen);
1207                 if (ret) {
1208                         printk(KERN_ERR "onenand_write: verify failed %d\n", ret);
1209                         break;
1210                 }
1211
1212                 written += thislen;
1213
1214                 if (written == len)
1215                         break;
1216
1217                 column = 0;
1218                 to += thislen;
1219                 buf += thislen;
1220         }
1221
1222         /* Deselect and wake up anyone waiting on the device */
1223         onenand_release_device(mtd);
1224
1225         *retlen = written;
1226
1227         return ret;
1228 }
1229
1230 /**
1231  * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1232  * @param mtd           MTD device structure
1233  * @param oob_buf       oob buffer
1234  * @param buf           source address
1235  * @param column        oob offset to write to
1236  * @param thislen       oob length to write
1237  */
1238 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1239                                   const u_char *buf, int column, int thislen)
1240 {
1241         struct onenand_chip *this = mtd->priv;
1242         struct nand_oobfree *free;
1243         int writecol = column;
1244         int writeend = column + thislen;
1245         int lastgap = 0;
1246
1247         for (free = this->ecclayout->oobfree; free->length; ++free) {
1248                 if (writecol >= lastgap)
1249                         writecol += free->offset - lastgap;
1250                 if (writeend >= lastgap)
1251                         writeend += free->offset - lastgap;
1252                 lastgap = free->offset + free->length;
1253         }
1254         for (free = this->ecclayout->oobfree; free->length; ++free) {
1255                 int free_end = free->offset + free->length;
1256                 if (free->offset < writeend && free_end > writecol) {
1257                         int st = max_t(int,free->offset,writecol);
1258                         int ed = min_t(int,free_end,writeend);
1259                         int n = ed - st;
1260                         memcpy(oob_buf + st, buf, n);
1261                         buf += n;
1262                 }
1263         }
1264         return 0;
1265 }
1266
1267 /**
1268  * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1269  * @param mtd           MTD device structure
1270  * @param to            offset to write to
1271  * @param len           number of bytes to write
1272  * @param retlen        pointer to variable to store the number of written bytes
1273  * @param buf           the data to write
1274  * @param mode          operation mode
1275  *
1276  * OneNAND write out-of-band
1277  */
1278 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1279                                 size_t *retlen, const u_char *buf, mtd_oob_mode_t mode)
1280 {
1281         struct onenand_chip *this = mtd->priv;
1282         int column, ret = 0, oobsize;
1283         int written = 0;
1284
1285         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1286
1287         /* Initialize retlen, in case of early exit */
1288         *retlen = 0;
1289
1290         if (mode == MTD_OOB_AUTO)
1291                 oobsize = this->ecclayout->oobavail;
1292         else
1293                 oobsize = mtd->oobsize;
1294
1295         column = to & (mtd->oobsize - 1);
1296
1297         if (unlikely(column >= oobsize)) {
1298                 printk(KERN_ERR "onenand_write_oob: Attempted to start write outside oob\n");
1299                 return -EINVAL;
1300         }
1301
1302         /* For compatibility with NAND: Do not allow write past end of page */
1303         if (column + len > oobsize) {
1304                 printk(KERN_ERR "onenand_write_oob: "
1305                       "Attempt to write past end of page\n");
1306                 return -EINVAL;
1307         }
1308
1309         /* Do not allow reads past end of device */
1310         if (unlikely(to >= mtd->size ||
1311                      column + len > ((mtd->size >> this->page_shift) -
1312                                      (to >> this->page_shift)) * oobsize)) {
1313                 printk(KERN_ERR "onenand_write_oob: Attempted to write past end of device\n");
1314                 return -EINVAL;
1315         }
1316
1317         /* Grab the lock and see if the device is available */
1318         onenand_get_device(mtd, FL_WRITING);
1319
1320         /* Loop until all data write */
1321         while (written < len) {
1322                 int thislen = min_t(int, oobsize, len - written);
1323
1324                 cond_resched();
1325
1326                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1327
1328                 /* We send data to spare ram with oobsize
1329                  * to prevent byte access */
1330                 memset(this->page_buf, 0xff, mtd->oobsize);
1331                 if (mode == MTD_OOB_AUTO)
1332                         onenand_fill_auto_oob(mtd, this->page_buf, buf, column, thislen);
1333                 else
1334                         memcpy(this->page_buf + column, buf, thislen);
1335                 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
1336
1337                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1338
1339                 onenand_update_bufferram(mtd, to, 0);
1340
1341                 ret = this->wait(mtd, FL_WRITING);
1342                 if (ret) {
1343                         printk(KERN_ERR "onenand_write_oob: write failed %d\n", ret);
1344                         break;
1345                 }
1346
1347                 ret = onenand_verify_oob(mtd, this->page_buf, to);
1348                 if (ret) {
1349                         printk(KERN_ERR "onenand_write_oob: verify failed %d\n", ret);
1350                         break;
1351                 }
1352
1353                 written += thislen;
1354                 if (written == len)
1355                         break;
1356
1357                 to += mtd->writesize;
1358                 buf += thislen;
1359                 column = 0;
1360         }
1361
1362         /* Deselect and wake up anyone waiting on the device */
1363         onenand_release_device(mtd);
1364
1365         *retlen = written;
1366
1367         return ret;
1368 }
1369
1370 /**
1371  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1372  * @mtd:        MTD device structure
1373  * @from:       offset to read from
1374  * @ops:        oob operation description structure
1375  */
1376 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1377                              struct mtd_oob_ops *ops)
1378 {
1379         switch (ops->mode) {
1380         case MTD_OOB_PLACE:
1381         case MTD_OOB_AUTO:
1382                 break;
1383         case MTD_OOB_RAW:
1384                 /* Not implemented yet */
1385         default:
1386                 return -EINVAL;
1387         }
1388         return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
1389                                     &ops->oobretlen, ops->oobbuf, ops->mode);
1390 }
1391
1392 /**
1393  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1394  * @param mtd           MTD device structure
1395  * @param ofs           offset from device start
1396  * @param getchip       0, if the chip is already selected
1397  * @param allowbbt      1, if its allowed to access the bbt area
1398  *
1399  * Check, if the block is bad. Either by reading the bad block table or
1400  * calling of the scan function.
1401  */
1402 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1403 {
1404         struct onenand_chip *this = mtd->priv;
1405         struct bbm_info *bbm = this->bbm;
1406
1407         /* Return info from the table */
1408         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1409 }
1410
1411 /**
1412  * onenand_erase - [MTD Interface] erase block(s)
1413  * @param mtd           MTD device structure
1414  * @param instr         erase instruction
1415  *
1416  * Erase one ore more blocks
1417  */
1418 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1419 {
1420         struct onenand_chip *this = mtd->priv;
1421         unsigned int block_size;
1422         loff_t addr;
1423         int len;
1424         int ret = 0;
1425
1426         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1427
1428         block_size = (1 << this->erase_shift);
1429
1430         /* Start address must align on block boundary */
1431         if (unlikely(instr->addr & (block_size - 1))) {
1432                 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1433                 return -EINVAL;
1434         }
1435
1436         /* Length must align on block boundary */
1437         if (unlikely(instr->len & (block_size - 1))) {
1438                 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1439                 return -EINVAL;
1440         }
1441
1442         /* Do not allow erase past end of device */
1443         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1444                 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1445                 return -EINVAL;
1446         }
1447
1448         instr->fail_addr = 0xffffffff;
1449
1450         /* Grab the lock and see if the device is available */
1451         onenand_get_device(mtd, FL_ERASING);
1452
1453         /* Loop throught the pages */
1454         len = instr->len;
1455         addr = instr->addr;
1456
1457         instr->state = MTD_ERASING;
1458
1459         while (len) {
1460                 cond_resched();
1461
1462                 /* Check if we have a bad block, we do not erase bad blocks */
1463                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1464                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1465                         instr->state = MTD_ERASE_FAILED;
1466                         goto erase_exit;
1467                 }
1468
1469                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1470
1471                 ret = this->wait(mtd, FL_ERASING);
1472                 /* Check, if it is write protected */
1473                 if (ret) {
1474                         printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1475                         instr->state = MTD_ERASE_FAILED;
1476                         instr->fail_addr = addr;
1477                         goto erase_exit;
1478                 }
1479
1480                 len -= block_size;
1481                 addr += block_size;
1482         }
1483
1484         instr->state = MTD_ERASE_DONE;
1485
1486 erase_exit:
1487
1488         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1489         /* Do call back function */
1490         if (!ret)
1491                 mtd_erase_callback(instr);
1492
1493         /* Deselect and wake up anyone waiting on the device */
1494         onenand_release_device(mtd);
1495
1496         return ret;
1497 }
1498
1499 /**
1500  * onenand_sync - [MTD Interface] sync
1501  * @param mtd           MTD device structure
1502  *
1503  * Sync is actually a wait for chip ready function
1504  */
1505 static void onenand_sync(struct mtd_info *mtd)
1506 {
1507         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1508
1509         /* Grab the lock and see if the device is available */
1510         onenand_get_device(mtd, FL_SYNCING);
1511
1512         /* Release it and go back */
1513         onenand_release_device(mtd);
1514 }
1515
1516 /**
1517  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1518  * @param mtd           MTD device structure
1519  * @param ofs           offset relative to mtd start
1520  *
1521  * Check whether the block is bad
1522  */
1523 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1524 {
1525         /* Check for invalid offset */
1526         if (ofs > mtd->size)
1527                 return -EINVAL;
1528
1529         return onenand_block_checkbad(mtd, ofs, 1, 0);
1530 }
1531
1532 /**
1533  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1534  * @param mtd           MTD device structure
1535  * @param ofs           offset from device start
1536  *
1537  * This is the default implementation, which can be overridden by
1538  * a hardware specific driver.
1539  */
1540 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1541 {
1542         struct onenand_chip *this = mtd->priv;
1543         struct bbm_info *bbm = this->bbm;
1544         u_char buf[2] = {0, 0};
1545         size_t retlen;
1546         int block;
1547
1548         /* Get block number */
1549         block = ((int) ofs) >> bbm->bbt_erase_shift;
1550         if (bbm->bbt)
1551                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1552
1553         /* We write two bytes, so we dont have to mess with 16 bit access */
1554         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1555         return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf, MTD_OOB_PLACE);
1556 }
1557
1558 /**
1559  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1560  * @param mtd           MTD device structure
1561  * @param ofs           offset relative to mtd start
1562  *
1563  * Mark the block as bad
1564  */
1565 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1566 {
1567         struct onenand_chip *this = mtd->priv;
1568         int ret;
1569
1570         ret = onenand_block_isbad(mtd, ofs);
1571         if (ret) {
1572                 /* If it was bad already, return success and do nothing */
1573                 if (ret > 0)
1574                         return 0;
1575                 return ret;
1576         }
1577
1578         return this->block_markbad(mtd, ofs);
1579 }
1580
1581 /**
1582  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1583  * @param mtd           MTD device structure
1584  * @param ofs           offset relative to mtd start
1585  * @param len           number of bytes to lock or unlock
1586  *
1587  * Lock or unlock one or more blocks
1588  */
1589 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1590 {
1591         struct onenand_chip *this = mtd->priv;
1592         int start, end, block, value, status;
1593         int wp_status_mask;
1594
1595         start = ofs >> this->erase_shift;
1596         end = len >> this->erase_shift;
1597
1598         if (cmd == ONENAND_CMD_LOCK)
1599                 wp_status_mask = ONENAND_WP_LS;
1600         else
1601                 wp_status_mask = ONENAND_WP_US;
1602
1603         /* Continuous lock scheme */
1604         if (this->options & ONENAND_HAS_CONT_LOCK) {
1605                 /* Set start block address */
1606                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1607                 /* Set end block address */
1608                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1609                 /* Write lock command */
1610                 this->command(mtd, cmd, 0, 0);
1611
1612                 /* There's no return value */
1613                 this->wait(mtd, FL_LOCKING);
1614
1615                 /* Sanity check */
1616                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1617                     & ONENAND_CTRL_ONGO)
1618                         continue;
1619
1620                 /* Check lock status */
1621                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1622                 if (!(status & wp_status_mask))
1623                         printk(KERN_ERR "wp status = 0x%x\n", status);
1624
1625                 return 0;
1626         }
1627
1628         /* Block lock scheme */
1629         for (block = start; block < start + end; block++) {
1630                 /* Set block address */
1631                 value = onenand_block_address(this, block);
1632                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1633                 /* Select DataRAM for DDP */
1634                 value = onenand_bufferram_address(this, block);
1635                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1636                 /* Set start block address */
1637                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1638                 /* Write lock command */
1639                 this->command(mtd, cmd, 0, 0);
1640
1641                 /* There's no return value */
1642                 this->wait(mtd, FL_LOCKING);
1643
1644                 /* Sanity check */
1645                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1646                     & ONENAND_CTRL_ONGO)
1647                         continue;
1648
1649                 /* Check lock status */
1650                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1651                 if (!(status & wp_status_mask))
1652                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1653         }
1654
1655         return 0;
1656 }
1657
1658 /**
1659  * onenand_lock - [MTD Interface] Lock block(s)
1660  * @param mtd           MTD device structure
1661  * @param ofs           offset relative to mtd start
1662  * @param len           number of bytes to unlock
1663  *
1664  * Lock one or more blocks
1665  */
1666 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1667 {
1668         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1669 }
1670
1671 /**
1672  * onenand_unlock - [MTD Interface] Unlock block(s)
1673  * @param mtd           MTD device structure
1674  * @param ofs           offset relative to mtd start
1675  * @param len           number of bytes to unlock
1676  *
1677  * Unlock one or more blocks
1678  */
1679 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1680 {
1681         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1682 }
1683
1684 /**
1685  * onenand_check_lock_status - [OneNAND Interface] Check lock status
1686  * @param this          onenand chip data structure
1687  *
1688  * Check lock status
1689  */
1690 static void onenand_check_lock_status(struct onenand_chip *this)
1691 {
1692         unsigned int value, block, status;
1693         unsigned int end;
1694
1695         end = this->chipsize >> this->erase_shift;
1696         for (block = 0; block < end; block++) {
1697                 /* Set block address */
1698                 value = onenand_block_address(this, block);
1699                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1700                 /* Select DataRAM for DDP */
1701                 value = onenand_bufferram_address(this, block);
1702                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1703                 /* Set start block address */
1704                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1705
1706                 /* Check lock status */
1707                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1708                 if (!(status & ONENAND_WP_US))
1709                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1710         }
1711 }
1712
1713 /**
1714  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1715  * @param mtd           MTD device structure
1716  *
1717  * Unlock all blocks
1718  */
1719 static int onenand_unlock_all(struct mtd_info *mtd)
1720 {
1721         struct onenand_chip *this = mtd->priv;
1722
1723         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1724                 /* Set start block address */
1725                 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1726                 /* Write unlock command */
1727                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1728
1729                 /* There's no return value */
1730                 this->wait(mtd, FL_LOCKING);
1731
1732                 /* Sanity check */
1733                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1734                     & ONENAND_CTRL_ONGO)
1735                         continue;
1736
1737                 /* Workaround for all block unlock in DDP */
1738                 if (ONENAND_IS_DDP(this)) {
1739                         /* 1st block on another chip */
1740                         loff_t ofs = this->chipsize >> 1;
1741                         size_t len = mtd->erasesize;
1742
1743                         onenand_unlock(mtd, ofs, len);
1744                 }
1745
1746                 onenand_check_lock_status(this);
1747
1748                 return 0;
1749         }
1750
1751         onenand_unlock(mtd, 0x0, this->chipsize);
1752
1753         return 0;
1754 }
1755
1756 #ifdef CONFIG_MTD_ONENAND_OTP
1757
1758 /* Interal OTP operation */
1759 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1760                 size_t *retlen, u_char *buf);
1761
1762 /**
1763  * do_otp_read - [DEFAULT] Read OTP block area
1764  * @param mtd           MTD device structure
1765  * @param from          The offset to read
1766  * @param len           number of bytes to read
1767  * @param retlen        pointer to variable to store the number of readbytes
1768  * @param buf           the databuffer to put/get data
1769  *
1770  * Read OTP block area.
1771  */
1772 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1773                 size_t *retlen, u_char *buf)
1774 {
1775         struct onenand_chip *this = mtd->priv;
1776         int ret;
1777
1778         /* Enter OTP access mode */
1779         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1780         this->wait(mtd, FL_OTPING);
1781
1782         ret = mtd->read(mtd, from, len, retlen, buf);
1783
1784         /* Exit OTP access mode */
1785         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1786         this->wait(mtd, FL_RESETING);
1787
1788         return ret;
1789 }
1790
1791 /**
1792  * do_otp_write - [DEFAULT] Write OTP block area
1793  * @param mtd           MTD device structure
1794  * @param from          The offset to write
1795  * @param len           number of bytes to write
1796  * @param retlen        pointer to variable to store the number of write bytes
1797  * @param buf           the databuffer to put/get data
1798  *
1799  * Write OTP block area.
1800  */
1801 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1802                 size_t *retlen, u_char *buf)
1803 {
1804         struct onenand_chip *this = mtd->priv;
1805         unsigned char *pbuf = buf;
1806         int ret;
1807
1808         /* Force buffer page aligned */
1809         if (len < mtd->writesize) {
1810                 memcpy(this->page_buf, buf, len);
1811                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1812                 pbuf = this->page_buf;
1813                 len = mtd->writesize;
1814         }
1815
1816         /* Enter OTP access mode */
1817         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1818         this->wait(mtd, FL_OTPING);
1819
1820         ret = mtd->write(mtd, from, len, retlen, pbuf);
1821
1822         /* Exit OTP access mode */
1823         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1824         this->wait(mtd, FL_RESETING);
1825
1826         return ret;
1827 }
1828
1829 /**
1830  * do_otp_lock - [DEFAULT] Lock OTP block area
1831  * @param mtd           MTD device structure
1832  * @param from          The offset to lock
1833  * @param len           number of bytes to lock
1834  * @param retlen        pointer to variable to store the number of lock bytes
1835  * @param buf           the databuffer to put/get data
1836  *
1837  * Lock OTP block area.
1838  */
1839 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1840                 size_t *retlen, u_char *buf)
1841 {
1842         struct onenand_chip *this = mtd->priv;
1843         int ret;
1844
1845         /* Enter OTP access mode */
1846         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1847         this->wait(mtd, FL_OTPING);
1848
1849         ret = onenand_do_write_oob(mtd, from, len, retlen, buf, MTD_OOB_PLACE);
1850
1851         /* Exit OTP access mode */
1852         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1853         this->wait(mtd, FL_RESETING);
1854
1855         return ret;
1856 }
1857
1858 /**
1859  * onenand_otp_walk - [DEFAULT] Handle OTP operation
1860  * @param mtd           MTD device structure
1861  * @param from          The offset to read/write
1862  * @param len           number of bytes to read/write
1863  * @param retlen        pointer to variable to store the number of read bytes
1864  * @param buf           the databuffer to put/get data
1865  * @param action        do given action
1866  * @param mode          specify user and factory
1867  *
1868  * Handle OTP operation.
1869  */
1870 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1871                         size_t *retlen, u_char *buf,
1872                         otp_op_t action, int mode)
1873 {
1874         struct onenand_chip *this = mtd->priv;
1875         int otp_pages;
1876         int density;
1877         int ret = 0;
1878
1879         *retlen = 0;
1880
1881         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1882         if (density < ONENAND_DEVICE_DENSITY_512Mb)
1883                 otp_pages = 20;
1884         else
1885                 otp_pages = 10;
1886
1887         if (mode == MTD_OTP_FACTORY) {
1888                 from += mtd->writesize * otp_pages;
1889                 otp_pages = 64 - otp_pages;
1890         }
1891
1892         /* Check User/Factory boundary */
1893         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1894                 return 0;
1895
1896         while (len > 0 && otp_pages > 0) {
1897                 if (!action) {  /* OTP Info functions */
1898                         struct otp_info *otpinfo;
1899
1900                         len -= sizeof(struct otp_info);
1901                         if (len <= 0)
1902                                 return -ENOSPC;
1903
1904                         otpinfo = (struct otp_info *) buf;
1905                         otpinfo->start = from;
1906                         otpinfo->length = mtd->writesize;
1907                         otpinfo->locked = 0;
1908
1909                         from += mtd->writesize;
1910                         buf += sizeof(struct otp_info);
1911                         *retlen += sizeof(struct otp_info);
1912                 } else {
1913                         size_t tmp_retlen;
1914                         int size = len;
1915
1916                         ret = action(mtd, from, len, &tmp_retlen, buf);
1917
1918                         buf += size;
1919                         len -= size;
1920                         *retlen += size;
1921
1922                         if (ret < 0)
1923                                 return ret;
1924                 }
1925                 otp_pages--;
1926         }
1927
1928         return 0;
1929 }
1930
1931 /**
1932  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1933  * @param mtd           MTD device structure
1934  * @param buf           the databuffer to put/get data
1935  * @param len           number of bytes to read
1936  *
1937  * Read factory OTP info.
1938  */
1939 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1940                         struct otp_info *buf, size_t len)
1941 {
1942         size_t retlen;
1943         int ret;
1944
1945         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1946
1947         return ret ? : retlen;
1948 }
1949
1950 /**
1951  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1952  * @param mtd           MTD device structure
1953  * @param from          The offset to read
1954  * @param len           number of bytes to read
1955  * @param retlen        pointer to variable to store the number of read bytes
1956  * @param buf           the databuffer to put/get data
1957  *
1958  * Read factory OTP area.
1959  */
1960 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1961                         size_t len, size_t *retlen, u_char *buf)
1962 {
1963         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1964 }
1965
1966 /**
1967  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1968  * @param mtd           MTD device structure
1969  * @param buf           the databuffer to put/get data
1970  * @param len           number of bytes to read
1971  *
1972  * Read user OTP info.
1973  */
1974 static int onenand_get_user_prot_info(struct mtd_info *mtd,
1975                         struct otp_info *buf, size_t len)
1976 {
1977         size_t retlen;
1978         int ret;
1979
1980         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1981
1982         return ret ? : retlen;
1983 }
1984
1985 /**
1986  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1987  * @param mtd           MTD device structure
1988  * @param from          The offset to read
1989  * @param len           number of bytes to read
1990  * @param retlen        pointer to variable to store the number of read bytes
1991  * @param buf           the databuffer to put/get data
1992  *
1993  * Read user OTP area.
1994  */
1995 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1996                         size_t len, size_t *retlen, u_char *buf)
1997 {
1998         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1999 }
2000
2001 /**
2002  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2003  * @param mtd           MTD device structure
2004  * @param from          The offset to write
2005  * @param len           number of bytes to write
2006  * @param retlen        pointer to variable to store the number of write bytes
2007  * @param buf           the databuffer to put/get data
2008  *
2009  * Write user OTP area.
2010  */
2011 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2012                         size_t len, size_t *retlen, u_char *buf)
2013 {
2014         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2015 }
2016
2017 /**
2018  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2019  * @param mtd           MTD device structure
2020  * @param from          The offset to lock
2021  * @param len           number of bytes to unlock
2022  *
2023  * Write lock mark on spare area in page 0 in OTP block
2024  */
2025 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2026                         size_t len)
2027 {
2028         unsigned char oob_buf[64];
2029         size_t retlen;
2030         int ret;
2031
2032         memset(oob_buf, 0xff, mtd->oobsize);
2033         /*
2034          * Note: OTP lock operation
2035          *       OTP block : 0xXXFC
2036          *       1st block : 0xXXF3 (If chip support)
2037          *       Both      : 0xXXF0 (If chip support)
2038          */
2039         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2040
2041         /*
2042          * Write lock mark to 8th word of sector0 of page0 of the spare0.
2043          * We write 16 bytes spare area instead of 2 bytes.
2044          */
2045         from = 0;
2046         len = 16;
2047
2048         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2049
2050         return ret ? : retlen;
2051 }
2052 #endif  /* CONFIG_MTD_ONENAND_OTP */
2053
2054 /**
2055  * onenand_check_features - Check and set OneNAND features
2056  * @param mtd           MTD data structure
2057  *
2058  * Check and set OneNAND features
2059  * - lock scheme
2060  */
2061 static void onenand_check_features(struct mtd_info *mtd)
2062 {
2063         struct onenand_chip *this = mtd->priv;
2064         unsigned int density, process;
2065
2066         /* Lock scheme depends on density and process */
2067         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2068         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2069
2070         /* Lock scheme */
2071         if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
2072                 /* A-Die has all block unlock */
2073                 if (process) {
2074                         printk(KERN_DEBUG "Chip support all block unlock\n");
2075                         this->options |= ONENAND_HAS_UNLOCK_ALL;
2076                 }
2077         } else {
2078                 /* Some OneNAND has continues lock scheme */
2079                 if (!process) {
2080                         printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
2081                         this->options |= ONENAND_HAS_CONT_LOCK;
2082                 }
2083         }
2084 }
2085
2086 /**
2087  * onenand_print_device_info - Print device ID
2088  * @param device        device ID
2089  *
2090  * Print device ID
2091  */
2092 static void onenand_print_device_info(int device, int version)
2093 {
2094         int vcc, demuxed, ddp, density;
2095
2096         vcc = device & ONENAND_DEVICE_VCC_MASK;
2097         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2098         ddp = device & ONENAND_DEVICE_IS_DDP;
2099         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
2100         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2101                 demuxed ? "" : "Muxed ",
2102                 ddp ? "(DDP)" : "",
2103                 (16 << density),
2104                 vcc ? "2.65/3.3" : "1.8",
2105                 device);
2106         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
2107 }
2108
2109 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2110         {ONENAND_MFR_SAMSUNG, "Samsung"},
2111 };
2112
2113 /**
2114  * onenand_check_maf - Check manufacturer ID
2115  * @param manuf         manufacturer ID
2116  *
2117  * Check manufacturer ID
2118  */
2119 static int onenand_check_maf(int manuf)
2120 {
2121         int size = ARRAY_SIZE(onenand_manuf_ids);
2122         char *name;
2123         int i;
2124
2125         for (i = 0; i < size; i++)
2126                 if (manuf == onenand_manuf_ids[i].id)
2127                         break;
2128
2129         if (i < size)
2130                 name = onenand_manuf_ids[i].name;
2131         else
2132                 name = "Unknown";
2133
2134         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2135
2136         return (i == size);
2137 }
2138
2139 /**
2140  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2141  * @param mtd           MTD device structure
2142  *
2143  * OneNAND detection method:
2144  *   Compare the the values from command with ones from register
2145  */
2146 static int onenand_probe(struct mtd_info *mtd)
2147 {
2148         struct onenand_chip *this = mtd->priv;
2149         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2150         int density;
2151         int syscfg;
2152
2153         /* Save system configuration 1 */
2154         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2155         /* Clear Sync. Burst Read mode to read BootRAM */
2156         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2157
2158         /* Send the command for reading device ID from BootRAM */
2159         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2160
2161         /* Read manufacturer and device IDs from BootRAM */
2162         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2163         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2164
2165         /* Reset OneNAND to read default register values */
2166         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2167         /* Wait reset */
2168         this->wait(mtd, FL_RESETING);
2169
2170         /* Restore system configuration 1 */
2171         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2172
2173         /* Check manufacturer ID */
2174         if (onenand_check_maf(bram_maf_id))
2175                 return -ENXIO;
2176
2177         /* Read manufacturer and device IDs from Register */
2178         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2179         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2180         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2181
2182         /* Check OneNAND device */
2183         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2184                 return -ENXIO;
2185
2186         /* Flash device information */
2187         onenand_print_device_info(dev_id, ver_id);
2188         this->device_id = dev_id;
2189         this->version_id = ver_id;
2190
2191         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2192         this->chipsize = (16 << density) << 20;
2193         /* Set density mask. it is used for DDP */
2194         if (ONENAND_IS_DDP(this))
2195                 this->density_mask = (1 << (density + 6));
2196         else
2197                 this->density_mask = 0;
2198
2199         /* OneNAND page size & block size */
2200         /* The data buffer size is equal to page size */
2201         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2202         mtd->oobsize = mtd->writesize >> 5;
2203         /* Pages per a block are always 64 in OneNAND */
2204         mtd->erasesize = mtd->writesize << 6;
2205
2206         this->erase_shift = ffs(mtd->erasesize) - 1;
2207         this->page_shift = ffs(mtd->writesize) - 1;
2208         this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2209
2210         /* REVIST: Multichip handling */
2211
2212         mtd->size = this->chipsize;
2213
2214         /* Check OneNAND features */
2215         onenand_check_features(mtd);
2216
2217         return 0;
2218 }
2219
2220 /**
2221  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2222  * @param mtd           MTD device structure
2223  */
2224 static int onenand_suspend(struct mtd_info *mtd)
2225 {
2226         return onenand_get_device(mtd, FL_PM_SUSPENDED);
2227 }
2228
2229 /**
2230  * onenand_resume - [MTD Interface] Resume the OneNAND flash
2231  * @param mtd           MTD device structure
2232  */
2233 static void onenand_resume(struct mtd_info *mtd)
2234 {
2235         struct onenand_chip *this = mtd->priv;
2236
2237         if (this->state == FL_PM_SUSPENDED)
2238                 onenand_release_device(mtd);
2239         else
2240                 printk(KERN_ERR "resume() called for the chip which is not"
2241                                 "in suspended state\n");
2242 }
2243
2244 /**
2245  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2246  * @param mtd           MTD device structure
2247  * @param maxchips      Number of chips to scan for
2248  *
2249  * This fills out all the not initialized function pointers
2250  * with the defaults.
2251  * The flash ID is read and the mtd/chip structures are
2252  * filled with the appropriate values.
2253  */
2254 int onenand_scan(struct mtd_info *mtd, int maxchips)
2255 {
2256         int i;
2257         struct onenand_chip *this = mtd->priv;
2258
2259         if (!this->read_word)
2260                 this->read_word = onenand_readw;
2261         if (!this->write_word)
2262                 this->write_word = onenand_writew;
2263
2264         if (!this->command)
2265                 this->command = onenand_command;
2266         if (!this->wait)
2267                 onenand_setup_wait(mtd);
2268
2269         if (!this->read_bufferram)
2270                 this->read_bufferram = onenand_read_bufferram;
2271         if (!this->write_bufferram)
2272                 this->write_bufferram = onenand_write_bufferram;
2273
2274         if (!this->block_markbad)
2275                 this->block_markbad = onenand_default_block_markbad;
2276         if (!this->scan_bbt)
2277                 this->scan_bbt = onenand_default_bbt;
2278
2279         if (onenand_probe(mtd))
2280                 return -ENXIO;
2281
2282         /* Set Sync. Burst Read after probing */
2283         if (this->mmcontrol) {
2284                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2285                 this->read_bufferram = onenand_sync_read_bufferram;
2286         }
2287
2288         /* Allocate buffers, if necessary */
2289         if (!this->page_buf) {
2290                 size_t len;
2291                 len = mtd->writesize + mtd->oobsize;
2292                 this->page_buf = kmalloc(len, GFP_KERNEL);
2293                 if (!this->page_buf) {
2294                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2295                         return -ENOMEM;
2296                 }
2297                 this->options |= ONENAND_PAGEBUF_ALLOC;
2298         }
2299
2300         this->state = FL_READY;
2301         init_waitqueue_head(&this->wq);
2302         spin_lock_init(&this->chip_lock);
2303
2304         /*
2305          * Allow subpage writes up to oobsize.
2306          */
2307         switch (mtd->oobsize) {
2308         case 64:
2309                 this->ecclayout = &onenand_oob_64;
2310                 mtd->subpage_sft = 2;
2311                 break;
2312
2313         case 32:
2314                 this->ecclayout = &onenand_oob_32;
2315                 mtd->subpage_sft = 1;
2316                 break;
2317
2318         default:
2319                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2320                         mtd->oobsize);
2321                 mtd->subpage_sft = 0;
2322                 /* To prevent kernel oops */
2323                 this->ecclayout = &onenand_oob_32;
2324                 break;
2325         }
2326
2327         this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2328
2329         /*
2330          * The number of bytes available for a client to place data into
2331          * the out of band area
2332          */
2333         this->ecclayout->oobavail = 0;
2334         for (i = 0; this->ecclayout->oobfree[i].length; i++)
2335                 this->ecclayout->oobavail +=
2336                         this->ecclayout->oobfree[i].length;
2337
2338         mtd->ecclayout = this->ecclayout;
2339
2340         /* Fill in remaining MTD driver data */
2341         mtd->type = MTD_NANDFLASH;
2342         mtd->flags = MTD_CAP_NANDFLASH;
2343         mtd->ecctype = MTD_ECC_SW;
2344         mtd->erase = onenand_erase;
2345         mtd->point = NULL;
2346         mtd->unpoint = NULL;
2347         mtd->read = onenand_read;
2348         mtd->write = onenand_write;
2349         mtd->read_oob = onenand_read_oob;
2350         mtd->write_oob = onenand_write_oob;
2351 #ifdef CONFIG_MTD_ONENAND_OTP
2352         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2353         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2354         mtd->get_user_prot_info = onenand_get_user_prot_info;
2355         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2356         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2357         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2358 #endif
2359         mtd->sync = onenand_sync;
2360         mtd->lock = onenand_lock;
2361         mtd->unlock = onenand_unlock;
2362         mtd->suspend = onenand_suspend;
2363         mtd->resume = onenand_resume;
2364         mtd->block_isbad = onenand_block_isbad;
2365         mtd->block_markbad = onenand_block_markbad;
2366         mtd->owner = THIS_MODULE;
2367
2368         /* Unlock whole block */
2369         onenand_unlock_all(mtd);
2370
2371         return this->scan_bbt(mtd);
2372 }
2373
2374 /**
2375  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2376  * @param mtd           MTD device structure
2377  */
2378 void onenand_release(struct mtd_info *mtd)
2379 {
2380         struct onenand_chip *this = mtd->priv;
2381
2382 #ifdef CONFIG_MTD_PARTITIONS
2383         /* Deregister partitions */
2384         del_mtd_partitions (mtd);
2385 #endif
2386         /* Deregister the device */
2387         del_mtd_device (mtd);
2388
2389         /* Free bad block table memory, if allocated */
2390         if (this->bbm) {
2391                 struct bbm_info *bbm = this->bbm;
2392                 kfree(bbm->bbt);
2393                 kfree(this->bbm);
2394         }
2395         /* Buffer allocated by onenand_scan */
2396         if (this->options & ONENAND_PAGEBUF_ALLOC)
2397                 kfree(this->page_buf);
2398 }
2399
2400 EXPORT_SYMBOL_GPL(onenand_scan);
2401 EXPORT_SYMBOL_GPL(onenand_release);
2402
2403 MODULE_LICENSE("GPL");
2404 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2405 MODULE_DESCRIPTION("Generic OneNAND flash driver code");