2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2007 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
8 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
9 * auto-placement support, read-while load support, various fixes
10 * Copyright (C) Nokia Corporation, 2007
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/sched.h>
21 #include <linux/interrupt.h>
22 #include <linux/jiffies.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/onenand.h>
25 #include <linux/mtd/partitions.h>
30 * onenand_oob_64 - oob info for large (2KB) page
32 static struct nand_ecclayout onenand_oob_64 = {
41 {2, 3}, {14, 2}, {18, 3}, {30, 2},
42 {34, 3}, {46, 2}, {50, 3}, {62, 2}
47 * onenand_oob_32 - oob info for middle (1KB) page
49 static struct nand_ecclayout onenand_oob_32 = {
55 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
58 static const unsigned char ffchars[] = {
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
61 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
62 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
63 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
64 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
65 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
66 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
70 * onenand_readw - [OneNAND Interface] Read OneNAND register
71 * @param addr address to read
73 * Read OneNAND register
75 static unsigned short onenand_readw(void __iomem *addr)
81 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
82 * @param value value to write
83 * @param addr address to write
85 * Write OneNAND register with value
87 static void onenand_writew(unsigned short value, void __iomem *addr)
93 * onenand_block_address - [DEFAULT] Get block address
94 * @param this onenand chip data structure
95 * @param block the block
96 * @return translated block address if DDP, otherwise same
98 * Setup Start Address 1 Register (F100h)
100 static int onenand_block_address(struct onenand_chip *this, int block)
102 /* Device Flash Core select, NAND Flash Block Address */
103 if (block & this->density_mask)
104 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
110 * onenand_bufferram_address - [DEFAULT] Get bufferram address
111 * @param this onenand chip data structure
112 * @param block the block
113 * @return set DBS value if DDP, otherwise 0
115 * Setup Start Address 2 Register (F101h) for DDP
117 static int onenand_bufferram_address(struct onenand_chip *this, int block)
119 /* Device BufferRAM Select */
120 if (block & this->density_mask)
121 return ONENAND_DDP_CHIP1;
123 return ONENAND_DDP_CHIP0;
127 * onenand_page_address - [DEFAULT] Get page address
128 * @param page the page address
129 * @param sector the sector address
130 * @return combined page and sector address
132 * Setup Start Address 8 Register (F107h)
134 static int onenand_page_address(int page, int sector)
136 /* Flash Page Address, Flash Sector Address */
139 fpa = page & ONENAND_FPA_MASK;
140 fsa = sector & ONENAND_FSA_MASK;
142 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
146 * onenand_buffer_address - [DEFAULT] Get buffer address
147 * @param dataram1 DataRAM index
148 * @param sectors the sector address
149 * @param count the number of sectors
150 * @return the start buffer value
152 * Setup Start Buffer Register (F200h)
154 static int onenand_buffer_address(int dataram1, int sectors, int count)
158 /* BufferRAM Sector Address */
159 bsa = sectors & ONENAND_BSA_MASK;
162 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
164 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
166 /* BufferRAM Sector Count */
167 bsc = count & ONENAND_BSC_MASK;
169 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
173 * onenand_command - [DEFAULT] Send command to OneNAND device
174 * @param mtd MTD device structure
175 * @param cmd the command to be sent
176 * @param addr offset to read from or write to
177 * @param len number of bytes to read or write
179 * Send command to OneNAND device. This function is used for middle/large page
180 * devices (1KB/2KB Bytes per page)
182 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
184 struct onenand_chip *this = mtd->priv;
185 int value, block, page;
187 /* Address translation */
189 case ONENAND_CMD_UNLOCK:
190 case ONENAND_CMD_LOCK:
191 case ONENAND_CMD_LOCK_TIGHT:
192 case ONENAND_CMD_UNLOCK_ALL:
197 case ONENAND_CMD_ERASE:
198 case ONENAND_CMD_BUFFERRAM:
199 case ONENAND_CMD_OTP_ACCESS:
200 block = (int) (addr >> this->erase_shift);
205 block = (int) (addr >> this->erase_shift);
206 page = (int) (addr >> this->page_shift);
208 if (ONENAND_IS_2PLANE(this)) {
209 /* Make the even block number */
211 /* Is it the odd plane? */
212 if (addr & this->writesize)
216 page &= this->page_mask;
220 /* NOTE: The setting order of the registers is very important! */
221 if (cmd == ONENAND_CMD_BUFFERRAM) {
222 /* Select DataRAM for DDP */
223 value = onenand_bufferram_address(this, block);
224 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
226 if (ONENAND_IS_2PLANE(this))
227 /* It is always BufferRAM0 */
228 ONENAND_SET_BUFFERRAM0(this);
230 /* Switch to the next data buffer */
231 ONENAND_SET_NEXT_BUFFERRAM(this);
237 /* Write 'DFS, FBA' of Flash */
238 value = onenand_block_address(this, block);
239 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
241 /* Select DataRAM for DDP */
242 value = onenand_bufferram_address(this, block);
243 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
247 /* Now we use page size operation */
248 int sectors = 4, count = 4;
252 case ONENAND_CMD_READ:
253 case ONENAND_CMD_READOOB:
254 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
258 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
259 cmd = ONENAND_CMD_2X_PROG;
260 dataram = ONENAND_CURRENT_BUFFERRAM(this);
264 /* Write 'FPA, FSA' of Flash */
265 value = onenand_page_address(page, sectors);
266 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
268 /* Write 'BSA, BSC' of DataRAM */
269 value = onenand_buffer_address(dataram, sectors, count);
270 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
273 /* Interrupt clear */
274 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
277 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
283 * onenand_wait - [DEFAULT] wait until the command is done
284 * @param mtd MTD device structure
285 * @param state state to select the max. timeout value
287 * Wait for command done. This applies to all OneNAND command
288 * Read can take up to 30us, erase up to 2ms and program up to 350us
289 * according to general OneNAND specs
291 static int onenand_wait(struct mtd_info *mtd, int state)
293 struct onenand_chip * this = mtd->priv;
294 unsigned long timeout;
295 unsigned int flags = ONENAND_INT_MASTER;
296 unsigned int interrupt = 0;
299 /* The 20 msec is enough */
300 timeout = jiffies + msecs_to_jiffies(20);
301 while (time_before(jiffies, timeout)) {
302 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
304 if (interrupt & flags)
307 if (state != FL_READING)
310 /* To get correct interrupt status in timeout case */
311 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
313 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
315 if (ctrl & ONENAND_CTRL_ERROR) {
316 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
317 if (ctrl & ONENAND_CTRL_LOCK)
318 printk(KERN_ERR "onenand_wait: it's locked error.\n");
322 if (interrupt & ONENAND_INT_READ) {
323 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
325 if (ecc & ONENAND_ECC_2BIT_ALL) {
326 printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
327 mtd->ecc_stats.failed++;
329 } else if (ecc & ONENAND_ECC_1BIT_ALL) {
330 printk(KERN_INFO "onenand_wait: correctable ECC error = 0x%04x\n", ecc);
331 mtd->ecc_stats.corrected++;
334 } else if (state == FL_READING) {
335 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
343 * onenand_interrupt - [DEFAULT] onenand interrupt handler
344 * @param irq onenand interrupt number
345 * @param dev_id interrupt data
349 static irqreturn_t onenand_interrupt(int irq, void *data)
351 struct onenand_chip *this = data;
353 /* To handle shared interrupt */
354 if (!this->complete.done)
355 complete(&this->complete);
361 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
362 * @param mtd MTD device structure
363 * @param state state to select the max. timeout value
365 * Wait for command done.
367 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
369 struct onenand_chip *this = mtd->priv;
371 wait_for_completion(&this->complete);
373 return onenand_wait(mtd, state);
377 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
378 * @param mtd MTD device structure
379 * @param state state to select the max. timeout value
381 * Try interrupt based wait (It is used one-time)
383 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
385 struct onenand_chip *this = mtd->priv;
386 unsigned long remain, timeout;
388 /* We use interrupt wait first */
389 this->wait = onenand_interrupt_wait;
391 timeout = msecs_to_jiffies(100);
392 remain = wait_for_completion_timeout(&this->complete, timeout);
394 printk(KERN_INFO "OneNAND: There's no interrupt. "
395 "We use the normal wait\n");
397 /* Release the irq */
398 free_irq(this->irq, this);
400 this->wait = onenand_wait;
403 return onenand_wait(mtd, state);
407 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
408 * @param mtd MTD device structure
410 * There's two method to wait onenand work
411 * 1. polling - read interrupt status register
412 * 2. interrupt - use the kernel interrupt method
414 static void onenand_setup_wait(struct mtd_info *mtd)
416 struct onenand_chip *this = mtd->priv;
419 init_completion(&this->complete);
421 if (this->irq <= 0) {
422 this->wait = onenand_wait;
426 if (request_irq(this->irq, &onenand_interrupt,
427 IRQF_SHARED, "onenand", this)) {
428 /* If we can't get irq, use the normal wait */
429 this->wait = onenand_wait;
433 /* Enable interrupt */
434 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
435 syscfg |= ONENAND_SYS_CFG1_IOBE;
436 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
438 this->wait = onenand_try_interrupt_wait;
442 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
443 * @param mtd MTD data structure
444 * @param area BufferRAM area
445 * @return offset given area
447 * Return BufferRAM offset given area
449 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
451 struct onenand_chip *this = mtd->priv;
453 if (ONENAND_CURRENT_BUFFERRAM(this)) {
454 /* Note: the 'this->writesize' is a real page size */
455 if (area == ONENAND_DATARAM)
456 return this->writesize;
457 if (area == ONENAND_SPARERAM)
465 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
466 * @param mtd MTD data structure
467 * @param area BufferRAM area
468 * @param buffer the databuffer to put/get data
469 * @param offset offset to read from or write to
470 * @param count number of bytes to read/write
472 * Read the BufferRAM area
474 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
475 unsigned char *buffer, int offset, size_t count)
477 struct onenand_chip *this = mtd->priv;
478 void __iomem *bufferram;
480 bufferram = this->base + area;
482 bufferram += onenand_bufferram_offset(mtd, area);
484 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
487 /* Align with word(16-bit) size */
490 /* Read word and save byte */
491 word = this->read_word(bufferram + offset + count);
492 buffer[count] = (word & 0xff);
495 memcpy(buffer, bufferram + offset, count);
501 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
502 * @param mtd MTD data structure
503 * @param area BufferRAM area
504 * @param buffer the databuffer to put/get data
505 * @param offset offset to read from or write to
506 * @param count number of bytes to read/write
508 * Read the BufferRAM area with Sync. Burst Mode
510 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
511 unsigned char *buffer, int offset, size_t count)
513 struct onenand_chip *this = mtd->priv;
514 void __iomem *bufferram;
516 bufferram = this->base + area;
518 bufferram += onenand_bufferram_offset(mtd, area);
520 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
522 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
525 /* Align with word(16-bit) size */
528 /* Read word and save byte */
529 word = this->read_word(bufferram + offset + count);
530 buffer[count] = (word & 0xff);
533 memcpy(buffer, bufferram + offset, count);
535 this->mmcontrol(mtd, 0);
541 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
542 * @param mtd MTD data structure
543 * @param area BufferRAM area
544 * @param buffer the databuffer to put/get data
545 * @param offset offset to read from or write to
546 * @param count number of bytes to read/write
548 * Write the BufferRAM area
550 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
551 const unsigned char *buffer, int offset, size_t count)
553 struct onenand_chip *this = mtd->priv;
554 void __iomem *bufferram;
556 bufferram = this->base + area;
558 bufferram += onenand_bufferram_offset(mtd, area);
560 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
564 /* Align with word(16-bit) size */
567 /* Calculate byte access offset */
568 byte_offset = offset + count;
570 /* Read word and save byte */
571 word = this->read_word(bufferram + byte_offset);
572 word = (word & ~0xff) | buffer[count];
573 this->write_word(word, bufferram + byte_offset);
576 memcpy(bufferram + offset, buffer, count);
582 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
583 * @param mtd MTD data structure
584 * @param addr address to check
585 * @return blockpage address
587 * Get blockpage address at 2x program mode
589 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
591 struct onenand_chip *this = mtd->priv;
592 int blockpage, block, page;
594 /* Calculate the even block number */
595 block = (int) (addr >> this->erase_shift) & ~1;
596 /* Is it the odd plane? */
597 if (addr & this->writesize)
599 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
600 blockpage = (block << 7) | page;
606 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
607 * @param mtd MTD data structure
608 * @param addr address to check
609 * @return 1 if there are valid data, otherwise 0
611 * Check bufferram if there is data we required
613 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
615 struct onenand_chip *this = mtd->priv;
616 int blockpage, found = 0;
619 if (ONENAND_IS_2PLANE(this))
620 blockpage = onenand_get_2x_blockpage(mtd, addr);
622 blockpage = (int) (addr >> this->page_shift);
624 /* Is there valid data? */
625 i = ONENAND_CURRENT_BUFFERRAM(this);
626 if (this->bufferram[i].blockpage == blockpage)
629 /* Check another BufferRAM */
630 i = ONENAND_NEXT_BUFFERRAM(this);
631 if (this->bufferram[i].blockpage == blockpage) {
632 ONENAND_SET_NEXT_BUFFERRAM(this);
637 if (found && ONENAND_IS_DDP(this)) {
638 /* Select DataRAM for DDP */
639 int block = (int) (addr >> this->erase_shift);
640 int value = onenand_bufferram_address(this, block);
641 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
648 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
649 * @param mtd MTD data structure
650 * @param addr address to update
651 * @param valid valid flag
653 * Update BufferRAM information
655 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
658 struct onenand_chip *this = mtd->priv;
662 if (ONENAND_IS_2PLANE(this))
663 blockpage = onenand_get_2x_blockpage(mtd, addr);
665 blockpage = (int) (addr >> this->page_shift);
667 /* Invalidate another BufferRAM */
668 i = ONENAND_NEXT_BUFFERRAM(this);
669 if (this->bufferram[i].blockpage == blockpage)
670 this->bufferram[i].blockpage = -1;
672 /* Update BufferRAM */
673 i = ONENAND_CURRENT_BUFFERRAM(this);
675 this->bufferram[i].blockpage = blockpage;
677 this->bufferram[i].blockpage = -1;
681 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
682 * @param mtd MTD data structure
683 * @param addr start address to invalidate
684 * @param len length to invalidate
686 * Invalidate BufferRAM information
688 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
691 struct onenand_chip *this = mtd->priv;
693 loff_t end_addr = addr + len;
695 /* Invalidate BufferRAM */
696 for (i = 0; i < MAX_BUFFERRAM; i++) {
697 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
698 if (buf_addr >= addr && buf_addr < end_addr)
699 this->bufferram[i].blockpage = -1;
704 * onenand_get_device - [GENERIC] Get chip for selected access
705 * @param mtd MTD device structure
706 * @param new_state the state which is requested
708 * Get the device and lock it for exclusive access
710 static int onenand_get_device(struct mtd_info *mtd, int new_state)
712 struct onenand_chip *this = mtd->priv;
713 DECLARE_WAITQUEUE(wait, current);
716 * Grab the lock and see if the device is available
719 spin_lock(&this->chip_lock);
720 if (this->state == FL_READY) {
721 this->state = new_state;
722 spin_unlock(&this->chip_lock);
725 if (new_state == FL_PM_SUSPENDED) {
726 spin_unlock(&this->chip_lock);
727 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
729 set_current_state(TASK_UNINTERRUPTIBLE);
730 add_wait_queue(&this->wq, &wait);
731 spin_unlock(&this->chip_lock);
733 remove_wait_queue(&this->wq, &wait);
740 * onenand_release_device - [GENERIC] release chip
741 * @param mtd MTD device structure
743 * Deselect, release chip lock and wake up anyone waiting on the device
745 static void onenand_release_device(struct mtd_info *mtd)
747 struct onenand_chip *this = mtd->priv;
749 /* Release the chip */
750 spin_lock(&this->chip_lock);
751 this->state = FL_READY;
753 spin_unlock(&this->chip_lock);
757 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
758 * @param mtd MTD device structure
759 * @param buf destination address
760 * @param column oob offset to read from
761 * @param thislen oob length to read
763 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
766 struct onenand_chip *this = mtd->priv;
767 struct nand_oobfree *free;
768 int readcol = column;
769 int readend = column + thislen;
772 uint8_t *oob_buf = this->oob_buf;
774 free = this->ecclayout->oobfree;
775 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
776 if (readcol >= lastgap)
777 readcol += free->offset - lastgap;
778 if (readend >= lastgap)
779 readend += free->offset - lastgap;
780 lastgap = free->offset + free->length;
782 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
783 free = this->ecclayout->oobfree;
784 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
785 int free_end = free->offset + free->length;
786 if (free->offset < readend && free_end > readcol) {
787 int st = max_t(int,free->offset,readcol);
788 int ed = min_t(int,free_end,readend);
790 memcpy(buf, oob_buf + st, n);
792 } else if (column == 0)
799 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
800 * @param mtd MTD device structure
801 * @param from offset to read from
802 * @param ops: oob operation description structure
804 * OneNAND read main and/or out-of-band data
806 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
807 struct mtd_oob_ops *ops)
809 struct onenand_chip *this = mtd->priv;
810 struct mtd_ecc_stats stats;
811 size_t len = ops->len;
812 size_t ooblen = ops->ooblen;
813 u_char *buf = ops->datbuf;
814 u_char *oobbuf = ops->oobbuf;
815 int read = 0, column, thislen;
816 int oobread = 0, oobcolumn, thisooblen, oobsize;
817 int ret = 0, boundary = 0;
818 int writesize = this->writesize;
820 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
822 if (ops->mode == MTD_OOB_AUTO)
823 oobsize = this->ecclayout->oobavail;
825 oobsize = mtd->oobsize;
827 oobcolumn = from & (mtd->oobsize - 1);
829 /* Do not allow reads past end of device */
830 if ((from + len) > mtd->size) {
831 printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n");
837 stats = mtd->ecc_stats;
839 /* Read-while-load method */
841 /* Do first load to bufferRAM */
843 if (!onenand_check_bufferram(mtd, from)) {
844 this->command(mtd, ONENAND_CMD_READ, from, writesize);
845 ret = this->wait(mtd, FL_READING);
846 onenand_update_bufferram(mtd, from, !ret);
852 thislen = min_t(int, writesize, len - read);
853 column = from & (writesize - 1);
854 if (column + thislen > writesize)
855 thislen = writesize - column;
858 /* If there is more to load then start next load */
860 if (read + thislen < len) {
861 this->command(mtd, ONENAND_CMD_READ, from, writesize);
863 * Chip boundary handling in DDP
864 * Now we issued chip 1 read and pointed chip 1
865 * bufferam so we have to point chip 0 bufferam.
867 if (ONENAND_IS_DDP(this) &&
868 unlikely(from == (this->chipsize >> 1))) {
869 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
873 ONENAND_SET_PREV_BUFFERRAM(this);
875 /* While load is going, read from last bufferRAM */
876 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
878 /* Read oob area if needed */
880 thisooblen = oobsize - oobcolumn;
881 thisooblen = min_t(int, thisooblen, ooblen - oobread);
883 if (ops->mode == MTD_OOB_AUTO)
884 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
886 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
887 oobread += thisooblen;
888 oobbuf += thisooblen;
892 /* See if we are done */
896 /* Set up for next read from bufferRAM */
897 if (unlikely(boundary))
898 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
899 ONENAND_SET_NEXT_BUFFERRAM(this);
901 thislen = min_t(int, writesize, len - read);
904 /* Now wait for load */
905 ret = this->wait(mtd, FL_READING);
906 onenand_update_bufferram(mtd, from, !ret);
912 * Return success, if no ECC failures, else -EBADMSG
913 * fs driver will take care of that, because
914 * retlen == desired len and result == -EBADMSG
917 ops->oobretlen = oobread;
922 if (mtd->ecc_stats.failed - stats.failed)
925 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
929 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
930 * @param mtd MTD device structure
931 * @param from offset to read from
932 * @param ops: oob operation description structure
934 * OneNAND read out-of-band data from the spare area
936 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
937 struct mtd_oob_ops *ops)
939 struct onenand_chip *this = mtd->priv;
940 struct mtd_ecc_stats stats;
941 int read = 0, thislen, column, oobsize;
942 size_t len = ops->ooblen;
943 mtd_oob_mode_t mode = ops->mode;
944 u_char *buf = ops->oobbuf;
947 from += ops->ooboffs;
949 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
951 /* Initialize return length value */
954 if (mode == MTD_OOB_AUTO)
955 oobsize = this->ecclayout->oobavail;
957 oobsize = mtd->oobsize;
959 column = from & (mtd->oobsize - 1);
961 if (unlikely(column >= oobsize)) {
962 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n");
966 /* Do not allow reads past end of device */
967 if (unlikely(from >= mtd->size ||
968 column + len > ((mtd->size >> this->page_shift) -
969 (from >> this->page_shift)) * oobsize)) {
970 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n");
974 stats = mtd->ecc_stats;
979 thislen = oobsize - column;
980 thislen = min_t(int, thislen, len);
982 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
984 onenand_update_bufferram(mtd, from, 0);
986 ret = this->wait(mtd, FL_READING);
987 if (ret && ret != -EBADMSG) {
988 printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret);
992 if (mode == MTD_OOB_AUTO)
993 onenand_transfer_auto_oob(mtd, buf, column, thislen);
995 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1007 from += mtd->writesize;
1012 ops->oobretlen = read;
1017 if (mtd->ecc_stats.failed - stats.failed)
1024 * onenand_read - [MTD Interface] Read data from flash
1025 * @param mtd MTD device structure
1026 * @param from offset to read from
1027 * @param len number of bytes to read
1028 * @param retlen pointer to variable to store the number of read bytes
1029 * @param buf the databuffer to put data
1033 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1034 size_t *retlen, u_char *buf)
1036 struct mtd_oob_ops ops = {
1044 onenand_get_device(mtd, FL_READING);
1045 ret = onenand_read_ops_nolock(mtd, from, &ops);
1046 onenand_release_device(mtd);
1048 *retlen = ops.retlen;
1053 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1054 * @param mtd: MTD device structure
1055 * @param from: offset to read from
1056 * @param ops: oob operation description structure
1058 * Read main and/or out-of-band
1060 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1061 struct mtd_oob_ops *ops)
1065 switch (ops->mode) {
1070 /* Not implemented yet */
1075 onenand_get_device(mtd, FL_READING);
1077 ret = onenand_read_ops_nolock(mtd, from, ops);
1079 ret = onenand_read_oob_nolock(mtd, from, ops);
1080 onenand_release_device(mtd);
1086 * onenand_bbt_wait - [DEFAULT] wait until the command is done
1087 * @param mtd MTD device structure
1088 * @param state state to select the max. timeout value
1090 * Wait for command done.
1092 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1094 struct onenand_chip *this = mtd->priv;
1095 unsigned long timeout;
1096 unsigned int interrupt;
1099 /* The 20 msec is enough */
1100 timeout = jiffies + msecs_to_jiffies(20);
1101 while (time_before(jiffies, timeout)) {
1102 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1103 if (interrupt & ONENAND_INT_MASTER)
1106 /* To get correct interrupt status in timeout case */
1107 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1108 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1110 if (ctrl & ONENAND_CTRL_ERROR) {
1111 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
1112 /* Initial bad block case */
1113 if (ctrl & ONENAND_CTRL_LOAD)
1114 return ONENAND_BBT_READ_ERROR;
1115 return ONENAND_BBT_READ_FATAL_ERROR;
1118 if (interrupt & ONENAND_INT_READ) {
1119 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
1120 if (ecc & ONENAND_ECC_2BIT_ALL)
1121 return ONENAND_BBT_READ_ERROR;
1123 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1124 "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1125 return ONENAND_BBT_READ_FATAL_ERROR;
1132 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1133 * @param mtd MTD device structure
1134 * @param from offset to read from
1135 * @param ops oob operation description structure
1137 * OneNAND read out-of-band data from the spare area for bbt scan
1139 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1140 struct mtd_oob_ops *ops)
1142 struct onenand_chip *this = mtd->priv;
1143 int read = 0, thislen, column;
1145 size_t len = ops->ooblen;
1146 u_char *buf = ops->oobbuf;
1148 DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1150 /* Initialize return value */
1153 /* Do not allow reads past end of device */
1154 if (unlikely((from + len) > mtd->size)) {
1155 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1156 return ONENAND_BBT_READ_FATAL_ERROR;
1159 /* Grab the lock and see if the device is available */
1160 onenand_get_device(mtd, FL_READING);
1162 column = from & (mtd->oobsize - 1);
1164 while (read < len) {
1167 thislen = mtd->oobsize - column;
1168 thislen = min_t(int, thislen, len);
1170 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1172 onenand_update_bufferram(mtd, from, 0);
1174 ret = onenand_bbt_wait(mtd, FL_READING);
1178 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1187 /* Update Page size */
1188 from += this->writesize;
1193 /* Deselect and wake up anyone waiting on the device */
1194 onenand_release_device(mtd);
1196 ops->oobretlen = read;
1200 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1202 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1203 * @param mtd MTD device structure
1204 * @param buf the databuffer to verify
1205 * @param to offset to read from
1207 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1209 struct onenand_chip *this = mtd->priv;
1213 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1214 onenand_update_bufferram(mtd, to, 0);
1215 status = this->wait(mtd, FL_READING);
1219 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1220 for (i = 0; i < mtd->oobsize; i++)
1221 if (buf[i] != 0xFF && buf[i] != oobbuf[i])
1228 * onenand_verify - [GENERIC] verify the chip contents after a write
1229 * @param mtd MTD device structure
1230 * @param buf the databuffer to verify
1231 * @param addr offset to read from
1232 * @param len number of bytes to read and compare
1234 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1236 struct onenand_chip *this = mtd->priv;
1237 void __iomem *dataram;
1239 int thislen, column;
1242 thislen = min_t(int, this->writesize, len);
1243 column = addr & (this->writesize - 1);
1244 if (column + thislen > this->writesize)
1245 thislen = this->writesize - column;
1247 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1249 onenand_update_bufferram(mtd, addr, 0);
1251 ret = this->wait(mtd, FL_READING);
1255 onenand_update_bufferram(mtd, addr, 1);
1257 dataram = this->base + ONENAND_DATARAM;
1258 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1260 if (memcmp(buf, dataram + column, thislen))
1271 #define onenand_verify(...) (0)
1272 #define onenand_verify_oob(...) (0)
1275 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
1278 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1279 * @param mtd MTD device structure
1280 * @param oob_buf oob buffer
1281 * @param buf source address
1282 * @param column oob offset to write to
1283 * @param thislen oob length to write
1285 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1286 const u_char *buf, int column, int thislen)
1288 struct onenand_chip *this = mtd->priv;
1289 struct nand_oobfree *free;
1290 int writecol = column;
1291 int writeend = column + thislen;
1295 free = this->ecclayout->oobfree;
1296 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1297 if (writecol >= lastgap)
1298 writecol += free->offset - lastgap;
1299 if (writeend >= lastgap)
1300 writeend += free->offset - lastgap;
1301 lastgap = free->offset + free->length;
1303 free = this->ecclayout->oobfree;
1304 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1305 int free_end = free->offset + free->length;
1306 if (free->offset < writeend && free_end > writecol) {
1307 int st = max_t(int,free->offset,writecol);
1308 int ed = min_t(int,free_end,writeend);
1310 memcpy(oob_buf + st, buf, n);
1312 } else if (column == 0)
1319 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1320 * @param mtd MTD device structure
1321 * @param to offset to write to
1322 * @param ops oob operation description structure
1324 * Write main and/or oob with ECC
1326 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1327 struct mtd_oob_ops *ops)
1329 struct onenand_chip *this = mtd->priv;
1330 int written = 0, column, thislen, subpage;
1331 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1332 size_t len = ops->len;
1333 size_t ooblen = ops->ooblen;
1334 const u_char *buf = ops->datbuf;
1335 const u_char *oob = ops->oobbuf;
1339 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1341 /* Initialize retlen, in case of early exit */
1345 /* Do not allow writes past end of device */
1346 if (unlikely((to + len) > mtd->size)) {
1347 printk(KERN_ERR "onenand_write_ops_nolock: Attempt write to past end of device\n");
1351 /* Reject writes, which are not page aligned */
1352 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1353 printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n");
1357 if (ops->mode == MTD_OOB_AUTO)
1358 oobsize = this->ecclayout->oobavail;
1360 oobsize = mtd->oobsize;
1362 oobcolumn = to & (mtd->oobsize - 1);
1364 column = to & (mtd->writesize - 1);
1366 /* Loop until all data write */
1367 while (written < len) {
1368 u_char *wbuf = (u_char *) buf;
1370 thislen = min_t(int, mtd->writesize - column, len - written);
1371 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1375 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1377 /* Partial page write */
1378 subpage = thislen < mtd->writesize;
1380 memset(this->page_buf, 0xff, mtd->writesize);
1381 memcpy(this->page_buf + column, buf, thislen);
1382 wbuf = this->page_buf;
1385 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1388 oobbuf = this->oob_buf;
1390 /* We send data to spare ram with oobsize
1391 * to prevent byte access */
1392 memset(oobbuf, 0xff, mtd->oobsize);
1393 if (ops->mode == MTD_OOB_AUTO)
1394 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1396 memcpy(oobbuf + oobcolumn, oob, thisooblen);
1398 oobwritten += thisooblen;
1402 oobbuf = (u_char *) ffchars;
1404 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1406 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1408 ret = this->wait(mtd, FL_WRITING);
1410 /* In partial page write we don't update bufferram */
1411 onenand_update_bufferram(mtd, to, !ret && !subpage);
1412 if (ONENAND_IS_2PLANE(this)) {
1413 ONENAND_SET_BUFFERRAM1(this);
1414 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1418 printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret);
1422 /* Only check verify write turn on */
1423 ret = onenand_verify(mtd, buf, to, thislen);
1425 printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
1439 ops->retlen = written;
1446 * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
1447 * @param mtd MTD device structure
1448 * @param to offset to write to
1449 * @param len number of bytes to write
1450 * @param retlen pointer to variable to store the number of written bytes
1451 * @param buf the data to write
1452 * @param mode operation mode
1454 * OneNAND write out-of-band
1456 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
1457 struct mtd_oob_ops *ops)
1459 struct onenand_chip *this = mtd->priv;
1460 int column, ret = 0, oobsize;
1463 size_t len = ops->ooblen;
1464 const u_char *buf = ops->oobbuf;
1465 mtd_oob_mode_t mode = ops->mode;
1469 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1471 /* Initialize retlen, in case of early exit */
1474 if (mode == MTD_OOB_AUTO)
1475 oobsize = this->ecclayout->oobavail;
1477 oobsize = mtd->oobsize;
1479 column = to & (mtd->oobsize - 1);
1481 if (unlikely(column >= oobsize)) {
1482 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n");
1486 /* For compatibility with NAND: Do not allow write past end of page */
1487 if (unlikely(column + len > oobsize)) {
1488 printk(KERN_ERR "onenand_write_oob_nolock: "
1489 "Attempt to write past end of page\n");
1493 /* Do not allow reads past end of device */
1494 if (unlikely(to >= mtd->size ||
1495 column + len > ((mtd->size >> this->page_shift) -
1496 (to >> this->page_shift)) * oobsize)) {
1497 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n");
1501 oobbuf = this->oob_buf;
1503 /* Loop until all data write */
1504 while (written < len) {
1505 int thislen = min_t(int, oobsize, len - written);
1509 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1511 /* We send data to spare ram with oobsize
1512 * to prevent byte access */
1513 memset(oobbuf, 0xff, mtd->oobsize);
1514 if (mode == MTD_OOB_AUTO)
1515 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1517 memcpy(oobbuf + column, buf, thislen);
1518 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1520 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1522 onenand_update_bufferram(mtd, to, 0);
1523 if (ONENAND_IS_2PLANE(this)) {
1524 ONENAND_SET_BUFFERRAM1(this);
1525 onenand_update_bufferram(mtd, to + this->writesize, 0);
1528 ret = this->wait(mtd, FL_WRITING);
1530 printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret);
1534 ret = onenand_verify_oob(mtd, oobbuf, to);
1536 printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret);
1544 to += mtd->writesize;
1549 ops->oobretlen = written;
1555 * onenand_write - [MTD Interface] write buffer to FLASH
1556 * @param mtd MTD device structure
1557 * @param to offset to write to
1558 * @param len number of bytes to write
1559 * @param retlen pointer to variable to store the number of written bytes
1560 * @param buf the data to write
1564 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1565 size_t *retlen, const u_char *buf)
1567 struct mtd_oob_ops ops = {
1570 .datbuf = (u_char *) buf,
1575 onenand_get_device(mtd, FL_WRITING);
1576 ret = onenand_write_ops_nolock(mtd, to, &ops);
1577 onenand_release_device(mtd);
1579 *retlen = ops.retlen;
1584 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1585 * @param mtd: MTD device structure
1586 * @param to: offset to write
1587 * @param ops: oob operation description structure
1589 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1590 struct mtd_oob_ops *ops)
1594 switch (ops->mode) {
1599 /* Not implemented yet */
1604 onenand_get_device(mtd, FL_WRITING);
1606 ret = onenand_write_ops_nolock(mtd, to, ops);
1608 ret = onenand_write_oob_nolock(mtd, to, ops);
1609 onenand_release_device(mtd);
1615 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
1616 * @param mtd MTD device structure
1617 * @param ofs offset from device start
1618 * @param allowbbt 1, if its allowed to access the bbt area
1620 * Check, if the block is bad. Either by reading the bad block table or
1621 * calling of the scan function.
1623 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
1625 struct onenand_chip *this = mtd->priv;
1626 struct bbm_info *bbm = this->bbm;
1628 /* Return info from the table */
1629 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1633 * onenand_erase - [MTD Interface] erase block(s)
1634 * @param mtd MTD device structure
1635 * @param instr erase instruction
1637 * Erase one ore more blocks
1639 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1641 struct onenand_chip *this = mtd->priv;
1642 unsigned int block_size;
1647 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1649 block_size = (1 << this->erase_shift);
1651 /* Start address must align on block boundary */
1652 if (unlikely(instr->addr & (block_size - 1))) {
1653 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1657 /* Length must align on block boundary */
1658 if (unlikely(instr->len & (block_size - 1))) {
1659 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1663 /* Do not allow erase past end of device */
1664 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1665 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1669 instr->fail_addr = 0xffffffff;
1671 /* Grab the lock and see if the device is available */
1672 onenand_get_device(mtd, FL_ERASING);
1674 /* Loop throught the pages */
1678 instr->state = MTD_ERASING;
1683 /* Check if we have a bad block, we do not erase bad blocks */
1684 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
1685 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1686 instr->state = MTD_ERASE_FAILED;
1690 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1692 onenand_invalidate_bufferram(mtd, addr, block_size);
1694 ret = this->wait(mtd, FL_ERASING);
1695 /* Check, if it is write protected */
1697 printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1698 instr->state = MTD_ERASE_FAILED;
1699 instr->fail_addr = addr;
1707 instr->state = MTD_ERASE_DONE;
1711 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1713 /* Deselect and wake up anyone waiting on the device */
1714 onenand_release_device(mtd);
1716 /* Do call back function */
1718 mtd_erase_callback(instr);
1724 * onenand_sync - [MTD Interface] sync
1725 * @param mtd MTD device structure
1727 * Sync is actually a wait for chip ready function
1729 static void onenand_sync(struct mtd_info *mtd)
1731 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1733 /* Grab the lock and see if the device is available */
1734 onenand_get_device(mtd, FL_SYNCING);
1736 /* Release it and go back */
1737 onenand_release_device(mtd);
1741 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1742 * @param mtd MTD device structure
1743 * @param ofs offset relative to mtd start
1745 * Check whether the block is bad
1747 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1751 /* Check for invalid offset */
1752 if (ofs > mtd->size)
1755 onenand_get_device(mtd, FL_READING);
1756 ret = onenand_block_isbad_nolock(mtd, ofs, 0);
1757 onenand_release_device(mtd);
1762 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1763 * @param mtd MTD device structure
1764 * @param ofs offset from device start
1766 * This is the default implementation, which can be overridden by
1767 * a hardware specific driver.
1769 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1771 struct onenand_chip *this = mtd->priv;
1772 struct bbm_info *bbm = this->bbm;
1773 u_char buf[2] = {0, 0};
1774 struct mtd_oob_ops ops = {
1775 .mode = MTD_OOB_PLACE,
1782 /* Get block number */
1783 block = ((int) ofs) >> bbm->bbt_erase_shift;
1785 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1787 /* We write two bytes, so we dont have to mess with 16 bit access */
1788 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1789 return onenand_write_oob_nolock(mtd, ofs, &ops);
1793 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1794 * @param mtd MTD device structure
1795 * @param ofs offset relative to mtd start
1797 * Mark the block as bad
1799 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1801 struct onenand_chip *this = mtd->priv;
1804 ret = onenand_block_isbad(mtd, ofs);
1806 /* If it was bad already, return success and do nothing */
1812 onenand_get_device(mtd, FL_WRITING);
1813 ret = this->block_markbad(mtd, ofs);
1814 onenand_release_device(mtd);
1819 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1820 * @param mtd MTD device structure
1821 * @param ofs offset relative to mtd start
1822 * @param len number of bytes to lock or unlock
1823 * @param cmd lock or unlock command
1825 * Lock or unlock one or more blocks
1827 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1829 struct onenand_chip *this = mtd->priv;
1830 int start, end, block, value, status;
1833 start = ofs >> this->erase_shift;
1834 end = len >> this->erase_shift;
1836 if (cmd == ONENAND_CMD_LOCK)
1837 wp_status_mask = ONENAND_WP_LS;
1839 wp_status_mask = ONENAND_WP_US;
1841 /* Continuous lock scheme */
1842 if (this->options & ONENAND_HAS_CONT_LOCK) {
1843 /* Set start block address */
1844 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1845 /* Set end block address */
1846 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1847 /* Write lock command */
1848 this->command(mtd, cmd, 0, 0);
1850 /* There's no return value */
1851 this->wait(mtd, FL_LOCKING);
1854 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1855 & ONENAND_CTRL_ONGO)
1858 /* Check lock status */
1859 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1860 if (!(status & wp_status_mask))
1861 printk(KERN_ERR "wp status = 0x%x\n", status);
1866 /* Block lock scheme */
1867 for (block = start; block < start + end; block++) {
1868 /* Set block address */
1869 value = onenand_block_address(this, block);
1870 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1871 /* Select DataRAM for DDP */
1872 value = onenand_bufferram_address(this, block);
1873 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1874 /* Set start block address */
1875 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1876 /* Write lock command */
1877 this->command(mtd, cmd, 0, 0);
1879 /* There's no return value */
1880 this->wait(mtd, FL_LOCKING);
1883 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1884 & ONENAND_CTRL_ONGO)
1887 /* Check lock status */
1888 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1889 if (!(status & wp_status_mask))
1890 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1897 * onenand_lock - [MTD Interface] Lock block(s)
1898 * @param mtd MTD device structure
1899 * @param ofs offset relative to mtd start
1900 * @param len number of bytes to unlock
1902 * Lock one or more blocks
1904 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1908 onenand_get_device(mtd, FL_LOCKING);
1909 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1910 onenand_release_device(mtd);
1915 * onenand_unlock - [MTD Interface] Unlock block(s)
1916 * @param mtd MTD device structure
1917 * @param ofs offset relative to mtd start
1918 * @param len number of bytes to unlock
1920 * Unlock one or more blocks
1922 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1926 onenand_get_device(mtd, FL_LOCKING);
1927 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1928 onenand_release_device(mtd);
1933 * onenand_check_lock_status - [OneNAND Interface] Check lock status
1934 * @param this onenand chip data structure
1938 static void onenand_check_lock_status(struct onenand_chip *this)
1940 unsigned int value, block, status;
1943 end = this->chipsize >> this->erase_shift;
1944 for (block = 0; block < end; block++) {
1945 /* Set block address */
1946 value = onenand_block_address(this, block);
1947 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1948 /* Select DataRAM for DDP */
1949 value = onenand_bufferram_address(this, block);
1950 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1951 /* Set start block address */
1952 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1954 /* Check lock status */
1955 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1956 if (!(status & ONENAND_WP_US))
1957 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1962 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1963 * @param mtd MTD device structure
1967 static int onenand_unlock_all(struct mtd_info *mtd)
1969 struct onenand_chip *this = mtd->priv;
1971 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1972 /* Set start block address */
1973 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1974 /* Write unlock command */
1975 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1977 /* There's no return value */
1978 this->wait(mtd, FL_LOCKING);
1981 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1982 & ONENAND_CTRL_ONGO)
1985 /* Workaround for all block unlock in DDP */
1986 if (ONENAND_IS_DDP(this)) {
1987 /* 1st block on another chip */
1988 loff_t ofs = this->chipsize >> 1;
1989 size_t len = mtd->erasesize;
1991 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1994 onenand_check_lock_status(this);
1999 onenand_do_lock_cmd(mtd, 0x0, this->chipsize, ONENAND_CMD_UNLOCK);
2004 #ifdef CONFIG_MTD_ONENAND_OTP
2006 /* Interal OTP operation */
2007 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
2008 size_t *retlen, u_char *buf);
2011 * do_otp_read - [DEFAULT] Read OTP block area
2012 * @param mtd MTD device structure
2013 * @param from The offset to read
2014 * @param len number of bytes to read
2015 * @param retlen pointer to variable to store the number of readbytes
2016 * @param buf the databuffer to put/get data
2018 * Read OTP block area.
2020 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
2021 size_t *retlen, u_char *buf)
2023 struct onenand_chip *this = mtd->priv;
2024 struct mtd_oob_ops ops = {
2032 /* Enter OTP access mode */
2033 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2034 this->wait(mtd, FL_OTPING);
2036 ret = onenand_read_ops_nolock(mtd, from, &ops);
2038 /* Exit OTP access mode */
2039 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2040 this->wait(mtd, FL_RESETING);
2046 * do_otp_write - [DEFAULT] Write OTP block area
2047 * @param mtd MTD device structure
2048 * @param to The offset to write
2049 * @param len number of bytes to write
2050 * @param retlen pointer to variable to store the number of write bytes
2051 * @param buf the databuffer to put/get data
2053 * Write OTP block area.
2055 static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
2056 size_t *retlen, u_char *buf)
2058 struct onenand_chip *this = mtd->priv;
2059 unsigned char *pbuf = buf;
2061 struct mtd_oob_ops ops;
2063 /* Force buffer page aligned */
2064 if (len < mtd->writesize) {
2065 memcpy(this->page_buf, buf, len);
2066 memset(this->page_buf + len, 0xff, mtd->writesize - len);
2067 pbuf = this->page_buf;
2068 len = mtd->writesize;
2071 /* Enter OTP access mode */
2072 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2073 this->wait(mtd, FL_OTPING);
2079 ret = onenand_write_ops_nolock(mtd, to, &ops);
2080 *retlen = ops.retlen;
2082 /* Exit OTP access mode */
2083 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2084 this->wait(mtd, FL_RESETING);
2090 * do_otp_lock - [DEFAULT] Lock OTP block area
2091 * @param mtd MTD device structure
2092 * @param from The offset to lock
2093 * @param len number of bytes to lock
2094 * @param retlen pointer to variable to store the number of lock bytes
2095 * @param buf the databuffer to put/get data
2097 * Lock OTP block area.
2099 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
2100 size_t *retlen, u_char *buf)
2102 struct onenand_chip *this = mtd->priv;
2103 struct mtd_oob_ops ops = {
2104 .mode = MTD_OOB_PLACE,
2111 /* Enter OTP access mode */
2112 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2113 this->wait(mtd, FL_OTPING);
2115 ret = onenand_write_oob_nolock(mtd, from, &ops);
2117 *retlen = ops.oobretlen;
2119 /* Exit OTP access mode */
2120 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2121 this->wait(mtd, FL_RESETING);
2127 * onenand_otp_walk - [DEFAULT] Handle OTP operation
2128 * @param mtd MTD device structure
2129 * @param from The offset to read/write
2130 * @param len number of bytes to read/write
2131 * @param retlen pointer to variable to store the number of read bytes
2132 * @param buf the databuffer to put/get data
2133 * @param action do given action
2134 * @param mode specify user and factory
2136 * Handle OTP operation.
2138 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2139 size_t *retlen, u_char *buf,
2140 otp_op_t action, int mode)
2142 struct onenand_chip *this = mtd->priv;
2149 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2150 if (density < ONENAND_DEVICE_DENSITY_512Mb)
2155 if (mode == MTD_OTP_FACTORY) {
2156 from += mtd->writesize * otp_pages;
2157 otp_pages = 64 - otp_pages;
2160 /* Check User/Factory boundary */
2161 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
2164 onenand_get_device(mtd, FL_OTPING);
2165 while (len > 0 && otp_pages > 0) {
2166 if (!action) { /* OTP Info functions */
2167 struct otp_info *otpinfo;
2169 len -= sizeof(struct otp_info);
2175 otpinfo = (struct otp_info *) buf;
2176 otpinfo->start = from;
2177 otpinfo->length = mtd->writesize;
2178 otpinfo->locked = 0;
2180 from += mtd->writesize;
2181 buf += sizeof(struct otp_info);
2182 *retlen += sizeof(struct otp_info);
2187 ret = action(mtd, from, len, &tmp_retlen, buf);
2198 onenand_release_device(mtd);
2204 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
2205 * @param mtd MTD device structure
2206 * @param buf the databuffer to put/get data
2207 * @param len number of bytes to read
2209 * Read factory OTP info.
2211 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
2212 struct otp_info *buf, size_t len)
2217 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
2219 return ret ? : retlen;
2223 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
2224 * @param mtd MTD device structure
2225 * @param from The offset to read
2226 * @param len number of bytes to read
2227 * @param retlen pointer to variable to store the number of read bytes
2228 * @param buf the databuffer to put/get data
2230 * Read factory OTP area.
2232 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2233 size_t len, size_t *retlen, u_char *buf)
2235 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
2239 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2240 * @param mtd MTD device structure
2241 * @param buf the databuffer to put/get data
2242 * @param len number of bytes to read
2244 * Read user OTP info.
2246 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2247 struct otp_info *buf, size_t len)
2252 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2254 return ret ? : retlen;
2258 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2259 * @param mtd MTD device structure
2260 * @param from The offset to read
2261 * @param len number of bytes to read
2262 * @param retlen pointer to variable to store the number of read bytes
2263 * @param buf the databuffer to put/get data
2265 * Read user OTP area.
2267 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2268 size_t len, size_t *retlen, u_char *buf)
2270 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2274 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2275 * @param mtd MTD device structure
2276 * @param from The offset to write
2277 * @param len number of bytes to write
2278 * @param retlen pointer to variable to store the number of write bytes
2279 * @param buf the databuffer to put/get data
2281 * Write user OTP area.
2283 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2284 size_t len, size_t *retlen, u_char *buf)
2286 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2290 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2291 * @param mtd MTD device structure
2292 * @param from The offset to lock
2293 * @param len number of bytes to unlock
2295 * Write lock mark on spare area in page 0 in OTP block
2297 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2300 unsigned char oob_buf[64];
2304 memset(oob_buf, 0xff, mtd->oobsize);
2306 * Note: OTP lock operation
2307 * OTP block : 0xXXFC
2308 * 1st block : 0xXXF3 (If chip support)
2309 * Both : 0xXXF0 (If chip support)
2311 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2314 * Write lock mark to 8th word of sector0 of page0 of the spare0.
2315 * We write 16 bytes spare area instead of 2 bytes.
2320 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2322 return ret ? : retlen;
2324 #endif /* CONFIG_MTD_ONENAND_OTP */
2327 * onenand_check_features - Check and set OneNAND features
2328 * @param mtd MTD data structure
2330 * Check and set OneNAND features
2334 static void onenand_check_features(struct mtd_info *mtd)
2336 struct onenand_chip *this = mtd->priv;
2337 unsigned int density, process;
2339 /* Lock scheme depends on density and process */
2340 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2341 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2345 case ONENAND_DEVICE_DENSITY_4Gb:
2346 this->options |= ONENAND_HAS_2PLANE;
2348 case ONENAND_DEVICE_DENSITY_2Gb:
2349 /* 2Gb DDP don't have 2 plane */
2350 if (!ONENAND_IS_DDP(this))
2351 this->options |= ONENAND_HAS_2PLANE;
2352 this->options |= ONENAND_HAS_UNLOCK_ALL;
2354 case ONENAND_DEVICE_DENSITY_1Gb:
2355 /* A-Die has all block unlock */
2357 this->options |= ONENAND_HAS_UNLOCK_ALL;
2361 /* Some OneNAND has continuous lock scheme */
2363 this->options |= ONENAND_HAS_CONT_LOCK;
2367 if (this->options & ONENAND_HAS_CONT_LOCK)
2368 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
2369 if (this->options & ONENAND_HAS_UNLOCK_ALL)
2370 printk(KERN_DEBUG "Chip support all block unlock\n");
2371 if (this->options & ONENAND_HAS_2PLANE)
2372 printk(KERN_DEBUG "Chip has 2 plane\n");
2376 * onenand_print_device_info - Print device & version ID
2377 * @param device device ID
2378 * @param version version ID
2380 * Print device & version ID
2382 static void onenand_print_device_info(int device, int version)
2384 int vcc, demuxed, ddp, density;
2386 vcc = device & ONENAND_DEVICE_VCC_MASK;
2387 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2388 ddp = device & ONENAND_DEVICE_IS_DDP;
2389 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
2390 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2391 demuxed ? "" : "Muxed ",
2394 vcc ? "2.65/3.3" : "1.8",
2396 printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
2399 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2400 {ONENAND_MFR_SAMSUNG, "Samsung"},
2404 * onenand_check_maf - Check manufacturer ID
2405 * @param manuf manufacturer ID
2407 * Check manufacturer ID
2409 static int onenand_check_maf(int manuf)
2411 int size = ARRAY_SIZE(onenand_manuf_ids);
2415 for (i = 0; i < size; i++)
2416 if (manuf == onenand_manuf_ids[i].id)
2420 name = onenand_manuf_ids[i].name;
2424 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2430 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2431 * @param mtd MTD device structure
2433 * OneNAND detection method:
2434 * Compare the values from command with ones from register
2436 static int onenand_probe(struct mtd_info *mtd)
2438 struct onenand_chip *this = mtd->priv;
2439 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2443 /* Save system configuration 1 */
2444 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2445 /* Clear Sync. Burst Read mode to read BootRAM */
2446 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2448 /* Send the command for reading device ID from BootRAM */
2449 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2451 /* Read manufacturer and device IDs from BootRAM */
2452 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2453 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2455 /* Reset OneNAND to read default register values */
2456 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2458 this->wait(mtd, FL_RESETING);
2460 /* Restore system configuration 1 */
2461 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2463 /* Check manufacturer ID */
2464 if (onenand_check_maf(bram_maf_id))
2467 /* Read manufacturer and device IDs from Register */
2468 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2469 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2470 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2472 /* Check OneNAND device */
2473 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2476 /* Flash device information */
2477 onenand_print_device_info(dev_id, ver_id);
2478 this->device_id = dev_id;
2479 this->version_id = ver_id;
2481 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2482 this->chipsize = (16 << density) << 20;
2483 /* Set density mask. it is used for DDP */
2484 if (ONENAND_IS_DDP(this))
2485 this->density_mask = (1 << (density + 6));
2487 this->density_mask = 0;
2489 /* OneNAND page size & block size */
2490 /* The data buffer size is equal to page size */
2491 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2492 mtd->oobsize = mtd->writesize >> 5;
2493 /* Pages per a block are always 64 in OneNAND */
2494 mtd->erasesize = mtd->writesize << 6;
2496 this->erase_shift = ffs(mtd->erasesize) - 1;
2497 this->page_shift = ffs(mtd->writesize) - 1;
2498 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2499 /* It's real page size */
2500 this->writesize = mtd->writesize;
2502 /* REVIST: Multichip handling */
2504 mtd->size = this->chipsize;
2506 /* Check OneNAND features */
2507 onenand_check_features(mtd);
2510 * We emulate the 4KiB page and 256KiB erase block size
2511 * But oobsize is still 64 bytes.
2512 * It is only valid if you turn on 2X program support,
2513 * Otherwise it will be ignored by compiler.
2515 if (ONENAND_IS_2PLANE(this)) {
2516 mtd->writesize <<= 1;
2517 mtd->erasesize <<= 1;
2524 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2525 * @param mtd MTD device structure
2527 static int onenand_suspend(struct mtd_info *mtd)
2529 return onenand_get_device(mtd, FL_PM_SUSPENDED);
2533 * onenand_resume - [MTD Interface] Resume the OneNAND flash
2534 * @param mtd MTD device structure
2536 static void onenand_resume(struct mtd_info *mtd)
2538 struct onenand_chip *this = mtd->priv;
2540 if (this->state == FL_PM_SUSPENDED)
2541 onenand_release_device(mtd);
2543 printk(KERN_ERR "resume() called for the chip which is not"
2544 "in suspended state\n");
2548 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2549 * @param mtd MTD device structure
2550 * @param maxchips Number of chips to scan for
2552 * This fills out all the not initialized function pointers
2553 * with the defaults.
2554 * The flash ID is read and the mtd/chip structures are
2555 * filled with the appropriate values.
2557 int onenand_scan(struct mtd_info *mtd, int maxchips)
2560 struct onenand_chip *this = mtd->priv;
2562 if (!this->read_word)
2563 this->read_word = onenand_readw;
2564 if (!this->write_word)
2565 this->write_word = onenand_writew;
2568 this->command = onenand_command;
2570 onenand_setup_wait(mtd);
2572 if (!this->read_bufferram)
2573 this->read_bufferram = onenand_read_bufferram;
2574 if (!this->write_bufferram)
2575 this->write_bufferram = onenand_write_bufferram;
2577 if (!this->block_markbad)
2578 this->block_markbad = onenand_default_block_markbad;
2579 if (!this->scan_bbt)
2580 this->scan_bbt = onenand_default_bbt;
2582 if (onenand_probe(mtd))
2585 /* Set Sync. Burst Read after probing */
2586 if (this->mmcontrol) {
2587 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2588 this->read_bufferram = onenand_sync_read_bufferram;
2591 /* Allocate buffers, if necessary */
2592 if (!this->page_buf) {
2593 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2594 if (!this->page_buf) {
2595 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2598 this->options |= ONENAND_PAGEBUF_ALLOC;
2600 if (!this->oob_buf) {
2601 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2602 if (!this->oob_buf) {
2603 printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n");
2604 if (this->options & ONENAND_PAGEBUF_ALLOC) {
2605 this->options &= ~ONENAND_PAGEBUF_ALLOC;
2606 kfree(this->page_buf);
2610 this->options |= ONENAND_OOBBUF_ALLOC;
2613 this->state = FL_READY;
2614 init_waitqueue_head(&this->wq);
2615 spin_lock_init(&this->chip_lock);
2618 * Allow subpage writes up to oobsize.
2620 switch (mtd->oobsize) {
2622 this->ecclayout = &onenand_oob_64;
2623 mtd->subpage_sft = 2;
2627 this->ecclayout = &onenand_oob_32;
2628 mtd->subpage_sft = 1;
2632 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2634 mtd->subpage_sft = 0;
2635 /* To prevent kernel oops */
2636 this->ecclayout = &onenand_oob_32;
2640 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2643 * The number of bytes available for a client to place data into
2644 * the out of band area
2646 this->ecclayout->oobavail = 0;
2647 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
2648 this->ecclayout->oobfree[i].length; i++)
2649 this->ecclayout->oobavail +=
2650 this->ecclayout->oobfree[i].length;
2651 mtd->oobavail = this->ecclayout->oobavail;
2653 mtd->ecclayout = this->ecclayout;
2655 /* Fill in remaining MTD driver data */
2656 mtd->type = MTD_NANDFLASH;
2657 mtd->flags = MTD_CAP_NANDFLASH;
2658 mtd->erase = onenand_erase;
2660 mtd->unpoint = NULL;
2661 mtd->read = onenand_read;
2662 mtd->write = onenand_write;
2663 mtd->read_oob = onenand_read_oob;
2664 mtd->write_oob = onenand_write_oob;
2665 #ifdef CONFIG_MTD_ONENAND_OTP
2666 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2667 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2668 mtd->get_user_prot_info = onenand_get_user_prot_info;
2669 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2670 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2671 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2673 mtd->sync = onenand_sync;
2674 mtd->lock = onenand_lock;
2675 mtd->unlock = onenand_unlock;
2676 mtd->suspend = onenand_suspend;
2677 mtd->resume = onenand_resume;
2678 mtd->block_isbad = onenand_block_isbad;
2679 mtd->block_markbad = onenand_block_markbad;
2680 mtd->owner = THIS_MODULE;
2682 /* Unlock whole block */
2683 onenand_unlock_all(mtd);
2685 return this->scan_bbt(mtd);
2689 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2690 * @param mtd MTD device structure
2692 void onenand_release(struct mtd_info *mtd)
2694 struct onenand_chip *this = mtd->priv;
2696 #ifdef CONFIG_MTD_PARTITIONS
2697 /* Deregister partitions */
2698 del_mtd_partitions (mtd);
2700 /* Deregister the device */
2701 del_mtd_device (mtd);
2703 /* Free bad block table memory, if allocated */
2705 struct bbm_info *bbm = this->bbm;
2709 /* Buffers allocated by onenand_scan */
2710 if (this->options & ONENAND_PAGEBUF_ALLOC)
2711 kfree(this->page_buf);
2712 if (this->options & ONENAND_OOBBUF_ALLOC)
2713 kfree(this->oob_buf);
2716 EXPORT_SYMBOL_GPL(onenand_scan);
2717 EXPORT_SYMBOL_GPL(onenand_release);
2719 MODULE_LICENSE("GPL");
2720 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2721 MODULE_DESCRIPTION("Generic OneNAND flash driver code");