2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/mtd/mtd.h>
16 #include <linux/mtd/onenand.h>
17 #include <linux/mtd/partitions.h>
22 * onenand_oob_64 - oob info for large (2KB) page
24 static struct nand_oobinfo onenand_oob_64 = {
25 .useecc = MTD_NANDECC_AUTOPLACE,
34 {2, 3}, {14, 2}, {18, 3}, {30, 2},
35 {24, 3}, {46, 2}, {40, 3}, {62, 2} }
39 * onenand_oob_32 - oob info for middle (1KB) page
41 static struct nand_oobinfo onenand_oob_32 = {
42 .useecc = MTD_NANDECC_AUTOPLACE,
48 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
51 static const unsigned char ffchars[] = {
52 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
53 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
54 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
55 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
56 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
57 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
58 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
63 * onenand_readw - [OneNAND Interface] Read OneNAND register
64 * @param addr address to read
66 * Read OneNAND register
68 static unsigned short onenand_readw(void __iomem *addr)
74 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
75 * @param value value to write
76 * @param addr address to write
78 * Write OneNAND register with value
80 static void onenand_writew(unsigned short value, void __iomem *addr)
86 * onenand_block_address - [DEFAULT] Get block address
87 * @param this onenand chip data structure
88 * @param block the block
89 * @return translated block address if DDP, otherwise same
91 * Setup Start Address 1 Register (F100h)
93 static int onenand_block_address(struct onenand_chip *this, int block)
95 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
96 /* Device Flash Core select, NAND Flash Block Address */
99 if (block & this->density_mask)
102 return (dfs << ONENAND_DDP_SHIFT) |
103 (block & (this->density_mask - 1));
110 * onenand_bufferram_address - [DEFAULT] Get bufferram address
111 * @param this onenand chip data structure
112 * @param block the block
113 * @return set DBS value if DDP, otherwise 0
115 * Setup Start Address 2 Register (F101h) for DDP
117 static int onenand_bufferram_address(struct onenand_chip *this, int block)
119 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
120 /* Device BufferRAM Select */
123 if (block & this->density_mask)
126 return (dbs << ONENAND_DDP_SHIFT);
133 * onenand_page_address - [DEFAULT] Get page address
134 * @param page the page address
135 * @param sector the sector address
136 * @return combined page and sector address
138 * Setup Start Address 8 Register (F107h)
140 static int onenand_page_address(int page, int sector)
142 /* Flash Page Address, Flash Sector Address */
145 fpa = page & ONENAND_FPA_MASK;
146 fsa = sector & ONENAND_FSA_MASK;
148 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
152 * onenand_buffer_address - [DEFAULT] Get buffer address
153 * @param dataram1 DataRAM index
154 * @param sectors the sector address
155 * @param count the number of sectors
156 * @return the start buffer value
158 * Setup Start Buffer Register (F200h)
160 static int onenand_buffer_address(int dataram1, int sectors, int count)
164 /* BufferRAM Sector Address */
165 bsa = sectors & ONENAND_BSA_MASK;
168 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
170 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
172 /* BufferRAM Sector Count */
173 bsc = count & ONENAND_BSC_MASK;
175 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
179 * onenand_command - [DEFAULT] Send command to OneNAND device
180 * @param mtd MTD device structure
181 * @param cmd the command to be sent
182 * @param addr offset to read from or write to
183 * @param len number of bytes to read or write
185 * Send command to OneNAND device. This function is used for middle/large page
186 * devices (1KB/2KB Bytes per page)
188 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
190 struct onenand_chip *this = mtd->priv;
191 int value, readcmd = 0;
193 /* Now we use page size operation */
194 int sectors = 4, count = 4;
196 /* Address translation */
198 case ONENAND_CMD_UNLOCK:
199 case ONENAND_CMD_LOCK:
200 case ONENAND_CMD_LOCK_TIGHT:
205 case ONENAND_CMD_ERASE:
206 case ONENAND_CMD_BUFFERRAM:
207 block = (int) (addr >> this->erase_shift);
212 block = (int) (addr >> this->erase_shift);
213 page = (int) (addr >> this->page_shift);
214 page &= this->page_mask;
218 /* NOTE: The setting order of the registers is very important! */
219 if (cmd == ONENAND_CMD_BUFFERRAM) {
220 /* Select DataRAM for DDP */
221 value = onenand_bufferram_address(this, block);
222 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
224 /* Switch to the next data buffer */
225 ONENAND_SET_NEXT_BUFFERRAM(this);
231 /* Write 'DFS, FBA' of Flash */
232 value = onenand_block_address(this, block);
233 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
240 case ONENAND_CMD_READ:
241 case ONENAND_CMD_READOOB:
242 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
247 dataram = ONENAND_CURRENT_BUFFERRAM(this);
251 /* Write 'FPA, FSA' of Flash */
252 value = onenand_page_address(page, sectors);
253 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
255 /* Write 'BSA, BSC' of DataRAM */
256 value = onenand_buffer_address(dataram, sectors, count);
257 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
260 /* Select DataRAM for DDP */
261 value = onenand_bufferram_address(this, block);
262 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
266 /* Interrupt clear */
267 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
270 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
276 * onenand_wait - [DEFAULT] wait until the command is done
277 * @param mtd MTD device structure
278 * @param state state to select the max. timeout value
280 * Wait for command done. This applies to all OneNAND command
281 * Read can take up to 30us, erase up to 2ms and program up to 350us
282 * according to general OneNAND specs
284 static int onenand_wait(struct mtd_info *mtd, int state)
286 struct onenand_chip * this = mtd->priv;
287 unsigned long timeout;
288 unsigned int flags = ONENAND_INT_MASTER;
289 unsigned int interrupt = 0;
290 unsigned int ctrl, ecc;
292 /* The 20 msec is enough */
293 timeout = jiffies + msecs_to_jiffies(20);
294 while (time_before(jiffies, timeout)) {
295 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
297 if (interrupt & flags)
300 if (state != FL_READING)
303 /* To get correct interrupt status in timeout case */
304 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
306 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
308 if (ctrl & ONENAND_CTRL_ERROR) {
309 /* It maybe occur at initial bad block */
310 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
311 /* Clear other interrupt bits for preventing ECC error */
312 interrupt &= ONENAND_INT_MASTER;
315 if (ctrl & ONENAND_CTRL_LOCK) {
316 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error = 0x%04x\n", ctrl);
320 if (interrupt & ONENAND_INT_READ) {
321 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
322 if (ecc & ONENAND_ECC_2BIT_ALL) {
323 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
332 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
333 * @param mtd MTD data structure
334 * @param area BufferRAM area
335 * @return offset given area
337 * Return BufferRAM offset given area
339 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
341 struct onenand_chip *this = mtd->priv;
343 if (ONENAND_CURRENT_BUFFERRAM(this)) {
344 if (area == ONENAND_DATARAM)
345 return mtd->oobblock;
346 if (area == ONENAND_SPARERAM)
354 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
355 * @param mtd MTD data structure
356 * @param area BufferRAM area
357 * @param buffer the databuffer to put/get data
358 * @param offset offset to read from or write to
359 * @param count number of bytes to read/write
361 * Read the BufferRAM area
363 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
364 unsigned char *buffer, int offset, size_t count)
366 struct onenand_chip *this = mtd->priv;
367 void __iomem *bufferram;
369 bufferram = this->base + area;
371 bufferram += onenand_bufferram_offset(mtd, area);
373 memcpy(buffer, bufferram + offset, count);
379 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
380 * @param mtd MTD data structure
381 * @param area BufferRAM area
382 * @param buffer the databuffer to put/get data
383 * @param offset offset to read from or write to
384 * @param count number of bytes to read/write
386 * Read the BufferRAM area with Sync. Burst Mode
388 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
389 unsigned char *buffer, int offset, size_t count)
391 struct onenand_chip *this = mtd->priv;
392 void __iomem *bufferram;
394 bufferram = this->base + area;
396 bufferram += onenand_bufferram_offset(mtd, area);
398 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
400 memcpy(buffer, bufferram + offset, count);
402 this->mmcontrol(mtd, 0);
408 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
409 * @param mtd MTD data structure
410 * @param area BufferRAM area
411 * @param buffer the databuffer to put/get data
412 * @param offset offset to read from or write to
413 * @param count number of bytes to read/write
415 * Write the BufferRAM area
417 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
418 const unsigned char *buffer, int offset, size_t count)
420 struct onenand_chip *this = mtd->priv;
421 void __iomem *bufferram;
423 bufferram = this->base + area;
425 bufferram += onenand_bufferram_offset(mtd, area);
427 memcpy(bufferram + offset, buffer, count);
433 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
434 * @param mtd MTD data structure
435 * @param addr address to check
436 * @return 1 if there are valid data, otherwise 0
438 * Check bufferram if there is data we required
440 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
442 struct onenand_chip *this = mtd->priv;
446 block = (int) (addr >> this->erase_shift);
447 page = (int) (addr >> this->page_shift);
448 page &= this->page_mask;
450 i = ONENAND_CURRENT_BUFFERRAM(this);
452 /* Is there valid data? */
453 if (this->bufferram[i].block == block &&
454 this->bufferram[i].page == page &&
455 this->bufferram[i].valid)
462 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
463 * @param mtd MTD data structure
464 * @param addr address to update
465 * @param valid valid flag
467 * Update BufferRAM information
469 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
472 struct onenand_chip *this = mtd->priv;
476 block = (int) (addr >> this->erase_shift);
477 page = (int) (addr >> this->page_shift);
478 page &= this->page_mask;
480 /* Invalidate BufferRAM */
481 for (i = 0; i < MAX_BUFFERRAM; i++) {
482 if (this->bufferram[i].block == block &&
483 this->bufferram[i].page == page)
484 this->bufferram[i].valid = 0;
487 /* Update BufferRAM */
488 i = ONENAND_CURRENT_BUFFERRAM(this);
489 this->bufferram[i].block = block;
490 this->bufferram[i].page = page;
491 this->bufferram[i].valid = valid;
497 * onenand_get_device - [GENERIC] Get chip for selected access
498 * @param mtd MTD device structure
499 * @param new_state the state which is requested
501 * Get the device and lock it for exclusive access
503 static int onenand_get_device(struct mtd_info *mtd, int new_state)
505 struct onenand_chip *this = mtd->priv;
506 DECLARE_WAITQUEUE(wait, current);
509 * Grab the lock and see if the device is available
512 spin_lock(&this->chip_lock);
513 if (this->state == FL_READY) {
514 this->state = new_state;
515 spin_unlock(&this->chip_lock);
518 if (new_state == FL_PM_SUSPENDED) {
519 spin_unlock(&this->chip_lock);
520 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
522 set_current_state(TASK_UNINTERRUPTIBLE);
523 add_wait_queue(&this->wq, &wait);
524 spin_unlock(&this->chip_lock);
526 remove_wait_queue(&this->wq, &wait);
533 * onenand_release_device - [GENERIC] release chip
534 * @param mtd MTD device structure
536 * Deselect, release chip lock and wake up anyone waiting on the device
538 static void onenand_release_device(struct mtd_info *mtd)
540 struct onenand_chip *this = mtd->priv;
542 /* Release the chip */
543 spin_lock(&this->chip_lock);
544 this->state = FL_READY;
546 spin_unlock(&this->chip_lock);
550 * onenand_read_ecc - [MTD Interface] Read data with ECC
551 * @param mtd MTD device structure
552 * @param from offset to read from
553 * @param len number of bytes to read
554 * @param retlen pointer to variable to store the number of read bytes
555 * @param buf the databuffer to put data
556 * @param oob_buf filesystem supplied oob data buffer
557 * @param oobsel oob selection structure
559 * OneNAND read with ECC
561 static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
562 size_t *retlen, u_char *buf,
563 u_char *oob_buf, struct nand_oobinfo *oobsel)
565 struct onenand_chip *this = mtd->priv;
566 int read = 0, column;
570 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
572 /* Do not allow reads past end of device */
573 if ((from + len) > mtd->size) {
574 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_ecc: Attempt read beyond end of device\n");
579 /* Grab the lock and see if the device is available */
580 onenand_get_device(mtd, FL_READING);
582 /* TODO handling oob */
585 thislen = min_t(int, mtd->oobblock, len - read);
587 column = from & (mtd->oobblock - 1);
588 if (column + thislen > mtd->oobblock)
589 thislen = mtd->oobblock - column;
591 if (!onenand_check_bufferram(mtd, from)) {
592 this->command(mtd, ONENAND_CMD_READ, from, mtd->oobblock);
594 ret = this->wait(mtd, FL_READING);
595 /* First copy data and check return value for ECC handling */
596 onenand_update_bufferram(mtd, from, 1);
599 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
607 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_ecc: read failed = %d\n", ret);
616 /* Deselect and wake up anyone waiting on the device */
617 onenand_release_device(mtd);
620 * Return success, if no ECC failures, else -EBADMSG
621 * fs driver will take care of that, because
622 * retlen == desired len and result == -EBADMSG
629 * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
630 * @param mtd MTD device structure
631 * @param from offset to read from
632 * @param len number of bytes to read
633 * @param retlen pointer to variable to store the number of read bytes
634 * @param buf the databuffer to put data
636 * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
638 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
639 size_t *retlen, u_char *buf)
641 return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL);
645 * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
646 * @param mtd MTD device structure
647 * @param from offset to read from
648 * @param len number of bytes to read
649 * @param retlen pointer to variable to store the number of read bytes
650 * @param buf the databuffer to put data
652 * OneNAND read out-of-band data from the spare area
654 static int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
655 size_t *retlen, u_char *buf)
657 struct onenand_chip *this = mtd->priv;
658 int read = 0, thislen, column;
661 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
663 /* Initialize return length value */
666 /* Do not allow reads past end of device */
667 if (unlikely((from + len) > mtd->size)) {
668 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
672 /* Grab the lock and see if the device is available */
673 onenand_get_device(mtd, FL_READING);
675 column = from & (mtd->oobsize - 1);
678 thislen = mtd->oobsize - column;
679 thislen = min_t(int, thislen, len);
681 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
683 onenand_update_bufferram(mtd, from, 0);
685 ret = this->wait(mtd, FL_READING);
686 /* First copy data and check return value for ECC handling */
688 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
696 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = %d\n", ret);
705 from += mtd->oobblock;
711 /* Deselect and wake up anyone waiting on the device */
712 onenand_release_device(mtd);
718 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
720 * onenand_verify_page - [GENERIC] verify the chip contents after a write
721 * @param mtd MTD device structure
722 * @param buf the databuffer to verify
724 * Check DataRAM area directly
726 static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
728 struct onenand_chip *this = mtd->priv;
729 void __iomem *dataram0, *dataram1;
732 this->command(mtd, ONENAND_CMD_READ, addr, mtd->oobblock);
734 ret = this->wait(mtd, FL_READING);
738 onenand_update_bufferram(mtd, addr, 1);
740 /* Check, if the two dataram areas are same */
741 dataram0 = this->base + ONENAND_DATARAM;
742 dataram1 = dataram0 + mtd->oobblock;
744 if (memcmp(dataram0, dataram1, mtd->oobblock))
750 #define onenand_verify_page(...) (0)
753 #define NOTALIGNED(x) ((x & (mtd->oobblock - 1)) != 0)
756 * onenand_write_ecc - [MTD Interface] OneNAND write with ECC
757 * @param mtd MTD device structure
758 * @param to offset to write to
759 * @param len number of bytes to write
760 * @param retlen pointer to variable to store the number of written bytes
761 * @param buf the data to write
762 * @param eccbuf filesystem supplied oob data buffer
763 * @param oobsel oob selection structure
765 * OneNAND write with ECC
767 static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
768 size_t *retlen, const u_char *buf,
769 u_char *eccbuf, struct nand_oobinfo *oobsel)
771 struct onenand_chip *this = mtd->priv;
775 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
777 /* Initialize retlen, in case of early exit */
780 /* Do not allow writes past end of device */
781 if (unlikely((to + len) > mtd->size)) {
782 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt write to past end of device\n");
786 /* Reject writes, which are not page aligned */
787 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
788 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt to write not page aligned data\n");
792 /* Grab the lock and see if the device is available */
793 onenand_get_device(mtd, FL_WRITING);
795 /* Loop until all data write */
796 while (written < len) {
797 int thislen = min_t(int, mtd->oobblock, len - written);
799 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock);
801 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
802 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
804 this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock);
806 onenand_update_bufferram(mtd, to, 1);
808 ret = this->wait(mtd, FL_WRITING);
810 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: write filaed %d\n", ret);
816 /* Only check verify write turn on */
817 ret = onenand_verify_page(mtd, (u_char *) buf, to);
819 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: verify failed %d\n", ret);
831 /* Deselect and wake up anyone waiting on the device */
832 onenand_release_device(mtd);
840 * onenand_write - [MTD Interface] compability function for onenand_write_ecc
841 * @param mtd MTD device structure
842 * @param to offset to write to
843 * @param len number of bytes to write
844 * @param retlen pointer to variable to store the number of written bytes
845 * @param buf the data to write
847 * This function simply calls onenand_write_ecc
848 * with oob buffer and oobsel = NULL
850 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
851 size_t *retlen, const u_char *buf)
853 return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL);
857 * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
858 * @param mtd MTD device structure
859 * @param to offset to write to
860 * @param len number of bytes to write
861 * @param retlen pointer to variable to store the number of written bytes
862 * @param buf the data to write
864 * OneNAND write out-of-band
866 static int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
867 size_t *retlen, const u_char *buf)
869 struct onenand_chip *this = mtd->priv;
873 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
875 /* Initialize retlen, in case of early exit */
878 /* Do not allow writes past end of device */
879 if (unlikely((to + len) > mtd->size)) {
880 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
884 /* Grab the lock and see if the device is available */
885 onenand_get_device(mtd, FL_WRITING);
887 /* Loop until all data write */
888 while (written < len) {
889 int thislen = min_t(int, mtd->oobsize, len - written);
891 column = to & (mtd->oobsize - 1);
893 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
895 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
896 this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
898 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
900 onenand_update_bufferram(mtd, to, 0);
902 status = this->wait(mtd, FL_WRITING);
916 /* Deselect and wake up anyone waiting on the device */
917 onenand_release_device(mtd);
925 * onenand_writev_ecc - [MTD Interface] write with iovec with ecc
926 * @param mtd MTD device structure
927 * @param vecs the iovectors to write
928 * @param count number of vectors
929 * @param to offset to write to
930 * @param retlen pointer to variable to store the number of written bytes
931 * @param eccbuf filesystem supplied oob data buffer
932 * @param oobsel oob selection structure
934 * OneNAND write with iovec with ecc
936 static int onenand_writev_ecc(struct mtd_info *mtd, const struct kvec *vecs,
937 unsigned long count, loff_t to, size_t *retlen,
938 u_char *eccbuf, struct nand_oobinfo *oobsel)
940 struct onenand_chip *this = mtd->priv;
941 unsigned char buffer[MAX_ONENAND_PAGESIZE], *pbuf;
942 size_t total_len, len;
946 /* Preset written len for early exit */
949 /* Calculate total length of data */
951 for (i = 0; i < count; i++)
952 total_len += vecs[i].iov_len;
954 DEBUG(MTD_DEBUG_LEVEL3, "onenand_writev_ecc: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);
956 /* Do not allow write past end of the device */
957 if (unlikely((to + total_len) > mtd->size)) {
958 DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: Attempted write past end of device\n");
962 /* Reject writes, which are not page aligned */
963 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(total_len))) {
964 DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: Attempt to write not page aligned data\n");
968 /* Grab the lock and see if the device is available */
969 onenand_get_device(mtd, FL_WRITING);
971 /* TODO handling oob */
973 /* Loop until all keve's data has been written */
978 * If the given tuple is >= pagesize then
979 * write it out from the iov
981 if ((vecs->iov_len - len) >= mtd->oobblock) {
982 pbuf = vecs->iov_base + len;
984 len += mtd->oobblock;
986 /* Check, if we have to switch to the next tuple */
987 if (len >= (int) vecs->iov_len) {
993 int cnt = 0, thislen;
994 while (cnt < mtd->oobblock) {
995 thislen = min_t(int, mtd->oobblock - cnt, vecs->iov_len - len);
996 memcpy(buffer + cnt, vecs->iov_base + len, thislen);
1000 /* Check, if we have to switch to the next tuple */
1001 if (len >= (int) vecs->iov_len) {
1009 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock);
1011 this->write_bufferram(mtd, ONENAND_DATARAM, pbuf, 0, mtd->oobblock);
1012 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1014 this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock);
1016 onenand_update_bufferram(mtd, to, 1);
1018 ret = this->wait(mtd, FL_WRITING);
1020 DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: write failed %d\n", ret);
1025 /* Only check verify write turn on */
1026 ret = onenand_verify_page(mtd, (u_char *) pbuf, to);
1028 DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: verify failed %d\n", ret);
1032 written += mtd->oobblock;
1034 to += mtd->oobblock;
1038 /* Deselect and wakt up anyone waiting on the device */
1039 onenand_release_device(mtd);
1047 * onenand_writev - [MTD Interface] compabilty function for onenand_writev_ecc
1048 * @param mtd MTD device structure
1049 * @param vecs the iovectors to write
1050 * @param count number of vectors
1051 * @param to offset to write to
1052 * @param retlen pointer to variable to store the number of written bytes
1054 * OneNAND write with kvec. This just calls the ecc function
1056 static int onenand_writev(struct mtd_info *mtd, const struct kvec *vecs,
1057 unsigned long count, loff_t to, size_t *retlen)
1059 return onenand_writev_ecc(mtd, vecs, count, to, retlen, NULL, NULL);
1063 * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1064 * @param mtd MTD device structure
1065 * @param ofs offset from device start
1066 * @param getchip 0, if the chip is already selected
1067 * @param allowbbt 1, if its allowed to access the bbt area
1069 * Check, if the block is bad. Either by reading the bad block table or
1070 * calling of the scan function.
1072 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1074 struct onenand_chip *this = mtd->priv;
1075 struct bbm_info *bbm = this->bbm;
1077 /* Return info from the table */
1078 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1082 * onenand_erase - [MTD Interface] erase block(s)
1083 * @param mtd MTD device structure
1084 * @param instr erase instruction
1086 * Erase one ore more blocks
1088 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1090 struct onenand_chip *this = mtd->priv;
1091 unsigned int block_size;
1096 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1098 block_size = (1 << this->erase_shift);
1100 /* Start address must align on block boundary */
1101 if (unlikely(instr->addr & (block_size - 1))) {
1102 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1106 /* Length must align on block boundary */
1107 if (unlikely(instr->len & (block_size - 1))) {
1108 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1112 /* Do not allow erase past end of device */
1113 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1114 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1118 instr->fail_addr = 0xffffffff;
1120 /* Grab the lock and see if the device is available */
1121 onenand_get_device(mtd, FL_ERASING);
1123 /* Loop throught the pages */
1127 instr->state = MTD_ERASING;
1131 /* Check if we have a bad block, we do not erase bad blocks */
1132 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1133 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1134 instr->state = MTD_ERASE_FAILED;
1138 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1140 ret = this->wait(mtd, FL_ERASING);
1141 /* Check, if it is write protected */
1144 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Device is write protected!!!\n");
1146 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1147 instr->state = MTD_ERASE_FAILED;
1148 instr->fail_addr = addr;
1156 instr->state = MTD_ERASE_DONE;
1160 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1161 /* Do call back function */
1163 mtd_erase_callback(instr);
1165 /* Deselect and wake up anyone waiting on the device */
1166 onenand_release_device(mtd);
1172 * onenand_sync - [MTD Interface] sync
1173 * @param mtd MTD device structure
1175 * Sync is actually a wait for chip ready function
1177 static void onenand_sync(struct mtd_info *mtd)
1179 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1181 /* Grab the lock and see if the device is available */
1182 onenand_get_device(mtd, FL_SYNCING);
1184 /* Release it and go back */
1185 onenand_release_device(mtd);
1190 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1191 * @param mtd MTD device structure
1192 * @param ofs offset relative to mtd start
1194 * Check whether the block is bad
1196 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1198 /* Check for invalid offset */
1199 if (ofs > mtd->size)
1202 return onenand_block_checkbad(mtd, ofs, 1, 0);
1206 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1207 * @param mtd MTD device structure
1208 * @param ofs offset from device start
1210 * This is the default implementation, which can be overridden by
1211 * a hardware specific driver.
1213 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1215 struct onenand_chip *this = mtd->priv;
1216 struct bbm_info *bbm = this->bbm;
1217 u_char buf[2] = {0, 0};
1221 /* Get block number */
1222 block = ((int) ofs) >> bbm->bbt_erase_shift;
1224 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1226 /* We write two bytes, so we dont have to mess with 16 bit access */
1227 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1228 return mtd->write_oob(mtd, ofs , 2, &retlen, buf);
1232 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1233 * @param mtd MTD device structure
1234 * @param ofs offset relative to mtd start
1236 * Mark the block as bad
1238 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1240 struct onenand_chip *this = mtd->priv;
1243 ret = onenand_block_isbad(mtd, ofs);
1245 /* If it was bad already, return success and do nothing */
1251 return this->block_markbad(mtd, ofs);
1255 * onenand_unlock - [MTD Interface] Unlock block(s)
1256 * @param mtd MTD device structure
1257 * @param ofs offset relative to mtd start
1258 * @param len number of bytes to unlock
1260 * Unlock one or more blocks
1262 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1264 struct onenand_chip *this = mtd->priv;
1265 int start, end, block, value, status;
1267 start = ofs >> this->erase_shift;
1268 end = len >> this->erase_shift;
1270 /* Continuous lock scheme */
1271 if (this->options & ONENAND_CONT_LOCK) {
1272 /* Set start block address */
1273 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1274 /* Set end block address */
1275 this->write_word(end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1276 /* Write unlock command */
1277 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1279 /* There's no return value */
1280 this->wait(mtd, FL_UNLOCKING);
1283 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1284 & ONENAND_CTRL_ONGO)
1287 /* Check lock status */
1288 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1289 if (!(status & ONENAND_WP_US))
1290 printk(KERN_ERR "wp status = 0x%x\n", status);
1295 /* Block lock scheme */
1296 for (block = start; block < end; block++) {
1297 /* Set start block address */
1298 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1299 /* Write unlock command */
1300 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1302 /* There's no return value */
1303 this->wait(mtd, FL_UNLOCKING);
1306 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1307 & ONENAND_CTRL_ONGO)
1310 /* Set block address for read block status */
1311 value = onenand_block_address(this, block);
1312 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1314 /* Check lock status */
1315 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1316 if (!(status & ONENAND_WP_US))
1317 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1324 * onenand_print_device_info - Print device ID
1325 * @param device device ID
1329 static void onenand_print_device_info(int device)
1331 int vcc, demuxed, ddp, density;
1333 vcc = device & ONENAND_DEVICE_VCC_MASK;
1334 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1335 ddp = device & ONENAND_DEVICE_IS_DDP;
1336 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1337 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1338 demuxed ? "" : "Muxed ",
1341 vcc ? "2.65/3.3" : "1.8",
1345 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1346 {ONENAND_MFR_SAMSUNG, "Samsung"},
1347 {ONENAND_MFR_UNKNOWN, "Unknown"}
1351 * onenand_check_maf - Check manufacturer ID
1352 * @param manuf manufacturer ID
1354 * Check manufacturer ID
1356 static int onenand_check_maf(int manuf)
1360 for (i = 0; onenand_manuf_ids[i].id; i++) {
1361 if (manuf == onenand_manuf_ids[i].id)
1365 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n",
1366 onenand_manuf_ids[i].name, manuf);
1368 return (i != ONENAND_MFR_UNKNOWN);
1372 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1373 * @param mtd MTD device structure
1375 * OneNAND detection method:
1376 * Compare the the values from command with ones from register
1378 static int onenand_probe(struct mtd_info *mtd)
1380 struct onenand_chip *this = mtd->priv;
1381 int bram_maf_id, bram_dev_id, maf_id, dev_id;
1385 /* Send the command for reading device ID from BootRAM */
1386 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1388 /* Read manufacturer and device IDs from BootRAM */
1389 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1390 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1392 /* Check manufacturer ID */
1393 if (onenand_check_maf(bram_maf_id))
1396 /* Reset OneNAND to read default register values */
1397 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1399 /* Read manufacturer and device IDs from Register */
1400 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1401 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1403 /* Check OneNAND device */
1404 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1407 /* Flash device information */
1408 onenand_print_device_info(dev_id);
1409 this->device_id = dev_id;
1411 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1412 this->chipsize = (16 << density) << 20;
1413 /* Set density mask. it is used for DDP */
1414 this->density_mask = (1 << (density + 6));
1416 /* OneNAND page size & block size */
1417 /* The data buffer size is equal to page size */
1418 mtd->oobblock = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1419 mtd->oobsize = mtd->oobblock >> 5;
1420 /* Pagers per block is always 64 in OneNAND */
1421 mtd->erasesize = mtd->oobblock << 6;
1423 this->erase_shift = ffs(mtd->erasesize) - 1;
1424 this->page_shift = ffs(mtd->oobblock) - 1;
1425 this->ppb_shift = (this->erase_shift - this->page_shift);
1426 this->page_mask = (mtd->erasesize / mtd->oobblock) - 1;
1428 /* REVIST: Multichip handling */
1430 mtd->size = this->chipsize;
1433 version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1434 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id);
1437 if (density <= ONENAND_DEVICE_DENSITY_512Mb &&
1438 !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) {
1439 printk(KERN_INFO "Lock scheme is Continues Lock\n");
1440 this->options |= ONENAND_CONT_LOCK;
1447 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1448 * @param mtd MTD device structure
1450 static int onenand_suspend(struct mtd_info *mtd)
1452 return onenand_get_device(mtd, FL_PM_SUSPENDED);
1456 * onenand_resume - [MTD Interface] Resume the OneNAND flash
1457 * @param mtd MTD device structure
1459 static void onenand_resume(struct mtd_info *mtd)
1461 struct onenand_chip *this = mtd->priv;
1463 if (this->state == FL_PM_SUSPENDED)
1464 onenand_release_device(mtd);
1466 printk(KERN_ERR "resume() called for the chip which is not"
1467 "in suspended state\n");
1472 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1473 * @param mtd MTD device structure
1474 * @param maxchips Number of chips to scan for
1476 * This fills out all the not initialized function pointers
1477 * with the defaults.
1478 * The flash ID is read and the mtd/chip structures are
1479 * filled with the appropriate values.
1481 int onenand_scan(struct mtd_info *mtd, int maxchips)
1483 struct onenand_chip *this = mtd->priv;
1485 if (!this->read_word)
1486 this->read_word = onenand_readw;
1487 if (!this->write_word)
1488 this->write_word = onenand_writew;
1491 this->command = onenand_command;
1493 this->wait = onenand_wait;
1495 if (!this->read_bufferram)
1496 this->read_bufferram = onenand_read_bufferram;
1497 if (!this->write_bufferram)
1498 this->write_bufferram = onenand_write_bufferram;
1500 if (!this->block_markbad)
1501 this->block_markbad = onenand_default_block_markbad;
1502 if (!this->scan_bbt)
1503 this->scan_bbt = onenand_default_bbt;
1505 if (onenand_probe(mtd))
1508 /* Set Sync. Burst Read after probing */
1509 if (this->mmcontrol) {
1510 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
1511 this->read_bufferram = onenand_sync_read_bufferram;
1514 this->state = FL_READY;
1515 init_waitqueue_head(&this->wq);
1516 spin_lock_init(&this->chip_lock);
1518 switch (mtd->oobsize) {
1520 this->autooob = &onenand_oob_64;
1524 this->autooob = &onenand_oob_32;
1528 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
1530 /* To prevent kernel oops */
1531 this->autooob = &onenand_oob_32;
1535 memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
1537 /* Fill in remaining MTD driver data */
1538 mtd->type = MTD_NANDFLASH;
1539 mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
1540 mtd->ecctype = MTD_ECC_SW;
1541 mtd->erase = onenand_erase;
1543 mtd->unpoint = NULL;
1544 mtd->read = onenand_read;
1545 mtd->write = onenand_write;
1546 mtd->read_ecc = onenand_read_ecc;
1547 mtd->write_ecc = onenand_write_ecc;
1548 mtd->read_oob = onenand_read_oob;
1549 mtd->write_oob = onenand_write_oob;
1551 mtd->readv_ecc = NULL;
1552 mtd->writev = onenand_writev;
1553 mtd->writev_ecc = onenand_writev_ecc;
1554 mtd->sync = onenand_sync;
1556 mtd->unlock = onenand_unlock;
1557 mtd->suspend = onenand_suspend;
1558 mtd->resume = onenand_resume;
1559 mtd->block_isbad = onenand_block_isbad;
1560 mtd->block_markbad = onenand_block_markbad;
1561 mtd->owner = THIS_MODULE;
1563 /* Unlock whole block */
1564 mtd->unlock(mtd, 0x0, this->chipsize);
1566 return this->scan_bbt(mtd);
1570 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
1571 * @param mtd MTD device structure
1573 void onenand_release(struct mtd_info *mtd)
1575 #ifdef CONFIG_MTD_PARTITIONS
1576 /* Deregister partitions */
1577 del_mtd_partitions (mtd);
1579 /* Deregister the device */
1580 del_mtd_device (mtd);
1583 EXPORT_SYMBOL_GPL(onenand_scan);
1584 EXPORT_SYMBOL_GPL(onenand_release);
1586 MODULE_LICENSE("GPL");
1587 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
1588 MODULE_DESCRIPTION("Generic OneNAND flash driver code");