2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2007 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/sched.h>
16 #include <linux/interrupt.h>
17 #include <linux/jiffies.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/onenand.h>
20 #include <linux/mtd/partitions.h>
25 * onenand_oob_64 - oob info for large (2KB) page
27 static struct nand_ecclayout onenand_oob_64 = {
36 {2, 3}, {14, 2}, {18, 3}, {30, 2},
37 {34, 3}, {46, 2}, {50, 3}, {62, 2}
42 * onenand_oob_32 - oob info for middle (1KB) page
44 static struct nand_ecclayout onenand_oob_32 = {
50 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
53 static const unsigned char ffchars[] = {
54 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
55 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
56 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
57 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
58 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
61 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
65 * onenand_readw - [OneNAND Interface] Read OneNAND register
66 * @param addr address to read
68 * Read OneNAND register
70 static unsigned short onenand_readw(void __iomem *addr)
76 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
77 * @param value value to write
78 * @param addr address to write
80 * Write OneNAND register with value
82 static void onenand_writew(unsigned short value, void __iomem *addr)
88 * onenand_block_address - [DEFAULT] Get block address
89 * @param this onenand chip data structure
90 * @param block the block
91 * @return translated block address if DDP, otherwise same
93 * Setup Start Address 1 Register (F100h)
95 static int onenand_block_address(struct onenand_chip *this, int block)
97 /* Device Flash Core select, NAND Flash Block Address */
98 if (block & this->density_mask)
99 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
105 * onenand_bufferram_address - [DEFAULT] Get bufferram address
106 * @param this onenand chip data structure
107 * @param block the block
108 * @return set DBS value if DDP, otherwise 0
110 * Setup Start Address 2 Register (F101h) for DDP
112 static int onenand_bufferram_address(struct onenand_chip *this, int block)
114 /* Device BufferRAM Select */
115 if (block & this->density_mask)
116 return ONENAND_DDP_CHIP1;
118 return ONENAND_DDP_CHIP0;
122 * onenand_page_address - [DEFAULT] Get page address
123 * @param page the page address
124 * @param sector the sector address
125 * @return combined page and sector address
127 * Setup Start Address 8 Register (F107h)
129 static int onenand_page_address(int page, int sector)
131 /* Flash Page Address, Flash Sector Address */
134 fpa = page & ONENAND_FPA_MASK;
135 fsa = sector & ONENAND_FSA_MASK;
137 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
141 * onenand_buffer_address - [DEFAULT] Get buffer address
142 * @param dataram1 DataRAM index
143 * @param sectors the sector address
144 * @param count the number of sectors
145 * @return the start buffer value
147 * Setup Start Buffer Register (F200h)
149 static int onenand_buffer_address(int dataram1, int sectors, int count)
153 /* BufferRAM Sector Address */
154 bsa = sectors & ONENAND_BSA_MASK;
157 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
159 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
161 /* BufferRAM Sector Count */
162 bsc = count & ONENAND_BSC_MASK;
164 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
168 * onenand_command - [DEFAULT] Send command to OneNAND device
169 * @param mtd MTD device structure
170 * @param cmd the command to be sent
171 * @param addr offset to read from or write to
172 * @param len number of bytes to read or write
174 * Send command to OneNAND device. This function is used for middle/large page
175 * devices (1KB/2KB Bytes per page)
177 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
179 struct onenand_chip *this = mtd->priv;
180 int value, readcmd = 0, block_cmd = 0;
183 /* Address translation */
185 case ONENAND_CMD_UNLOCK:
186 case ONENAND_CMD_LOCK:
187 case ONENAND_CMD_LOCK_TIGHT:
188 case ONENAND_CMD_UNLOCK_ALL:
193 case ONENAND_CMD_ERASE:
194 case ONENAND_CMD_BUFFERRAM:
195 case ONENAND_CMD_OTP_ACCESS:
197 block = (int) (addr >> this->erase_shift);
202 block = (int) (addr >> this->erase_shift);
203 page = (int) (addr >> this->page_shift);
204 page &= this->page_mask;
208 /* NOTE: The setting order of the registers is very important! */
209 if (cmd == ONENAND_CMD_BUFFERRAM) {
210 /* Select DataRAM for DDP */
211 value = onenand_bufferram_address(this, block);
212 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
214 /* Switch to the next data buffer */
215 ONENAND_SET_NEXT_BUFFERRAM(this);
221 /* Write 'DFS, FBA' of Flash */
222 value = onenand_block_address(this, block);
223 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
226 /* Select DataRAM for DDP */
227 value = onenand_bufferram_address(this, block);
228 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
233 /* Now we use page size operation */
234 int sectors = 4, count = 4;
238 case ONENAND_CMD_READ:
239 case ONENAND_CMD_READOOB:
240 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
245 dataram = ONENAND_CURRENT_BUFFERRAM(this);
249 /* Write 'FPA, FSA' of Flash */
250 value = onenand_page_address(page, sectors);
251 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
253 /* Write 'BSA, BSC' of DataRAM */
254 value = onenand_buffer_address(dataram, sectors, count);
255 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
258 /* Select DataRAM for DDP */
259 value = onenand_bufferram_address(this, block);
260 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
264 /* Interrupt clear */
265 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
268 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
274 * onenand_wait - [DEFAULT] wait until the command is done
275 * @param mtd MTD device structure
276 * @param state state to select the max. timeout value
278 * Wait for command done. This applies to all OneNAND command
279 * Read can take up to 30us, erase up to 2ms and program up to 350us
280 * according to general OneNAND specs
282 static int onenand_wait(struct mtd_info *mtd, int state)
284 struct onenand_chip * this = mtd->priv;
285 unsigned long timeout;
286 unsigned int flags = ONENAND_INT_MASTER;
287 unsigned int interrupt = 0;
290 /* The 20 msec is enough */
291 timeout = jiffies + msecs_to_jiffies(20);
292 while (time_before(jiffies, timeout)) {
293 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
295 if (interrupt & flags)
298 if (state != FL_READING)
301 /* To get correct interrupt status in timeout case */
302 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
304 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
306 if (ctrl & ONENAND_CTRL_ERROR) {
307 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
308 if (ctrl & ONENAND_CTRL_LOCK)
309 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error.\n");
313 if (interrupt & ONENAND_INT_READ) {
314 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
316 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
317 if (ecc & ONENAND_ECC_2BIT_ALL) {
318 mtd->ecc_stats.failed++;
320 } else if (ecc & ONENAND_ECC_1BIT_ALL)
321 mtd->ecc_stats.corrected++;
323 } else if (state == FL_READING) {
324 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
332 * onenand_interrupt - [DEFAULT] onenand interrupt handler
333 * @param irq onenand interrupt number
334 * @param dev_id interrupt data
338 static irqreturn_t onenand_interrupt(int irq, void *data)
340 struct onenand_chip *this = (struct onenand_chip *) data;
342 /* To handle shared interrupt */
343 if (!this->complete.done)
344 complete(&this->complete);
350 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
351 * @param mtd MTD device structure
352 * @param state state to select the max. timeout value
354 * Wait for command done.
356 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
358 struct onenand_chip *this = mtd->priv;
360 wait_for_completion(&this->complete);
362 return onenand_wait(mtd, state);
366 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
367 * @param mtd MTD device structure
368 * @param state state to select the max. timeout value
370 * Try interrupt based wait (It is used one-time)
372 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
374 struct onenand_chip *this = mtd->priv;
375 unsigned long remain, timeout;
377 /* We use interrupt wait first */
378 this->wait = onenand_interrupt_wait;
380 timeout = msecs_to_jiffies(100);
381 remain = wait_for_completion_timeout(&this->complete, timeout);
383 printk(KERN_INFO "OneNAND: There's no interrupt. "
384 "We use the normal wait\n");
386 /* Release the irq */
387 free_irq(this->irq, this);
389 this->wait = onenand_wait;
392 return onenand_wait(mtd, state);
396 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
397 * @param mtd MTD device structure
399 * There's two method to wait onenand work
400 * 1. polling - read interrupt status register
401 * 2. interrupt - use the kernel interrupt method
403 static void onenand_setup_wait(struct mtd_info *mtd)
405 struct onenand_chip *this = mtd->priv;
408 init_completion(&this->complete);
410 if (this->irq <= 0) {
411 this->wait = onenand_wait;
415 if (request_irq(this->irq, &onenand_interrupt,
416 IRQF_SHARED, "onenand", this)) {
417 /* If we can't get irq, use the normal wait */
418 this->wait = onenand_wait;
422 /* Enable interrupt */
423 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
424 syscfg |= ONENAND_SYS_CFG1_IOBE;
425 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
427 this->wait = onenand_try_interrupt_wait;
431 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
432 * @param mtd MTD data structure
433 * @param area BufferRAM area
434 * @return offset given area
436 * Return BufferRAM offset given area
438 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
440 struct onenand_chip *this = mtd->priv;
442 if (ONENAND_CURRENT_BUFFERRAM(this)) {
443 if (area == ONENAND_DATARAM)
444 return mtd->writesize;
445 if (area == ONENAND_SPARERAM)
453 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
454 * @param mtd MTD data structure
455 * @param area BufferRAM area
456 * @param buffer the databuffer to put/get data
457 * @param offset offset to read from or write to
458 * @param count number of bytes to read/write
460 * Read the BufferRAM area
462 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
463 unsigned char *buffer, int offset, size_t count)
465 struct onenand_chip *this = mtd->priv;
466 void __iomem *bufferram;
468 bufferram = this->base + area;
470 bufferram += onenand_bufferram_offset(mtd, area);
472 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
475 /* Align with word(16-bit) size */
478 /* Read word and save byte */
479 word = this->read_word(bufferram + offset + count);
480 buffer[count] = (word & 0xff);
483 memcpy(buffer, bufferram + offset, count);
489 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
490 * @param mtd MTD data structure
491 * @param area BufferRAM area
492 * @param buffer the databuffer to put/get data
493 * @param offset offset to read from or write to
494 * @param count number of bytes to read/write
496 * Read the BufferRAM area with Sync. Burst Mode
498 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
499 unsigned char *buffer, int offset, size_t count)
501 struct onenand_chip *this = mtd->priv;
502 void __iomem *bufferram;
504 bufferram = this->base + area;
506 bufferram += onenand_bufferram_offset(mtd, area);
508 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
510 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
513 /* Align with word(16-bit) size */
516 /* Read word and save byte */
517 word = this->read_word(bufferram + offset + count);
518 buffer[count] = (word & 0xff);
521 memcpy(buffer, bufferram + offset, count);
523 this->mmcontrol(mtd, 0);
529 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
530 * @param mtd MTD data structure
531 * @param area BufferRAM area
532 * @param buffer the databuffer to put/get data
533 * @param offset offset to read from or write to
534 * @param count number of bytes to read/write
536 * Write the BufferRAM area
538 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
539 const unsigned char *buffer, int offset, size_t count)
541 struct onenand_chip *this = mtd->priv;
542 void __iomem *bufferram;
544 bufferram = this->base + area;
546 bufferram += onenand_bufferram_offset(mtd, area);
548 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
552 /* Align with word(16-bit) size */
555 /* Calculate byte access offset */
556 byte_offset = offset + count;
558 /* Read word and save byte */
559 word = this->read_word(bufferram + byte_offset);
560 word = (word & ~0xff) | buffer[count];
561 this->write_word(word, bufferram + byte_offset);
564 memcpy(bufferram + offset, buffer, count);
570 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
571 * @param mtd MTD data structure
572 * @param addr address to check
573 * @return 1 if there are valid data, otherwise 0
575 * Check bufferram if there is data we required
577 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
579 struct onenand_chip *this = mtd->priv;
583 block = (int) (addr >> this->erase_shift);
584 page = (int) (addr >> this->page_shift) & this->page_mask;
586 i = ONENAND_CURRENT_BUFFERRAM(this);
588 /* Is there valid data? */
589 if (this->bufferram[i].block == block &&
590 this->bufferram[i].page == page &&
591 this->bufferram[i].valid)
598 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
599 * @param mtd MTD data structure
600 * @param addr address to update
601 * @param valid valid flag
603 * Update BufferRAM information
605 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
608 struct onenand_chip *this = mtd->priv;
612 block = (int) (addr >> this->erase_shift);
613 page = (int) (addr >> this->page_shift) & this->page_mask;
615 /* Invalidate BufferRAM */
616 for (i = 0; i < MAX_BUFFERRAM; i++) {
617 if (this->bufferram[i].block == block &&
618 this->bufferram[i].page == page)
619 this->bufferram[i].valid = 0;
622 /* Update BufferRAM */
623 i = ONENAND_CURRENT_BUFFERRAM(this);
624 this->bufferram[i].block = block;
625 this->bufferram[i].page = page;
626 this->bufferram[i].valid = valid;
632 * onenand_get_device - [GENERIC] Get chip for selected access
633 * @param mtd MTD device structure
634 * @param new_state the state which is requested
636 * Get the device and lock it for exclusive access
638 static int onenand_get_device(struct mtd_info *mtd, int new_state)
640 struct onenand_chip *this = mtd->priv;
641 DECLARE_WAITQUEUE(wait, current);
644 * Grab the lock and see if the device is available
647 spin_lock(&this->chip_lock);
648 if (this->state == FL_READY) {
649 this->state = new_state;
650 spin_unlock(&this->chip_lock);
653 if (new_state == FL_PM_SUSPENDED) {
654 spin_unlock(&this->chip_lock);
655 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
657 set_current_state(TASK_UNINTERRUPTIBLE);
658 add_wait_queue(&this->wq, &wait);
659 spin_unlock(&this->chip_lock);
661 remove_wait_queue(&this->wq, &wait);
668 * onenand_release_device - [GENERIC] release chip
669 * @param mtd MTD device structure
671 * Deselect, release chip lock and wake up anyone waiting on the device
673 static void onenand_release_device(struct mtd_info *mtd)
675 struct onenand_chip *this = mtd->priv;
677 /* Release the chip */
678 spin_lock(&this->chip_lock);
679 this->state = FL_READY;
681 spin_unlock(&this->chip_lock);
685 * onenand_read - [MTD Interface] Read data from flash
686 * @param mtd MTD device structure
687 * @param from offset to read from
688 * @param len number of bytes to read
689 * @param retlen pointer to variable to store the number of read bytes
690 * @param buf the databuffer to put data
694 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
695 size_t *retlen, u_char *buf)
697 struct onenand_chip *this = mtd->priv;
698 struct mtd_ecc_stats stats;
699 int read = 0, column;
701 int ret = 0, boundary = 0;
703 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
705 /* Do not allow reads past end of device */
706 if ((from + len) > mtd->size) {
707 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
712 /* Grab the lock and see if the device is available */
713 onenand_get_device(mtd, FL_READING);
715 stats = mtd->ecc_stats;
717 /* Read-while-load method */
719 /* Do first load to bufferRAM */
721 if (!onenand_check_bufferram(mtd, from)) {
722 this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
723 ret = this->wait(mtd, FL_READING);
724 onenand_update_bufferram(mtd, from, !ret);
728 thislen = min_t(int, mtd->writesize, len - read);
729 column = from & (mtd->writesize - 1);
730 if (column + thislen > mtd->writesize)
731 thislen = mtd->writesize - column;
734 /* If there is more to load then start next load */
736 if (read + thislen < len) {
737 this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
739 * Chip boundary handling in DDP
740 * Now we issued chip 1 read and pointed chip 1
741 * bufferam so we have to point chip 0 bufferam.
743 if (ONENAND_IS_DDP(this) &&
744 unlikely(from == (this->chipsize >> 1))) {
745 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
749 ONENAND_SET_PREV_BUFFERRAM(this);
751 /* While load is going, read from last bufferRAM */
752 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
753 /* See if we are done */
757 /* Set up for next read from bufferRAM */
758 if (unlikely(boundary))
759 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
760 ONENAND_SET_NEXT_BUFFERRAM(this);
762 thislen = min_t(int, mtd->writesize, len - read);
765 /* Now wait for load */
766 ret = this->wait(mtd, FL_READING);
767 onenand_update_bufferram(mtd, from, !ret);
770 /* Deselect and wake up anyone waiting on the device */
771 onenand_release_device(mtd);
774 * Return success, if no ECC failures, else -EBADMSG
775 * fs driver will take care of that, because
776 * retlen == desired len and result == -EBADMSG
780 if (mtd->ecc_stats.failed - stats.failed)
786 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
790 * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
791 * @param mtd MTD device structure
792 * @param from offset to read from
793 * @param len number of bytes to read
794 * @param retlen pointer to variable to store the number of read bytes
795 * @param buf the databuffer to put data
797 * OneNAND read out-of-band data from the spare area
799 int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
800 size_t *retlen, u_char *buf)
802 struct onenand_chip *this = mtd->priv;
803 int read = 0, thislen, column;
806 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
808 /* Initialize return length value */
811 /* Do not allow reads past end of device */
812 if (unlikely((from + len) > mtd->size)) {
813 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
817 /* Grab the lock and see if the device is available */
818 onenand_get_device(mtd, FL_READING);
820 column = from & (mtd->oobsize - 1);
825 thislen = mtd->oobsize - column;
826 thislen = min_t(int, thislen, len);
828 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
830 onenand_update_bufferram(mtd, from, 0);
832 ret = this->wait(mtd, FL_READING);
833 /* First copy data and check return value for ECC handling */
835 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
838 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = 0x%x\n", ret);
852 from += mtd->writesize;
858 /* Deselect and wake up anyone waiting on the device */
859 onenand_release_device(mtd);
866 * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
867 * @mtd: MTD device structure
868 * @from: offset to read from
869 * @ops: oob operation description structure
871 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
872 struct mtd_oob_ops *ops)
874 BUG_ON(ops->mode != MTD_OOB_PLACE);
876 return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
877 &ops->oobretlen, ops->oobbuf);
880 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
882 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
883 * @param mtd MTD device structure
884 * @param buf the databuffer to verify
885 * @param to offset to read from
886 * @param len number of bytes to read and compare
889 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len)
891 struct onenand_chip *this = mtd->priv;
892 char *readp = this->page_buf;
893 int column = to & (mtd->oobsize - 1);
896 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
897 onenand_update_bufferram(mtd, to, 0);
898 status = this->wait(mtd, FL_READING);
902 this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len);
904 for(i = 0; i < len; i++)
905 if (buf[i] != 0xFF && buf[i] != readp[i])
912 * onenand_verify - [GENERIC] verify the chip contents after a write
913 * @param mtd MTD device structure
914 * @param buf the databuffer to verify
915 * @param addr offset to read from
916 * @param len number of bytes to read and compare
919 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
921 struct onenand_chip *this = mtd->priv;
922 void __iomem *dataram;
927 thislen = min_t(int, mtd->writesize, len);
928 column = addr & (mtd->writesize - 1);
929 if (column + thislen > mtd->writesize)
930 thislen = mtd->writesize - column;
932 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
934 onenand_update_bufferram(mtd, addr, 0);
936 ret = this->wait(mtd, FL_READING);
940 onenand_update_bufferram(mtd, addr, 1);
942 dataram = this->base + ONENAND_DATARAM;
943 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
945 if (memcmp(buf, dataram + column, thislen))
956 #define onenand_verify(...) (0)
957 #define onenand_verify_oob(...) (0)
960 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
963 * onenand_write - [MTD Interface] write buffer to FLASH
964 * @param mtd MTD device structure
965 * @param to offset to write to
966 * @param len number of bytes to write
967 * @param retlen pointer to variable to store the number of written bytes
968 * @param buf the data to write
972 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
973 size_t *retlen, const u_char *buf)
975 struct onenand_chip *this = mtd->priv;
980 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
982 /* Initialize retlen, in case of early exit */
985 /* Do not allow writes past end of device */
986 if (unlikely((to + len) > mtd->size)) {
987 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
991 /* Reject writes, which are not page aligned */
992 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
993 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
997 column = to & (mtd->writesize - 1);
998 subpage = column || (len & (mtd->writesize - 1));
1000 /* Grab the lock and see if the device is available */
1001 onenand_get_device(mtd, FL_WRITING);
1003 /* Loop until all data write */
1004 while (written < len) {
1005 int bytes = mtd->writesize;
1006 int thislen = min_t(int, bytes, len - written);
1007 u_char *wbuf = (u_char *) buf;
1011 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, bytes);
1013 /* Partial page write */
1015 bytes = min_t(int, bytes - column, (int) len);
1016 memset(this->page_buf, 0xff, mtd->writesize);
1017 memcpy(this->page_buf + column, buf, bytes);
1018 wbuf = this->page_buf;
1019 /* Even though partial write, we need page size */
1020 thislen = mtd->writesize;
1023 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, thislen);
1024 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1026 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1028 /* In partial page write we don't update bufferram */
1029 onenand_update_bufferram(mtd, to, !subpage);
1031 ret = this->wait(mtd, FL_WRITING);
1033 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
1037 /* Only check verify write turn on */
1038 ret = onenand_verify(mtd, (u_char *) wbuf, to, thislen);
1040 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
1054 /* Deselect and wake up anyone waiting on the device */
1055 onenand_release_device(mtd);
1063 * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1064 * @param mtd MTD device structure
1065 * @param to offset to write to
1066 * @param len number of bytes to write
1067 * @param retlen pointer to variable to store the number of written bytes
1068 * @param buf the data to write
1070 * OneNAND write out-of-band
1072 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1073 size_t *retlen, const u_char *buf)
1075 struct onenand_chip *this = mtd->priv;
1076 int column, ret = 0;
1079 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1081 /* Initialize retlen, in case of early exit */
1084 /* Do not allow writes past end of device */
1085 if (unlikely((to + len) > mtd->size)) {
1086 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
1090 /* Grab the lock and see if the device is available */
1091 onenand_get_device(mtd, FL_WRITING);
1093 /* Loop until all data write */
1094 while (written < len) {
1095 int thislen = min_t(int, mtd->oobsize, len - written);
1099 column = to & (mtd->oobsize - 1);
1101 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1103 /* We send data to spare ram with oobsize
1104 * to prevent byte access */
1105 memset(this->page_buf, 0xff, mtd->oobsize);
1106 memcpy(this->page_buf + column, buf, thislen);
1107 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
1109 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1111 onenand_update_bufferram(mtd, to, 0);
1113 ret = this->wait(mtd, FL_WRITING);
1115 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret);
1119 ret = onenand_verify_oob(mtd, buf, to, thislen);
1121 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
1135 /* Deselect and wake up anyone waiting on the device */
1136 onenand_release_device(mtd);
1144 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1145 * @mtd: MTD device structure
1146 * @from: offset to read from
1147 * @ops: oob operation description structure
1149 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1150 struct mtd_oob_ops *ops)
1152 BUG_ON(ops->mode != MTD_OOB_PLACE);
1154 return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
1155 &ops->oobretlen, ops->oobbuf);
1159 * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1160 * @param mtd MTD device structure
1161 * @param ofs offset from device start
1162 * @param getchip 0, if the chip is already selected
1163 * @param allowbbt 1, if its allowed to access the bbt area
1165 * Check, if the block is bad. Either by reading the bad block table or
1166 * calling of the scan function.
1168 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1170 struct onenand_chip *this = mtd->priv;
1171 struct bbm_info *bbm = this->bbm;
1173 /* Return info from the table */
1174 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1178 * onenand_erase - [MTD Interface] erase block(s)
1179 * @param mtd MTD device structure
1180 * @param instr erase instruction
1182 * Erase one ore more blocks
1184 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1186 struct onenand_chip *this = mtd->priv;
1187 unsigned int block_size;
1192 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1194 block_size = (1 << this->erase_shift);
1196 /* Start address must align on block boundary */
1197 if (unlikely(instr->addr & (block_size - 1))) {
1198 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1202 /* Length must align on block boundary */
1203 if (unlikely(instr->len & (block_size - 1))) {
1204 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1208 /* Do not allow erase past end of device */
1209 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1210 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1214 instr->fail_addr = 0xffffffff;
1216 /* Grab the lock and see if the device is available */
1217 onenand_get_device(mtd, FL_ERASING);
1219 /* Loop throught the pages */
1223 instr->state = MTD_ERASING;
1228 /* Check if we have a bad block, we do not erase bad blocks */
1229 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1230 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1231 instr->state = MTD_ERASE_FAILED;
1235 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1237 ret = this->wait(mtd, FL_ERASING);
1238 /* Check, if it is write protected */
1240 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1241 instr->state = MTD_ERASE_FAILED;
1242 instr->fail_addr = addr;
1250 instr->state = MTD_ERASE_DONE;
1254 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1255 /* Do call back function */
1257 mtd_erase_callback(instr);
1259 /* Deselect and wake up anyone waiting on the device */
1260 onenand_release_device(mtd);
1266 * onenand_sync - [MTD Interface] sync
1267 * @param mtd MTD device structure
1269 * Sync is actually a wait for chip ready function
1271 static void onenand_sync(struct mtd_info *mtd)
1273 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1275 /* Grab the lock and see if the device is available */
1276 onenand_get_device(mtd, FL_SYNCING);
1278 /* Release it and go back */
1279 onenand_release_device(mtd);
1283 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1284 * @param mtd MTD device structure
1285 * @param ofs offset relative to mtd start
1287 * Check whether the block is bad
1289 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1291 /* Check for invalid offset */
1292 if (ofs > mtd->size)
1295 return onenand_block_checkbad(mtd, ofs, 1, 0);
1299 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1300 * @param mtd MTD device structure
1301 * @param ofs offset from device start
1303 * This is the default implementation, which can be overridden by
1304 * a hardware specific driver.
1306 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1308 struct onenand_chip *this = mtd->priv;
1309 struct bbm_info *bbm = this->bbm;
1310 u_char buf[2] = {0, 0};
1314 /* Get block number */
1315 block = ((int) ofs) >> bbm->bbt_erase_shift;
1317 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1319 /* We write two bytes, so we dont have to mess with 16 bit access */
1320 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1321 return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf);
1325 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1326 * @param mtd MTD device structure
1327 * @param ofs offset relative to mtd start
1329 * Mark the block as bad
1331 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1333 struct onenand_chip *this = mtd->priv;
1336 ret = onenand_block_isbad(mtd, ofs);
1338 /* If it was bad already, return success and do nothing */
1344 return this->block_markbad(mtd, ofs);
1348 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1349 * @param mtd MTD device structure
1350 * @param ofs offset relative to mtd start
1351 * @param len number of bytes to lock or unlock
1353 * Lock or unlock one or more blocks
1355 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1357 struct onenand_chip *this = mtd->priv;
1358 int start, end, block, value, status;
1361 start = ofs >> this->erase_shift;
1362 end = len >> this->erase_shift;
1364 if (cmd == ONENAND_CMD_LOCK)
1365 wp_status_mask = ONENAND_WP_LS;
1367 wp_status_mask = ONENAND_WP_US;
1369 /* Continuous lock scheme */
1370 if (this->options & ONENAND_HAS_CONT_LOCK) {
1371 /* Set start block address */
1372 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1373 /* Set end block address */
1374 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1375 /* Write lock command */
1376 this->command(mtd, cmd, 0, 0);
1378 /* There's no return value */
1379 this->wait(mtd, FL_LOCKING);
1382 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1383 & ONENAND_CTRL_ONGO)
1386 /* Check lock status */
1387 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1388 if (!(status & wp_status_mask))
1389 printk(KERN_ERR "wp status = 0x%x\n", status);
1394 /* Block lock scheme */
1395 for (block = start; block < start + end; block++) {
1396 /* Set block address */
1397 value = onenand_block_address(this, block);
1398 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1399 /* Select DataRAM for DDP */
1400 value = onenand_bufferram_address(this, block);
1401 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1402 /* Set start block address */
1403 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1404 /* Write lock command */
1405 this->command(mtd, cmd, 0, 0);
1407 /* There's no return value */
1408 this->wait(mtd, FL_LOCKING);
1411 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1412 & ONENAND_CTRL_ONGO)
1415 /* Check lock status */
1416 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1417 if (!(status & wp_status_mask))
1418 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1425 * onenand_lock - [MTD Interface] Lock block(s)
1426 * @param mtd MTD device structure
1427 * @param ofs offset relative to mtd start
1428 * @param len number of bytes to unlock
1430 * Lock one or more blocks
1432 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1434 return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1438 * onenand_unlock - [MTD Interface] Unlock block(s)
1439 * @param mtd MTD device structure
1440 * @param ofs offset relative to mtd start
1441 * @param len number of bytes to unlock
1443 * Unlock one or more blocks
1445 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1447 return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1451 * onenand_check_lock_status - [OneNAND Interface] Check lock status
1452 * @param this onenand chip data structure
1456 static void onenand_check_lock_status(struct onenand_chip *this)
1458 unsigned int value, block, status;
1461 end = this->chipsize >> this->erase_shift;
1462 for (block = 0; block < end; block++) {
1463 /* Set block address */
1464 value = onenand_block_address(this, block);
1465 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1466 /* Select DataRAM for DDP */
1467 value = onenand_bufferram_address(this, block);
1468 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1469 /* Set start block address */
1470 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1472 /* Check lock status */
1473 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1474 if (!(status & ONENAND_WP_US))
1475 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1480 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1481 * @param mtd MTD device structure
1485 static int onenand_unlock_all(struct mtd_info *mtd)
1487 struct onenand_chip *this = mtd->priv;
1489 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1490 /* Set start block address */
1491 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1492 /* Write unlock command */
1493 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1495 /* There's no return value */
1496 this->wait(mtd, FL_LOCKING);
1499 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1500 & ONENAND_CTRL_ONGO)
1503 /* Workaround for all block unlock in DDP */
1504 if (ONENAND_IS_DDP(this)) {
1505 /* 1st block on another chip */
1506 loff_t ofs = this->chipsize >> 1;
1507 size_t len = mtd->erasesize;
1509 onenand_unlock(mtd, ofs, len);
1512 onenand_check_lock_status(this);
1517 onenand_unlock(mtd, 0x0, this->chipsize);
1522 #ifdef CONFIG_MTD_ONENAND_OTP
1524 /* Interal OTP operation */
1525 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1526 size_t *retlen, u_char *buf);
1529 * do_otp_read - [DEFAULT] Read OTP block area
1530 * @param mtd MTD device structure
1531 * @param from The offset to read
1532 * @param len number of bytes to read
1533 * @param retlen pointer to variable to store the number of readbytes
1534 * @param buf the databuffer to put/get data
1536 * Read OTP block area.
1538 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1539 size_t *retlen, u_char *buf)
1541 struct onenand_chip *this = mtd->priv;
1544 /* Enter OTP access mode */
1545 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1546 this->wait(mtd, FL_OTPING);
1548 ret = mtd->read(mtd, from, len, retlen, buf);
1550 /* Exit OTP access mode */
1551 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1552 this->wait(mtd, FL_RESETING);
1558 * do_otp_write - [DEFAULT] Write OTP block area
1559 * @param mtd MTD device structure
1560 * @param from The offset to write
1561 * @param len number of bytes to write
1562 * @param retlen pointer to variable to store the number of write bytes
1563 * @param buf the databuffer to put/get data
1565 * Write OTP block area.
1567 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1568 size_t *retlen, u_char *buf)
1570 struct onenand_chip *this = mtd->priv;
1571 unsigned char *pbuf = buf;
1574 /* Force buffer page aligned */
1575 if (len < mtd->writesize) {
1576 memcpy(this->page_buf, buf, len);
1577 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1578 pbuf = this->page_buf;
1579 len = mtd->writesize;
1582 /* Enter OTP access mode */
1583 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1584 this->wait(mtd, FL_OTPING);
1586 ret = mtd->write(mtd, from, len, retlen, pbuf);
1588 /* Exit OTP access mode */
1589 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1590 this->wait(mtd, FL_RESETING);
1596 * do_otp_lock - [DEFAULT] Lock OTP block area
1597 * @param mtd MTD device structure
1598 * @param from The offset to lock
1599 * @param len number of bytes to lock
1600 * @param retlen pointer to variable to store the number of lock bytes
1601 * @param buf the databuffer to put/get data
1603 * Lock OTP block area.
1605 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1606 size_t *retlen, u_char *buf)
1608 struct onenand_chip *this = mtd->priv;
1611 /* Enter OTP access mode */
1612 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1613 this->wait(mtd, FL_OTPING);
1615 ret = onenand_do_write_oob(mtd, from, len, retlen, buf);
1617 /* Exit OTP access mode */
1618 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1619 this->wait(mtd, FL_RESETING);
1625 * onenand_otp_walk - [DEFAULT] Handle OTP operation
1626 * @param mtd MTD device structure
1627 * @param from The offset to read/write
1628 * @param len number of bytes to read/write
1629 * @param retlen pointer to variable to store the number of read bytes
1630 * @param buf the databuffer to put/get data
1631 * @param action do given action
1632 * @param mode specify user and factory
1634 * Handle OTP operation.
1636 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1637 size_t *retlen, u_char *buf,
1638 otp_op_t action, int mode)
1640 struct onenand_chip *this = mtd->priv;
1647 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1648 if (density < ONENAND_DEVICE_DENSITY_512Mb)
1653 if (mode == MTD_OTP_FACTORY) {
1654 from += mtd->writesize * otp_pages;
1655 otp_pages = 64 - otp_pages;
1658 /* Check User/Factory boundary */
1659 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1662 while (len > 0 && otp_pages > 0) {
1663 if (!action) { /* OTP Info functions */
1664 struct otp_info *otpinfo;
1666 len -= sizeof(struct otp_info);
1670 otpinfo = (struct otp_info *) buf;
1671 otpinfo->start = from;
1672 otpinfo->length = mtd->writesize;
1673 otpinfo->locked = 0;
1675 from += mtd->writesize;
1676 buf += sizeof(struct otp_info);
1677 *retlen += sizeof(struct otp_info);
1682 ret = action(mtd, from, len, &tmp_retlen, buf);
1698 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1699 * @param mtd MTD device structure
1700 * @param buf the databuffer to put/get data
1701 * @param len number of bytes to read
1703 * Read factory OTP info.
1705 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1706 struct otp_info *buf, size_t len)
1711 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1713 return ret ? : retlen;
1717 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1718 * @param mtd MTD device structure
1719 * @param from The offset to read
1720 * @param len number of bytes to read
1721 * @param retlen pointer to variable to store the number of read bytes
1722 * @param buf the databuffer to put/get data
1724 * Read factory OTP area.
1726 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1727 size_t len, size_t *retlen, u_char *buf)
1729 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1733 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1734 * @param mtd MTD device structure
1735 * @param buf the databuffer to put/get data
1736 * @param len number of bytes to read
1738 * Read user OTP info.
1740 static int onenand_get_user_prot_info(struct mtd_info *mtd,
1741 struct otp_info *buf, size_t len)
1746 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1748 return ret ? : retlen;
1752 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1753 * @param mtd MTD device structure
1754 * @param from The offset to read
1755 * @param len number of bytes to read
1756 * @param retlen pointer to variable to store the number of read bytes
1757 * @param buf the databuffer to put/get data
1759 * Read user OTP area.
1761 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1762 size_t len, size_t *retlen, u_char *buf)
1764 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1768 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
1769 * @param mtd MTD device structure
1770 * @param from The offset to write
1771 * @param len number of bytes to write
1772 * @param retlen pointer to variable to store the number of write bytes
1773 * @param buf the databuffer to put/get data
1775 * Write user OTP area.
1777 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
1778 size_t len, size_t *retlen, u_char *buf)
1780 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
1784 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
1785 * @param mtd MTD device structure
1786 * @param from The offset to lock
1787 * @param len number of bytes to unlock
1789 * Write lock mark on spare area in page 0 in OTP block
1791 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
1794 unsigned char oob_buf[64];
1798 memset(oob_buf, 0xff, mtd->oobsize);
1800 * Note: OTP lock operation
1801 * OTP block : 0xXXFC
1802 * 1st block : 0xXXF3 (If chip support)
1803 * Both : 0xXXF0 (If chip support)
1805 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
1808 * Write lock mark to 8th word of sector0 of page0 of the spare0.
1809 * We write 16 bytes spare area instead of 2 bytes.
1814 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
1816 return ret ? : retlen;
1818 #endif /* CONFIG_MTD_ONENAND_OTP */
1821 * onenand_check_features - Check and set OneNAND features
1822 * @param mtd MTD data structure
1824 * Check and set OneNAND features
1827 static void onenand_check_features(struct mtd_info *mtd)
1829 struct onenand_chip *this = mtd->priv;
1830 unsigned int density, process;
1832 /* Lock scheme depends on density and process */
1833 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1834 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
1837 if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
1838 /* A-Die has all block unlock */
1840 printk(KERN_DEBUG "Chip support all block unlock\n");
1841 this->options |= ONENAND_HAS_UNLOCK_ALL;
1844 /* Some OneNAND has continues lock scheme */
1846 printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
1847 this->options |= ONENAND_HAS_CONT_LOCK;
1853 * onenand_print_device_info - Print device ID
1854 * @param device device ID
1858 static void onenand_print_device_info(int device, int version)
1860 int vcc, demuxed, ddp, density;
1862 vcc = device & ONENAND_DEVICE_VCC_MASK;
1863 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1864 ddp = device & ONENAND_DEVICE_IS_DDP;
1865 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1866 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1867 demuxed ? "" : "Muxed ",
1870 vcc ? "2.65/3.3" : "1.8",
1872 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
1875 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1876 {ONENAND_MFR_SAMSUNG, "Samsung"},
1880 * onenand_check_maf - Check manufacturer ID
1881 * @param manuf manufacturer ID
1883 * Check manufacturer ID
1885 static int onenand_check_maf(int manuf)
1887 int size = ARRAY_SIZE(onenand_manuf_ids);
1891 for (i = 0; i < size; i++)
1892 if (manuf == onenand_manuf_ids[i].id)
1896 name = onenand_manuf_ids[i].name;
1900 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1906 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1907 * @param mtd MTD device structure
1909 * OneNAND detection method:
1910 * Compare the the values from command with ones from register
1912 static int onenand_probe(struct mtd_info *mtd)
1914 struct onenand_chip *this = mtd->priv;
1915 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
1919 /* Save system configuration 1 */
1920 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
1921 /* Clear Sync. Burst Read mode to read BootRAM */
1922 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
1924 /* Send the command for reading device ID from BootRAM */
1925 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1927 /* Read manufacturer and device IDs from BootRAM */
1928 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1929 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1931 /* Reset OneNAND to read default register values */
1932 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1934 this->wait(mtd, FL_RESETING);
1936 /* Restore system configuration 1 */
1937 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
1939 /* Check manufacturer ID */
1940 if (onenand_check_maf(bram_maf_id))
1943 /* Read manufacturer and device IDs from Register */
1944 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1945 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1946 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1948 /* Check OneNAND device */
1949 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1952 /* Flash device information */
1953 onenand_print_device_info(dev_id, ver_id);
1954 this->device_id = dev_id;
1955 this->version_id = ver_id;
1957 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1958 this->chipsize = (16 << density) << 20;
1959 /* Set density mask. it is used for DDP */
1960 if (ONENAND_IS_DDP(this))
1961 this->density_mask = (1 << (density + 6));
1963 this->density_mask = 0;
1965 /* OneNAND page size & block size */
1966 /* The data buffer size is equal to page size */
1967 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1968 mtd->oobsize = mtd->writesize >> 5;
1969 /* Pagers per block is always 64 in OneNAND */
1970 mtd->erasesize = mtd->writesize << 6;
1972 this->erase_shift = ffs(mtd->erasesize) - 1;
1973 this->page_shift = ffs(mtd->writesize) - 1;
1974 this->ppb_shift = (this->erase_shift - this->page_shift);
1975 this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
1977 /* REVIST: Multichip handling */
1979 mtd->size = this->chipsize;
1981 /* Check OneNAND features */
1982 onenand_check_features(mtd);
1988 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1989 * @param mtd MTD device structure
1991 static int onenand_suspend(struct mtd_info *mtd)
1993 return onenand_get_device(mtd, FL_PM_SUSPENDED);
1997 * onenand_resume - [MTD Interface] Resume the OneNAND flash
1998 * @param mtd MTD device structure
2000 static void onenand_resume(struct mtd_info *mtd)
2002 struct onenand_chip *this = mtd->priv;
2004 if (this->state == FL_PM_SUSPENDED)
2005 onenand_release_device(mtd);
2007 printk(KERN_ERR "resume() called for the chip which is not"
2008 "in suspended state\n");
2012 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2013 * @param mtd MTD device structure
2014 * @param maxchips Number of chips to scan for
2016 * This fills out all the not initialized function pointers
2017 * with the defaults.
2018 * The flash ID is read and the mtd/chip structures are
2019 * filled with the appropriate values.
2021 int onenand_scan(struct mtd_info *mtd, int maxchips)
2023 struct onenand_chip *this = mtd->priv;
2025 if (!this->read_word)
2026 this->read_word = onenand_readw;
2027 if (!this->write_word)
2028 this->write_word = onenand_writew;
2031 this->command = onenand_command;
2033 onenand_setup_wait(mtd);
2035 if (!this->read_bufferram)
2036 this->read_bufferram = onenand_read_bufferram;
2037 if (!this->write_bufferram)
2038 this->write_bufferram = onenand_write_bufferram;
2040 if (!this->block_markbad)
2041 this->block_markbad = onenand_default_block_markbad;
2042 if (!this->scan_bbt)
2043 this->scan_bbt = onenand_default_bbt;
2045 if (onenand_probe(mtd))
2048 /* Set Sync. Burst Read after probing */
2049 if (this->mmcontrol) {
2050 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2051 this->read_bufferram = onenand_sync_read_bufferram;
2054 /* Allocate buffers, if necessary */
2055 if (!this->page_buf) {
2057 len = mtd->writesize + mtd->oobsize;
2058 this->page_buf = kmalloc(len, GFP_KERNEL);
2059 if (!this->page_buf) {
2060 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2063 this->options |= ONENAND_PAGEBUF_ALLOC;
2066 this->state = FL_READY;
2067 init_waitqueue_head(&this->wq);
2068 spin_lock_init(&this->chip_lock);
2071 * Allow subpage writes up to oobsize.
2073 switch (mtd->oobsize) {
2075 this->ecclayout = &onenand_oob_64;
2076 mtd->subpage_sft = 2;
2080 this->ecclayout = &onenand_oob_32;
2081 mtd->subpage_sft = 1;
2085 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2087 mtd->subpage_sft = 0;
2088 /* To prevent kernel oops */
2089 this->ecclayout = &onenand_oob_32;
2093 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2094 mtd->ecclayout = this->ecclayout;
2096 /* Fill in remaining MTD driver data */
2097 mtd->type = MTD_NANDFLASH;
2098 mtd->flags = MTD_CAP_NANDFLASH;
2099 mtd->ecctype = MTD_ECC_SW;
2100 mtd->erase = onenand_erase;
2102 mtd->unpoint = NULL;
2103 mtd->read = onenand_read;
2104 mtd->write = onenand_write;
2105 mtd->read_oob = onenand_read_oob;
2106 mtd->write_oob = onenand_write_oob;
2107 #ifdef CONFIG_MTD_ONENAND_OTP
2108 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2109 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2110 mtd->get_user_prot_info = onenand_get_user_prot_info;
2111 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2112 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2113 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2115 mtd->sync = onenand_sync;
2116 mtd->lock = onenand_lock;
2117 mtd->unlock = onenand_unlock;
2118 mtd->suspend = onenand_suspend;
2119 mtd->resume = onenand_resume;
2120 mtd->block_isbad = onenand_block_isbad;
2121 mtd->block_markbad = onenand_block_markbad;
2122 mtd->owner = THIS_MODULE;
2124 /* Unlock whole block */
2125 onenand_unlock_all(mtd);
2127 return this->scan_bbt(mtd);
2131 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2132 * @param mtd MTD device structure
2134 void onenand_release(struct mtd_info *mtd)
2136 struct onenand_chip *this = mtd->priv;
2138 #ifdef CONFIG_MTD_PARTITIONS
2139 /* Deregister partitions */
2140 del_mtd_partitions (mtd);
2142 /* Deregister the device */
2143 del_mtd_device (mtd);
2145 /* Free bad block table memory, if allocated */
2147 struct bbm_info *bbm = this->bbm;
2151 /* Buffer allocated by onenand_scan */
2152 if (this->options & ONENAND_PAGEBUF_ALLOC)
2153 kfree(this->page_buf);
2156 EXPORT_SYMBOL_GPL(onenand_scan);
2157 EXPORT_SYMBOL_GPL(onenand_release);
2159 MODULE_LICENSE("GPL");
2160 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2161 MODULE_DESCRIPTION("Generic OneNAND flash driver code");