err.no Git - linux-2.6/blob - drivers/mtd/onenand/onenand_base.c

   1 /*
   2  *  linux/drivers/mtd/onenand/onenand_base.c
   3  *
   4  *  Copyright (C) 2005-2006 Samsung Electronics
   5  *  Kyungmin Park <kyungmin.park@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/sched.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/jiffies.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/onenand.h>
  20 #include <linux/mtd/partitions.h>
  21
  22 #include <asm/io.h>
  23
  24 /**
  25  * onenand_oob_64 - oob info for large (2KB) page
  26  */
  27 static struct nand_ecclayout onenand_oob_64 = {
  28         .eccbytes       = 20,
  29         .eccpos         = {
  30                 8, 9, 10, 11, 12,
  31                 24, 25, 26, 27, 28,
  32                 40, 41, 42, 43, 44,
  33                 56, 57, 58, 59, 60,
  34                 },
  35         .oobfree        = {
  36                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
  37                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
  38         }
  39 };
  40
  41 /**
  42  * onenand_oob_32 - oob info for middle (1KB) page
  43  */
  44 static struct nand_ecclayout onenand_oob_32 = {
  45         .eccbytes       = 10,
  46         .eccpos         = {
  47                 8, 9, 10, 11, 12,
  48                 24, 25, 26, 27, 28,
  49                 },
  50         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  51 };
  52
  53 static const unsigned char ffchars[] = {
  54         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  55         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  56         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  57         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  58         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  62 };
  63
  64 /**
  65  * onenand_readw - [OneNAND Interface] Read OneNAND register
  66  * @param addr          address to read
  67  *
  68  * Read OneNAND register
  69  */
  70 static unsigned short onenand_readw(void __iomem *addr)
  71 {
  72         return readw(addr);
  73 }
  74
  75 /**
  76  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  77  * @param value         value to write
  78  * @param addr          address to write
  79  *
  80  * Write OneNAND register with value
  81  */
  82 static void onenand_writew(unsigned short value, void __iomem *addr)
  83 {
  84         writew(value, addr);
  85 }
  86
  87 /**
  88  * onenand_block_address - [DEFAULT] Get block address
  89  * @param this          onenand chip data structure
  90  * @param block         the block
  91  * @return              translated block address if DDP, otherwise same
  92  *
  93  * Setup Start Address 1 Register (F100h)
  94  */
  95 static int onenand_block_address(struct onenand_chip *this, int block)
  96 {
  97         if (this->device_id & ONENAND_DEVICE_IS_DDP) {
  98                 /* Device Flash Core select, NAND Flash Block Address */
  99                 int dfs = 0;
 100
 101                 if (block & this->density_mask)
 102                         dfs = 1;
 103
 104                 return (dfs << ONENAND_DDP_SHIFT) |
 105                         (block & (this->density_mask - 1));
 106         }
 107
 108         return block;
 109 }
 110
 111 /**
 112  * onenand_bufferram_address - [DEFAULT] Get bufferram address
 113  * @param this          onenand chip data structure
 114  * @param block         the block
 115  * @return              set DBS value if DDP, otherwise 0
 116  *
 117  * Setup Start Address 2 Register (F101h) for DDP
 118  */
 119 static int onenand_bufferram_address(struct onenand_chip *this, int block)
 120 {
 121         if (this->device_id & ONENAND_DEVICE_IS_DDP) {
 122                 /* Device BufferRAM Select */
 123                 int dbs = 0;
 124
 125                 if (block & this->density_mask)
 126                         dbs = 1;
 127
 128                 return (dbs << ONENAND_DDP_SHIFT);
 129         }
 130
 131         return 0;
 132 }
 133
 134 /**
 135  * onenand_page_address - [DEFAULT] Get page address
 136  * @param page          the page address
 137  * @param sector        the sector address
 138  * @return              combined page and sector address
 139  *
 140  * Setup Start Address 8 Register (F107h)
 141  */
 142 static int onenand_page_address(int page, int sector)
 143 {
 144         /* Flash Page Address, Flash Sector Address */
 145         int fpa, fsa;
 146
 147         fpa = page & ONENAND_FPA_MASK;
 148         fsa = sector & ONENAND_FSA_MASK;
 149
 150         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
 151 }
 152
 153 /**
 154  * onenand_buffer_address - [DEFAULT] Get buffer address
 155  * @param dataram1      DataRAM index
 156  * @param sectors       the sector address
 157  * @param count         the number of sectors
 158  * @return              the start buffer value
 159  *
 160  * Setup Start Buffer Register (F200h)
 161  */
 162 static int onenand_buffer_address(int dataram1, int sectors, int count)
 163 {
 164         int bsa, bsc;
 165
 166         /* BufferRAM Sector Address */
 167         bsa = sectors & ONENAND_BSA_MASK;
 168
 169         if (dataram1)
 170                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
 171         else
 172                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
 173
 174         /* BufferRAM Sector Count */
 175         bsc = count & ONENAND_BSC_MASK;
 176
 177         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
 178 }
 179
 180 /**
 181  * onenand_command - [DEFAULT] Send command to OneNAND device
 182  * @param mtd           MTD device structure
 183  * @param cmd           the command to be sent
 184  * @param addr          offset to read from or write to
 185  * @param len           number of bytes to read or write
 186  *
 187  * Send command to OneNAND device. This function is used for middle/large page
 188  * devices (1KB/2KB Bytes per page)
 189  */
 190 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
 191 {
 192         struct onenand_chip *this = mtd->priv;
 193         int value, readcmd = 0, block_cmd = 0;
 194         int block, page;
 195
 196         /* Address translation */
 197         switch (cmd) {
 198         case ONENAND_CMD_UNLOCK:
 199         case ONENAND_CMD_LOCK:
 200         case ONENAND_CMD_LOCK_TIGHT:
 201         case ONENAND_CMD_UNLOCK_ALL:
 202                 block = -1;
 203                 page = -1;
 204                 break;
 205
 206         case ONENAND_CMD_ERASE:
 207         case ONENAND_CMD_BUFFERRAM:
 208         case ONENAND_CMD_OTP_ACCESS:
 209                 block_cmd = 1;
 210                 block = (int) (addr >> this->erase_shift);
 211                 page = -1;
 212                 break;
 213
 214         default:
 215                 block = (int) (addr >> this->erase_shift);
 216                 page = (int) (addr >> this->page_shift);
 217                 page &= this->page_mask;
 218                 break;
 219         }
 220
 221         /* NOTE: The setting order of the registers is very important! */
 222         if (cmd == ONENAND_CMD_BUFFERRAM) {
 223                 /* Select DataRAM for DDP */
 224                 value = onenand_bufferram_address(this, block);
 225                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 226
 227                 /* Switch to the next data buffer */
 228                 ONENAND_SET_NEXT_BUFFERRAM(this);
 229
 230                 return 0;
 231         }
 232
 233         if (block != -1) {
 234                 /* Write 'DFS, FBA' of Flash */
 235                 value = onenand_block_address(this, block);
 236                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
 237
 238                 if (block_cmd) {
 239                         /* Select DataRAM for DDP */
 240                         value = onenand_bufferram_address(this, block);
 241                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 242                 }
 243         }
 244
 245         if (page != -1) {
 246                 /* Now we use page size operation */
 247                 int sectors = 4, count = 4;
 248                 int dataram;
 249
 250                 switch (cmd) {
 251                 case ONENAND_CMD_READ:
 252                 case ONENAND_CMD_READOOB:
 253                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
 254                         readcmd = 1;
 255                         break;
 256
 257                 default:
 258                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
 259                         break;
 260                 }
 261
 262                 /* Write 'FPA, FSA' of Flash */
 263                 value = onenand_page_address(page, sectors);
 264                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
 265
 266                 /* Write 'BSA, BSC' of DataRAM */
 267                 value = onenand_buffer_address(dataram, sectors, count);
 268                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
 269
 270                 if (readcmd) {
 271                         /* Select DataRAM for DDP */
 272                         value = onenand_bufferram_address(this, block);
 273                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 274                 }
 275         }
 276
 277         /* Interrupt clear */
 278         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
 279
 280         /* Write command */
 281         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
 282
 283         return 0;
 284 }
 285
 286 /**
 287  * onenand_wait - [DEFAULT] wait until the command is done
 288  * @param mtd           MTD device structure
 289  * @param state         state to select the max. timeout value
 290  *
 291  * Wait for command done. This applies to all OneNAND command
 292  * Read can take up to 30us, erase up to 2ms and program up to 350us
 293  * according to general OneNAND specs
 294  */
 295 static int onenand_wait(struct mtd_info *mtd, int state)
 296 {
 297         struct onenand_chip * this = mtd->priv;
 298         unsigned long timeout;
 299         unsigned int flags = ONENAND_INT_MASTER;
 300         unsigned int interrupt = 0;
 301         unsigned int ctrl, ecc;
 302
 303         /* The 20 msec is enough */
 304         timeout = jiffies + msecs_to_jiffies(20);
 305         while (time_before(jiffies, timeout)) {
 306                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 307
 308                 if (interrupt & flags)
 309                         break;
 310
 311                 if (state != FL_READING)
 312                         cond_resched();
 313         }
 314         /* To get correct interrupt status in timeout case */
 315         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 316
 317         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 318
 319         if (ctrl & ONENAND_CTRL_ERROR) {
 320                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
 321                 if (ctrl & ONENAND_CTRL_LOCK)
 322                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error.\n");
 323                 return ctrl;
 324         }
 325
 326         if (interrupt & ONENAND_INT_READ) {
 327                 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 328                 if (ecc) {
 329                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
 330                         if (ecc & ONENAND_ECC_2BIT_ALL)
 331                                 mtd->ecc_stats.failed++;
 332                         else if (ecc & ONENAND_ECC_1BIT_ALL)
 333                                 mtd->ecc_stats.corrected++;
 334                 }
 335         }
 336
 337         return 0;
 338 }
 339
 340 /*
 341  * onenand_interrupt - [DEFAULT] onenand interrupt handler
 342  * @param irq           onenand interrupt number
 343  * @param dev_id        interrupt data
 344  *
 345  * complete the work
 346  */
 347 static irqreturn_t onenand_interrupt(int irq, void *data)
 348 {
 349         struct onenand_chip *this = (struct onenand_chip *) data;
 350
 351         /* To handle shared interrupt */
 352         if (!this->complete.done)
 353                 complete(&this->complete);
 354
 355         return IRQ_HANDLED;
 356 }
 357
 358 /*
 359  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
 360  * @param mtd           MTD device structure
 361  * @param state         state to select the max. timeout value
 362  *
 363  * Wait for command done.
 364  */
 365 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
 366 {
 367         struct onenand_chip *this = mtd->priv;
 368
 369         wait_for_completion(&this->complete);
 370
 371         return onenand_wait(mtd, state);
 372 }
 373
 374 /*
 375  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
 376  * @param mtd           MTD device structure
 377  * @param state         state to select the max. timeout value
 378  *
 379  * Try interrupt based wait (It is used one-time)
 380  */
 381 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
 382 {
 383         struct onenand_chip *this = mtd->priv;
 384         unsigned long remain, timeout;
 385
 386         /* We use interrupt wait first */
 387         this->wait = onenand_interrupt_wait;
 388
 389         timeout = msecs_to_jiffies(100);
 390         remain = wait_for_completion_timeout(&this->complete, timeout);
 391         if (!remain) {
 392                 printk(KERN_INFO "OneNAND: There's no interrupt. "
 393                                 "We use the normal wait\n");
 394
 395                 /* Release the irq */
 396                 free_irq(this->irq, this);
 397
 398                 this->wait = onenand_wait;
 399         }
 400
 401         return onenand_wait(mtd, state);
 402 }
 403
 404 /*
 405  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
 406  * @param mtd           MTD device structure
 407  *
 408  * There's two method to wait onenand work
 409  * 1. polling - read interrupt status register
 410  * 2. interrupt - use the kernel interrupt method
 411  */
 412 static void onenand_setup_wait(struct mtd_info *mtd)
 413 {
 414         struct onenand_chip *this = mtd->priv;
 415         int syscfg;
 416
 417         init_completion(&this->complete);
 418
 419         if (this->irq <= 0) {
 420                 this->wait = onenand_wait;
 421                 return;
 422         }
 423
 424         if (request_irq(this->irq, &onenand_interrupt,
 425                                 IRQF_SHARED, "onenand", this)) {
 426                 /* If we can't get irq, use the normal wait */
 427                 this->wait = onenand_wait;
 428                 return;
 429         }
 430
 431         /* Enable interrupt */
 432         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
 433         syscfg |= ONENAND_SYS_CFG1_IOBE;
 434         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
 435
 436         this->wait = onenand_try_interrupt_wait;
 437 }
 438
 439 /**
 440  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
 441  * @param mtd           MTD data structure
 442  * @param area          BufferRAM area
 443  * @return              offset given area
 444  *
 445  * Return BufferRAM offset given area
 446  */
 447 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
 448 {
 449         struct onenand_chip *this = mtd->priv;
 450
 451         if (ONENAND_CURRENT_BUFFERRAM(this)) {
 452                 if (area == ONENAND_DATARAM)
 453                         return mtd->writesize;
 454                 if (area == ONENAND_SPARERAM)
 455                         return mtd->oobsize;
 456         }
 457
 458         return 0;
 459 }
 460
 461 /**
 462  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
 463  * @param mtd           MTD data structure
 464  * @param area          BufferRAM area
 465  * @param buffer        the databuffer to put/get data
 466  * @param offset        offset to read from or write to
 467  * @param count         number of bytes to read/write
 468  *
 469  * Read the BufferRAM area
 470  */
 471 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 472                 unsigned char *buffer, int offset, size_t count)
 473 {
 474         struct onenand_chip *this = mtd->priv;
 475         void __iomem *bufferram;
 476
 477         bufferram = this->base + area;
 478
 479         bufferram += onenand_bufferram_offset(mtd, area);
 480
 481         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 482                 unsigned short word;
 483
 484                 /* Align with word(16-bit) size */
 485                 count--;
 486
 487                 /* Read word and save byte */
 488                 word = this->read_word(bufferram + offset + count);
 489                 buffer[count] = (word & 0xff);
 490         }
 491
 492         memcpy(buffer, bufferram + offset, count);
 493
 494         return 0;
 495 }
 496
 497 /**
 498  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
 499  * @param mtd           MTD data structure
 500  * @param area          BufferRAM area
 501  * @param buffer        the databuffer to put/get data
 502  * @param offset        offset to read from or write to
 503  * @param count         number of bytes to read/write
 504  *
 505  * Read the BufferRAM area with Sync. Burst Mode
 506  */
 507 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 508                 unsigned char *buffer, int offset, size_t count)
 509 {
 510         struct onenand_chip *this = mtd->priv;
 511         void __iomem *bufferram;
 512
 513         bufferram = this->base + area;
 514
 515         bufferram += onenand_bufferram_offset(mtd, area);
 516
 517         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 518
 519         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 520                 unsigned short word;
 521
 522                 /* Align with word(16-bit) size */
 523                 count--;
 524
 525                 /* Read word and save byte */
 526                 word = this->read_word(bufferram + offset + count);
 527                 buffer[count] = (word & 0xff);
 528         }
 529
 530         memcpy(buffer, bufferram + offset, count);
 531
 532         this->mmcontrol(mtd, 0);
 533
 534         return 0;
 535 }
 536
 537 /**
 538  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
 539  * @param mtd           MTD data structure
 540  * @param area          BufferRAM area
 541  * @param buffer        the databuffer to put/get data
 542  * @param offset        offset to read from or write to
 543  * @param count         number of bytes to read/write
 544  *
 545  * Write the BufferRAM area
 546  */
 547 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 548                 const unsigned char *buffer, int offset, size_t count)
 549 {
 550         struct onenand_chip *this = mtd->priv;
 551         void __iomem *bufferram;
 552
 553         bufferram = this->base + area;
 554
 555         bufferram += onenand_bufferram_offset(mtd, area);
 556
 557         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 558                 unsigned short word;
 559                 int byte_offset;
 560
 561                 /* Align with word(16-bit) size */
 562                 count--;
 563
 564                 /* Calculate byte access offset */
 565                 byte_offset = offset + count;
 566
 567                 /* Read word and save byte */
 568                 word = this->read_word(bufferram + byte_offset);
 569                 word = (word & ~0xff) | buffer[count];
 570                 this->write_word(word, bufferram + byte_offset);
 571         }
 572
 573         memcpy(bufferram + offset, buffer, count);
 574
 575         return 0;
 576 }
 577
 578 /**
 579  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
 580  * @param mtd           MTD data structure
 581  * @param addr          address to check
 582  * @return              1 if there are valid data, otherwise 0
 583  *
 584  * Check bufferram if there is data we required
 585  */
 586 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 587 {
 588         struct onenand_chip *this = mtd->priv;
 589         int block, page;
 590         int i;
 591
 592         block = (int) (addr >> this->erase_shift);
 593         page = (int) (addr >> this->page_shift);
 594         page &= this->page_mask;
 595
 596         i = ONENAND_CURRENT_BUFFERRAM(this);
 597
 598         /* Is there valid data? */
 599         if (this->bufferram[i].block == block &&
 600             this->bufferram[i].page == page &&
 601             this->bufferram[i].valid)
 602                 return 1;
 603
 604         return 0;
 605 }
 606
 607 /**
 608  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
 609  * @param mtd           MTD data structure
 610  * @param addr          address to update
 611  * @param valid         valid flag
 612  *
 613  * Update BufferRAM information
 614  */
 615 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
 616                 int valid)
 617 {
 618         struct onenand_chip *this = mtd->priv;
 619         int block, page;
 620         int i;
 621
 622         block = (int) (addr >> this->erase_shift);
 623         page = (int) (addr >> this->page_shift);
 624         page &= this->page_mask;
 625
 626         /* Invalidate BufferRAM */
 627         for (i = 0; i < MAX_BUFFERRAM; i++) {
 628                 if (this->bufferram[i].block == block &&
 629                     this->bufferram[i].page == page)
 630                         this->bufferram[i].valid = 0;
 631         }
 632
 633         /* Update BufferRAM */
 634         i = ONENAND_CURRENT_BUFFERRAM(this);
 635         this->bufferram[i].block = block;
 636         this->bufferram[i].page = page;
 637         this->bufferram[i].valid = valid;
 638
 639         return 0;
 640 }
 641
 642 /**
 643  * onenand_get_device - [GENERIC] Get chip for selected access
 644  * @param mtd           MTD device structure
 645  * @param new_state     the state which is requested
 646  *
 647  * Get the device and lock it for exclusive access
 648  */
 649 static int onenand_get_device(struct mtd_info *mtd, int new_state)
 650 {
 651         struct onenand_chip *this = mtd->priv;
 652         DECLARE_WAITQUEUE(wait, current);
 653
 654         /*
 655          * Grab the lock and see if the device is available
 656          */
 657         while (1) {
 658                 spin_lock(&this->chip_lock);
 659                 if (this->state == FL_READY) {
 660                         this->state = new_state;
 661                         spin_unlock(&this->chip_lock);
 662                         break;
 663                 }
 664                 if (new_state == FL_PM_SUSPENDED) {
 665                         spin_unlock(&this->chip_lock);
 666                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
 667                 }
 668                 set_current_state(TASK_UNINTERRUPTIBLE);
 669                 add_wait_queue(&this->wq, &wait);
 670                 spin_unlock(&this->chip_lock);
 671                 schedule();
 672                 remove_wait_queue(&this->wq, &wait);
 673         }
 674
 675         return 0;
 676 }
 677
 678 /**
 679  * onenand_release_device - [GENERIC] release chip
 680  * @param mtd           MTD device structure
 681  *
 682  * Deselect, release chip lock and wake up anyone waiting on the device
 683  */
 684 static void onenand_release_device(struct mtd_info *mtd)
 685 {
 686         struct onenand_chip *this = mtd->priv;
 687
 688         /* Release the chip */
 689         spin_lock(&this->chip_lock);
 690         this->state = FL_READY;
 691         wake_up(&this->wq);
 692         spin_unlock(&this->chip_lock);
 693 }
 694
 695 /**
 696  * onenand_read - [MTD Interface] Read data from flash
 697  * @param mtd           MTD device structure
 698  * @param from          offset to read from
 699  * @param len           number of bytes to read
 700  * @param retlen        pointer to variable to store the number of read bytes
 701  * @param buf           the databuffer to put data
 702  *
 703  * Read with ecc
 704 */
 705 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
 706         size_t *retlen, u_char *buf)
 707 {
 708         struct onenand_chip *this = mtd->priv;
 709         struct mtd_ecc_stats stats;
 710         int read = 0, column;
 711         int thislen;
 712         int ret = 0;
 713
 714         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 715
 716         /* Do not allow reads past end of device */
 717         if ((from + len) > mtd->size) {
 718                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
 719                 *retlen = 0;
 720                 return -EINVAL;
 721         }
 722
 723         /* Grab the lock and see if the device is available */
 724         onenand_get_device(mtd, FL_READING);
 725
 726         /* TODO handling oob */
 727
 728         stats = mtd->ecc_stats;
 729         while (read < len) {
 730                 cond_resched();
 731
 732                 thislen = min_t(int, mtd->writesize, len - read);
 733
 734                 column = from & (mtd->writesize - 1);
 735                 if (column + thislen > mtd->writesize)
 736                         thislen = mtd->writesize - column;
 737
 738                 if (!onenand_check_bufferram(mtd, from)) {
 739                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
 740
 741                         ret = this->wait(mtd, FL_READING);
 742                         /* First copy data and check return value for ECC handling */
 743                         onenand_update_bufferram(mtd, from, !ret);
 744                 }
 745
 746                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
 747
 748                 if (ret) {
 749                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: read failed = %d\n", ret);
 750                         goto out;
 751                 }
 752
 753                 read += thislen;
 754
 755                 if (read == len)
 756                         break;
 757
 758                 from += thislen;
 759                 buf += thislen;
 760         }
 761
 762 out:
 763         /* Deselect and wake up anyone waiting on the device */
 764         onenand_release_device(mtd);
 765
 766         /*
 767          * Return success, if no ECC failures, else -EBADMSG
 768          * fs driver will take care of that, because
 769          * retlen == desired len and result == -EBADMSG
 770          */
 771         *retlen = read;
 772
 773         if (mtd->ecc_stats.failed - stats.failed)
 774                 return -EBADMSG;
 775
 776         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
 777 }
 778
 779 /**
 780  * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
 781  * @param mtd           MTD device structure
 782  * @param from          offset to read from
 783  * @param len           number of bytes to read
 784  * @param retlen        pointer to variable to store the number of read bytes
 785  * @param buf           the databuffer to put data
 786  *
 787  * OneNAND read out-of-band data from the spare area
 788  */
 789 int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
 790                         size_t *retlen, u_char *buf)
 791 {
 792         struct onenand_chip *this = mtd->priv;
 793         int read = 0, thislen, column;
 794         int ret = 0;
 795
 796         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 797
 798         /* Initialize return length value */
 799         *retlen = 0;
 800
 801         /* Do not allow reads past end of device */
 802         if (unlikely((from + len) > mtd->size)) {
 803                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
 804                 return -EINVAL;
 805         }
 806
 807         /* Grab the lock and see if the device is available */
 808         onenand_get_device(mtd, FL_READING);
 809
 810         column = from & (mtd->oobsize - 1);
 811
 812         while (read < len) {
 813                 cond_resched();
 814
 815                 thislen = mtd->oobsize - column;
 816                 thislen = min_t(int, thislen, len);
 817
 818                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
 819
 820                 onenand_update_bufferram(mtd, from, 0);
 821
 822                 ret = this->wait(mtd, FL_READING);
 823                 /* First copy data and check return value for ECC handling */
 824
 825                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
 826
 827                 if (ret) {
 828                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = 0x%x\n", ret);
 829                         goto out;
 830                 }
 831
 832                 read += thislen;
 833
 834                 if (read == len)
 835                         break;
 836
 837                 buf += thislen;
 838
 839                 /* Read more? */
 840                 if (read < len) {
 841                         /* Page size */
 842                         from += mtd->writesize;
 843                         column = 0;
 844                 }
 845         }
 846
 847 out:
 848         /* Deselect and wake up anyone waiting on the device */
 849         onenand_release_device(mtd);
 850
 851         *retlen = read;
 852         return ret;
 853 }
 854
 855 /**
 856  * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
 857  * @mtd:        MTD device structure
 858  * @from:       offset to read from
 859  * @ops:        oob operation description structure
 860  */
 861 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
 862                             struct mtd_oob_ops *ops)
 863 {
 864         BUG_ON(ops->mode != MTD_OOB_PLACE);
 865
 866         return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
 867                                    &ops->oobretlen, ops->oobbuf);
 868 }
 869
 870 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
 871 /**
 872  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
 873  * @param mtd           MTD device structure
 874  * @param buf           the databuffer to verify
 875  * @param to            offset to read from
 876  * @param len           number of bytes to read and compare
 877  *
 878  */
 879 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len)
 880 {
 881         struct onenand_chip *this = mtd->priv;
 882         char *readp = this->page_buf;
 883         int column = to & (mtd->oobsize - 1);
 884         int status, i;
 885
 886         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
 887         onenand_update_bufferram(mtd, to, 0);
 888         status = this->wait(mtd, FL_READING);
 889         if (status)
 890                 return status;
 891
 892         this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len);
 893
 894         for(i = 0; i < len; i++)
 895                 if (buf[i] != 0xFF && buf[i] != readp[i])
 896                         return -EBADMSG;
 897
 898         return 0;
 899 }
 900
 901 /**
 902  * onenand_verify_page - [GENERIC] verify the chip contents after a write
 903  * @param mtd           MTD device structure
 904  * @param buf           the databuffer to verify
 905  *
 906  * Check DataRAM area directly
 907  */
 908 static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
 909 {
 910         struct onenand_chip *this = mtd->priv;
 911         void __iomem *dataram0, *dataram1;
 912         int ret = 0;
 913
 914         /* In partial page write, just skip it */
 915         if ((addr & (mtd->writesize - 1)) != 0)
 916                 return 0;
 917
 918         this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
 919
 920         ret = this->wait(mtd, FL_READING);
 921         if (ret)
 922                 return ret;
 923
 924         onenand_update_bufferram(mtd, addr, 1);
 925
 926         /* Check, if the two dataram areas are same */
 927         dataram0 = this->base + ONENAND_DATARAM;
 928         dataram1 = dataram0 + mtd->writesize;
 929
 930         if (memcmp(dataram0, dataram1, mtd->writesize))
 931                 return -EBADMSG;
 932
 933         return 0;
 934 }
 935 #else
 936 #define onenand_verify_page(...)        (0)
 937 #define onenand_verify_oob(...)         (0)
 938 #endif
 939
 940 #define NOTALIGNED(x)   ((x & (this->subpagesize - 1)) != 0)
 941
 942 /**
 943  * onenand_write - [MTD Interface] write buffer to FLASH
 944  * @param mtd           MTD device structure
 945  * @param to            offset to write to
 946  * @param len           number of bytes to write
 947  * @param retlen        pointer to variable to store the number of written bytes
 948  * @param buf           the data to write
 949  *
 950  * Write with ECC
 951  */
 952 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
 953         size_t *retlen, const u_char *buf)
 954 {
 955         struct onenand_chip *this = mtd->priv;
 956         int written = 0;
 957         int ret = 0;
 958         int column, subpage;
 959
 960         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
 961
 962         /* Initialize retlen, in case of early exit */
 963         *retlen = 0;
 964
 965         /* Do not allow writes past end of device */
 966         if (unlikely((to + len) > mtd->size)) {
 967                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
 968                 return -EINVAL;
 969         }
 970
 971         /* Reject writes, which are not page aligned */
 972         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
 973                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
 974                 return -EINVAL;
 975         }
 976
 977         column = to & (mtd->writesize - 1);
 978         subpage = column || (len & (mtd->writesize - 1));
 979
 980         /* Grab the lock and see if the device is available */
 981         onenand_get_device(mtd, FL_WRITING);
 982
 983         /* Loop until all data write */
 984         while (written < len) {
 985                 int bytes = mtd->writesize;
 986                 int thislen = min_t(int, bytes, len - written);
 987                 u_char *wbuf = (u_char *) buf;
 988
 989                 cond_resched();
 990
 991                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, bytes);
 992
 993                 /* Partial page write */
 994                 if (subpage) {
 995                         bytes = min_t(int, bytes - column, (int) len);
 996                         memset(this->page_buf, 0xff, mtd->writesize);
 997                         memcpy(this->page_buf + column, buf, bytes);
 998                         wbuf = this->page_buf;
 999                         /* Even though partial write, we need page size */
1000                         thislen = mtd->writesize;
1001                 }
1002
1003                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, thislen);
1004                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1005
1006                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1007
1008                 /* In partial page write we don't update bufferram */
1009                 onenand_update_bufferram(mtd, to, !subpage);
1010
1011                 ret = this->wait(mtd, FL_WRITING);
1012                 if (ret) {
1013                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
1014                         break;
1015                 }
1016
1017                 /* Only check verify write turn on */
1018                 ret = onenand_verify_page(mtd, (u_char *) wbuf, to);
1019                 if (ret) {
1020                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
1021                         break;
1022                 }
1023
1024                 written += thislen;
1025
1026                 if (written == len)
1027                         break;
1028
1029                 column = 0;
1030                 to += thislen;
1031                 buf += thislen;
1032         }
1033
1034         /* Deselect and wake up anyone waiting on the device */
1035         onenand_release_device(mtd);
1036
1037         *retlen = written;
1038
1039         return ret;
1040 }
1041
1042 /**
1043  * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1044  * @param mtd           MTD device structure
1045  * @param to            offset to write to
1046  * @param len           number of bytes to write
1047  * @param retlen        pointer to variable to store the number of written bytes
1048  * @param buf           the data to write
1049  *
1050  * OneNAND write out-of-band
1051  */
1052 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1053                                 size_t *retlen, const u_char *buf)
1054 {
1055         struct onenand_chip *this = mtd->priv;
1056         int column, ret = 0;
1057         int written = 0;
1058
1059         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1060
1061         /* Initialize retlen, in case of early exit */
1062         *retlen = 0;
1063
1064         /* Do not allow writes past end of device */
1065         if (unlikely((to + len) > mtd->size)) {
1066                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
1067                 return -EINVAL;
1068         }
1069
1070         /* Grab the lock and see if the device is available */
1071         onenand_get_device(mtd, FL_WRITING);
1072
1073         /* Loop until all data write */
1074         while (written < len) {
1075                 int thislen = min_t(int, mtd->oobsize, len - written);
1076
1077                 cond_resched();
1078
1079                 column = to & (mtd->oobsize - 1);
1080
1081                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1082
1083                 /* We send data to spare ram with oobsize
1084                  * to prevent byte access */
1085                 memset(this->page_buf, 0xff, mtd->oobsize);
1086                 memcpy(this->page_buf + column, buf, thislen);
1087                 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
1088
1089                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1090
1091                 onenand_update_bufferram(mtd, to, 0);
1092
1093                 ret = this->wait(mtd, FL_WRITING);
1094                 if (ret) {
1095                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret);
1096                         goto out;
1097                 }
1098
1099                 ret = onenand_verify_oob(mtd, buf, to, thislen);
1100                 if (ret) {
1101                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
1102                         goto out;
1103                 }
1104
1105                 written += thislen;
1106
1107                 if (written == len)
1108                         break;
1109
1110                 to += thislen;
1111                 buf += thislen;
1112         }
1113
1114 out:
1115         /* Deselect and wake up anyone waiting on the device */
1116         onenand_release_device(mtd);
1117
1118         *retlen = written;
1119
1120         return ret;
1121 }
1122
1123 /**
1124  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1125  * @mtd:        MTD device structure
1126  * @from:       offset to read from
1127  * @ops:        oob operation description structure
1128  */
1129 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1130                              struct mtd_oob_ops *ops)
1131 {
1132         BUG_ON(ops->mode != MTD_OOB_PLACE);
1133
1134         return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
1135                                     &ops->oobretlen, ops->oobbuf);
1136 }
1137
1138 /**
1139  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1140  * @param mtd           MTD device structure
1141  * @param ofs           offset from device start
1142  * @param getchip       0, if the chip is already selected
1143  * @param allowbbt      1, if its allowed to access the bbt area
1144  *
1145  * Check, if the block is bad. Either by reading the bad block table or
1146  * calling of the scan function.
1147  */
1148 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1149 {
1150         struct onenand_chip *this = mtd->priv;
1151         struct bbm_info *bbm = this->bbm;
1152
1153         /* Return info from the table */
1154         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1155 }
1156
1157 /**
1158  * onenand_erase - [MTD Interface] erase block(s)
1159  * @param mtd           MTD device structure
1160  * @param instr         erase instruction
1161  *
1162  * Erase one ore more blocks
1163  */
1164 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1165 {
1166         struct onenand_chip *this = mtd->priv;
1167         unsigned int block_size;
1168         loff_t addr;
1169         int len;
1170         int ret = 0;
1171
1172         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1173
1174         block_size = (1 << this->erase_shift);
1175
1176         /* Start address must align on block boundary */
1177         if (unlikely(instr->addr & (block_size - 1))) {
1178                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1179                 return -EINVAL;
1180         }
1181
1182         /* Length must align on block boundary */
1183         if (unlikely(instr->len & (block_size - 1))) {
1184                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1185                 return -EINVAL;
1186         }
1187
1188         /* Do not allow erase past end of device */
1189         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1190                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1191                 return -EINVAL;
1192         }
1193
1194         instr->fail_addr = 0xffffffff;
1195
1196         /* Grab the lock and see if the device is available */
1197         onenand_get_device(mtd, FL_ERASING);
1198
1199         /* Loop throught the pages */
1200         len = instr->len;
1201         addr = instr->addr;
1202
1203         instr->state = MTD_ERASING;
1204
1205         while (len) {
1206                 cond_resched();
1207
1208                 /* Check if we have a bad block, we do not erase bad blocks */
1209                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1210                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1211                         instr->state = MTD_ERASE_FAILED;
1212                         goto erase_exit;
1213                 }
1214
1215                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1216
1217                 ret = this->wait(mtd, FL_ERASING);
1218                 /* Check, if it is write protected */
1219                 if (ret) {
1220                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1221                         instr->state = MTD_ERASE_FAILED;
1222                         instr->fail_addr = addr;
1223                         goto erase_exit;
1224                 }
1225
1226                 len -= block_size;
1227                 addr += block_size;
1228         }
1229
1230         instr->state = MTD_ERASE_DONE;
1231
1232 erase_exit:
1233
1234         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1235         /* Do call back function */
1236         if (!ret)
1237                 mtd_erase_callback(instr);
1238
1239         /* Deselect and wake up anyone waiting on the device */
1240         onenand_release_device(mtd);
1241
1242         return ret;
1243 }
1244
1245 /**
1246  * onenand_sync - [MTD Interface] sync
1247  * @param mtd           MTD device structure
1248  *
1249  * Sync is actually a wait for chip ready function
1250  */
1251 static void onenand_sync(struct mtd_info *mtd)
1252 {
1253         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1254
1255         /* Grab the lock and see if the device is available */
1256         onenand_get_device(mtd, FL_SYNCING);
1257
1258         /* Release it and go back */
1259         onenand_release_device(mtd);
1260 }
1261
1262 /**
1263  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1264  * @param mtd           MTD device structure
1265  * @param ofs           offset relative to mtd start
1266  *
1267  * Check whether the block is bad
1268  */
1269 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1270 {
1271         /* Check for invalid offset */
1272         if (ofs > mtd->size)
1273                 return -EINVAL;
1274
1275         return onenand_block_checkbad(mtd, ofs, 1, 0);
1276 }
1277
1278 /**
1279  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1280  * @param mtd           MTD device structure
1281  * @param ofs           offset from device start
1282  *
1283  * This is the default implementation, which can be overridden by
1284  * a hardware specific driver.
1285  */
1286 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1287 {
1288         struct onenand_chip *this = mtd->priv;
1289         struct bbm_info *bbm = this->bbm;
1290         u_char buf[2] = {0, 0};
1291         size_t retlen;
1292         int block;
1293
1294         /* Get block number */
1295         block = ((int) ofs) >> bbm->bbt_erase_shift;
1296         if (bbm->bbt)
1297                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1298
1299         /* We write two bytes, so we dont have to mess with 16 bit access */
1300         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1301         return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf);
1302 }
1303
1304 /**
1305  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1306  * @param mtd           MTD device structure
1307  * @param ofs           offset relative to mtd start
1308  *
1309  * Mark the block as bad
1310  */
1311 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1312 {
1313         struct onenand_chip *this = mtd->priv;
1314         int ret;
1315
1316         ret = onenand_block_isbad(mtd, ofs);
1317         if (ret) {
1318                 /* If it was bad already, return success and do nothing */
1319                 if (ret > 0)
1320                         return 0;
1321                 return ret;
1322         }
1323
1324         return this->block_markbad(mtd, ofs);
1325 }
1326
1327 /**
1328  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1329  * @param mtd           MTD device structure
1330  * @param ofs           offset relative to mtd start
1331  * @param len           number of bytes to lock or unlock
1332  *
1333  * Lock or unlock one or more blocks
1334  */
1335 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1336 {
1337         struct onenand_chip *this = mtd->priv;
1338         int start, end, block, value, status;
1339         int wp_status_mask;
1340
1341         start = ofs >> this->erase_shift;
1342         end = len >> this->erase_shift;
1343
1344         if (cmd == ONENAND_CMD_LOCK)
1345                 wp_status_mask = ONENAND_WP_LS;
1346         else
1347                 wp_status_mask = ONENAND_WP_US;
1348
1349         /* Continuous lock scheme */
1350         if (this->options & ONENAND_HAS_CONT_LOCK) {
1351                 /* Set start block address */
1352                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1353                 /* Set end block address */
1354                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1355                 /* Write lock command */
1356                 this->command(mtd, cmd, 0, 0);
1357
1358                 /* There's no return value */
1359                 this->wait(mtd, FL_LOCKING);
1360
1361                 /* Sanity check */
1362                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1363                     & ONENAND_CTRL_ONGO)
1364                         continue;
1365
1366                 /* Check lock status */
1367                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1368                 if (!(status & wp_status_mask))
1369                         printk(KERN_ERR "wp status = 0x%x\n", status);
1370
1371                 return 0;
1372         }
1373
1374         /* Block lock scheme */
1375         for (block = start; block < start + end; block++) {
1376                 /* Set block address */
1377                 value = onenand_block_address(this, block);
1378                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1379                 /* Select DataRAM for DDP */
1380                 value = onenand_bufferram_address(this, block);
1381                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1382                 /* Set start block address */
1383                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1384                 /* Write lock command */
1385                 this->command(mtd, cmd, 0, 0);
1386
1387                 /* There's no return value */
1388                 this->wait(mtd, FL_LOCKING);
1389
1390                 /* Sanity check */
1391                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1392                     & ONENAND_CTRL_ONGO)
1393                         continue;
1394
1395                 /* Check lock status */
1396                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1397                 if (!(status & wp_status_mask))
1398                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1399         }
1400
1401         return 0;
1402 }
1403
1404 /**
1405  * onenand_lock - [MTD Interface] Lock block(s)
1406  * @param mtd           MTD device structure
1407  * @param ofs           offset relative to mtd start
1408  * @param len           number of bytes to unlock
1409  *
1410  * Lock one or more blocks
1411  */
1412 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1413 {
1414         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1415 }
1416
1417 /**
1418  * onenand_unlock - [MTD Interface] Unlock block(s)
1419  * @param mtd           MTD device structure
1420  * @param ofs           offset relative to mtd start
1421  * @param len           number of bytes to unlock
1422  *
1423  * Unlock one or more blocks
1424  */
1425 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1426 {
1427         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1428 }
1429
1430 /**
1431  * onenand_check_lock_status - [OneNAND Interface] Check lock status
1432  * @param this          onenand chip data structure
1433  *
1434  * Check lock status
1435  */
1436 static void onenand_check_lock_status(struct onenand_chip *this)
1437 {
1438         unsigned int value, block, status;
1439         unsigned int end;
1440
1441         end = this->chipsize >> this->erase_shift;
1442         for (block = 0; block < end; block++) {
1443                 /* Set block address */
1444                 value = onenand_block_address(this, block);
1445                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1446                 /* Select DataRAM for DDP */
1447                 value = onenand_bufferram_address(this, block);
1448                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1449                 /* Set start block address */
1450                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1451
1452                 /* Check lock status */
1453                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1454                 if (!(status & ONENAND_WP_US))
1455                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1456         }
1457 }
1458
1459 /**
1460  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1461  * @param mtd           MTD device structure
1462  *
1463  * Unlock all blocks
1464  */
1465 static int onenand_unlock_all(struct mtd_info *mtd)
1466 {
1467         struct onenand_chip *this = mtd->priv;
1468
1469         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1470                 /* Write unlock command */
1471                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1472
1473                 /* There's no return value */
1474                 this->wait(mtd, FL_LOCKING);
1475
1476                 /* Sanity check */
1477                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1478                     & ONENAND_CTRL_ONGO)
1479                         continue;
1480
1481                 /* Workaround for all block unlock in DDP */
1482                 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
1483                         loff_t ofs;
1484                         size_t len;
1485
1486                         /* 1st block on another chip */
1487                         ofs = this->chipsize >> 1;
1488                         len = 1 << this->erase_shift;
1489
1490                         onenand_unlock(mtd, ofs, len);
1491                 }
1492
1493                 onenand_check_lock_status(this);
1494
1495                 return 0;
1496         }
1497
1498         onenand_unlock(mtd, 0x0, this->chipsize);
1499
1500         return 0;
1501 }
1502
1503 #ifdef CONFIG_MTD_ONENAND_OTP
1504
1505 /* Interal OTP operation */
1506 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1507                 size_t *retlen, u_char *buf);
1508
1509 /**
1510  * do_otp_read - [DEFAULT] Read OTP block area
1511  * @param mtd           MTD device structure
1512  * @param from          The offset to read
1513  * @param len           number of bytes to read
1514  * @param retlen        pointer to variable to store the number of readbytes
1515  * @param buf           the databuffer to put/get data
1516  *
1517  * Read OTP block area.
1518  */
1519 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1520                 size_t *retlen, u_char *buf)
1521 {
1522         struct onenand_chip *this = mtd->priv;
1523         int ret;
1524
1525         /* Enter OTP access mode */
1526         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1527         this->wait(mtd, FL_OTPING);
1528
1529         ret = mtd->read(mtd, from, len, retlen, buf);
1530
1531         /* Exit OTP access mode */
1532         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1533         this->wait(mtd, FL_RESETING);
1534
1535         return ret;
1536 }
1537
1538 /**
1539  * do_otp_write - [DEFAULT] Write OTP block area
1540  * @param mtd           MTD device structure
1541  * @param from          The offset to write
1542  * @param len           number of bytes to write
1543  * @param retlen        pointer to variable to store the number of write bytes
1544  * @param buf           the databuffer to put/get data
1545  *
1546  * Write OTP block area.
1547  */
1548 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1549                 size_t *retlen, u_char *buf)
1550 {
1551         struct onenand_chip *this = mtd->priv;
1552         unsigned char *pbuf = buf;
1553         int ret;
1554
1555         /* Force buffer page aligned */
1556         if (len < mtd->writesize) {
1557                 memcpy(this->page_buf, buf, len);
1558                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1559                 pbuf = this->page_buf;
1560                 len = mtd->writesize;
1561         }
1562
1563         /* Enter OTP access mode */
1564         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1565         this->wait(mtd, FL_OTPING);
1566
1567         ret = mtd->write(mtd, from, len, retlen, pbuf);
1568
1569         /* Exit OTP access mode */
1570         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1571         this->wait(mtd, FL_RESETING);
1572
1573         return ret;
1574 }
1575
1576 /**
1577  * do_otp_lock - [DEFAULT] Lock OTP block area
1578  * @param mtd           MTD device structure
1579  * @param from          The offset to lock
1580  * @param len           number of bytes to lock
1581  * @param retlen        pointer to variable to store the number of lock bytes
1582  * @param buf           the databuffer to put/get data
1583  *
1584  * Lock OTP block area.
1585  */
1586 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1587                 size_t *retlen, u_char *buf)
1588 {
1589         struct onenand_chip *this = mtd->priv;
1590         int ret;
1591
1592         /* Enter OTP access mode */
1593         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1594         this->wait(mtd, FL_OTPING);
1595
1596         ret = onenand_do_write_oob(mtd, from, len, retlen, buf);
1597
1598         /* Exit OTP access mode */
1599         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1600         this->wait(mtd, FL_RESETING);
1601
1602         return ret;
1603 }
1604
1605 /**
1606  * onenand_otp_walk - [DEFAULT] Handle OTP operation
1607  * @param mtd           MTD device structure
1608  * @param from          The offset to read/write
1609  * @param len           number of bytes to read/write
1610  * @param retlen        pointer to variable to store the number of read bytes
1611  * @param buf           the databuffer to put/get data
1612  * @param action        do given action
1613  * @param mode          specify user and factory
1614  *
1615  * Handle OTP operation.
1616  */
1617 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1618                         size_t *retlen, u_char *buf,
1619                         otp_op_t action, int mode)
1620 {
1621         struct onenand_chip *this = mtd->priv;
1622         int otp_pages;
1623         int density;
1624         int ret = 0;
1625
1626         *retlen = 0;
1627
1628         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1629         if (density < ONENAND_DEVICE_DENSITY_512Mb)
1630                 otp_pages = 20;
1631         else
1632                 otp_pages = 10;
1633
1634         if (mode == MTD_OTP_FACTORY) {
1635                 from += mtd->writesize * otp_pages;
1636                 otp_pages = 64 - otp_pages;
1637         }
1638
1639         /* Check User/Factory boundary */
1640         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1641                 return 0;
1642
1643         while (len > 0 && otp_pages > 0) {
1644                 if (!action) {  /* OTP Info functions */
1645                         struct otp_info *otpinfo;
1646
1647                         len -= sizeof(struct otp_info);
1648                         if (len <= 0)
1649                                 return -ENOSPC;
1650
1651                         otpinfo = (struct otp_info *) buf;
1652                         otpinfo->start = from;
1653                         otpinfo->length = mtd->writesize;
1654                         otpinfo->locked = 0;
1655
1656                         from += mtd->writesize;
1657                         buf += sizeof(struct otp_info);
1658                         *retlen += sizeof(struct otp_info);
1659                 } else {
1660                         size_t tmp_retlen;
1661                         int size = len;
1662
1663                         ret = action(mtd, from, len, &tmp_retlen, buf);
1664
1665                         buf += size;
1666                         len -= size;
1667                         *retlen += size;
1668
1669                         if (ret < 0)
1670                                 return ret;
1671                 }
1672                 otp_pages--;
1673         }
1674
1675         return 0;
1676 }
1677
1678 /**
1679  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1680  * @param mtd           MTD device structure
1681  * @param buf           the databuffer to put/get data
1682  * @param len           number of bytes to read
1683  *
1684  * Read factory OTP info.
1685  */
1686 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1687                         struct otp_info *buf, size_t len)
1688 {
1689         size_t retlen;
1690         int ret;
1691
1692         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1693
1694         return ret ? : retlen;
1695 }
1696
1697 /**
1698  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1699  * @param mtd           MTD device structure
1700  * @param from          The offset to read
1701  * @param len           number of bytes to read
1702  * @param retlen        pointer to variable to store the number of read bytes
1703  * @param buf           the databuffer to put/get data
1704  *
1705  * Read factory OTP area.
1706  */
1707 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1708                         size_t len, size_t *retlen, u_char *buf)
1709 {
1710         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1711 }
1712
1713 /**
1714  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1715  * @param mtd           MTD device structure
1716  * @param buf           the databuffer to put/get data
1717  * @param len           number of bytes to read
1718  *
1719  * Read user OTP info.
1720  */
1721 static int onenand_get_user_prot_info(struct mtd_info *mtd,
1722                         struct otp_info *buf, size_t len)
1723 {
1724         size_t retlen;
1725         int ret;
1726
1727         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1728
1729         return ret ? : retlen;
1730 }
1731
1732 /**
1733  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1734  * @param mtd           MTD device structure
1735  * @param from          The offset to read
1736  * @param len           number of bytes to read
1737  * @param retlen        pointer to variable to store the number of read bytes
1738  * @param buf           the databuffer to put/get data
1739  *
1740  * Read user OTP area.
1741  */
1742 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1743                         size_t len, size_t *retlen, u_char *buf)
1744 {
1745         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1746 }
1747
1748 /**
1749  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
1750  * @param mtd           MTD device structure
1751  * @param from          The offset to write
1752  * @param len           number of bytes to write
1753  * @param retlen        pointer to variable to store the number of write bytes
1754  * @param buf           the databuffer to put/get data
1755  *
1756  * Write user OTP area.
1757  */
1758 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
1759                         size_t len, size_t *retlen, u_char *buf)
1760 {
1761         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
1762 }
1763
1764 /**
1765  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
1766  * @param mtd           MTD device structure
1767  * @param from          The offset to lock
1768  * @param len           number of bytes to unlock
1769  *
1770  * Write lock mark on spare area in page 0 in OTP block
1771  */
1772 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
1773                         size_t len)
1774 {
1775         unsigned char oob_buf[64];
1776         size_t retlen;
1777         int ret;
1778
1779         memset(oob_buf, 0xff, mtd->oobsize);
1780         /*
1781          * Note: OTP lock operation
1782          *       OTP block : 0xXXFC
1783          *       1st block : 0xXXF3 (If chip support)
1784          *       Both      : 0xXXF0 (If chip support)
1785          */
1786         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
1787
1788         /*
1789          * Write lock mark to 8th word of sector0 of page0 of the spare0.
1790          * We write 16 bytes spare area instead of 2 bytes.
1791          */
1792         from = 0;
1793         len = 16;
1794
1795         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
1796
1797         return ret ? : retlen;
1798 }
1799 #endif  /* CONFIG_MTD_ONENAND_OTP */
1800
1801 /**
1802  * onenand_lock_scheme - Check and set OneNAND lock scheme
1803  * @param mtd           MTD data structure
1804  *
1805  * Check and set OneNAND lock scheme
1806  */
1807 static void onenand_lock_scheme(struct mtd_info *mtd)
1808 {
1809         struct onenand_chip *this = mtd->priv;
1810         unsigned int density, process;
1811
1812         /* Lock scheme depends on density and process */
1813         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1814         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
1815
1816         /* Lock scheme */
1817         if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
1818                 /* A-Die has all block unlock */
1819                 if (process) {
1820                         printk(KERN_DEBUG "Chip support all block unlock\n");
1821                         this->options |= ONENAND_HAS_UNLOCK_ALL;
1822                 }
1823         } else {
1824                 /* Some OneNAND has continues lock scheme */
1825                 if (!process) {
1826                         printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
1827                         this->options |= ONENAND_HAS_CONT_LOCK;
1828                 }
1829         }
1830 }
1831
1832 /**
1833  * onenand_print_device_info - Print device ID
1834  * @param device        device ID
1835  *
1836  * Print device ID
1837  */
1838 static void onenand_print_device_info(int device, int version)
1839 {
1840         int vcc, demuxed, ddp, density;
1841
1842         vcc = device & ONENAND_DEVICE_VCC_MASK;
1843         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1844         ddp = device & ONENAND_DEVICE_IS_DDP;
1845         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1846         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1847                 demuxed ? "" : "Muxed ",
1848                 ddp ? "(DDP)" : "",
1849                 (16 << density),
1850                 vcc ? "2.65/3.3" : "1.8",
1851                 device);
1852         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
1853 }
1854
1855 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1856         {ONENAND_MFR_SAMSUNG, "Samsung"},
1857 };
1858
1859 /**
1860  * onenand_check_maf - Check manufacturer ID
1861  * @param manuf         manufacturer ID
1862  *
1863  * Check manufacturer ID
1864  */
1865 static int onenand_check_maf(int manuf)
1866 {
1867         int size = ARRAY_SIZE(onenand_manuf_ids);
1868         char *name;
1869         int i;
1870
1871         for (i = 0; i < size; i++)
1872                 if (manuf == onenand_manuf_ids[i].id)
1873                         break;
1874
1875         if (i < size)
1876                 name = onenand_manuf_ids[i].name;
1877         else
1878                 name = "Unknown";
1879
1880         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1881
1882         return (i == size);
1883 }
1884
1885 /**
1886  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1887  * @param mtd           MTD device structure
1888  *
1889  * OneNAND detection method:
1890  *   Compare the the values from command with ones from register
1891  */
1892 static int onenand_probe(struct mtd_info *mtd)
1893 {
1894         struct onenand_chip *this = mtd->priv;
1895         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
1896         int density;
1897         int syscfg;
1898
1899         /* Save system configuration 1 */
1900         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
1901         /* Clear Sync. Burst Read mode to read BootRAM */
1902         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
1903
1904         /* Send the command for reading device ID from BootRAM */
1905         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1906
1907         /* Read manufacturer and device IDs from BootRAM */
1908         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1909         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1910
1911         /* Reset OneNAND to read default register values */
1912         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1913         /* Wait reset */
1914         this->wait(mtd, FL_RESETING);
1915
1916         /* Restore system configuration 1 */
1917         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
1918
1919         /* Check manufacturer ID */
1920         if (onenand_check_maf(bram_maf_id))
1921                 return -ENXIO;
1922
1923         /* Read manufacturer and device IDs from Register */
1924         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1925         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1926         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1927
1928         /* Check OneNAND device */
1929         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1930                 return -ENXIO;
1931
1932         /* Flash device information */
1933         onenand_print_device_info(dev_id, ver_id);
1934         this->device_id = dev_id;
1935         this->version_id = ver_id;
1936
1937         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1938         this->chipsize = (16 << density) << 20;
1939         /* Set density mask. it is used for DDP */
1940         this->density_mask = (1 << (density + 6));
1941
1942         /* OneNAND page size & block size */
1943         /* The data buffer size is equal to page size */
1944         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1945         mtd->oobsize = mtd->writesize >> 5;
1946         /* Pagers per block is always 64 in OneNAND */
1947         mtd->erasesize = mtd->writesize << 6;
1948
1949         this->erase_shift = ffs(mtd->erasesize) - 1;
1950         this->page_shift = ffs(mtd->writesize) - 1;
1951         this->ppb_shift = (this->erase_shift - this->page_shift);
1952         this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
1953
1954         /* REVIST: Multichip handling */
1955
1956         mtd->size = this->chipsize;
1957
1958         /* Check OneNAND lock scheme */
1959         onenand_lock_scheme(mtd);
1960
1961         return 0;
1962 }
1963
1964 /**
1965  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1966  * @param mtd           MTD device structure
1967  */
1968 static int onenand_suspend(struct mtd_info *mtd)
1969 {
1970         return onenand_get_device(mtd, FL_PM_SUSPENDED);
1971 }
1972
1973 /**
1974  * onenand_resume - [MTD Interface] Resume the OneNAND flash
1975  * @param mtd           MTD device structure
1976  */
1977 static void onenand_resume(struct mtd_info *mtd)
1978 {
1979         struct onenand_chip *this = mtd->priv;
1980
1981         if (this->state == FL_PM_SUSPENDED)
1982                 onenand_release_device(mtd);
1983         else
1984                 printk(KERN_ERR "resume() called for the chip which is not"
1985                                 "in suspended state\n");
1986 }
1987
1988 /**
1989  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1990  * @param mtd           MTD device structure
1991  * @param maxchips      Number of chips to scan for
1992  *
1993  * This fills out all the not initialized function pointers
1994  * with the defaults.
1995  * The flash ID is read and the mtd/chip structures are
1996  * filled with the appropriate values.
1997  */
1998 int onenand_scan(struct mtd_info *mtd, int maxchips)
1999 {
2000         struct onenand_chip *this = mtd->priv;
2001
2002         if (!this->read_word)
2003                 this->read_word = onenand_readw;
2004         if (!this->write_word)
2005                 this->write_word = onenand_writew;
2006
2007         if (!this->command)
2008                 this->command = onenand_command;
2009         if (!this->wait)
2010                 onenand_setup_wait(mtd);
2011
2012         if (!this->read_bufferram)
2013                 this->read_bufferram = onenand_read_bufferram;
2014         if (!this->write_bufferram)
2015                 this->write_bufferram = onenand_write_bufferram;
2016
2017         if (!this->block_markbad)
2018                 this->block_markbad = onenand_default_block_markbad;
2019         if (!this->scan_bbt)
2020                 this->scan_bbt = onenand_default_bbt;
2021
2022         if (onenand_probe(mtd))
2023                 return -ENXIO;
2024
2025         /* Set Sync. Burst Read after probing */
2026         if (this->mmcontrol) {
2027                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2028                 this->read_bufferram = onenand_sync_read_bufferram;
2029         }
2030
2031         /* Allocate buffers, if necessary */
2032         if (!this->page_buf) {
2033                 size_t len;
2034                 len = mtd->writesize + mtd->oobsize;
2035                 this->page_buf = kmalloc(len, GFP_KERNEL);
2036                 if (!this->page_buf) {
2037                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2038                         return -ENOMEM;
2039                 }
2040                 this->options |= ONENAND_PAGEBUF_ALLOC;
2041         }
2042
2043         this->state = FL_READY;
2044         init_waitqueue_head(&this->wq);
2045         spin_lock_init(&this->chip_lock);
2046
2047         /*
2048          * Allow subpage writes up to oobsize.
2049          */
2050         switch (mtd->oobsize) {
2051         case 64:
2052                 this->ecclayout = &onenand_oob_64;
2053                 mtd->subpage_sft = 2;
2054                 break;
2055
2056         case 32:
2057                 this->ecclayout = &onenand_oob_32;
2058                 mtd->subpage_sft = 1;
2059                 break;
2060
2061         default:
2062                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2063                         mtd->oobsize);
2064                 mtd->subpage_sft = 0;
2065                 /* To prevent kernel oops */
2066                 this->ecclayout = &onenand_oob_32;
2067                 break;
2068         }
2069
2070         this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2071         mtd->ecclayout = this->ecclayout;
2072
2073         /* Fill in remaining MTD driver data */
2074         mtd->type = MTD_NANDFLASH;
2075         mtd->flags = MTD_CAP_NANDFLASH;
2076         mtd->ecctype = MTD_ECC_SW;
2077         mtd->erase = onenand_erase;
2078         mtd->point = NULL;
2079         mtd->unpoint = NULL;
2080         mtd->read = onenand_read;
2081         mtd->write = onenand_write;
2082         mtd->read_oob = onenand_read_oob;
2083         mtd->write_oob = onenand_write_oob;
2084 #ifdef CONFIG_MTD_ONENAND_OTP
2085         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2086         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2087         mtd->get_user_prot_info = onenand_get_user_prot_info;
2088         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2089         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2090         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2091 #endif
2092         mtd->sync = onenand_sync;
2093         mtd->lock = onenand_lock;
2094         mtd->unlock = onenand_unlock;
2095         mtd->suspend = onenand_suspend;
2096         mtd->resume = onenand_resume;
2097         mtd->block_isbad = onenand_block_isbad;
2098         mtd->block_markbad = onenand_block_markbad;
2099         mtd->owner = THIS_MODULE;
2100
2101         /* Unlock whole block */
2102         onenand_unlock_all(mtd);
2103
2104         return this->scan_bbt(mtd);
2105 }
2106
2107 /**
2108  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2109  * @param mtd           MTD device structure
2110  */
2111 void onenand_release(struct mtd_info *mtd)
2112 {
2113         struct onenand_chip *this = mtd->priv;
2114
2115 #ifdef CONFIG_MTD_PARTITIONS
2116         /* Deregister partitions */
2117         del_mtd_partitions (mtd);
2118 #endif
2119         /* Deregister the device */
2120         del_mtd_device (mtd);
2121
2122         /* Free bad block table memory, if allocated */
2123         if (this->bbm)
2124                 kfree(this->bbm);
2125         /* Buffer allocated by onenand_scan */
2126         if (this->options & ONENAND_PAGEBUF_ALLOC)
2127                 kfree(this->page_buf);
2128 }
2129
2130 EXPORT_SYMBOL_GPL(onenand_scan);
2131 EXPORT_SYMBOL_GPL(onenand_release);
2132
2133 MODULE_LICENSE("GPL");
2134 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2135 MODULE_DESCRIPTION("Generic OneNAND flash driver code");