err.no Git - linux-2.6/blob - drivers/mtd/nand/nandsim.c

   1 /*
   2  * NAND flash simulator.
   3  *
   4  * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
   5  *
   6  * Copyright (C) 2004 Nokia Corporation
   7  *
   8  * Note: NS means "NAND Simulator".
   9  * Note: Input means input TO flash chip, output means output FROM chip.
  10  *
  11  * This program is free software; you can redistribute it and/or modify it
  12  * under the terms of the GNU General Public License as published by the
  13  * Free Software Foundation; either version 2, or (at your option) any later
  14  * version.
  15  *
  16  * This program is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
  19  * Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
  24  *
  25  * $Id: nandsim.c,v 1.8 2005/03/19 15:33:56 dedekind Exp $
  26  */
  27
  28 #include <linux/init.h>
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/moduleparam.h>
  32 #include <linux/vmalloc.h>
  33 #include <linux/slab.h>
  34 #include <linux/errno.h>
  35 #include <linux/string.h>
  36 #include <linux/mtd/mtd.h>
  37 #include <linux/mtd/nand.h>
  38 #include <linux/mtd/partitions.h>
  39 #include <linux/delay.h>
  40 #include <linux/list.h>
  41 #include <linux/random.h>
  42
  43 /* Default simulator parameters values */
  44 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE)  || \
  45     !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
  46     !defined(CONFIG_NANDSIM_THIRD_ID_BYTE)  || \
  47     !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
  48 #define CONFIG_NANDSIM_FIRST_ID_BYTE  0x98
  49 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
  50 #define CONFIG_NANDSIM_THIRD_ID_BYTE  0xFF /* No byte */
  51 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
  52 #endif
  53
  54 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
  55 #define CONFIG_NANDSIM_ACCESS_DELAY 25
  56 #endif
  57 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
  58 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
  59 #endif
  60 #ifndef CONFIG_NANDSIM_ERASE_DELAY
  61 #define CONFIG_NANDSIM_ERASE_DELAY 2
  62 #endif
  63 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
  64 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
  65 #endif
  66 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
  67 #define CONFIG_NANDSIM_INPUT_CYCLE  50
  68 #endif
  69 #ifndef CONFIG_NANDSIM_BUS_WIDTH
  70 #define CONFIG_NANDSIM_BUS_WIDTH  8
  71 #endif
  72 #ifndef CONFIG_NANDSIM_DO_DELAYS
  73 #define CONFIG_NANDSIM_DO_DELAYS  0
  74 #endif
  75 #ifndef CONFIG_NANDSIM_LOG
  76 #define CONFIG_NANDSIM_LOG        0
  77 #endif
  78 #ifndef CONFIG_NANDSIM_DBG
  79 #define CONFIG_NANDSIM_DBG        0
  80 #endif
  81
  82 static uint first_id_byte  = CONFIG_NANDSIM_FIRST_ID_BYTE;
  83 static uint second_id_byte = CONFIG_NANDSIM_SECOND_ID_BYTE;
  84 static uint third_id_byte  = CONFIG_NANDSIM_THIRD_ID_BYTE;
  85 static uint fourth_id_byte = CONFIG_NANDSIM_FOURTH_ID_BYTE;
  86 static uint access_delay   = CONFIG_NANDSIM_ACCESS_DELAY;
  87 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
  88 static uint erase_delay    = CONFIG_NANDSIM_ERASE_DELAY;
  89 static uint output_cycle   = CONFIG_NANDSIM_OUTPUT_CYCLE;
  90 static uint input_cycle    = CONFIG_NANDSIM_INPUT_CYCLE;
  91 static uint bus_width      = CONFIG_NANDSIM_BUS_WIDTH;
  92 static uint do_delays      = CONFIG_NANDSIM_DO_DELAYS;
  93 static uint log            = CONFIG_NANDSIM_LOG;
  94 static uint dbg            = CONFIG_NANDSIM_DBG;
  95 static unsigned long parts[MAX_MTD_DEVICES];
  96 static unsigned int parts_num;
  97 static char *badblocks = NULL;
  98 static char *weakblocks = NULL;
  99 static char *weakpages = NULL;
 100 static unsigned int bitflips = 0;
 101 static char *gravepages = NULL;
 102
 103 module_param(first_id_byte,  uint, 0400);
 104 module_param(second_id_byte, uint, 0400);
 105 module_param(third_id_byte,  uint, 0400);
 106 module_param(fourth_id_byte, uint, 0400);
 107 module_param(access_delay,   uint, 0400);
 108 module_param(programm_delay, uint, 0400);
 109 module_param(erase_delay,    uint, 0400);
 110 module_param(output_cycle,   uint, 0400);
 111 module_param(input_cycle,    uint, 0400);
 112 module_param(bus_width,      uint, 0400);
 113 module_param(do_delays,      uint, 0400);
 114 module_param(log,            uint, 0400);
 115 module_param(dbg,            uint, 0400);
 116 module_param_array(parts, ulong, &parts_num, 0400);
 117 module_param(badblocks,      charp, 0400);
 118 module_param(weakblocks,     charp, 0400);
 119 module_param(weakpages,      charp, 0400);
 120 module_param(bitflips,       uint, 0400);
 121 module_param(gravepages,     charp, 0400);
 122
 123 MODULE_PARM_DESC(first_id_byte,  "The fist byte returned by NAND Flash 'read ID' command (manufaturer ID)");
 124 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID)");
 125 MODULE_PARM_DESC(third_id_byte,  "The third byte returned by NAND Flash 'read ID' command");
 126 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command");
 127 MODULE_PARM_DESC(access_delay,   "Initial page access delay (microiseconds)");
 128 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
 129 MODULE_PARM_DESC(erase_delay,    "Sector erase delay (milliseconds)");
 130 MODULE_PARM_DESC(output_cycle,   "Word output (from flash) time (nanodeconds)");
 131 MODULE_PARM_DESC(input_cycle,    "Word input (to flash) time (nanodeconds)");
 132 MODULE_PARM_DESC(bus_width,      "Chip's bus width (8- or 16-bit)");
 133 MODULE_PARM_DESC(do_delays,      "Simulate NAND delays using busy-waits if not zero");
 134 MODULE_PARM_DESC(log,            "Perform logging if not zero");
 135 MODULE_PARM_DESC(dbg,            "Output debug information if not zero");
 136 MODULE_PARM_DESC(parts,          "Partition sizes (in erase blocks) separated by commas");
 137 /* Page and erase block positions for the following parameters are independent of any partitions */
 138 MODULE_PARM_DESC(badblocks,      "Erase blocks that are initially marked bad, separated by commas");
 139 MODULE_PARM_DESC(weakblocks,     "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
 140                                  " separated by commas e.g. 113:2 means eb 113"
 141                                  " can be erased only twice before failing");
 142 MODULE_PARM_DESC(weakpages,      "Weak pages [: maximum writes (defaults to 3)]"
 143                                  " separated by commas e.g. 1401:2 means page 1401"
 144                                  " can be written only twice before failing");
 145 MODULE_PARM_DESC(bitflips,       "Maximum number of random bit flips per page (zero by default)");
 146 MODULE_PARM_DESC(gravepages,     "Pages that lose data [: maximum reads (defaults to 3)]"
 147                                  " separated by commas e.g. 1401:2 means page 1401"
 148                                  " can be read only twice before failing");
 149
 150 /* The largest possible page size */
 151 #define NS_LARGEST_PAGE_SIZE    2048
 152
 153 /* The prefix for simulator output */
 154 #define NS_OUTPUT_PREFIX "[nandsim]"
 155
 156 /* Simulator's output macros (logging, debugging, warning, error) */
 157 #define NS_LOG(args...) \
 158         do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
 159 #define NS_DBG(args...) \
 160         do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
 161 #define NS_WARN(args...) \
 162         do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
 163 #define NS_ERR(args...) \
 164         do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
 165
 166 /* Busy-wait delay macros (microseconds, milliseconds) */
 167 #define NS_UDELAY(us) \
 168         do { if (do_delays) udelay(us); } while(0)
 169 #define NS_MDELAY(us) \
 170         do { if (do_delays) mdelay(us); } while(0)
 171
 172 /* Is the nandsim structure initialized ? */
 173 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
 174
 175 /* Good operation completion status */
 176 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
 177
 178 /* Operation failed completion status */
 179 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
 180
 181 /* Calculate the page offset in flash RAM image by (row, column) address */
 182 #define NS_RAW_OFFSET(ns) \
 183         (((ns)->regs.row << (ns)->geom.pgshift) + ((ns)->regs.row * (ns)->geom.oobsz) + (ns)->regs.column)
 184
 185 /* Calculate the OOB offset in flash RAM image by (row, column) address */
 186 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
 187
 188 /* After a command is input, the simulator goes to one of the following states */
 189 #define STATE_CMD_READ0        0x00000001 /* read data from the beginning of page */
 190 #define STATE_CMD_READ1        0x00000002 /* read data from the second half of page */
 191 #define STATE_CMD_READSTART    0x00000003 /* read data second command (large page devices) */
 192 #define STATE_CMD_PAGEPROG     0x00000004 /* start page programm */
 193 #define STATE_CMD_READOOB      0x00000005 /* read OOB area */
 194 #define STATE_CMD_ERASE1       0x00000006 /* sector erase first command */
 195 #define STATE_CMD_STATUS       0x00000007 /* read status */
 196 #define STATE_CMD_STATUS_M     0x00000008 /* read multi-plane status (isn't implemented) */
 197 #define STATE_CMD_SEQIN        0x00000009 /* sequential data imput */
 198 #define STATE_CMD_READID       0x0000000A /* read ID */
 199 #define STATE_CMD_ERASE2       0x0000000B /* sector erase second command */
 200 #define STATE_CMD_RESET        0x0000000C /* reset */
 201 #define STATE_CMD_MASK         0x0000000F /* command states mask */
 202
 203 /* After an addres is input, the simulator goes to one of these states */
 204 #define STATE_ADDR_PAGE        0x00000010 /* full (row, column) address is accepted */
 205 #define STATE_ADDR_SEC         0x00000020 /* sector address was accepted */
 206 #define STATE_ADDR_ZERO        0x00000030 /* one byte zero address was accepted */
 207 #define STATE_ADDR_MASK        0x00000030 /* address states mask */
 208
 209 /* Durind data input/output the simulator is in these states */
 210 #define STATE_DATAIN           0x00000100 /* waiting for data input */
 211 #define STATE_DATAIN_MASK      0x00000100 /* data input states mask */
 212
 213 #define STATE_DATAOUT          0x00001000 /* waiting for page data output */
 214 #define STATE_DATAOUT_ID       0x00002000 /* waiting for ID bytes output */
 215 #define STATE_DATAOUT_STATUS   0x00003000 /* waiting for status output */
 216 #define STATE_DATAOUT_STATUS_M 0x00004000 /* waiting for multi-plane status output */
 217 #define STATE_DATAOUT_MASK     0x00007000 /* data output states mask */
 218
 219 /* Previous operation is done, ready to accept new requests */
 220 #define STATE_READY            0x00000000
 221
 222 /* This state is used to mark that the next state isn't known yet */
 223 #define STATE_UNKNOWN          0x10000000
 224
 225 /* Simulator's actions bit masks */
 226 #define ACTION_CPY       0x00100000 /* copy page/OOB to the internal buffer */
 227 #define ACTION_PRGPAGE   0x00200000 /* programm the internal buffer to flash */
 228 #define ACTION_SECERASE  0x00300000 /* erase sector */
 229 #define ACTION_ZEROOFF   0x00400000 /* don't add any offset to address */
 230 #define ACTION_HALFOFF   0x00500000 /* add to address half of page */
 231 #define ACTION_OOBOFF    0x00600000 /* add to address OOB offset */
 232 #define ACTION_MASK      0x00700000 /* action mask */
 233
 234 #define NS_OPER_NUM      12 /* Number of operations supported by the simulator */
 235 #define NS_OPER_STATES   6  /* Maximum number of states in operation */
 236
 237 #define OPT_ANY          0xFFFFFFFF /* any chip supports this operation */
 238 #define OPT_PAGE256      0x00000001 /* 256-byte  page chips */
 239 #define OPT_PAGE512      0x00000002 /* 512-byte  page chips */
 240 #define OPT_PAGE2048     0x00000008 /* 2048-byte page chips */
 241 #define OPT_SMARTMEDIA   0x00000010 /* SmartMedia technology chips */
 242 #define OPT_AUTOINCR     0x00000020 /* page number auto inctimentation is possible */
 243 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
 244 #define OPT_LARGEPAGE    (OPT_PAGE2048) /* 2048-byte page chips */
 245 #define OPT_SMALLPAGE    (OPT_PAGE256  | OPT_PAGE512)  /* 256 and 512-byte page chips */
 246
 247 /* Remove action bits ftom state */
 248 #define NS_STATE(x) ((x) & ~ACTION_MASK)
 249
 250 /*
 251  * Maximum previous states which need to be saved. Currently saving is
 252  * only needed for page programm operation with preceeded read command
 253  * (which is only valid for 512-byte pages).
 254  */
 255 #define NS_MAX_PREVSTATES 1
 256
 257 /*
 258  * A union to represent flash memory contents and flash buffer.
 259  */
 260 union ns_mem {
 261         u_char *byte;    /* for byte access */
 262         uint16_t *word;  /* for 16-bit word access */
 263 };
 264
 265 /*
 266  * The structure which describes all the internal simulator data.
 267  */
 268 struct nandsim {
 269         struct mtd_partition partitions[MAX_MTD_DEVICES];
 270         unsigned int nbparts;
 271
 272         uint busw;              /* flash chip bus width (8 or 16) */
 273         u_char ids[4];          /* chip's ID bytes */
 274         uint32_t options;       /* chip's characteristic bits */
 275         uint32_t state;         /* current chip state */
 276         uint32_t nxstate;       /* next expected state */
 277
 278         uint32_t *op;           /* current operation, NULL operations isn't known yet  */
 279         uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
 280         uint16_t npstates;      /* number of previous states saved */
 281         uint16_t stateidx;      /* current state index */
 282
 283         /* The simulated NAND flash pages array */
 284         union ns_mem *pages;
 285
 286         /* Internal buffer of page + OOB size bytes */
 287         union ns_mem buf;
 288
 289         /* NAND flash "geometry" */
 290         struct nandsin_geometry {
 291                 uint32_t totsz;     /* total flash size, bytes */
 292                 uint32_t secsz;     /* flash sector (erase block) size, bytes */
 293                 uint pgsz;          /* NAND flash page size, bytes */
 294                 uint oobsz;         /* page OOB area size, bytes */
 295                 uint32_t totszoob;  /* total flash size including OOB, bytes */
 296                 uint pgszoob;       /* page size including OOB , bytes*/
 297                 uint secszoob;      /* sector size including OOB, bytes */
 298                 uint pgnum;         /* total number of pages */
 299                 uint pgsec;         /* number of pages per sector */
 300                 uint secshift;      /* bits number in sector size */
 301                 uint pgshift;       /* bits number in page size */
 302                 uint oobshift;      /* bits number in OOB size */
 303                 uint pgaddrbytes;   /* bytes per page address */
 304                 uint secaddrbytes;  /* bytes per sector address */
 305                 uint idbytes;       /* the number ID bytes that this chip outputs */
 306         } geom;
 307
 308         /* NAND flash internal registers */
 309         struct nandsim_regs {
 310                 unsigned command; /* the command register */
 311                 u_char   status;  /* the status register */
 312                 uint     row;     /* the page number */
 313                 uint     column;  /* the offset within page */
 314                 uint     count;   /* internal counter */
 315                 uint     num;     /* number of bytes which must be processed */
 316                 uint     off;     /* fixed page offset */
 317         } regs;
 318
 319         /* NAND flash lines state */
 320         struct ns_lines_status {
 321                 int ce;  /* chip Enable */
 322                 int cle; /* command Latch Enable */
 323                 int ale; /* address Latch Enable */
 324                 int wp;  /* write Protect */
 325         } lines;
 326 };
 327
 328 /*
 329  * Operations array. To perform any operation the simulator must pass
 330  * through the correspondent states chain.
 331  */
 332 static struct nandsim_operations {
 333         uint32_t reqopts;  /* options which are required to perform the operation */
 334         uint32_t states[NS_OPER_STATES]; /* operation's states */
 335 } ops[NS_OPER_NUM] = {
 336         /* Read page + OOB from the beginning */
 337         {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
 338                         STATE_DATAOUT, STATE_READY}},
 339         /* Read page + OOB from the second half */
 340         {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
 341                         STATE_DATAOUT, STATE_READY}},
 342         /* Read OOB */
 343         {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
 344                         STATE_DATAOUT, STATE_READY}},
 345         /* Programm page starting from the beginning */
 346         {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
 347                         STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 348         /* Programm page starting from the beginning */
 349         {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
 350                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 351         /* Programm page starting from the second half */
 352         {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
 353                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 354         /* Programm OOB */
 355         {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
 356                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 357         /* Erase sector */
 358         {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
 359         /* Read status */
 360         {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
 361         /* Read multi-plane status */
 362         {OPT_SMARTMEDIA, {STATE_CMD_STATUS_M, STATE_DATAOUT_STATUS_M, STATE_READY}},
 363         /* Read ID */
 364         {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
 365         /* Large page devices read page */
 366         {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
 367                                STATE_DATAOUT, STATE_READY}}
 368 };
 369
 370 struct weak_block {
 371         struct list_head list;
 372         unsigned int erase_block_no;
 373         unsigned int max_erases;
 374         unsigned int erases_done;
 375 };
 376
 377 static LIST_HEAD(weak_blocks);
 378
 379 struct weak_page {
 380         struct list_head list;
 381         unsigned int page_no;
 382         unsigned int max_writes;
 383         unsigned int writes_done;
 384 };
 385
 386 static LIST_HEAD(weak_pages);
 387
 388 struct grave_page {
 389         struct list_head list;
 390         unsigned int page_no;
 391         unsigned int max_reads;
 392         unsigned int reads_done;
 393 };
 394
 395 static LIST_HEAD(grave_pages);
 396
 397 /* MTD structure for NAND controller */
 398 static struct mtd_info *nsmtd;
 399
 400 static u_char ns_verify_buf[NS_LARGEST_PAGE_SIZE];
 401
 402 /*
 403  * Allocate array of page pointers and initialize the array to NULL
 404  * pointers.
 405  *
 406  * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
 407  */
 408 static int alloc_device(struct nandsim *ns)
 409 {
 410         int i;
 411
 412         ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem));
 413         if (!ns->pages) {
 414                 NS_ERR("alloc_map: unable to allocate page array\n");
 415                 return -ENOMEM;
 416         }
 417         for (i = 0; i < ns->geom.pgnum; i++) {
 418                 ns->pages[i].byte = NULL;
 419         }
 420
 421         return 0;
 422 }
 423
 424 /*
 425  * Free any allocated pages, and free the array of page pointers.
 426  */
 427 static void free_device(struct nandsim *ns)
 428 {
 429         int i;
 430
 431         if (ns->pages) {
 432                 for (i = 0; i < ns->geom.pgnum; i++) {
 433                         if (ns->pages[i].byte)
 434                                 kfree(ns->pages[i].byte);
 435                 }
 436                 vfree(ns->pages);
 437         }
 438 }
 439
 440 static char *get_partition_name(int i)
 441 {
 442         char buf[64];
 443         sprintf(buf, "NAND simulator partition %d", i);
 444         return kstrdup(buf, GFP_KERNEL);
 445 }
 446
 447 /*
 448  * Initialize the nandsim structure.
 449  *
 450  * RETURNS: 0 if success, -ERRNO if failure.
 451  */
 452 static int init_nandsim(struct mtd_info *mtd)
 453 {
 454         struct nand_chip *chip = (struct nand_chip *)mtd->priv;
 455         struct nandsim   *ns   = (struct nandsim *)(chip->priv);
 456         int i, ret = 0;
 457         u_int32_t remains;
 458         u_int32_t next_offset;
 459
 460         if (NS_IS_INITIALIZED(ns)) {
 461                 NS_ERR("init_nandsim: nandsim is already initialized\n");
 462                 return -EIO;
 463         }
 464
 465         /* Force mtd to not do delays */
 466         chip->chip_delay = 0;
 467
 468         /* Initialize the NAND flash parameters */
 469         ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
 470         ns->geom.totsz    = mtd->size;
 471         ns->geom.pgsz     = mtd->writesize;
 472         ns->geom.oobsz    = mtd->oobsize;
 473         ns->geom.secsz    = mtd->erasesize;
 474         ns->geom.pgszoob  = ns->geom.pgsz + ns->geom.oobsz;
 475         ns->geom.pgnum    = ns->geom.totsz / ns->geom.pgsz;
 476         ns->geom.totszoob = ns->geom.totsz + ns->geom.pgnum * ns->geom.oobsz;
 477         ns->geom.secshift = ffs(ns->geom.secsz) - 1;
 478         ns->geom.pgshift  = chip->page_shift;
 479         ns->geom.oobshift = ffs(ns->geom.oobsz) - 1;
 480         ns->geom.pgsec    = ns->geom.secsz / ns->geom.pgsz;
 481         ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
 482         ns->options = 0;
 483
 484         if (ns->geom.pgsz == 256) {
 485                 ns->options |= OPT_PAGE256;
 486         }
 487         else if (ns->geom.pgsz == 512) {
 488                 ns->options |= (OPT_PAGE512 | OPT_AUTOINCR);
 489                 if (ns->busw == 8)
 490                         ns->options |= OPT_PAGE512_8BIT;
 491         } else if (ns->geom.pgsz == 2048) {
 492                 ns->options |= OPT_PAGE2048;
 493         } else {
 494                 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
 495                 return -EIO;
 496         }
 497
 498         if (ns->options & OPT_SMALLPAGE) {
 499                 if (ns->geom.totsz < (64 << 20)) {
 500                         ns->geom.pgaddrbytes  = 3;
 501                         ns->geom.secaddrbytes = 2;
 502                 } else {
 503                         ns->geom.pgaddrbytes  = 4;
 504                         ns->geom.secaddrbytes = 3;
 505                 }
 506         } else {
 507                 if (ns->geom.totsz <= (128 << 20)) {
 508                         ns->geom.pgaddrbytes  = 4;
 509                         ns->geom.secaddrbytes = 2;
 510                 } else {
 511                         ns->geom.pgaddrbytes  = 5;
 512                         ns->geom.secaddrbytes = 3;
 513                 }
 514         }
 515
 516         /* Fill the partition_info structure */
 517         if (parts_num > ARRAY_SIZE(ns->partitions)) {
 518                 NS_ERR("too many partitions.\n");
 519                 ret = -EINVAL;
 520                 goto error;
 521         }
 522         remains = ns->geom.totsz;
 523         next_offset = 0;
 524         for (i = 0; i < parts_num; ++i) {
 525                 unsigned long part = parts[i];
 526                 if (!part || part > remains / ns->geom.secsz) {
 527                         NS_ERR("bad partition size.\n");
 528                         ret = -EINVAL;
 529                         goto error;
 530                 }
 531                 ns->partitions[i].name   = get_partition_name(i);
 532                 ns->partitions[i].offset = next_offset;
 533                 ns->partitions[i].size   = part * ns->geom.secsz;
 534                 next_offset += ns->partitions[i].size;
 535                 remains -= ns->partitions[i].size;
 536         }
 537         ns->nbparts = parts_num;
 538         if (remains) {
 539                 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
 540                         NS_ERR("too many partitions.\n");
 541                         ret = -EINVAL;
 542                         goto error;
 543                 }
 544                 ns->partitions[i].name   = get_partition_name(i);
 545                 ns->partitions[i].offset = next_offset;
 546                 ns->partitions[i].size   = remains;
 547                 ns->nbparts += 1;
 548         }
 549
 550         /* Detect how many ID bytes the NAND chip outputs */
 551         for (i = 0; nand_flash_ids[i].name != NULL; i++) {
 552                 if (second_id_byte != nand_flash_ids[i].id)
 553                         continue;
 554                 if (!(nand_flash_ids[i].options & NAND_NO_AUTOINCR))
 555                         ns->options |= OPT_AUTOINCR;
 556         }
 557
 558         if (ns->busw == 16)
 559                 NS_WARN("16-bit flashes support wasn't tested\n");
 560
 561         printk("flash size: %u MiB\n",          ns->geom.totsz >> 20);
 562         printk("page size: %u bytes\n",         ns->geom.pgsz);
 563         printk("OOB area size: %u bytes\n",     ns->geom.oobsz);
 564         printk("sector size: %u KiB\n",         ns->geom.secsz >> 10);
 565         printk("pages number: %u\n",            ns->geom.pgnum);
 566         printk("pages per sector: %u\n",        ns->geom.pgsec);
 567         printk("bus width: %u\n",               ns->busw);
 568         printk("bits in sector size: %u\n",     ns->geom.secshift);
 569         printk("bits in page size: %u\n",       ns->geom.pgshift);
 570         printk("bits in OOB size: %u\n",        ns->geom.oobshift);
 571         printk("flash size with OOB: %u KiB\n", ns->geom.totszoob >> 10);
 572         printk("page address bytes: %u\n",      ns->geom.pgaddrbytes);
 573         printk("sector address bytes: %u\n",    ns->geom.secaddrbytes);
 574         printk("options: %#x\n",                ns->options);
 575
 576         if ((ret = alloc_device(ns)) != 0)
 577                 goto error;
 578
 579         /* Allocate / initialize the internal buffer */
 580         ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
 581         if (!ns->buf.byte) {
 582                 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
 583                         ns->geom.pgszoob);
 584                 ret = -ENOMEM;
 585                 goto error;
 586         }
 587         memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
 588
 589         return 0;
 590
 591 error:
 592         free_device(ns);
 593
 594         return ret;
 595 }
 596
 597 /*
 598  * Free the nandsim structure.
 599  */
 600 static void free_nandsim(struct nandsim *ns)
 601 {
 602         kfree(ns->buf.byte);
 603         free_device(ns);
 604
 605         return;
 606 }
 607
 608 static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
 609 {
 610         char *w;
 611         int zero_ok;
 612         unsigned int erase_block_no;
 613         loff_t offset;
 614
 615         if (!badblocks)
 616                 return 0;
 617         w = badblocks;
 618         do {
 619                 zero_ok = (*w == '0' ? 1 : 0);
 620                 erase_block_no = simple_strtoul(w, &w, 0);
 621                 if (!zero_ok && !erase_block_no) {
 622                         NS_ERR("invalid badblocks.\n");
 623                         return -EINVAL;
 624                 }
 625                 offset = erase_block_no * ns->geom.secsz;
 626                 if (mtd->block_markbad(mtd, offset)) {
 627                         NS_ERR("invalid badblocks.\n");
 628                         return -EINVAL;
 629                 }
 630                 if (*w == ',')
 631                         w += 1;
 632         } while (*w);
 633         return 0;
 634 }
 635
 636 static int parse_weakblocks(void)
 637 {
 638         char *w;
 639         int zero_ok;
 640         unsigned int erase_block_no;
 641         unsigned int max_erases;
 642         struct weak_block *wb;
 643
 644         if (!weakblocks)
 645                 return 0;
 646         w = weakblocks;
 647         do {
 648                 zero_ok = (*w == '0' ? 1 : 0);
 649                 erase_block_no = simple_strtoul(w, &w, 0);
 650                 if (!zero_ok && !erase_block_no) {
 651                         NS_ERR("invalid weakblocks.\n");
 652                         return -EINVAL;
 653                 }
 654                 max_erases = 3;
 655                 if (*w == ':') {
 656                         w += 1;
 657                         max_erases = simple_strtoul(w, &w, 0);
 658                 }
 659                 if (*w == ',')
 660                         w += 1;
 661                 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
 662                 if (!wb) {
 663                         NS_ERR("unable to allocate memory.\n");
 664                         return -ENOMEM;
 665                 }
 666                 wb->erase_block_no = erase_block_no;
 667                 wb->max_erases = max_erases;
 668                 list_add(&wb->list, &weak_blocks);
 669         } while (*w);
 670         return 0;
 671 }
 672
 673 static int erase_error(unsigned int erase_block_no)
 674 {
 675         struct weak_block *wb;
 676
 677         list_for_each_entry(wb, &weak_blocks, list)
 678                 if (wb->erase_block_no == erase_block_no) {
 679                         if (wb->erases_done >= wb->max_erases)
 680                                 return 1;
 681                         wb->erases_done += 1;
 682                         return 0;
 683                 }
 684         return 0;
 685 }
 686
 687 static int parse_weakpages(void)
 688 {
 689         char *w;
 690         int zero_ok;
 691         unsigned int page_no;
 692         unsigned int max_writes;
 693         struct weak_page *wp;
 694
 695         if (!weakpages)
 696                 return 0;
 697         w = weakpages;
 698         do {
 699                 zero_ok = (*w == '0' ? 1 : 0);
 700                 page_no = simple_strtoul(w, &w, 0);
 701                 if (!zero_ok && !page_no) {
 702                         NS_ERR("invalid weakpagess.\n");
 703                         return -EINVAL;
 704                 }
 705                 max_writes = 3;
 706                 if (*w == ':') {
 707                         w += 1;
 708                         max_writes = simple_strtoul(w, &w, 0);
 709                 }
 710                 if (*w == ',')
 711                         w += 1;
 712                 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
 713                 if (!wp) {
 714                         NS_ERR("unable to allocate memory.\n");
 715                         return -ENOMEM;
 716                 }
 717                 wp->page_no = page_no;
 718                 wp->max_writes = max_writes;
 719                 list_add(&wp->list, &weak_pages);
 720         } while (*w);
 721         return 0;
 722 }
 723
 724 static int write_error(unsigned int page_no)
 725 {
 726         struct weak_page *wp;
 727
 728         list_for_each_entry(wp, &weak_pages, list)
 729                 if (wp->page_no == page_no) {
 730                         if (wp->writes_done >= wp->max_writes)
 731                                 return 1;
 732                         wp->writes_done += 1;
 733                         return 0;
 734                 }
 735         return 0;
 736 }
 737
 738 static int parse_gravepages(void)
 739 {
 740         char *g;
 741         int zero_ok;
 742         unsigned int page_no;
 743         unsigned int max_reads;
 744         struct grave_page *gp;
 745
 746         if (!gravepages)
 747                 return 0;
 748         g = gravepages;
 749         do {
 750                 zero_ok = (*g == '0' ? 1 : 0);
 751                 page_no = simple_strtoul(g, &g, 0);
 752                 if (!zero_ok && !page_no) {
 753                         NS_ERR("invalid gravepagess.\n");
 754                         return -EINVAL;
 755                 }
 756                 max_reads = 3;
 757                 if (*g == ':') {
 758                         g += 1;
 759                         max_reads = simple_strtoul(g, &g, 0);
 760                 }
 761                 if (*g == ',')
 762                         g += 1;
 763                 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
 764                 if (!gp) {
 765                         NS_ERR("unable to allocate memory.\n");
 766                         return -ENOMEM;
 767                 }
 768                 gp->page_no = page_no;
 769                 gp->max_reads = max_reads;
 770                 list_add(&gp->list, &grave_pages);
 771         } while (*g);
 772         return 0;
 773 }
 774
 775 static int read_error(unsigned int page_no)
 776 {
 777         struct grave_page *gp;
 778
 779         list_for_each_entry(gp, &grave_pages, list)
 780                 if (gp->page_no == page_no) {
 781                         if (gp->reads_done >= gp->max_reads)
 782                                 return 1;
 783                         gp->reads_done += 1;
 784                         return 0;
 785                 }
 786         return 0;
 787 }
 788
 789 static void free_lists(void)
 790 {
 791         struct list_head *pos, *n;
 792         list_for_each_safe(pos, n, &weak_blocks) {
 793                 list_del(pos);
 794                 kfree(list_entry(pos, struct weak_block, list));
 795         }
 796         list_for_each_safe(pos, n, &weak_pages) {
 797                 list_del(pos);
 798                 kfree(list_entry(pos, struct weak_page, list));
 799         }
 800         list_for_each_safe(pos, n, &grave_pages) {
 801                 list_del(pos);
 802                 kfree(list_entry(pos, struct grave_page, list));
 803         }
 804 }
 805
 806 /*
 807  * Returns the string representation of 'state' state.
 808  */
 809 static char *get_state_name(uint32_t state)
 810 {
 811         switch (NS_STATE(state)) {
 812                 case STATE_CMD_READ0:
 813                         return "STATE_CMD_READ0";
 814                 case STATE_CMD_READ1:
 815                         return "STATE_CMD_READ1";
 816                 case STATE_CMD_PAGEPROG:
 817                         return "STATE_CMD_PAGEPROG";
 818                 case STATE_CMD_READOOB:
 819                         return "STATE_CMD_READOOB";
 820                 case STATE_CMD_READSTART:
 821                         return "STATE_CMD_READSTART";
 822                 case STATE_CMD_ERASE1:
 823                         return "STATE_CMD_ERASE1";
 824                 case STATE_CMD_STATUS:
 825                         return "STATE_CMD_STATUS";
 826                 case STATE_CMD_STATUS_M:
 827                         return "STATE_CMD_STATUS_M";
 828                 case STATE_CMD_SEQIN:
 829                         return "STATE_CMD_SEQIN";
 830                 case STATE_CMD_READID:
 831                         return "STATE_CMD_READID";
 832                 case STATE_CMD_ERASE2:
 833                         return "STATE_CMD_ERASE2";
 834                 case STATE_CMD_RESET:
 835                         return "STATE_CMD_RESET";
 836                 case STATE_ADDR_PAGE:
 837                         return "STATE_ADDR_PAGE";
 838                 case STATE_ADDR_SEC:
 839                         return "STATE_ADDR_SEC";
 840                 case STATE_ADDR_ZERO:
 841                         return "STATE_ADDR_ZERO";
 842                 case STATE_DATAIN:
 843                         return "STATE_DATAIN";
 844                 case STATE_DATAOUT:
 845                         return "STATE_DATAOUT";
 846                 case STATE_DATAOUT_ID:
 847                         return "STATE_DATAOUT_ID";
 848                 case STATE_DATAOUT_STATUS:
 849                         return "STATE_DATAOUT_STATUS";
 850                 case STATE_DATAOUT_STATUS_M:
 851                         return "STATE_DATAOUT_STATUS_M";
 852                 case STATE_READY:
 853                         return "STATE_READY";
 854                 case STATE_UNKNOWN:
 855                         return "STATE_UNKNOWN";
 856         }
 857
 858         NS_ERR("get_state_name: unknown state, BUG\n");
 859         return NULL;
 860 }
 861
 862 /*
 863  * Check if command is valid.
 864  *
 865  * RETURNS: 1 if wrong command, 0 if right.
 866  */
 867 static int check_command(int cmd)
 868 {
 869         switch (cmd) {
 870
 871         case NAND_CMD_READ0:
 872         case NAND_CMD_READSTART:
 873         case NAND_CMD_PAGEPROG:
 874         case NAND_CMD_READOOB:
 875         case NAND_CMD_ERASE1:
 876         case NAND_CMD_STATUS:
 877         case NAND_CMD_SEQIN:
 878         case NAND_CMD_READID:
 879         case NAND_CMD_ERASE2:
 880         case NAND_CMD_RESET:
 881         case NAND_CMD_READ1:
 882                 return 0;
 883
 884         case NAND_CMD_STATUS_MULTI:
 885         default:
 886                 return 1;
 887         }
 888 }
 889
 890 /*
 891  * Returns state after command is accepted by command number.
 892  */
 893 static uint32_t get_state_by_command(unsigned command)
 894 {
 895         switch (command) {
 896                 case NAND_CMD_READ0:
 897                         return STATE_CMD_READ0;
 898                 case NAND_CMD_READ1:
 899                         return STATE_CMD_READ1;
 900                 case NAND_CMD_PAGEPROG:
 901                         return STATE_CMD_PAGEPROG;
 902                 case NAND_CMD_READSTART:
 903                         return STATE_CMD_READSTART;
 904                 case NAND_CMD_READOOB:
 905                         return STATE_CMD_READOOB;
 906                 case NAND_CMD_ERASE1:
 907                         return STATE_CMD_ERASE1;
 908                 case NAND_CMD_STATUS:
 909                         return STATE_CMD_STATUS;
 910                 case NAND_CMD_STATUS_MULTI:
 911                         return STATE_CMD_STATUS_M;
 912                 case NAND_CMD_SEQIN:
 913                         return STATE_CMD_SEQIN;
 914                 case NAND_CMD_READID:
 915                         return STATE_CMD_READID;
 916                 case NAND_CMD_ERASE2:
 917                         return STATE_CMD_ERASE2;
 918                 case NAND_CMD_RESET:
 919                         return STATE_CMD_RESET;
 920         }
 921
 922         NS_ERR("get_state_by_command: unknown command, BUG\n");
 923         return 0;
 924 }
 925
 926 /*
 927  * Move an address byte to the correspondent internal register.
 928  */
 929 static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
 930 {
 931         uint byte = (uint)bt;
 932
 933         if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
 934                 ns->regs.column |= (byte << 8 * ns->regs.count);
 935         else {
 936                 ns->regs.row |= (byte << 8 * (ns->regs.count -
 937                                                 ns->geom.pgaddrbytes +
 938                                                 ns->geom.secaddrbytes));
 939         }
 940
 941         return;
 942 }
 943
 944 /*
 945  * Switch to STATE_READY state.
 946  */
 947 static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
 948 {
 949         NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
 950
 951         ns->state       = STATE_READY;
 952         ns->nxstate     = STATE_UNKNOWN;
 953         ns->op          = NULL;
 954         ns->npstates    = 0;
 955         ns->stateidx    = 0;
 956         ns->regs.num    = 0;
 957         ns->regs.count  = 0;
 958         ns->regs.off    = 0;
 959         ns->regs.row    = 0;
 960         ns->regs.column = 0;
 961         ns->regs.status = status;
 962 }
 963
 964 /*
 965  * If the operation isn't known yet, try to find it in the global array
 966  * of supported operations.
 967  *
 968  * Operation can be unknown because of the following.
 969  *   1. New command was accepted and this is the firs call to find the
 970  *      correspondent states chain. In this case ns->npstates = 0;
 971  *   2. There is several operations which begin with the same command(s)
 972  *      (for example program from the second half and read from the
 973  *      second half operations both begin with the READ1 command). In this
 974  *      case the ns->pstates[] array contains previous states.
 975  *
 976  * Thus, the function tries to find operation containing the following
 977  * states (if the 'flag' parameter is 0):
 978  *    ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
 979  *
 980  * If (one and only one) matching operation is found, it is accepted (
 981  * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
 982  * zeroed).
 983  *
 984  * If there are several maches, the current state is pushed to the
 985  * ns->pstates.
 986  *
 987  * The operation can be unknown only while commands are input to the chip.
 988  * As soon as address command is accepted, the operation must be known.
 989  * In such situation the function is called with 'flag' != 0, and the
 990  * operation is searched using the following pattern:
 991  *     ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
 992  *
 993  * It is supposed that this pattern must either match one operation on
 994  * none. There can't be ambiguity in that case.
 995  *
 996  * If no matches found, the functions does the following:
 997  *   1. if there are saved states present, try to ignore them and search
 998  *      again only using the last command. If nothing was found, switch
 999  *      to the STATE_READY state.
1000  *   2. if there are no saved states, switch to the STATE_READY state.
1001  *
1002  * RETURNS: -2 - no matched operations found.
1003  *          -1 - several matches.
1004  *           0 - operation is found.
1005  */
1006 static int find_operation(struct nandsim *ns, uint32_t flag)
1007 {
1008         int opsfound = 0;
1009         int i, j, idx = 0;
1010
1011         for (i = 0; i < NS_OPER_NUM; i++) {
1012
1013                 int found = 1;
1014
1015                 if (!(ns->options & ops[i].reqopts))
1016                         /* Ignore operations we can't perform */
1017                         continue;
1018
1019                 if (flag) {
1020                         if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1021                                 continue;
1022                 } else {
1023                         if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1024                                 continue;
1025                 }
1026
1027                 for (j = 0; j < ns->npstates; j++)
1028                         if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1029                                 && (ns->options & ops[idx].reqopts)) {
1030                                 found = 0;
1031                                 break;
1032                         }
1033
1034                 if (found) {
1035                         idx = i;
1036                         opsfound += 1;
1037                 }
1038         }
1039
1040         if (opsfound == 1) {
1041                 /* Exact match */
1042                 ns->op = &ops[idx].states[0];
1043                 if (flag) {
1044                         /*
1045                          * In this case the find_operation function was
1046                          * called when address has just began input. But it isn't
1047                          * yet fully input and the current state must
1048                          * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1049                          * state must be the next state (ns->nxstate).
1050                          */
1051                         ns->stateidx = ns->npstates - 1;
1052                 } else {
1053                         ns->stateidx = ns->npstates;
1054                 }
1055                 ns->npstates = 0;
1056                 ns->state = ns->op[ns->stateidx];
1057                 ns->nxstate = ns->op[ns->stateidx + 1];
1058                 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1059                                 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1060                 return 0;
1061         }
1062
1063         if (opsfound == 0) {
1064                 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1065                 if (ns->npstates != 0) {
1066                         NS_DBG("find_operation: no operation found, try again with state %s\n",
1067                                         get_state_name(ns->state));
1068                         ns->npstates = 0;
1069                         return find_operation(ns, 0);
1070
1071                 }
1072                 NS_DBG("find_operation: no operations found\n");
1073                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1074                 return -2;
1075         }
1076
1077         if (flag) {
1078                 /* This shouldn't happen */
1079                 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1080                 return -2;
1081         }
1082
1083         NS_DBG("find_operation: there is still ambiguity\n");
1084
1085         ns->pstates[ns->npstates++] = ns->state;
1086
1087         return -1;
1088 }
1089
1090 /*
1091  * Returns a pointer to the current page.
1092  */
1093 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1094 {
1095         return &(ns->pages[ns->regs.row]);
1096 }
1097
1098 /*
1099  * Retuns a pointer to the current byte, within the current page.
1100  */
1101 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1102 {
1103         return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1104 }
1105
1106 /*
1107  * Fill the NAND buffer with data read from the specified page.
1108  */
1109 static void read_page(struct nandsim *ns, int num)
1110 {
1111         union ns_mem *mypage;
1112
1113         mypage = NS_GET_PAGE(ns);
1114         if (mypage->byte == NULL) {
1115                 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1116                 memset(ns->buf.byte, 0xFF, num);
1117         } else {
1118                 unsigned int page_no = ns->regs.row;
1119                 NS_DBG("read_page: page %d allocated, reading from %d\n",
1120                         ns->regs.row, ns->regs.column + ns->regs.off);
1121                 if (read_error(page_no)) {
1122                         int i;
1123                         memset(ns->buf.byte, 0xFF, num);
1124                         for (i = 0; i < num; ++i)
1125                                 ns->buf.byte[i] = random32();
1126                         NS_WARN("simulating read error in page %u\n", page_no);
1127                         return;
1128                 }
1129                 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1130                 if (bitflips && random32() < (1 << 22)) {
1131                         int flips = 1;
1132                         if (bitflips > 1)
1133                                 flips = (random32() % (int) bitflips) + 1;
1134                         while (flips--) {
1135                                 int pos = random32() % (num * 8);
1136                                 ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1137                                 NS_WARN("read_page: flipping bit %d in page %d "
1138                                         "reading from %d ecc: corrected=%u failed=%u\n",
1139                                         pos, ns->regs.row, ns->regs.column + ns->regs.off,
1140                                         nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1141                         }
1142                 }
1143         }
1144 }
1145
1146 /*
1147  * Erase all pages in the specified sector.
1148  */
1149 static void erase_sector(struct nandsim *ns)
1150 {
1151         union ns_mem *mypage;
1152         int i;
1153
1154         mypage = NS_GET_PAGE(ns);
1155         for (i = 0; i < ns->geom.pgsec; i++) {
1156                 if (mypage->byte != NULL) {
1157                         NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1158                         kfree(mypage->byte);
1159                         mypage->byte = NULL;
1160                 }
1161                 mypage++;
1162         }
1163 }
1164
1165 /*
1166  * Program the specified page with the contents from the NAND buffer.
1167  */
1168 static int prog_page(struct nandsim *ns, int num)
1169 {
1170         int i;
1171         union ns_mem *mypage;
1172         u_char *pg_off;
1173
1174         mypage = NS_GET_PAGE(ns);
1175         if (mypage->byte == NULL) {
1176                 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1177                 mypage->byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
1178                 if (mypage->byte == NULL) {
1179                         NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1180                         return -1;
1181                 }
1182                 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1183         }
1184
1185         pg_off = NS_PAGE_BYTE_OFF(ns);
1186         for (i = 0; i < num; i++)
1187                 pg_off[i] &= ns->buf.byte[i];
1188
1189         return 0;
1190 }
1191
1192 /*
1193  * If state has any action bit, perform this action.
1194  *
1195  * RETURNS: 0 if success, -1 if error.
1196  */
1197 static int do_state_action(struct nandsim *ns, uint32_t action)
1198 {
1199         int num;
1200         int busdiv = ns->busw == 8 ? 1 : 2;
1201         unsigned int erase_block_no, page_no;
1202
1203         action &= ACTION_MASK;
1204
1205         /* Check that page address input is correct */
1206         if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1207                 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1208                 return -1;
1209         }
1210
1211         switch (action) {
1212
1213         case ACTION_CPY:
1214                 /*
1215                  * Copy page data to the internal buffer.
1216                  */
1217
1218                 /* Column shouldn't be very large */
1219                 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1220                         NS_ERR("do_state_action: column number is too large\n");
1221                         break;
1222                 }
1223                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1224                 read_page(ns, num);
1225
1226                 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1227                         num, NS_RAW_OFFSET(ns) + ns->regs.off);
1228
1229                 if (ns->regs.off == 0)
1230                         NS_LOG("read page %d\n", ns->regs.row);
1231                 else if (ns->regs.off < ns->geom.pgsz)
1232                         NS_LOG("read page %d (second half)\n", ns->regs.row);
1233                 else
1234                         NS_LOG("read OOB of page %d\n", ns->regs.row);
1235
1236                 NS_UDELAY(access_delay);
1237                 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1238
1239                 break;
1240
1241         case ACTION_SECERASE:
1242                 /*
1243                  * Erase sector.
1244                  */
1245
1246                 if (ns->lines.wp) {
1247                         NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1248                         return -1;
1249                 }
1250
1251                 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1252                         || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1253                         NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1254                         return -1;
1255                 }
1256
1257                 ns->regs.row = (ns->regs.row <<
1258                                 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1259                 ns->regs.column = 0;
1260
1261                 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1262
1263                 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1264                                 ns->regs.row, NS_RAW_OFFSET(ns));
1265                 NS_LOG("erase sector %u\n", erase_block_no);
1266
1267                 erase_sector(ns);
1268
1269                 NS_MDELAY(erase_delay);
1270
1271                 if (erase_error(erase_block_no)) {
1272                         NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1273                         return -1;
1274                 }
1275
1276                 break;
1277
1278         case ACTION_PRGPAGE:
1279                 /*
1280                  * Programm page - move internal buffer data to the page.
1281                  */
1282
1283                 if (ns->lines.wp) {
1284                         NS_WARN("do_state_action: device is write-protected, programm\n");
1285                         return -1;
1286                 }
1287
1288                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1289                 if (num != ns->regs.count) {
1290                         NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1291                                         ns->regs.count, num);
1292                         return -1;
1293                 }
1294
1295                 if (prog_page(ns, num) == -1)
1296                         return -1;
1297
1298                 page_no = ns->regs.row;
1299
1300                 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1301                         num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1302                 NS_LOG("programm page %d\n", ns->regs.row);
1303
1304                 NS_UDELAY(programm_delay);
1305                 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1306
1307                 if (write_error(page_no)) {
1308                         NS_WARN("simulating write failure in page %u\n", page_no);
1309                         return -1;
1310                 }
1311
1312                 break;
1313
1314         case ACTION_ZEROOFF:
1315                 NS_DBG("do_state_action: set internal offset to 0\n");
1316                 ns->regs.off = 0;
1317                 break;
1318
1319         case ACTION_HALFOFF:
1320                 if (!(ns->options & OPT_PAGE512_8BIT)) {
1321                         NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1322                                 "byte page size 8x chips\n");
1323                         return -1;
1324                 }
1325                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1326                 ns->regs.off = ns->geom.pgsz/2;
1327                 break;
1328
1329         case ACTION_OOBOFF:
1330                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1331                 ns->regs.off = ns->geom.pgsz;
1332                 break;
1333
1334         default:
1335                 NS_DBG("do_state_action: BUG! unknown action\n");
1336         }
1337
1338         return 0;
1339 }
1340
1341 /*
1342  * Switch simulator's state.
1343  */
1344 static void switch_state(struct nandsim *ns)
1345 {
1346         if (ns->op) {
1347                 /*
1348                  * The current operation have already been identified.
1349                  * Just follow the states chain.
1350                  */
1351
1352                 ns->stateidx += 1;
1353                 ns->state = ns->nxstate;
1354                 ns->nxstate = ns->op[ns->stateidx + 1];
1355
1356                 NS_DBG("switch_state: operation is known, switch to the next state, "
1357                         "state: %s, nxstate: %s\n",
1358                         get_state_name(ns->state), get_state_name(ns->nxstate));
1359
1360                 /* See, whether we need to do some action */
1361                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1362                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1363                         return;
1364                 }
1365
1366         } else {
1367                 /*
1368                  * We don't yet know which operation we perform.
1369                  * Try to identify it.
1370                  */
1371
1372                 /*
1373                  *  The only event causing the switch_state function to
1374                  *  be called with yet unknown operation is new command.
1375                  */
1376                 ns->state = get_state_by_command(ns->regs.command);
1377
1378                 NS_DBG("switch_state: operation is unknown, try to find it\n");
1379
1380                 if (find_operation(ns, 0) != 0)
1381                         return;
1382
1383                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1384                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1385                         return;
1386                 }
1387         }
1388
1389         /* For 16x devices column means the page offset in words */
1390         if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1391                 NS_DBG("switch_state: double the column number for 16x device\n");
1392                 ns->regs.column <<= 1;
1393         }
1394
1395         if (NS_STATE(ns->nxstate) == STATE_READY) {
1396                 /*
1397                  * The current state is the last. Return to STATE_READY
1398                  */
1399
1400                 u_char status = NS_STATUS_OK(ns);
1401
1402                 /* In case of data states, see if all bytes were input/output */
1403                 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1404                         && ns->regs.count != ns->regs.num) {
1405                         NS_WARN("switch_state: not all bytes were processed, %d left\n",
1406                                         ns->regs.num - ns->regs.count);
1407                         status = NS_STATUS_FAILED(ns);
1408                 }
1409
1410                 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1411
1412                 switch_to_ready_state(ns, status);
1413
1414                 return;
1415         } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1416                 /*
1417                  * If the next state is data input/output, switch to it now
1418                  */
1419
1420                 ns->state      = ns->nxstate;
1421                 ns->nxstate    = ns->op[++ns->stateidx + 1];
1422                 ns->regs.num   = ns->regs.count = 0;
1423
1424                 NS_DBG("switch_state: the next state is data I/O, switch, "
1425                         "state: %s, nxstate: %s\n",
1426                         get_state_name(ns->state), get_state_name(ns->nxstate));
1427
1428                 /*
1429                  * Set the internal register to the count of bytes which
1430                  * are expected to be input or output
1431                  */
1432                 switch (NS_STATE(ns->state)) {
1433                         case STATE_DATAIN:
1434                         case STATE_DATAOUT:
1435                                 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1436                                 break;
1437
1438                         case STATE_DATAOUT_ID:
1439                                 ns->regs.num = ns->geom.idbytes;
1440                                 break;
1441
1442                         case STATE_DATAOUT_STATUS:
1443                         case STATE_DATAOUT_STATUS_M:
1444                                 ns->regs.count = ns->regs.num = 0;
1445                                 break;
1446
1447                         default:
1448                                 NS_ERR("switch_state: BUG! unknown data state\n");
1449                 }
1450
1451         } else if (ns->nxstate & STATE_ADDR_MASK) {
1452                 /*
1453                  * If the next state is address input, set the internal
1454                  * register to the number of expected address bytes
1455                  */
1456
1457                 ns->regs.count = 0;
1458
1459                 switch (NS_STATE(ns->nxstate)) {
1460                         case STATE_ADDR_PAGE:
1461                                 ns->regs.num = ns->geom.pgaddrbytes;
1462
1463                                 break;
1464                         case STATE_ADDR_SEC:
1465                                 ns->regs.num = ns->geom.secaddrbytes;
1466                                 break;
1467
1468                         case STATE_ADDR_ZERO:
1469                                 ns->regs.num = 1;
1470                                 break;
1471
1472                         default:
1473                                 NS_ERR("switch_state: BUG! unknown address state\n");
1474                 }
1475         } else {
1476                 /*
1477                  * Just reset internal counters.
1478                  */
1479
1480                 ns->regs.num = 0;
1481                 ns->regs.count = 0;
1482         }
1483 }
1484
1485 static u_char ns_nand_read_byte(struct mtd_info *mtd)
1486 {
1487         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1488         u_char outb = 0x00;
1489
1490         /* Sanity and correctness checks */
1491         if (!ns->lines.ce) {
1492                 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1493                 return outb;
1494         }
1495         if (ns->lines.ale || ns->lines.cle) {
1496                 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1497                 return outb;
1498         }
1499         if (!(ns->state & STATE_DATAOUT_MASK)) {
1500                 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1501                         "return %#x\n", get_state_name(ns->state), (uint)outb);
1502                 return outb;
1503         }
1504
1505         /* Status register may be read as many times as it is wanted */
1506         if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1507                 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1508                 return ns->regs.status;
1509         }
1510
1511         /* Check if there is any data in the internal buffer which may be read */
1512         if (ns->regs.count == ns->regs.num) {
1513                 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1514                 return outb;
1515         }
1516
1517         switch (NS_STATE(ns->state)) {
1518                 case STATE_DATAOUT:
1519                         if (ns->busw == 8) {
1520                                 outb = ns->buf.byte[ns->regs.count];
1521                                 ns->regs.count += 1;
1522                         } else {
1523                                 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1524                                 ns->regs.count += 2;
1525                         }
1526                         break;
1527                 case STATE_DATAOUT_ID:
1528                         NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1529                         outb = ns->ids[ns->regs.count];
1530                         ns->regs.count += 1;
1531                         break;
1532                 default:
1533                         BUG();
1534         }
1535
1536         if (ns->regs.count == ns->regs.num) {
1537                 NS_DBG("read_byte: all bytes were read\n");
1538
1539                 /*
1540                  * The OPT_AUTOINCR allows to read next conseqitive pages without
1541                  * new read operation cycle.
1542                  */
1543                 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
1544                         ns->regs.count = 0;
1545                         if (ns->regs.row + 1 < ns->geom.pgnum)
1546                                 ns->regs.row += 1;
1547                         NS_DBG("read_byte: switch to the next page (%#x)\n", ns->regs.row);
1548                         do_state_action(ns, ACTION_CPY);
1549                 }
1550                 else if (NS_STATE(ns->nxstate) == STATE_READY)
1551                         switch_state(ns);
1552
1553         }
1554
1555         return outb;
1556 }
1557
1558 static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1559 {
1560         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1561
1562         /* Sanity and correctness checks */
1563         if (!ns->lines.ce) {
1564                 NS_ERR("write_byte: chip is disabled, ignore write\n");
1565                 return;
1566         }
1567         if (ns->lines.ale && ns->lines.cle) {
1568                 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1569                 return;
1570         }
1571
1572         if (ns->lines.cle == 1) {
1573                 /*
1574                  * The byte written is a command.
1575                  */
1576
1577                 if (byte == NAND_CMD_RESET) {
1578                         NS_LOG("reset chip\n");
1579                         switch_to_ready_state(ns, NS_STATUS_OK(ns));
1580                         return;
1581                 }
1582
1583                 /*
1584                  * Chip might still be in STATE_DATAOUT
1585                  * (if OPT_AUTOINCR feature is supported), STATE_DATAOUT_STATUS or
1586                  * STATE_DATAOUT_STATUS_M state. If so, switch state.
1587                  */
1588                 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
1589                         || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M
1590                         || ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT))
1591                         switch_state(ns);
1592
1593                 /* Check if chip is expecting command */
1594                 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
1595                         /*
1596                          * We are in situation when something else (not command)
1597                          * was expected but command was input. In this case ignore
1598                          * previous command(s)/state(s) and accept the last one.
1599                          */
1600                         NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
1601                                 "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
1602                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1603                 }
1604
1605                 /* Check that the command byte is correct */
1606                 if (check_command(byte)) {
1607                         NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
1608                         return;
1609                 }
1610
1611                 NS_DBG("command byte corresponding to %s state accepted\n",
1612                         get_state_name(get_state_by_command(byte)));
1613                 ns->regs.command = byte;
1614                 switch_state(ns);
1615
1616         } else if (ns->lines.ale == 1) {
1617                 /*
1618                  * The byte written is an address.
1619                  */
1620
1621                 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
1622
1623                         NS_DBG("write_byte: operation isn't known yet, identify it\n");
1624
1625                         if (find_operation(ns, 1) < 0)
1626                                 return;
1627
1628                         if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1629                                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1630                                 return;
1631                         }
1632
1633                         ns->regs.count = 0;
1634                         switch (NS_STATE(ns->nxstate)) {
1635                                 case STATE_ADDR_PAGE:
1636                                         ns->regs.num = ns->geom.pgaddrbytes;
1637                                         break;
1638                                 case STATE_ADDR_SEC:
1639                                         ns->regs.num = ns->geom.secaddrbytes;
1640                                         break;
1641                                 case STATE_ADDR_ZERO:
1642                                         ns->regs.num = 1;
1643                                         break;
1644                                 default:
1645                                         BUG();
1646                         }
1647                 }
1648
1649                 /* Check that chip is expecting address */
1650                 if (!(ns->nxstate & STATE_ADDR_MASK)) {
1651                         NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
1652                                 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
1653                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1654                         return;
1655                 }
1656
1657                 /* Check if this is expected byte */
1658                 if (ns->regs.count == ns->regs.num) {
1659                         NS_ERR("write_byte: no more address bytes expected\n");
1660                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1661                         return;
1662                 }
1663
1664                 accept_addr_byte(ns, byte);
1665
1666                 ns->regs.count += 1;
1667
1668                 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
1669                                 (uint)byte, ns->regs.count, ns->regs.num);
1670
1671                 if (ns->regs.count == ns->regs.num) {
1672                         NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
1673                         switch_state(ns);
1674                 }
1675
1676         } else {
1677                 /*
1678                  * The byte written is an input data.
1679                  */
1680
1681                 /* Check that chip is expecting data input */
1682                 if (!(ns->state & STATE_DATAIN_MASK)) {
1683                         NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
1684                                 "switch to %s\n", (uint)byte,
1685                                 get_state_name(ns->state), get_state_name(STATE_READY));
1686                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1687                         return;
1688                 }
1689
1690                 /* Check if this is expected byte */
1691                 if (ns->regs.count == ns->regs.num) {
1692                         NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
1693                                         ns->regs.num);
1694                         return;
1695                 }
1696
1697                 if (ns->busw == 8) {
1698                         ns->buf.byte[ns->regs.count] = byte;
1699                         ns->regs.count += 1;
1700                 } else {
1701                         ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
1702                         ns->regs.count += 2;
1703                 }
1704         }
1705
1706         return;
1707 }
1708
1709 static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask)
1710 {
1711         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1712
1713         ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
1714         ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
1715         ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
1716
1717         if (cmd != NAND_CMD_NONE)
1718                 ns_nand_write_byte(mtd, cmd);
1719 }
1720
1721 static int ns_device_ready(struct mtd_info *mtd)
1722 {
1723         NS_DBG("device_ready\n");
1724         return 1;
1725 }
1726
1727 static uint16_t ns_nand_read_word(struct mtd_info *mtd)
1728 {
1729         struct nand_chip *chip = (struct nand_chip *)mtd->priv;
1730
1731         NS_DBG("read_word\n");
1732
1733         return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8);
1734 }
1735
1736 static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
1737 {
1738         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1739
1740         /* Check that chip is expecting data input */
1741         if (!(ns->state & STATE_DATAIN_MASK)) {
1742                 NS_ERR("write_buf: data input isn't expected, state is %s, "
1743                         "switch to STATE_READY\n", get_state_name(ns->state));
1744                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1745                 return;
1746         }
1747
1748         /* Check if these are expected bytes */
1749         if (ns->regs.count + len > ns->regs.num) {
1750                 NS_ERR("write_buf: too many input bytes\n");
1751                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1752                 return;
1753         }
1754
1755         memcpy(ns->buf.byte + ns->regs.count, buf, len);
1756         ns->regs.count += len;
1757
1758         if (ns->regs.count == ns->regs.num) {
1759                 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
1760         }
1761 }
1762
1763 static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
1764 {
1765         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1766
1767         /* Sanity and correctness checks */
1768         if (!ns->lines.ce) {
1769                 NS_ERR("read_buf: chip is disabled\n");
1770                 return;
1771         }
1772         if (ns->lines.ale || ns->lines.cle) {
1773                 NS_ERR("read_buf: ALE or CLE pin is high\n");
1774                 return;
1775         }
1776         if (!(ns->state & STATE_DATAOUT_MASK)) {
1777                 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
1778                         get_state_name(ns->state));
1779                 return;
1780         }
1781
1782         if (NS_STATE(ns->state) != STATE_DATAOUT) {
1783                 int i;
1784
1785                 for (i = 0; i < len; i++)
1786                         buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd);
1787
1788                 return;
1789         }
1790
1791         /* Check if these are expected bytes */
1792         if (ns->regs.count + len > ns->regs.num) {
1793                 NS_ERR("read_buf: too many bytes to read\n");
1794                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1795                 return;
1796         }
1797
1798         memcpy(buf, ns->buf.byte + ns->regs.count, len);
1799         ns->regs.count += len;
1800
1801         if (ns->regs.count == ns->regs.num) {
1802                 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
1803                         ns->regs.count = 0;
1804                         if (ns->regs.row + 1 < ns->geom.pgnum)
1805                                 ns->regs.row += 1;
1806                         NS_DBG("read_buf: switch to the next page (%#x)\n", ns->regs.row);
1807                         do_state_action(ns, ACTION_CPY);
1808                 }
1809                 else if (NS_STATE(ns->nxstate) == STATE_READY)
1810                         switch_state(ns);
1811         }
1812
1813         return;
1814 }
1815
1816 static int ns_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
1817 {
1818         ns_nand_read_buf(mtd, (u_char *)&ns_verify_buf[0], len);
1819
1820         if (!memcmp(buf, &ns_verify_buf[0], len)) {
1821                 NS_DBG("verify_buf: the buffer is OK\n");
1822                 return 0;
1823         } else {
1824                 NS_DBG("verify_buf: the buffer is wrong\n");
1825                 return -EFAULT;
1826         }
1827 }
1828
1829 /*
1830  * Module initialization function
1831  */
1832 static int __init ns_init_module(void)
1833 {
1834         struct nand_chip *chip;
1835         struct nandsim *nand;
1836         int retval = -ENOMEM, i;
1837
1838         if (bus_width != 8 && bus_width != 16) {
1839                 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
1840                 return -EINVAL;
1841         }
1842
1843         /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
1844         nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip)
1845                                 + sizeof(struct nandsim), GFP_KERNEL);
1846         if (!nsmtd) {
1847                 NS_ERR("unable to allocate core structures.\n");
1848                 return -ENOMEM;
1849         }
1850         chip        = (struct nand_chip *)(nsmtd + 1);
1851         nsmtd->priv = (void *)chip;
1852         nand        = (struct nandsim *)(chip + 1);
1853         chip->priv  = (void *)nand;
1854
1855         /*
1856          * Register simulator's callbacks.
1857          */
1858         chip->cmd_ctrl   = ns_hwcontrol;
1859         chip->read_byte  = ns_nand_read_byte;
1860         chip->dev_ready  = ns_device_ready;
1861         chip->write_buf  = ns_nand_write_buf;
1862         chip->read_buf   = ns_nand_read_buf;
1863         chip->verify_buf = ns_nand_verify_buf;
1864         chip->read_word  = ns_nand_read_word;
1865         chip->ecc.mode   = NAND_ECC_SOFT;
1866         chip->options   |= NAND_SKIP_BBTSCAN;
1867
1868         /*
1869          * Perform minimum nandsim structure initialization to handle
1870          * the initial ID read command correctly
1871          */
1872         if (third_id_byte != 0xFF || fourth_id_byte != 0xFF)
1873                 nand->geom.idbytes = 4;
1874         else
1875                 nand->geom.idbytes = 2;
1876         nand->regs.status = NS_STATUS_OK(nand);
1877         nand->nxstate = STATE_UNKNOWN;
1878         nand->options |= OPT_PAGE256; /* temporary value */
1879         nand->ids[0] = first_id_byte;
1880         nand->ids[1] = second_id_byte;
1881         nand->ids[2] = third_id_byte;
1882         nand->ids[3] = fourth_id_byte;
1883         if (bus_width == 16) {
1884                 nand->busw = 16;
1885                 chip->options |= NAND_BUSWIDTH_16;
1886         }
1887
1888         nsmtd->owner = THIS_MODULE;
1889
1890         if ((retval = parse_weakblocks()) != 0)
1891                 goto error;
1892
1893         if ((retval = parse_weakpages()) != 0)
1894                 goto error;
1895
1896         if ((retval = parse_gravepages()) != 0)
1897                 goto error;
1898
1899         if ((retval = nand_scan(nsmtd, 1)) != 0) {
1900                 NS_ERR("can't register NAND Simulator\n");
1901                 if (retval > 0)
1902                         retval = -ENXIO;
1903                 goto error;
1904         }
1905
1906         if ((retval = init_nandsim(nsmtd)) != 0)
1907                 goto err_exit;
1908
1909         if ((retval = parse_badblocks(nand, nsmtd)) != 0)
1910                 goto err_exit;
1911
1912         if ((retval = nand_default_bbt(nsmtd)) != 0)
1913                 goto err_exit;
1914
1915         /* Register NAND partitions */
1916         if ((retval = add_mtd_partitions(nsmtd, &nand->partitions[0], nand->nbparts)) != 0)
1917                 goto err_exit;
1918
1919         return 0;
1920
1921 err_exit:
1922         free_nandsim(nand);
1923         nand_release(nsmtd);
1924         for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
1925                 kfree(nand->partitions[i].name);
1926 error:
1927         kfree(nsmtd);
1928         free_lists();
1929
1930         return retval;
1931 }
1932
1933 module_init(ns_init_module);
1934
1935 /*
1936  * Module clean-up function
1937  */
1938 static void __exit ns_cleanup_module(void)
1939 {
1940         struct nandsim *ns = (struct nandsim *)(((struct nand_chip *)nsmtd->priv)->priv);
1941         int i;
1942
1943         free_nandsim(ns);    /* Free nandsim private resources */
1944         nand_release(nsmtd); /* Unregister driver */
1945         for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
1946                 kfree(ns->partitions[i].name);
1947         kfree(nsmtd);        /* Free other structures */
1948         free_lists();
1949 }
1950
1951 module_exit(ns_cleanup_module);
1952
1953 MODULE_LICENSE ("GPL");
1954 MODULE_AUTHOR ("Artem B. Bityuckiy");
1955 MODULE_DESCRIPTION ("The NAND flash simulator");