4 * Normal mappings of chips in physical memory
7 #include <linux/module.h>
8 #include <linux/types.h>
9 #include <linux/version.h>
10 #include <linux/kernel.h>
11 #include <linux/init.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/map.h>
15 #include <linux/mtd/cfi.h>
16 #include <linux/mtd/flashchip.h>
17 #include <linux/pci.h>
18 #include <linux/pci_ids.h>
19 #include <linux/list.h>
22 #define xstr(s) str(s)
24 #define MOD_NAME xstr(KBUILD_BASENAME)
26 #define ADDRESS_NAME_LEN 18
28 #define ROM_PROBE_STEP_SIZE (64*1024) /* 64KiB */
30 struct amd76xrom_window {
34 struct list_head maps;
39 struct amd76xrom_map_info {
40 struct list_head list;
44 char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN];
47 /* The 2 bits controlling the window size are often set to allow reading
48 * the BIOS, but too small to allow writing, since the lock registers are
49 * 4MiB lower in the address space than the data.
51 * This is intended to prevent flashing the bios, perhaps accidentally.
53 * This parameter allows the normal driver to over-ride the BIOS settings.
55 * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
56 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
60 static uint win_size_bits;
61 module_param(win_size_bits, uint, 0);
62 MODULE_PARM_DESC(win_size_bits, "ROM window size bits override for 0x43 byte, normally set by BIOS.");
64 static struct amd76xrom_window amd76xrom_window = {
65 .maps = LIST_HEAD_INIT(amd76xrom_window.maps),
68 static void amd76xrom_cleanup(struct amd76xrom_window *window)
70 struct amd76xrom_map_info *map, *scratch;
74 /* Disable writes through the rom window */
75 pci_read_config_byte(window->pdev, 0x40, &byte);
76 pci_write_config_byte(window->pdev, 0x40, byte & ~1);
77 pci_dev_put(window->pdev);
80 /* Free all of the mtd devices */
81 list_for_each_entry_safe(map, scratch, &window->maps, list) {
82 if (map->rsrc.parent) {
83 release_resource(&map->rsrc);
85 del_mtd_device(map->mtd);
86 map_destroy(map->mtd);
90 if (window->rsrc.parent)
91 release_resource(&window->rsrc);
94 iounmap(window->virt);
103 static int __devinit amd76xrom_init_one (struct pci_dev *pdev,
104 const struct pci_device_id *ent)
106 static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL };
108 struct amd76xrom_window *window = &amd76xrom_window;
109 struct amd76xrom_map_info *map = NULL;
110 unsigned long map_top;
112 /* Remember the pci dev I find the window in - already have a ref */
115 /* Enable the selected rom window. This is often incorrectly
116 * set up by the BIOS, and the 4MiB offset for the lock registers
117 * requires the full 5MiB of window space.
119 * This 'write, then read' approach leaves the bits for
120 * other uses of the hardware info.
122 pci_read_config_byte(pdev, 0x43, &byte);
123 pci_write_config_byte(pdev, 0x43, byte | win_size_bits );
125 /* Assume the rom window is properly setup, and find it's size */
126 pci_read_config_byte(pdev, 0x43, &byte);
127 if ((byte & ((1<<7)|(1<<6))) == ((1<<7)|(1<<6))) {
128 window->phys = 0xffb00000; /* 5MiB */
130 else if ((byte & (1<<7)) == (1<<7)) {
131 window->phys = 0xffc00000; /* 4MiB */
134 window->phys = 0xffff0000; /* 64KiB */
136 window->size = 0xffffffffUL - window->phys + 1UL;
139 * Try to reserve the window mem region. If this fails then
140 * it is likely due to a fragment of the window being
141 * "reseved" by the BIOS. In the case that the
142 * request_mem_region() fails then once the rom size is
143 * discovered we will try to reserve the unreserved fragment.
145 window->rsrc.name = MOD_NAME;
146 window->rsrc.start = window->phys;
147 window->rsrc.end = window->phys + window->size - 1;
148 window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
149 if (request_resource(&iomem_resource, &window->rsrc)) {
150 window->rsrc.parent = NULL;
151 printk(KERN_ERR MOD_NAME
152 " %s(): Unable to register resource"
153 " 0x%.16llx-0x%.16llx - kernel bug?\n",
155 (unsigned long long)window->rsrc.start,
156 (unsigned long long)window->rsrc.end);
160 /* Enable writes through the rom window */
161 pci_read_config_byte(pdev, 0x40, &byte);
162 pci_write_config_byte(pdev, 0x40, byte | 1);
164 /* FIXME handle registers 0x80 - 0x8C the bios region locks */
166 /* For write accesses caches are useless */
167 window->virt = ioremap_nocache(window->phys, window->size);
169 printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n",
170 window->phys, window->size);
174 /* Get the first address to look for an rom chip at */
175 map_top = window->phys;
177 /* The probe sequence run over the firmware hub lock
178 * registers sets them to 0x7 (no access).
179 * Probe at most the last 4M of the address space.
181 if (map_top < 0xffc00000) {
182 map_top = 0xffc00000;
185 /* Loop through and look for rom chips */
186 while((map_top - 1) < 0xffffffffUL) {
187 struct cfi_private *cfi;
188 unsigned long offset;
192 map = kmalloc(sizeof(*map), GFP_KERNEL);
195 printk(KERN_ERR MOD_NAME ": kmalloc failed");
198 memset(map, 0, sizeof(*map));
199 INIT_LIST_HEAD(&map->list);
200 map->map.name = map->map_name;
201 map->map.phys = map_top;
202 offset = map_top - window->phys;
203 map->map.virt = (void __iomem *)
204 (((unsigned long)(window->virt)) + offset);
205 map->map.size = 0xffffffffUL - map_top + 1UL;
206 /* Set the name of the map to the address I am trying */
207 sprintf(map->map_name, "%s @%08Lx",
208 MOD_NAME, (unsigned long long)map->map.phys);
210 /* There is no generic VPP support */
211 for(map->map.bankwidth = 32; map->map.bankwidth;
212 map->map.bankwidth >>= 1)
215 /* Skip bankwidths that are not supported */
216 if (!map_bankwidth_supported(map->map.bankwidth))
219 /* Setup the map methods */
220 simple_map_init(&map->map);
222 /* Try all of the probe methods */
223 probe_type = rom_probe_types;
224 for(; *probe_type; probe_type++) {
225 map->mtd = do_map_probe(*probe_type, &map->map);
230 map_top += ROM_PROBE_STEP_SIZE;
233 /* Trim the size if we are larger than the map */
234 if (map->mtd->size > map->map.size) {
235 printk(KERN_WARNING MOD_NAME
236 " rom(%u) larger than window(%lu). fixing...\n",
237 map->mtd->size, map->map.size);
238 map->mtd->size = map->map.size;
240 if (window->rsrc.parent) {
242 * Registering the MTD device in iomem may not be possible
243 * if there is a BIOS "reserved" and BUSY range. If this
244 * fails then continue anyway.
246 map->rsrc.name = map->map_name;
247 map->rsrc.start = map->map.phys;
248 map->rsrc.end = map->map.phys + map->mtd->size - 1;
249 map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
250 if (request_resource(&window->rsrc, &map->rsrc)) {
251 printk(KERN_ERR MOD_NAME
252 ": cannot reserve MTD resource\n");
253 map->rsrc.parent = NULL;
257 /* Make the whole region visible in the map */
258 map->map.virt = window->virt;
259 map->map.phys = window->phys;
260 cfi = map->map.fldrv_priv;
261 for(i = 0; i < cfi->numchips; i++) {
262 cfi->chips[i].start += offset;
265 /* Now that the mtd devices is complete claim and export it */
266 map->mtd->owner = THIS_MODULE;
267 if (add_mtd_device(map->mtd)) {
268 map_destroy(map->mtd);
274 /* Calculate the new value of map_top */
275 map_top += map->mtd->size;
277 /* File away the map structure */
278 list_add(&map->list, &window->maps);
283 /* Free any left over map structures */
285 /* See if I have any map structures */
286 if (list_empty(&window->maps)) {
287 amd76xrom_cleanup(window);
294 static void __devexit amd76xrom_remove_one (struct pci_dev *pdev)
296 struct amd76xrom_window *window = &amd76xrom_window;
298 amd76xrom_cleanup(window);
301 static struct pci_device_id amd76xrom_pci_tbl[] = {
302 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410,
303 PCI_ANY_ID, PCI_ANY_ID, },
304 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7440,
305 PCI_ANY_ID, PCI_ANY_ID, },
306 { PCI_VENDOR_ID_AMD, 0x7468 }, /* amd8111 support */
310 MODULE_DEVICE_TABLE(pci, amd76xrom_pci_tbl);
313 static struct pci_driver amd76xrom_driver = {
315 .id_table = amd76xrom_pci_tbl,
316 .probe = amd76xrom_init_one,
317 .remove = amd76xrom_remove_one,
321 static int __init init_amd76xrom(void)
323 struct pci_dev *pdev;
324 struct pci_device_id *id;
326 for(id = amd76xrom_pci_tbl; id->vendor; id++) {
327 pdev = pci_get_device(id->vendor, id->device, NULL);
333 return amd76xrom_init_one(pdev, &amd76xrom_pci_tbl[0]);
337 return pci_register_driver(&amd76xrom_driver);
341 static void __exit cleanup_amd76xrom(void)
343 amd76xrom_remove_one(amd76xrom_window.pdev);
346 module_init(init_amd76xrom);
347 module_exit(cleanup_amd76xrom);
349 MODULE_LICENSE("GPL");
350 MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>");
351 MODULE_DESCRIPTION("MTD map driver for BIOS chips on the AMD76X southbridge");