2 * MTD SPI driver for ST M25Pxx flash chips
4 * Author: Mike Lavender, mike@steroidmicros.com
6 * Copyright (c) 2005, Intec Automation Inc.
8 * Some parts are based on lart.c by Abraham Van Der Merwe
10 * Cleaned up and generalized based on mtd_dataflash.c
12 * This code is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/device.h>
21 #include <linux/interrupt.h>
22 #include <linux/interrupt.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/partitions.h>
25 #include <linux/spi/spi.h>
26 #include <linux/spi/flash.h>
28 #include <asm/semaphore.h>
31 /* NOTE: AT 25F and SST 25LF series are very similar,
32 * but commands for sector erase and chip id differ...
35 #define FLASH_PAGESIZE 256
38 #define OPCODE_WREN 6 /* Write enable */
39 #define OPCODE_RDSR 5 /* Read status register */
40 #define OPCODE_READ 3 /* Read data bytes */
41 #define OPCODE_PP 2 /* Page program */
42 #define OPCODE_SE 0xd8 /* Sector erase */
43 #define OPCODE_RES 0xab /* Read Electronic Signature */
44 #define OPCODE_RDID 0x9f /* Read JEDEC ID */
46 /* Status Register bits. */
47 #define SR_WIP 1 /* Write in progress */
48 #define SR_WEL 2 /* Write enable latch */
49 #define SR_BP0 4 /* Block protect 0 */
50 #define SR_BP1 8 /* Block protect 1 */
51 #define SR_BP2 0x10 /* Block protect 2 */
52 #define SR_SRWD 0x80 /* SR write protect */
54 /* Define max times to check status register before we give up. */
55 #define MAX_READY_WAIT_COUNT 100000
58 #ifdef CONFIG_MTD_PARTITIONS
59 #define mtd_has_partitions() (1)
61 #define mtd_has_partitions() (0)
64 /****************************************************************************/
67 struct spi_device *spi;
68 struct semaphore lock;
74 static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd)
76 return container_of(mtd, struct m25p, mtd);
79 /****************************************************************************/
82 * Internal helper functions
86 * Read the status register, returning its value in the location
87 * Return the status register value.
88 * Returns negative if error occurred.
90 static int read_sr(struct m25p *flash)
93 u8 code = OPCODE_RDSR;
96 retval = spi_write_then_read(flash->spi, &code, 1, &val, 1);
99 dev_err(&flash->spi->dev, "error %d reading SR\n",
109 * Set write enable latch with Write Enable command.
110 * Returns negative if error occurred.
112 static inline int write_enable(struct m25p *flash)
114 u8 code = OPCODE_WREN;
116 return spi_write_then_read(flash->spi, &code, 1, NULL, 0);
121 * Service routine to read status register until ready, or timeout occurs.
122 * Returns non-zero if error.
124 static int wait_till_ready(struct m25p *flash)
129 /* one chip guarantees max 5 msec wait here after page writes,
130 * but potentially three seconds (!) after page erase.
132 for (count = 0; count < MAX_READY_WAIT_COUNT; count++) {
133 if ((sr = read_sr(flash)) < 0)
135 else if (!(sr & SR_WIP))
138 /* REVISIT sometimes sleeping would be best */
146 * Erase one sector of flash memory at offset ``offset'' which is any
147 * address within the sector which should be erased.
149 * Returns 0 if successful, non-zero otherwise.
151 static int erase_sector(struct m25p *flash, u32 offset)
153 DEBUG(MTD_DEBUG_LEVEL3, "%s: %s at 0x%08x\n", flash->spi->dev.bus_id,
154 __FUNCTION__, offset);
156 /* Wait until finished previous write command. */
157 if (wait_till_ready(flash))
160 /* Send write enable, then erase commands. */
163 /* Set up command buffer. */
164 flash->command[0] = OPCODE_SE;
165 flash->command[1] = offset >> 16;
166 flash->command[2] = offset >> 8;
167 flash->command[3] = offset;
169 spi_write(flash->spi, flash->command, sizeof(flash->command));
174 /****************************************************************************/
181 * Erase an address range on the flash chip. The address range may extend
182 * one or more erase sectors. Return an error is there is a problem erasing.
184 static int m25p80_erase(struct mtd_info *mtd, struct erase_info *instr)
186 struct m25p *flash = mtd_to_m25p(mtd);
189 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
190 flash->spi->dev.bus_id, __FUNCTION__, "at",
191 (u32)instr->addr, instr->len);
194 if (instr->addr + instr->len > flash->mtd.size)
196 if ((instr->addr % mtd->erasesize) != 0
197 || (instr->len % mtd->erasesize) != 0) {
206 /* now erase those sectors */
208 if (erase_sector(flash, addr)) {
209 instr->state = MTD_ERASE_FAILED;
214 addr += mtd->erasesize;
215 len -= mtd->erasesize;
220 instr->state = MTD_ERASE_DONE;
221 mtd_erase_callback(instr);
227 * Read an address range from the flash chip. The address range
228 * may be any size provided it is within the physical boundaries.
230 static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
231 size_t *retlen, u_char *buf)
233 struct m25p *flash = mtd_to_m25p(mtd);
234 struct spi_transfer t[2];
235 struct spi_message m;
237 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
238 flash->spi->dev.bus_id, __FUNCTION__, "from",
245 if (from + len > flash->mtd.size)
250 /* Wait till previous write/erase is done. */
251 if (wait_till_ready(flash)) {
252 /* REVISIT status return?? */
257 memset(t, 0, (sizeof t));
259 /* NOTE: OPCODE_FAST_READ (if available) is faster... */
261 /* Set up the write data buffer. */
262 flash->command[0] = OPCODE_READ;
263 flash->command[1] = from >> 16;
264 flash->command[2] = from >> 8;
265 flash->command[3] = from;
267 /* Byte count starts at zero. */
271 t[0].tx_buf = flash->command;
272 t[0].len = sizeof(flash->command);
280 spi_sync(flash->spi, &m);
282 *retlen = m.actual_length - sizeof(flash->command);
290 * Write an address range to the flash chip. Data must be written in
291 * FLASH_PAGESIZE chunks. The address range may be any size provided
292 * it is within the physical boundaries.
294 static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len,
295 size_t *retlen, const u_char *buf)
297 struct m25p *flash = mtd_to_m25p(mtd);
298 u32 page_offset, page_size;
299 struct spi_transfer t[2];
300 struct spi_message m;
302 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
303 flash->spi->dev.bus_id, __FUNCTION__, "to",
313 if (to + len > flash->mtd.size)
318 /* Wait until finished previous write command. */
319 if (wait_till_ready(flash))
324 memset(t, 0, (sizeof t));
326 /* Set up the opcode in the write buffer. */
327 flash->command[0] = OPCODE_PP;
328 flash->command[1] = to >> 16;
329 flash->command[2] = to >> 8;
330 flash->command[3] = to;
332 t[0].tx_buf = flash->command;
333 t[0].len = sizeof(flash->command);
338 /* what page do we start with? */
339 page_offset = to % FLASH_PAGESIZE;
341 /* do all the bytes fit onto one page? */
342 if (page_offset + len <= FLASH_PAGESIZE) {
346 spi_sync(flash->spi, &m);
348 *retlen = m.actual_length - sizeof(flash->command);
352 /* the size of data remaining on the first page */
353 page_size = FLASH_PAGESIZE - page_offset;
356 t[1].len = page_size;
357 spi_sync(flash->spi, &m);
359 *retlen = m.actual_length - sizeof(flash->command);
361 /* write everything in PAGESIZE chunks */
362 for (i = page_size; i < len; i += page_size) {
364 if (page_size > FLASH_PAGESIZE)
365 page_size = FLASH_PAGESIZE;
367 /* write the next page to flash */
368 flash->command[1] = (to + i) >> 16;
369 flash->command[2] = (to + i) >> 8;
370 flash->command[3] = (to + i);
372 t[1].tx_buf = buf + i;
373 t[1].len = page_size;
375 wait_till_ready(flash);
379 spi_sync(flash->spi, &m);
381 *retlen += m.actual_length - sizeof(flash->command);
391 /****************************************************************************/
394 * SPI device driver setup and teardown
401 unsigned sector_size;
405 static struct flash_info __devinitdata m25p_data [] = {
406 /* REVISIT: fill in JEDEC ids, for parts that have them */
407 { "m25p05", 0x05, 0x0000, 32 * 1024, 2 },
408 { "m25p10", 0x10, 0x0000, 32 * 1024, 4 },
409 { "m25p20", 0x11, 0x0000, 64 * 1024, 4 },
410 { "m25p40", 0x12, 0x0000, 64 * 1024, 8 },
411 { "m25p80", 0x13, 0x0000, 64 * 1024, 16 },
412 { "m25p16", 0x14, 0x0000, 64 * 1024, 32 },
413 { "m25p32", 0x15, 0x0000, 64 * 1024, 64 },
414 { "m25p64", 0x16, 0x2017, 64 * 1024, 128 },
418 * board specific setup should have ensured the SPI clock used here
419 * matches what the READ command supports, at least until this driver
420 * understands FAST_READ (for clocks over 25 MHz).
422 static int __devinit m25p_probe(struct spi_device *spi)
424 struct flash_platform_data *data;
426 struct flash_info *info;
429 /* Platform data helps sort out which chip type we have, as
430 * well as how this board partitions it.
432 data = spi->dev.platform_data;
433 if (!data || !data->type) {
434 /* FIXME some chips can identify themselves with RES
435 * or JEDEC get-id commands. Try them ...
437 DEBUG(MTD_DEBUG_LEVEL1, "%s: no chip id\n",
438 flash->spi->dev.bus_id);
442 for (i = 0, info = m25p_data; i < ARRAY_SIZE(m25p_data); i++, info++) {
443 if (strcmp(data->type, info->name) == 0)
446 if (i == ARRAY_SIZE(m25p_data)) {
447 DEBUG(MTD_DEBUG_LEVEL1, "%s: unrecognized id %s\n",
448 flash->spi->dev.bus_id, data->type);
452 flash = kzalloc(sizeof *flash, SLAB_KERNEL);
457 init_MUTEX(&flash->lock);
458 dev_set_drvdata(&spi->dev, flash);
461 flash->mtd.name = data->name;
463 flash->mtd.name = spi->dev.bus_id;
465 flash->mtd.type = MTD_NORFLASH;
466 flash->mtd.flags = MTD_CAP_NORFLASH;
467 flash->mtd.size = info->sector_size * info->n_sectors;
468 flash->mtd.erasesize = info->sector_size;
469 flash->mtd.erase = m25p80_erase;
470 flash->mtd.read = m25p80_read;
471 flash->mtd.write = m25p80_write;
473 dev_info(&spi->dev, "%s (%d Kbytes)\n", info->name,
474 flash->mtd.size / 1024);
476 DEBUG(MTD_DEBUG_LEVEL2,
477 "mtd .name = %s, .size = 0x%.8x (%uM) "
478 ".erasesize = 0x%.8x (%uK) .numeraseregions = %d\n",
480 flash->mtd.size, flash->mtd.size / (1024*1024),
481 flash->mtd.erasesize, flash->mtd.erasesize / 1024,
482 flash->mtd.numeraseregions);
484 if (flash->mtd.numeraseregions)
485 for (i = 0; i < flash->mtd.numeraseregions; i++)
486 DEBUG(MTD_DEBUG_LEVEL2,
487 "mtd.eraseregions[%d] = { .offset = 0x%.8x, "
488 ".erasesize = 0x%.8x (%uK), "
489 ".numblocks = %d }\n",
490 i, flash->mtd.eraseregions[i].offset,
491 flash->mtd.eraseregions[i].erasesize,
492 flash->mtd.eraseregions[i].erasesize / 1024,
493 flash->mtd.eraseregions[i].numblocks);
496 /* partitions should match sector boundaries; and it may be good to
497 * use readonly partitions for writeprotected sectors (BP2..BP0).
499 if (mtd_has_partitions()) {
500 struct mtd_partition *parts = NULL;
503 #ifdef CONFIG_MTD_CMDLINE_PARTS
504 static const char *part_probes[] = { "cmdlinepart", NULL, };
506 nr_parts = parse_mtd_partitions(&flash->mtd,
507 part_probes, &parts, 0);
510 if (nr_parts <= 0 && data && data->parts) {
512 nr_parts = data->nr_parts;
516 for (i = 0; i < data->nr_parts; i++) {
517 DEBUG(MTD_DEBUG_LEVEL2, "partitions[%d] = "
518 "{.name = %s, .offset = 0x%.8x, "
519 ".size = 0x%.8x (%uK) }\n",
520 i, data->parts[i].name,
521 data->parts[i].offset,
523 data->parts[i].size / 1024);
525 flash->partitioned = 1;
526 return add_mtd_partitions(&flash->mtd, parts, nr_parts);
528 } else if (data->nr_parts)
529 dev_warn(&spi->dev, "ignoring %d default partitions on %s\n",
530 data->nr_parts, data->name);
532 return add_mtd_device(&flash->mtd) == 1 ? -ENODEV : 0;
536 static int __devexit m25p_remove(struct spi_device *spi)
538 struct m25p *flash = dev_get_drvdata(&spi->dev);
541 /* Clean up MTD stuff. */
542 if (mtd_has_partitions() && flash->partitioned)
543 status = del_mtd_partitions(&flash->mtd);
545 status = del_mtd_device(&flash->mtd);
552 static struct spi_driver m25p80_driver = {
555 .bus = &spi_bus_type,
556 .owner = THIS_MODULE,
559 .remove = __devexit_p(m25p_remove),
563 static int m25p80_init(void)
565 return spi_register_driver(&m25p80_driver);
569 static void m25p80_exit(void)
571 spi_unregister_driver(&m25p80_driver);
575 module_init(m25p80_init);
576 module_exit(m25p80_exit);
578 MODULE_LICENSE("GPL");
579 MODULE_AUTHOR("Mike Lavender");
580 MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");