2 * tifm_sd.c - TI FlashMedia driver
4 * Copyright (C) 2006 Alex Dubov <oakad@yahoo.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
13 #include <linux/tifm.h>
14 #include <linux/mmc/protocol.h>
15 #include <linux/mmc/host.h>
16 #include <linux/highmem.h>
19 #define DRIVER_NAME "tifm_sd"
20 #define DRIVER_VERSION "0.8"
22 static int no_dma = 0;
23 static int fixed_timeout = 0;
24 module_param(no_dma, bool, 0644);
25 module_param(fixed_timeout, bool, 0644);
27 /* Constants here are mostly from OMAP5912 datasheet */
28 #define TIFM_MMCSD_RESET 0x0002
29 #define TIFM_MMCSD_CLKMASK 0x03ff
30 #define TIFM_MMCSD_POWER 0x0800
31 #define TIFM_MMCSD_4BBUS 0x8000
32 #define TIFM_MMCSD_RXDE 0x8000 /* rx dma enable */
33 #define TIFM_MMCSD_TXDE 0x0080 /* tx dma enable */
34 #define TIFM_MMCSD_BUFINT 0x0c00 /* set bits: AE, AF */
35 #define TIFM_MMCSD_DPE 0x0020 /* data timeout counted in kilocycles */
36 #define TIFM_MMCSD_INAB 0x0080 /* abort / initialize command */
37 #define TIFM_MMCSD_READ 0x8000
39 #define TIFM_MMCSD_DATAMASK 0x401d /* set bits: CERR, EOFB, BRS, CB, EOC */
40 #define TIFM_MMCSD_ERRMASK 0x01e0 /* set bits: CCRC, CTO, DCRC, DTO */
41 #define TIFM_MMCSD_EOC 0x0001 /* end of command phase */
42 #define TIFM_MMCSD_CB 0x0004 /* card enter busy state */
43 #define TIFM_MMCSD_BRS 0x0008 /* block received/sent */
44 #define TIFM_MMCSD_EOFB 0x0010 /* card exit busy state */
45 #define TIFM_MMCSD_DTO 0x0020 /* data time-out */
46 #define TIFM_MMCSD_DCRC 0x0040 /* data crc error */
47 #define TIFM_MMCSD_CTO 0x0080 /* command time-out */
48 #define TIFM_MMCSD_CCRC 0x0100 /* command crc error */
49 #define TIFM_MMCSD_AF 0x0400 /* fifo almost full */
50 #define TIFM_MMCSD_AE 0x0800 /* fifo almost empty */
51 #define TIFM_MMCSD_CERR 0x4000 /* card status error */
53 #define TIFM_MMCSD_FIFO_SIZE 0x0020
55 #define TIFM_MMCSD_RSP_R0 0x0000
56 #define TIFM_MMCSD_RSP_R1 0x0100
57 #define TIFM_MMCSD_RSP_R2 0x0200
58 #define TIFM_MMCSD_RSP_R3 0x0300
59 #define TIFM_MMCSD_RSP_R4 0x0400
60 #define TIFM_MMCSD_RSP_R5 0x0500
61 #define TIFM_MMCSD_RSP_R6 0x0600
63 #define TIFM_MMCSD_RSP_BUSY 0x0800
65 #define TIFM_MMCSD_CMD_BC 0x0000
66 #define TIFM_MMCSD_CMD_BCR 0x1000
67 #define TIFM_MMCSD_CMD_AC 0x2000
68 #define TIFM_MMCSD_CMD_ADTC 0x3000
72 CMD, /* main command ended */
73 BRS, /* block transfer finished */
74 SCMD, /* stop command ended */
75 CARD, /* card left busy state */
76 FIFO, /* FIFO operation completed (uncertain) */
81 FIFO_RDY = 0x0001, /* hardware dependent value */
85 OPENDRAIN = 0x0040, /* hardware dependent value */
86 CARD_EVENT = 0x0100, /* hardware dependent value */
87 CARD_RO = 0x0200, /* hardware dependent value */
88 FIFO_EVENT = 0x10000 }; /* hardware dependent value */
95 unsigned int clk_freq;
97 unsigned long timeout_jiffies;
99 struct tasklet_struct finish_tasklet;
100 struct timer_list timer;
101 struct mmc_request *req;
102 wait_queue_head_t notify;
104 size_t written_blocks;
110 static char* tifm_sd_data_buffer(struct mmc_data *data)
112 return page_address(data->sg->page) + data->sg->offset;
115 static int tifm_sd_transfer_data(struct tifm_dev *sock, struct tifm_sd *host,
116 unsigned int host_status)
118 struct mmc_command *cmd = host->req->cmd;
119 unsigned int t_val = 0, cnt = 0;
122 if (host_status & TIFM_MMCSD_BRS) {
123 /* in non-dma rx mode BRS fires when fifo is still not empty */
124 if (no_dma && (cmd->data->flags & MMC_DATA_READ)) {
125 buffer = tifm_sd_data_buffer(host->req->data);
126 while (host->buffer_size > host->buffer_pos) {
127 t_val = readl(sock->addr + SOCK_MMCSD_DATA);
128 buffer[host->buffer_pos++] = t_val & 0xff;
129 buffer[host->buffer_pos++] =
135 buffer = tifm_sd_data_buffer(host->req->data);
136 if ((cmd->data->flags & MMC_DATA_READ) &&
137 (host_status & TIFM_MMCSD_AF)) {
138 for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
139 t_val = readl(sock->addr + SOCK_MMCSD_DATA);
140 if (host->buffer_size > host->buffer_pos) {
141 buffer[host->buffer_pos++] =
143 buffer[host->buffer_pos++] =
147 } else if ((cmd->data->flags & MMC_DATA_WRITE)
148 && (host_status & TIFM_MMCSD_AE)) {
149 for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
150 if (host->buffer_size > host->buffer_pos) {
151 t_val = buffer[host->buffer_pos++]
153 t_val |= ((buffer[host->buffer_pos++])
156 sock->addr + SOCK_MMCSD_DATA);
164 static unsigned int tifm_sd_op_flags(struct mmc_command *cmd)
168 switch (mmc_resp_type(cmd)) {
170 rc |= TIFM_MMCSD_RSP_R0;
173 rc |= TIFM_MMCSD_RSP_BUSY; // deliberate fall-through
175 rc |= TIFM_MMCSD_RSP_R1;
178 rc |= TIFM_MMCSD_RSP_R2;
181 rc |= TIFM_MMCSD_RSP_R3;
187 switch (mmc_cmd_type(cmd)) {
189 rc |= TIFM_MMCSD_CMD_BC;
192 rc |= TIFM_MMCSD_CMD_BCR;
195 rc |= TIFM_MMCSD_CMD_AC;
198 rc |= TIFM_MMCSD_CMD_ADTC;
206 static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd)
208 struct tifm_dev *sock = host->dev;
209 unsigned int cmd_mask = tifm_sd_op_flags(cmd) |
210 (host->flags & OPENDRAIN);
212 if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
213 cmd_mask |= TIFM_MMCSD_READ;
215 dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n",
216 cmd->opcode, cmd->arg, cmd_mask);
218 writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH);
219 writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW);
220 writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND);
223 static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock)
225 cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16)
226 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18);
227 cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16)
228 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10);
229 cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16)
230 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08);
231 cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16)
232 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00);
235 static void tifm_sd_process_cmd(struct tifm_dev *sock, struct tifm_sd *host,
236 unsigned int host_status)
238 struct mmc_command *cmd = host->req->cmd;
241 switch (host->state) {
245 if (host_status & (TIFM_MMCSD_EOC | TIFM_MMCSD_CERR)) {
246 tifm_sd_fetch_resp(cmd, sock);
256 if (tifm_sd_transfer_data(sock, host, host_status)) {
257 if (cmd->data->flags & MMC_DATA_WRITE) {
261 if (host->req->stop) {
262 tifm_sd_exec(host, host->req->stop);
275 if (host_status & TIFM_MMCSD_EOC) {
276 tifm_sd_fetch_resp(host->req->stop, sock);
282 dev_dbg(&sock->dev, "waiting for CARD, have %zd blocks\n",
283 host->written_blocks);
284 if (!(host->flags & CARD_BUSY)
285 && (host->written_blocks == cmd->data->blocks)) {
287 if (host->req->stop) {
288 tifm_sd_exec(host, host->req->stop);
300 if (host->flags & FIFO_RDY) {
301 host->flags &= ~FIFO_RDY;
302 if (host->req->stop) {
303 tifm_sd_exec(host, host->req->stop);
312 tasklet_schedule(&host->finish_tasklet);
318 /* Called from interrupt handler */
319 static void tifm_sd_data_event(struct tifm_dev *sock)
321 struct tifm_sd *host;
322 unsigned int fifo_status = 0;
324 spin_lock(&sock->lock);
325 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
327 fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
328 writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
330 host->flags |= fifo_status & FIFO_RDY;
333 tifm_sd_process_cmd(sock, host, 0);
335 dev_dbg(&sock->dev, "fifo_status %x\n", fifo_status);
336 spin_unlock(&sock->lock);
340 /* Called from interrupt handler */
341 static void tifm_sd_card_event(struct tifm_dev *sock)
343 struct tifm_sd *host;
344 unsigned int host_status = 0;
347 spin_lock(&sock->lock);
348 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
351 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
352 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
357 if (host_status & TIFM_MMCSD_ERRMASK) {
358 if (host_status & (TIFM_MMCSD_CTO | TIFM_MMCSD_DTO))
359 error_code = MMC_ERR_TIMEOUT;
361 & (TIFM_MMCSD_CCRC | TIFM_MMCSD_DCRC))
362 error_code = MMC_ERR_BADCRC;
364 writel(TIFM_FIFO_INT_SETALL,
365 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
366 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
368 if (host->req->stop) {
369 if (host->state == SCMD) {
370 host->req->stop->error = error_code;
371 } else if (host->state == BRS
372 || host->state == CARD
373 || host->state == FIFO) {
374 host->req->cmd->error = error_code;
375 tifm_sd_exec(host, host->req->stop);
379 host->req->cmd->error = error_code;
382 host->req->cmd->error = error_code;
387 if (host_status & TIFM_MMCSD_CB)
388 host->flags |= CARD_BUSY;
389 if ((host_status & TIFM_MMCSD_EOFB)
390 && (host->flags & CARD_BUSY)) {
391 host->written_blocks++;
392 host->flags &= ~CARD_BUSY;
396 tifm_sd_process_cmd(sock, host, host_status);
398 dev_dbg(&sock->dev, "host_status %x\n", host_status);
399 spin_unlock(&sock->lock);
402 static void tifm_sd_prepare_data(struct tifm_sd *host, struct mmc_command *cmd)
404 struct tifm_dev *sock = host->dev;
405 unsigned int dest_cnt;
408 dev_dbg(&sock->dev, "setting dma for %d blocks\n",
410 writel(TIFM_FIFO_INT_SETALL,
411 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
412 writel(ilog2(cmd->data->blksz) - 2,
413 sock->addr + SOCK_FIFO_PAGE_SIZE);
414 writel(TIFM_FIFO_ENABLE, sock->addr + SOCK_FIFO_CONTROL);
415 writel(TIFM_FIFO_INTMASK, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
417 dest_cnt = (cmd->data->blocks) << 8;
419 writel(sg_dma_address(cmd->data->sg), sock->addr + SOCK_DMA_ADDRESS);
421 writel(cmd->data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
422 writel(cmd->data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
424 if (cmd->data->flags & MMC_DATA_WRITE) {
425 writel(TIFM_MMCSD_TXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
426 writel(dest_cnt | TIFM_DMA_TX | TIFM_DMA_EN,
427 sock->addr + SOCK_DMA_CONTROL);
429 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
430 writel(dest_cnt | TIFM_DMA_EN, sock->addr + SOCK_DMA_CONTROL);
434 static void tifm_sd_set_data_timeout(struct tifm_sd *host,
435 struct mmc_data *data)
437 struct tifm_dev *sock = host->dev;
438 unsigned int data_timeout = data->timeout_clks;
443 data_timeout += data->timeout_ns /
444 ((1000000000UL / host->clk_freq) * host->clk_div);
446 if (data_timeout < 0xffff) {
447 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
448 writel((~TIFM_MMCSD_DPE)
449 & readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
450 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
452 data_timeout = (data_timeout >> 10) + 1;
453 if (data_timeout > 0xffff)
454 data_timeout = 0; /* set to unlimited */
455 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
456 writel(TIFM_MMCSD_DPE
457 | readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
458 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
462 static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq)
464 struct tifm_sd *host = mmc_priv(mmc);
465 struct tifm_dev *sock = host->dev;
468 struct mmc_data *r_data = mrq->cmd->data;
470 spin_lock_irqsave(&sock->lock, flags);
471 if (host->flags & EJECT) {
472 spin_unlock_irqrestore(&sock->lock, flags);
477 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
478 spin_unlock_irqrestore(&sock->lock, flags);
483 tifm_sd_set_data_timeout(host, r_data);
485 sg_count = tifm_map_sg(sock, r_data->sg, r_data->sg_len,
486 mrq->cmd->flags & MMC_DATA_WRITE
487 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
489 printk(KERN_ERR DRIVER_NAME
490 ": scatterlist map failed\n");
491 spin_unlock_irqrestore(&sock->lock, flags);
495 host->written_blocks = 0;
496 host->flags &= ~CARD_BUSY;
497 tifm_sd_prepare_data(host, mrq->cmd);
501 mod_timer(&host->timer, jiffies + host->timeout_jiffies);
503 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
504 sock->addr + SOCK_CONTROL);
505 tifm_sd_exec(host, mrq->cmd);
506 spin_unlock_irqrestore(&sock->lock, flags);
511 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
512 (r_data->flags & MMC_DATA_WRITE)
513 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
515 mrq->cmd->error = MMC_ERR_TIMEOUT;
516 mmc_request_done(mmc, mrq);
519 static void tifm_sd_end_cmd(unsigned long data)
521 struct tifm_sd *host = (struct tifm_sd*)data;
522 struct tifm_dev *sock = host->dev;
523 struct mmc_host *mmc = tifm_get_drvdata(sock);
524 struct mmc_request *mrq;
525 struct mmc_data *r_data = NULL;
528 spin_lock_irqsave(&sock->lock, flags);
530 del_timer(&host->timer);
536 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
537 spin_unlock_irqrestore(&sock->lock, flags);
541 r_data = mrq->cmd->data;
543 if (r_data->flags & MMC_DATA_WRITE) {
544 r_data->bytes_xfered = host->written_blocks
547 r_data->bytes_xfered = r_data->blocks -
548 readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
549 r_data->bytes_xfered *= r_data->blksz;
550 r_data->bytes_xfered += r_data->blksz -
551 readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
553 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
554 (r_data->flags & MMC_DATA_WRITE)
555 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
558 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
559 sock->addr + SOCK_CONTROL);
561 spin_unlock_irqrestore(&sock->lock, flags);
562 mmc_request_done(mmc, mrq);
565 static void tifm_sd_request_nodma(struct mmc_host *mmc, struct mmc_request *mrq)
567 struct tifm_sd *host = mmc_priv(mmc);
568 struct tifm_dev *sock = host->dev;
570 struct mmc_data *r_data = mrq->cmd->data;
572 spin_lock_irqsave(&sock->lock, flags);
573 if (host->flags & EJECT) {
574 spin_unlock_irqrestore(&sock->lock, flags);
579 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
580 spin_unlock_irqrestore(&sock->lock, flags);
585 tifm_sd_set_data_timeout(host, r_data);
587 host->buffer_size = mrq->cmd->data->blocks
588 * mrq->cmd->data->blksz;
590 writel(TIFM_MMCSD_BUFINT
591 | readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
592 sock->addr + SOCK_MMCSD_INT_ENABLE);
593 writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8)
594 | (TIFM_MMCSD_FIFO_SIZE - 1),
595 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
597 host->written_blocks = 0;
598 host->flags &= ~CARD_BUSY;
599 host->buffer_pos = 0;
600 writel(r_data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
601 writel(r_data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
605 mod_timer(&host->timer, jiffies + host->timeout_jiffies);
607 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
608 sock->addr + SOCK_CONTROL);
609 tifm_sd_exec(host, mrq->cmd);
610 spin_unlock_irqrestore(&sock->lock, flags);
614 mrq->cmd->error = MMC_ERR_TIMEOUT;
615 mmc_request_done(mmc, mrq);
618 static void tifm_sd_end_cmd_nodma(unsigned long data)
620 struct tifm_sd *host = (struct tifm_sd*)data;
621 struct tifm_dev *sock = host->dev;
622 struct mmc_host *mmc = tifm_get_drvdata(sock);
623 struct mmc_request *mrq;
624 struct mmc_data *r_data = NULL;
627 spin_lock_irqsave(&sock->lock, flags);
629 del_timer(&host->timer);
635 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
636 spin_unlock_irqrestore(&sock->lock, flags);
640 r_data = mrq->cmd->data;
642 writel((~TIFM_MMCSD_BUFINT) &
643 readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
644 sock->addr + SOCK_MMCSD_INT_ENABLE);
646 if (r_data->flags & MMC_DATA_WRITE) {
647 r_data->bytes_xfered = host->written_blocks
650 r_data->bytes_xfered = r_data->blocks -
651 readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
652 r_data->bytes_xfered *= r_data->blksz;
653 r_data->bytes_xfered += r_data->blksz -
654 readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
656 host->buffer_pos = 0;
657 host->buffer_size = 0;
660 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
661 sock->addr + SOCK_CONTROL);
663 spin_unlock_irqrestore(&sock->lock, flags);
665 mmc_request_done(mmc, mrq);
668 static void tifm_sd_abort(unsigned long data)
670 struct tifm_sd *host = (struct tifm_sd*)data;
672 printk(KERN_ERR DRIVER_NAME
673 ": card failed to respond for a long period of time\n");
675 tifm_eject(host->dev);
678 static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios)
680 struct tifm_sd *host = mmc_priv(mmc);
681 struct tifm_dev *sock = host->dev;
682 unsigned int clk_div1, clk_div2;
685 spin_lock_irqsave(&sock->lock, flags);
687 dev_dbg(&sock->dev, "Setting bus width %d, power %d\n", ios->bus_width,
689 if (ios->bus_width == MMC_BUS_WIDTH_4) {
690 writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG),
691 sock->addr + SOCK_MMCSD_CONFIG);
693 writel((~TIFM_MMCSD_4BBUS)
694 & readl(sock->addr + SOCK_MMCSD_CONFIG),
695 sock->addr + SOCK_MMCSD_CONFIG);
699 clk_div1 = 20000000 / ios->clock;
703 clk_div2 = 24000000 / ios->clock;
707 if ((20000000 / clk_div1) > ios->clock)
709 if ((24000000 / clk_div2) > ios->clock)
711 if ((20000000 / clk_div1) > (24000000 / clk_div2)) {
712 host->clk_freq = 20000000;
713 host->clk_div = clk_div1;
714 writel((~TIFM_CTRL_FAST_CLK)
715 & readl(sock->addr + SOCK_CONTROL),
716 sock->addr + SOCK_CONTROL);
718 host->clk_freq = 24000000;
719 host->clk_div = clk_div2;
720 writel(TIFM_CTRL_FAST_CLK
721 | readl(sock->addr + SOCK_CONTROL),
722 sock->addr + SOCK_CONTROL);
727 host->clk_div &= TIFM_MMCSD_CLKMASK;
729 | ((~TIFM_MMCSD_CLKMASK)
730 & readl(sock->addr + SOCK_MMCSD_CONFIG)),
731 sock->addr + SOCK_MMCSD_CONFIG);
733 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
734 host->flags |= OPENDRAIN;
736 host->flags &= ~OPENDRAIN;
738 /* chip_select : maybe later */
740 //power is set before probe / after remove
741 //I believe, power_off when already marked for eject is sufficient to
743 if ((host->flags & EJECT) && ios->power_mode == MMC_POWER_OFF) {
744 host->flags |= EJECT_DONE;
745 wake_up_all(&host->notify);
748 spin_unlock_irqrestore(&sock->lock, flags);
751 static int tifm_sd_ro(struct mmc_host *mmc)
754 struct tifm_sd *host = mmc_priv(mmc);
755 struct tifm_dev *sock = host->dev;
758 spin_lock_irqsave(&sock->lock, flags);
760 host->flags |= (CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE));
761 rc = (host->flags & CARD_RO) ? 1 : 0;
763 spin_unlock_irqrestore(&sock->lock, flags);
767 static struct mmc_host_ops tifm_sd_ops = {
768 .request = tifm_sd_request,
769 .set_ios = tifm_sd_ios,
773 static int tifm_sd_initialize_host(struct tifm_sd *host)
776 unsigned int host_status = 0;
777 struct tifm_dev *sock = host->dev;
779 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
782 host->clk_freq = 20000000;
783 writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL);
784 writel(host->clk_div | TIFM_MMCSD_POWER,
785 sock->addr + SOCK_MMCSD_CONFIG);
787 /* wait up to 0.51 sec for reset */
788 for (rc = 2; rc <= 256; rc <<= 1) {
789 if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) {
797 printk(KERN_ERR DRIVER_NAME
798 ": controller failed to reset\n");
802 writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
803 writel(host->clk_div | TIFM_MMCSD_POWER,
804 sock->addr + SOCK_MMCSD_CONFIG);
805 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
807 // command timeout fixed to 64 clocks for now
808 writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO);
809 writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND);
811 /* INAB should take much less than reset */
812 for (rc = 1; rc <= 16; rc <<= 1) {
813 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
814 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
815 if (!(host_status & TIFM_MMCSD_ERRMASK)
816 && (host_status & TIFM_MMCSD_EOC)) {
824 printk(KERN_ERR DRIVER_NAME
825 ": card not ready - probe failed on initialization\n");
829 writel(TIFM_MMCSD_DATAMASK | TIFM_MMCSD_ERRMASK,
830 sock->addr + SOCK_MMCSD_INT_ENABLE);
836 static int tifm_sd_probe(struct tifm_dev *sock)
838 struct mmc_host *mmc;
839 struct tifm_sd *host;
842 if (!(TIFM_SOCK_STATE_OCCUPIED
843 & readl(sock->addr + SOCK_PRESENT_STATE))) {
844 printk(KERN_WARNING DRIVER_NAME ": card gone, unexpectedly\n");
848 mmc = mmc_alloc_host(sizeof(struct tifm_sd), &sock->dev);
852 host = mmc_priv(mmc);
853 tifm_set_drvdata(sock, mmc);
855 host->timeout_jiffies = msecs_to_jiffies(1000);
857 init_waitqueue_head(&host->notify);
858 tasklet_init(&host->finish_tasklet,
859 no_dma ? tifm_sd_end_cmd_nodma : tifm_sd_end_cmd,
860 (unsigned long)host);
861 setup_timer(&host->timer, tifm_sd_abort, (unsigned long)host);
863 tifm_sd_ops.request = no_dma ? tifm_sd_request_nodma : tifm_sd_request;
864 mmc->ops = &tifm_sd_ops;
865 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
866 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE;
867 mmc->f_min = 20000000 / 60;
868 mmc->f_max = 24000000;
869 mmc->max_hw_segs = 1;
870 mmc->max_phys_segs = 1;
871 // limited by DMA counter - it's safer to stick with
872 // block counter has 11 bits though
873 mmc->max_blk_count = 256;
874 // 2k maximum hw block length
875 mmc->max_blk_size = 2048;
876 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
877 mmc->max_seg_size = mmc->max_req_size;
878 sock->card_event = tifm_sd_card_event;
879 sock->data_event = tifm_sd_data_event;
880 rc = tifm_sd_initialize_host(host);
883 rc = mmc_add_host(mmc);
893 static void tifm_sd_remove(struct tifm_dev *sock)
895 struct mmc_host *mmc = tifm_get_drvdata(sock);
896 struct tifm_sd *host = mmc_priv(mmc);
899 del_timer_sync(&host->timer);
900 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
902 spin_lock_irqsave(&sock->lock, flags);
903 host->flags |= EJECT;
905 writel(TIFM_FIFO_INT_SETALL,
906 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
907 writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
908 tasklet_schedule(&host->finish_tasklet);
910 spin_unlock_irqrestore(&sock->lock, flags);
911 wait_event_timeout(host->notify, host->flags & EJECT_DONE,
912 host->timeout_jiffies);
913 tasklet_kill(&host->finish_tasklet);
914 mmc_remove_host(mmc);
916 /* The meaning of the bit majority in this constant is unknown. */
917 writel(0xfff8 & readl(sock->addr + SOCK_CONTROL),
918 sock->addr + SOCK_CONTROL);
920 tifm_set_drvdata(sock, NULL);
926 static int tifm_sd_suspend(struct tifm_dev *sock, pm_message_t state)
928 struct mmc_host *mmc = tifm_get_drvdata(sock);
931 rc = mmc_suspend_host(mmc, state);
932 /* The meaning of the bit majority in this constant is unknown. */
933 writel(0xfff8 & readl(sock->addr + SOCK_CONTROL),
934 sock->addr + SOCK_CONTROL);
938 static int tifm_sd_resume(struct tifm_dev *sock)
940 struct mmc_host *mmc = tifm_get_drvdata(sock);
941 struct tifm_sd *host = mmc_priv(mmc);
943 if (sock->type != TIFM_TYPE_SD
944 || tifm_sd_initialize_host(host)) {
948 return mmc_resume_host(mmc);
954 #define tifm_sd_suspend NULL
955 #define tifm_sd_resume NULL
957 #endif /* CONFIG_PM */
959 static struct tifm_device_id tifm_sd_id_tbl[] = {
960 { TIFM_TYPE_SD }, { }
963 static struct tifm_driver tifm_sd_driver = {
968 .id_table = tifm_sd_id_tbl,
969 .probe = tifm_sd_probe,
970 .remove = tifm_sd_remove,
971 .suspend = tifm_sd_suspend,
972 .resume = tifm_sd_resume
975 static int __init tifm_sd_init(void)
977 return tifm_register_driver(&tifm_sd_driver);
980 static void __exit tifm_sd_exit(void)
982 tifm_unregister_driver(&tifm_sd_driver);
985 MODULE_AUTHOR("Alex Dubov");
986 MODULE_DESCRIPTION("TI FlashMedia SD driver");
987 MODULE_LICENSE("GPL");
988 MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl);
989 MODULE_VERSION(DRIVER_VERSION);
991 module_init(tifm_sd_init);
992 module_exit(tifm_sd_exit);