err.no Git - linux-2.6/blob - drivers/mmc/sdhci.c

   1 /*
   2  *  linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
   3  *
   4  *  Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11  /*
  12   * Note that PIO transfer is rather crappy atm. The buffer full/empty
  13   * interrupts aren't reliable so we currently transfer the entire buffer
  14   * directly. Patches to solve the problem are welcome.
  15   */
  16
  17 #include <linux/delay.h>
  18 #include <linux/highmem.h>
  19 #include <linux/pci.h>
  20 #include <linux/dma-mapping.h>
  21
  22 #include <linux/mmc/host.h>
  23 #include <linux/mmc/protocol.h>
  24
  25 #include <asm/scatterlist.h>
  26
  27 #include "sdhci.h"
  28
  29 #define DRIVER_NAME "sdhci"
  30 #define DRIVER_VERSION "0.11"
  31
  32 #define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
  33
  34 #define DBG(f, x...) \
  35         pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
  36
  37 static const struct pci_device_id pci_ids[] __devinitdata = {
  38         /* handle any SD host controller */
  39         {PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)},
  40         { /* end: all zeroes */ },
  41 };
  42
  43 MODULE_DEVICE_TABLE(pci, pci_ids);
  44
  45 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
  46 static void sdhci_finish_data(struct sdhci_host *);
  47
  48 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
  49 static void sdhci_finish_command(struct sdhci_host *);
  50
  51 static void sdhci_dumpregs(struct sdhci_host *host)
  52 {
  53         printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
  54
  55         printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
  56                 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
  57                 readw(host->ioaddr + SDHCI_HOST_VERSION));
  58         printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
  59                 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
  60                 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
  61         printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
  62                 readl(host->ioaddr + SDHCI_ARGUMENT),
  63                 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
  64         printk(KERN_DEBUG DRIVER_NAME ": Present:  0x%08x | Host ctl: 0x%08x\n",
  65                 readl(host->ioaddr + SDHCI_PRESENT_STATE),
  66                 readb(host->ioaddr + SDHCI_HOST_CONTROL));
  67         printk(KERN_DEBUG DRIVER_NAME ": Power:    0x%08x | Blk gap:  0x%08x\n",
  68                 readb(host->ioaddr + SDHCI_POWER_CONTROL),
  69                 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
  70         printk(KERN_DEBUG DRIVER_NAME ": Wake-up:  0x%08x | Clock:    0x%08x\n",
  71                 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
  72                 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
  73         printk(KERN_DEBUG DRIVER_NAME ": Timeout:  0x%08x | Int stat: 0x%08x\n",
  74                 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
  75                 readl(host->ioaddr + SDHCI_INT_STATUS));
  76         printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
  77                 readl(host->ioaddr + SDHCI_INT_ENABLE),
  78                 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
  79         printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
  80                 readw(host->ioaddr + SDHCI_ACMD12_ERR),
  81                 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
  82         printk(KERN_DEBUG DRIVER_NAME ": Caps:     0x%08x | Max curr: 0x%08x\n",
  83                 readl(host->ioaddr + SDHCI_CAPABILITIES),
  84                 readl(host->ioaddr + SDHCI_MAX_CURRENT));
  85
  86         printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
  87 }
  88
  89 /*****************************************************************************\
  90  *                                                                           *
  91  * Low level functions                                                       *
  92  *                                                                           *
  93 \*****************************************************************************/
  94
  95 static void sdhci_reset(struct sdhci_host *host, u8 mask)
  96 {
  97         unsigned long timeout;
  98
  99         writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
 100
 101         if (mask & SDHCI_RESET_ALL)
 102                 host->clock = 0;
 103
 104         /* Wait max 100 ms */
 105         timeout = 100;
 106
 107         /* hw clears the bit when it's done */
 108         while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
 109                 if (timeout == 0) {
 110                         printk(KERN_ERR "%s: Reset 0x%x never completed. "
 111                                 "Please report this to " BUGMAIL ".\n",
 112                                 mmc_hostname(host->mmc), (int)mask);
 113                         sdhci_dumpregs(host);
 114                         return;
 115                 }
 116                 timeout--;
 117                 mdelay(1);
 118         }
 119 }
 120
 121 static void sdhci_init(struct sdhci_host *host)
 122 {
 123         u32 intmask;
 124
 125         sdhci_reset(host, SDHCI_RESET_ALL);
 126
 127         intmask = ~(SDHCI_INT_CARD_INT | SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL);
 128
 129         writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
 130         writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 131 }
 132
 133 static void sdhci_activate_led(struct sdhci_host *host)
 134 {
 135         u8 ctrl;
 136
 137         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 138         ctrl |= SDHCI_CTRL_LED;
 139         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 140 }
 141
 142 static void sdhci_deactivate_led(struct sdhci_host *host)
 143 {
 144         u8 ctrl;
 145
 146         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 147         ctrl &= ~SDHCI_CTRL_LED;
 148         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 149 }
 150
 151 /*****************************************************************************\
 152  *                                                                           *
 153  * Core functions                                                            *
 154  *                                                                           *
 155 \*****************************************************************************/
 156
 157 static inline char* sdhci_kmap_sg(struct sdhci_host* host)
 158 {
 159         host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
 160         return host->mapped_sg + host->cur_sg->offset;
 161 }
 162
 163 static inline void sdhci_kunmap_sg(struct sdhci_host* host)
 164 {
 165         kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
 166 }
 167
 168 static inline int sdhci_next_sg(struct sdhci_host* host)
 169 {
 170         /*
 171          * Skip to next SG entry.
 172          */
 173         host->cur_sg++;
 174         host->num_sg--;
 175
 176         /*
 177          * Any entries left?
 178          */
 179         if (host->num_sg > 0) {
 180                 host->offset = 0;
 181                 host->remain = host->cur_sg->length;
 182         }
 183
 184         return host->num_sg;
 185 }
 186
 187 static void sdhci_transfer_pio(struct sdhci_host *host)
 188 {
 189         char *buffer;
 190         u32 mask;
 191         int bytes, size;
 192         unsigned long max_jiffies;
 193
 194         BUG_ON(!host->data);
 195
 196         if (host->num_sg == 0)
 197                 return;
 198
 199         bytes = 0;
 200         if (host->data->flags & MMC_DATA_READ)
 201                 mask = SDHCI_DATA_AVAILABLE;
 202         else
 203                 mask = SDHCI_SPACE_AVAILABLE;
 204
 205         buffer = sdhci_kmap_sg(host) + host->offset;
 206
 207         /* Transfer shouldn't take more than 5 s */
 208         max_jiffies = jiffies + HZ * 5;
 209
 210         while (host->size > 0) {
 211                 if (time_after(jiffies, max_jiffies)) {
 212                         printk(KERN_ERR "%s: PIO transfer stalled. "
 213                                 "Please report this to "
 214                                 BUGMAIL ".\n", mmc_hostname(host->mmc));
 215                         sdhci_dumpregs(host);
 216
 217                         sdhci_kunmap_sg(host);
 218
 219                         host->data->error = MMC_ERR_FAILED;
 220                         sdhci_finish_data(host);
 221                         return;
 222                 }
 223
 224                 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask))
 225                         continue;
 226
 227                 size = min(host->size, host->remain);
 228
 229                 if (size >= 4) {
 230                         if (host->data->flags & MMC_DATA_READ)
 231                                 *(u32*)buffer = readl(host->ioaddr + SDHCI_BUFFER);
 232                         else
 233                                 writel(*(u32*)buffer, host->ioaddr + SDHCI_BUFFER);
 234                         size = 4;
 235                 } else if (size >= 2) {
 236                         if (host->data->flags & MMC_DATA_READ)
 237                                 *(u16*)buffer = readw(host->ioaddr + SDHCI_BUFFER);
 238                         else
 239                                 writew(*(u16*)buffer, host->ioaddr + SDHCI_BUFFER);
 240                         size = 2;
 241                 } else {
 242                         if (host->data->flags & MMC_DATA_READ)
 243                                 *(u8*)buffer = readb(host->ioaddr + SDHCI_BUFFER);
 244                         else
 245                                 writeb(*(u8*)buffer, host->ioaddr + SDHCI_BUFFER);
 246                         size = 1;
 247                 }
 248
 249                 buffer += size;
 250                 host->offset += size;
 251                 host->remain -= size;
 252
 253                 bytes += size;
 254                 host->size -= size;
 255
 256                 if (host->remain == 0) {
 257                         sdhci_kunmap_sg(host);
 258                         if (sdhci_next_sg(host) == 0) {
 259                                 DBG("PIO transfer: %d bytes\n", bytes);
 260                                 return;
 261                         }
 262                         buffer = sdhci_kmap_sg(host);
 263                 }
 264         }
 265
 266         sdhci_kunmap_sg(host);
 267
 268         DBG("PIO transfer: %d bytes\n", bytes);
 269 }
 270
 271 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
 272 {
 273         u8 count;
 274         unsigned target_timeout, current_timeout;
 275
 276         WARN_ON(host->data);
 277
 278         if (data == NULL)
 279                 return;
 280
 281         DBG("blksz %04x blks %04x flags %08x\n",
 282                 data->blksz, data->blocks, data->flags);
 283         DBG("tsac %d ms nsac %d clk\n",
 284                 data->timeout_ns / 1000000, data->timeout_clks);
 285
 286         /* timeout in us */
 287         target_timeout = data->timeout_ns / 1000 +
 288                 data->timeout_clks / host->clock;
 289
 290         /*
 291          * Figure out needed cycles.
 292          * We do this in steps in order to fit inside a 32 bit int.
 293          * The first step is the minimum timeout, which will have a
 294          * minimum resolution of 6 bits:
 295          * (1) 2^13*1000 > 2^22,
 296          * (2) host->timeout_clk < 2^16
 297          *     =>
 298          *     (1) / (2) > 2^6
 299          */
 300         count = 0;
 301         current_timeout = (1 << 13) * 1000 / host->timeout_clk;
 302         while (current_timeout < target_timeout) {
 303                 count++;
 304                 current_timeout <<= 1;
 305                 if (count >= 0xF)
 306                         break;
 307         }
 308
 309         if (count >= 0xF) {
 310                 printk(KERN_WARNING "%s: Too large timeout requested!\n",
 311                         mmc_hostname(host->mmc));
 312                 count = 0xE;
 313         }
 314
 315         writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
 316
 317         if (host->flags & SDHCI_USE_DMA) {
 318                 int count;
 319
 320                 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
 321                         (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
 322                 BUG_ON(count != 1);
 323
 324                 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
 325         } else {
 326                 host->size = data->blksz * data->blocks;
 327
 328                 host->cur_sg = data->sg;
 329                 host->num_sg = data->sg_len;
 330
 331                 host->offset = 0;
 332                 host->remain = host->cur_sg->length;
 333         }
 334
 335         writew(data->blksz, host->ioaddr + SDHCI_BLOCK_SIZE);
 336         writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
 337 }
 338
 339 static void sdhci_set_transfer_mode(struct sdhci_host *host,
 340         struct mmc_data *data)
 341 {
 342         u16 mode;
 343
 344         WARN_ON(host->data);
 345
 346         if (data == NULL)
 347                 return;
 348
 349         mode = SDHCI_TRNS_BLK_CNT_EN;
 350         if (data->blocks > 1)
 351                 mode |= SDHCI_TRNS_MULTI;
 352         if (data->flags & MMC_DATA_READ)
 353                 mode |= SDHCI_TRNS_READ;
 354         if (host->flags & SDHCI_USE_DMA)
 355                 mode |= SDHCI_TRNS_DMA;
 356
 357         writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
 358 }
 359
 360 static void sdhci_finish_data(struct sdhci_host *host)
 361 {
 362         struct mmc_data *data;
 363         u32 intmask;
 364         u16 blocks;
 365
 366         BUG_ON(!host->data);
 367
 368         data = host->data;
 369         host->data = NULL;
 370
 371         if (host->flags & SDHCI_USE_DMA) {
 372                 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
 373                         (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
 374         } else {
 375                 intmask = readl(host->ioaddr + SDHCI_SIGNAL_ENABLE);
 376                 intmask &= ~(SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL);
 377                 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 378
 379                 intmask = readl(host->ioaddr + SDHCI_INT_ENABLE);
 380                 intmask &= ~(SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL);
 381                 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
 382         }
 383
 384         /*
 385          * Controller doesn't count down when in single block mode.
 386          */
 387         if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
 388                 blocks = 0;
 389         else
 390                 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
 391         data->bytes_xfered = data->blksz * (data->blocks - blocks);
 392
 393         if ((data->error == MMC_ERR_NONE) && blocks) {
 394                 printk(KERN_ERR "%s: Controller signalled completion even "
 395                         "though there were blocks left. Please report this "
 396                         "to " BUGMAIL ".\n", mmc_hostname(host->mmc));
 397                 data->error = MMC_ERR_FAILED;
 398         }
 399
 400         if (host->size != 0) {
 401                 printk(KERN_ERR "%s: %d bytes were left untransferred. "
 402                         "Please report this to " BUGMAIL ".\n",
 403                         mmc_hostname(host->mmc), host->size);
 404                 data->error = MMC_ERR_FAILED;
 405         }
 406
 407         DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
 408
 409         if (data->stop) {
 410                 /*
 411                  * The controller needs a reset of internal state machines
 412                  * upon error conditions.
 413                  */
 414                 if (data->error != MMC_ERR_NONE) {
 415                         sdhci_reset(host, SDHCI_RESET_CMD);
 416                         sdhci_reset(host, SDHCI_RESET_DATA);
 417                 }
 418
 419                 sdhci_send_command(host, data->stop);
 420         } else
 421                 tasklet_schedule(&host->finish_tasklet);
 422 }
 423
 424 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
 425 {
 426         int flags;
 427         unsigned long timeout;
 428
 429         WARN_ON(host->cmd);
 430
 431         DBG("Sending cmd (%x)\n", cmd->opcode);
 432
 433         /* Wait max 10 ms */
 434         timeout = 10;
 435         while (readl(host->ioaddr + SDHCI_PRESENT_STATE) &
 436                 (SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT)) {
 437                 if (timeout == 0) {
 438                         printk(KERN_ERR "%s: Controller never released "
 439                                 "inhibit bits. Please report this to "
 440                                 BUGMAIL ".\n", mmc_hostname(host->mmc));
 441                         sdhci_dumpregs(host);
 442                         cmd->error = MMC_ERR_FAILED;
 443                         tasklet_schedule(&host->finish_tasklet);
 444                         return;
 445                 }
 446                 timeout--;
 447                 mdelay(1);
 448         }
 449
 450         mod_timer(&host->timer, jiffies + 10 * HZ);
 451
 452         host->cmd = cmd;
 453
 454         sdhci_prepare_data(host, cmd->data);
 455
 456         writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
 457
 458         sdhci_set_transfer_mode(host, cmd->data);
 459
 460         if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
 461                 printk(KERN_ERR "%s: Unsupported response type! "
 462                         "Please report this to " BUGMAIL ".\n",
 463                         mmc_hostname(host->mmc));
 464                 cmd->error = MMC_ERR_INVALID;
 465                 tasklet_schedule(&host->finish_tasklet);
 466                 return;
 467         }
 468
 469         if (!(cmd->flags & MMC_RSP_PRESENT))
 470                 flags = SDHCI_CMD_RESP_NONE;
 471         else if (cmd->flags & MMC_RSP_136)
 472                 flags = SDHCI_CMD_RESP_LONG;
 473         else if (cmd->flags & MMC_RSP_BUSY)
 474                 flags = SDHCI_CMD_RESP_SHORT_BUSY;
 475         else
 476                 flags = SDHCI_CMD_RESP_SHORT;
 477
 478         if (cmd->flags & MMC_RSP_CRC)
 479                 flags |= SDHCI_CMD_CRC;
 480         if (cmd->flags & MMC_RSP_OPCODE)
 481                 flags |= SDHCI_CMD_INDEX;
 482         if (cmd->data)
 483                 flags |= SDHCI_CMD_DATA;
 484
 485         writel(SDHCI_MAKE_CMD(cmd->opcode, flags),
 486                 host->ioaddr + SDHCI_COMMAND);
 487 }
 488
 489 static void sdhci_finish_command(struct sdhci_host *host)
 490 {
 491         int i;
 492
 493         BUG_ON(host->cmd == NULL);
 494
 495         if (host->cmd->flags & MMC_RSP_PRESENT) {
 496                 if (host->cmd->flags & MMC_RSP_136) {
 497                         /* CRC is stripped so we need to do some shifting. */
 498                         for (i = 0;i < 4;i++) {
 499                                 host->cmd->resp[i] = readl(host->ioaddr +
 500                                         SDHCI_RESPONSE + (3-i)*4) << 8;
 501                                 if (i != 3)
 502                                         host->cmd->resp[i] |=
 503                                                 readb(host->ioaddr +
 504                                                 SDHCI_RESPONSE + (3-i)*4-1);
 505                         }
 506                 } else {
 507                         host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
 508                 }
 509         }
 510
 511         host->cmd->error = MMC_ERR_NONE;
 512
 513         DBG("Ending cmd (%x)\n", host->cmd->opcode);
 514
 515         if (host->cmd->data) {
 516                 u32 intmask;
 517
 518                 host->data = host->cmd->data;
 519
 520                 if (!(host->flags & SDHCI_USE_DMA)) {
 521                         /*
 522                          * Don't enable the interrupts until now to make sure we
 523                          * get stable handling of the FIFO.
 524                          */
 525                         intmask = readl(host->ioaddr + SDHCI_INT_ENABLE);
 526                         intmask |= SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL;
 527                         writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
 528
 529                         intmask = readl(host->ioaddr + SDHCI_SIGNAL_ENABLE);
 530                         intmask |= SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL;
 531                         writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 532
 533                         /*
 534                          * The buffer interrupts are to unreliable so we
 535                          * start the transfer immediatly.
 536                          */
 537                         sdhci_transfer_pio(host);
 538                 }
 539         } else
 540                 tasklet_schedule(&host->finish_tasklet);
 541
 542         host->cmd = NULL;
 543 }
 544
 545 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 546 {
 547         int div;
 548         u16 clk;
 549         unsigned long timeout;
 550
 551         if (clock == host->clock)
 552                 return;
 553
 554         writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
 555
 556         if (clock == 0)
 557                 goto out;
 558
 559         for (div = 1;div < 256;div *= 2) {
 560                 if ((host->max_clk / div) <= clock)
 561                         break;
 562         }
 563         div >>= 1;
 564
 565         clk = div << SDHCI_DIVIDER_SHIFT;
 566         clk |= SDHCI_CLOCK_INT_EN;
 567         writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
 568
 569         /* Wait max 10 ms */
 570         timeout = 10;
 571         while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
 572                 & SDHCI_CLOCK_INT_STABLE)) {
 573                 if (timeout == 0) {
 574                         printk(KERN_ERR "%s: Internal clock never stabilised. "
 575                                 "Please report this to " BUGMAIL ".\n",
 576                                 mmc_hostname(host->mmc));
 577                         sdhci_dumpregs(host);
 578                         return;
 579                 }
 580                 timeout--;
 581                 mdelay(1);
 582         }
 583
 584         clk |= SDHCI_CLOCK_CARD_EN;
 585         writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
 586
 587 out:
 588         host->clock = clock;
 589 }
 590
 591 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
 592 {
 593         u8 pwr;
 594
 595         if (host->power == power)
 596                 return;
 597
 598         writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
 599
 600         if (power == (unsigned short)-1)
 601                 goto out;
 602
 603         pwr = SDHCI_POWER_ON;
 604
 605         switch (power) {
 606         case MMC_VDD_170:
 607         case MMC_VDD_180:
 608         case MMC_VDD_190:
 609                 pwr |= SDHCI_POWER_180;
 610                 break;
 611         case MMC_VDD_290:
 612         case MMC_VDD_300:
 613         case MMC_VDD_310:
 614                 pwr |= SDHCI_POWER_300;
 615                 break;
 616         case MMC_VDD_320:
 617         case MMC_VDD_330:
 618         case MMC_VDD_340:
 619                 pwr |= SDHCI_POWER_330;
 620                 break;
 621         default:
 622                 BUG();
 623         }
 624
 625         writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
 626
 627 out:
 628         host->power = power;
 629 }
 630
 631 /*****************************************************************************\
 632  *                                                                           *
 633  * MMC callbacks                                                             *
 634  *                                                                           *
 635 \*****************************************************************************/
 636
 637 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
 638 {
 639         struct sdhci_host *host;
 640         unsigned long flags;
 641
 642         host = mmc_priv(mmc);
 643
 644         spin_lock_irqsave(&host->lock, flags);
 645
 646         WARN_ON(host->mrq != NULL);
 647
 648         sdhci_activate_led(host);
 649
 650         host->mrq = mrq;
 651
 652         if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
 653                 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
 654                 tasklet_schedule(&host->finish_tasklet);
 655         } else
 656                 sdhci_send_command(host, mrq->cmd);
 657
 658         spin_unlock_irqrestore(&host->lock, flags);
 659 }
 660
 661 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 662 {
 663         struct sdhci_host *host;
 664         unsigned long flags;
 665         u8 ctrl;
 666
 667         host = mmc_priv(mmc);
 668
 669         spin_lock_irqsave(&host->lock, flags);
 670
 671         /*
 672          * Reset the chip on each power off.
 673          * Should clear out any weird states.
 674          */
 675         if (ios->power_mode == MMC_POWER_OFF) {
 676                 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 677                 sdhci_init(host);
 678         }
 679
 680         sdhci_set_clock(host, ios->clock);
 681
 682         if (ios->power_mode == MMC_POWER_OFF)
 683                 sdhci_set_power(host, -1);
 684         else
 685                 sdhci_set_power(host, ios->vdd);
 686
 687         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 688         if (ios->bus_width == MMC_BUS_WIDTH_4)
 689                 ctrl |= SDHCI_CTRL_4BITBUS;
 690         else
 691                 ctrl &= ~SDHCI_CTRL_4BITBUS;
 692         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 693
 694         spin_unlock_irqrestore(&host->lock, flags);
 695 }
 696
 697 static int sdhci_get_ro(struct mmc_host *mmc)
 698 {
 699         struct sdhci_host *host;
 700         unsigned long flags;
 701         int present;
 702
 703         host = mmc_priv(mmc);
 704
 705         spin_lock_irqsave(&host->lock, flags);
 706
 707         present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
 708
 709         spin_unlock_irqrestore(&host->lock, flags);
 710
 711         return !(present & SDHCI_WRITE_PROTECT);
 712 }
 713
 714 static struct mmc_host_ops sdhci_ops = {
 715         .request        = sdhci_request,
 716         .set_ios        = sdhci_set_ios,
 717         .get_ro         = sdhci_get_ro,
 718 };
 719
 720 /*****************************************************************************\
 721  *                                                                           *
 722  * Tasklets                                                                  *
 723  *                                                                           *
 724 \*****************************************************************************/
 725
 726 static void sdhci_tasklet_card(unsigned long param)
 727 {
 728         struct sdhci_host *host;
 729         unsigned long flags;
 730
 731         host = (struct sdhci_host*)param;
 732
 733         spin_lock_irqsave(&host->lock, flags);
 734
 735         if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
 736                 if (host->mrq) {
 737                         printk(KERN_ERR "%s: Card removed during transfer!\n",
 738                                 mmc_hostname(host->mmc));
 739                         printk(KERN_ERR "%s: Resetting controller.\n",
 740                                 mmc_hostname(host->mmc));
 741
 742                         sdhci_reset(host, SDHCI_RESET_CMD);
 743                         sdhci_reset(host, SDHCI_RESET_DATA);
 744
 745                         host->mrq->cmd->error = MMC_ERR_FAILED;
 746                         tasklet_schedule(&host->finish_tasklet);
 747                 }
 748         }
 749
 750         spin_unlock_irqrestore(&host->lock, flags);
 751
 752         mmc_detect_change(host->mmc, msecs_to_jiffies(500));
 753 }
 754
 755 static void sdhci_tasklet_finish(unsigned long param)
 756 {
 757         struct sdhci_host *host;
 758         unsigned long flags;
 759         struct mmc_request *mrq;
 760
 761         host = (struct sdhci_host*)param;
 762
 763         spin_lock_irqsave(&host->lock, flags);
 764
 765         del_timer(&host->timer);
 766
 767         mrq = host->mrq;
 768
 769         DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
 770
 771         /*
 772          * The controller needs a reset of internal state machines
 773          * upon error conditions.
 774          */
 775         if ((mrq->cmd->error != MMC_ERR_NONE) ||
 776                 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
 777                 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
 778                 sdhci_reset(host, SDHCI_RESET_CMD);
 779                 sdhci_reset(host, SDHCI_RESET_DATA);
 780         }
 781
 782         host->mrq = NULL;
 783         host->cmd = NULL;
 784         host->data = NULL;
 785
 786         sdhci_deactivate_led(host);
 787
 788         spin_unlock_irqrestore(&host->lock, flags);
 789
 790         mmc_request_done(host->mmc, mrq);
 791 }
 792
 793 static void sdhci_timeout_timer(unsigned long data)
 794 {
 795         struct sdhci_host *host;
 796         unsigned long flags;
 797
 798         host = (struct sdhci_host*)data;
 799
 800         spin_lock_irqsave(&host->lock, flags);
 801
 802         if (host->mrq) {
 803                 printk(KERN_ERR "%s: Timeout waiting for hardware interrupt. "
 804                         "Please report this to " BUGMAIL ".\n",
 805                         mmc_hostname(host->mmc));
 806                 sdhci_dumpregs(host);
 807
 808                 if (host->data) {
 809                         host->data->error = MMC_ERR_TIMEOUT;
 810                         sdhci_finish_data(host);
 811                 } else {
 812                         if (host->cmd)
 813                                 host->cmd->error = MMC_ERR_TIMEOUT;
 814                         else
 815                                 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
 816
 817                         tasklet_schedule(&host->finish_tasklet);
 818                 }
 819         }
 820
 821         spin_unlock_irqrestore(&host->lock, flags);
 822 }
 823
 824 /*****************************************************************************\
 825  *                                                                           *
 826  * Interrupt handling                                                        *
 827  *                                                                           *
 828 \*****************************************************************************/
 829
 830 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
 831 {
 832         BUG_ON(intmask == 0);
 833
 834         if (!host->cmd) {
 835                 printk(KERN_ERR "%s: Got command interrupt even though no "
 836                         "command operation was in progress.\n",
 837                         mmc_hostname(host->mmc));
 838                 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
 839                         mmc_hostname(host->mmc));
 840                 sdhci_dumpregs(host);
 841                 return;
 842         }
 843
 844         if (intmask & SDHCI_INT_RESPONSE)
 845                 sdhci_finish_command(host);
 846         else {
 847                 if (intmask & SDHCI_INT_TIMEOUT)
 848                         host->cmd->error = MMC_ERR_TIMEOUT;
 849                 else if (intmask & SDHCI_INT_CRC)
 850                         host->cmd->error = MMC_ERR_BADCRC;
 851                 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
 852                         host->cmd->error = MMC_ERR_FAILED;
 853                 else
 854                         host->cmd->error = MMC_ERR_INVALID;
 855
 856                 tasklet_schedule(&host->finish_tasklet);
 857         }
 858 }
 859
 860 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
 861 {
 862         BUG_ON(intmask == 0);
 863
 864         if (!host->data) {
 865                 /*
 866                  * A data end interrupt is sent together with the response
 867                  * for the stop command.
 868                  */
 869                 if (intmask & SDHCI_INT_DATA_END)
 870                         return;
 871
 872                 printk(KERN_ERR "%s: Got data interrupt even though no "
 873                         "data operation was in progress.\n",
 874                         mmc_hostname(host->mmc));
 875                 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
 876                         mmc_hostname(host->mmc));
 877                 sdhci_dumpregs(host);
 878
 879                 return;
 880         }
 881
 882         if (intmask & SDHCI_INT_DATA_TIMEOUT)
 883                 host->data->error = MMC_ERR_TIMEOUT;
 884         else if (intmask & SDHCI_INT_DATA_CRC)
 885                 host->data->error = MMC_ERR_BADCRC;
 886         else if (intmask & SDHCI_INT_DATA_END_BIT)
 887                 host->data->error = MMC_ERR_FAILED;
 888
 889         if (host->data->error != MMC_ERR_NONE)
 890                 sdhci_finish_data(host);
 891         else {
 892                 if (intmask & (SDHCI_INT_BUF_FULL | SDHCI_INT_BUF_EMPTY))
 893                         sdhci_transfer_pio(host);
 894
 895                 if (intmask & SDHCI_INT_DATA_END)
 896                         sdhci_finish_data(host);
 897         }
 898 }
 899
 900 static irqreturn_t sdhci_irq(int irq, void *dev_id, struct pt_regs *regs)
 901 {
 902         irqreturn_t result;
 903         struct sdhci_host* host = dev_id;
 904         u32 intmask;
 905
 906         spin_lock(&host->lock);
 907
 908         intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
 909
 910         if (!intmask) {
 911                 result = IRQ_NONE;
 912                 goto out;
 913         }
 914
 915         DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
 916
 917         if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE))
 918                 tasklet_schedule(&host->card_tasklet);
 919
 920         if (intmask & SDHCI_INT_CMD_MASK) {
 921                 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
 922
 923                 writel(intmask & SDHCI_INT_CMD_MASK,
 924                         host->ioaddr + SDHCI_INT_STATUS);
 925         }
 926
 927         if (intmask & SDHCI_INT_DATA_MASK) {
 928                 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
 929
 930                 writel(intmask & SDHCI_INT_DATA_MASK,
 931                         host->ioaddr + SDHCI_INT_STATUS);
 932         }
 933
 934         intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
 935
 936         if (intmask & SDHCI_INT_CARD_INT) {
 937                 printk(KERN_ERR "%s: Unexpected card interrupt. Please "
 938                         "report this to " BUGMAIL ".\n",
 939                         mmc_hostname(host->mmc));
 940                 sdhci_dumpregs(host);
 941         }
 942
 943         if (intmask & SDHCI_INT_BUS_POWER) {
 944                 printk(KERN_ERR "%s: Unexpected bus power interrupt. Please "
 945                         "report this to " BUGMAIL ".\n",
 946                         mmc_hostname(host->mmc));
 947                 sdhci_dumpregs(host);
 948         }
 949
 950         if (intmask & SDHCI_INT_ACMD12ERR) {
 951                 printk(KERN_ERR "%s: Unexpected auto CMD12 error. Please "
 952                         "report this to " BUGMAIL ".\n",
 953                         mmc_hostname(host->mmc));
 954                 sdhci_dumpregs(host);
 955
 956                 writew(~0, host->ioaddr + SDHCI_ACMD12_ERR);
 957         }
 958
 959         if (intmask)
 960                 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
 961
 962         result = IRQ_HANDLED;
 963
 964 out:
 965         spin_unlock(&host->lock);
 966
 967         return result;
 968 }
 969
 970 /*****************************************************************************\
 971  *                                                                           *
 972  * Suspend/resume                                                            *
 973  *                                                                           *
 974 \*****************************************************************************/
 975
 976 #ifdef CONFIG_PM
 977
 978 static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
 979 {
 980         struct sdhci_chip *chip;
 981         int i, ret;
 982
 983         chip = pci_get_drvdata(pdev);
 984         if (!chip)
 985                 return 0;
 986
 987         DBG("Suspending...\n");
 988
 989         for (i = 0;i < chip->num_slots;i++) {
 990                 if (!chip->hosts[i])
 991                         continue;
 992                 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
 993                 if (ret) {
 994                         for (i--;i >= 0;i--)
 995                                 mmc_resume_host(chip->hosts[i]->mmc);
 996                         return ret;
 997                 }
 998         }
 999
1000         pci_save_state(pdev);
1001         pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1002         pci_disable_device(pdev);
1003         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1004
1005         return 0;
1006 }
1007
1008 static int sdhci_resume (struct pci_dev *pdev)
1009 {
1010         struct sdhci_chip *chip;
1011         int i, ret;
1012
1013         chip = pci_get_drvdata(pdev);
1014         if (!chip)
1015                 return 0;
1016
1017         DBG("Resuming...\n");
1018
1019         pci_set_power_state(pdev, PCI_D0);
1020         pci_restore_state(pdev);
1021         pci_enable_device(pdev);
1022
1023         for (i = 0;i < chip->num_slots;i++) {
1024                 if (!chip->hosts[i])
1025                         continue;
1026                 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
1027                         pci_set_master(pdev);
1028                 sdhci_init(chip->hosts[i]);
1029                 ret = mmc_resume_host(chip->hosts[i]->mmc);
1030                 if (ret)
1031                         return ret;
1032         }
1033
1034         return 0;
1035 }
1036
1037 #else /* CONFIG_PM */
1038
1039 #define sdhci_suspend NULL
1040 #define sdhci_resume NULL
1041
1042 #endif /* CONFIG_PM */
1043
1044 /*****************************************************************************\
1045  *                                                                           *
1046  * Device probing/removal                                                    *
1047  *                                                                           *
1048 \*****************************************************************************/
1049
1050 static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1051 {
1052         int ret;
1053         struct sdhci_chip *chip;
1054         struct mmc_host *mmc;
1055         struct sdhci_host *host;
1056
1057         u8 first_bar;
1058         unsigned int caps;
1059
1060         chip = pci_get_drvdata(pdev);
1061         BUG_ON(!chip);
1062
1063         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1064         if (ret)
1065                 return ret;
1066
1067         first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1068
1069         if (first_bar > 5) {
1070                 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1071                 return -ENODEV;
1072         }
1073
1074         if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1075                 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1076                 return -ENODEV;
1077         }
1078
1079         if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1080                 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. Aborting.\n");
1081                 return -ENODEV;
1082         }
1083
1084         mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1085         if (!mmc)
1086                 return -ENOMEM;
1087
1088         host = mmc_priv(mmc);
1089         host->mmc = mmc;
1090
1091         host->bar = first_bar + slot;
1092
1093         host->addr = pci_resource_start(pdev, host->bar);
1094         host->irq = pdev->irq;
1095
1096         DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1097
1098         snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1099
1100         ret = pci_request_region(pdev, host->bar, host->slot_descr);
1101         if (ret)
1102                 goto free;
1103
1104         host->ioaddr = ioremap_nocache(host->addr,
1105                 pci_resource_len(pdev, host->bar));
1106         if (!host->ioaddr) {
1107                 ret = -ENOMEM;
1108                 goto release;
1109         }
1110
1111         caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1112
1113         if ((caps & SDHCI_CAN_DO_DMA) && ((pdev->class & 0x0000FF) == 0x01))
1114                 host->flags |= SDHCI_USE_DMA;
1115
1116         if (host->flags & SDHCI_USE_DMA) {
1117                 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1118                         printk(KERN_WARNING "%s: No suitable DMA available. "
1119                                 "Falling back to PIO.\n", host->slot_descr);
1120                         host->flags &= ~SDHCI_USE_DMA;
1121                 }
1122         }
1123
1124         if (host->flags & SDHCI_USE_DMA)
1125                 pci_set_master(pdev);
1126         else /* XXX: Hack to get MMC layer to avoid highmem */
1127                 pdev->dma_mask = 0;
1128
1129         host->max_clk =
1130                 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1131         if (host->max_clk == 0) {
1132                 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1133                         "frequency.\n", host->slot_descr);
1134                 ret = -ENODEV;
1135                 goto unmap;
1136         }
1137         host->max_clk *= 1000000;
1138
1139         host->timeout_clk =
1140                 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1141         if (host->timeout_clk == 0) {
1142                 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1143                         "frequency.\n", host->slot_descr);
1144                 ret = -ENODEV;
1145                 goto unmap;
1146         }
1147         if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1148                 host->timeout_clk *= 1000;
1149
1150         /*
1151          * Set host parameters.
1152          */
1153         mmc->ops = &sdhci_ops;
1154         mmc->f_min = host->max_clk / 256;
1155         mmc->f_max = host->max_clk;
1156         mmc->caps = MMC_CAP_4_BIT_DATA;
1157
1158         mmc->ocr_avail = 0;
1159         if (caps & SDHCI_CAN_VDD_330)
1160                 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1161         else if (caps & SDHCI_CAN_VDD_300)
1162                 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1163         else if (caps & SDHCI_CAN_VDD_180)
1164                 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1165
1166         if (mmc->ocr_avail == 0) {
1167                 printk(KERN_ERR "%s: Hardware doesn't report any "
1168                         "support voltages.\n", host->slot_descr);
1169                 ret = -ENODEV;
1170                 goto unmap;
1171         }
1172
1173         spin_lock_init(&host->lock);
1174
1175         /*
1176          * Maximum number of segments. Hardware cannot do scatter lists.
1177          */
1178         if (host->flags & SDHCI_USE_DMA)
1179                 mmc->max_hw_segs = 1;
1180         else
1181                 mmc->max_hw_segs = 16;
1182         mmc->max_phys_segs = 16;
1183
1184         /*
1185          * Maximum number of sectors in one transfer. Limited by sector
1186          * count register.
1187          */
1188         mmc->max_sectors = 0x3FFF;
1189
1190         /*
1191          * Maximum segment size. Could be one segment with the maximum number
1192          * of sectors.
1193          */
1194         mmc->max_seg_size = mmc->max_sectors * 512;
1195
1196         /*
1197          * Init tasklets.
1198          */
1199         tasklet_init(&host->card_tasklet,
1200                 sdhci_tasklet_card, (unsigned long)host);
1201         tasklet_init(&host->finish_tasklet,
1202                 sdhci_tasklet_finish, (unsigned long)host);
1203
1204         setup_timer(&host->timer, sdhci_timeout_timer, (long)host);
1205
1206         ret = request_irq(host->irq, sdhci_irq, SA_SHIRQ,
1207                 host->slot_descr, host);
1208         if (ret)
1209                 goto untasklet;
1210
1211         sdhci_init(host);
1212
1213 #ifdef CONFIG_MMC_DEBUG
1214         sdhci_dumpregs(host);
1215 #endif
1216
1217         host->chip = chip;
1218         chip->hosts[slot] = host;
1219
1220         mmc_add_host(mmc);
1221
1222         printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1223                 host->addr, host->irq,
1224                 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1225
1226         return 0;
1227
1228 untasklet:
1229         tasklet_kill(&host->card_tasklet);
1230         tasklet_kill(&host->finish_tasklet);
1231 unmap:
1232         iounmap(host->ioaddr);
1233 release:
1234         pci_release_region(pdev, host->bar);
1235 free:
1236         mmc_free_host(mmc);
1237
1238         return ret;
1239 }
1240
1241 static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1242 {
1243         struct sdhci_chip *chip;
1244         struct mmc_host *mmc;
1245         struct sdhci_host *host;
1246
1247         chip = pci_get_drvdata(pdev);
1248         host = chip->hosts[slot];
1249         mmc = host->mmc;
1250
1251         chip->hosts[slot] = NULL;
1252
1253         mmc_remove_host(mmc);
1254
1255         sdhci_reset(host, SDHCI_RESET_ALL);
1256
1257         free_irq(host->irq, host);
1258
1259         del_timer_sync(&host->timer);
1260
1261         tasklet_kill(&host->card_tasklet);
1262         tasklet_kill(&host->finish_tasklet);
1263
1264         iounmap(host->ioaddr);
1265
1266         pci_release_region(pdev, host->bar);
1267
1268         mmc_free_host(mmc);
1269 }
1270
1271 static int __devinit sdhci_probe(struct pci_dev *pdev,
1272         const struct pci_device_id *ent)
1273 {
1274         int ret, i;
1275         u8 slots, rev;
1276         struct sdhci_chip *chip;
1277
1278         BUG_ON(pdev == NULL);
1279         BUG_ON(ent == NULL);
1280
1281         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1282
1283         printk(KERN_INFO DRIVER_NAME
1284                 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1285                 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1286                 (int)rev);
1287
1288         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1289         if (ret)
1290                 return ret;
1291
1292         slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1293         DBG("found %d slot(s)\n", slots);
1294         if (slots == 0)
1295                 return -ENODEV;
1296
1297         ret = pci_enable_device(pdev);
1298         if (ret)
1299                 return ret;
1300
1301         chip = kzalloc(sizeof(struct sdhci_chip) +
1302                 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1303         if (!chip) {
1304                 ret = -ENOMEM;
1305                 goto err;
1306         }
1307
1308         chip->pdev = pdev;
1309
1310         chip->num_slots = slots;
1311         pci_set_drvdata(pdev, chip);
1312
1313         for (i = 0;i < slots;i++) {
1314                 ret = sdhci_probe_slot(pdev, i);
1315                 if (ret) {
1316                         for (i--;i >= 0;i--)
1317                                 sdhci_remove_slot(pdev, i);
1318                         goto free;
1319                 }
1320         }
1321
1322         return 0;
1323
1324 free:
1325         pci_set_drvdata(pdev, NULL);
1326         kfree(chip);
1327
1328 err:
1329         pci_disable_device(pdev);
1330         return ret;
1331 }
1332
1333 static void __devexit sdhci_remove(struct pci_dev *pdev)
1334 {
1335         int i;
1336         struct sdhci_chip *chip;
1337
1338         chip = pci_get_drvdata(pdev);
1339
1340         if (chip) {
1341                 for (i = 0;i < chip->num_slots;i++)
1342                         sdhci_remove_slot(pdev, i);
1343
1344                 pci_set_drvdata(pdev, NULL);
1345
1346                 kfree(chip);
1347         }
1348
1349         pci_disable_device(pdev);
1350 }
1351
1352 static struct pci_driver sdhci_driver = {
1353         .name =         DRIVER_NAME,
1354         .id_table =     pci_ids,
1355         .probe =        sdhci_probe,
1356         .remove =       __devexit_p(sdhci_remove),
1357         .suspend =      sdhci_suspend,
1358         .resume =       sdhci_resume,
1359 };
1360
1361 /*****************************************************************************\
1362  *                                                                           *
1363  * Driver init/exit                                                          *
1364  *                                                                           *
1365 \*****************************************************************************/
1366
1367 static int __init sdhci_drv_init(void)
1368 {
1369         printk(KERN_INFO DRIVER_NAME
1370                 ": Secure Digital Host Controller Interface driver, "
1371                 DRIVER_VERSION "\n");
1372         printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1373
1374         return pci_register_driver(&sdhci_driver);
1375 }
1376
1377 static void __exit sdhci_drv_exit(void)
1378 {
1379         DBG("Exiting\n");
1380
1381         pci_unregister_driver(&sdhci_driver);
1382 }
1383
1384 module_init(sdhci_drv_init);
1385 module_exit(sdhci_drv_exit);
1386
1387 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1388 MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1389 MODULE_VERSION(DRIVER_VERSION);
1390 MODULE_LICENSE("GPL");