err.no Git - linux-2.6/blob - drivers/mmc/sdhci.c

   1 /*
   2  *  linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
   3  *
   4  *  Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or (at
   9  * your option) any later version.
  10  */
  11
  12 #include <linux/delay.h>
  13 #include <linux/highmem.h>
  14 #include <linux/pci.h>
  15 #include <linux/dma-mapping.h>
  16
  17 #include <linux/mmc/host.h>
  18 #include <linux/mmc/protocol.h>
  19
  20 #include <asm/scatterlist.h>
  21
  22 #include "sdhci.h"
  23
  24 #define DRIVER_NAME "sdhci"
  25
  26 #define DBG(f, x...) \
  27         pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
  28
  29 static unsigned int debug_nodma = 0;
  30 static unsigned int debug_forcedma = 0;
  31 static unsigned int debug_quirks = 0;
  32
  33 #define SDHCI_QUIRK_CLOCK_BEFORE_RESET                  (1<<0)
  34 #define SDHCI_QUIRK_FORCE_DMA                           (1<<1)
  35 /* Controller doesn't like some resets when there is no card inserted. */
  36 #define SDHCI_QUIRK_NO_CARD_NO_RESET                    (1<<2)
  37 #define SDHCI_QUIRK_SINGLE_POWER_WRITE                  (1<<3)
  38
  39 static const struct pci_device_id pci_ids[] __devinitdata = {
  40         {
  41                 .vendor         = PCI_VENDOR_ID_RICOH,
  42                 .device         = PCI_DEVICE_ID_RICOH_R5C822,
  43                 .subvendor      = PCI_VENDOR_ID_IBM,
  44                 .subdevice      = PCI_ANY_ID,
  45                 .driver_data    = SDHCI_QUIRK_CLOCK_BEFORE_RESET |
  46                                   SDHCI_QUIRK_FORCE_DMA,
  47         },
  48
  49         {
  50                 .vendor         = PCI_VENDOR_ID_RICOH,
  51                 .device         = PCI_DEVICE_ID_RICOH_R5C822,
  52                 .subvendor      = PCI_ANY_ID,
  53                 .subdevice      = PCI_ANY_ID,
  54                 .driver_data    = SDHCI_QUIRK_FORCE_DMA |
  55                                   SDHCI_QUIRK_NO_CARD_NO_RESET,
  56         },
  57
  58         {
  59                 .vendor         = PCI_VENDOR_ID_TI,
  60                 .device         = PCI_DEVICE_ID_TI_XX21_XX11_SD,
  61                 .subvendor      = PCI_ANY_ID,
  62                 .subdevice      = PCI_ANY_ID,
  63                 .driver_data    = SDHCI_QUIRK_FORCE_DMA,
  64         },
  65
  66         {
  67                 .vendor         = PCI_VENDOR_ID_ENE,
  68                 .device         = PCI_DEVICE_ID_ENE_CB712_SD,
  69                 .subvendor      = PCI_ANY_ID,
  70                 .subdevice      = PCI_ANY_ID,
  71                 .driver_data    = SDHCI_QUIRK_SINGLE_POWER_WRITE,
  72         },
  73
  74         {       /* Generic SD host controller */
  75                 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
  76         },
  77
  78         { /* end: all zeroes */ },
  79 };
  80
  81 MODULE_DEVICE_TABLE(pci, pci_ids);
  82
  83 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
  84 static void sdhci_finish_data(struct sdhci_host *);
  85
  86 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
  87 static void sdhci_finish_command(struct sdhci_host *);
  88
  89 static void sdhci_dumpregs(struct sdhci_host *host)
  90 {
  91         printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
  92
  93         printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
  94                 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
  95                 readw(host->ioaddr + SDHCI_HOST_VERSION));
  96         printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
  97                 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
  98                 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
  99         printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
 100                 readl(host->ioaddr + SDHCI_ARGUMENT),
 101                 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
 102         printk(KERN_DEBUG DRIVER_NAME ": Present:  0x%08x | Host ctl: 0x%08x\n",
 103                 readl(host->ioaddr + SDHCI_PRESENT_STATE),
 104                 readb(host->ioaddr + SDHCI_HOST_CONTROL));
 105         printk(KERN_DEBUG DRIVER_NAME ": Power:    0x%08x | Blk gap:  0x%08x\n",
 106                 readb(host->ioaddr + SDHCI_POWER_CONTROL),
 107                 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
 108         printk(KERN_DEBUG DRIVER_NAME ": Wake-up:  0x%08x | Clock:    0x%08x\n",
 109                 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
 110                 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
 111         printk(KERN_DEBUG DRIVER_NAME ": Timeout:  0x%08x | Int stat: 0x%08x\n",
 112                 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
 113                 readl(host->ioaddr + SDHCI_INT_STATUS));
 114         printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
 115                 readl(host->ioaddr + SDHCI_INT_ENABLE),
 116                 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
 117         printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
 118                 readw(host->ioaddr + SDHCI_ACMD12_ERR),
 119                 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
 120         printk(KERN_DEBUG DRIVER_NAME ": Caps:     0x%08x | Max curr: 0x%08x\n",
 121                 readl(host->ioaddr + SDHCI_CAPABILITIES),
 122                 readl(host->ioaddr + SDHCI_MAX_CURRENT));
 123
 124         printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
 125 }
 126
 127 /*****************************************************************************\
 128  *                                                                           *
 129  * Low level functions                                                       *
 130  *                                                                           *
 131 \*****************************************************************************/
 132
 133 static void sdhci_reset(struct sdhci_host *host, u8 mask)
 134 {
 135         unsigned long timeout;
 136
 137         if (host->chip->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
 138                 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) &
 139                         SDHCI_CARD_PRESENT))
 140                         return;
 141         }
 142
 143         writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
 144
 145         if (mask & SDHCI_RESET_ALL)
 146                 host->clock = 0;
 147
 148         /* Wait max 100 ms */
 149         timeout = 100;
 150
 151         /* hw clears the bit when it's done */
 152         while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
 153                 if (timeout == 0) {
 154                         printk(KERN_ERR "%s: Reset 0x%x never completed.\n",
 155                                 mmc_hostname(host->mmc), (int)mask);
 156                         sdhci_dumpregs(host);
 157                         return;
 158                 }
 159                 timeout--;
 160                 mdelay(1);
 161         }
 162 }
 163
 164 static void sdhci_init(struct sdhci_host *host)
 165 {
 166         u32 intmask;
 167
 168         sdhci_reset(host, SDHCI_RESET_ALL);
 169
 170         intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
 171                 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
 172                 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
 173                 SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
 174                 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL |
 175                 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
 176
 177         writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
 178         writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 179 }
 180
 181 static void sdhci_activate_led(struct sdhci_host *host)
 182 {
 183         u8 ctrl;
 184
 185         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 186         ctrl |= SDHCI_CTRL_LED;
 187         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 188 }
 189
 190 static void sdhci_deactivate_led(struct sdhci_host *host)
 191 {
 192         u8 ctrl;
 193
 194         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 195         ctrl &= ~SDHCI_CTRL_LED;
 196         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 197 }
 198
 199 /*****************************************************************************\
 200  *                                                                           *
 201  * Core functions                                                            *
 202  *                                                                           *
 203 \*****************************************************************************/
 204
 205 static inline char* sdhci_sg_to_buffer(struct sdhci_host* host)
 206 {
 207         return page_address(host->cur_sg->page) + host->cur_sg->offset;
 208 }
 209
 210 static inline int sdhci_next_sg(struct sdhci_host* host)
 211 {
 212         /*
 213          * Skip to next SG entry.
 214          */
 215         host->cur_sg++;
 216         host->num_sg--;
 217
 218         /*
 219          * Any entries left?
 220          */
 221         if (host->num_sg > 0) {
 222                 host->offset = 0;
 223                 host->remain = host->cur_sg->length;
 224         }
 225
 226         return host->num_sg;
 227 }
 228
 229 static void sdhci_read_block_pio(struct sdhci_host *host)
 230 {
 231         int blksize, chunk_remain;
 232         u32 data;
 233         char *buffer;
 234         int size;
 235
 236         DBG("PIO reading\n");
 237
 238         blksize = host->data->blksz;
 239         chunk_remain = 0;
 240         data = 0;
 241
 242         buffer = sdhci_sg_to_buffer(host) + host->offset;
 243
 244         while (blksize) {
 245                 if (chunk_remain == 0) {
 246                         data = readl(host->ioaddr + SDHCI_BUFFER);
 247                         chunk_remain = min(blksize, 4);
 248                 }
 249
 250                 size = min(host->remain, chunk_remain);
 251
 252                 chunk_remain -= size;
 253                 blksize -= size;
 254                 host->offset += size;
 255                 host->remain -= size;
 256
 257                 while (size) {
 258                         *buffer = data & 0xFF;
 259                         buffer++;
 260                         data >>= 8;
 261                         size--;
 262                 }
 263
 264                 if (host->remain == 0) {
 265                         if (sdhci_next_sg(host) == 0) {
 266                                 BUG_ON(blksize != 0);
 267                                 return;
 268                         }
 269                         buffer = sdhci_sg_to_buffer(host);
 270                 }
 271         }
 272 }
 273
 274 static void sdhci_write_block_pio(struct sdhci_host *host)
 275 {
 276         int blksize, chunk_remain;
 277         u32 data;
 278         char *buffer;
 279         int bytes, size;
 280
 281         DBG("PIO writing\n");
 282
 283         blksize = host->data->blksz;
 284         chunk_remain = 4;
 285         data = 0;
 286
 287         bytes = 0;
 288         buffer = sdhci_sg_to_buffer(host) + host->offset;
 289
 290         while (blksize) {
 291                 size = min(host->remain, chunk_remain);
 292
 293                 chunk_remain -= size;
 294                 blksize -= size;
 295                 host->offset += size;
 296                 host->remain -= size;
 297
 298                 while (size) {
 299                         data >>= 8;
 300                         data |= (u32)*buffer << 24;
 301                         buffer++;
 302                         size--;
 303                 }
 304
 305                 if (chunk_remain == 0) {
 306                         writel(data, host->ioaddr + SDHCI_BUFFER);
 307                         chunk_remain = min(blksize, 4);
 308                 }
 309
 310                 if (host->remain == 0) {
 311                         if (sdhci_next_sg(host) == 0) {
 312                                 BUG_ON(blksize != 0);
 313                                 return;
 314                         }
 315                         buffer = sdhci_sg_to_buffer(host);
 316                 }
 317         }
 318 }
 319
 320 static void sdhci_transfer_pio(struct sdhci_host *host)
 321 {
 322         u32 mask;
 323
 324         BUG_ON(!host->data);
 325
 326         if (host->num_sg == 0)
 327                 return;
 328
 329         if (host->data->flags & MMC_DATA_READ)
 330                 mask = SDHCI_DATA_AVAILABLE;
 331         else
 332                 mask = SDHCI_SPACE_AVAILABLE;
 333
 334         while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
 335                 if (host->data->flags & MMC_DATA_READ)
 336                         sdhci_read_block_pio(host);
 337                 else
 338                         sdhci_write_block_pio(host);
 339
 340                 if (host->num_sg == 0)
 341                         break;
 342         }
 343
 344         DBG("PIO transfer complete.\n");
 345 }
 346
 347 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
 348 {
 349         u8 count;
 350         unsigned target_timeout, current_timeout;
 351
 352         WARN_ON(host->data);
 353
 354         if (data == NULL)
 355                 return;
 356
 357         DBG("blksz %04x blks %04x flags %08x\n",
 358                 data->blksz, data->blocks, data->flags);
 359         DBG("tsac %d ms nsac %d clk\n",
 360                 data->timeout_ns / 1000000, data->timeout_clks);
 361
 362         /* Sanity checks */
 363         BUG_ON(data->blksz * data->blocks > 524288);
 364         BUG_ON(data->blksz > host->mmc->max_blk_size);
 365         BUG_ON(data->blocks > 65535);
 366
 367         /* timeout in us */
 368         target_timeout = data->timeout_ns / 1000 +
 369                 data->timeout_clks / host->clock;
 370
 371         /*
 372          * Figure out needed cycles.
 373          * We do this in steps in order to fit inside a 32 bit int.
 374          * The first step is the minimum timeout, which will have a
 375          * minimum resolution of 6 bits:
 376          * (1) 2^13*1000 > 2^22,
 377          * (2) host->timeout_clk < 2^16
 378          *     =>
 379          *     (1) / (2) > 2^6
 380          */
 381         count = 0;
 382         current_timeout = (1 << 13) * 1000 / host->timeout_clk;
 383         while (current_timeout < target_timeout) {
 384                 count++;
 385                 current_timeout <<= 1;
 386                 if (count >= 0xF)
 387                         break;
 388         }
 389
 390         if (count >= 0xF) {
 391                 printk(KERN_WARNING "%s: Too large timeout requested!\n",
 392                         mmc_hostname(host->mmc));
 393                 count = 0xE;
 394         }
 395
 396         writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
 397
 398         if (host->flags & SDHCI_USE_DMA) {
 399                 int count;
 400
 401                 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
 402                         (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
 403                 BUG_ON(count != 1);
 404
 405                 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
 406         } else {
 407                 host->cur_sg = data->sg;
 408                 host->num_sg = data->sg_len;
 409
 410                 host->offset = 0;
 411                 host->remain = host->cur_sg->length;
 412         }
 413
 414         /* We do not handle DMA boundaries, so set it to max (512 KiB) */
 415         writew(SDHCI_MAKE_BLKSZ(7, data->blksz),
 416                 host->ioaddr + SDHCI_BLOCK_SIZE);
 417         writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
 418 }
 419
 420 static void sdhci_set_transfer_mode(struct sdhci_host *host,
 421         struct mmc_data *data)
 422 {
 423         u16 mode;
 424
 425         WARN_ON(host->data);
 426
 427         if (data == NULL)
 428                 return;
 429
 430         mode = SDHCI_TRNS_BLK_CNT_EN;
 431         if (data->blocks > 1)
 432                 mode |= SDHCI_TRNS_MULTI;
 433         if (data->flags & MMC_DATA_READ)
 434                 mode |= SDHCI_TRNS_READ;
 435         if (host->flags & SDHCI_USE_DMA)
 436                 mode |= SDHCI_TRNS_DMA;
 437
 438         writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
 439 }
 440
 441 static void sdhci_finish_data(struct sdhci_host *host)
 442 {
 443         struct mmc_data *data;
 444         u16 blocks;
 445
 446         BUG_ON(!host->data);
 447
 448         data = host->data;
 449         host->data = NULL;
 450
 451         if (host->flags & SDHCI_USE_DMA) {
 452                 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
 453                         (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
 454         }
 455
 456         /*
 457          * Controller doesn't count down when in single block mode.
 458          */
 459         if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
 460                 blocks = 0;
 461         else
 462                 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
 463         data->bytes_xfered = data->blksz * (data->blocks - blocks);
 464
 465         if ((data->error == MMC_ERR_NONE) && blocks) {
 466                 printk(KERN_ERR "%s: Controller signalled completion even "
 467                         "though there were blocks left.\n",
 468                         mmc_hostname(host->mmc));
 469                 data->error = MMC_ERR_FAILED;
 470         }
 471
 472         DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
 473
 474         if (data->stop) {
 475                 /*
 476                  * The controller needs a reset of internal state machines
 477                  * upon error conditions.
 478                  */
 479                 if (data->error != MMC_ERR_NONE) {
 480                         sdhci_reset(host, SDHCI_RESET_CMD);
 481                         sdhci_reset(host, SDHCI_RESET_DATA);
 482                 }
 483
 484                 sdhci_send_command(host, data->stop);
 485         } else
 486                 tasklet_schedule(&host->finish_tasklet);
 487 }
 488
 489 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
 490 {
 491         int flags;
 492         u32 mask;
 493         unsigned long timeout;
 494
 495         WARN_ON(host->cmd);
 496
 497         DBG("Sending cmd (%x)\n", cmd->opcode);
 498
 499         /* Wait max 10 ms */
 500         timeout = 10;
 501
 502         mask = SDHCI_CMD_INHIBIT;
 503         if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
 504                 mask |= SDHCI_DATA_INHIBIT;
 505
 506         /* We shouldn't wait for data inihibit for stop commands, even
 507            though they might use busy signaling */
 508         if (host->mrq->data && (cmd == host->mrq->data->stop))
 509                 mask &= ~SDHCI_DATA_INHIBIT;
 510
 511         while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
 512                 if (timeout == 0) {
 513                         printk(KERN_ERR "%s: Controller never released "
 514                                 "inhibit bit(s).\n", mmc_hostname(host->mmc));
 515                         sdhci_dumpregs(host);
 516                         cmd->error = MMC_ERR_FAILED;
 517                         tasklet_schedule(&host->finish_tasklet);
 518                         return;
 519                 }
 520                 timeout--;
 521                 mdelay(1);
 522         }
 523
 524         mod_timer(&host->timer, jiffies + 10 * HZ);
 525
 526         host->cmd = cmd;
 527
 528         sdhci_prepare_data(host, cmd->data);
 529
 530         writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
 531
 532         sdhci_set_transfer_mode(host, cmd->data);
 533
 534         if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
 535                 printk(KERN_ERR "%s: Unsupported response type!\n",
 536                         mmc_hostname(host->mmc));
 537                 cmd->error = MMC_ERR_INVALID;
 538                 tasklet_schedule(&host->finish_tasklet);
 539                 return;
 540         }
 541
 542         if (!(cmd->flags & MMC_RSP_PRESENT))
 543                 flags = SDHCI_CMD_RESP_NONE;
 544         else if (cmd->flags & MMC_RSP_136)
 545                 flags = SDHCI_CMD_RESP_LONG;
 546         else if (cmd->flags & MMC_RSP_BUSY)
 547                 flags = SDHCI_CMD_RESP_SHORT_BUSY;
 548         else
 549                 flags = SDHCI_CMD_RESP_SHORT;
 550
 551         if (cmd->flags & MMC_RSP_CRC)
 552                 flags |= SDHCI_CMD_CRC;
 553         if (cmd->flags & MMC_RSP_OPCODE)
 554                 flags |= SDHCI_CMD_INDEX;
 555         if (cmd->data)
 556                 flags |= SDHCI_CMD_DATA;
 557
 558         writew(SDHCI_MAKE_CMD(cmd->opcode, flags),
 559                 host->ioaddr + SDHCI_COMMAND);
 560 }
 561
 562 static void sdhci_finish_command(struct sdhci_host *host)
 563 {
 564         int i;
 565
 566         BUG_ON(host->cmd == NULL);
 567
 568         if (host->cmd->flags & MMC_RSP_PRESENT) {
 569                 if (host->cmd->flags & MMC_RSP_136) {
 570                         /* CRC is stripped so we need to do some shifting. */
 571                         for (i = 0;i < 4;i++) {
 572                                 host->cmd->resp[i] = readl(host->ioaddr +
 573                                         SDHCI_RESPONSE + (3-i)*4) << 8;
 574                                 if (i != 3)
 575                                         host->cmd->resp[i] |=
 576                                                 readb(host->ioaddr +
 577                                                 SDHCI_RESPONSE + (3-i)*4-1);
 578                         }
 579                 } else {
 580                         host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
 581                 }
 582         }
 583
 584         host->cmd->error = MMC_ERR_NONE;
 585
 586         DBG("Ending cmd (%x)\n", host->cmd->opcode);
 587
 588         if (host->cmd->data)
 589                 host->data = host->cmd->data;
 590         else
 591                 tasklet_schedule(&host->finish_tasklet);
 592
 593         host->cmd = NULL;
 594 }
 595
 596 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 597 {
 598         int div;
 599         u16 clk;
 600         unsigned long timeout;
 601
 602         if (clock == host->clock)
 603                 return;
 604
 605         writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
 606
 607         if (clock == 0)
 608                 goto out;
 609
 610         for (div = 1;div < 256;div *= 2) {
 611                 if ((host->max_clk / div) <= clock)
 612                         break;
 613         }
 614         div >>= 1;
 615
 616         clk = div << SDHCI_DIVIDER_SHIFT;
 617         clk |= SDHCI_CLOCK_INT_EN;
 618         writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
 619
 620         /* Wait max 10 ms */
 621         timeout = 10;
 622         while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
 623                 & SDHCI_CLOCK_INT_STABLE)) {
 624                 if (timeout == 0) {
 625                         printk(KERN_ERR "%s: Internal clock never "
 626                                 "stabilised.\n", mmc_hostname(host->mmc));
 627                         sdhci_dumpregs(host);
 628                         return;
 629                 }
 630                 timeout--;
 631                 mdelay(1);
 632         }
 633
 634         clk |= SDHCI_CLOCK_CARD_EN;
 635         writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
 636
 637 out:
 638         host->clock = clock;
 639 }
 640
 641 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
 642 {
 643         u8 pwr;
 644
 645         if (host->power == power)
 646                 return;
 647
 648         if (power == (unsigned short)-1) {
 649                 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
 650                 goto out;
 651         }
 652
 653         /*
 654          * Spec says that we should clear the power reg before setting
 655          * a new value. Some controllers don't seem to like this though.
 656          */
 657         if (!(host->chip->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE))
 658                 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
 659
 660         pwr = SDHCI_POWER_ON;
 661
 662         switch (power) {
 663         case MMC_VDD_170:
 664         case MMC_VDD_180:
 665         case MMC_VDD_190:
 666                 pwr |= SDHCI_POWER_180;
 667                 break;
 668         case MMC_VDD_290:
 669         case MMC_VDD_300:
 670         case MMC_VDD_310:
 671                 pwr |= SDHCI_POWER_300;
 672                 break;
 673         case MMC_VDD_320:
 674         case MMC_VDD_330:
 675         case MMC_VDD_340:
 676                 pwr |= SDHCI_POWER_330;
 677                 break;
 678         default:
 679                 BUG();
 680         }
 681
 682         writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
 683
 684 out:
 685         host->power = power;
 686 }
 687
 688 /*****************************************************************************\
 689  *                                                                           *
 690  * MMC callbacks                                                             *
 691  *                                                                           *
 692 \*****************************************************************************/
 693
 694 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
 695 {
 696         struct sdhci_host *host;
 697         unsigned long flags;
 698
 699         host = mmc_priv(mmc);
 700
 701         spin_lock_irqsave(&host->lock, flags);
 702
 703         WARN_ON(host->mrq != NULL);
 704
 705         sdhci_activate_led(host);
 706
 707         host->mrq = mrq;
 708
 709         if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
 710                 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
 711                 tasklet_schedule(&host->finish_tasklet);
 712         } else
 713                 sdhci_send_command(host, mrq->cmd);
 714
 715         mmiowb();
 716         spin_unlock_irqrestore(&host->lock, flags);
 717 }
 718
 719 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 720 {
 721         struct sdhci_host *host;
 722         unsigned long flags;
 723         u8 ctrl;
 724
 725         host = mmc_priv(mmc);
 726
 727         spin_lock_irqsave(&host->lock, flags);
 728
 729         /*
 730          * Reset the chip on each power off.
 731          * Should clear out any weird states.
 732          */
 733         if (ios->power_mode == MMC_POWER_OFF) {
 734                 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 735                 sdhci_init(host);
 736         }
 737
 738         sdhci_set_clock(host, ios->clock);
 739
 740         if (ios->power_mode == MMC_POWER_OFF)
 741                 sdhci_set_power(host, -1);
 742         else
 743                 sdhci_set_power(host, ios->vdd);
 744
 745         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 746
 747         if (ios->bus_width == MMC_BUS_WIDTH_4)
 748                 ctrl |= SDHCI_CTRL_4BITBUS;
 749         else
 750                 ctrl &= ~SDHCI_CTRL_4BITBUS;
 751
 752         if (ios->timing == MMC_TIMING_SD_HS)
 753                 ctrl |= SDHCI_CTRL_HISPD;
 754         else
 755                 ctrl &= ~SDHCI_CTRL_HISPD;
 756
 757         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 758
 759         mmiowb();
 760         spin_unlock_irqrestore(&host->lock, flags);
 761 }
 762
 763 static int sdhci_get_ro(struct mmc_host *mmc)
 764 {
 765         struct sdhci_host *host;
 766         unsigned long flags;
 767         int present;
 768
 769         host = mmc_priv(mmc);
 770
 771         spin_lock_irqsave(&host->lock, flags);
 772
 773         present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
 774
 775         spin_unlock_irqrestore(&host->lock, flags);
 776
 777         return !(present & SDHCI_WRITE_PROTECT);
 778 }
 779
 780 static const struct mmc_host_ops sdhci_ops = {
 781         .request        = sdhci_request,
 782         .set_ios        = sdhci_set_ios,
 783         .get_ro         = sdhci_get_ro,
 784 };
 785
 786 /*****************************************************************************\
 787  *                                                                           *
 788  * Tasklets                                                                  *
 789  *                                                                           *
 790 \*****************************************************************************/
 791
 792 static void sdhci_tasklet_card(unsigned long param)
 793 {
 794         struct sdhci_host *host;
 795         unsigned long flags;
 796
 797         host = (struct sdhci_host*)param;
 798
 799         spin_lock_irqsave(&host->lock, flags);
 800
 801         if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
 802                 if (host->mrq) {
 803                         printk(KERN_ERR "%s: Card removed during transfer!\n",
 804                                 mmc_hostname(host->mmc));
 805                         printk(KERN_ERR "%s: Resetting controller.\n",
 806                                 mmc_hostname(host->mmc));
 807
 808                         sdhci_reset(host, SDHCI_RESET_CMD);
 809                         sdhci_reset(host, SDHCI_RESET_DATA);
 810
 811                         host->mrq->cmd->error = MMC_ERR_FAILED;
 812                         tasklet_schedule(&host->finish_tasklet);
 813                 }
 814         }
 815
 816         spin_unlock_irqrestore(&host->lock, flags);
 817
 818         mmc_detect_change(host->mmc, msecs_to_jiffies(500));
 819 }
 820
 821 static void sdhci_tasklet_finish(unsigned long param)
 822 {
 823         struct sdhci_host *host;
 824         unsigned long flags;
 825         struct mmc_request *mrq;
 826
 827         host = (struct sdhci_host*)param;
 828
 829         spin_lock_irqsave(&host->lock, flags);
 830
 831         del_timer(&host->timer);
 832
 833         mrq = host->mrq;
 834
 835         DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
 836
 837         /*
 838          * The controller needs a reset of internal state machines
 839          * upon error conditions.
 840          */
 841         if ((mrq->cmd->error != MMC_ERR_NONE) ||
 842                 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
 843                 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
 844
 845                 /* Some controllers need this kick or reset won't work here */
 846                 if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
 847                         unsigned int clock;
 848
 849                         /* This is to force an update */
 850                         clock = host->clock;
 851                         host->clock = 0;
 852                         sdhci_set_clock(host, clock);
 853                 }
 854
 855                 /* Spec says we should do both at the same time, but Ricoh
 856                    controllers do not like that. */
 857                 sdhci_reset(host, SDHCI_RESET_CMD);
 858                 sdhci_reset(host, SDHCI_RESET_DATA);
 859         }
 860
 861         host->mrq = NULL;
 862         host->cmd = NULL;
 863         host->data = NULL;
 864
 865         sdhci_deactivate_led(host);
 866
 867         mmiowb();
 868         spin_unlock_irqrestore(&host->lock, flags);
 869
 870         mmc_request_done(host->mmc, mrq);
 871 }
 872
 873 static void sdhci_timeout_timer(unsigned long data)
 874 {
 875         struct sdhci_host *host;
 876         unsigned long flags;
 877
 878         host = (struct sdhci_host*)data;
 879
 880         spin_lock_irqsave(&host->lock, flags);
 881
 882         if (host->mrq) {
 883                 printk(KERN_ERR "%s: Timeout waiting for hardware "
 884                         "interrupt.\n", mmc_hostname(host->mmc));
 885                 sdhci_dumpregs(host);
 886
 887                 if (host->data) {
 888                         host->data->error = MMC_ERR_TIMEOUT;
 889                         sdhci_finish_data(host);
 890                 } else {
 891                         if (host->cmd)
 892                                 host->cmd->error = MMC_ERR_TIMEOUT;
 893                         else
 894                                 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
 895
 896                         tasklet_schedule(&host->finish_tasklet);
 897                 }
 898         }
 899
 900         mmiowb();
 901         spin_unlock_irqrestore(&host->lock, flags);
 902 }
 903
 904 /*****************************************************************************\
 905  *                                                                           *
 906  * Interrupt handling                                                        *
 907  *                                                                           *
 908 \*****************************************************************************/
 909
 910 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
 911 {
 912         BUG_ON(intmask == 0);
 913
 914         if (!host->cmd) {
 915                 printk(KERN_ERR "%s: Got command interrupt even though no "
 916                         "command operation was in progress.\n",
 917                         mmc_hostname(host->mmc));
 918                 sdhci_dumpregs(host);
 919                 return;
 920         }
 921
 922         if (intmask & SDHCI_INT_RESPONSE)
 923                 sdhci_finish_command(host);
 924         else {
 925                 if (intmask & SDHCI_INT_TIMEOUT)
 926                         host->cmd->error = MMC_ERR_TIMEOUT;
 927                 else if (intmask & SDHCI_INT_CRC)
 928                         host->cmd->error = MMC_ERR_BADCRC;
 929                 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
 930                         host->cmd->error = MMC_ERR_FAILED;
 931                 else
 932                         host->cmd->error = MMC_ERR_INVALID;
 933
 934                 tasklet_schedule(&host->finish_tasklet);
 935         }
 936 }
 937
 938 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
 939 {
 940         BUG_ON(intmask == 0);
 941
 942         if (!host->data) {
 943                 /*
 944                  * A data end interrupt is sent together with the response
 945                  * for the stop command.
 946                  */
 947                 if (intmask & SDHCI_INT_DATA_END)
 948                         return;
 949
 950                 printk(KERN_ERR "%s: Got data interrupt even though no "
 951                         "data operation was in progress.\n",
 952                         mmc_hostname(host->mmc));
 953                 sdhci_dumpregs(host);
 954
 955                 return;
 956         }
 957
 958         if (intmask & SDHCI_INT_DATA_TIMEOUT)
 959                 host->data->error = MMC_ERR_TIMEOUT;
 960         else if (intmask & SDHCI_INT_DATA_CRC)
 961                 host->data->error = MMC_ERR_BADCRC;
 962         else if (intmask & SDHCI_INT_DATA_END_BIT)
 963                 host->data->error = MMC_ERR_FAILED;
 964
 965         if (host->data->error != MMC_ERR_NONE)
 966                 sdhci_finish_data(host);
 967         else {
 968                 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
 969                         sdhci_transfer_pio(host);
 970
 971                 if (intmask & SDHCI_INT_DATA_END)
 972                         sdhci_finish_data(host);
 973         }
 974 }
 975
 976 static irqreturn_t sdhci_irq(int irq, void *dev_id)
 977 {
 978         irqreturn_t result;
 979         struct sdhci_host* host = dev_id;
 980         u32 intmask;
 981
 982         spin_lock(&host->lock);
 983
 984         intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
 985
 986         if (!intmask || intmask == 0xffffffff) {
 987                 result = IRQ_NONE;
 988                 goto out;
 989         }
 990
 991         DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
 992
 993         if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
 994                 writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE),
 995                         host->ioaddr + SDHCI_INT_STATUS);
 996                 tasklet_schedule(&host->card_tasklet);
 997         }
 998
 999         intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1000
1001         if (intmask & SDHCI_INT_CMD_MASK) {
1002                 writel(intmask & SDHCI_INT_CMD_MASK,
1003                         host->ioaddr + SDHCI_INT_STATUS);
1004                 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1005         }
1006
1007         if (intmask & SDHCI_INT_DATA_MASK) {
1008                 writel(intmask & SDHCI_INT_DATA_MASK,
1009                         host->ioaddr + SDHCI_INT_STATUS);
1010                 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1011         }
1012
1013         intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
1014
1015         if (intmask & SDHCI_INT_BUS_POWER) {
1016                 printk(KERN_ERR "%s: Card is consuming too much power!\n",
1017                         mmc_hostname(host->mmc));
1018                 writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
1019         }
1020
1021         intmask &= SDHCI_INT_BUS_POWER;
1022
1023         if (intmask) {
1024                 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n",
1025                         mmc_hostname(host->mmc), intmask);
1026                 sdhci_dumpregs(host);
1027
1028                 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
1029         }
1030
1031         result = IRQ_HANDLED;
1032
1033         mmiowb();
1034 out:
1035         spin_unlock(&host->lock);
1036
1037         return result;
1038 }
1039
1040 /*****************************************************************************\
1041  *                                                                           *
1042  * Suspend/resume                                                            *
1043  *                                                                           *
1044 \*****************************************************************************/
1045
1046 #ifdef CONFIG_PM
1047
1048 static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
1049 {
1050         struct sdhci_chip *chip;
1051         int i, ret;
1052
1053         chip = pci_get_drvdata(pdev);
1054         if (!chip)
1055                 return 0;
1056
1057         DBG("Suspending...\n");
1058
1059         for (i = 0;i < chip->num_slots;i++) {
1060                 if (!chip->hosts[i])
1061                         continue;
1062                 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
1063                 if (ret) {
1064                         for (i--;i >= 0;i--)
1065                                 mmc_resume_host(chip->hosts[i]->mmc);
1066                         return ret;
1067                 }
1068         }
1069
1070         pci_save_state(pdev);
1071         pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1072
1073         for (i = 0;i < chip->num_slots;i++) {
1074                 if (!chip->hosts[i])
1075                         continue;
1076                 free_irq(chip->hosts[i]->irq, chip->hosts[i]);
1077         }
1078
1079         pci_disable_device(pdev);
1080         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1081
1082         return 0;
1083 }
1084
1085 static int sdhci_resume (struct pci_dev *pdev)
1086 {
1087         struct sdhci_chip *chip;
1088         int i, ret;
1089
1090         chip = pci_get_drvdata(pdev);
1091         if (!chip)
1092                 return 0;
1093
1094         DBG("Resuming...\n");
1095
1096         pci_set_power_state(pdev, PCI_D0);
1097         pci_restore_state(pdev);
1098         ret = pci_enable_device(pdev);
1099         if (ret)
1100                 return ret;
1101
1102         for (i = 0;i < chip->num_slots;i++) {
1103                 if (!chip->hosts[i])
1104                         continue;
1105                 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
1106                         pci_set_master(pdev);
1107                 ret = request_irq(chip->hosts[i]->irq, sdhci_irq,
1108                         IRQF_SHARED, chip->hosts[i]->slot_descr,
1109                         chip->hosts[i]);
1110                 if (ret)
1111                         return ret;
1112                 sdhci_init(chip->hosts[i]);
1113                 mmiowb();
1114                 ret = mmc_resume_host(chip->hosts[i]->mmc);
1115                 if (ret)
1116                         return ret;
1117         }
1118
1119         return 0;
1120 }
1121
1122 #else /* CONFIG_PM */
1123
1124 #define sdhci_suspend NULL
1125 #define sdhci_resume NULL
1126
1127 #endif /* CONFIG_PM */
1128
1129 /*****************************************************************************\
1130  *                                                                           *
1131  * Device probing/removal                                                    *
1132  *                                                                           *
1133 \*****************************************************************************/
1134
1135 static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1136 {
1137         int ret;
1138         unsigned int version;
1139         struct sdhci_chip *chip;
1140         struct mmc_host *mmc;
1141         struct sdhci_host *host;
1142
1143         u8 first_bar;
1144         unsigned int caps;
1145
1146         chip = pci_get_drvdata(pdev);
1147         BUG_ON(!chip);
1148
1149         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1150         if (ret)
1151                 return ret;
1152
1153         first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1154
1155         if (first_bar > 5) {
1156                 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1157                 return -ENODEV;
1158         }
1159
1160         if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1161                 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1162                 return -ENODEV;
1163         }
1164
1165         if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1166                 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. "
1167                         "You may experience problems.\n");
1168         }
1169
1170         if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1171                 printk(KERN_ERR DRIVER_NAME ": Vendor specific interface. Aborting.\n");
1172                 return -ENODEV;
1173         }
1174
1175         if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1176                 printk(KERN_ERR DRIVER_NAME ": Unknown interface. Aborting.\n");
1177                 return -ENODEV;
1178         }
1179
1180         mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1181         if (!mmc)
1182                 return -ENOMEM;
1183
1184         host = mmc_priv(mmc);
1185         host->mmc = mmc;
1186
1187         host->chip = chip;
1188         chip->hosts[slot] = host;
1189
1190         host->bar = first_bar + slot;
1191
1192         host->addr = pci_resource_start(pdev, host->bar);
1193         host->irq = pdev->irq;
1194
1195         DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1196
1197         snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1198
1199         ret = pci_request_region(pdev, host->bar, host->slot_descr);
1200         if (ret)
1201                 goto free;
1202
1203         host->ioaddr = ioremap_nocache(host->addr,
1204                 pci_resource_len(pdev, host->bar));
1205         if (!host->ioaddr) {
1206                 ret = -ENOMEM;
1207                 goto release;
1208         }
1209
1210         sdhci_reset(host, SDHCI_RESET_ALL);
1211
1212         version = readw(host->ioaddr + SDHCI_HOST_VERSION);
1213         version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT;
1214         if (version != 0) {
1215                 printk(KERN_ERR "%s: Unknown controller version (%d). "
1216                         "You may experience problems.\n", host->slot_descr,
1217                         version);
1218         }
1219
1220         caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1221
1222         if (debug_nodma)
1223                 DBG("DMA forced off\n");
1224         else if (debug_forcedma) {
1225                 DBG("DMA forced on\n");
1226                 host->flags |= SDHCI_USE_DMA;
1227         } else if (chip->quirks & SDHCI_QUIRK_FORCE_DMA)
1228                 host->flags |= SDHCI_USE_DMA;
1229         else if ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA)
1230                 DBG("Controller doesn't have DMA interface\n");
1231         else if (!(caps & SDHCI_CAN_DO_DMA))
1232                 DBG("Controller doesn't have DMA capability\n");
1233         else
1234                 host->flags |= SDHCI_USE_DMA;
1235
1236         if (host->flags & SDHCI_USE_DMA) {
1237                 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1238                         printk(KERN_WARNING "%s: No suitable DMA available. "
1239                                 "Falling back to PIO.\n", host->slot_descr);
1240                         host->flags &= ~SDHCI_USE_DMA;
1241                 }
1242         }
1243
1244         if (host->flags & SDHCI_USE_DMA)
1245                 pci_set_master(pdev);
1246         else /* XXX: Hack to get MMC layer to avoid highmem */
1247                 pdev->dma_mask = 0;
1248
1249         host->max_clk =
1250                 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1251         if (host->max_clk == 0) {
1252                 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1253                         "frequency.\n", host->slot_descr);
1254                 ret = -ENODEV;
1255                 goto unmap;
1256         }
1257         host->max_clk *= 1000000;
1258
1259         host->timeout_clk =
1260                 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1261         if (host->timeout_clk == 0) {
1262                 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1263                         "frequency.\n", host->slot_descr);
1264                 ret = -ENODEV;
1265                 goto unmap;
1266         }
1267         if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1268                 host->timeout_clk *= 1000;
1269
1270         /*
1271          * Set host parameters.
1272          */
1273         mmc->ops = &sdhci_ops;
1274         mmc->f_min = host->max_clk / 256;
1275         mmc->f_max = host->max_clk;
1276         mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK;
1277
1278         if (caps & SDHCI_CAN_DO_HISPD)
1279                 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1280
1281         mmc->ocr_avail = 0;
1282         if (caps & SDHCI_CAN_VDD_330)
1283                 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1284         if (caps & SDHCI_CAN_VDD_300)
1285                 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1286         if (caps & SDHCI_CAN_VDD_180)
1287                 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1288
1289         if (mmc->ocr_avail == 0) {
1290                 printk(KERN_ERR "%s: Hardware doesn't report any "
1291                         "support voltages.\n", host->slot_descr);
1292                 ret = -ENODEV;
1293                 goto unmap;
1294         }
1295
1296         spin_lock_init(&host->lock);
1297
1298         /*
1299          * Maximum number of segments. Hardware cannot do scatter lists.
1300          */
1301         if (host->flags & SDHCI_USE_DMA)
1302                 mmc->max_hw_segs = 1;
1303         else
1304                 mmc->max_hw_segs = 16;
1305         mmc->max_phys_segs = 16;
1306
1307         /*
1308          * Maximum number of sectors in one transfer. Limited by DMA boundary
1309          * size (512KiB).
1310          */
1311         mmc->max_req_size = 524288;
1312
1313         /*
1314          * Maximum segment size. Could be one segment with the maximum number
1315          * of bytes.
1316          */
1317         mmc->max_seg_size = mmc->max_req_size;
1318
1319         /*
1320          * Maximum block size. This varies from controller to controller and
1321          * is specified in the capabilities register.
1322          */
1323         mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1324         if (mmc->max_blk_size >= 3) {
1325                 printk(KERN_ERR "%s: Invalid maximum block size.\n",
1326                         host->slot_descr);
1327                 ret = -ENODEV;
1328                 goto unmap;
1329         }
1330         mmc->max_blk_size = 512 << mmc->max_blk_size;
1331
1332         /*
1333          * Maximum block count.
1334          */
1335         mmc->max_blk_count = 65535;
1336
1337         /*
1338          * Init tasklets.
1339          */
1340         tasklet_init(&host->card_tasklet,
1341                 sdhci_tasklet_card, (unsigned long)host);
1342         tasklet_init(&host->finish_tasklet,
1343                 sdhci_tasklet_finish, (unsigned long)host);
1344
1345         setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host);
1346
1347         ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1348                 host->slot_descr, host);
1349         if (ret)
1350                 goto untasklet;
1351
1352         sdhci_init(host);
1353
1354 #ifdef CONFIG_MMC_DEBUG
1355         sdhci_dumpregs(host);
1356 #endif
1357
1358         mmiowb();
1359
1360         mmc_add_host(mmc);
1361
1362         printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1363                 host->addr, host->irq,
1364                 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1365
1366         return 0;
1367
1368 untasklet:
1369         tasklet_kill(&host->card_tasklet);
1370         tasklet_kill(&host->finish_tasklet);
1371 unmap:
1372         iounmap(host->ioaddr);
1373 release:
1374         pci_release_region(pdev, host->bar);
1375 free:
1376         mmc_free_host(mmc);
1377
1378         return ret;
1379 }
1380
1381 static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1382 {
1383         struct sdhci_chip *chip;
1384         struct mmc_host *mmc;
1385         struct sdhci_host *host;
1386
1387         chip = pci_get_drvdata(pdev);
1388         host = chip->hosts[slot];
1389         mmc = host->mmc;
1390
1391         chip->hosts[slot] = NULL;
1392
1393         mmc_remove_host(mmc);
1394
1395         sdhci_reset(host, SDHCI_RESET_ALL);
1396
1397         free_irq(host->irq, host);
1398
1399         del_timer_sync(&host->timer);
1400
1401         tasklet_kill(&host->card_tasklet);
1402         tasklet_kill(&host->finish_tasklet);
1403
1404         iounmap(host->ioaddr);
1405
1406         pci_release_region(pdev, host->bar);
1407
1408         mmc_free_host(mmc);
1409 }
1410
1411 static int __devinit sdhci_probe(struct pci_dev *pdev,
1412         const struct pci_device_id *ent)
1413 {
1414         int ret, i;
1415         u8 slots, rev;
1416         struct sdhci_chip *chip;
1417
1418         BUG_ON(pdev == NULL);
1419         BUG_ON(ent == NULL);
1420
1421         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1422
1423         printk(KERN_INFO DRIVER_NAME
1424                 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1425                 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1426                 (int)rev);
1427
1428         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1429         if (ret)
1430                 return ret;
1431
1432         slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1433         DBG("found %d slot(s)\n", slots);
1434         if (slots == 0)
1435                 return -ENODEV;
1436
1437         ret = pci_enable_device(pdev);
1438         if (ret)
1439                 return ret;
1440
1441         chip = kzalloc(sizeof(struct sdhci_chip) +
1442                 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1443         if (!chip) {
1444                 ret = -ENOMEM;
1445                 goto err;
1446         }
1447
1448         chip->pdev = pdev;
1449         chip->quirks = ent->driver_data;
1450
1451         if (debug_quirks)
1452                 chip->quirks = debug_quirks;
1453
1454         chip->num_slots = slots;
1455         pci_set_drvdata(pdev, chip);
1456
1457         for (i = 0;i < slots;i++) {
1458                 ret = sdhci_probe_slot(pdev, i);
1459                 if (ret) {
1460                         for (i--;i >= 0;i--)
1461                                 sdhci_remove_slot(pdev, i);
1462                         goto free;
1463                 }
1464         }
1465
1466         return 0;
1467
1468 free:
1469         pci_set_drvdata(pdev, NULL);
1470         kfree(chip);
1471
1472 err:
1473         pci_disable_device(pdev);
1474         return ret;
1475 }
1476
1477 static void __devexit sdhci_remove(struct pci_dev *pdev)
1478 {
1479         int i;
1480         struct sdhci_chip *chip;
1481
1482         chip = pci_get_drvdata(pdev);
1483
1484         if (chip) {
1485                 for (i = 0;i < chip->num_slots;i++)
1486                         sdhci_remove_slot(pdev, i);
1487
1488                 pci_set_drvdata(pdev, NULL);
1489
1490                 kfree(chip);
1491         }
1492
1493         pci_disable_device(pdev);
1494 }
1495
1496 static struct pci_driver sdhci_driver = {
1497         .name =         DRIVER_NAME,
1498         .id_table =     pci_ids,
1499         .probe =        sdhci_probe,
1500         .remove =       __devexit_p(sdhci_remove),
1501         .suspend =      sdhci_suspend,
1502         .resume =       sdhci_resume,
1503 };
1504
1505 /*****************************************************************************\
1506  *                                                                           *
1507  * Driver init/exit                                                          *
1508  *                                                                           *
1509 \*****************************************************************************/
1510
1511 static int __init sdhci_drv_init(void)
1512 {
1513         printk(KERN_INFO DRIVER_NAME
1514                 ": Secure Digital Host Controller Interface driver\n");
1515         printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1516
1517         return pci_register_driver(&sdhci_driver);
1518 }
1519
1520 static void __exit sdhci_drv_exit(void)
1521 {
1522         DBG("Exiting\n");
1523
1524         pci_unregister_driver(&sdhci_driver);
1525 }
1526
1527 module_init(sdhci_drv_init);
1528 module_exit(sdhci_drv_exit);
1529
1530 module_param(debug_nodma, uint, 0444);
1531 module_param(debug_forcedma, uint, 0444);
1532 module_param(debug_quirks, uint, 0444);
1533
1534 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1535 MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1536 MODULE_LICENSE("GPL");
1537
1538 MODULE_PARM_DESC(debug_nodma, "Forcefully disable DMA transfers. (default 0)");
1539 MODULE_PARM_DESC(debug_forcedma, "Forcefully enable DMA transfers. (default 0)");
1540 MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");