]> err.no Git - linux-2.6/blob - drivers/media/video/cx88/cx88-dvb.c
V4L/DVB (6834): cx88-video: Enable selection of the WM8775 for cx88 cards
[linux-2.6] / drivers / media / video / cx88 / cx88-dvb.c
1 /*
2  *
3  * device driver for Conexant 2388x based TV cards
4  * MPEG Transport Stream (DVB) routines
5  *
6  * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7  * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; either version 2 of the License, or
12  *  (at your option) any later version.
13  *
14  *  This program is distributed in the hope that it will be useful,
15  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *  GNU General Public License for more details.
18  *
19  *  You should have received a copy of the GNU General Public License
20  *  along with this program; if not, write to the Free Software
21  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #include "mt352.h"
37 #include "mt352_priv.h"
38 #include "cx88-vp3054-i2c.h"
39 #include "zl10353.h"
40 #include "cx22702.h"
41 #include "or51132.h"
42 #include "lgdt330x.h"
43 #include "nxt200x.h"
44 #include "cx24123.h"
45 #include "isl6421.h"
46
47 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
48 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
49 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
50 MODULE_LICENSE("GPL");
51
52 static unsigned int debug = 0;
53 module_param(debug, int, 0644);
54 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
55
56 #define dprintk(level,fmt, arg...)      if (debug >= level) \
57         printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
58
59 /* ------------------------------------------------------------------ */
60
61 static int dvb_buf_setup(struct videobuf_queue *q,
62                          unsigned int *count, unsigned int *size)
63 {
64         struct cx8802_dev *dev = q->priv_data;
65
66         dev->ts_packet_size  = 188 * 4;
67         dev->ts_packet_count = 32;
68
69         *size  = dev->ts_packet_size * dev->ts_packet_count;
70         *count = 32;
71         return 0;
72 }
73
74 static int dvb_buf_prepare(struct videobuf_queue *q,
75                            struct videobuf_buffer *vb, enum v4l2_field field)
76 {
77         struct cx8802_dev *dev = q->priv_data;
78         return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
79 }
80
81 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
82 {
83         struct cx8802_dev *dev = q->priv_data;
84         cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
85 }
86
87 static void dvb_buf_release(struct videobuf_queue *q,
88                             struct videobuf_buffer *vb)
89 {
90         cx88_free_buffer(q, (struct cx88_buffer*)vb);
91 }
92
93 static struct videobuf_queue_ops dvb_qops = {
94         .buf_setup    = dvb_buf_setup,
95         .buf_prepare  = dvb_buf_prepare,
96         .buf_queue    = dvb_buf_queue,
97         .buf_release  = dvb_buf_release,
98 };
99
100 /* ------------------------------------------------------------------ */
101
102 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
103 {
104         struct cx8802_dev *dev= fe->dvb->priv;
105         struct cx8802_driver *drv = NULL;
106         int ret = 0;
107
108         drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
109         if (drv) {
110                 if (acquire)
111                         ret = drv->request_acquire(drv);
112                 else
113                         ret = drv->request_release(drv);
114         }
115
116         return ret;
117 }
118
119 /* ------------------------------------------------------------------ */
120
121 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
122 {
123         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x39 };
124         static u8 reset []         = { RESET,      0x80 };
125         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
126         static u8 agc_cfg []       = { AGC_TARGET, 0x24, 0x20 };
127         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
128         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
129
130         mt352_write(fe, clock_config,   sizeof(clock_config));
131         udelay(200);
132         mt352_write(fe, reset,          sizeof(reset));
133         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
134
135         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
136         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
137         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
138         return 0;
139 }
140
141 static int dvico_dual_demod_init(struct dvb_frontend *fe)
142 {
143         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x38 };
144         static u8 reset []         = { RESET,      0x80 };
145         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
146         static u8 agc_cfg []       = { AGC_TARGET, 0x28, 0x20 };
147         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
148         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
149
150         mt352_write(fe, clock_config,   sizeof(clock_config));
151         udelay(200);
152         mt352_write(fe, reset,          sizeof(reset));
153         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
154
155         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
156         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
157         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
158
159         return 0;
160 }
161
162 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
163 {
164         static u8 clock_config []  = { 0x89, 0x38, 0x39 };
165         static u8 reset []         = { 0x50, 0x80 };
166         static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
167         static u8 agc_cfg []       = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
168                                        0x00, 0xFF, 0x00, 0x40, 0x40 };
169         static u8 dntv_extra[]     = { 0xB5, 0x7A };
170         static u8 capt_range_cfg[] = { 0x75, 0x32 };
171
172         mt352_write(fe, clock_config,   sizeof(clock_config));
173         udelay(2000);
174         mt352_write(fe, reset,          sizeof(reset));
175         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
176
177         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
178         udelay(2000);
179         mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
180         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
181
182         return 0;
183 }
184
185 static struct mt352_config dvico_fusionhdtv = {
186         .demod_address = 0x0f,
187         .demod_init    = dvico_fusionhdtv_demod_init,
188 };
189
190 static struct mt352_config dntv_live_dvbt_config = {
191         .demod_address = 0x0f,
192         .demod_init    = dntv_live_dvbt_demod_init,
193 };
194
195 static struct mt352_config dvico_fusionhdtv_dual = {
196         .demod_address = 0x0f,
197         .demod_init    = dvico_dual_demod_init,
198 };
199
200 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
201 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
202 {
203         static u8 clock_config []  = { 0x89, 0x38, 0x38 };
204         static u8 reset []         = { 0x50, 0x80 };
205         static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
206         static u8 agc_cfg []       = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
207                                        0x00, 0xFF, 0x00, 0x40, 0x40 };
208         static u8 dntv_extra[]     = { 0xB5, 0x7A };
209         static u8 capt_range_cfg[] = { 0x75, 0x32 };
210
211         mt352_write(fe, clock_config,   sizeof(clock_config));
212         udelay(2000);
213         mt352_write(fe, reset,          sizeof(reset));
214         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
215
216         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
217         udelay(2000);
218         mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
219         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
220
221         return 0;
222 }
223
224 static struct mt352_config dntv_live_dvbt_pro_config = {
225         .demod_address = 0x0f,
226         .no_tuner      = 1,
227         .demod_init    = dntv_live_dvbt_pro_demod_init,
228 };
229 #endif
230
231 static struct zl10353_config dvico_fusionhdtv_hybrid = {
232         .demod_address = 0x0f,
233         .no_tuner      = 1,
234 };
235
236 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
237         .demod_address = 0x0f,
238 };
239
240 static struct cx22702_config connexant_refboard_config = {
241         .demod_address = 0x43,
242         .output_mode   = CX22702_SERIAL_OUTPUT,
243 };
244
245 static struct cx22702_config hauppauge_hvr_config = {
246         .demod_address = 0x63,
247         .output_mode   = CX22702_SERIAL_OUTPUT,
248 };
249
250 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
251 {
252         struct cx8802_dev *dev= fe->dvb->priv;
253         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
254         return 0;
255 }
256
257 static struct or51132_config pchdtv_hd3000 = {
258         .demod_address = 0x15,
259         .set_ts_params = or51132_set_ts_param,
260 };
261
262 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
263 {
264         struct cx8802_dev *dev= fe->dvb->priv;
265         struct cx88_core *core = dev->core;
266
267         dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
268         if (index == 0)
269                 cx_clear(MO_GP0_IO, 8);
270         else
271                 cx_set(MO_GP0_IO, 8);
272         return 0;
273 }
274
275 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
276 {
277         struct cx8802_dev *dev= fe->dvb->priv;
278         if (is_punctured)
279                 dev->ts_gen_cntrl |= 0x04;
280         else
281                 dev->ts_gen_cntrl &= ~0x04;
282         return 0;
283 }
284
285 static struct lgdt330x_config fusionhdtv_3_gold = {
286         .demod_address = 0x0e,
287         .demod_chip    = LGDT3302,
288         .serial_mpeg   = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
289         .set_ts_params = lgdt330x_set_ts_param,
290 };
291
292 static struct lgdt330x_config fusionhdtv_5_gold = {
293         .demod_address = 0x0e,
294         .demod_chip    = LGDT3303,
295         .serial_mpeg   = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
296         .set_ts_params = lgdt330x_set_ts_param,
297 };
298
299 static struct lgdt330x_config pchdtv_hd5500 = {
300         .demod_address = 0x59,
301         .demod_chip    = LGDT3303,
302         .serial_mpeg   = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
303         .set_ts_params = lgdt330x_set_ts_param,
304 };
305
306 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
307 {
308         struct cx8802_dev *dev= fe->dvb->priv;
309         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
310         return 0;
311 }
312
313 static struct nxt200x_config ati_hdtvwonder = {
314         .demod_address = 0x0a,
315         .set_ts_params = nxt200x_set_ts_param,
316 };
317
318 static int cx24123_set_ts_param(struct dvb_frontend* fe,
319         int is_punctured)
320 {
321         struct cx8802_dev *dev= fe->dvb->priv;
322         dev->ts_gen_cntrl = 0x02;
323         return 0;
324 }
325
326 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
327                                        fe_sec_voltage_t voltage)
328 {
329         struct cx8802_dev *dev= fe->dvb->priv;
330         struct cx88_core *core = dev->core;
331
332         if (voltage == SEC_VOLTAGE_OFF)
333                 cx_write(MO_GP0_IO, 0x000006fb);
334         else
335                 cx_write(MO_GP0_IO, 0x000006f9);
336
337         if (core->prev_set_voltage)
338                 return core->prev_set_voltage(fe, voltage);
339         return 0;
340 }
341
342 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
343                                       fe_sec_voltage_t voltage)
344 {
345         struct cx8802_dev *dev= fe->dvb->priv;
346         struct cx88_core *core = dev->core;
347
348         if (voltage == SEC_VOLTAGE_OFF) {
349                 dprintk(1,"LNB Voltage OFF\n");
350                 cx_write(MO_GP0_IO, 0x0000efff);
351         }
352
353         if (core->prev_set_voltage)
354                 return core->prev_set_voltage(fe, voltage);
355         return 0;
356 }
357
358 static struct cx24123_config geniatech_dvbs_config = {
359         .demod_address = 0x55,
360         .set_ts_params = cx24123_set_ts_param,
361 };
362
363 static struct cx24123_config hauppauge_novas_config = {
364         .demod_address = 0x55,
365         .set_ts_params = cx24123_set_ts_param,
366 };
367
368 static struct cx24123_config kworld_dvbs_100_config = {
369         .demod_address = 0x15,
370         .set_ts_params = cx24123_set_ts_param,
371         .lnb_polarity  = 1,
372 };
373
374 static int dvb_register(struct cx8802_dev *dev)
375 {
376         /* init struct videobuf_dvb */
377         dev->dvb.name = dev->core->name;
378         dev->ts_gen_cntrl = 0x0c;
379
380         /* init frontend */
381         switch (dev->core->boardnr) {
382         case CX88_BOARD_HAUPPAUGE_DVB_T1:
383                 dev->dvb.frontend = dvb_attach(cx22702_attach,
384                                                &connexant_refboard_config,
385                                                &dev->core->i2c_adap);
386                 if (dev->dvb.frontend != NULL) {
387                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
388                                    &dev->core->i2c_adap,
389                                    DVB_PLL_THOMSON_DTT759X);
390                 }
391                 break;
392         case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
393         case CX88_BOARD_CONEXANT_DVB_T1:
394         case CX88_BOARD_KWORLD_DVB_T_CX22702:
395         case CX88_BOARD_WINFAST_DTV1000:
396                 dev->dvb.frontend = dvb_attach(cx22702_attach,
397                                                &connexant_refboard_config,
398                                                &dev->core->i2c_adap);
399                 if (dev->dvb.frontend != NULL) {
400                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
401                                    &dev->core->i2c_adap,
402                                    DVB_PLL_THOMSON_DTT7579);
403                 }
404                 break;
405         case CX88_BOARD_WINFAST_DTV2000H:
406         case CX88_BOARD_HAUPPAUGE_HVR1100:
407         case CX88_BOARD_HAUPPAUGE_HVR1100LP:
408         case CX88_BOARD_HAUPPAUGE_HVR1300:
409         case CX88_BOARD_HAUPPAUGE_HVR3000:
410                 dev->dvb.frontend = dvb_attach(cx22702_attach,
411                                                &hauppauge_hvr_config,
412                                                &dev->core->i2c_adap);
413                 if (dev->dvb.frontend != NULL) {
414                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
415                                    &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
416                 }
417                 break;
418         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
419                 dev->dvb.frontend = dvb_attach(mt352_attach,
420                                                &dvico_fusionhdtv,
421                                                &dev->core->i2c_adap);
422                 if (dev->dvb.frontend != NULL) {
423                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
424                                    NULL, DVB_PLL_THOMSON_DTT7579);
425                         break;
426                 }
427                 /* ZL10353 replaces MT352 on later cards */
428                 dev->dvb.frontend = dvb_attach(zl10353_attach,
429                                                &dvico_fusionhdtv_plus_v1_1,
430                                                &dev->core->i2c_adap);
431                 if (dev->dvb.frontend != NULL) {
432                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
433                                    NULL, DVB_PLL_THOMSON_DTT7579);
434                 }
435                 break;
436         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
437                 /* The tin box says DEE1601, but it seems to be DTT7579
438                  * compatible, with a slightly different MT352 AGC gain. */
439                 dev->dvb.frontend = dvb_attach(mt352_attach,
440                                                &dvico_fusionhdtv_dual,
441                                                &dev->core->i2c_adap);
442                 if (dev->dvb.frontend != NULL) {
443                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
444                                    NULL, DVB_PLL_THOMSON_DTT7579);
445                         break;
446                 }
447                 /* ZL10353 replaces MT352 on later cards */
448                 dev->dvb.frontend = dvb_attach(zl10353_attach,
449                                                &dvico_fusionhdtv_plus_v1_1,
450                                                &dev->core->i2c_adap);
451                 if (dev->dvb.frontend != NULL) {
452                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
453                                    NULL, DVB_PLL_THOMSON_DTT7579);
454                 }
455                 break;
456         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
457                 dev->dvb.frontend = dvb_attach(mt352_attach,
458                                                &dvico_fusionhdtv,
459                                                &dev->core->i2c_adap);
460                 if (dev->dvb.frontend != NULL) {
461                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
462                                    NULL, DVB_PLL_LG_Z201);
463                 }
464                 break;
465         case CX88_BOARD_KWORLD_DVB_T:
466         case CX88_BOARD_DNTV_LIVE_DVB_T:
467         case CX88_BOARD_ADSTECH_DVB_T_PCI:
468                 dev->dvb.frontend = dvb_attach(mt352_attach,
469                                                &dntv_live_dvbt_config,
470                                                &dev->core->i2c_adap);
471                 if (dev->dvb.frontend != NULL) {
472                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
473                                    NULL, DVB_PLL_UNKNOWN_1);
474                 }
475                 break;
476         case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
477 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
478                 /* MT352 is on a secondary I2C bus made from some GPIO lines */
479                 dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
480                                                &dev->vp3054->adap);
481                 if (dev->dvb.frontend != NULL) {
482                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
483                                    &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
484                 }
485 #else
486                 printk(KERN_ERR "%s/2: built without vp3054 support\n", dev->core->name);
487 #endif
488                 break;
489         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
490                 dev->dvb.frontend = dvb_attach(zl10353_attach,
491                                                &dvico_fusionhdtv_hybrid,
492                                                &dev->core->i2c_adap);
493                 if (dev->dvb.frontend != NULL) {
494                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
495                                    &dev->core->i2c_adap,
496                                    DVB_PLL_THOMSON_FE6600);
497                 }
498                 break;
499         case CX88_BOARD_PCHDTV_HD3000:
500                 dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
501                                                &dev->core->i2c_adap);
502                 if (dev->dvb.frontend != NULL) {
503                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
504                                    &dev->core->i2c_adap,
505                                    DVB_PLL_THOMSON_DTT761X);
506                 }
507                 break;
508         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
509                 dev->ts_gen_cntrl = 0x08;
510                 {
511                 /* Do a hardware reset of chip before using it. */
512                 struct cx88_core *core = dev->core;
513
514                 cx_clear(MO_GP0_IO, 1);
515                 mdelay(100);
516                 cx_set(MO_GP0_IO, 1);
517                 mdelay(200);
518
519                 /* Select RF connector callback */
520                 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
521                 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
522                                                &fusionhdtv_3_gold,
523                                                &dev->core->i2c_adap);
524                 if (dev->dvb.frontend != NULL) {
525                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
526                                    &dev->core->i2c_adap,
527                                    DVB_PLL_MICROTUNE_4042);
528                 }
529                 }
530                 break;
531         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
532                 dev->ts_gen_cntrl = 0x08;
533                 {
534                 /* Do a hardware reset of chip before using it. */
535                 struct cx88_core *core = dev->core;
536
537                 cx_clear(MO_GP0_IO, 1);
538                 mdelay(100);
539                 cx_set(MO_GP0_IO, 9);
540                 mdelay(200);
541                 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
542                                                &fusionhdtv_3_gold,
543                                                &dev->core->i2c_adap);
544                 if (dev->dvb.frontend != NULL) {
545                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
546                                    &dev->core->i2c_adap,
547                                    DVB_PLL_THOMSON_DTT761X);
548                 }
549                 }
550                 break;
551         case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
552                 dev->ts_gen_cntrl = 0x08;
553                 {
554                 /* Do a hardware reset of chip before using it. */
555                 struct cx88_core *core = dev->core;
556
557                 cx_clear(MO_GP0_IO, 1);
558                 mdelay(100);
559                 cx_set(MO_GP0_IO, 1);
560                 mdelay(200);
561                 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
562                                                &fusionhdtv_5_gold,
563                                                &dev->core->i2c_adap);
564                 if (dev->dvb.frontend != NULL) {
565                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
566                                    &dev->core->i2c_adap,
567                                    DVB_PLL_LG_TDVS_H06XF);
568                 }
569                 }
570                 break;
571         case CX88_BOARD_PCHDTV_HD5500:
572                 dev->ts_gen_cntrl = 0x08;
573                 {
574                 /* Do a hardware reset of chip before using it. */
575                 struct cx88_core *core = dev->core;
576
577                 cx_clear(MO_GP0_IO, 1);
578                 mdelay(100);
579                 cx_set(MO_GP0_IO, 1);
580                 mdelay(200);
581                 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
582                                                &pchdtv_hd5500,
583                                                &dev->core->i2c_adap);
584                 if (dev->dvb.frontend != NULL) {
585                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
586                                    &dev->core->i2c_adap,
587                                    DVB_PLL_LG_TDVS_H06XF);
588                 }
589                 }
590                 break;
591         case CX88_BOARD_ATI_HDTVWONDER:
592                 dev->dvb.frontend = dvb_attach(nxt200x_attach,
593                                                &ati_hdtvwonder,
594                                                &dev->core->i2c_adap);
595                 if (dev->dvb.frontend != NULL) {
596                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
597                                    NULL, DVB_PLL_TUV1236D);
598                 }
599                 break;
600         case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
601         case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
602                 dev->dvb.frontend = dvb_attach(cx24123_attach,
603                                                &hauppauge_novas_config,
604                                                &dev->core->i2c_adap);
605                 if (dev->dvb.frontend) {
606                         dvb_attach(isl6421_attach, dev->dvb.frontend,
607                                    &dev->core->i2c_adap, 0x08, 0x00, 0x00);
608                 }
609                 break;
610         case CX88_BOARD_KWORLD_DVBS_100:
611                 dev->dvb.frontend = dvb_attach(cx24123_attach,
612                                                &kworld_dvbs_100_config,
613                                                &dev->core->i2c_adap);
614                 if (dev->dvb.frontend) {
615                         dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
616                         dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
617                 }
618                 break;
619         case CX88_BOARD_GENIATECH_DVBS:
620                 dev->dvb.frontend = dvb_attach(cx24123_attach,
621                                                &geniatech_dvbs_config,
622                                                &dev->core->i2c_adap);
623                 if (dev->dvb.frontend) {
624                         dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
625                         dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
626                 }
627                 break;
628         default:
629                 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
630                        dev->core->name);
631                 break;
632         }
633         if (NULL == dev->dvb.frontend) {
634                 printk(KERN_ERR "%s/2: frontend initialization failed\n", dev->core->name);
635                 return -1;
636         }
637
638         /* Ensure all frontends negotiate bus access */
639         dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
640
641         /* Put the analog decoder in standby to keep it quiet */
642         cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
643
644         /* register everything */
645         return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
646 }
647
648 /* ----------------------------------------------------------- */
649
650 /* CX8802 MPEG -> mini driver - We have been given the hardware */
651 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
652 {
653         struct cx88_core *core = drv->core;
654         int err = 0;
655         dprintk( 1, "%s\n", __FUNCTION__);
656
657         switch (core->boardnr) {
658         case CX88_BOARD_HAUPPAUGE_HVR1300:
659                 /* We arrive here with either the cx23416 or the cx22702
660                  * on the bus. Take the bus from the cx23416 and enable the
661                  * cx22702 demod
662                  */
663                 cx_set(MO_GP0_IO,   0x00000080); /* cx22702 out of reset and enable */
664                 cx_clear(MO_GP0_IO, 0x00000004);
665                 udelay(1000);
666                 break;
667         default:
668                 err = -ENODEV;
669         }
670         return err;
671 }
672
673 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
674 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
675 {
676         struct cx88_core *core = drv->core;
677         int err = 0;
678         dprintk( 1, "%s\n", __FUNCTION__);
679
680         switch (core->boardnr) {
681         case CX88_BOARD_HAUPPAUGE_HVR1300:
682                 /* Do Nothing, leave the cx22702 on the bus. */
683                 break;
684         default:
685                 err = -ENODEV;
686         }
687         return err;
688 }
689
690 static int cx8802_dvb_probe(struct cx8802_driver *drv)
691 {
692         struct cx88_core *core = drv->core;
693         struct cx8802_dev *dev = drv->core->dvbdev;
694         int err;
695
696         dprintk( 1, "%s\n", __FUNCTION__);
697         dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
698                 core->boardnr,
699                 core->name,
700                 core->pci_bus,
701                 core->pci_slot);
702
703         err = -ENODEV;
704         if (!(core->board.mpeg & CX88_MPEG_DVB))
705                 goto fail_core;
706
707         /* If vp3054 isn't enabled, a stub will just return 0 */
708         err = vp3054_i2c_probe(dev);
709         if (0 != err)
710                 goto fail_core;
711
712         /* dvb stuff */
713         printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
714         videobuf_queue_pci_init(&dev->dvb.dvbq, &dvb_qops,
715                             dev->pci, &dev->slock,
716                             V4L2_BUF_TYPE_VIDEO_CAPTURE,
717                             V4L2_FIELD_TOP,
718                             sizeof(struct cx88_buffer),
719                             dev);
720         err = dvb_register(dev);
721         if (err != 0)
722                 printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
723                        core->name, err);
724
725  fail_core:
726         return err;
727 }
728
729 static int cx8802_dvb_remove(struct cx8802_driver *drv)
730 {
731         struct cx8802_dev *dev = drv->core->dvbdev;
732
733         /* dvb */
734         videobuf_dvb_unregister(&dev->dvb);
735
736         vp3054_i2c_remove(dev);
737
738         return 0;
739 }
740
741 static struct cx8802_driver cx8802_dvb_driver = {
742         .type_id        = CX88_MPEG_DVB,
743         .hw_access      = CX8802_DRVCTL_SHARED,
744         .probe          = cx8802_dvb_probe,
745         .remove         = cx8802_dvb_remove,
746         .advise_acquire = cx8802_dvb_advise_acquire,
747         .advise_release = cx8802_dvb_advise_release,
748 };
749
750 static int dvb_init(void)
751 {
752         printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
753                (CX88_VERSION_CODE >> 16) & 0xff,
754                (CX88_VERSION_CODE >>  8) & 0xff,
755                CX88_VERSION_CODE & 0xff);
756 #ifdef SNAPSHOT
757         printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
758                SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
759 #endif
760         return cx8802_register_driver(&cx8802_dvb_driver);
761 }
762
763 static void dvb_fini(void)
764 {
765         cx8802_unregister_driver(&cx8802_dvb_driver);
766 }
767
768 module_init(dvb_init);
769 module_exit(dvb_fini);
770
771 /*
772  * Local variables:
773  * c-basic-offset: 8
774  * compile-command: "make DVB=1"
775  * End:
776  */