3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
34 #include <media/v4l2-common.h>
37 #include "mt352_priv.h"
38 #include "cx88-vp3054-i2c.h"
48 #include "tuner-xc2028.h"
49 #include "tuner-xc2028-types.h"
51 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
52 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
53 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
54 MODULE_LICENSE("GPL");
56 static unsigned int debug;
57 module_param(debug, int, 0644);
58 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
60 #define dprintk(level,fmt, arg...) if (debug >= level) \
61 printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
63 /* ------------------------------------------------------------------ */
65 static int dvb_buf_setup(struct videobuf_queue *q,
66 unsigned int *count, unsigned int *size)
68 struct cx8802_dev *dev = q->priv_data;
70 dev->ts_packet_size = 188 * 4;
71 dev->ts_packet_count = 32;
73 *size = dev->ts_packet_size * dev->ts_packet_count;
78 static int dvb_buf_prepare(struct videobuf_queue *q,
79 struct videobuf_buffer *vb, enum v4l2_field field)
81 struct cx8802_dev *dev = q->priv_data;
82 return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
85 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
87 struct cx8802_dev *dev = q->priv_data;
88 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
91 static void dvb_buf_release(struct videobuf_queue *q,
92 struct videobuf_buffer *vb)
94 cx88_free_buffer(q, (struct cx88_buffer*)vb);
97 static struct videobuf_queue_ops dvb_qops = {
98 .buf_setup = dvb_buf_setup,
99 .buf_prepare = dvb_buf_prepare,
100 .buf_queue = dvb_buf_queue,
101 .buf_release = dvb_buf_release,
104 /* ------------------------------------------------------------------ */
106 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
108 struct cx8802_dev *dev= fe->dvb->priv;
109 struct cx8802_driver *drv = NULL;
112 drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
115 ret = drv->request_acquire(drv);
117 ret = drv->request_release(drv);
123 /* ------------------------------------------------------------------ */
125 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
127 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
128 static u8 reset [] = { RESET, 0x80 };
129 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
130 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
131 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
132 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
134 mt352_write(fe, clock_config, sizeof(clock_config));
136 mt352_write(fe, reset, sizeof(reset));
137 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
139 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
140 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
141 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
145 static int dvico_dual_demod_init(struct dvb_frontend *fe)
147 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
148 static u8 reset [] = { RESET, 0x80 };
149 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
150 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
151 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
152 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
154 mt352_write(fe, clock_config, sizeof(clock_config));
156 mt352_write(fe, reset, sizeof(reset));
157 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
159 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
160 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
161 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
166 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
168 static u8 clock_config [] = { 0x89, 0x38, 0x39 };
169 static u8 reset [] = { 0x50, 0x80 };
170 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
171 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
172 0x00, 0xFF, 0x00, 0x40, 0x40 };
173 static u8 dntv_extra[] = { 0xB5, 0x7A };
174 static u8 capt_range_cfg[] = { 0x75, 0x32 };
176 mt352_write(fe, clock_config, sizeof(clock_config));
178 mt352_write(fe, reset, sizeof(reset));
179 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
181 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
183 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
184 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
189 static struct mt352_config dvico_fusionhdtv = {
190 .demod_address = 0x0f,
191 .demod_init = dvico_fusionhdtv_demod_init,
194 static struct mt352_config dntv_live_dvbt_config = {
195 .demod_address = 0x0f,
196 .demod_init = dntv_live_dvbt_demod_init,
199 static struct mt352_config dvico_fusionhdtv_dual = {
200 .demod_address = 0x0f,
201 .demod_init = dvico_dual_demod_init,
204 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
205 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
207 static u8 clock_config [] = { 0x89, 0x38, 0x38 };
208 static u8 reset [] = { 0x50, 0x80 };
209 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
210 static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
211 0x00, 0xFF, 0x00, 0x40, 0x40 };
212 static u8 dntv_extra[] = { 0xB5, 0x7A };
213 static u8 capt_range_cfg[] = { 0x75, 0x32 };
215 mt352_write(fe, clock_config, sizeof(clock_config));
217 mt352_write(fe, reset, sizeof(reset));
218 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
220 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
222 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
223 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
228 static struct mt352_config dntv_live_dvbt_pro_config = {
229 .demod_address = 0x0f,
231 .demod_init = dntv_live_dvbt_pro_demod_init,
235 static struct zl10353_config dvico_fusionhdtv_hybrid = {
236 .demod_address = 0x0f,
240 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
241 .demod_address = 0x0f,
246 static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
247 .demod_address = 0x0f,
250 .demod_init = dvico_fusionhdtv_demod_init,
253 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
254 .demod_address = 0x0f,
257 static struct cx22702_config connexant_refboard_config = {
258 .demod_address = 0x43,
259 .output_mode = CX22702_SERIAL_OUTPUT,
262 static struct cx22702_config hauppauge_hvr_config = {
263 .demod_address = 0x63,
264 .output_mode = CX22702_SERIAL_OUTPUT,
267 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
269 struct cx8802_dev *dev= fe->dvb->priv;
270 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
274 static struct or51132_config pchdtv_hd3000 = {
275 .demod_address = 0x15,
276 .set_ts_params = or51132_set_ts_param,
279 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
281 struct cx8802_dev *dev= fe->dvb->priv;
282 struct cx88_core *core = dev->core;
284 dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
286 cx_clear(MO_GP0_IO, 8);
288 cx_set(MO_GP0_IO, 8);
292 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
294 struct cx8802_dev *dev= fe->dvb->priv;
296 dev->ts_gen_cntrl |= 0x04;
298 dev->ts_gen_cntrl &= ~0x04;
302 static struct lgdt330x_config fusionhdtv_3_gold = {
303 .demod_address = 0x0e,
304 .demod_chip = LGDT3302,
305 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
306 .set_ts_params = lgdt330x_set_ts_param,
309 static struct lgdt330x_config fusionhdtv_5_gold = {
310 .demod_address = 0x0e,
311 .demod_chip = LGDT3303,
312 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
313 .set_ts_params = lgdt330x_set_ts_param,
316 static struct lgdt330x_config pchdtv_hd5500 = {
317 .demod_address = 0x59,
318 .demod_chip = LGDT3303,
319 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
320 .set_ts_params = lgdt330x_set_ts_param,
323 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
325 struct cx8802_dev *dev= fe->dvb->priv;
326 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
330 static struct nxt200x_config ati_hdtvwonder = {
331 .demod_address = 0x0a,
332 .set_ts_params = nxt200x_set_ts_param,
335 static int cx24123_set_ts_param(struct dvb_frontend* fe,
338 struct cx8802_dev *dev= fe->dvb->priv;
339 dev->ts_gen_cntrl = 0x02;
343 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
344 fe_sec_voltage_t voltage)
346 struct cx8802_dev *dev= fe->dvb->priv;
347 struct cx88_core *core = dev->core;
349 if (voltage == SEC_VOLTAGE_OFF)
350 cx_write(MO_GP0_IO, 0x000006fb);
352 cx_write(MO_GP0_IO, 0x000006f9);
354 if (core->prev_set_voltage)
355 return core->prev_set_voltage(fe, voltage);
359 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
360 fe_sec_voltage_t voltage)
362 struct cx8802_dev *dev= fe->dvb->priv;
363 struct cx88_core *core = dev->core;
365 if (voltage == SEC_VOLTAGE_OFF) {
366 dprintk(1,"LNB Voltage OFF\n");
367 cx_write(MO_GP0_IO, 0x0000efff);
370 if (core->prev_set_voltage)
371 return core->prev_set_voltage(fe, voltage);
375 static int cx88_pci_nano_callback(void *ptr, int command, int arg)
377 struct cx88_core *core = ptr;
380 case XC2028_TUNER_RESET:
381 /* Send the tuner in then out of reset */
382 dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __FUNCTION__, arg);
384 switch (core->boardnr) {
385 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
386 /* GPIO-4 xc3028 tuner */
388 cx_set(MO_GP0_IO, 0x00001000);
389 cx_clear(MO_GP0_IO, 0x00000010);
391 cx_set(MO_GP0_IO, 0x00000010);
397 case XC2028_RESET_CLK:
398 dprintk(1, "%s: XC2028_RESET_CLK %d\n", __FUNCTION__, arg);
401 dprintk(1, "%s: unknown command %d, arg %d\n", __FUNCTION__,
409 static struct cx24123_config geniatech_dvbs_config = {
410 .demod_address = 0x55,
411 .set_ts_params = cx24123_set_ts_param,
414 static struct cx24123_config hauppauge_novas_config = {
415 .demod_address = 0x55,
416 .set_ts_params = cx24123_set_ts_param,
419 static struct cx24123_config kworld_dvbs_100_config = {
420 .demod_address = 0x15,
421 .set_ts_params = cx24123_set_ts_param,
425 static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
426 .demod_address = 0x32 >> 1,
427 .output_mode = S5H1409_PARALLEL_OUTPUT,
428 .gpio = S5H1409_GPIO_ON,
430 .inversion = S5H1409_INVERSION_OFF,
431 .status_mode = S5H1409_DEMODLOCKING,
432 .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
435 static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
436 .demod_address = 0x32 >> 1,
437 .output_mode = S5H1409_SERIAL_OUTPUT,
438 .gpio = S5H1409_GPIO_OFF,
439 .inversion = S5H1409_INVERSION_OFF,
440 .status_mode = S5H1409_DEMODLOCKING,
441 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
444 static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
447 .tuner_callback = cx88_tuner_callback,
450 static struct zl10353_config cx88_geniatech_x8000_mt = {
451 .demod_address = (0x1e >> 1),
455 static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
457 struct dvb_frontend *fe;
458 struct xc2028_config cfg = {
459 .i2c_adap = &dev->core->i2c_adap,
461 .video_dev = dev->core,
464 fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
466 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
468 dvb_frontend_detach(dev->dvb.frontend);
469 dvb_unregister_frontend(dev->dvb.frontend);
470 dev->dvb.frontend = NULL;
474 printk(KERN_INFO "%s/2: xc3028 attached\n",
480 static int dvb_register(struct cx8802_dev *dev)
482 /* init struct videobuf_dvb */
483 dev->dvb.name = dev->core->name;
484 dev->ts_gen_cntrl = 0x0c;
487 switch (dev->core->boardnr) {
488 case CX88_BOARD_HAUPPAUGE_DVB_T1:
489 dev->dvb.frontend = dvb_attach(cx22702_attach,
490 &connexant_refboard_config,
491 &dev->core->i2c_adap);
492 if (dev->dvb.frontend != NULL) {
493 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
494 &dev->core->i2c_adap,
495 DVB_PLL_THOMSON_DTT759X);
498 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
499 case CX88_BOARD_CONEXANT_DVB_T1:
500 case CX88_BOARD_KWORLD_DVB_T_CX22702:
501 case CX88_BOARD_WINFAST_DTV1000:
502 dev->dvb.frontend = dvb_attach(cx22702_attach,
503 &connexant_refboard_config,
504 &dev->core->i2c_adap);
505 if (dev->dvb.frontend != NULL) {
506 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
507 &dev->core->i2c_adap,
508 DVB_PLL_THOMSON_DTT7579);
511 case CX88_BOARD_WINFAST_DTV2000H:
512 case CX88_BOARD_HAUPPAUGE_HVR1100:
513 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
514 case CX88_BOARD_HAUPPAUGE_HVR1300:
515 case CX88_BOARD_HAUPPAUGE_HVR3000:
516 dev->dvb.frontend = dvb_attach(cx22702_attach,
517 &hauppauge_hvr_config,
518 &dev->core->i2c_adap);
519 if (dev->dvb.frontend != NULL) {
520 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
521 &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
524 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
525 dev->dvb.frontend = dvb_attach(mt352_attach,
527 &dev->core->i2c_adap);
528 if (dev->dvb.frontend != NULL) {
529 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
530 NULL, DVB_PLL_THOMSON_DTT7579);
533 /* ZL10353 replaces MT352 on later cards */
534 dev->dvb.frontend = dvb_attach(zl10353_attach,
535 &dvico_fusionhdtv_plus_v1_1,
536 &dev->core->i2c_adap);
537 if (dev->dvb.frontend != NULL) {
538 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
539 NULL, DVB_PLL_THOMSON_DTT7579);
542 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
543 /* The tin box says DEE1601, but it seems to be DTT7579
544 * compatible, with a slightly different MT352 AGC gain. */
545 dev->dvb.frontend = dvb_attach(mt352_attach,
546 &dvico_fusionhdtv_dual,
547 &dev->core->i2c_adap);
548 if (dev->dvb.frontend != NULL) {
549 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
550 NULL, DVB_PLL_THOMSON_DTT7579);
553 /* ZL10353 replaces MT352 on later cards */
554 dev->dvb.frontend = dvb_attach(zl10353_attach,
555 &dvico_fusionhdtv_plus_v1_1,
556 &dev->core->i2c_adap);
557 if (dev->dvb.frontend != NULL) {
558 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
559 NULL, DVB_PLL_THOMSON_DTT7579);
562 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
563 dev->dvb.frontend = dvb_attach(mt352_attach,
565 &dev->core->i2c_adap);
566 if (dev->dvb.frontend != NULL) {
567 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
568 NULL, DVB_PLL_LG_Z201);
571 case CX88_BOARD_KWORLD_DVB_T:
572 case CX88_BOARD_DNTV_LIVE_DVB_T:
573 case CX88_BOARD_ADSTECH_DVB_T_PCI:
574 dev->dvb.frontend = dvb_attach(mt352_attach,
575 &dntv_live_dvbt_config,
576 &dev->core->i2c_adap);
577 if (dev->dvb.frontend != NULL) {
578 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
579 NULL, DVB_PLL_UNKNOWN_1);
582 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
583 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
584 /* MT352 is on a secondary I2C bus made from some GPIO lines */
585 dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
587 if (dev->dvb.frontend != NULL) {
588 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
589 &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
592 printk(KERN_ERR "%s/2: built without vp3054 support\n", dev->core->name);
595 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
596 dev->dvb.frontend = dvb_attach(zl10353_attach,
597 &dvico_fusionhdtv_hybrid,
598 &dev->core->i2c_adap);
599 if (dev->dvb.frontend != NULL) {
600 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
601 &dev->core->i2c_adap,
602 DVB_PLL_THOMSON_FE6600);
605 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
606 dev->dvb.frontend = dvb_attach(zl10353_attach,
607 &dvico_fusionhdtv_xc3028,
608 &dev->core->i2c_adap);
609 if (dev->dvb.frontend == NULL)
610 dev->dvb.frontend = dvb_attach(mt352_attach,
611 &dvico_fusionhdtv_mt352_xc3028,
612 &dev->core->i2c_adap);
614 * On this board, the demod provides the I2C bus pullup.
615 * We must not permit gate_ctrl to be performed, or
616 * the xc3028 cannot communicate on the bus.
618 if (dev->dvb.frontend)
619 dev->dvb.frontend->ops.i2c_gate_ctrl = NULL;
620 if (attach_xc3028(0x61, dev) < 0)
623 case CX88_BOARD_PCHDTV_HD3000:
624 dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
625 &dev->core->i2c_adap);
626 if (dev->dvb.frontend != NULL) {
627 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
628 &dev->core->i2c_adap,
629 DVB_PLL_THOMSON_DTT761X);
632 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
633 dev->ts_gen_cntrl = 0x08;
635 /* Do a hardware reset of chip before using it. */
636 struct cx88_core *core = dev->core;
638 cx_clear(MO_GP0_IO, 1);
640 cx_set(MO_GP0_IO, 1);
643 /* Select RF connector callback */
644 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
645 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
647 &dev->core->i2c_adap);
648 if (dev->dvb.frontend != NULL) {
649 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
650 &dev->core->i2c_adap,
651 DVB_PLL_MICROTUNE_4042);
655 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
656 dev->ts_gen_cntrl = 0x08;
658 /* Do a hardware reset of chip before using it. */
659 struct cx88_core *core = dev->core;
661 cx_clear(MO_GP0_IO, 1);
663 cx_set(MO_GP0_IO, 9);
665 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
667 &dev->core->i2c_adap);
668 if (dev->dvb.frontend != NULL) {
669 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
670 &dev->core->i2c_adap,
671 DVB_PLL_THOMSON_DTT761X);
675 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
676 dev->ts_gen_cntrl = 0x08;
678 /* Do a hardware reset of chip before using it. */
679 struct cx88_core *core = dev->core;
681 cx_clear(MO_GP0_IO, 1);
683 cx_set(MO_GP0_IO, 1);
685 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
687 &dev->core->i2c_adap);
688 if (dev->dvb.frontend != NULL) {
689 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
690 &dev->core->i2c_adap,
691 DVB_PLL_LG_TDVS_H06XF);
695 case CX88_BOARD_PCHDTV_HD5500:
696 dev->ts_gen_cntrl = 0x08;
698 /* Do a hardware reset of chip before using it. */
699 struct cx88_core *core = dev->core;
701 cx_clear(MO_GP0_IO, 1);
703 cx_set(MO_GP0_IO, 1);
705 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
707 &dev->core->i2c_adap);
708 if (dev->dvb.frontend != NULL) {
709 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
710 &dev->core->i2c_adap,
711 DVB_PLL_LG_TDVS_H06XF);
715 case CX88_BOARD_ATI_HDTVWONDER:
716 dev->dvb.frontend = dvb_attach(nxt200x_attach,
718 &dev->core->i2c_adap);
719 if (dev->dvb.frontend != NULL) {
720 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
721 NULL, DVB_PLL_TUV1236D);
724 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
725 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
726 dev->dvb.frontend = dvb_attach(cx24123_attach,
727 &hauppauge_novas_config,
728 &dev->core->i2c_adap);
729 if (dev->dvb.frontend) {
730 dvb_attach(isl6421_attach, dev->dvb.frontend,
731 &dev->core->i2c_adap, 0x08, 0x00, 0x00);
734 case CX88_BOARD_KWORLD_DVBS_100:
735 dev->dvb.frontend = dvb_attach(cx24123_attach,
736 &kworld_dvbs_100_config,
737 &dev->core->i2c_adap);
738 if (dev->dvb.frontend) {
739 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
740 dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
743 case CX88_BOARD_GENIATECH_DVBS:
744 dev->dvb.frontend = dvb_attach(cx24123_attach,
745 &geniatech_dvbs_config,
746 &dev->core->i2c_adap);
747 if (dev->dvb.frontend) {
748 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
749 dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
752 case CX88_BOARD_PINNACLE_PCTV_HD_800i:
753 dev->dvb.frontend = dvb_attach(s5h1409_attach,
754 &pinnacle_pctv_hd_800i_config,
755 &dev->core->i2c_adap);
756 if (dev->dvb.frontend != NULL) {
757 /* tuner_config.video_dev must point to
760 pinnacle_pctv_hd_800i_tuner_config.priv =
761 dev->core->i2c_adap.algo_data;
762 dvb_attach(xc5000_attach, dev->dvb.frontend,
763 &dev->core->i2c_adap,
764 &pinnacle_pctv_hd_800i_tuner_config);
767 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
768 dev->dvb.frontend = dvb_attach(s5h1409_attach,
769 &dvico_hdtv5_pci_nano_config,
770 &dev->core->i2c_adap);
771 if (dev->dvb.frontend != NULL) {
772 struct dvb_frontend *fe;
773 struct xc2028_config cfg = {
774 .i2c_adap = &dev->core->i2c_adap,
776 .video_dev = dev->core,
777 .callback = cx88_pci_nano_callback,
779 static struct xc2028_ctrl ctl = {
780 .fname = "xc3028-v27.fw",
782 .scode_table = OREN538,
785 fe = dvb_attach(xc2028_attach,
786 dev->dvb.frontend, &cfg);
787 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
788 fe->ops.tuner_ops.set_config(fe, &ctl);
791 case CX88_BOARD_PINNACLE_HYBRID_PCTV:
792 dev->dvb.frontend = dvb_attach(zl10353_attach,
793 &cx88_geniatech_x8000_mt,
794 &dev->core->i2c_adap);
795 if (attach_xc3028(0x61, dev) < 0)
798 case CX88_BOARD_GENIATECH_X8000_MT:
799 dev->ts_gen_cntrl = 0x00;
801 dev->dvb.frontend = dvb_attach(zl10353_attach,
802 &cx88_geniatech_x8000_mt,
803 &dev->core->i2c_adap);
804 if (attach_xc3028(0x61, dev) < 0)
808 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
812 if (NULL == dev->dvb.frontend) {
814 "%s/2: frontend initialization failed\n",
819 /* Ensure all frontends negotiate bus access */
820 dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
822 /* Put the analog decoder in standby to keep it quiet */
823 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
825 /* register everything */
826 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
829 /* ----------------------------------------------------------- */
831 /* CX8802 MPEG -> mini driver - We have been given the hardware */
832 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
834 struct cx88_core *core = drv->core;
836 dprintk( 1, "%s\n", __FUNCTION__);
838 switch (core->boardnr) {
839 case CX88_BOARD_HAUPPAUGE_HVR1300:
840 /* We arrive here with either the cx23416 or the cx22702
841 * on the bus. Take the bus from the cx23416 and enable the
844 cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
845 cx_clear(MO_GP0_IO, 0x00000004);
854 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
855 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
857 struct cx88_core *core = drv->core;
859 dprintk( 1, "%s\n", __FUNCTION__);
861 switch (core->boardnr) {
862 case CX88_BOARD_HAUPPAUGE_HVR1300:
863 /* Do Nothing, leave the cx22702 on the bus. */
871 static int cx8802_dvb_probe(struct cx8802_driver *drv)
873 struct cx88_core *core = drv->core;
874 struct cx8802_dev *dev = drv->core->dvbdev;
877 dprintk( 1, "%s\n", __FUNCTION__);
878 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
885 if (!(core->board.mpeg & CX88_MPEG_DVB))
888 /* If vp3054 isn't enabled, a stub will just return 0 */
889 err = vp3054_i2c_probe(dev);
894 printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
895 videobuf_queue_sg_init(&dev->dvb.dvbq, &dvb_qops,
896 &dev->pci->dev, &dev->slock,
897 V4L2_BUF_TYPE_VIDEO_CAPTURE,
899 sizeof(struct cx88_buffer),
901 err = dvb_register(dev);
903 printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
910 static int cx8802_dvb_remove(struct cx8802_driver *drv)
912 struct cx8802_dev *dev = drv->core->dvbdev;
915 videobuf_dvb_unregister(&dev->dvb);
917 vp3054_i2c_remove(dev);
922 static struct cx8802_driver cx8802_dvb_driver = {
923 .type_id = CX88_MPEG_DVB,
924 .hw_access = CX8802_DRVCTL_SHARED,
925 .probe = cx8802_dvb_probe,
926 .remove = cx8802_dvb_remove,
927 .advise_acquire = cx8802_dvb_advise_acquire,
928 .advise_release = cx8802_dvb_advise_release,
931 static int dvb_init(void)
933 printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
934 (CX88_VERSION_CODE >> 16) & 0xff,
935 (CX88_VERSION_CODE >> 8) & 0xff,
936 CX88_VERSION_CODE & 0xff);
938 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
939 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
941 return cx8802_register_driver(&cx8802_dvb_driver);
944 static void dvb_fini(void)
946 cx8802_unregister_driver(&cx8802_dvb_driver);
949 module_init(dvb_init);
950 module_exit(dvb_fini);
955 * compile-command: "make DVB=1"