3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
34 #include <media/v4l2-common.h>
37 #include "mt352_priv.h"
38 #include "cx88-vp3054-i2c.h"
48 #include "tuner-xc2028-types.h"
49 #include "tuner-simple.h"
52 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
53 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
54 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
55 MODULE_LICENSE("GPL");
57 static unsigned int debug;
58 module_param(debug, int, 0644);
59 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
61 #define dprintk(level,fmt, arg...) if (debug >= level) \
62 printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
64 /* ------------------------------------------------------------------ */
66 static int dvb_buf_setup(struct videobuf_queue *q,
67 unsigned int *count, unsigned int *size)
69 struct cx8802_dev *dev = q->priv_data;
71 dev->ts_packet_size = 188 * 4;
72 dev->ts_packet_count = 32;
74 *size = dev->ts_packet_size * dev->ts_packet_count;
79 static int dvb_buf_prepare(struct videobuf_queue *q,
80 struct videobuf_buffer *vb, enum v4l2_field field)
82 struct cx8802_dev *dev = q->priv_data;
83 return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
86 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
88 struct cx8802_dev *dev = q->priv_data;
89 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
92 static void dvb_buf_release(struct videobuf_queue *q,
93 struct videobuf_buffer *vb)
95 cx88_free_buffer(q, (struct cx88_buffer*)vb);
98 static struct videobuf_queue_ops dvb_qops = {
99 .buf_setup = dvb_buf_setup,
100 .buf_prepare = dvb_buf_prepare,
101 .buf_queue = dvb_buf_queue,
102 .buf_release = dvb_buf_release,
105 /* ------------------------------------------------------------------ */
107 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
109 struct cx8802_dev *dev= fe->dvb->priv;
110 struct cx8802_driver *drv = NULL;
113 drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
116 ret = drv->request_acquire(drv);
118 ret = drv->request_release(drv);
124 /* ------------------------------------------------------------------ */
126 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
128 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
129 static u8 reset [] = { RESET, 0x80 };
130 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
131 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
132 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
133 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
135 mt352_write(fe, clock_config, sizeof(clock_config));
137 mt352_write(fe, reset, sizeof(reset));
138 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
140 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
141 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
142 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
146 static int dvico_dual_demod_init(struct dvb_frontend *fe)
148 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
149 static u8 reset [] = { RESET, 0x80 };
150 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
151 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
152 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
153 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
155 mt352_write(fe, clock_config, sizeof(clock_config));
157 mt352_write(fe, reset, sizeof(reset));
158 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
160 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
161 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
162 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
167 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
169 static u8 clock_config [] = { 0x89, 0x38, 0x39 };
170 static u8 reset [] = { 0x50, 0x80 };
171 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
172 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
173 0x00, 0xFF, 0x00, 0x40, 0x40 };
174 static u8 dntv_extra[] = { 0xB5, 0x7A };
175 static u8 capt_range_cfg[] = { 0x75, 0x32 };
177 mt352_write(fe, clock_config, sizeof(clock_config));
179 mt352_write(fe, reset, sizeof(reset));
180 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
182 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
184 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
185 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
190 static struct mt352_config dvico_fusionhdtv = {
191 .demod_address = 0x0f,
192 .demod_init = dvico_fusionhdtv_demod_init,
195 static struct mt352_config dntv_live_dvbt_config = {
196 .demod_address = 0x0f,
197 .demod_init = dntv_live_dvbt_demod_init,
200 static struct mt352_config dvico_fusionhdtv_dual = {
201 .demod_address = 0x0f,
202 .demod_init = dvico_dual_demod_init,
205 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
206 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
208 static u8 clock_config [] = { 0x89, 0x38, 0x38 };
209 static u8 reset [] = { 0x50, 0x80 };
210 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
211 static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
212 0x00, 0xFF, 0x00, 0x40, 0x40 };
213 static u8 dntv_extra[] = { 0xB5, 0x7A };
214 static u8 capt_range_cfg[] = { 0x75, 0x32 };
216 mt352_write(fe, clock_config, sizeof(clock_config));
218 mt352_write(fe, reset, sizeof(reset));
219 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
221 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
223 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
224 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
229 static struct mt352_config dntv_live_dvbt_pro_config = {
230 .demod_address = 0x0f,
232 .demod_init = dntv_live_dvbt_pro_demod_init,
236 static struct zl10353_config dvico_fusionhdtv_hybrid = {
237 .demod_address = 0x0f,
241 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
242 .demod_address = 0x0f,
247 static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
248 .demod_address = 0x0f,
251 .demod_init = dvico_fusionhdtv_demod_init,
254 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
255 .demod_address = 0x0f,
258 static struct cx22702_config connexant_refboard_config = {
259 .demod_address = 0x43,
260 .output_mode = CX22702_SERIAL_OUTPUT,
263 static struct cx22702_config hauppauge_hvr_config = {
264 .demod_address = 0x63,
265 .output_mode = CX22702_SERIAL_OUTPUT,
268 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
270 struct cx8802_dev *dev= fe->dvb->priv;
271 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
275 static struct or51132_config pchdtv_hd3000 = {
276 .demod_address = 0x15,
277 .set_ts_params = or51132_set_ts_param,
280 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
282 struct cx8802_dev *dev= fe->dvb->priv;
283 struct cx88_core *core = dev->core;
285 dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
287 cx_clear(MO_GP0_IO, 8);
289 cx_set(MO_GP0_IO, 8);
293 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
295 struct cx8802_dev *dev= fe->dvb->priv;
297 dev->ts_gen_cntrl |= 0x04;
299 dev->ts_gen_cntrl &= ~0x04;
303 static struct lgdt330x_config fusionhdtv_3_gold = {
304 .demod_address = 0x0e,
305 .demod_chip = LGDT3302,
306 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
307 .set_ts_params = lgdt330x_set_ts_param,
310 static struct lgdt330x_config fusionhdtv_5_gold = {
311 .demod_address = 0x0e,
312 .demod_chip = LGDT3303,
313 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
314 .set_ts_params = lgdt330x_set_ts_param,
317 static struct lgdt330x_config pchdtv_hd5500 = {
318 .demod_address = 0x59,
319 .demod_chip = LGDT3303,
320 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
321 .set_ts_params = lgdt330x_set_ts_param,
324 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
326 struct cx8802_dev *dev= fe->dvb->priv;
327 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
331 static struct nxt200x_config ati_hdtvwonder = {
332 .demod_address = 0x0a,
333 .set_ts_params = nxt200x_set_ts_param,
336 static int cx24123_set_ts_param(struct dvb_frontend* fe,
339 struct cx8802_dev *dev= fe->dvb->priv;
340 dev->ts_gen_cntrl = 0x02;
344 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
345 fe_sec_voltage_t voltage)
347 struct cx8802_dev *dev= fe->dvb->priv;
348 struct cx88_core *core = dev->core;
350 if (voltage == SEC_VOLTAGE_OFF)
351 cx_write(MO_GP0_IO, 0x000006fb);
353 cx_write(MO_GP0_IO, 0x000006f9);
355 if (core->prev_set_voltage)
356 return core->prev_set_voltage(fe, voltage);
360 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
361 fe_sec_voltage_t voltage)
363 struct cx8802_dev *dev= fe->dvb->priv;
364 struct cx88_core *core = dev->core;
366 if (voltage == SEC_VOLTAGE_OFF) {
367 dprintk(1,"LNB Voltage OFF\n");
368 cx_write(MO_GP0_IO, 0x0000efff);
371 if (core->prev_set_voltage)
372 return core->prev_set_voltage(fe, voltage);
376 static int cx88_pci_nano_callback(void *ptr, int command, int arg)
378 struct cx88_core *core = ptr;
381 case XC2028_TUNER_RESET:
382 /* Send the tuner in then out of reset */
383 dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __FUNCTION__, arg);
385 switch (core->boardnr) {
386 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
387 /* GPIO-4 xc3028 tuner */
389 cx_set(MO_GP0_IO, 0x00001000);
390 cx_clear(MO_GP0_IO, 0x00000010);
392 cx_set(MO_GP0_IO, 0x00000010);
398 case XC2028_RESET_CLK:
399 dprintk(1, "%s: XC2028_RESET_CLK %d\n", __FUNCTION__, arg);
402 dprintk(1, "%s: unknown command %d, arg %d\n", __FUNCTION__,
410 static struct cx24123_config geniatech_dvbs_config = {
411 .demod_address = 0x55,
412 .set_ts_params = cx24123_set_ts_param,
415 static struct cx24123_config hauppauge_novas_config = {
416 .demod_address = 0x55,
417 .set_ts_params = cx24123_set_ts_param,
420 static struct cx24123_config kworld_dvbs_100_config = {
421 .demod_address = 0x15,
422 .set_ts_params = cx24123_set_ts_param,
426 static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
427 .demod_address = 0x32 >> 1,
428 .output_mode = S5H1409_PARALLEL_OUTPUT,
429 .gpio = S5H1409_GPIO_ON,
431 .inversion = S5H1409_INVERSION_OFF,
432 .status_mode = S5H1409_DEMODLOCKING,
433 .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
436 static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
437 .demod_address = 0x32 >> 1,
438 .output_mode = S5H1409_SERIAL_OUTPUT,
439 .gpio = S5H1409_GPIO_OFF,
440 .inversion = S5H1409_INVERSION_OFF,
441 .status_mode = S5H1409_DEMODLOCKING,
442 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
445 static struct s5h1409_config kworld_atsc_120_config = {
446 .demod_address = 0x32 >> 1,
447 .output_mode = S5H1409_SERIAL_OUTPUT,
448 .gpio = S5H1409_GPIO_OFF,
449 .inversion = S5H1409_INVERSION_OFF,
450 .status_mode = S5H1409_DEMODLOCKING,
451 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
454 static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
457 .tuner_callback = cx88_tuner_callback,
460 static struct zl10353_config cx88_geniatech_x8000_mt = {
461 .demod_address = (0x1e >> 1),
465 static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
467 struct dvb_frontend *fe;
468 struct xc2028_ctrl ctl;
469 struct xc2028_config cfg = {
470 .i2c_adap = &dev->core->i2c_adap,
473 .callback = cx88_tuner_callback,
476 if (!dev->dvb.frontend) {
477 printk(KERN_ERR "%s/2: dvb frontend not attached. "
478 "Can't attach xc3028\n",
484 * Some xc3028 devices may be hidden by an I2C gate. This is known
485 * to happen with some s5h1409-based devices.
486 * Now that I2C gate is open, sets up xc3028 configuration
488 cx88_setup_xc3028(dev->core, &ctl);
490 fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
492 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
494 dvb_frontend_detach(dev->dvb.frontend);
495 dvb_unregister_frontend(dev->dvb.frontend);
496 dev->dvb.frontend = NULL;
500 printk(KERN_INFO "%s/2: xc3028 attached\n",
506 static int dvb_register(struct cx8802_dev *dev)
508 /* init struct videobuf_dvb */
509 dev->dvb.name = dev->core->name;
510 dev->ts_gen_cntrl = 0x0c;
513 switch (dev->core->boardnr) {
514 case CX88_BOARD_HAUPPAUGE_DVB_T1:
515 dev->dvb.frontend = dvb_attach(cx22702_attach,
516 &connexant_refboard_config,
517 &dev->core->i2c_adap);
518 if (dev->dvb.frontend != NULL) {
519 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
520 &dev->core->i2c_adap,
521 DVB_PLL_THOMSON_DTT759X);
524 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
525 case CX88_BOARD_CONEXANT_DVB_T1:
526 case CX88_BOARD_KWORLD_DVB_T_CX22702:
527 case CX88_BOARD_WINFAST_DTV1000:
528 dev->dvb.frontend = dvb_attach(cx22702_attach,
529 &connexant_refboard_config,
530 &dev->core->i2c_adap);
531 if (dev->dvb.frontend != NULL) {
532 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
533 &dev->core->i2c_adap,
534 DVB_PLL_THOMSON_DTT7579);
537 case CX88_BOARD_WINFAST_DTV2000H:
538 case CX88_BOARD_HAUPPAUGE_HVR1100:
539 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
540 case CX88_BOARD_HAUPPAUGE_HVR1300:
541 case CX88_BOARD_HAUPPAUGE_HVR3000:
542 dev->dvb.frontend = dvb_attach(cx22702_attach,
543 &hauppauge_hvr_config,
544 &dev->core->i2c_adap);
545 if (dev->dvb.frontend != NULL) {
546 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
547 &dev->core->i2c_adap, 0x61,
548 TUNER_PHILIPS_FMD1216ME_MK3);
551 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
552 dev->dvb.frontend = dvb_attach(mt352_attach,
554 &dev->core->i2c_adap);
555 if (dev->dvb.frontend != NULL) {
556 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
557 NULL, DVB_PLL_THOMSON_DTT7579);
560 /* ZL10353 replaces MT352 on later cards */
561 dev->dvb.frontend = dvb_attach(zl10353_attach,
562 &dvico_fusionhdtv_plus_v1_1,
563 &dev->core->i2c_adap);
564 if (dev->dvb.frontend != NULL) {
565 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
566 NULL, DVB_PLL_THOMSON_DTT7579);
569 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
570 /* The tin box says DEE1601, but it seems to be DTT7579
571 * compatible, with a slightly different MT352 AGC gain. */
572 dev->dvb.frontend = dvb_attach(mt352_attach,
573 &dvico_fusionhdtv_dual,
574 &dev->core->i2c_adap);
575 if (dev->dvb.frontend != NULL) {
576 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
577 NULL, DVB_PLL_THOMSON_DTT7579);
580 /* ZL10353 replaces MT352 on later cards */
581 dev->dvb.frontend = dvb_attach(zl10353_attach,
582 &dvico_fusionhdtv_plus_v1_1,
583 &dev->core->i2c_adap);
584 if (dev->dvb.frontend != NULL) {
585 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
586 NULL, DVB_PLL_THOMSON_DTT7579);
589 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
590 dev->dvb.frontend = dvb_attach(mt352_attach,
592 &dev->core->i2c_adap);
593 if (dev->dvb.frontend != NULL) {
594 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
595 NULL, DVB_PLL_LG_Z201);
598 case CX88_BOARD_KWORLD_DVB_T:
599 case CX88_BOARD_DNTV_LIVE_DVB_T:
600 case CX88_BOARD_ADSTECH_DVB_T_PCI:
601 dev->dvb.frontend = dvb_attach(mt352_attach,
602 &dntv_live_dvbt_config,
603 &dev->core->i2c_adap);
604 if (dev->dvb.frontend != NULL) {
605 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
606 NULL, DVB_PLL_UNKNOWN_1);
609 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
610 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
611 /* MT352 is on a secondary I2C bus made from some GPIO lines */
612 dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
614 if (dev->dvb.frontend != NULL) {
615 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
616 &dev->core->i2c_adap, 0x61,
617 TUNER_PHILIPS_FMD1216ME_MK3);
620 printk(KERN_ERR "%s/2: built without vp3054 support\n", dev->core->name);
623 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
624 dev->dvb.frontend = dvb_attach(zl10353_attach,
625 &dvico_fusionhdtv_hybrid,
626 &dev->core->i2c_adap);
627 if (dev->dvb.frontend != NULL) {
628 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
629 &dev->core->i2c_adap, 0x61,
630 TUNER_THOMSON_FE6600);
633 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
634 dev->dvb.frontend = dvb_attach(zl10353_attach,
635 &dvico_fusionhdtv_xc3028,
636 &dev->core->i2c_adap);
637 if (dev->dvb.frontend == NULL)
638 dev->dvb.frontend = dvb_attach(mt352_attach,
639 &dvico_fusionhdtv_mt352_xc3028,
640 &dev->core->i2c_adap);
642 * On this board, the demod provides the I2C bus pullup.
643 * We must not permit gate_ctrl to be performed, or
644 * the xc3028 cannot communicate on the bus.
646 if (dev->dvb.frontend)
647 dev->dvb.frontend->ops.i2c_gate_ctrl = NULL;
648 if (attach_xc3028(0x61, dev) < 0)
651 case CX88_BOARD_PCHDTV_HD3000:
652 dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
653 &dev->core->i2c_adap);
654 if (dev->dvb.frontend != NULL) {
655 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
656 &dev->core->i2c_adap, 0x61,
657 TUNER_THOMSON_DTT761X);
660 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
661 dev->ts_gen_cntrl = 0x08;
663 /* Do a hardware reset of chip before using it. */
664 struct cx88_core *core = dev->core;
666 cx_clear(MO_GP0_IO, 1);
668 cx_set(MO_GP0_IO, 1);
671 /* Select RF connector callback */
672 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
673 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
675 &dev->core->i2c_adap);
676 if (dev->dvb.frontend != NULL) {
677 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
678 &dev->core->i2c_adap, 0x61,
679 TUNER_MICROTUNE_4042FI5);
683 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
684 dev->ts_gen_cntrl = 0x08;
686 /* Do a hardware reset of chip before using it. */
687 struct cx88_core *core = dev->core;
689 cx_clear(MO_GP0_IO, 1);
691 cx_set(MO_GP0_IO, 9);
693 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
695 &dev->core->i2c_adap);
696 if (dev->dvb.frontend != NULL) {
697 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
698 &dev->core->i2c_adap, 0x61,
699 TUNER_THOMSON_DTT761X);
703 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
704 dev->ts_gen_cntrl = 0x08;
706 /* Do a hardware reset of chip before using it. */
707 struct cx88_core *core = dev->core;
709 cx_clear(MO_GP0_IO, 1);
711 cx_set(MO_GP0_IO, 1);
713 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
715 &dev->core->i2c_adap);
716 if (dev->dvb.frontend != NULL) {
717 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
718 &dev->core->i2c_adap, 0x61,
719 TUNER_LG_TDVS_H06XF);
720 dvb_attach(tda9887_attach, dev->dvb.frontend,
721 &dev->core->i2c_adap, 0x43);
725 case CX88_BOARD_PCHDTV_HD5500:
726 dev->ts_gen_cntrl = 0x08;
728 /* Do a hardware reset of chip before using it. */
729 struct cx88_core *core = dev->core;
731 cx_clear(MO_GP0_IO, 1);
733 cx_set(MO_GP0_IO, 1);
735 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
737 &dev->core->i2c_adap);
738 if (dev->dvb.frontend != NULL) {
739 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
740 &dev->core->i2c_adap, 0x61,
741 TUNER_LG_TDVS_H06XF);
742 dvb_attach(tda9887_attach, dev->dvb.frontend,
743 &dev->core->i2c_adap, 0x43);
747 case CX88_BOARD_ATI_HDTVWONDER:
748 dev->dvb.frontend = dvb_attach(nxt200x_attach,
750 &dev->core->i2c_adap);
751 if (dev->dvb.frontend != NULL) {
752 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
753 &dev->core->i2c_adap, 0x61,
754 TUNER_PHILIPS_TUV1236D);
757 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
758 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
759 dev->dvb.frontend = dvb_attach(cx24123_attach,
760 &hauppauge_novas_config,
761 &dev->core->i2c_adap);
762 if (dev->dvb.frontend) {
763 dvb_attach(isl6421_attach, dev->dvb.frontend,
764 &dev->core->i2c_adap, 0x08, 0x00, 0x00);
767 case CX88_BOARD_KWORLD_DVBS_100:
768 dev->dvb.frontend = dvb_attach(cx24123_attach,
769 &kworld_dvbs_100_config,
770 &dev->core->i2c_adap);
771 if (dev->dvb.frontend) {
772 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
773 dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
776 case CX88_BOARD_GENIATECH_DVBS:
777 dev->dvb.frontend = dvb_attach(cx24123_attach,
778 &geniatech_dvbs_config,
779 &dev->core->i2c_adap);
780 if (dev->dvb.frontend) {
781 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
782 dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
785 case CX88_BOARD_PINNACLE_PCTV_HD_800i:
786 dev->dvb.frontend = dvb_attach(s5h1409_attach,
787 &pinnacle_pctv_hd_800i_config,
788 &dev->core->i2c_adap);
789 if (dev->dvb.frontend != NULL) {
790 /* tuner_config.video_dev must point to
793 pinnacle_pctv_hd_800i_tuner_config.priv =
794 dev->core->i2c_adap.algo_data;
795 dvb_attach(xc5000_attach, dev->dvb.frontend,
796 &dev->core->i2c_adap,
797 &pinnacle_pctv_hd_800i_tuner_config);
800 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
801 dev->dvb.frontend = dvb_attach(s5h1409_attach,
802 &dvico_hdtv5_pci_nano_config,
803 &dev->core->i2c_adap);
804 if (dev->dvb.frontend != NULL) {
805 struct dvb_frontend *fe;
806 struct xc2028_config cfg = {
807 .i2c_adap = &dev->core->i2c_adap,
809 .callback = cx88_pci_nano_callback,
811 static struct xc2028_ctrl ctl = {
812 .fname = "xc3028-v27.fw",
814 .scode_table = OREN538,
817 fe = dvb_attach(xc2028_attach,
818 dev->dvb.frontend, &cfg);
819 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
820 fe->ops.tuner_ops.set_config(fe, &ctl);
823 case CX88_BOARD_PINNACLE_HYBRID_PCTV:
824 dev->dvb.frontend = dvb_attach(zl10353_attach,
825 &cx88_geniatech_x8000_mt,
826 &dev->core->i2c_adap);
827 if (attach_xc3028(0x61, dev) < 0)
830 case CX88_BOARD_GENIATECH_X8000_MT:
831 dev->ts_gen_cntrl = 0x00;
833 dev->dvb.frontend = dvb_attach(zl10353_attach,
834 &cx88_geniatech_x8000_mt,
835 &dev->core->i2c_adap);
836 if (attach_xc3028(0x61, dev) < 0)
839 case CX88_BOARD_KWORLD_ATSC_120:
840 dev->dvb.frontend = dvb_attach(s5h1409_attach,
841 &kworld_atsc_120_config,
842 &dev->core->i2c_adap);
843 if (attach_xc3028(0x61, dev) < 0)
847 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
851 if (NULL == dev->dvb.frontend) {
853 "%s/2: frontend initialization failed\n",
858 /* Ensure all frontends negotiate bus access */
859 dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
861 /* Put the analog decoder in standby to keep it quiet */
862 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
864 /* register everything */
865 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
868 /* ----------------------------------------------------------- */
870 /* CX8802 MPEG -> mini driver - We have been given the hardware */
871 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
873 struct cx88_core *core = drv->core;
875 dprintk( 1, "%s\n", __FUNCTION__);
877 switch (core->boardnr) {
878 case CX88_BOARD_HAUPPAUGE_HVR1300:
879 /* We arrive here with either the cx23416 or the cx22702
880 * on the bus. Take the bus from the cx23416 and enable the
883 cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
884 cx_clear(MO_GP0_IO, 0x00000004);
893 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
894 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
896 struct cx88_core *core = drv->core;
898 dprintk( 1, "%s\n", __FUNCTION__);
900 switch (core->boardnr) {
901 case CX88_BOARD_HAUPPAUGE_HVR1300:
902 /* Do Nothing, leave the cx22702 on the bus. */
910 static int cx8802_dvb_probe(struct cx8802_driver *drv)
912 struct cx88_core *core = drv->core;
913 struct cx8802_dev *dev = drv->core->dvbdev;
916 dprintk( 1, "%s\n", __FUNCTION__);
917 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
924 if (!(core->board.mpeg & CX88_MPEG_DVB))
927 /* If vp3054 isn't enabled, a stub will just return 0 */
928 err = vp3054_i2c_probe(dev);
933 printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
934 videobuf_queue_sg_init(&dev->dvb.dvbq, &dvb_qops,
935 &dev->pci->dev, &dev->slock,
936 V4L2_BUF_TYPE_VIDEO_CAPTURE,
938 sizeof(struct cx88_buffer),
940 err = dvb_register(dev);
942 printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
949 static int cx8802_dvb_remove(struct cx8802_driver *drv)
951 struct cx8802_dev *dev = drv->core->dvbdev;
954 videobuf_dvb_unregister(&dev->dvb);
956 vp3054_i2c_remove(dev);
961 static struct cx8802_driver cx8802_dvb_driver = {
962 .type_id = CX88_MPEG_DVB,
963 .hw_access = CX8802_DRVCTL_SHARED,
964 .probe = cx8802_dvb_probe,
965 .remove = cx8802_dvb_remove,
966 .advise_acquire = cx8802_dvb_advise_acquire,
967 .advise_release = cx8802_dvb_advise_release,
970 static int dvb_init(void)
972 printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
973 (CX88_VERSION_CODE >> 16) & 0xff,
974 (CX88_VERSION_CODE >> 8) & 0xff,
975 CX88_VERSION_CODE & 0xff);
977 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
978 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
980 return cx8802_register_driver(&cx8802_dvb_driver);
983 static void dvb_fini(void)
985 cx8802_unregister_driver(&cx8802_dvb_driver);
988 module_init(dvb_init);
989 module_exit(dvb_fini);
994 * compile-command: "make DVB=1"