2 * cx18 driver internal defines and structures
4 * Derived from ivtv-driver.h
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
27 #include <linux/version.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/init.h>
31 #include <linux/delay.h>
32 #include <linux/sched.h>
34 #include <linux/pci.h>
35 #include <linux/interrupt.h>
36 #include <linux/spinlock.h>
37 #include <linux/i2c.h>
38 #include <linux/i2c-algo-bit.h>
39 #include <linux/list.h>
40 #include <linux/unistd.h>
41 #include <linux/byteorder/swab.h>
42 #include <linux/pagemap.h>
43 #include <linux/workqueue.h>
44 #include <linux/mutex.h>
46 #include <linux/dvb/video.h>
47 #include <linux/dvb/audio.h>
48 #include <media/v4l2-common.h>
49 #include <media/tuner.h>
50 #include "cx18-mailbox.h"
51 #include "cx18-av-core.h"
57 #include "dvb_demux.h"
58 #include "dvb_frontend.h"
63 # error "This driver requires kernel PCI support."
66 #define CX18_MEM_OFFSET 0x00000000
67 #define CX18_MEM_SIZE 0x04000000
68 #define CX18_REG_OFFSET 0x02000000
70 /* Maximum cx18 driver instances. */
71 #define CX18_MAX_CARDS 32
74 #define CX18_CARD_HVR_1600_ESMT 0 /* Hauppauge HVR 1600 (ESMT memory) */
75 #define CX18_CARD_HVR_1600_SAMSUNG 1 /* Hauppauge HVR 1600 (Samsung memory) */
76 #define CX18_CARD_COMPRO_H900 2 /* Compro VideoMate H900 */
77 #define CX18_CARD_YUAN_MPC718 3 /* Yuan MPC718 */
78 #define CX18_CARD_CNXT_RAPTOR_PAL 4 /* Conexant Raptor PAL */
79 #define CX18_CARD_LAST 4
81 #define CX18_ENC_STREAM_TYPE_MPG 0
82 #define CX18_ENC_STREAM_TYPE_TS 1
83 #define CX18_ENC_STREAM_TYPE_YUV 2
84 #define CX18_ENC_STREAM_TYPE_VBI 3
85 #define CX18_ENC_STREAM_TYPE_PCM 4
86 #define CX18_ENC_STREAM_TYPE_IDX 5
87 #define CX18_ENC_STREAM_TYPE_RAD 6
88 #define CX18_MAX_STREAMS 7
90 /* system vendor and device IDs */
91 #define PCI_VENDOR_ID_CX 0x14f1
92 #define PCI_DEVICE_ID_CX23418 0x5b7a
94 /* subsystem vendor ID */
95 #define CX18_PCI_ID_HAUPPAUGE 0x0070
96 #define CX18_PCI_ID_COMPRO 0x185b
97 #define CX18_PCI_ID_YUAN 0x12ab
98 #define CX18_PCI_ID_CONEXANT 0x14f1
100 /* ======================================================================== */
101 /* ========================== START USER SETTABLE DMA VARIABLES =========== */
102 /* ======================================================================== */
104 /* DMA Buffers, Default size in MB allocated */
105 #define CX18_DEFAULT_ENC_TS_BUFFERS 1
106 #define CX18_DEFAULT_ENC_MPG_BUFFERS 2
107 #define CX18_DEFAULT_ENC_IDX_BUFFERS 1
108 #define CX18_DEFAULT_ENC_YUV_BUFFERS 2
109 #define CX18_DEFAULT_ENC_VBI_BUFFERS 1
110 #define CX18_DEFAULT_ENC_PCM_BUFFERS 1
113 #define I2C_CLIENTS_MAX 16
117 /* Flag to turn on high volume debugging */
118 #define CX18_DBGFLG_WARN (1 << 0)
119 #define CX18_DBGFLG_INFO (1 << 1)
120 #define CX18_DBGFLG_API (1 << 2)
121 #define CX18_DBGFLG_DMA (1 << 3)
122 #define CX18_DBGFLG_IOCTL (1 << 4)
123 #define CX18_DBGFLG_FILE (1 << 5)
124 #define CX18_DBGFLG_I2C (1 << 6)
125 #define CX18_DBGFLG_IRQ (1 << 7)
126 /* Flag to turn on high volume debugging */
127 #define CX18_DBGFLG_HIGHVOL (1 << 8)
129 /* NOTE: extra space before comma in 'cx->num , ## args' is required for
130 gcc-2.95, otherwise it won't compile. */
131 #define CX18_DEBUG(x, type, fmt, args...) \
133 if ((x) & cx18_debug) \
134 printk(KERN_INFO "cx18-%d " type ": " fmt, cx->num , ## args); \
136 #define CX18_DEBUG_WARN(fmt, args...) CX18_DEBUG(CX18_DBGFLG_WARN, "warning", fmt , ## args)
137 #define CX18_DEBUG_INFO(fmt, args...) CX18_DEBUG(CX18_DBGFLG_INFO, "info", fmt , ## args)
138 #define CX18_DEBUG_API(fmt, args...) CX18_DEBUG(CX18_DBGFLG_API, "api", fmt , ## args)
139 #define CX18_DEBUG_DMA(fmt, args...) CX18_DEBUG(CX18_DBGFLG_DMA, "dma", fmt , ## args)
140 #define CX18_DEBUG_IOCTL(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
141 #define CX18_DEBUG_FILE(fmt, args...) CX18_DEBUG(CX18_DBGFLG_FILE, "file", fmt , ## args)
142 #define CX18_DEBUG_I2C(fmt, args...) CX18_DEBUG(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
143 #define CX18_DEBUG_IRQ(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
145 #define CX18_DEBUG_HIGH_VOL(x, type, fmt, args...) \
147 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
148 printk(KERN_INFO "cx18%d " type ": " fmt, cx->num , ## args); \
150 #define CX18_DEBUG_HI_WARN(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_WARN, "warning", fmt , ## args)
151 #define CX18_DEBUG_HI_INFO(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_INFO, "info", fmt , ## args)
152 #define CX18_DEBUG_HI_API(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_API, "api", fmt , ## args)
153 #define CX18_DEBUG_HI_DMA(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_DMA, "dma", fmt , ## args)
154 #define CX18_DEBUG_HI_IOCTL(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
155 #define CX18_DEBUG_HI_FILE(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_FILE, "file", fmt , ## args)
156 #define CX18_DEBUG_HI_I2C(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
157 #define CX18_DEBUG_HI_IRQ(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
159 /* Standard kernel messages */
160 #define CX18_ERR(fmt, args...) printk(KERN_ERR "cx18-%d: " fmt, cx->num , ## args)
161 #define CX18_WARN(fmt, args...) printk(KERN_WARNING "cx18-%d: " fmt, cx->num , ## args)
162 #define CX18_INFO(fmt, args...) printk(KERN_INFO "cx18-%d: " fmt, cx->num , ## args)
164 /* Values for CX18_API_DEC_PLAYBACK_SPEED mpeg_frame_type_mask parameter: */
165 #define MPEG_FRAME_TYPE_IFRAME 1
166 #define MPEG_FRAME_TYPE_IFRAME_PFRAME 3
167 #define MPEG_FRAME_TYPE_ALL 7
169 #define CX18_MAX_PGM_INDEX (400)
171 extern int cx18_debug;
174 struct cx18_options {
175 int megabytes[CX18_MAX_STREAMS]; /* Size in megabytes of each stream */
176 int cardtype; /* force card type on load */
177 int tuner; /* set tuner on load */
178 int radio; /* enable/disable radio */
181 /* per-buffer bit flags */
182 #define CX18_F_B_NEED_BUF_SWAP 0 /* this buffer should be byte swapped */
184 /* per-stream, s_flags */
185 #define CX18_F_S_CLAIMED 3 /* this stream is claimed */
186 #define CX18_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
187 #define CX18_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
188 #define CX18_F_S_STREAMOFF 7 /* signal end of stream EOS */
189 #define CX18_F_S_APPL_IO 8 /* this stream is used read/written by an application */
191 /* per-cx18, i_flags */
192 #define CX18_F_I_LOADED_FW 0 /* Loaded the firmware the first time */
193 #define CX18_F_I_EOS 4 /* End of encoder stream reached */
194 #define CX18_F_I_RADIO_USER 5 /* The radio tuner is selected */
195 #define CX18_F_I_ENC_PAUSED 13 /* the encoder is paused */
196 #define CX18_F_I_INITED 21 /* set after first open */
197 #define CX18_F_I_FAILED 22 /* set if first open failed */
199 /* These are the VBI types as they appear in the embedded VBI private packets. */
200 #define CX18_SLICED_TYPE_TELETEXT_B (1)
201 #define CX18_SLICED_TYPE_CAPTION_525 (4)
202 #define CX18_SLICED_TYPE_WSS_625 (5)
203 #define CX18_SLICED_TYPE_VPS (7)
206 struct list_head list;
207 dma_addr_t dma_handle;
209 unsigned long b_flags;
217 struct list_head list;
224 struct dmx_frontend hw_frontend;
225 struct dmx_frontend mem_frontend;
226 struct dmxdev dmxdev;
227 struct dvb_adapter dvb_adapter;
228 struct dvb_demux demux;
229 struct dvb_frontend *fe;
230 struct dvb_net dvbnet;
234 struct mutex feedlock;
238 struct cx18; /* forward reference */
239 struct cx18_scb; /* forward reference */
242 /* These first four fields are always set, even if the stream
243 is not actually created. */
244 struct video_device *v4l2dev; /* NULL when stream not created */
245 struct cx18 *cx; /* for ease of use */
246 const char *name; /* name of the stream */
247 int type; /* stream type */
248 u32 handle; /* task handle */
252 spinlock_t qlock; /* locks access to the queues */
253 unsigned long s_flags; /* status flags, see above */
254 int dma; /* can be PCI_DMA_TODEVICE,
255 PCI_DMA_FROMDEVICE or
258 wait_queue_head_t waitq;
266 struct cx18_queue q_free; /* free buffers */
267 struct cx18_queue q_full; /* full buffers */
268 struct cx18_queue q_io; /* waiting for I/O */
270 /* DVB / Digital Transport */
274 struct cx18_open_id {
277 enum v4l2_priority prio;
281 /* forward declaration of struct defined in cx18-cards.h */
285 #define CX18_VBI_FRAMES 32
292 u8 cc_data_even[256];
300 u32 raw_decoder_line_size;
301 u8 raw_decoder_sav_odd_field;
302 u8 raw_decoder_sav_even_field;
303 u32 sliced_decoder_line_size;
304 u8 sliced_decoder_sav_odd_field;
305 u8 sliced_decoder_sav_even_field;
306 struct v4l2_format in;
307 /* convenience pointer to sliced struct in vbi_in union */
308 struct v4l2_sliced_vbi_format *sliced_in;
312 /* Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines.
313 One for /dev/vbi0 and one for /dev/vbi8 */
314 struct v4l2_sliced_vbi_data sliced_data[36];
316 /* Buffer for VBI data inserted into MPEG stream.
317 The first byte is a dummy byte that's never used.
318 The next 16 bytes contain the MPEG header for the VBI data,
319 the remainder is the actual VBI data.
320 The max size accepted by the MPEG VBI reinsertion turns out
321 to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes,
322 where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is
323 a single line header byte and 2 * 18 is the number of VBI lines per frame.
325 However, it seems that the data must be 1K aligned, so we have to
326 pad the data until the 1 or 2 K boundary.
328 This pointer array will allocate 2049 bytes to store each VBI frame. */
329 u8 *sliced_mpeg_data[CX18_VBI_FRAMES];
330 u32 sliced_mpeg_size[CX18_VBI_FRAMES];
331 struct cx18_buffer sliced_mpeg_buf;
339 /* Per cx23418, per I2C bus private algo callback data */
340 struct cx18_i2c_algo_callback_data {
342 int bus_index; /* 0 or 1 for the cx23418's 1st or 2nd I2C bus */
345 /* Struct to hold info about cx18 cards */
347 int num; /* board number, -1 during init! */
348 char name[8]; /* board name for printk and interrupts (e.g. 'cx180') */
349 struct pci_dev *dev; /* PCI device */
350 const struct cx18_card *card; /* card information */
351 const char *card_name; /* full name of the card */
352 const struct cx18_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */
357 u8 nof_inputs; /* number of video inputs */
358 u8 nof_audio_inputs; /* number of audio inputs */
359 u16 buffer_id; /* buffer ID counter */
360 u32 v4l2_cap; /* V4L2 capabilities of card */
361 u32 hw_flags; /* Hardware description of the board */
363 struct cx18_scb __iomem *scb; /* pointer to SCB */
365 struct cx18_av_state av_state;
368 struct cx2341x_mpeg_params params;
370 u32 temporal_strength;
371 u32 spatial_strength;
374 unsigned long dualwatch_jiffies;
375 u16 dualwatch_stereo_mode;
378 int digitizer; /* 0x00EF = saa7114 0x00FO = saa7115 0x0106 = mic */
380 struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */
381 struct cx18_options options; /* User options */
382 int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */
383 struct cx18_stream streams[CX18_MAX_STREAMS]; /* Stream data */
384 unsigned long i_flags; /* global cx18 flags */
385 atomic_t ana_capturing; /* count number of active analog capture streams */
386 atomic_t tot_capturing; /* total count number of active capture streams */
387 spinlock_t lock; /* lock access to this struct */
388 int search_pack_header;
390 spinlock_t dma_reg_lock; /* lock access to DMA engine registers */
392 int open_id; /* incremented each time an open occurs, used as
393 unique ID. Starts at 1, so 0 can be used as
394 uninitialized value in the stream->id. */
397 struct v4l2_prio_state prio;
400 void __iomem *enc_mem, *reg_mem;
406 u32 pgm_info_write_idx;
407 u32 pgm_info_read_idx;
408 struct v4l2_enc_idx_entry pgm_info[CX18_MAX_PGM_INDEX];
410 u64 mpg_data_received;
411 u64 vbi_data_inserted;
413 wait_queue_head_t mb_apu_waitq;
414 wait_queue_head_t mb_cpu_waitq;
415 wait_queue_head_t mb_epu_waitq;
416 wait_queue_head_t mb_hpu_waitq;
417 wait_queue_head_t cap_w;
418 /* when the current DMA is finished this queue is woken up */
419 wait_queue_head_t dma_waitq;
422 struct i2c_adapter i2c_adap[2];
423 struct i2c_algo_bit_data i2c_algo[2];
424 struct cx18_i2c_algo_callback_data i2c_algo_cb_data[2];
425 struct i2c_client i2c_client[2];
426 struct mutex i2c_bus_lock[2];
427 struct i2c_client *i2c_clients[I2C_CLIENTS_MAX];
433 /* v4l2 and User settings */
440 v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */
444 extern struct cx18 *cx18_cards[];
445 extern int cx18_cards_active;
446 extern int cx18_first_minor;
447 extern spinlock_t cx18_cards_lock;
449 /*==============Prototypes==================*/
451 /* Return non-zero if a signal is pending */
452 int cx18_msleep_timeout(unsigned int msecs, int intr);
454 /* Read Hauppauge eeprom */
455 struct tveeprom; /* forward reference */
456 void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv);
458 /* First-open initialization: load firmware, etc. */
459 int cx18_init_on_first_open(struct cx18 *cx);
461 /* This is a PCI post thing, where if the pci register is not read, then
462 the write doesn't always take effect right away. By reading back the
463 register any pending PCI writes will be performed (in order), and so
464 you can be sure that the writes are guaranteed to be done.
466 Rarely needed, only in some timing sensitive cases.
467 Apparently if this is not done some motherboards seem
468 to kill the firmware and get into the broken state until computer is
470 #define write_sync(val, reg) \
471 do { writel(val, reg); readl(reg); } while (0)
473 #define read_reg(reg) readl(cx->reg_mem + (reg))
474 #define write_reg(val, reg) writel(val, cx->reg_mem + (reg))
475 #define write_reg_sync(val, reg) \
476 do { write_reg(val, reg); read_reg(reg); } while (0)
478 #define read_enc(addr) readl(cx->enc_mem + (u32)(addr))
479 #define write_enc(val, addr) writel(val, cx->enc_mem + (u32)(addr))
480 #define write_enc_sync(val, addr) \
481 do { write_enc(val, addr); read_enc(addr); } while (0)
483 #define sw1_irq_enable(val) do { \
484 write_reg(val, SW1_INT_STATUS); \
485 write_reg(read_reg(SW1_INT_ENABLE_PCI) | (val), SW1_INT_ENABLE_PCI); \
488 #define sw1_irq_disable(val) \
489 write_reg(read_reg(SW1_INT_ENABLE_PCI) & ~(val), SW1_INT_ENABLE_PCI);
491 #define sw2_irq_enable(val) do { \
492 write_reg(val, SW2_INT_STATUS); \
493 write_reg(read_reg(SW2_INT_ENABLE_PCI) | (val), SW2_INT_ENABLE_PCI); \
496 #define sw2_irq_disable(val) \
497 write_reg(read_reg(SW2_INT_ENABLE_PCI) & ~(val), SW2_INT_ENABLE_PCI);
499 #define setup_page(addr) do { \
500 u32 val = read_reg(0xD000F8) & ~0x1f00; \
501 write_reg(val | (((addr) >> 17) & 0x1f00), 0xD000F8); \
504 #endif /* CX18_DRIVER_H */