2 tda18271.c - driver for the Philips / NXP TDA18271 silicon tuner
4 Copyright (C) 2007 Michael Krufky (mkrufky@linuxtv.org)
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include <linux/i2c.h>
22 #include <linux/delay.h>
23 #include <linux/videodev2.h>
24 #include "tuner-driver.h"
29 module_param(debug, int, 0644);
30 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
32 #define dprintk(level, fmt, arg...) do {\
34 printk(KERN_DEBUG "%s: " fmt, __FUNCTION__, ##arg); } while (0)
36 #define R_ID 0x00 /* ID byte */
37 #define R_TM 0x01 /* Thermo byte */
38 #define R_PL 0x02 /* Power level byte */
39 #define R_EP1 0x03 /* Easy Prog byte 1 */
40 #define R_EP2 0x04 /* Easy Prog byte 2 */
41 #define R_EP3 0x05 /* Easy Prog byte 3 */
42 #define R_EP4 0x06 /* Easy Prog byte 4 */
43 #define R_EP5 0x07 /* Easy Prog byte 5 */
44 #define R_CPD 0x08 /* Cal Post-Divider byte */
45 #define R_CD1 0x09 /* Cal Divider byte 1 */
46 #define R_CD2 0x0a /* Cal Divider byte 2 */
47 #define R_CD3 0x0b /* Cal Divider byte 3 */
48 #define R_MPD 0x0c /* Main Post-Divider byte */
49 #define R_MD1 0x0d /* Main Divider byte 1 */
50 #define R_MD2 0x0e /* Main Divider byte 2 */
51 #define R_MD3 0x0f /* Main Divider byte 3 */
52 #define R_EB1 0x10 /* Extended byte 1 */
53 #define R_EB2 0x11 /* Extended byte 2 */
54 #define R_EB3 0x12 /* Extended byte 3 */
55 #define R_EB4 0x13 /* Extended byte 4 */
56 #define R_EB5 0x14 /* Extended byte 5 */
57 #define R_EB6 0x15 /* Extended byte 6 */
58 #define R_EB7 0x16 /* Extended byte 7 */
59 #define R_EB8 0x17 /* Extended byte 8 */
60 #define R_EB9 0x18 /* Extended byte 9 */
61 #define R_EB10 0x19 /* Extended byte 10 */
62 #define R_EB11 0x1a /* Extended byte 11 */
63 #define R_EB12 0x1b /* Extended byte 12 */
64 #define R_EB13 0x1c /* Extended byte 13 */
65 #define R_EB14 0x1d /* Extended byte 14 */
66 #define R_EB15 0x1e /* Extended byte 15 */
67 #define R_EB16 0x1f /* Extended byte 16 */
68 #define R_EB17 0x20 /* Extended byte 17 */
69 #define R_EB18 0x21 /* Extended byte 18 */
70 #define R_EB19 0x22 /* Extended byte 19 */
71 #define R_EB20 0x23 /* Extended byte 20 */
72 #define R_EB21 0x24 /* Extended byte 21 */
73 #define R_EB22 0x25 /* Extended byte 22 */
74 #define R_EB23 0x26 /* Extended byte 23 */
76 struct tda18271_pll_map {
82 static struct tda18271_pll_map tda18271_main_pll[] = {
83 { .lomax = 32000, .pd = 0x5f, .d = 0xf0 },
84 { .lomax = 35000, .pd = 0x5e, .d = 0xe0 },
85 { .lomax = 37000, .pd = 0x5d, .d = 0xd0 },
86 { .lomax = 41000, .pd = 0x5c, .d = 0xc0 },
87 { .lomax = 44000, .pd = 0x5b, .d = 0xb0 },
88 { .lomax = 49000, .pd = 0x5a, .d = 0xa0 },
89 { .lomax = 54000, .pd = 0x59, .d = 0x90 },
90 { .lomax = 61000, .pd = 0x58, .d = 0x80 },
91 { .lomax = 65000, .pd = 0x4f, .d = 0x78 },
92 { .lomax = 70000, .pd = 0x4e, .d = 0x70 },
93 { .lomax = 75000, .pd = 0x4d, .d = 0x68 },
94 { .lomax = 82000, .pd = 0x4c, .d = 0x60 },
95 { .lomax = 89000, .pd = 0x4b, .d = 0x58 },
96 { .lomax = 98000, .pd = 0x4a, .d = 0x50 },
97 { .lomax = 109000, .pd = 0x49, .d = 0x48 },
98 { .lomax = 123000, .pd = 0x48, .d = 0x40 },
99 { .lomax = 131000, .pd = 0x3f, .d = 0x3c },
100 { .lomax = 141000, .pd = 0x3e, .d = 0x38 },
101 { .lomax = 151000, .pd = 0x3d, .d = 0x34 },
102 { .lomax = 164000, .pd = 0x3c, .d = 0x30 },
103 { .lomax = 179000, .pd = 0x3b, .d = 0x2c },
104 { .lomax = 197000, .pd = 0x3a, .d = 0x28 },
105 { .lomax = 219000, .pd = 0x39, .d = 0x24 },
106 { .lomax = 246000, .pd = 0x38, .d = 0x20 },
107 { .lomax = 263000, .pd = 0x2f, .d = 0x1e },
108 { .lomax = 282000, .pd = 0x2e, .d = 0x1c },
109 { .lomax = 303000, .pd = 0x2d, .d = 0x1a },
110 { .lomax = 329000, .pd = 0x2c, .d = 0x18 },
111 { .lomax = 359000, .pd = 0x2b, .d = 0x16 },
112 { .lomax = 395000, .pd = 0x2a, .d = 0x14 },
113 { .lomax = 438000, .pd = 0x29, .d = 0x12 },
114 { .lomax = 493000, .pd = 0x28, .d = 0x10 },
115 { .lomax = 526000, .pd = 0x1f, .d = 0x0f },
116 { .lomax = 564000, .pd = 0x1e, .d = 0x0e },
117 { .lomax = 607000, .pd = 0x1d, .d = 0x0d },
118 { .lomax = 658000, .pd = 0x1c, .d = 0x0c },
119 { .lomax = 718000, .pd = 0x1b, .d = 0x0b },
120 { .lomax = 790000, .pd = 0x1a, .d = 0x0a },
121 { .lomax = 877000, .pd = 0x19, .d = 0x09 },
122 { .lomax = 987000, .pd = 0x18, .d = 0x08 },
123 { .lomax = 0, .pd = 0x00, .d = 0x00 }, /* end */
126 static struct tda18271_pll_map tda18271_cal_pll[] = {
127 { .lomax = 33000, .pd = 0xdd, .d = 0xd0 },
128 { .lomax = 36000, .pd = 0xdc, .d = 0xc0 },
129 { .lomax = 40000, .pd = 0xdb, .d = 0xb0 },
130 { .lomax = 44000, .pd = 0xda, .d = 0xa0 },
131 { .lomax = 49000, .pd = 0xd9, .d = 0x90 },
132 { .lomax = 55000, .pd = 0xd8, .d = 0x80 },
133 { .lomax = 63000, .pd = 0xd3, .d = 0x70 },
134 { .lomax = 67000, .pd = 0xcd, .d = 0x68 },
135 { .lomax = 73000, .pd = 0xcc, .d = 0x60 },
136 { .lomax = 80000, .pd = 0xcb, .d = 0x58 },
137 { .lomax = 88000, .pd = 0xca, .d = 0x50 },
138 { .lomax = 98000, .pd = 0xc9, .d = 0x48 },
139 { .lomax = 110000, .pd = 0xc8, .d = 0x40 },
140 { .lomax = 126000, .pd = 0xc3, .d = 0x38 },
141 { .lomax = 135000, .pd = 0xbd, .d = 0x34 },
142 { .lomax = 147000, .pd = 0xbc, .d = 0x30 },
143 { .lomax = 160000, .pd = 0xbb, .d = 0x2c },
144 { .lomax = 176000, .pd = 0xba, .d = 0x28 },
145 { .lomax = 196000, .pd = 0xb9, .d = 0x24 },
146 { .lomax = 220000, .pd = 0xb8, .d = 0x20 },
147 { .lomax = 252000, .pd = 0xb3, .d = 0x1c },
148 { .lomax = 271000, .pd = 0xad, .d = 0x1a },
149 { .lomax = 294000, .pd = 0xac, .d = 0x18 },
150 { .lomax = 321000, .pd = 0xab, .d = 0x16 },
151 { .lomax = 353000, .pd = 0xaa, .d = 0x14 },
152 { .lomax = 392000, .pd = 0xa9, .d = 0x12 },
153 { .lomax = 441000, .pd = 0xa8, .d = 0x10 },
154 { .lomax = 505000, .pd = 0xa3, .d = 0x0e },
155 { .lomax = 543000, .pd = 0x9d, .d = 0x0d },
156 { .lomax = 589000, .pd = 0x9c, .d = 0x0c },
157 { .lomax = 642000, .pd = 0x9b, .d = 0x0b },
158 { .lomax = 707000, .pd = 0x9a, .d = 0x0a },
159 { .lomax = 785000, .pd = 0x99, .d = 0x09 },
160 { .lomax = 883000, .pd = 0x98, .d = 0x08 },
161 { .lomax = 1010000, .pd = 0x93, .d = 0x07 },
162 { .lomax = 0, .pd = 0x00, .d = 0x00 }, /* end */
165 struct tda18271_map {
170 static struct tda18271_map tda18271_bp_filter[] = {
171 { .rfmax = 62000, .val = 0x00 },
172 { .rfmax = 84000, .val = 0x01 },
173 { .rfmax = 100000, .val = 0x02 },
174 { .rfmax = 140000, .val = 0x03 },
175 { .rfmax = 170000, .val = 0x04 },
176 { .rfmax = 180000, .val = 0x05 },
177 { .rfmax = 865000, .val = 0x06 },
178 { .rfmax = 0, .val = 0x00 }, /* end */
181 static struct tda18271_map tda18271_km[] = {
182 { .rfmax = 61100, .val = 0x74 },
183 { .rfmax = 350000, .val = 0x40 },
184 { .rfmax = 720000, .val = 0x30 },
185 { .rfmax = 865000, .val = 0x40 },
186 { .rfmax = 0, .val = 0x00 }, /* end */
189 static struct tda18271_map tda18271_rf_band[] = {
190 { .rfmax = 47900, .val = 0x00 },
191 { .rfmax = 61100, .val = 0x01 },
192 /* { .rfmax = 152600, .val = 0x02 }, */
193 { .rfmax = 121200, .val = 0x02 },
194 { .rfmax = 164700, .val = 0x03 },
195 { .rfmax = 203500, .val = 0x04 },
196 { .rfmax = 457800, .val = 0x05 },
197 { .rfmax = 865000, .val = 0x06 },
198 { .rfmax = 0, .val = 0x00 }, /* end */
201 static struct tda18271_map tda18271_gain_taper[] = {
202 { .rfmax = 45400, .val = 0x1f },
203 { .rfmax = 45800, .val = 0x1e },
204 { .rfmax = 46200, .val = 0x1d },
205 { .rfmax = 46700, .val = 0x1c },
206 { .rfmax = 47100, .val = 0x1b },
207 { .rfmax = 47500, .val = 0x1a },
208 { .rfmax = 47900, .val = 0x19 },
209 { .rfmax = 49600, .val = 0x17 },
210 { .rfmax = 51200, .val = 0x16 },
211 { .rfmax = 52900, .val = 0x15 },
212 { .rfmax = 54500, .val = 0x14 },
213 { .rfmax = 56200, .val = 0x13 },
214 { .rfmax = 57800, .val = 0x12 },
215 { .rfmax = 59500, .val = 0x11 },
216 { .rfmax = 61100, .val = 0x10 },
217 { .rfmax = 67600, .val = 0x0d },
218 { .rfmax = 74200, .val = 0x0c },
219 { .rfmax = 80700, .val = 0x0b },
220 { .rfmax = 87200, .val = 0x0a },
221 { .rfmax = 93800, .val = 0x09 },
222 { .rfmax = 100300, .val = 0x08 },
223 { .rfmax = 106900, .val = 0x07 },
224 { .rfmax = 113400, .val = 0x06 },
225 { .rfmax = 119900, .val = 0x05 },
226 { .rfmax = 126500, .val = 0x04 },
227 { .rfmax = 133000, .val = 0x03 },
228 { .rfmax = 139500, .val = 0x02 },
229 { .rfmax = 146100, .val = 0x01 },
230 { .rfmax = 152600, .val = 0x00 },
231 { .rfmax = 154300, .val = 0x1f },
232 { .rfmax = 156100, .val = 0x1e },
233 { .rfmax = 157800, .val = 0x1d },
234 { .rfmax = 159500, .val = 0x1c },
235 { .rfmax = 161200, .val = 0x1b },
236 { .rfmax = 163000, .val = 0x1a },
237 { .rfmax = 164700, .val = 0x19 },
238 { .rfmax = 170200, .val = 0x17 },
239 { .rfmax = 175800, .val = 0x16 },
240 { .rfmax = 181300, .val = 0x15 },
241 { .rfmax = 186900, .val = 0x14 },
242 { .rfmax = 192400, .val = 0x13 },
243 { .rfmax = 198000, .val = 0x12 },
244 { .rfmax = 203500, .val = 0x11 },
245 { .rfmax = 216200, .val = 0x14 },
246 { .rfmax = 228900, .val = 0x13 },
247 { .rfmax = 241600, .val = 0x12 },
248 { .rfmax = 254400, .val = 0x11 },
249 { .rfmax = 267100, .val = 0x10 },
250 { .rfmax = 279800, .val = 0x0f },
251 { .rfmax = 292500, .val = 0x0e },
252 { .rfmax = 305200, .val = 0x0d },
253 { .rfmax = 317900, .val = 0x0c },
254 { .rfmax = 330700, .val = 0x0b },
255 { .rfmax = 343400, .val = 0x0a },
256 { .rfmax = 356100, .val = 0x09 },
257 { .rfmax = 368800, .val = 0x08 },
258 { .rfmax = 381500, .val = 0x07 },
259 { .rfmax = 394200, .val = 0x06 },
260 { .rfmax = 406900, .val = 0x05 },
261 { .rfmax = 419700, .val = 0x04 },
262 { .rfmax = 432400, .val = 0x03 },
263 { .rfmax = 445100, .val = 0x02 },
264 { .rfmax = 457800, .val = 0x01 },
265 { .rfmax = 476300, .val = 0x19 },
266 { .rfmax = 494800, .val = 0x18 },
267 { .rfmax = 513300, .val = 0x17 },
268 { .rfmax = 531800, .val = 0x16 },
269 { .rfmax = 550300, .val = 0x15 },
270 { .rfmax = 568900, .val = 0x14 },
271 { .rfmax = 587400, .val = 0x13 },
272 { .rfmax = 605900, .val = 0x12 },
273 { .rfmax = 624400, .val = 0x11 },
274 { .rfmax = 642900, .val = 0x10 },
275 { .rfmax = 661400, .val = 0x0f },
276 { .rfmax = 679900, .val = 0x0e },
277 { .rfmax = 698400, .val = 0x0d },
278 { .rfmax = 716900, .val = 0x0c },
279 { .rfmax = 735400, .val = 0x0b },
280 { .rfmax = 753900, .val = 0x0a },
281 { .rfmax = 772500, .val = 0x09 },
282 { .rfmax = 791000, .val = 0x08 },
283 { .rfmax = 809500, .val = 0x07 },
284 { .rfmax = 828000, .val = 0x06 },
285 { .rfmax = 846500, .val = 0x05 },
286 { .rfmax = 865000, .val = 0x04 },
287 { .rfmax = 0, .val = 0x00 }, /* end */
290 static struct tda18271_map tda18271_rf_cal[] = {
291 { .rfmax = 41000, .val = 0x1e },
292 { .rfmax = 43000, .val = 0x30 },
293 { .rfmax = 45000, .val = 0x43 },
294 { .rfmax = 46000, .val = 0x4d },
295 { .rfmax = 47000, .val = 0x54 },
296 { .rfmax = 47900, .val = 0x64 },
297 { .rfmax = 49100, .val = 0x20 },
298 { .rfmax = 50000, .val = 0x22 },
299 { .rfmax = 51000, .val = 0x2a },
300 { .rfmax = 53000, .val = 0x32 },
301 { .rfmax = 55000, .val = 0x35 },
302 { .rfmax = 56000, .val = 0x3c },
303 { .rfmax = 57000, .val = 0x3f },
304 { .rfmax = 58000, .val = 0x48 },
305 { .rfmax = 59000, .val = 0x4d },
306 { .rfmax = 60000, .val = 0x58 },
307 { .rfmax = 61100, .val = 0x5f },
308 { .rfmax = 0, .val = 0x00 }, /* end */
311 /*---------------------------------------------------------------------*/
313 #define TDA18271_NUM_REGS 39
315 #define TDA18271_ANALOG 0
316 #define TDA18271_DIGITAL 1
318 struct tda18271_priv {
320 struct i2c_adapter *i2c_adap;
321 unsigned char tda18271_regs[TDA18271_NUM_REGS];
328 static int tda18271_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
330 struct tda18271_priv *priv = fe->tuner_priv;
331 struct analog_tuner_ops *ops = fe->ops.analog_demod_ops;
334 switch (priv->mode) {
335 case TDA18271_ANALOG:
336 if (ops && ops->i2c_gate_ctrl)
337 ret = ops->i2c_gate_ctrl(fe, enable);
339 case TDA18271_DIGITAL:
340 if (fe->ops.i2c_gate_ctrl)
341 ret = fe->ops.i2c_gate_ctrl(fe, enable);
348 /*---------------------------------------------------------------------*/
350 static void tda18271_dump_regs(struct dvb_frontend *fe)
352 struct tda18271_priv *priv = fe->tuner_priv;
353 unsigned char *regs = priv->tda18271_regs;
355 dprintk(1, "=== TDA18271 REG DUMP ===\n");
356 dprintk(1, "ID_BYTE = 0x%x\n", 0xff & regs[R_ID]);
357 dprintk(1, "THERMO_BYTE = 0x%x\n", 0xff & regs[R_TM]);
358 dprintk(1, "POWER_LEVEL_BYTE = 0x%x\n", 0xff & regs[R_PL]);
359 dprintk(1, "EASY_PROG_BYTE_1 = 0x%x\n", 0xff & regs[R_EP1]);
360 dprintk(1, "EASY_PROG_BYTE_2 = 0x%x\n", 0xff & regs[R_EP2]);
361 dprintk(1, "EASY_PROG_BYTE_3 = 0x%x\n", 0xff & regs[R_EP3]);
362 dprintk(1, "EASY_PROG_BYTE_4 = 0x%x\n", 0xff & regs[R_EP4]);
363 dprintk(1, "EASY_PROG_BYTE_5 = 0x%x\n", 0xff & regs[R_EP5]);
364 dprintk(1, "CAL_POST_DIV_BYTE = 0x%x\n", 0xff & regs[R_CPD]);
365 dprintk(1, "CAL_DIV_BYTE_1 = 0x%x\n", 0xff & regs[R_CD1]);
366 dprintk(1, "CAL_DIV_BYTE_2 = 0x%x\n", 0xff & regs[R_CD2]);
367 dprintk(1, "CAL_DIV_BYTE_3 = 0x%x\n", 0xff & regs[R_CD3]);
368 dprintk(1, "MAIN_POST_DIV_BYTE = 0x%x\n", 0xff & regs[R_MPD]);
369 dprintk(1, "MAIN_DIV_BYTE_1 = 0x%x\n", 0xff & regs[R_MD1]);
370 dprintk(1, "MAIN_DIV_BYTE_2 = 0x%x\n", 0xff & regs[R_MD2]);
371 dprintk(1, "MAIN_DIV_BYTE_3 = 0x%x\n", 0xff & regs[R_MD3]);
374 static void tda18271_read_regs(struct dvb_frontend *fe)
376 struct tda18271_priv *priv = fe->tuner_priv;
377 unsigned char *regs = priv->tda18271_regs;
378 unsigned char buf = 0x00;
380 struct i2c_msg msg[] = {
381 { .addr = priv->i2c_addr, .flags = 0,
382 .buf = &buf, .len = 1 },
383 { .addr = priv->i2c_addr, .flags = I2C_M_RD,
384 .buf = regs, .len = 16 }
387 tda18271_i2c_gate_ctrl(fe, 1);
389 /* read all registers */
390 ret = i2c_transfer(priv->i2c_adap, msg, 2);
392 tda18271_i2c_gate_ctrl(fe, 0);
395 printk("ERROR: %s: i2c_transfer returned: %d\n",
399 tda18271_dump_regs(fe);
402 static void tda18271_write_regs(struct dvb_frontend *fe, int idx, int len)
404 struct tda18271_priv *priv = fe->tuner_priv;
405 unsigned char *regs = priv->tda18271_regs;
406 unsigned char buf[TDA18271_NUM_REGS+1];
407 struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
408 .buf = buf, .len = len+1 };
411 BUG_ON((len == 0) || (idx+len > sizeof(buf)));
414 for (i = 1; i <= len; i++) {
415 buf[i] = regs[idx-1+i];
418 tda18271_i2c_gate_ctrl(fe, 1);
420 /* write registers */
421 ret = i2c_transfer(priv->i2c_adap, &msg, 1);
423 tda18271_i2c_gate_ctrl(fe, 0);
426 printk(KERN_WARNING "ERROR: %s: i2c_transfer returned: %d\n",
430 /*---------------------------------------------------------------------*/
432 static int tda18271_init_regs(struct dvb_frontend *fe)
434 struct tda18271_priv *priv = fe->tuner_priv;
435 unsigned char *regs = priv->tda18271_regs;
437 printk(KERN_INFO "tda18271: initializing registers\n");
439 /* initialize registers */
480 tda18271_write_regs(fe, 0x00, TDA18271_NUM_REGS);
481 /* setup AGC1 & AGC2 */
483 tda18271_write_regs(fe, R_EB17, 1);
485 tda18271_write_regs(fe, R_EB17, 1);
487 tda18271_write_regs(fe, R_EB17, 1);
489 tda18271_write_regs(fe, R_EB17, 1);
492 tda18271_write_regs(fe, R_EB20, 1);
494 tda18271_write_regs(fe, R_EB20, 1);
496 tda18271_write_regs(fe, R_EB20, 1);
498 tda18271_write_regs(fe, R_EB20, 1);
500 /* image rejection calibration */
515 tda18271_write_regs(fe, R_EP3, 11);
516 msleep(5); /* pll locking */
519 tda18271_write_regs(fe, R_EP1, 1);
520 msleep(5); /* wanted low measurement */
530 tda18271_write_regs(fe, R_EP3, 7);
531 msleep(5); /* pll locking */
534 tda18271_write_regs(fe, R_EP2, 1);
535 msleep(30); /* image low optimization completion */
550 tda18271_write_regs(fe, R_EP3, 11);
551 msleep(5); /* pll locking */
554 tda18271_write_regs(fe, R_EP1, 1);
555 msleep(5); /* wanted mid measurement */
565 tda18271_write_regs(fe, R_EP3, 7);
566 msleep(5); /* pll locking */
569 tda18271_write_regs(fe, R_EP2, 1);
570 msleep(30); /* image mid optimization completion */
585 tda18271_write_regs(fe, R_EP3, 11);
586 msleep(5); /* pll locking */
589 tda18271_write_regs(fe, R_EP1, 1);
590 msleep(5); /* wanted high measurement */
600 tda18271_write_regs(fe, R_EP3, 7);
601 msleep(5); /* pll locking */
605 tda18271_write_regs(fe, R_EP2, 1);
606 msleep(30); /* image high optimization completion */
609 tda18271_write_regs(fe, R_EP4, 1);
612 tda18271_write_regs(fe, R_EP1, 1);
617 static int tda18271_tune(struct dvb_frontend *fe,
618 u32 ifc, u32 freq, u32 bw, u8 std)
620 struct tda18271_priv *priv = fe->tuner_priv;
621 unsigned char *regs = priv->tda18271_regs;
625 tda18271_read_regs(fe);
627 /* test IR_CAL_OK to see if we need init */
628 if ((regs[R_EP1] & 0x08) == 0)
629 tda18271_init_regs(fe);
632 dprintk(1, "freq = %d, ifc = %d\n", freq, ifc);
634 /* RF tracking filter calibration */
636 /* calculate BP_Filter */
638 while ((tda18271_bp_filter[i].rfmax * 1000) < freq) {
639 if (tda18271_bp_filter[i + 1].rfmax == 0)
643 dprintk(2, "bp filter = 0x%x, i = %d\n", tda18271_bp_filter[i].val, i);
645 regs[R_EP1] &= ~0x07; /* clear bp filter bits */
646 regs[R_EP1] |= tda18271_bp_filter[i].val;
647 tda18271_write_regs(fe, R_EP1, 1);
651 tda18271_write_regs(fe, R_EB4, 1);
654 tda18271_write_regs(fe, R_EB7, 1);
657 tda18271_write_regs(fe, R_EB14, 1);
660 tda18271_write_regs(fe, R_EB20, 1);
662 /* set CAL mode to RF tracking filter calibration */
665 /* calculate CAL PLL */
667 switch (priv->mode) {
668 case TDA18271_ANALOG:
671 case TDA18271_DIGITAL:
677 while ((tda18271_cal_pll[i].lomax * 1000) < N) {
678 if (tda18271_cal_pll[i + 1].lomax == 0)
682 dprintk(2, "cal pll, pd = 0x%x, d = 0x%x, i = %d\n",
683 tda18271_cal_pll[i].pd, tda18271_cal_pll[i].d, i);
685 regs[R_CPD] = tda18271_cal_pll[i].pd;
687 div = ((tda18271_cal_pll[i].d * (N / 1000)) << 7) / 125;
688 regs[R_CD1] = 0xff & (div >> 16);
689 regs[R_CD2] = 0xff & (div >> 8);
690 regs[R_CD3] = 0xff & div;
692 /* calculate MAIN PLL */
694 switch (priv->mode) {
695 case TDA18271_ANALOG:
698 case TDA18271_DIGITAL:
699 N = freq + bw / 2 + 1000000;
704 while ((tda18271_main_pll[i].lomax * 1000) < N) {
705 if (tda18271_main_pll[i + 1].lomax == 0)
709 dprintk(2, "main pll, pd = 0x%x, d = 0x%x, i = %d\n",
710 tda18271_main_pll[i].pd, tda18271_main_pll[i].d, i);
712 regs[R_MPD] = (0x7f & tda18271_main_pll[i].pd);
714 switch (priv->mode) {
715 case TDA18271_ANALOG:
716 regs[R_MPD] &= ~0x08;
718 case TDA18271_DIGITAL:
723 div = ((tda18271_main_pll[i].d * (N / 1000)) << 7) / 125;
724 regs[R_MD1] = 0xff & (div >> 16);
725 regs[R_MD2] = 0xff & (div >> 8);
726 regs[R_MD3] = 0xff & div;
728 tda18271_write_regs(fe, R_EP3, 11);
729 msleep(5); /* RF tracking filter calibration initialization */
731 /* search for K,M,CO for RF Calibration */
733 while ((tda18271_km[i].rfmax * 1000) < freq) {
734 if (tda18271_km[i + 1].rfmax == 0)
738 dprintk(2, "km = 0x%x, i = %d\n", tda18271_km[i].val, i);
740 regs[R_EB13] &= 0x83;
741 regs[R_EB13] |= tda18271_km[i].val;
742 tda18271_write_regs(fe, R_EB13, 1);
744 /* search for RF_BAND */
746 while ((tda18271_rf_band[i].rfmax * 1000) < freq) {
747 if (tda18271_rf_band[i + 1].rfmax == 0)
751 dprintk(2, "rf band = 0x%x, i = %d\n", tda18271_rf_band[i].val, i);
753 regs[R_EP2] &= ~0xe0; /* clear rf band bits */
754 regs[R_EP2] |= (tda18271_rf_band[i].val << 5);
756 /* search for Gain_Taper */
758 while ((tda18271_gain_taper[i].rfmax * 1000) < freq) {
759 if (tda18271_gain_taper[i + 1].rfmax == 0)
763 dprintk(2, "gain taper = 0x%x, i = %d\n",
764 tda18271_gain_taper[i].val, i);
766 regs[R_EP2] &= ~0x1f; /* clear gain taper bits */
767 regs[R_EP2] |= tda18271_gain_taper[i].val;
769 tda18271_write_regs(fe, R_EP2, 1);
770 tda18271_write_regs(fe, R_EP1, 1);
771 tda18271_write_regs(fe, R_EP2, 1);
772 tda18271_write_regs(fe, R_EP1, 1);
776 tda18271_write_regs(fe, R_EB4, 1);
779 tda18271_write_regs(fe, R_EB7, 1);
783 tda18271_write_regs(fe, R_EB20, 1);
784 msleep(60); /* RF tracking filter calibration completion */
786 regs[R_EP4] &= ~0x03; /* set cal mode to normal */
787 tda18271_write_regs(fe, R_EP4, 1);
789 tda18271_write_regs(fe, R_EP1, 1);
791 /* RF tracking filer correction for VHF_Low band */
793 while ((tda18271_rf_cal[i].rfmax * 1000) < freq) {
794 if (tda18271_rf_cal[i].rfmax == 0)
798 dprintk(2, "rf cal = 0x%x, i = %d\n", tda18271_rf_cal[i].val, i);
800 /* VHF_Low band only */
801 if (tda18271_rf_cal[i].rfmax != 0) {
802 regs[R_EB14] = tda18271_rf_cal[i].val;
803 tda18271_write_regs(fe, R_EB14, 1);
806 /* Channel Configuration */
808 switch (priv->mode) {
809 case TDA18271_ANALOG:
812 case TDA18271_DIGITAL:
816 tda18271_write_regs(fe, R_EB22, 1);
818 regs[R_EP1] |= 0x40; /* set dis power level on */
821 regs[R_EP3] &= ~0x1f; /* clear std bits */
836 regs[R_EP4] &= ~0x03; /* set cal mode to normal */
838 regs[R_EP4] &= ~0x1c; /* clear if level bits */
839 switch (priv->mode) {
840 case TDA18271_ANALOG:
841 regs[R_MPD] &= ~0x80; /* IF notch = 0 */
843 case TDA18271_DIGITAL:
849 regs[R_EP4] &= ~0x80; /* turn this bit on only for fm */
851 /* FIXME: image rejection validity EP5[2:0] */
853 /* calculate MAIN PLL */
857 while ((tda18271_main_pll[i].lomax * 1000) < N) {
858 if (tda18271_main_pll[i + 1].lomax == 0)
862 dprintk(2, "main pll, pd = 0x%x, d = 0x%x, i = %d\n",
863 tda18271_main_pll[i].pd, tda18271_main_pll[i].d, i);
865 regs[R_MPD] = (0x7f & tda18271_main_pll[i].pd);
866 switch (priv->mode) {
867 case TDA18271_ANALOG:
868 regs[R_MPD] &= ~0x08;
870 case TDA18271_DIGITAL:
875 div = ((tda18271_main_pll[i].d * (N / 1000)) << 7) / 125;
876 regs[R_MD1] = 0xff & (div >> 16);
877 regs[R_MD2] = 0xff & (div >> 8);
878 regs[R_MD3] = 0xff & div;
880 tda18271_write_regs(fe, R_TM, 15);
885 /* ------------------------------------------------------------------ */
887 static int tda18271_set_params(struct dvb_frontend *fe,
888 struct dvb_frontend_parameters *params)
890 struct tda18271_priv *priv = fe->tuner_priv;
894 u32 freq = params->frequency;
896 priv->mode = TDA18271_DIGITAL;
899 if (fe->ops.info.type == FE_ATSC) {
900 switch (params->u.vsb.modulation) {
903 std = 0x1b; /* device-specific (spec says 0x1c) */
908 std = 0x18; /* device-specific (spec says 0x1d) */
912 printk(KERN_WARNING "%s: modulation not set!\n",
916 freq += 1750000; /* Adjust to center (+1.75MHZ) */
918 } else if (fe->ops.info.type == FE_OFDM) {
919 switch (params->u.ofdm.bandwidth) {
920 case BANDWIDTH_6_MHZ:
924 case BANDWIDTH_7_MHZ:
928 case BANDWIDTH_8_MHZ:
933 printk(KERN_WARNING "%s: bandwidth not set!\n",
938 printk(KERN_WARNING "%s: modulation type not supported!\n",
943 return tda18271_tune(fe, sgIF, freq, bw, std);
946 static int tda18271_set_analog_params(struct dvb_frontend *fe,
947 struct analog_parameters *params)
949 struct tda18271_priv *priv = fe->tuner_priv;
954 priv->mode = TDA18271_ANALOG;
957 if (params->std & V4L2_STD_MN) {
961 } else if (params->std & V4L2_STD_B) {
965 } else if (params->std & V4L2_STD_GH) {
969 } else if (params->std & V4L2_STD_PAL_I) {
973 } else if (params->std & V4L2_STD_DK) {
977 } else if (params->std & V4L2_STD_SECAM_L) {
981 } else if (params->std & V4L2_STD_SECAM_LC) {
991 if (params->mode == V4L2_TUNER_RADIO)
992 sgIF = 88; /* if frequency is 5.5 MHz */
994 dprintk(1, "setting tda18271 to system %s\n", mode);
996 return tda18271_tune(fe, sgIF * 62500, params->frequency * 62500,
1000 static int tda18271_release(struct dvb_frontend *fe)
1002 kfree(fe->tuner_priv);
1003 fe->tuner_priv = NULL;
1007 static int tda18271_get_frequency(struct dvb_frontend *fe, u32 *frequency)
1009 struct tda18271_priv *priv = fe->tuner_priv;
1010 *frequency = priv->frequency;
1014 static int tda18271_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
1016 struct tda18271_priv *priv = fe->tuner_priv;
1017 *bandwidth = priv->bandwidth;
1021 static struct dvb_tuner_ops tda18271_tuner_ops = {
1023 .name = "NXP TDA18271HD",
1024 .frequency_min = 45000000,
1025 .frequency_max = 864000000,
1026 .frequency_step = 62500
1028 .init = tda18271_init_regs,
1029 .set_params = tda18271_set_params,
1030 .set_analog_params = tda18271_set_analog_params,
1031 .release = tda18271_release,
1032 .get_frequency = tda18271_get_frequency,
1033 .get_bandwidth = tda18271_get_bandwidth,
1036 struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
1037 struct i2c_adapter *i2c)
1039 struct tda18271_priv *priv = NULL;
1041 dprintk(1, "@ 0x%x\n", addr);
1042 priv = kzalloc(sizeof(struct tda18271_priv), GFP_KERNEL);
1046 priv->i2c_addr = addr;
1047 priv->i2c_adap = i2c;
1049 memcpy(&fe->ops.tuner_ops, &tda18271_tuner_ops,
1050 sizeof(struct dvb_tuner_ops));
1052 fe->tuner_priv = priv;
1056 EXPORT_SYMBOL_GPL(tda18271_attach);
1057 MODULE_DESCRIPTION("NXP TDA18271HD analog / digital tuner driver");
1058 MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
1059 MODULE_LICENSE("GPL");
1062 * Overrides for Emacs so that we follow Linus's tabbing style.
1063 * ---------------------------------------------------------------------------