2 tda18271-fe.c - driver for the Philips / NXP TDA18271 silicon tuner
4 Copyright (C) 2007 Michael Krufky (mkrufky@linuxtv.org)
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include <linux/delay.h>
22 #include <linux/videodev2.h>
23 #include "tda18271-priv.h"
26 module_param_named(debug, tda18271_debug, int, 0644);
27 MODULE_PARM_DESC(debug, "set debug level (info=1, map=2, reg=4 (or-able))");
29 /*---------------------------------------------------------------------*/
31 static int tda18271_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
33 struct tda18271_priv *priv = fe->tuner_priv;
34 enum tda18271_i2c_gate gate;
38 case TDA18271_GATE_DIGITAL:
39 case TDA18271_GATE_ANALOG:
42 case TDA18271_GATE_AUTO:
45 case TDA18271_DIGITAL:
46 gate = TDA18271_GATE_DIGITAL;
50 gate = TDA18271_GATE_ANALOG;
56 case TDA18271_GATE_ANALOG:
57 if (fe->ops.analog_ops.i2c_gate_ctrl)
58 ret = fe->ops.analog_ops.i2c_gate_ctrl(fe, enable);
60 case TDA18271_GATE_DIGITAL:
61 if (fe->ops.i2c_gate_ctrl)
62 ret = fe->ops.i2c_gate_ctrl(fe, enable);
72 /*---------------------------------------------------------------------*/
74 static void tda18271_dump_regs(struct dvb_frontend *fe)
76 struct tda18271_priv *priv = fe->tuner_priv;
77 unsigned char *regs = priv->tda18271_regs;
79 tda_reg("=== TDA18271 REG DUMP ===\n");
80 tda_reg("ID_BYTE = 0x%02x\n", 0xff & regs[R_ID]);
81 tda_reg("THERMO_BYTE = 0x%02x\n", 0xff & regs[R_TM]);
82 tda_reg("POWER_LEVEL_BYTE = 0x%02x\n", 0xff & regs[R_PL]);
83 tda_reg("EASY_PROG_BYTE_1 = 0x%02x\n", 0xff & regs[R_EP1]);
84 tda_reg("EASY_PROG_BYTE_2 = 0x%02x\n", 0xff & regs[R_EP2]);
85 tda_reg("EASY_PROG_BYTE_3 = 0x%02x\n", 0xff & regs[R_EP3]);
86 tda_reg("EASY_PROG_BYTE_4 = 0x%02x\n", 0xff & regs[R_EP4]);
87 tda_reg("EASY_PROG_BYTE_5 = 0x%02x\n", 0xff & regs[R_EP5]);
88 tda_reg("CAL_POST_DIV_BYTE = 0x%02x\n", 0xff & regs[R_CPD]);
89 tda_reg("CAL_DIV_BYTE_1 = 0x%02x\n", 0xff & regs[R_CD1]);
90 tda_reg("CAL_DIV_BYTE_2 = 0x%02x\n", 0xff & regs[R_CD2]);
91 tda_reg("CAL_DIV_BYTE_3 = 0x%02x\n", 0xff & regs[R_CD3]);
92 tda_reg("MAIN_POST_DIV_BYTE = 0x%02x\n", 0xff & regs[R_MPD]);
93 tda_reg("MAIN_DIV_BYTE_1 = 0x%02x\n", 0xff & regs[R_MD1]);
94 tda_reg("MAIN_DIV_BYTE_2 = 0x%02x\n", 0xff & regs[R_MD2]);
95 tda_reg("MAIN_DIV_BYTE_3 = 0x%02x\n", 0xff & regs[R_MD3]);
98 static void tda18271_read_regs(struct dvb_frontend *fe)
100 struct tda18271_priv *priv = fe->tuner_priv;
101 unsigned char *regs = priv->tda18271_regs;
102 unsigned char buf = 0x00;
104 struct i2c_msg msg[] = {
105 { .addr = priv->i2c_addr, .flags = 0,
106 .buf = &buf, .len = 1 },
107 { .addr = priv->i2c_addr, .flags = I2C_M_RD,
108 .buf = regs, .len = 16 }
111 tda18271_i2c_gate_ctrl(fe, 1);
113 /* read all registers */
114 ret = i2c_transfer(priv->i2c_adap, msg, 2);
116 tda18271_i2c_gate_ctrl(fe, 0);
119 tda_err("ERROR: i2c_transfer returned: %d\n", ret);
121 if (tda18271_debug & DBG_REG)
122 tda18271_dump_regs(fe);
125 static void tda18271_write_regs(struct dvb_frontend *fe, int idx, int len)
127 struct tda18271_priv *priv = fe->tuner_priv;
128 unsigned char *regs = priv->tda18271_regs;
129 unsigned char buf[TDA18271_NUM_REGS+1];
130 struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
131 .buf = buf, .len = len+1 };
134 BUG_ON((len == 0) || (idx+len > sizeof(buf)));
137 for (i = 1; i <= len; i++) {
138 buf[i] = regs[idx-1+i];
141 tda18271_i2c_gate_ctrl(fe, 1);
143 /* write registers */
144 ret = i2c_transfer(priv->i2c_adap, &msg, 1);
146 tda18271_i2c_gate_ctrl(fe, 0);
149 tda_err("ERROR: i2c_transfer returned: %d\n", ret);
152 /*---------------------------------------------------------------------*/
154 static int tda18271_init_regs(struct dvb_frontend *fe)
156 struct tda18271_priv *priv = fe->tuner_priv;
157 unsigned char *regs = priv->tda18271_regs;
159 tda_dbg("initializing registers for device @ %d-%04x\n",
160 i2c_adapter_id(priv->i2c_adap), priv->i2c_addr);
162 /* initialize registers */
203 tda18271_write_regs(fe, 0x00, TDA18271_NUM_REGS);
204 /* setup AGC1 & AGC2 */
206 tda18271_write_regs(fe, R_EB17, 1);
208 tda18271_write_regs(fe, R_EB17, 1);
210 tda18271_write_regs(fe, R_EB17, 1);
212 tda18271_write_regs(fe, R_EB17, 1);
215 tda18271_write_regs(fe, R_EB20, 1);
217 tda18271_write_regs(fe, R_EB20, 1);
219 tda18271_write_regs(fe, R_EB20, 1);
221 tda18271_write_regs(fe, R_EB20, 1);
223 /* image rejection calibration */
238 tda18271_write_regs(fe, R_EP3, 11);
239 msleep(5); /* pll locking */
242 tda18271_write_regs(fe, R_EP1, 1);
243 msleep(5); /* wanted low measurement */
253 tda18271_write_regs(fe, R_EP3, 7);
254 msleep(5); /* pll locking */
257 tda18271_write_regs(fe, R_EP2, 1);
258 msleep(30); /* image low optimization completion */
273 tda18271_write_regs(fe, R_EP3, 11);
274 msleep(5); /* pll locking */
277 tda18271_write_regs(fe, R_EP1, 1);
278 msleep(5); /* wanted mid measurement */
288 tda18271_write_regs(fe, R_EP3, 7);
289 msleep(5); /* pll locking */
292 tda18271_write_regs(fe, R_EP2, 1);
293 msleep(30); /* image mid optimization completion */
308 tda18271_write_regs(fe, R_EP3, 11);
309 msleep(5); /* pll locking */
312 tda18271_write_regs(fe, R_EP1, 1);
313 msleep(5); /* wanted high measurement */
323 tda18271_write_regs(fe, R_EP3, 7);
324 msleep(5); /* pll locking */
328 tda18271_write_regs(fe, R_EP2, 1);
329 msleep(30); /* image high optimization completion */
332 tda18271_write_regs(fe, R_EP4, 1);
335 tda18271_write_regs(fe, R_EP1, 1);
340 static int tda18271_init(struct dvb_frontend *fe)
342 struct tda18271_priv *priv = fe->tuner_priv;
343 unsigned char *regs = priv->tda18271_regs;
345 tda18271_read_regs(fe);
347 /* test IR_CAL_OK to see if we need init */
348 if ((regs[R_EP1] & 0x08) == 0)
349 tda18271_init_regs(fe);
354 static int tda18271_calc_main_pll(struct dvb_frontend *fe, u32 freq)
356 /* Sets Main Post-Divider & Divider bytes, but does not write them */
357 struct tda18271_priv *priv = fe->tuner_priv;
358 unsigned char *regs = priv->tda18271_regs;
362 int ret = tda18271_lookup_pll_map(MAIN_PLL, &freq, &pd, &d);
366 regs[R_MPD] = (0x77 & pd);
368 switch (priv->mode) {
369 case TDA18271_ANALOG:
370 regs[R_MPD] &= ~0x08;
372 case TDA18271_DIGITAL:
377 div = ((d * (freq / 1000)) << 7) / 125;
379 regs[R_MD1] = 0x7f & (div >> 16);
380 regs[R_MD2] = 0xff & (div >> 8);
381 regs[R_MD3] = 0xff & div;
386 static int tda18271_calc_cal_pll(struct dvb_frontend *fe, u32 freq)
388 /* Sets Cal Post-Divider & Divider bytes, but does not write them */
389 struct tda18271_priv *priv = fe->tuner_priv;
390 unsigned char *regs = priv->tda18271_regs;
394 int ret = tda18271_lookup_pll_map(CAL_PLL, &freq, &pd, &d);
400 div = ((d * (freq / 1000)) << 7) / 125;
402 regs[R_CD1] = 0x7f & (div >> 16);
403 regs[R_CD2] = 0xff & (div >> 8);
404 regs[R_CD3] = 0xff & div;
409 static int tda18271_calc_bp_filter(struct dvb_frontend *fe, u32 *freq)
411 /* Sets BP filter bits, but does not write them */
412 struct tda18271_priv *priv = fe->tuner_priv;
413 unsigned char *regs = priv->tda18271_regs;
416 int ret = tda18271_lookup_map(BP_FILTER, freq, &val);
420 regs[R_EP1] &= ~0x07; /* clear bp filter bits */
421 regs[R_EP1] |= (0x07 & val);
426 static int tda18271_calc_km(struct dvb_frontend *fe, u32 *freq)
428 /* Sets K & M bits, but does not write them */
429 struct tda18271_priv *priv = fe->tuner_priv;
430 unsigned char *regs = priv->tda18271_regs;
433 int ret = tda18271_lookup_map(RF_CAL_KMCO, freq, &val);
437 regs[R_EB13] &= ~0x7c; /* clear k & m bits */
438 regs[R_EB13] |= (0x7c & val);
443 static int tda18271_calc_rf_band(struct dvb_frontend *fe, u32 *freq)
445 /* Sets RF Band bits, but does not write them */
446 struct tda18271_priv *priv = fe->tuner_priv;
447 unsigned char *regs = priv->tda18271_regs;
450 int ret = tda18271_lookup_map(RF_BAND, freq, &val);
454 regs[R_EP2] &= ~0xe0; /* clear rf band bits */
455 regs[R_EP2] |= (0xe0 & (val << 5));
460 static int tda18271_calc_gain_taper(struct dvb_frontend *fe, u32 *freq)
462 /* Sets Gain Taper bits, but does not write them */
463 struct tda18271_priv *priv = fe->tuner_priv;
464 unsigned char *regs = priv->tda18271_regs;
467 int ret = tda18271_lookup_map(GAIN_TAPER, freq, &val);
471 regs[R_EP2] &= ~0x1f; /* clear gain taper bits */
472 regs[R_EP2] |= (0x1f & val);
477 static int tda18271_calc_ir_measure(struct dvb_frontend *fe, u32 *freq)
479 /* Sets IR Meas bits, but does not write them */
480 struct tda18271_priv *priv = fe->tuner_priv;
481 unsigned char *regs = priv->tda18271_regs;
484 int ret = tda18271_lookup_map(IR_MEASURE, freq, &val);
488 regs[R_EP5] &= ~0x07;
489 regs[R_EP5] |= (0x07 & val);
494 static int tda18271_calc_rf_cal(struct dvb_frontend *fe, u32 *freq)
496 /* Sets RF Cal bits, but does not write them */
497 struct tda18271_priv *priv = fe->tuner_priv;
498 unsigned char *regs = priv->tda18271_regs;
501 int ret = tda18271_lookup_map(RF_CAL, freq, &val);
510 static int tda18271_tune(struct dvb_frontend *fe,
511 u32 ifc, u32 freq, u32 bw, u8 std)
513 struct tda18271_priv *priv = fe->tuner_priv;
514 unsigned char *regs = priv->tda18271_regs;
519 tda_dbg("freq = %d, ifc = %d\n", freq, ifc);
521 /* RF tracking filter calibration */
523 /* calculate BP_Filter */
524 tda18271_calc_bp_filter(fe, &freq);
525 tda18271_write_regs(fe, R_EP1, 1);
529 tda18271_write_regs(fe, R_EB4, 1);
532 tda18271_write_regs(fe, R_EB7, 1);
535 tda18271_write_regs(fe, R_EB14, 1);
538 tda18271_write_regs(fe, R_EB20, 1);
540 /* set CAL mode to RF tracking filter calibration */
543 /* calculate CAL PLL */
545 switch (priv->mode) {
546 case TDA18271_ANALOG:
549 case TDA18271_DIGITAL:
554 tda18271_calc_cal_pll(fe, N);
556 /* calculate MAIN PLL */
558 switch (priv->mode) {
559 case TDA18271_ANALOG:
562 case TDA18271_DIGITAL:
563 N = freq + bw / 2 + 1000000;
567 tda18271_calc_main_pll(fe, N);
569 tda18271_write_regs(fe, R_EP3, 11);
570 msleep(5); /* RF tracking filter calibration initialization */
572 /* search for K,M,CO for RF Calibration */
573 tda18271_calc_km(fe, &freq);
574 tda18271_write_regs(fe, R_EB13, 1);
576 /* search for RF_BAND */
577 tda18271_calc_rf_band(fe, &freq);
579 /* search for Gain_Taper */
580 tda18271_calc_gain_taper(fe, &freq);
582 tda18271_write_regs(fe, R_EP2, 1);
583 tda18271_write_regs(fe, R_EP1, 1);
584 tda18271_write_regs(fe, R_EP2, 1);
585 tda18271_write_regs(fe, R_EP1, 1);
589 tda18271_write_regs(fe, R_EB4, 1);
592 tda18271_write_regs(fe, R_EB7, 1);
596 tda18271_write_regs(fe, R_EB20, 1);
597 msleep(60); /* RF tracking filter calibration completion */
599 regs[R_EP4] &= ~0x03; /* set cal mode to normal */
600 tda18271_write_regs(fe, R_EP4, 1);
602 tda18271_write_regs(fe, R_EP1, 1);
604 /* RF tracking filter correction for VHF_Low band */
605 if (0 == tda18271_calc_rf_cal(fe, &freq))
606 tda18271_write_regs(fe, R_EB14, 1);
608 /* Channel Configuration */
610 switch (priv->mode) {
611 case TDA18271_ANALOG:
614 case TDA18271_DIGITAL:
618 tda18271_write_regs(fe, R_EB22, 1);
620 regs[R_EP1] |= 0x40; /* set dis power level on */
623 regs[R_EP3] &= ~0x1f; /* clear std bits */
628 regs[R_EP4] &= ~0x03; /* set cal mode to normal */
630 regs[R_EP4] &= ~0x1c; /* clear if level bits */
631 switch (priv->mode) {
632 case TDA18271_ANALOG:
633 regs[R_MPD] &= ~0x80; /* IF notch = 0 */
635 case TDA18271_DIGITAL:
641 regs[R_EP4] &= ~0x80; /* turn this bit on only for fm */
643 /* image rejection validity */
644 tda18271_calc_ir_measure(fe, &freq);
646 /* calculate MAIN PLL */
649 tda18271_calc_main_pll(fe, N);
651 tda18271_write_regs(fe, R_TM, 15);
657 /* ------------------------------------------------------------------ */
659 static int tda18271_set_params(struct dvb_frontend *fe,
660 struct dvb_frontend_parameters *params)
662 struct tda18271_priv *priv = fe->tuner_priv;
665 u32 freq = params->frequency;
667 priv->mode = TDA18271_DIGITAL;
670 if (fe->ops.info.type == FE_ATSC) {
671 switch (params->u.vsb.modulation) {
674 std = 0x1b; /* device-specific (spec says 0x1c) */
679 std = 0x18; /* device-specific (spec says 0x1d) */
683 tda_warn("modulation not set!\n");
687 /* userspace request is already center adjusted */
688 freq += 1750000; /* Adjust to center (+1.75MHZ) */
691 } else if (fe->ops.info.type == FE_OFDM) {
692 switch (params->u.ofdm.bandwidth) {
693 case BANDWIDTH_6_MHZ:
694 std = 0x1b; /* device-specific (spec says 0x1c) */
698 case BANDWIDTH_7_MHZ:
699 std = 0x19; /* device-specific (spec says 0x1d) */
703 case BANDWIDTH_8_MHZ:
704 std = 0x1a; /* device-specific (spec says 0x1e) */
709 tda_warn("bandwidth not set!\n");
713 tda_warn("modulation type not supported!\n");
717 return tda18271_tune(fe, sgIF, freq, bw, std);
720 static int tda18271_set_analog_params(struct dvb_frontend *fe,
721 struct analog_parameters *params)
723 struct tda18271_priv *priv = fe->tuner_priv;
726 u32 sgIF, freq = params->frequency * 62500;
728 priv->mode = TDA18271_ANALOG;
731 if (params->std & V4L2_STD_MN) {
735 } else if (params->std & V4L2_STD_B) {
739 } else if (params->std & V4L2_STD_GH) {
743 } else if (params->std & V4L2_STD_PAL_I) {
747 } else if (params->std & V4L2_STD_DK) {
751 } else if (params->std & V4L2_STD_SECAM_L) {
755 } else if (params->std & V4L2_STD_SECAM_LC) {
765 tda_dbg("setting tda18271 to system %s\n", mode);
767 return tda18271_tune(fe, sgIF, freq, 0, std);
770 static int tda18271_release(struct dvb_frontend *fe)
772 kfree(fe->tuner_priv);
773 fe->tuner_priv = NULL;
777 static int tda18271_get_frequency(struct dvb_frontend *fe, u32 *frequency)
779 struct tda18271_priv *priv = fe->tuner_priv;
780 *frequency = priv->frequency;
784 static int tda18271_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
786 struct tda18271_priv *priv = fe->tuner_priv;
787 *bandwidth = priv->bandwidth;
791 static int tda18271_get_id(struct dvb_frontend *fe)
793 struct tda18271_priv *priv = fe->tuner_priv;
794 unsigned char *regs = priv->tda18271_regs;
798 tda18271_read_regs(fe);
800 switch (regs[R_ID] & 0x7f) {
802 name = "TDA18271HD/C1";
805 name = "TDA18271HD/C2";
806 ret = -EPROTONOSUPPORT;
809 name = "Unknown device";
814 tda_info("%s detected @ %d-%04x%s\n", name,
815 i2c_adapter_id(priv->i2c_adap), priv->i2c_addr,
816 (0 == ret) ? "" : ", device not supported.");
821 static struct dvb_tuner_ops tda18271_tuner_ops = {
823 .name = "NXP TDA18271HD",
824 .frequency_min = 45000000,
825 .frequency_max = 864000000,
826 .frequency_step = 62500
828 .init = tda18271_init,
829 .set_params = tda18271_set_params,
830 .set_analog_params = tda18271_set_analog_params,
831 .release = tda18271_release,
832 .get_frequency = tda18271_get_frequency,
833 .get_bandwidth = tda18271_get_bandwidth,
836 struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
837 struct i2c_adapter *i2c,
838 enum tda18271_i2c_gate gate)
840 struct tda18271_priv *priv = NULL;
842 priv = kzalloc(sizeof(struct tda18271_priv), GFP_KERNEL);
846 priv->i2c_addr = addr;
847 priv->i2c_adap = i2c;
850 fe->tuner_priv = priv;
852 if (tda18271_get_id(fe) < 0)
855 memcpy(&fe->ops.tuner_ops, &tda18271_tuner_ops,
856 sizeof(struct dvb_tuner_ops));
858 tda18271_init_regs(fe);
862 tda18271_release(fe);
865 EXPORT_SYMBOL_GPL(tda18271_attach);
866 MODULE_DESCRIPTION("NXP TDA18271HD analog / digital tuner driver");
867 MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
868 MODULE_LICENSE("GPL");
869 MODULE_VERSION("0.1");
872 * Overrides for Emacs so that we follow Linus's tabbing style.
873 * ---------------------------------------------------------------------------